What should be the last unnecessary <iostream>s in the library.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32333 91177308-0d34-0410-b5e6-96231b3b80d8

8 files changed, 10 insertions, 19 deletions

diff --git a/lib/Target/PowerPC/PPCAsmPrinter.cpp b/lib/Target/PowerPC/PPCAsmPrinter.cpp
index 65145e5..032782b 100644
--- a/lib/Target/PowerPC/PPCAsmPrinter.cpp
+++ b/lib/Target/PowerPC/PPCAsmPrinter.cpp
@@ -41,7 +41,6 @@
 #include "llvm/Target/TargetOptions.h"
 #include "llvm/ADT/Statistic.h"
 #include "llvm/ADT/StringExtras.h"
-#include <iostream>
 #include <set>
 using namespace llvm;
 
@@ -295,7 +294,7 @@ namespace {
 void PPCAsmPrinter::printOp(const MachineOperand &MO) {
   switch (MO.getType()) {
   case MachineOperand::MO_Immediate:
-    std::cerr << "printOp() does not handle immediate values\n";
+    cerr << "printOp() does not handle immediate values\n";
     abort();
     return;
 
@@ -629,7 +628,7 @@ bool DarwinAsmPrinter::doFinalization(Module &M) {
         SwitchToDataSection("\t.data", I);
         break;
       default:
-        std::cerr << "Unknown linkage type!";
+        cerr << "Unknown linkage type!";
         abort();
       }
 
diff --git a/lib/Target/PowerPC/PPCCodeEmitter.cpp b/lib/Target/PowerPC/PPCCodeEmitter.cpp
index 5e5f2cd..7f5e86f 100644
--- a/lib/Target/PowerPC/PPCCodeEmitter.cpp
+++ b/lib/Target/PowerPC/PPCCodeEmitter.cpp
@@ -24,7 +24,6 @@
 #include "llvm/Support/Debug.h"                   
 #include "llvm/Support/Compiler.h"
 #include "llvm/Target/TargetOptions.h"
-#include <iostream>
 using namespace llvm;
 
 namespace {
@@ -193,7 +192,7 @@ int PPCCodeEmitter::getMachineOpValue(MachineInstr &MI, MachineOperand &MO) {
                                                Reloc,
                                                MO.getMachineBasicBlock()));
   } else {
-    std::cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
+    cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
     abort();
   }
 
diff --git a/lib/Target/PowerPC/PPCHazardRecognizers.cpp b/lib/Target/PowerPC/PPCHazardRecognizers.cpp
index 3ca6e4e..69ad1ea 100644
--- a/lib/Target/PowerPC/PPCHazardRecognizers.cpp
+++ b/lib/Target/PowerPC/PPCHazardRecognizers.cpp
@@ -16,10 +16,8 @@
 #include "PPC.h"
 #include "PPCInstrInfo.h"
 #include "llvm/Support/Debug.h"
-#include <iostream>
 using namespace llvm;
 
-
 //===----------------------------------------------------------------------===//
 // PowerPC 970 Hazard Recognizer
 //
@@ -52,7 +50,7 @@ PPCHazardRecognizer970::PPCHazardRecognizer970(const TargetInstrInfo &tii)
 }
 
 void PPCHazardRecognizer970::EndDispatchGroup() {
-  DEBUG(std::cerr << "=== Start of dispatch group\n");
+  DOUT << "=== Start of dispatch group\n";
   NumIssued = 0;
   
   // Structural hazard info.
diff --git a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
index 1a3508e..d45c255 100644
--- a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
+++ b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
@@ -30,7 +30,6 @@
 #include "llvm/Support/Debug.h"
 #include "llvm/Support/MathExtras.h"
 #include "llvm/Support/Compiler.h"
-#include <iostream>
 #include <queue>
 #include <set>
 using namespace llvm;
diff --git a/lib/Target/PowerPC/PPCInstrInfo.cpp b/lib/Target/PowerPC/PPCInstrInfo.cpp
index da851e6..1ba701f 100644
--- a/lib/Target/PowerPC/PPCInstrInfo.cpp
+++ b/lib/Target/PowerPC/PPCInstrInfo.cpp
@@ -16,7 +16,6 @@
 #include "PPCGenInstrInfo.inc"
 #include "PPCTargetMachine.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
-#include <iostream>
 using namespace llvm;
 
 PPCInstrInfo::PPCInstrInfo(PPCTargetMachine &tm)
diff --git a/lib/Target/PowerPC/PPCJITInfo.cpp b/lib/Target/PowerPC/PPCJITInfo.cpp
index 14527bf..29fdd6a 100644
--- a/lib/Target/PowerPC/PPCJITInfo.cpp
+++ b/lib/Target/PowerPC/PPCJITInfo.cpp
@@ -18,7 +18,6 @@
 #include "llvm/Config/alloca.h"
 #include "llvm/Support/Debug.h"
 #include <set>
-#include <iostream>
 using namespace llvm;
 
 static TargetJITInfo::JITCompilerFn JITCompilerFunction;
diff --git a/lib/Target/PowerPC/PPCRegisterInfo.cpp b/lib/Target/PowerPC/PPCRegisterInfo.cpp
index 6a21a50..61639c0 100644
--- a/lib/Target/PowerPC/PPCRegisterInfo.cpp
+++ b/lib/Target/PowerPC/PPCRegisterInfo.cpp
@@ -36,7 +36,6 @@
 #include "llvm/Support/MathExtras.h"
 #include "llvm/ADT/STLExtras.h"
 #include <cstdlib>
-#include <iostream>
 using namespace llvm;
 
 /// getRegisterNumbering - Given the enum value for some register, e.g.
@@ -77,7 +76,7 @@ unsigned PPCRegisterInfo::getRegisterNumbering(unsigned RegEnum) {
   case R30:  case X30:  case F30:  case V30: return 30;
   case R31:  case X31:  case F31:  case V31: return 31;
   default:
-    std::cerr << "Unhandled reg in PPCRegisterInfo::getRegisterNumbering!\n";
+    cerr << "Unhandled reg in PPCRegisterInfo::getRegisterNumbering!\n";
     abort();
   }
 }
@@ -234,7 +233,7 @@ void PPCRegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
   } else if (RC == PPC::VRRCRegisterClass) {
     BuildMI(MBB, MI, TII.get(PPC::VOR), DestReg).addReg(SrcReg).addReg(SrcReg);
   } else {
-    std::cerr << "Attempt to copy register that is not GPR or FPR";
+    cerr << "Attempt to copy register that is not GPR or FPR";
     abort();
   }
 }
diff --git a/lib/Target/PowerPC/PPCSubtarget.cpp b/lib/Target/PowerPC/PPCSubtarget.cpp
index 643acc2..5c18e65 100644
--- a/lib/Target/PowerPC/PPCSubtarget.cpp
+++ b/lib/Target/PowerPC/PPCSubtarget.cpp
@@ -15,7 +15,6 @@
 #include "PPC.h"
 #include "llvm/Module.h"
 #include "PPCGenSubtarget.inc"
-#include <iostream>
 using namespace llvm;
 
 #if defined(__APPLE__)
@@ -80,8 +79,8 @@ PPCSubtarget::PPCSubtarget(const Module &M, const std::string &FS, bool is64Bit)
   // If we are generating code for ppc64, verify that options make sense.
   if (is64Bit) {
     if (!has64BitSupport()) {
-      std::cerr << "PPC: Generation of 64-bit code for a 32-bit processor "
-                   "requested.  Ignoring 32-bit processor feature.\n";
+      cerr << "PPC: Generation of 64-bit code for a 32-bit processor "
+           << "requested.  Ignoring 32-bit processor feature.\n";
       Has64BitSupport = true;
     }
     // Silently force 64-bit register use on ppc64.
@@ -91,8 +90,8 @@ PPCSubtarget::PPCSubtarget(const Module &M, const std::string &FS, bool is64Bit)
   // If the user requested use of 64-bit regs, but the cpu selected doesn't
   // support it, warn and ignore.
   if (use64BitRegs() && !has64BitSupport()) {
-    std::cerr << "PPC: 64-bit registers requested on CPU without support.  "
-                 "Disabling 64-bit register use.\n";
+    cerr << "PPC: 64-bit registers requested on CPU without support.  "
+         << "Disabling 64-bit register use.\n";
     Use64BitRegs = false;
   }