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authorTom Stellard <thomas.stellard@amd.com>2013-04-19 02:11:06 +0000
committerTom Stellard <thomas.stellard@amd.com>2013-04-19 02:11:06 +0000
commit48b809e6e5cf4a7d1b876ac1d56a9e32df506f76 (patch)
tree962ac5fe49ace84ae12af3f41b9a29efa4eafa94 /lib/Target/R600/AMDGPUInstructions.td
parentae2a8929d890424193394ac63a1a21292a216d7a (diff)
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R600: Add pattern for the BFI_INT instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179830 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/R600/AMDGPUInstructions.td')
-rw-r--r--lib/Target/R600/AMDGPUInstructions.td20
1 files changed, 20 insertions, 0 deletions
diff --git a/lib/Target/R600/AMDGPUInstructions.td b/lib/Target/R600/AMDGPUInstructions.td
index fa890c1..4b37a53 100644
--- a/lib/Target/R600/AMDGPUInstructions.td
+++ b/lib/Target/R600/AMDGPUInstructions.td
@@ -261,6 +261,26 @@ class DwordAddrPat<ValueType vt, RegisterClass rc> : Pat <
(vt rc:$addr)
>;
+// BFI_INT patterns
+
+multiclass BFIPatterns <Instruction BFI_INT> {
+
+ // Definition from ISA doc:
+ // (y & x) | (z & ~x)
+ def : Pat <
+ (or (and i32:$y, i32:$x), (and i32:$z, (not i32:$x))),
+ (BFI_INT $x, $y, $z)
+ >;
+
+ // SHA-256 Ch function
+ // z ^ (x & (y ^ z))
+ def : Pat <
+ (xor i32:$z, (and i32:$x, (xor i32:$y, i32:$z))),
+ (BFI_INT $x, $y, $z)
+ >;
+
+}
+
include "R600Instructions.td"
include "SIInstrInfo.td"