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authorVincent Lejeune <vljn@ovi.com>2013-10-01 19:32:38 +0000
committerVincent Lejeune <vljn@ovi.com>2013-10-01 19:32:38 +0000
commit5b00e833fabbf5bdf2973c63c39d4a0d0143853a (patch)
tree396f9581ca7af7e70bbd9d371bb7cfa628388ce4 /lib/Target/R600/R600Instructions.td
parentdb3de106376558c7425d557b1b980f631107cd14 (diff)
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R600: Enable -verify-machineinstrs in some tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191788 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/R600/R600Instructions.td')
-rw-r--r--lib/Target/R600/R600Instructions.td2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/R600/R600Instructions.td b/lib/Target/R600/R600Instructions.td
index e92385d..f38fa5d 100644
--- a/lib/Target/R600/R600Instructions.td
+++ b/lib/Target/R600/R600Instructions.td
@@ -2238,7 +2238,7 @@ let isTerminator = 1, usesCustomInserter = 1, isBranch = 1, isBarrier = 1 in {
def BRANCH : ILFormat<(outs), (ins brtarget:$target),
"; Pseudo unconditional branch instruction",
[(br bb:$target)]>;
- defm BRANCH_COND : BranchConditional<IL_brcond>;
+ defm BRANCH_COND : BranchConditional<IL_brcond, R600_Reg32, R600_Reg32>;
}
//===---------------------------------------------------------------------===//