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| author | Bill Wendling <isanbard@gmail.com> | 2013-11-25 05:36:37 +0000 |
|---|---|---|
| committer | Bill Wendling <isanbard@gmail.com> | 2013-11-25 05:36:37 +0000 |
| commit | fd76325f8afd780f3b5863a32d4a7f1bc88fec07 (patch) | |
| tree | 99f6e7278b1ac8a9140f1eda94162f3f2d14e1ba /lib/Target/R600/R600Instructions.td | |
| parent | fc1f9531d3f9bf14b4b20b80f158317795d3d1d8 (diff) | |
| download | external_llvm-fd76325f8afd780f3b5863a32d4a7f1bc88fec07.zip external_llvm-fd76325f8afd780f3b5863a32d4a7f1bc88fec07.tar.gz external_llvm-fd76325f8afd780f3b5863a32d4a7f1bc88fec07.tar.bz2 | |
Merging r195514:
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r195514 | tstellar | 2013-11-22 15:07:58 -0800 (Fri, 22 Nov 2013) | 6 lines
R600/SI: Fixing handling of condition codes
We were ignoring the ordered/onordered bits and also the signed/unsigned
bits of condition codes when lowering the DAG to MachineInstrs.
NOTE: This is a candidate for the 3.4 branch.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195609 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/R600/R600Instructions.td')
| -rw-r--r-- | lib/Target/R600/R600Instructions.td | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/R600/R600Instructions.td b/lib/Target/R600/R600Instructions.td index d8e431a..abfde50 100644 --- a/lib/Target/R600/R600Instructions.td +++ b/lib/Target/R600/R600Instructions.td @@ -822,12 +822,12 @@ def CNDE_INT : R600_3OP < def CNDGE_INT : R600_3OP < 0x1E, "CNDGE_INT", - [(set i32:$dst, (selectcc i32:$src0, 0, i32:$src1, i32:$src2, COND_GE))] + [(set i32:$dst, (selectcc i32:$src0, 0, i32:$src1, i32:$src2, COND_SGE))] >; def CNDGT_INT : R600_3OP < 0x1D, "CNDGT_INT", - [(set i32:$dst, (selectcc i32:$src0, 0, i32:$src1, i32:$src2, COND_GT))] + [(set i32:$dst, (selectcc i32:$src0, 0, i32:$src1, i32:$src2, COND_SGT))] >; //===----------------------------------------------------------------------===// @@ -2313,7 +2313,7 @@ def : CND_INT_f32 <CNDGE_INT, SETGE>; //CNDGE_INT extra pattern def : Pat < - (selectcc i32:$src0, -1, i32:$src1, i32:$src2, COND_GT), + (selectcc i32:$src0, -1, i32:$src1, i32:$src2, COND_SGT), (CNDGE_INT $src0, $src1, $src2) >; |