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author | Tom Stellard <thomas.stellard@amd.com> | 2013-08-14 23:24:53 +0000 |
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committer | Tom Stellard <thomas.stellard@amd.com> | 2013-08-14 23:24:53 +0000 |
commit | e8e33f448e8830590c498ac5101ef8b27446ca3b (patch) | |
tree | 2aada1408e415c2de01557c54d4804568f3bdd09 /lib/Target/R600/SIInstrInfo.td | |
parent | 68db37b952be497c94c7aa98cf26f3baadb5afd3 (diff) | |
download | external_llvm-e8e33f448e8830590c498ac5101ef8b27446ca3b.zip external_llvm-e8e33f448e8830590c498ac5101ef8b27446ca3b.tar.gz external_llvm-e8e33f448e8830590c498ac5101ef8b27446ca3b.tar.bz2 |
R600/SI: Replace v1i32 type with i32 in imageload and sample intrinsics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188430 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/R600/SIInstrInfo.td')
-rw-r--r-- | lib/Target/R600/SIInstrInfo.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/R600/SIInstrInfo.td b/lib/Target/R600/SIInstrInfo.td index b741978..2639456 100644 --- a/lib/Target/R600/SIInstrInfo.td +++ b/lib/Target/R600/SIInstrInfo.td @@ -27,7 +27,7 @@ def SIload_input : SDNode<"AMDGPUISD::LOAD_INPUT", >; class SDSample<string opcode> : SDNode <opcode, - SDTypeProfile<1, 4, [SDTCisVT<0, v4f32>, SDTCisVec<1>, SDTCisVT<2, v32i8>, + SDTypeProfile<1, 4, [SDTCisVT<0, v4f32>, SDTCisVT<2, v32i8>, SDTCisVT<3, i128>, SDTCisVT<4, i32>]> >; |