The SparcV9 target no longer uses any pseudoinstructions (SETSW, SETUW,

SETX) or M_PSEUDO_FLAG.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15901 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 0 insertions, 9 deletions

diff --git a/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp b/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp
index 6a68a0b..0737249 100644
--- a/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp
+++ b/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp
@@ -256,21 +256,12 @@ void PhyRegAlloc::buildInterferenceGraphs() {
 	LiveRange *LR = LRI->getLiveRangeForValue(*OpI);
 	if (LR) LR->addSpillCost(BBLoopDepthCost);
       } 
-
-      // Mark all operands of pseudo-instructions as interfering with one
-      // another.  This must be done because pseudo-instructions may be
-      // expanded to multiple instructions by the assembler, so all the
-      // operands must get distinct registers.
-      if (TM.getInstrInfo()->isPseudoInstr(MInst->getOpcode()))
-      	addInterf4PseudoInstr(MInst);
-
       // Also add interference for any implicit definitions in a machine
       // instr (currently, only calls have this).
       unsigned NumOfImpRefs =  MInst->getNumImplicitRefs();
       for (unsigned z=0; z < NumOfImpRefs; z++) 
         if (MInst->getImplicitOp(z).isDef())
 	  addInterference( MInst->getImplicitRef(z), &LVSetAI, isCallInst );
-
     } // for all machine instructions in BB
   } // for all BBs in function