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authorMichael Liao <michael.liao@intel.com>2013-03-26 17:47:11 +0000
committerMichael Liao <michael.liao@intel.com>2013-03-26 17:47:11 +0000
commit675eb3b9ac547119f6db676ebdd172d40a797b1c (patch)
tree4f13b3e2e5500e67183794bd4f1409ccd12b04d9 /lib/Target/X86/X86.td
parent30ebb962b6fe110514917f31522a81f2c6d914ba (diff)
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Add PREFETCHW codegen support
- Add 'PRFCHW' feature defined in AVX2 ISA extension git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178040 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86.td')
-rw-r--r--lib/Target/X86/X86.td2
1 files changed, 2 insertions, 0 deletions
diff --git a/lib/Target/X86/X86.td b/lib/Target/X86/X86.td
index 0216252..a7edcc8 100644
--- a/lib/Target/X86/X86.td
+++ b/lib/Target/X86/X86.td
@@ -122,6 +122,8 @@ def FeatureRTM : SubtargetFeature<"rtm", "HasRTM", "true",
"Support RTM instructions">;
def FeatureADX : SubtargetFeature<"adx", "HasADX", "true",
"Support ADX instructions">;
+def FeaturePRFCHW : SubtargetFeature<"prfchw", "HasPRFCHW", "true",
+ "Support PRFCHW instructions">;
def FeatureLeaForSP : SubtargetFeature<"lea-sp", "UseLeaForSP", "true",
"Use LEA for adjusting the stack pointer">;
def FeatureSlowDivide : SubtargetFeature<"idiv-to-divb",