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author | Michael J. Spencer <bigcheesegs@gmail.com> | 2011-04-14 14:33:36 +0000 |
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committer | Michael J. Spencer <bigcheesegs@gmail.com> | 2011-04-14 14:33:36 +0000 |
commit | 9a0bac41b3526fea1e148224e88b31439134098e (patch) | |
tree | 9f7c6775758ff7f17efe2e672ce68a99198cefd3 /lib/Target/X86/X86.td | |
parent | ddf9abf2b6ee3a1104057df20ec3be61b410441e (diff) | |
download | external_llvm-9a0bac41b3526fea1e148224e88b31439134098e.zip external_llvm-9a0bac41b3526fea1e148224e88b31439134098e.tar.gz external_llvm-9a0bac41b3526fea1e148224e88b31439134098e.tar.bz2 |
Fix whitespace and tabs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129517 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86.td')
-rw-r--r-- | lib/Target/X86/X86.td | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/X86/X86.td b/lib/Target/X86/X86.td index efb6c8c..00ff97e 100644 --- a/lib/Target/X86/X86.td +++ b/lib/Target/X86/X86.td @@ -1,10 +1,10 @@ //===- X86.td - Target definition file for the Intel X86 ---*- tablegen -*-===// -// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This is a target description file for the Intel i386 architecture, refered to @@ -32,7 +32,7 @@ def FeatureMMX : SubtargetFeature<"mmx","X86SSELevel", "MMX", def FeatureSSE1 : SubtargetFeature<"sse", "X86SSELevel", "SSE1", "Enable SSE instructions", // SSE codegen depends on cmovs, and all - // SSE1+ processors support them. + // SSE1+ processors support them. [FeatureMMX, FeatureCMOV]>; def FeatureSSE2 : SubtargetFeature<"sse2", "X86SSELevel", "SSE2", "Enable SSE2 instructions", |