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| author | Chris Lattner <sabre@nondot.org> | 2007-06-09 05:01:50 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2007-06-09 05:01:50 +0000 |
| commit | 6b7c21cc303f3435d496f1799b570337b4d119fd (patch) | |
| tree | 7e373ad76fdceec27e86f3ab1317fe9863816bfe /lib/Target | |
| parent | ae5eb7accf65ee94e22b3d235d466d71268f1e83 (diff) | |
| download | external_llvm-6b7c21cc303f3435d496f1799b570337b4d119fd.zip external_llvm-6b7c21cc303f3435d496f1799b570337b4d119fd.tar.gz external_llvm-6b7c21cc303f3435d496f1799b570337b4d119fd.tar.bz2 | |
fix mmx handling bug
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37533 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index bf84993..3f7f9f7 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -1183,7 +1183,10 @@ X86TargetLowering::LowerX86_64CCCArguments(SDOperand Op, SelectionDAG &DAG) { RC = X86::FR64RegisterClass; else { assert(MVT::isVector(RegVT)); - RC = X86::VR128RegisterClass; + if (MVT::getSizeInBits(RegVT) == 64) + RC = X86::VR64RegisterClass; + else + RC = X86::VR128RegisterClass; } unsigned Reg = AddLiveIn(DAG.getMachineFunction(), VA.getLocReg(), RC); |