diff options
author | Evan Cheng <evan.cheng@apple.com> | 2009-06-02 20:09:31 +0000 |
---|---|---|
committer | Evan Cheng <evan.cheng@apple.com> | 2009-06-02 20:09:31 +0000 |
commit | 6c9275cc153fcd45f67a98bcad317a028cab19cf (patch) | |
tree | 26a7843fa5fff53eeffec4a21be8138c70b2bcbb /lib/Target | |
parent | 866d3cc445dc28400845d7f46e70861a75c74b6e (diff) | |
download | external_llvm-6c9275cc153fcd45f67a98bcad317a028cab19cf.zip external_llvm-6c9275cc153fcd45f67a98bcad317a028cab19cf.tar.gz external_llvm-6c9275cc153fcd45f67a98bcad317a028cab19cf.tar.bz2 |
On Darwin x86_64 small code model doesn't guarantee code address fits in 32-bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72734 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
-rw-r--r-- | lib/Target/X86/X86Instr64bit.td | 8 | ||||
-rw-r--r-- | lib/Target/X86/X86InstrInfo.td | 1 |
2 files changed, 5 insertions, 4 deletions
diff --git a/lib/Target/X86/X86Instr64bit.td b/lib/Target/X86/X86Instr64bit.td index dc15e4a..d4e298e 100644 --- a/lib/Target/X86/X86Instr64bit.td +++ b/lib/Target/X86/X86Instr64bit.td @@ -1399,16 +1399,16 @@ def : Pat<(i64 (X86Wrapper texternalsym:$dst)), def : Pat<(store (i64 (X86Wrapper tconstpool:$src)), addr:$dst), (MOV64mi32 addr:$dst, tconstpool:$src)>, - Requires<[SmallCode, IsStatic]>; + Requires<[SmallCode, IsStatic, IsNotDarwin]>; def : Pat<(store (i64 (X86Wrapper tjumptable:$src)), addr:$dst), (MOV64mi32 addr:$dst, tjumptable:$src)>, - Requires<[SmallCode, IsStatic]>; + Requires<[SmallCode, IsStatic, IsNotDarwin]>; def : Pat<(store (i64 (X86Wrapper tglobaladdr:$src)), addr:$dst), (MOV64mi32 addr:$dst, tglobaladdr:$src)>, - Requires<[SmallCode, IsStatic]>; + Requires<[SmallCode, IsStatic, IsNotDarwin]>; def : Pat<(store (i64 (X86Wrapper texternalsym:$src)), addr:$dst), (MOV64mi32 addr:$dst, texternalsym:$src)>, - Requires<[SmallCode, IsStatic]>; + Requires<[SmallCode, IsStatic, IsNotDarwin]>; // Calls // Direct PC relative function call for small code model. 32-bit displacement diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td index 50ae417..c3f82a5 100644 --- a/lib/Target/X86/X86InstrInfo.td +++ b/lib/Target/X86/X86InstrInfo.td @@ -237,6 +237,7 @@ def IsStatic : Predicate<"TM.getRelocationModel() == Reloc::Static">; def OptForSpeed : Predicate<"!OptForSize">; def FastBTMem : Predicate<"!Subtarget->isBTMemSlow()">; def CallImmAddr : Predicate<"Subtarget->IsLegalToCallImmediateAddr(TM)">; +def IsNotDarwin : Predicate<"!Subtarget->isTargetDarwin()">; //===----------------------------------------------------------------------===// // X86 Instruction Format Definitions. |