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authorUlrich Weigand <ulrich.weigand@de.ibm.com>2013-07-01 16:37:52 +0000
committerUlrich Weigand <ulrich.weigand@de.ibm.com>2013-07-01 16:37:52 +0000
commitaf679a22923d2b61e3bfb6721bd562b99546bfad (patch)
tree8fafcd54d2cec2cc1e2eafc00c7409ee50ab313b /lib/Target
parentd59fc0af0a3ebd13c7004511e64e3233dfe87b17 (diff)
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[PowerPC] Add variants of "sync" instruction
This adds support for the "sync $L" instruction with operand, and provides aliases for "lwsync" and "ptesync". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185344 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
-rw-r--r--lib/Target/PowerPC/PPCInstrFormats.td5
-rw-r--r--lib/Target/PowerPC/PPCInstrInfo.td12
2 files changed, 12 insertions, 5 deletions
diff --git a/lib/Target/PowerPC/PPCInstrFormats.td b/lib/Target/PowerPC/PPCInstrFormats.td
index b316fa6..9f5435e 100644
--- a/lib/Target/PowerPC/PPCInstrFormats.td
+++ b/lib/Target/PowerPC/PPCInstrFormats.td
@@ -473,8 +473,11 @@ class XForm_24<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
class XForm_24_sync<bits<6> opcode, bits<10> xo, dag OOL, dag IOL,
string asmstr, InstrItinClass itin, list<dag> pattern>
: I<opcode, OOL, IOL, asmstr, itin> {
+ bits<2> L;
+
let Pattern = pattern;
- let Inst{6-10} = 0;
+ let Inst{6-8} = 0;
+ let Inst{9-10} = L;
let Inst{11-15} = 0;
let Inst{16-20} = 0;
let Inst{21-30} = xo;
diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td
index 28396fd..d05bd0d 100644
--- a/lib/Target/PowerPC/PPCInstrInfo.td
+++ b/lib/Target/PowerPC/PPCInstrInfo.td
@@ -1508,9 +1508,9 @@ def : Pat<(pre_store f32:$rS, iPTR:$ptrreg, iPTR:$ptroff),
def : Pat<(pre_store f64:$rS, iPTR:$ptrreg, iPTR:$ptroff),
(STFDUX $rS, $ptrreg, $ptroff)>;
-def SYNC : XForm_24_sync<31, 598, (outs), (ins),
- "sync", LdStSync,
- [(int_ppc_sync)]>;
+def SYNC : XForm_24_sync<31, 598, (outs), (ins i32imm:$L),
+ "sync $L", LdStSync, []>;
+def : Pat<(int_ppc_sync), (SYNC 0)>;
//===----------------------------------------------------------------------===//
// PPC32 Arithmetic Instructions.
@@ -2231,7 +2231,7 @@ def : Pat<(f64 (extloadf32 xaddr:$src)),
def : Pat<(f64 (fextend f32:$src)),
(COPY_TO_REGCLASS $src, F8RC)>;
-def : Pat<(atomic_fence (imm), (imm)), (SYNC)>;
+def : Pat<(atomic_fence (imm), (imm)), (SYNC 0)>;
// Additional FNMSUB patterns: -a*c + b == -(a*c - b)
def : Pat<(fma (fneg f64:$A), f64:$C, f64:$B),
@@ -2279,6 +2279,10 @@ class PPCAsmPseudo<string asm, dag iops>
def : InstAlias<"sc", (SC 0)>;
+def : InstAlias<"sync", (SYNC 0)>;
+def : InstAlias<"lwsync", (SYNC 1)>;
+def : InstAlias<"ptesync", (SYNC 2)>;
+
def : InstAlias<"xnop", (XORI R0, R0, 0)>;
def : InstAlias<"mr $rA, $rB", (OR8 g8rc:$rA, g8rc:$rB, g8rc:$rB)>;