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| author | Chris Lattner <sabre@nondot.org> | 2010-11-16 00:57:32 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2010-11-16 00:57:32 +0000 |
| commit | 0382a4c98ea8a73cbe2232d71b4bf1303d718274 (patch) | |
| tree | c51a9c2fbc095cb04fee30d046dc602eb1a74d3f /lib | |
| parent | b69cdfa6f3d5a0661354e744a11caa7b3342b83e (diff) | |
| download | external_llvm-0382a4c98ea8a73cbe2232d71b4bf1303d718274.zip external_llvm-0382a4c98ea8a73cbe2232d71b4bf1303d718274.tar.gz external_llvm-0382a4c98ea8a73cbe2232d71b4bf1303d718274.tar.bz2 | |
add copy of comment to the code that will survive the mcjit'ization
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119308 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/PowerPC/PPCMCCodeEmitter.cpp | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPCMCCodeEmitter.cpp b/lib/Target/PowerPC/PPCMCCodeEmitter.cpp index b4a1b19..f286b27 100644 --- a/lib/Target/PowerPC/PPCMCCodeEmitter.cpp +++ b/lib/Target/PowerPC/PPCMCCodeEmitter.cpp @@ -199,6 +199,8 @@ unsigned PPCMCCodeEmitter:: getMachineOpValue(const MCInst &MI, const MCOperand &MO, SmallVectorImpl<MCFixup> &Fixups) const { if (MO.isReg()) { + // MTCRF/MFOCRF should go through get_crbitm_encoding for the CR operand. + // The GPR operand should come through here though. assert((MI.getOpcode() != PPC::MTCRF && MI.getOpcode() != PPC::MFOCRF) || MO.getReg() < PPC::CR0 || MO.getReg() > PPC::CR7); return PPCRegisterInfo::getRegisterNumbering(MO.getReg()); |