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authorDan Gohman <gohman@apple.com>2008-12-23 17:28:50 +0000
committerDan Gohman <gohman@apple.com>2008-12-23 17:28:50 +0000
commit237dee125997dcaf16e391878465162cc680c0fa (patch)
tree19d19ef28ab054c1d6f06bb57aad3587730f3ae5 /lib
parente1dfc7da8991270db5094aa736fde273bfab6061 (diff)
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Use isTerminator() instead of isBranch()||isReturn() in
several places. isTerminator() returns true for a superset of cases, and includes things like FP_REG_KILL, which are nither return or branch but aren't safe to move/remat/etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61373 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/CodeGen/MachineInstr.cpp2
-rw-r--r--lib/CodeGen/MachineLICM.cpp2
-rw-r--r--lib/CodeGen/ScheduleDAGInstrs.cpp5
3 files changed, 4 insertions, 5 deletions
diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp
index 2f02601..3825ddb 100644
--- a/lib/CodeGen/MachineInstr.cpp
+++ b/lib/CodeGen/MachineInstr.cpp
@@ -707,7 +707,7 @@ bool MachineInstr::isSafeToMove(const TargetInstrInfo *TII,
SawStore = true;
return false;
}
- if (TID->isReturn() || TID->isBranch() || TID->hasUnmodeledSideEffects())
+ if (TID->isTerminator() || TID->hasUnmodeledSideEffects())
return false;
// See if this instruction does a load. If so, we have to guarantee that the
diff --git a/lib/CodeGen/MachineLICM.cpp b/lib/CodeGen/MachineLICM.cpp
index f19862c..d0baaa8 100644
--- a/lib/CodeGen/MachineLICM.cpp
+++ b/lib/CodeGen/MachineLICM.cpp
@@ -205,7 +205,7 @@ bool MachineLICM::IsLoopInvariantInst(MachineInstr &I) {
const TargetInstrDesc &TID = I.getDesc();
// Ignore stuff that we obviously can't hoist.
- if (TID.mayStore() || TID.isCall() || TID.isReturn() || TID.isBranch() ||
+ if (TID.mayStore() || TID.isCall() || TID.isTerminator() ||
TID.hasUnmodeledSideEffects())
return false;
diff --git a/lib/CodeGen/ScheduleDAGInstrs.cpp b/lib/CodeGen/ScheduleDAGInstrs.cpp
index c320900..c47ddda 100644
--- a/lib/CodeGen/ScheduleDAGInstrs.cpp
+++ b/lib/CodeGen/ScheduleDAGInstrs.cpp
@@ -275,8 +275,7 @@ void ScheduleDAGInstrs::BuildSchedUnits() {
// after stack slots are lowered to actual addresses.
// TODO: Use an AliasAnalysis and do real alias-analysis queries, and
// produce more precise dependence information.
- if (TID.isCall() || TID.isReturn() || TID.isBranch() ||
- TID.hasUnmodeledSideEffects()) {
+ if (TID.isCall() || TID.isTerminator() || TID.hasUnmodeledSideEffects()) {
new_chain:
// This is the conservative case. Add dependencies on all memory
// references.
@@ -300,7 +299,7 @@ void ScheduleDAGInstrs::BuildSchedUnits() {
// See if it is known to just have a single memory reference.
MachineInstr *ChainMI = Chain->getInstr();
const TargetInstrDesc &ChainTID = ChainMI->getDesc();
- if (!ChainTID.isCall() && !ChainTID.isReturn() && !ChainTID.isBranch() &&
+ if (!ChainTID.isCall() && !ChainTID.isTerminator() &&
!ChainTID.hasUnmodeledSideEffects() &&
ChainMI->hasOneMemOperand() &&
!ChainMI->memoperands_begin()->isVolatile() &&