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author | Jim Grosbach <grosbach@apple.com> | 2010-12-15 18:48:45 +0000 |
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committer | Jim Grosbach <grosbach@apple.com> | 2010-12-15 18:48:45 +0000 |
commit | 41b1d4e4725b34ccf646c706757d8a557ab376e7 (patch) | |
tree | 3cc7a4d8a556964966f93fd3ae491d4da220f003 /lib | |
parent | 47dbd429daefa9b3f19347194ddfb6f69642465e (diff) | |
download | external_llvm-41b1d4e4725b34ccf646c706757d8a557ab376e7.zip external_llvm-41b1d4e4725b34ccf646c706757d8a557ab376e7.tar.gz external_llvm-41b1d4e4725b34ccf646c706757d8a557ab376e7.tar.bz2 |
The new t2LEApcrel* pseudo instructions need the size specified.
rdar://8768390
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121876 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/Target/ARM/ARMInstrFormats.td | 7 | ||||
-rw-r--r-- | lib/Target/ARM/ARMInstrThumb2.td | 11 |
2 files changed, 13 insertions, 5 deletions
diff --git a/lib/Target/ARM/ARMInstrFormats.td b/lib/Target/ARM/ARMInstrFormats.td index 243c7e2..eee452e 100644 --- a/lib/Target/ARM/ARMInstrFormats.td +++ b/lib/Target/ARM/ARMInstrFormats.td @@ -266,6 +266,13 @@ class tPseudoInst<dag oops, dag iops, SizeFlagVal sz, InstrItinClass itin, list<Predicate> Predicates = [IsThumb]; } +// PseudoInst that's Thumb2-mode only. +class t2PseudoInst<dag oops, dag iops, SizeFlagVal sz, InstrItinClass itin, + list<dag> pattern> + : PseudoInst<oops, iops, itin, pattern> { + let SZ = sz; + list<Predicate> Predicates = [IsThumb2]; +} // Almost all ARM instructions are predicable. class I<dag oops, dag iops, AddrMode am, SizeFlagVal sz, IndexMode im, Format f, InstrItinClass itin, diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td index ad91582..501ebe8 100644 --- a/lib/Target/ARM/ARMInstrThumb2.td +++ b/lib/Target/ARM/ARMInstrThumb2.td @@ -1156,11 +1156,12 @@ def t2ADR : T2PCOneRegImm<(outs rGPR:$Rd), } let neverHasSideEffects = 1, isReMaterializable = 1 in -def t2LEApcrel : PseudoInst<(outs rGPR:$Rd), (ins i32imm:$label, pred:$p), - IIC_iALUi, []>; -def t2LEApcrelJT : PseudoInst<(outs rGPR:$Rd), - (ins i32imm:$label, nohash_imm:$id, pred:$p), IIC_iALUi, - []>; +def t2LEApcrel : t2PseudoInst<(outs rGPR:$Rd), (ins i32imm:$label, pred:$p), + Size4Bytes, IIC_iALUi, []>; +def t2LEApcrelJT : t2PseudoInst<(outs rGPR:$Rd), + (ins i32imm:$label, nohash_imm:$id, pred:$p), + Size4Bytes, IIC_iALUi, + []>; // FIXME: None of these add/sub SP special instructions should be necessary |