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authorDale Johannesen <dalej@apple.com>2008-02-15 18:09:51 +0000
committerDale Johannesen <dalej@apple.com>2008-02-15 18:09:51 +0000
commitb636d4dc05b353e2801653174d1d20b1a02706a7 (patch)
tree24895ea5a392776d44c6403d227f8190259c2805 /lib
parent538db766993d8c43be1f3d3f2db447c42da4db3b (diff)
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Remove warning about 64-bit code on processor
that doesn't support it. Per Chris. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47162 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/Target/PowerPC/PPCSubtarget.cpp4
-rw-r--r--lib/Target/X86/X86Subtarget.cpp6
2 files changed, 0 insertions, 10 deletions
diff --git a/lib/Target/PowerPC/PPCSubtarget.cpp b/lib/Target/PowerPC/PPCSubtarget.cpp
index 030dc7a..10373cb 100644
--- a/lib/Target/PowerPC/PPCSubtarget.cpp
+++ b/lib/Target/PowerPC/PPCSubtarget.cpp
@@ -83,8 +83,6 @@ PPCSubtarget::PPCSubtarget(const TargetMachine &tm, const Module &M,
// If we are generating code for ppc64, verify that options make sense.
if (is64Bit) {
if (!has64BitSupport()) {
- cerr << "PPC: Generation of 64-bit code for a 32-bit processor "
- << "requested. Ignoring 32-bit processor feature.\n";
Has64BitSupport = true;
}
// Silently force 64-bit register use on ppc64.
@@ -94,8 +92,6 @@ PPCSubtarget::PPCSubtarget(const TargetMachine &tm, const Module &M,
// If the user requested use of 64-bit regs, but the cpu selected doesn't
// support it, warn and ignore.
if (use64BitRegs() && !has64BitSupport()) {
- cerr << "PPC: 64-bit registers requested on CPU without support. "
- << "Disabling 64-bit register use.\n";
Use64BitRegs = false;
}
diff --git a/lib/Target/X86/X86Subtarget.cpp b/lib/Target/X86/X86Subtarget.cpp
index abd756c..fb46cfc 100644
--- a/lib/Target/X86/X86Subtarget.cpp
+++ b/lib/Target/X86/X86Subtarget.cpp
@@ -235,12 +235,6 @@ X86Subtarget::X86Subtarget(const Module &M, const std::string &FS, bool is64Bit)
// If feature string is not empty, parse features string.
std::string CPU = GetCurrentX86CPU();
ParseSubtargetFeatures(FS, CPU);
-
- if (Is64Bit && !HasX86_64)
- cerr << "Warning: Generation of 64-bit code for a 32-bit processor "
- << "requested.\n";
- if (Is64Bit && X86SSELevel < SSE2)
- cerr << "Warning: 64-bit processors all have at least SSE2.\n";
} else {
// Otherwise, use CPUID to auto-detect feature set.
AutoDetectSubtargetFeatures();