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author | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-08 08:55:49 -0700 |
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committer | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-09 15:04:38 -0700 |
commit | 4c5e43da7792f75567b693105cc53e3f1992ad98 (patch) | |
tree | 1b2c9792582e12f5af0b1512e3094425f0dc0df9 /test/CodeGen/AArch64/arm64-code-model-large-abs.ll | |
parent | c75239e6119d0f9a74c57099d91cbc9bde56bf33 (diff) | |
download | external_llvm-4c5e43da7792f75567b693105cc53e3f1992ad98.zip external_llvm-4c5e43da7792f75567b693105cc53e3f1992ad98.tar.gz external_llvm-4c5e43da7792f75567b693105cc53e3f1992ad98.tar.bz2 |
Update aosp/master llvm for rebase to r233350
Change-Id: I07d935f8793ee8ec6b7da003f6483046594bca49
Diffstat (limited to 'test/CodeGen/AArch64/arm64-code-model-large-abs.ll')
-rw-r--r-- | test/CodeGen/AArch64/arm64-code-model-large-abs.ll | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/test/CodeGen/AArch64/arm64-code-model-large-abs.ll b/test/CodeGen/AArch64/arm64-code-model-large-abs.ll index 264da2d..9f50fea 100644 --- a/test/CodeGen/AArch64/arm64-code-model-large-abs.ll +++ b/test/CodeGen/AArch64/arm64-code-model-large-abs.ll @@ -18,7 +18,7 @@ define i8* @global_addr() { define i8 @global_i8() { ; CHECK-LABEL: global_i8: - %val = load i8* @var8 + %val = load i8, i8* @var8 ret i8 %val ; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g3:var8 ; CHECK: movk x[[ADDR_REG]], #:abs_g2_nc:var8 @@ -29,7 +29,7 @@ define i8 @global_i8() { define i16 @global_i16() { ; CHECK-LABEL: global_i16: - %val = load i16* @var16 + %val = load i16, i16* @var16 ret i16 %val ; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g3:var16 ; CHECK: movk x[[ADDR_REG]], #:abs_g2_nc:var16 @@ -40,7 +40,7 @@ define i16 @global_i16() { define i32 @global_i32() { ; CHECK-LABEL: global_i32: - %val = load i32* @var32 + %val = load i32, i32* @var32 ret i32 %val ; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g3:var32 ; CHECK: movk x[[ADDR_REG]], #:abs_g2_nc:var32 @@ -51,7 +51,7 @@ define i32 @global_i32() { define i64 @global_i64() { ; CHECK-LABEL: global_i64: - %val = load i64* @var64 + %val = load i64, i64* @var64 ret i64 %val ; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g3:var64 ; CHECK: movk x[[ADDR_REG]], #:abs_g2_nc:var64 |