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authorStephen Hines <srhines@google.com>2014-05-29 02:49:00 -0700
committerStephen Hines <srhines@google.com>2014-05-29 02:49:00 -0700
commitdce4a407a24b04eebc6a376f8e62b41aaa7b071f (patch)
treedcebc53f2b182f145a2e659393bf9a0472cedf23 /test/CodeGen/AArch64/arm64-unaligned_ldst.ll
parent220b921aed042f9e520c26cffd8282a94c66c3d5 (diff)
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Update LLVM for 3.5 rebase (r209712).
Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
Diffstat (limited to 'test/CodeGen/AArch64/arm64-unaligned_ldst.ll')
-rw-r--r--test/CodeGen/AArch64/arm64-unaligned_ldst.ll41
1 files changed, 41 insertions, 0 deletions
diff --git a/test/CodeGen/AArch64/arm64-unaligned_ldst.ll b/test/CodeGen/AArch64/arm64-unaligned_ldst.ll
new file mode 100644
index 0000000..20b80c0
--- /dev/null
+++ b/test/CodeGen/AArch64/arm64-unaligned_ldst.ll
@@ -0,0 +1,41 @@
+; RUN: llc < %s -march=arm64 | FileCheck %s
+; rdar://r11231896
+
+define void @t1(i8* nocapture %a, i8* nocapture %b) nounwind {
+entry:
+; CHECK-LABEL: t1:
+; CHECK-NOT: orr
+; CHECK: ldr [[X0:x[0-9]+]], [x1]
+; CHECK: str [[X0]], [x0]
+ %tmp1 = bitcast i8* %b to i64*
+ %tmp2 = bitcast i8* %a to i64*
+ %tmp3 = load i64* %tmp1, align 1
+ store i64 %tmp3, i64* %tmp2, align 1
+ ret void
+}
+
+define void @t2(i8* nocapture %a, i8* nocapture %b) nounwind {
+entry:
+; CHECK-LABEL: t2:
+; CHECK-NOT: orr
+; CHECK: ldr [[W0:w[0-9]+]], [x1]
+; CHECK: str [[W0]], [x0]
+ %tmp1 = bitcast i8* %b to i32*
+ %tmp2 = bitcast i8* %a to i32*
+ %tmp3 = load i32* %tmp1, align 1
+ store i32 %tmp3, i32* %tmp2, align 1
+ ret void
+}
+
+define void @t3(i8* nocapture %a, i8* nocapture %b) nounwind {
+entry:
+; CHECK-LABEL: t3:
+; CHECK-NOT: orr
+; CHECK: ldrh [[W0:w[0-9]+]], [x1]
+; CHECK: strh [[W0]], [x0]
+ %tmp1 = bitcast i8* %b to i16*
+ %tmp2 = bitcast i8* %a to i16*
+ %tmp3 = load i16* %tmp1, align 1
+ store i16 %tmp3, i16* %tmp2, align 1
+ ret void
+}