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author | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-08 08:55:49 -0700 |
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committer | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-09 15:04:38 -0700 |
commit | 4c5e43da7792f75567b693105cc53e3f1992ad98 (patch) | |
tree | 1b2c9792582e12f5af0b1512e3094425f0dc0df9 /test/CodeGen/AArch64/fp16-vector-load-store.ll | |
parent | c75239e6119d0f9a74c57099d91cbc9bde56bf33 (diff) | |
download | external_llvm-4c5e43da7792f75567b693105cc53e3f1992ad98.zip external_llvm-4c5e43da7792f75567b693105cc53e3f1992ad98.tar.gz external_llvm-4c5e43da7792f75567b693105cc53e3f1992ad98.tar.bz2 |
Update aosp/master llvm for rebase to r233350
Change-Id: I07d935f8793ee8ec6b7da003f6483046594bca49
Diffstat (limited to 'test/CodeGen/AArch64/fp16-vector-load-store.ll')
-rw-r--r-- | test/CodeGen/AArch64/fp16-vector-load-store.ll | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/test/CodeGen/AArch64/fp16-vector-load-store.ll b/test/CodeGen/AArch64/fp16-vector-load-store.ll index edbbffe..b71b39f 100644 --- a/test/CodeGen/AArch64/fp16-vector-load-store.ll +++ b/test/CodeGen/AArch64/fp16-vector-load-store.ll @@ -5,7 +5,7 @@ define <4 x half> @load_64(<4 x half>* nocapture readonly %a) #0 { ; CHECK-LABEL: load_64: ; CHECK: ldr d0, [x0] entry: - %0 = load <4 x half>* %a, align 8 + %0 = load <4 x half>, <4 x half>* %a, align 8 ret <4 x half> %0 } @@ -14,7 +14,7 @@ define <8 x half> @load_128(<8 x half>* nocapture readonly %a) #0 { ; CHECK-LABEL: load_128: ; CHECK: ldr q0, [x0] entry: - %0 = load <8 x half>* %a, align 16 + %0 = load <8 x half>, <8 x half>* %a, align 16 ret <8 x half> %0 } @@ -23,7 +23,7 @@ define <4 x half> @load_dup_64(half* nocapture readonly %a) #0 { ; CHECK-LABEL: load_dup_64: ; CHECK: ld1r { v0.4h }, [x0] entry: - %0 = load half* %a, align 2 + %0 = load half, half* %a, align 2 %1 = insertelement <4 x half> undef, half %0, i32 0 %2 = shufflevector <4 x half> %1, <4 x half> undef, <4 x i32> zeroinitializer ret <4 x half> %2 @@ -34,7 +34,7 @@ define <8 x half> @load_dup_128(half* nocapture readonly %a) #0 { ; CHECK-LABEL: load_dup_128: ; CHECK: ld1r { v0.8h }, [x0] entry: - %0 = load half* %a, align 2 + %0 = load half, half* %a, align 2 %1 = insertelement <8 x half> undef, half %0, i32 0 %2 = shufflevector <8 x half> %1, <8 x half> undef, <8 x i32> zeroinitializer ret <8 x half> %2 @@ -45,7 +45,7 @@ define <4 x half> @load_lane_64(half* nocapture readonly %a, <4 x half> %b) #0 { ; CHECK-LABEL: load_lane_64: ; CHECK: ld1 { v0.h }[2], [x0] entry: - %0 = load half* %a, align 2 + %0 = load half, half* %a, align 2 %1 = insertelement <4 x half> %b, half %0, i32 2 ret <4 x half> %1 } @@ -55,7 +55,7 @@ define <8 x half> @load_lane_128(half* nocapture readonly %a, <8 x half> %b) #0 ; CHECK-LABEL: load_lane_128: ; CHECK: ld1 { v0.h }[5], [x0] entry: - %0 = load half* %a, align 2 + %0 = load half, half* %a, align 2 %1 = insertelement <8 x half> %b, half %0, i32 5 ret <8 x half> %1 } |