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| author | Daniel Sanders <daniel.sanders@imgtec.com> | 2013-09-27 09:44:59 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2013-09-27 09:44:59 +0000 |
| commit | d2a31a124f3bebbdfc4d886afe33a116893aa689 (patch) | |
| tree | bbd8d58882f6abe3f91d091ff6e5a409bf4f939a /test/CodeGen/Mips/msa | |
| parent | 86f309b4d1426b54f23d6ba53d3f5c8a1aa3985b (diff) | |
| download | external_llvm-d2a31a124f3bebbdfc4d886afe33a116893aa689.zip external_llvm-d2a31a124f3bebbdfc4d886afe33a116893aa689.tar.gz external_llvm-d2a31a124f3bebbdfc4d886afe33a116893aa689.tar.bz2 | |
[mips][msa] Expand all truncstores and loadexts for MSA as well as DSP
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191496 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Mips/msa')
| -rw-r--r-- | test/CodeGen/Mips/msa/basic_operations.ll | 11 | ||||
| -rw-r--r-- | test/CodeGen/Mips/msa/llvm-stress-sz1-s742806235.ll | 21 |
2 files changed, 32 insertions, 0 deletions
diff --git a/test/CodeGen/Mips/msa/basic_operations.ll b/test/CodeGen/Mips/msa/basic_operations.ll index c626b28..b0de05d 100644 --- a/test/CodeGen/Mips/msa/basic_operations.ll +++ b/test/CodeGen/Mips/msa/basic_operations.ll @@ -1,5 +1,6 @@ ; RUN: llc -march=mips -mattr=+msa < %s | FileCheck -check-prefix=MIPS32 %s +@v4i8 = global <4 x i8> <i8 0, i8 0, i8 0, i8 0> @v16i8 = global <16 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0> @v8i16 = global <8 x i16> <i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0> @v4i32 = global <4 x i32> <i32 0, i32 0, i32 0, i32 0> @@ -454,3 +455,13 @@ define void @insert_v2i64(i64 %a) nounwind { ret void ; MIPS32: .size insert_v2i64 } + +define void @truncstore() nounwind { + ; MIPS32: truncstore: + + store volatile <4 x i8> <i8 -1, i8 -1, i8 -1, i8 -1>, <4 x i8>*@v4i8 + ; TODO: What code should be emitted? + + ret void + ; MIPS32: .size truncstore +} diff --git a/test/CodeGen/Mips/msa/llvm-stress-sz1-s742806235.ll b/test/CodeGen/Mips/msa/llvm-stress-sz1-s742806235.ll new file mode 100644 index 0000000..9eb4ff4 --- /dev/null +++ b/test/CodeGen/Mips/msa/llvm-stress-sz1-s742806235.ll @@ -0,0 +1,21 @@ +; RUN: llc -march=mips < %s +; RUN: llc -march=mips -mattr=+MSA < %s + +; This test originally failed to select code for a truncstore of a +; build_vector. +; It should at least successfully build. + +define void @autogen_SD742806235(i8*, i32*, i64*, i32, i64, i8) { +BB: + %A4 = alloca double + %A3 = alloca double + %A2 = alloca <8 x i8> + %A1 = alloca <4 x float> + %A = alloca i1 + store i8 %5, i8* %0 + store i8 %5, i8* %0 + store i8 %5, i8* %0 + store <8 x i8> <i8 0, i8 -1, i8 0, i8 -1, i8 0, i8 -1, i8 0, i8 -1>, <8 x i8>* %A2 + store i8 %5, i8* %0 + ret void +} |