aboutsummaryrefslogtreecommitdiffstats
path: root/test/CodeGen/PowerPC/stack-realign.ll
diff options
context:
space:
mode:
authorHal Finkel <hfinkel@anl.gov>2013-07-17 23:50:51 +0000
committerHal Finkel <hfinkel@anl.gov>2013-07-17 23:50:51 +0000
commit0541722de4beb2e53058dbf4ed1ebf0d96ddd6cb (patch)
tree0cd62c02de5584198c6fa57d8b5be01ef3dcaf49 /test/CodeGen/PowerPC/stack-realign.ll
parent36ee010b9d2ab6250d9c23d311510fcdcad646c3 (diff)
downloadexternal_llvm-0541722de4beb2e53058dbf4ed1ebf0d96ddd6cb.zip
external_llvm-0541722de4beb2e53058dbf4ed1ebf0d96ddd6cb.tar.gz
external_llvm-0541722de4beb2e53058dbf4ed1ebf0d96ddd6cb.tar.bz2
PPC: Add base-pointer support to builtin setjmp/longjmp
First, this changes the base-pointer implementation to remove an unnecessary complication (and one that is incompatible with how builtin SjLj is implemented): instead of using r31 as the base pointer when it is not needed as a frame pointer, now the base pointer will always be r30 when needed. Second, we introduce another pseudo register, BP, which is used just like the FP pseudo register to refer to the base register before we know for certain what register it will be. Third, we now save BP into the jmp_buf, and restore r30 from that slot in longjmp. If the function that called setjmp did not use a base pointer, then r30 will be overwritten by the setjmp-calling-function's restore code. FP restoration (which is restored into r31) works the same way. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186545 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC/stack-realign.ll')
-rw-r--r--test/CodeGen/PowerPC/stack-realign.ll22
1 files changed, 11 insertions, 11 deletions
diff --git a/test/CodeGen/PowerPC/stack-realign.ll b/test/CodeGen/PowerPC/stack-realign.ll
index 7bd28f6..f7b6d19 100644
--- a/test/CodeGen/PowerPC/stack-realign.ll
+++ b/test/CodeGen/PowerPC/stack-realign.ll
@@ -26,20 +26,20 @@ entry:
; CHECK-DAG: mflr 0
; CHECK-DAG: rldicl [[REG:[0-9]+]], 1, 0, 59
-; CHECK-DAG: std 31, -8(1)
-; CHECK-DAG: mr 31, 1
+; CHECK-DAG: std 30, -16(1)
+; CHECK-DAG: mr 30, 1
; CHECK-DAG: std 0, 16(1)
; CHECK-DAG: subfic 0, [[REG]], -160
; CHECK: stdux 1, 1, 0
-; CHECK: .cfi_offset r31, -8
+; CHECK: .cfi_offset r30, -16
; CHECK: .cfi_offset lr, 16
-; CHECK: std 3, 48(31)
+; CHECK: std 3, 48(30)
; CHECK: ld 1, 0(1)
; CHECK-DAG: ld 0, 16(1)
-; CHECK-DAG: ld 31, -8(1)
+; CHECK-DAG: ld 30, -16(1)
; CHECK-DAG: mtlr 0
; CHECK: blr
@@ -91,8 +91,8 @@ entry:
; CHECK-DAG: rldicl [[REG3:[0-9]+]], 1, 0, 59
; CHECK-DAG: mflr 0
; CHECK-DAG: ori [[REG2:[0-9]+]], [[REG1]], 51808
-; CHECK-DAG: std 31, -8(1)
-; CHECK-DAG: mr 31, 1
+; CHECK-DAG: std 30, -16(1)
+; CHECK-DAG: mr 30, 1
; CHECK-DAG: std 0, 16(1)
; CHECK-DAG: subfc 0, [[REG3]], [[REG2]]
; CHECK: stdux 1, 1, 0
@@ -121,13 +121,13 @@ entry:
; CHECK-DAG: mflr 0
; CHECK-DAG: rldicl [[REG:[0-9]+]], 1, 0, 59
-; CHECK-DAG: std 31, -24(1)
-; CHECK-DAG: mr 31, 1
+; CHECK-DAG: std 30, -32(1)
+; CHECK-DAG: mr 30, 1
; CHECK-DAG: std 0, 16(1)
-; CHECK-DAG: subfic 0, [[REG]], -160
+; CHECK-DAG: subfic 0, [[REG]], -192
; CHECK: stdux 1, 1, 0
-; CHECK: stfd 30, -16(31)
+; CHECK: stfd 30, -16(30)
; CHECK: blr