aboutsummaryrefslogtreecommitdiffstats
path: root/test/CodeGen/PowerPC/vec_cmp.ll
diff options
context:
space:
mode:
authorStephen Lin <stephenwlin@gmail.com>2013-07-14 06:24:09 +0000
committerStephen Lin <stephenwlin@gmail.com>2013-07-14 06:24:09 +0000
commit8b2b8a18354546d534b72f912153a3252ab4b857 (patch)
tree9e745a19e157915db1f88e171514f4d22041c62a /test/CodeGen/PowerPC/vec_cmp.ll
parent6611eaa32f7941dd50a3ffe608f3f4a7665dbe91 (diff)
downloadexternal_llvm-8b2b8a18354546d534b72f912153a3252ab4b857.zip
external_llvm-8b2b8a18354546d534b72f912153a3252ab4b857.tar.gz
external_llvm-8b2b8a18354546d534b72f912153a3252ab4b857.tar.bz2
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally.
This update was done with the following bash script: find test/CodeGen -name "*.ll" | \ while read NAME; do echo "$NAME" if ! grep -q "^; *RUN: *llc.*debug" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \ while read FUNC; do sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP done sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP mv $TEMP $NAME fi done git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186280 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC/vec_cmp.ll')
-rw-r--r--test/CodeGen/PowerPC/vec_cmp.ll100
1 files changed, 50 insertions, 50 deletions
diff --git a/test/CodeGen/PowerPC/vec_cmp.ll b/test/CodeGen/PowerPC/vec_cmp.ll
index eb41667..83e0e02 100644
--- a/test/CodeGen/PowerPC/vec_cmp.ll
+++ b/test/CodeGen/PowerPC/vec_cmp.ll
@@ -14,7 +14,7 @@ define <2 x i8> @v2si8_cmp(<2 x i8> %x, <2 x i8> %y) nounwind readnone {
%sext = sext <2 x i1> %cmp to <2 x i8>
ret <2 x i8> %sext
}
-; CHECK: v2si8_cmp:
+; CHECK-LABEL: v2si8_cmp:
; CHECK: vcmpequb {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
@@ -23,7 +23,7 @@ define <4 x i8> @v4si8_cmp(<4 x i8> %x, <4 x i8> %y) nounwind readnone {
%sext = sext <4 x i1> %cmp to <4 x i8>
ret <4 x i8> %sext
}
-; CHECK: v4si8_cmp:
+; CHECK-LABEL: v4si8_cmp:
; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
@@ -32,7 +32,7 @@ define <8 x i8> @v8si8_cmp(<8 x i8> %x, <8 x i8> %y) nounwind readnone {
%sext = sext <8 x i1> %cmp to <8 x i8>
ret <8 x i8> %sext
}
-; CHECK: v8si8_cmp:
+; CHECK-LABEL: v8si8_cmp:
; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
@@ -43,7 +43,7 @@ define <16 x i8> @v16si8_cmp_eq(<16 x i8> %x, <16 x i8> %y) nounwind readnone {
%sext = sext <16 x i1> %cmp to <16 x i8>
ret <16 x i8> %sext
}
-; CHECK: v16si8_cmp_eq:
+; CHECK-LABEL: v16si8_cmp_eq:
; CHECK: vcmpequb 2, 2, 3
define <16 x i8> @v16si8_cmp_ne(<16 x i8> %x, <16 x i8> %y) nounwind readnone {
@@ -52,7 +52,7 @@ entry:
%sext = sext <16 x i1> %cmp to <16 x i8>
ret <16 x i8> %sext
}
-; CHECK: v16si8_cmp_ne:
+; CHECK-LABEL: v16si8_cmp_ne:
; CHECK: vcmpequb [[RET:[0-9]+]], 2, 3
; CHECK-NEXT: vnor 2, [[RET]], [[RET]]
@@ -62,7 +62,7 @@ entry:
%sext = sext <16 x i1> %cmp to <16 x i8>
ret <16 x i8> %sext
}
-; CHECK: v16si8_cmp_le:
+; CHECK-LABEL: v16si8_cmp_le:
; CHECK: vcmpequb [[RCMPEQ:[0-9]+]], 2, 3
; CHECK-NEXT: vcmpgtsb [[RCMPLE:[0-9]+]], 3, 2
; CHECK-NEXT: vor 2, [[RCMPLE]], [[RCMPEQ]]
@@ -73,7 +73,7 @@ entry:
%sext = sext <16 x i1> %cmp to <16 x i8>
ret <16 x i8> %sext
}
-; CHECK: v16ui8_cmp_le:
+; CHECK-LABEL: v16ui8_cmp_le:
; CHECK: vcmpequb [[RCMPEQ:[0-9]+]], 2, 3
; CHECK-NEXT: vcmpgtub [[RCMPLE:[0-9]+]], 3, 2
; CHECK-NEXT: vor 2, [[RCMPLE]], [[RCMPEQ]]
@@ -84,7 +84,7 @@ entry:
%sext = sext <16 x i1> %cmp to <16 x i8>
ret <16 x i8> %sext
}
-; CHECK: v16si8_cmp_lt:
+; CHECK-LABEL: v16si8_cmp_lt:
; CHECK: vcmpgtsb 2, 3, 2
define <16 x i8> @v16ui8_cmp_lt(<16 x i8> %x, <16 x i8> %y) nounwind readnone {
@@ -93,7 +93,7 @@ entry:
%sext = sext <16 x i1> %cmp to <16 x i8>
ret <16 x i8> %sext
}
-; CHECK: v16ui8_cmp_lt:
+; CHECK-LABEL: v16ui8_cmp_lt:
; CHECK: vcmpgtub 2, 3, 2
define <16 x i8> @v16si8_cmp_gt(<16 x i8> %x, <16 x i8> %y) nounwind readnone {
@@ -102,7 +102,7 @@ entry:
%sext = sext <16 x i1> %cmp to <16 x i8>
ret <16 x i8> %sext
}
-; CHECK: v16si8_cmp_gt:
+; CHECK-LABEL: v16si8_cmp_gt:
; CHECK: vcmpgtsb 2, 2, 3
define <16 x i8> @v16ui8_cmp_gt(<16 x i8> %x, <16 x i8> %y) nounwind readnone {
@@ -111,7 +111,7 @@ entry:
%sext = sext <16 x i1> %cmp to <16 x i8>
ret <16 x i8> %sext
}
-; CHECK: v16ui8_cmp_gt:
+; CHECK-LABEL: v16ui8_cmp_gt:
; CHECK: vcmpgtub 2, 2, 3
define <16 x i8> @v16si8_cmp_ge(<16 x i8> %x, <16 x i8> %y) nounwind readnone {
@@ -120,7 +120,7 @@ entry:
%sext = sext <16 x i1> %cmp to <16 x i8>
ret <16 x i8> %sext
}
-; CHECK: v16si8_cmp_ge:
+; CHECK-LABEL: v16si8_cmp_ge:
; CHECK: vcmpequb [[RCMPEQ:[0-9]+]], 2, 3
; CHECK-NEXT: vcmpgtsb [[RCMPGT:[0-9]+]], 2, 3
; CHECK-NEXT: vor 2, [[RCMPGT]], [[RCMPEQ]]
@@ -131,7 +131,7 @@ entry:
%sext = sext <16 x i1> %cmp to <16 x i8>
ret <16 x i8> %sext
}
-; CHECK: v16ui8_cmp_ge:
+; CHECK-LABEL: v16ui8_cmp_ge:
; CHECK: vcmpequb [[RCMPEQ:[0-9]+]], 2, 3
; CHECK-NEXT: vcmpgtub [[RCMPGT:[0-9]+]], 2, 3
; CHECK-NEXT: vor 2, [[RCMPGT]], [[RCMPEQ]]
@@ -142,7 +142,7 @@ define <32 x i8> @v32si8_cmp(<32 x i8> %x, <32 x i8> %y) nounwind readnone {
%sext = sext <32 x i1> %cmp to <32 x i8>
ret <32 x i8> %sext
}
-; CHECK: v32si8_cmp:
+; CHECK-LABEL: v32si8_cmp:
; CHECK: vcmpequb {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
; CHECK: vcmpequb {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
@@ -152,7 +152,7 @@ define <2 x i16> @v2si16_cmp(<2 x i16> %x, <2 x i16> %y) nounwind readnone {
%sext = sext <2 x i1> %cmp to <2 x i16>
ret <2 x i16> %sext
}
-; CHECK: v2si16_cmp:
+; CHECK-LABEL: v2si16_cmp:
; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
@@ -161,7 +161,7 @@ define <4 x i16> @v4si16_cmp(<4 x i16> %x, <4 x i16> %y) nounwind readnone {
%sext = sext <4 x i1> %cmp to <4 x i16>
ret <4 x i16> %sext
}
-; CHECK: v4si16_cmp:
+; CHECK-LABEL: v4si16_cmp:
; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
@@ -173,7 +173,7 @@ entry:
%sext = sext <8 x i1> %cmp to <8 x i16>
ret <8 x i16> %sext
}
-; CHECK: v8si16_cmp_eq:
+; CHECK-LABEL: v8si16_cmp_eq:
; CHECK: vcmpequh 2, 2, 3
define <8 x i16> @v8si16_cmp_ne(<8 x i16> %x, <8 x i16> %y) nounwind readnone {
@@ -182,7 +182,7 @@ entry:
%sext = sext <8 x i1> %cmp to <8 x i16>
ret <8 x i16> %sext
}
-; CHECK: v8si16_cmp_ne:
+; CHECK-LABEL: v8si16_cmp_ne:
; CHECK: vcmpequh [[RET:[0-9]+]], 2, 3
; CHECK-NEXT: vnor 2, [[RET]], [[RET]]
@@ -192,7 +192,7 @@ entry:
%sext = sext <8 x i1> %cmp to <8 x i16>
ret <8 x i16> %sext
}
-; CHECK: v8si16_cmp_le:
+; CHECK-LABEL: v8si16_cmp_le:
; CHECK: vcmpequh [[RCMPEQ:[0-9]+]], 2, 3
; CHECK-NEXT: vcmpgtsh [[RCMPLE:[0-9]+]], 3, 2
; CHECK-NEXT: vor 2, [[RCMPLE]], [[RCMPEQ]]
@@ -203,7 +203,7 @@ entry:
%sext = sext <8 x i1> %cmp to <8 x i16>
ret <8 x i16> %sext
}
-; CHECK: v8ui16_cmp_le:
+; CHECK-LABEL: v8ui16_cmp_le:
; CHECK: vcmpequh [[RCMPEQ:[0-9]+]], 2, 3
; CHECK-NEXT: vcmpgtuh [[RCMPLE:[0-9]+]], 3, 2
; CHECK-NEXT: vor 2, [[RCMPLE]], [[RCMPEQ]]
@@ -214,7 +214,7 @@ entry:
%sext = sext <8 x i1> %cmp to <8 x i16>
ret <8 x i16> %sext
}
-; CHECK: v8si16_cmp_lt:
+; CHECK-LABEL: v8si16_cmp_lt:
; CHECK: vcmpgtsh 2, 3, 2
define <8 x i16> @v8ui16_cmp_lt(<8 x i16> %x, <8 x i16> %y) nounwind readnone {
@@ -223,7 +223,7 @@ entry:
%sext = sext <8 x i1> %cmp to <8 x i16>
ret <8 x i16> %sext
}
-; CHECK: v8ui16_cmp_lt:
+; CHECK-LABEL: v8ui16_cmp_lt:
; CHECK: vcmpgtuh 2, 3, 2
define <8 x i16> @v8si16_cmp_gt(<8 x i16> %x, <8 x i16> %y) nounwind readnone {
@@ -232,7 +232,7 @@ entry:
%sext = sext <8 x i1> %cmp to <8 x i16>
ret <8 x i16> %sext
}
-; CHECK: v8si16_cmp_gt:
+; CHECK-LABEL: v8si16_cmp_gt:
; CHECK: vcmpgtsh 2, 2, 3
define <8 x i16> @v8ui16_cmp_gt(<8 x i16> %x, <8 x i16> %y) nounwind readnone {
@@ -241,7 +241,7 @@ entry:
%sext = sext <8 x i1> %cmp to <8 x i16>
ret <8 x i16> %sext
}
-; CHECK: v8ui16_cmp_gt:
+; CHECK-LABEL: v8ui16_cmp_gt:
; CHECK: vcmpgtuh 2, 2, 3
define <8 x i16> @v8si16_cmp_ge(<8 x i16> %x, <8 x i16> %y) nounwind readnone {
@@ -250,7 +250,7 @@ entry:
%sext = sext <8 x i1> %cmp to <8 x i16>
ret <8 x i16> %sext
}
-; CHECK: v8si16_cmp_ge:
+; CHECK-LABEL: v8si16_cmp_ge:
; CHECK: vcmpequh [[RCMPEQ:[0-9]+]], 2, 3
; CHECK-NEXT: vcmpgtsh [[RCMPGT:[0-9]+]], 2, 3
; CHECK-NEXT: vor 2, [[RCMPGT]], [[RCMPEQ]]
@@ -261,7 +261,7 @@ entry:
%sext = sext <8 x i1> %cmp to <8 x i16>
ret <8 x i16> %sext
}
-; CHECK: v8ui16_cmp_ge:
+; CHECK-LABEL: v8ui16_cmp_ge:
; CHECK: vcmpequh [[RCMPEQ:[0-9]+]], 2, 3
; CHECK-NEXT: vcmpgtuh [[RCMPGT:[0-9]+]], 2, 3
; CHECK-NEXT: vor 2, [[RCMPGT]], [[RCMPEQ]]
@@ -272,7 +272,7 @@ define <16 x i16> @v16si16_cmp(<16 x i16> %x, <16 x i16> %y) nounwind readnone {
%sext = sext <16 x i1> %cmp to <16 x i16>
ret <16 x i16> %sext
}
-; CHECK: v16si16_cmp:
+; CHECK-LABEL: v16si16_cmp:
; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
@@ -282,7 +282,7 @@ define <32 x i16> @v32si16_cmp(<32 x i16> %x, <32 x i16> %y) nounwind readnone {
%sext = sext <32 x i1> %cmp to <32 x i16>
ret <32 x i16> %sext
}
-; CHECK: v32si16_cmp:
+; CHECK-LABEL: v32si16_cmp:
; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
@@ -294,7 +294,7 @@ define <2 x i32> @v2si32_cmp(<2 x i32> %x, <2 x i32> %y) nounwind readnone {
%sext = sext <2 x i1> %cmp to <2 x i32>
ret <2 x i32> %sext
}
-; CHECK: v2si32_cmp:
+; CHECK-LABEL: v2si32_cmp:
; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
@@ -306,7 +306,7 @@ entry:
%sext = sext <4 x i1> %cmp to <4 x i32>
ret <4 x i32> %sext
}
-; CHECK: v4si32_cmp_eq:
+; CHECK-LABEL: v4si32_cmp_eq:
; CHECK: vcmpequw 2, 2, 3
define <4 x i32> @v4si32_cmp_ne(<4 x i32> %x, <4 x i32> %y) nounwind readnone {
@@ -315,7 +315,7 @@ entry:
%sext = sext <4 x i1> %cmp to <4 x i32>
ret <4 x i32> %sext
}
-; CHECK: v4si32_cmp_ne:
+; CHECK-LABEL: v4si32_cmp_ne:
; CHECK: vcmpequw [[RCMP:[0-9]+]], 2, 3
; CHECK-NEXT: vnor 2, [[RCMP]], [[RCMP]]
@@ -325,7 +325,7 @@ entry:
%sext = sext <4 x i1> %cmp to <4 x i32>
ret <4 x i32> %sext
}
-; CHECK: v4si32_cmp_le:
+; CHECK-LABEL: v4si32_cmp_le:
; CHECK: vcmpequw [[RCMPEQ:[0-9]+]], 2, 3
; CHECK-NEXT: vcmpgtsw [[RCMPLE:[0-9]+]], 3, 2
; CHECK-NEXT: vor 2, [[RCMPLE]], [[RCMPEQ]]
@@ -336,7 +336,7 @@ entry:
%sext = sext <4 x i1> %cmp to <4 x i32>
ret <4 x i32> %sext
}
-; CHECK: v4ui32_cmp_le:
+; CHECK-LABEL: v4ui32_cmp_le:
; CHECK: vcmpequw [[RCMPEQ:[0-9]+]], 2, 3
; CHECK-NEXT: vcmpgtuw [[RCMPLE:[0-9]+]], 3, 2
; CHECK-NEXT: vor 2, [[RCMPLE]], [[RCMPEQ]]
@@ -347,7 +347,7 @@ entry:
%sext = sext <4 x i1> %cmp to <4 x i32>
ret <4 x i32> %sext
}
-; CHECK: v4si32_cmp_lt:
+; CHECK-LABEL: v4si32_cmp_lt:
; CHECK: vcmpgtsw 2, 3, 2
define <4 x i32> @v4ui32_cmp_lt(<4 x i32> %x, <4 x i32> %y) nounwind readnone {
@@ -356,7 +356,7 @@ entry:
%sext = sext <4 x i1> %cmp to <4 x i32>
ret <4 x i32> %sext
}
-; CHECK: v4ui32_cmp_lt:
+; CHECK-LABEL: v4ui32_cmp_lt:
; CHECK: vcmpgtuw 2, 3, 2
define <4 x i32> @v4si32_cmp_gt(<4 x i32> %x, <4 x i32> %y) nounwind readnone {
@@ -365,7 +365,7 @@ entry:
%sext = sext <4 x i1> %cmp to <4 x i32>
ret <4 x i32> %sext
}
-; CHECK: v4si32_cmp_gt:
+; CHECK-LABEL: v4si32_cmp_gt:
; CHECK: vcmpgtsw 2, 2, 3
define <4 x i32> @v4ui32_cmp_gt(<4 x i32> %x, <4 x i32> %y) nounwind readnone {
@@ -374,7 +374,7 @@ entry:
%sext = sext <4 x i1> %cmp to <4 x i32>
ret <4 x i32> %sext
}
-; CHECK: v4ui32_cmp_gt:
+; CHECK-LABEL: v4ui32_cmp_gt:
; CHECK: vcmpgtuw 2, 2, 3
define <4 x i32> @v4si32_cmp_ge(<4 x i32> %x, <4 x i32> %y) nounwind readnone {
@@ -383,7 +383,7 @@ entry:
%sext = sext <4 x i1> %cmp to <4 x i32>
ret <4 x i32> %sext
}
-; CHECK: v4si32_cmp_ge:
+; CHECK-LABEL: v4si32_cmp_ge:
; CHECK: vcmpequw [[RCMPEQ:[0-9]+]], 2, 3
; CHECK-NEXT: vcmpgtsw [[RCMPGT:[0-9]+]], 2, 3
; CHECK-NEXT: vor 2, [[RCMPGT]], [[RCMPEQ]]
@@ -394,7 +394,7 @@ entry:
%sext = sext <4 x i1> %cmp to <4 x i32>
ret <4 x i32> %sext
}
-; CHECK: v4ui32_cmp_ge:
+; CHECK-LABEL: v4ui32_cmp_ge:
; CHECK: vcmpequw [[RCMPEQ:[0-9]+]], 2, 3
; CHECK-NEXT: vcmpgtuw [[RCMPGT:[0-9]+]], 2, 3
; CHECK-NEXT: vor 2, [[RCMPGT]], [[RCMPEQ]]
@@ -405,7 +405,7 @@ define <8 x i32> @v8si32_cmp(<8 x i32> %x, <8 x i32> %y) nounwind readnone {
%sext = sext <8 x i1> %cmp to <8 x i32>
ret <8 x i32> %sext
}
-; CHECK: v8si32_cmp:
+; CHECK-LABEL: v8si32_cmp:
; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
@@ -415,7 +415,7 @@ define <16 x i32> @v16si32_cmp(<16 x i32> %x, <16 x i32> %y) nounwind readnone {
%sext = sext <16 x i1> %cmp to <16 x i32>
ret <16 x i32> %sext
}
-; CHECK: v16si32_cmp:
+; CHECK-LABEL: v16si32_cmp:
; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
@@ -427,7 +427,7 @@ define <32 x i32> @v32si32_cmp(<32 x i32> %x, <32 x i32> %y) nounwind readnone {
%sext = sext <32 x i1> %cmp to <32 x i32>
ret <32 x i32> %sext
}
-; CHECK: v32si32_cmp:
+; CHECK-LABEL: v32si32_cmp:
; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
@@ -445,7 +445,7 @@ entry:
%0 = bitcast <2 x i32> %sext to <2 x float>
ret <2 x float> %0
}
-; CHECK: v2f32_cmp:
+; CHECK-LABEL: v2f32_cmp:
; CHECK: vcmpeqfp {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
@@ -458,7 +458,7 @@ entry:
%0 = bitcast <4 x i32> %sext to <4 x float>
ret <4 x float> %0
}
-; CHECK: v4f32_cmp_eq:
+; CHECK-LABEL: v4f32_cmp_eq:
; CHECK: vcmpeqfp 2, 2, 3
define <4 x float> @v4f32_cmp_ne(<4 x float> %x, <4 x float> %y) nounwind readnone {
@@ -468,7 +468,7 @@ entry:
%0 = bitcast <4 x i32> %sext to <4 x float>
ret <4 x float> %0
}
-; CHECK: v4f32_cmp_ne:
+; CHECK-LABEL: v4f32_cmp_ne:
; CHECK: vcmpeqfp [[RET:[0-9]+]], 2, 3
; CHECK-NEXT: vnor 2, [[RET]], [[RET]]
@@ -479,7 +479,7 @@ entry:
%0 = bitcast <4 x i32> %sext to <4 x float>
ret <4 x float> %0
}
-; CHECK: v4f32_cmp_le:
+; CHECK-LABEL: v4f32_cmp_le:
; CHECK: vcmpeqfp [[RCMPEQ:[0-9]+]], 2, 3
; CHECK-NEXT: vcmpgtfp [[RCMPLE:[0-9]+]], 3, 2
; CHECK-NEXT: vor 2, [[RCMPLE]], [[RCMPEQ]]
@@ -491,7 +491,7 @@ entry:
%0 = bitcast <4 x i32> %sext to <4 x float>
ret <4 x float> %0
}
-; CHECK: v4f32_cmp_lt:
+; CHECK-LABEL: v4f32_cmp_lt:
; CHECK: vcmpgtfp 2, 3, 2
define <4 x float> @v4f32_cmp_ge(<4 x float> %x, <4 x float> %y) nounwind readnone {
@@ -501,7 +501,7 @@ entry:
%0 = bitcast <4 x i32> %sext to <4 x float>
ret <4 x float> %0
}
-; CHECK: v4f32_cmp_ge:
+; CHECK-LABEL: v4f32_cmp_ge:
; CHECK: vcmpgefp 2, 2, 3
define <4 x float> @v4f32_cmp_gt(<4 x float> %x, <4 x float> %y) nounwind readnone {
@@ -511,7 +511,7 @@ entry:
%0 = bitcast <4 x i32> %sext to <4 x float>
ret <4 x float> %0
}
-; CHECK: v4f32_cmp_gt:
+; CHECK-LABEL: v4f32_cmp_gt:
; CHECK: vcmpgtfp 2, 2, 3
@@ -522,6 +522,6 @@ entry:
%0 = bitcast <8 x i32> %sext to <8 x float>
ret <8 x float> %0
}
-; CHECK: v8f32_cmp:
+; CHECK-LABEL: v8f32_cmp:
; CHECK: vcmpeqfp {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
; CHECK: vcmpeqfp {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}