diff options
| author | Tom Stellard <thomas.stellard@amd.com> | 2013-08-16 01:12:11 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2013-08-16 01:12:11 +0000 |
| commit | 4c52d450dc3968267d1f089d36397fc785dcc7b4 (patch) | |
| tree | 0b5460e5776a4799c0d550e32dd5bbfef8a3aa15 /test/CodeGen/R600/store.ll | |
| parent | ec484277dd04399d7b2ea37508e39fc4998bc9a7 (diff) | |
| download | external_llvm-4c52d450dc3968267d1f089d36397fc785dcc7b4.zip external_llvm-4c52d450dc3968267d1f089d36397fc785dcc7b4.tar.gz external_llvm-4c52d450dc3968267d1f089d36397fc785dcc7b4.tar.bz2 | |
R600: Add support for global vector stores with elements less than 32-bits
Tested-by: Aaron Watry <awatry@gmail.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188520 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/R600/store.ll')
| -rw-r--r-- | test/CodeGen/R600/store.ll | 62 |
1 files changed, 62 insertions, 0 deletions
diff --git a/test/CodeGen/R600/store.ll b/test/CodeGen/R600/store.ll index cba01a3..f24de04 100644 --- a/test/CodeGen/R600/store.ll +++ b/test/CodeGen/R600/store.ll @@ -63,6 +63,49 @@ entry: ret void } +; EG-CHECK: @store_v2i8 +; EG-CHECK: MEM_RAT MSKOR +; EG-CHECK-NOT: MEM_RAT MSKOR +; SI-CHECK: @store_v2i8 +; SI-CHECK: BUFFER_STORE_BYTE +; SI-CHECK: BUFFER_STORE_BYTE +define void @store_v2i8(<2 x i8> addrspace(1)* %out, <2 x i32> %in) { +entry: + %0 = trunc <2 x i32> %in to <2 x i8> + store <2 x i8> %0, <2 x i8> addrspace(1)* %out + ret void +} + + +; EG-CHECK: @store_v2i16 +; EG-CHECK: MEM_RAT_CACHELESS STORE_RAW +; CM-CHECK: @store_v2i16 +; CM-CHECK: MEM_RAT_CACHELESS STORE_DWORD +; SI-CHECK: @store_v2i16 +; SI-CHECK: BUFFER_STORE_DWORD +define void @store_v2i16(<2 x i16> addrspace(1)* %out, <2 x i32> %in) { +entry: + %0 = trunc <2 x i32> %in to <2 x i16> + store <2 x i16> %0, <2 x i16> addrspace(1)* %out + ret void +} + +; EG-CHECK: @store_v4i8 +; EG-CHECK: MEM_RAT_CACHELESS STORE_RAW +; CM-CHECK: @store_v4i8 +; CM-CHECK: MEM_RAT_CACHELESS STORE_DWORD +; SI-CHECK: @store_v4i8 +; SI-CHECK: BUFFER_STORE_BYTE +; SI-CHECK: BUFFER_STORE_BYTE +; SI-CHECK: BUFFER_STORE_BYTE +; SI-CHECK: BUFFER_STORE_BYTE +define void @store_v4i8(<4 x i8> addrspace(1)* %out, <4 x i32> %in) { +entry: + %0 = trunc <4 x i32> %in to <4 x i8> + store <4 x i8> %0, <4 x i8> addrspace(1)* %out + ret void +} + ; floating-point store ; EG-CHECK: @store_f32 ; EG-CHECK: MEM_RAT_CACHELESS STORE_RAW T{{[0-9]+\.X, T[0-9]+\.X}}, 1 @@ -76,6 +119,25 @@ define void @store_f32(float addrspace(1)* %out, float %in) { ret void } +; EG-CHECK: @store_v4i16 +; EG-CHECK: MEM_RAT MSKOR +; EG-CHECK: MEM_RAT MSKOR +; EG-CHECK: MEM_RAT MSKOR +; EG-CHECK: MEM_RAT MSKOR +; EG-CHECK-NOT: MEM_RAT MSKOR +; SI-CHECK: @store_v4i16 +; SI-CHECK: BUFFER_STORE_SHORT +; SI-CHECK: BUFFER_STORE_SHORT +; SI-CHECK: BUFFER_STORE_SHORT +; SI-CHECK: BUFFER_STORE_SHORT +; SI-CHECK-NOT: BUFFER_STORE_BYTE +define void @store_v4i16(<4 x i16> addrspace(1)* %out, <4 x i32> %in) { +entry: + %0 = trunc <4 x i32> %in to <4 x i16> + store <4 x i16> %0, <4 x i16> addrspace(1)* %out + ret void +} + ; vec2 floating-point stores ; EG-CHECK: @store_v2f32 ; EG-CHECK: MEM_RAT_CACHELESS STORE_RAW |