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authorEvan Cheng <evan.cheng@apple.com>2009-12-15 00:41:36 +0000
committerEvan Cheng <evan.cheng@apple.com>2009-12-15 00:41:36 +0000
commit99b653c36f0141f6b9515d688960ac8c2cb857ff (patch)
treebd6bd822b11a900dd8d14baed63cb4dea752bd4e /test/CodeGen/X86/zext-shl.ll
parent0c479d3c6bd474e5135bddfed42f37e3092cac31 (diff)
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Propagate zest through logical shift.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91378 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/zext-shl.ll')
-rw-r--r--test/CodeGen/X86/zext-shl.ll38
1 files changed, 38 insertions, 0 deletions
diff --git a/test/CodeGen/X86/zext-shl.ll b/test/CodeGen/X86/zext-shl.ll
new file mode 100644
index 0000000..bc3198a
--- /dev/null
+++ b/test/CodeGen/X86/zext-shl.ll
@@ -0,0 +1,38 @@
+; RUN: llc < %s -march=x86 | FileCheck %s
+
+define i32 @t1(i8 zeroext %x) nounwind readnone ssp {
+entry:
+; CHECK: t1:
+; CHECK: shll
+; CHECK-NOT: movzwl
+; CHECK: ret
+ %0 = zext i8 %x to i16
+ %1 = shl i16 %0, 5
+ %2 = zext i16 %1 to i32
+ ret i32 %2
+}
+
+define i32 @t2(i8 zeroext %x) nounwind readnone ssp {
+entry:
+; CHECK: t2:
+; CHECK: shrl
+; CHECK-NOT: movzwl
+; CHECK: ret
+ %0 = zext i8 %x to i16
+ %1 = lshr i16 %0, 3
+ %2 = zext i16 %1 to i32
+ ret i32 %2
+}
+
+define i32 @t3(i8 zeroext %x, i8 zeroext %y) nounwind readnone ssp {
+entry:
+; CHECK: t3:
+; CHECK: shll
+; CHECK-NOT: movzwl
+; CHECK: ret
+ %0 = zext i8 %x to i16
+ %1 = zext i8 %y to i16
+ %2 = shl i16 %0, %1
+ %3 = zext i16 %2 to i32
+ ret i32 %3
+}