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| author | Daniel Sanders <daniel.sanders@imgtec.com> | 2013-08-28 10:44:47 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2013-08-28 10:44:47 +0000 |
| commit | abbcf3bd47ad8ffa70f48ebd924f99fff5c22131 (patch) | |
| tree | eb840843c5b3d6dd8f3b31e86fbf1bd2f2e49796 /test/CodeGen | |
| parent | 477168192c98e1f75a5bc6db3d34a177f327bd34 (diff) | |
| download | external_llvm-abbcf3bd47ad8ffa70f48ebd924f99fff5c22131.zip external_llvm-abbcf3bd47ad8ffa70f48ebd924f99fff5c22131.tar.gz external_llvm-abbcf3bd47ad8ffa70f48ebd924f99fff5c22131.tar.bz2 | |
[mips][msa] Added move.v
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189471 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
| -rw-r--r-- | test/CodeGen/Mips/msa/elm_move.ll | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/test/CodeGen/Mips/msa/elm_move.ll b/test/CodeGen/Mips/msa/elm_move.ll new file mode 100644 index 0000000..2f1763b --- /dev/null +++ b/test/CodeGen/Mips/msa/elm_move.ll @@ -0,0 +1,24 @@ +; Test the MSA move intrinsics (which are encoded with the ELM instruction +; format). + +; RUN: llc -march=mips -mattr=+msa < %s | FileCheck %s + +@llvm_mips_move_vb_ARG1 = global <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>, align 16 +@llvm_mips_move_vb_RES = global <16 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>, align 16 + +define void @llvm_mips_move_vb_test() nounwind { +entry: + %0 = load <16 x i8>* @llvm_mips_move_vb_ARG1 + %1 = tail call <16 x i8> @llvm.mips.move.v(<16 x i8> %0) + store <16 x i8> %1, <16 x i8>* @llvm_mips_move_vb_RES + ret void +} + +declare <16 x i8> @llvm.mips.move.v(<16 x i8>) nounwind + +; CHECK: llvm_mips_move_vb_test: +; CHECK: ld.b +; CHECK: move.v +; CHECK: st.b +; CHECK: .size llvm_mips_move_vb_test +; |