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authorAkira Hatanaka <ahatanaka@mips.com>2012-07-09 18:46:47 +0000
committerAkira Hatanaka <ahatanaka@mips.com>2012-07-09 18:46:47 +0000
commit241b77fa451f8076e47c37212028454ad52ece15 (patch)
treecdfd61b13ec8b780e9a77a92c74fd9f711e837b0 /test/MC/Disassembler/Mips/mips32r2.txt
parent78f8ef42173a3a9867ed789073d4ddc652fb7ff2 (diff)
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Reapply r158846.
Access mips register classes via MCRegisterInfo's functions instead of via the TargetRegisterClasses defined in MipsGenRegisterInfo.inc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159953 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC/Disassembler/Mips/mips32r2.txt')
-rw-r--r--test/MC/Disassembler/Mips/mips32r2.txt74
1 files changed, 37 insertions, 37 deletions
diff --git a/test/MC/Disassembler/Mips/mips32r2.txt b/test/MC/Disassembler/Mips/mips32r2.txt
index 295ffd0..3bf2493 100644
--- a/test/MC/Disassembler/Mips/mips32r2.txt
+++ b/test/MC/Disassembler/Mips/mips32r2.txt
@@ -1,7 +1,7 @@
# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips32r2
# CHECK: abs.d $f12,$f14
-0x46 0x20 0x39 0x85
+0x46 0x20 0x73 0x05
# CHECK: abs.s $f6,$f7
0x46 0x00 0x39 0x85
@@ -9,8 +9,8 @@
# CHECK: add t1,a2,a3
0x00 0xc7 0x48 0x20
-# CHECK: add.d $f18,$f12,$f14
-0x46 0x27 0x32 0x40
+# CHECK: add.d $f8,$f12,$f14
+0x46 0x2e 0x62 0x00
# CHECK: add.s $f9,$f6,$f7
0x46 0x07 0x32 0x40
@@ -61,103 +61,103 @@
0x15 0x26 0x01 0x4c
# CHECK: c.eq.d $f12,$f14
-0x46 0x27 0x30 0x32
+0x46 0x2e 0x60 0x32
# CHECK: c.eq.s $f6,$f7
0x46 0x07 0x30 0x32
# CHECK: c.f.d $f12,$f14
-0x46 0x27 0x30 0x30
+0x46 0x2e 0x60 0x30
# CHECK: c.f.s $f6,$f7
0x46 0x07 0x30 0x30
# CHECK: c.le.d $f12,$f14
-0x46 0x27 0x30 0x3e
+0x46 0x2e 0x60 0x3e
# CHECK: c.le.s $f6,$f7
0x46 0x07 0x30 0x3e
# CHECK: c.lt.d $f12,$f14
-0x46 0x27 0x30 0x3c
+0x46 0x2e 0x60 0x3c
# CHECK: c.lt.s $f6,$f7
0x46 0x07 0x30 0x3c
# CHECK: c.nge.d $f12,$f14
-0x46 0x27 0x30 0x3d
+0x46 0x2e 0x60 0x3d
# CHECK: c.nge.s $f6,$f7
0x46 0x07 0x30 0x3d
# CHECK: c.ngl.d $f12,$f14
-0x46 0x27 0x30 0x3b
+0x46 0x2e 0x60 0x3b
# CHECK: c.ngl.s $f6,$f7
0x46 0x07 0x30 0x3b
# CHECK: c.ngle.d $f12,$f14
-0x46 0x27 0x30 0x39
+0x46 0x2e 0x60 0x39
# CHECK: c.ngle.s $f6,$f7
0x46 0x07 0x30 0x39
# CHECK: c.ngt.d $f12,$f14
-0x46 0x27 0x30 0x3f
+0x46 0x2e 0x60 0x3f
# CHECK: c.ngt.s $f6,$f7
0x46 0x07 0x30 0x3f
# CHECK: c.ole.d $f12,$f14
-0x46 0x27 0x30 0x36
+0x46 0x2e 0x60 0x36
# CHECK: c.ole.s $f6,$f7
0x46 0x07 0x30 0x36
# CHECK: c.olt.d $f12,$f14
-0x46 0x27 0x30 0x34
+0x46 0x2e 0x60 0x34
# CHECK: c.olt.s $f6,$f7
0x46 0x07 0x30 0x34
# CHECK: c.seq.d $f12,$f14
-0x46 0x27 0x30 0x3a
+0x46 0x2e 0x60 0x3a
# CHECK: c.seq.s $f6,$f7
0x46 0x07 0x30 0x3a
# CHECK: c.sf.d $f12,$f14
-0x46 0x27 0x30 0x38
+0x46 0x2e 0x60 0x38
# CHECK: c.sf.s $f6,$f7
0x46 0x07 0x30 0x38
# CHECK: c.ueq.d $f12,$f14
-0x46 0x27 0x30 0x33
+0x46 0x2e 0x60 0x33
# CHECK: c.ueq.s $f28,$f18
0x46 0x12 0xe0 0x33
# CHECK: c.ule.d $f12,$f14
-0x46 0x27 0x30 0x37
+0x46 0x2e 0x60 0x37
# CHECK: c.ule.s $f6,$f7
0x46 0x07 0x30 0x37
# CHECK: c.ult.d $f12,$f14
-0x46 0x27 0x30 0x35
+0x46 0x2e 0x60 0x35
# CHECK: c.ult.s $f6,$f7
0x46 0x07 0x30 0x35
# CHECK: c.un.d $f12,$f14
-0x46 0x27 0x30 0x31
+0x46 0x2e 0x60 0x31
# CHECK: c.un.s $f6,$f7
0x46 0x07 0x30 0x31
# CHECK: ceil.w.d $f12,$f14
-0x46 0x20 0x39 0x8e
+0x46 0x20 0x73 0x0e
# CHECK: ceil.w.s $f6,$f7
0x46 0x00 0x39 0x8e
@@ -175,31 +175,31 @@
0x44 0xc6 0x38 0x00
# CHECK: cvt.d.s $f6,$f7
-0x46 0x00 0x38 0xa1
+0x46 0x00 0x39 0xa1
# CHECK: cvt.d.w $f12,$f14
-0x46 0x80 0x38 0xa1
+0x46 0x80 0x73 0x21
# CHECK: cvt.l.d $f12,$f14
-0x46 0x20 0x39 0xa5
+0x46 0x20 0x73 0x05
# CHECK: cvt.l.s $f6,$f7
0x46 0x00 0x39 0xa5
# CHECK: cvt.s.d $f12,$f14
-0x46 0x20 0x39 0xa0
+0x46 0x20 0x73 0x20
# CHECK: cvt.s.w $f6,$f7
0x46 0x80 0x39 0xa0
# CHECK: cvt.w.d $f12,$f14
-0x46 0x20 0x39 0xa4
+0x46 0x20 0x73 0x24
# CHECK: cvt.w.s $f6,$f7
0x46 0x00 0x39 0xa4
# CHECK: floor.w.d $f12,$f14
-0x46 0x20 0x39 0x8f
+0x46 0x20 0x73 0x0f
# CHECK: floor.w.s $f6,$f7
0x46 0x00 0x39 0x8f
@@ -264,8 +264,8 @@
# CHECK: mflo a1
0x00 0x00 0x28 0x12
-# CHECK: mov.d $f6,$f7
-0x46 0x20 0x39 0x86
+# CHECK: mov.d $f6,$f8
+0x46 0x20 0x41 0x86
# CHECK: mov.s $f6,$f7
0x46 0x00 0x39 0x86
@@ -288,8 +288,8 @@
# CHECK: mtlo a3
0x00 0xe0 0x00 0x13
-# CHECK: mul.d $f9,$f12,$f14
-0x46 0x27 0x32 0x42
+# CHECK: mul.d $f8,$f12,$f14
+0x46 0x2e 0x62 0x02
# CHECK: mul.s $f9,$f6,$f7
0x46 0x07 0x32 0x42
@@ -304,7 +304,7 @@
0x00 0x65 0x00 0x19
# CHECK: neg.d $f12,$f14
-0x46 0x20 0x39 0x87
+0x46 0x20 0x73 0x07
# CHECK: neg.s $f6,$f7
0x46 0x00 0x39 0x87
@@ -336,8 +336,8 @@
# CHECK: rorv t1,a2,a3
0x00 0xe6 0x48 0x46
-# CHECK: round.w.d $f12,$f14
-0x46 0x20 0x39 0x8c
+# CHECK: round.w.d $f6,$f14
+0x46 0x20 0x73 0x0c
# CHECK: round.w.s $f6,$f7
0x46 0x00 0x39 0x8c
@@ -382,7 +382,7 @@
0x00 0x65 0x18 0x2b
# CHECK: sqrt.d $f12,$f14
-0x46 0x20 0x39 0x84
+0x46 0x20 0x73 0x04
# CHECK: sqrt.s $f6,$f7
0x46 0x00 0x39 0x84
@@ -402,8 +402,8 @@
# CHECK: srlv v0,v1,a1
0x00 0xa3 0x10 0x06
-# CHECK: sub.d $f9,$f12,$f14
-0x46 0x27 0x32 0x41
+# CHECK: sub.d $f8,$f12,$f14
+0x46 0x2e 0x62 0x01
# CHECK: sub.s $f9,$f6,$f7
0x46 0x07 0x32 0x41
@@ -424,7 +424,7 @@
0x00 0x00 0x01 0xcf
# CHECK: trunc.w.d $f12,$f14
-0x46 0x20 0x39 0x8d
+0x46 0x20 0x73 0x0d
# CHECK: trunc.w.s $f6,$f7
0x46 0x00 0x39 0x8d