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| author | Stephen Hines <srhines@google.com> | 2014-04-23 16:57:46 -0700 |
|---|---|---|
| committer | Stephen Hines <srhines@google.com> | 2014-04-24 15:53:16 -0700 |
| commit | 36b56886974eae4f9c5ebc96befd3e7bfe5de338 (patch) | |
| tree | e6cfb69fbbd937f450eeb83bfb83b9da3b01275a /test/MC/Mips/mips_directives.s | |
| parent | 69a8640022b04415ae9fac62f8ab090601d8f889 (diff) | |
| download | external_llvm-36b56886974eae4f9c5ebc96befd3e7bfe5de338.zip external_llvm-36b56886974eae4f9c5ebc96befd3e7bfe5de338.tar.gz external_llvm-36b56886974eae4f9c5ebc96befd3e7bfe5de338.tar.bz2 | |
Update to LLVM 3.5a.
Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
Diffstat (limited to 'test/MC/Mips/mips_directives.s')
| -rw-r--r-- | test/MC/Mips/mips_directives.s | 44 |
1 files changed, 40 insertions, 4 deletions
diff --git a/test/MC/Mips/mips_directives.s b/test/MC/Mips/mips_directives.s index 44e707c..6780dd0 100644 --- a/test/MC/Mips/mips_directives.s +++ b/test/MC/Mips/mips_directives.s @@ -1,15 +1,22 @@ -# RUN: llvm-mc -show-encoding -triple mips-unknown-unknown %s | FileCheck %s +# RUN: llvm-mc -show-encoding -mcpu=mips32 -triple mips-unknown-unknown %s | FileCheck %s # # CHECK: .text # CHECK: $BB0_2: +# CHECK: .abicalls $BB0_2: .ent directives_test + .abicalls .frame $sp,0,$ra .mask 0x00000000,0 .fmask 0x00000000,0 + +# CHECK: .set noreorder # CHECK: b 1332 # encoding: [0x10,0x00,0x01,0x4d] +# CHECK-NOT: nop # CHECK: j 1328 # encoding: [0x08,0x00,0x01,0x4c] +# CHECK-NOT: nop # CHECK: jal 1328 # encoding: [0x0c,0x00,0x01,0x4c] +# CHECK-NOT: nop .set noreorder b 1332 @@ -26,6 +33,7 @@ $JTI0_0: # CHECK: .4byte 2013265916 .set at=$12 .set macro +# CHECK: .set reorder # CHECK: b 1332 # encoding: [0x10,0x00,0x01,0x4d] # CHECK: nop # encoding: [0x00,0x00,0x00,0x00] # CHECK: j 1328 # encoding: [0x08,0x00,0x01,0x4c] @@ -33,15 +41,43 @@ $JTI0_0: # CHECK: jal 1328 # encoding: [0x0c,0x00,0x01,0x4c] # CHECK: nop # encoding: [0x00,0x00,0x00,0x00] .set reorder +$BB0_4: b 1332 j 1328 jal 1328 .set at=$a0 .set STORE_MASK,$t7 .set FPU_MASK,$f7 - .set r3,$3 + .set $tmp7, $BB0_4-$BB0_2 .set f6,$f6 # CHECK: abs.s $f6, $f7 # encoding: [0x46,0x00,0x39,0x85] -# CHECK: and $3, $15, $15 # encoding: [0x01,0xef,0x18,0x24] +# CHECK: lui $1, %hi($tmp7) # encoding: [0x3c'A',0x01'A',0x00,0x00] +# CHECK: # fixup A - offset: 0, value: ($tmp7)@ABS_HI, kind: fixup_Mips_HI16 abs.s f6,FPU_MASK - and r3,$t7,STORE_MASK + lui $1, %hi($tmp7) + +# CHECK: .set mips32r2 +# CHECK: ldxc1 $f0, $zero($5) # encoding: [0x4c,0xa0,0x00,0x01] +# CHECK: luxc1 $f0, $6($5) # encoding: [0x4c,0xa6,0x00,0x05] +# CHECK: lwxc1 $f6, $2($5) # encoding: [0x4c,0xa2,0x01,0x80] + .set mips32r2 + ldxc1 $f0, $zero($5) + luxc1 $f0, $6($5) + lwxc1 $f6, $2($5) + +# CHECK: .set mips64 +# CHECK: dadd $3, $3, $3 + .set mips64 + dadd $3, $3, $3 # encoding: [0x00,0x62,0x18,0x2c] + +# CHECK: .set mips64r2 +# CHECK: drotr $9, $6, 30 # encoding: [0x00,0x26,0x4f,0xba] + .set mips64r2 + drotr $9, $6, 30 + +# CHECK: .set dsp +# CHECK: lbux $7, $10($11) # encoding: [0x7d,0x6a,0x39,0x8a] +# CHECK: lhx $5, $6($7) # encoding: [0x7c,0xe6,0x29,0x0a] + .set dsp + lbux $7, $10($11) + lhx $5, $6($7) |