Update to LLVM 3.5a.

Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617

474 files changed, 47484 insertions, 180258 deletions

diff --git a/test/MC/AArch64/basic-a64-diagnostics.s b/test/MC/AArch64/basic-a64-diagnostics.s
index 2e6e0bb..792538c 100644
--- a/test/MC/AArch64/basic-a64-diagnostics.s
+++ b/test/MC/AArch64/basic-a64-diagnostics.s
@@ -2478,13 +2478,13 @@
         ldp x2, x5, [sp, #4]
         ldp x5, x6, [x9, #512]
         stp x7, x8, [x10, #-520]
-// CHECK-ERROR: error: expected integer multiple of 8 in range [-512, 508]
+// CHECK-ERROR: error: expected integer multiple of 8 in range [-512, 504]
 // CHECK-ERROR-NEXT:         ldp x2, x5, [sp, #4]
 // CHECK-ERROR-NEXT:                     ^
-// CHECK-ERROR-NEXT: error: expected integer multiple of 8 in range [-512, 508]
+// CHECK-ERROR-NEXT: error: expected integer multiple of 8 in range [-512, 504]
 // CHECK-ERROR-NEXT:         ldp x5, x6, [x9, #512]
 // CHECK-ERROR-NEXT:                     ^
-// CHECK-ERROR-NEXT: error: expected integer multiple of 8 in range [-512, 508]
+// CHECK-ERROR-NEXT: error: expected integer multiple of 8 in range [-512, 504]
 // CHECK-ERROR-NEXT:         stp x7, x8, [x10, #-520]
 // CHECK-ERROR-NEXT:                     ^
 
@@ -2516,10 +2516,10 @@
 // CHECK-ERROR: error: invalid operand for instruction
 // CHECK-ERROR-NEXT:         ldp d3, d4, [xzr]
 // CHECK-ERROR-NEXT:                      ^
-// CHECK-ERROR-NEXT: error: expected integer multiple of 8 in range [-512, 508]
+// CHECK-ERROR-NEXT: error: expected integer multiple of 8 in range [-512, 504]
 // CHECK-ERROR-NEXT:         ldp d5, d6, [x0, #512]
 // CHECK-ERROR-NEXT:                     ^
-// CHECK-ERROR-NEXT: error: expected integer multiple of 8 in range [-512, 508]
+// CHECK-ERROR-NEXT: error: expected integer multiple of 8 in range [-512, 504]
 // CHECK-ERROR-NEXT:         stp d7, d8, [x0, #-520]
 // CHECK-ERROR-NEXT:                     ^
 
@@ -2530,13 +2530,13 @@
 // CHECK-ERROR: error: invalid operand for instruction
 // CHECK-ERROR-NEXT:         ldp d3, q2, [sp]
 // CHECK-ERROR-NEXT:                 ^
-// CHECK-ERROR-NEXT: error: expected integer multiple of 16 in range [-1024, 1016]
+// CHECK-ERROR-NEXT: error: expected integer multiple of 16 in range [-1024, 1008]
 // CHECK-ERROR-NEXT:         ldp q3, q5, [sp, #8]
 // CHECK-ERROR-NEXT:                     ^
-// CHECK-ERROR-NEXT: error: expected integer multiple of 16 in range [-1024, 1016]
+// CHECK-ERROR-NEXT: error: expected integer multiple of 16 in range [-1024, 1008]
 // CHECK-ERROR-NEXT:         stp q20, q25, [x5, #1024]
 // CHECK-ERROR-NEXT:                       ^
-// CHECK-ERROR-NEXT: error: expected integer multiple of 16 in range [-1024, 1016]
+// CHECK-ERROR-NEXT: error: expected integer multiple of 16 in range [-1024, 1008]
 // CHECK-ERROR-NEXT:         ldp q30, q15, [x23, #-1040]
 // CHECK-ERROR-NEXT:                       ^
 
@@ -2581,13 +2581,13 @@
         ldp x2, x5, [sp], #4
         ldp x5, x6, [x9], #512
         stp x7, x8, [x10], #-520
-// CHECK-ERROR: error: expected integer multiple of 8 in range [-512, 508]
+// CHECK-ERROR: error: expected integer multiple of 8 in range [-512, 504]
 // CHECK-ERROR-NEXT:         ldp x2, x5, [sp], #4
 // CHECK-ERROR-NEXT:                           ^
-// CHECK-ERROR-NEXT: error: expected integer multiple of 8 in range [-512, 508]
+// CHECK-ERROR-NEXT: error: expected integer multiple of 8 in range [-512, 504]
 // CHECK-ERROR-NEXT:         ldp x5, x6, [x9], #512
 // CHECK-ERROR-NEXT:                           ^
-// CHECK-ERROR-NEXT: error: expected integer multiple of 8 in range [-512, 508]
+// CHECK-ERROR-NEXT: error: expected integer multiple of 8 in range [-512, 504]
 // CHECK-ERROR-NEXT:         stp x7, x8, [x10], #-520
 // CHECK-ERROR-NEXT:                            ^
 
@@ -2619,10 +2619,10 @@
 // CHECK-ERROR: error: invalid operand for instruction
 // CHECK-ERROR-NEXT:         ldp d3, d4, [xzr], #0
 // CHECK-ERROR-NEXT:                      ^
-// CHECK-ERROR-NEXT: error: expected integer multiple of 8 in range [-512, 508]
+// CHECK-ERROR-NEXT: error: expected integer multiple of 8 in range [-512, 504]
 // CHECK-ERROR-NEXT:         ldp d5, d6, [x0], #512
 // CHECK-ERROR-NEXT:                     ^
-// CHECK-ERROR-NEXT: error: expected integer multiple of 8 in range [-512, 508]
+// CHECK-ERROR-NEXT: error: expected integer multiple of 8 in range [-512, 504]
 // CHECK-ERROR-NEXT:         stp d7, d8, [x0], #-520
 // CHECK-ERROR-NEXT:                     ^
 
@@ -2633,13 +2633,13 @@
 // CHECK-ERROR: error: invalid operand for instruction
 // CHECK-ERROR-NEXT:         ldp d3, q2, [sp], #0
 // CHECK-ERROR-NEXT:                 ^
-// CHECK-ERROR-NEXT: error: expected integer multiple of 16 in range [-1024, 1016]
+// CHECK-ERROR-NEXT: error: expected integer multiple of 16 in range [-1024, 1008]
 // CHECK-ERROR-NEXT:         ldp q3, q5, [sp], #8
 // CHECK-ERROR-NEXT:                     ^
-// CHECK-ERROR-NEXT: error: expected integer multiple of 16 in range [-1024, 1016]
+// CHECK-ERROR-NEXT: error: expected integer multiple of 16 in range [-1024, 1008]
 // CHECK-ERROR-NEXT:         stp q20, q25, [x5], #1024
 // CHECK-ERROR-NEXT:                       ^
-// CHECK-ERROR-NEXT: error: expected integer multiple of 16 in range [-1024, 1016]
+// CHECK-ERROR-NEXT: error: expected integer multiple of 16 in range [-1024, 1008]
 // CHECK-ERROR-NEXT:         ldp q30, q15, [x23], #-1040
 // CHECK-ERROR-NEXT:                       ^
 
@@ -2684,13 +2684,13 @@
         ldp x2, x5, [sp, #4]!
         ldp x5, x6, [x9, #512]!
         stp x7, x8, [x10, #-520]!
-// CHECK-ERROR: error: expected integer multiple of 8 in range [-512, 508]
+// CHECK-ERROR: error: expected integer multiple of 8 in range [-512, 504]
 // CHECK-ERROR-NEXT:         ldp x2, x5, [sp, #4]!
 // CHECK-ERROR-NEXT:                     ^
-// CHECK-ERROR-NEXT: error: expected integer multiple of 8 in range [-512, 508]
+// CHECK-ERROR-NEXT: error: expected integer multiple of 8 in range [-512, 504]
 // CHECK-ERROR-NEXT:         ldp x5, x6, [x9, #512]!
 // CHECK-ERROR-NEXT:                     ^
-// CHECK-ERROR-NEXT: error: expected integer multiple of 8 in range [-512, 508]
+// CHECK-ERROR-NEXT: error: expected integer multiple of 8 in range [-512, 504]
 // CHECK-ERROR-NEXT:         stp x7, x8, [x10, #-520]!
 // CHECK-ERROR-NEXT:                     ^
 
@@ -2722,10 +2722,10 @@
 // CHECK-ERROR: error: invalid operand for instruction
 // CHECK-ERROR-NEXT:         ldp d3, d4, [xzr, #0]!
 // CHECK-ERROR-NEXT:                      ^
-// CHECK-ERROR-NEXT: error: expected integer multiple of 8 in range [-512, 508]
+// CHECK-ERROR-NEXT: error: expected integer multiple of 8 in range [-512, 504]
 // CHECK-ERROR-NEXT:         ldp d5, d6, [x0, #512]!
 // CHECK-ERROR-NEXT:                     ^
-// CHECK-ERROR-NEXT: error: expected integer multiple of 8 in range [-512, 508]
+// CHECK-ERROR-NEXT: error: expected integer multiple of 8 in range [-512, 504]
 // CHECK-ERROR-NEXT:         stp d7, d8, [x0, #-520]!
 // CHECK-ERROR-NEXT:                     ^
 
@@ -2736,13 +2736,13 @@
 // CHECK-ERROR: error: invalid operand for instruction
 // CHECK-ERROR-NEXT:         ldp d3, q2, [sp, #0]!
 // CHECK-ERROR-NEXT:                 ^
-// CHECK-ERROR-NEXT: error: expected integer multiple of 16 in range [-1024, 1016]
+// CHECK-ERROR-NEXT: error: expected integer multiple of 16 in range [-1024, 1008]
 // CHECK-ERROR-NEXT:         ldp q3, q5, [sp, #8]!
 // CHECK-ERROR-NEXT:                     ^
-// CHECK-ERROR-NEXT: error: expected integer multiple of 16 in range [-1024, 1016]
+// CHECK-ERROR-NEXT: error: expected integer multiple of 16 in range [-1024, 1008]
 // CHECK-ERROR-NEXT:         stp q20, q25, [x5, #1024]!
 // CHECK-ERROR-NEXT:                       ^
-// CHECK-ERROR-NEXT: error: expected integer multiple of 16 in range [-1024, 1016]
+// CHECK-ERROR-NEXT: error: expected integer multiple of 16 in range [-1024, 1008]
 // CHECK-ERROR-NEXT:         ldp q30, q15, [x23, #-1040]!
 // CHECK-ERROR-NEXT:                       ^
 
@@ -2773,13 +2773,13 @@
         ldnp x2, x5, [sp, #4]
         ldnp x5, x6, [x9, #512]
         stnp x7, x8, [x10, #-520]
-// CHECK-ERROR: error: expected integer multiple of 8 in range [-512, 508]
+// CHECK-ERROR: error: expected integer multiple of 8 in range [-512, 504]
 // CHECK-ERROR-NEXT:         ldnp x2, x5, [sp, #4]
 // CHECK-ERROR-NEXT:                           ^
-// CHECK-ERROR-NEXT: error: expected integer multiple of 8 in range [-512, 508]
+// CHECK-ERROR-NEXT: error: expected integer multiple of 8 in range [-512, 504]
 // CHECK-ERROR-NEXT:         ldnp x5, x6, [x9, #512]
 // CHECK-ERROR-NEXT:                           ^
-// CHECK-ERROR-NEXT: error: expected integer multiple of 8 in range [-512, 508]
+// CHECK-ERROR-NEXT: error: expected integer multiple of 8 in range [-512, 504]
 // CHECK-ERROR-NEXT:         stnp x7, x8, [x10, #-520]
 // CHECK-ERROR-NEXT:                            ^
 
@@ -2811,10 +2811,10 @@
 // CHECK-ERROR: error: invalid operand for instruction
 // CHECK-ERROR-NEXT:         ldnp d3, d4, [xzr]
 // CHECK-ERROR-NEXT:                      ^
-// CHECK-ERROR-NEXT: error: expected integer multiple of 8 in range [-512, 508]
+// CHECK-ERROR-NEXT: error: expected integer multiple of 8 in range [-512, 504]
 // CHECK-ERROR-NEXT:         ldnp d5, d6, [x0, #512]
 // CHECK-ERROR-NEXT:                     ^
-// CHECK-ERROR-NEXT: error: expected integer multiple of 8 in range [-512, 508]
+// CHECK-ERROR-NEXT: error: expected integer multiple of 8 in range [-512, 504]
 // CHECK-ERROR-NEXT:         stnp d7, d8, [x0, #-520]
 // CHECK-ERROR-NEXT:                     ^
 
@@ -2825,13 +2825,13 @@
 // CHECK-ERROR: error: invalid operand for instruction
 // CHECK-ERROR-NEXT:         ldnp d3, q2, [sp]
 // CHECK-ERROR-NEXT:                 ^
-// CHECK-ERROR-NEXT: error: expected integer multiple of 16 in range [-1024, 1016]
+// CHECK-ERROR-NEXT: error: expected integer multiple of 16 in range [-1024, 1008]
 // CHECK-ERROR-NEXT:         ldnp q3, q5, [sp, #8]
 // CHECK-ERROR-NEXT:                     ^
-// CHECK-ERROR-NEXT: error: expected integer multiple of 16 in range [-1024, 1016]
+// CHECK-ERROR-NEXT: error: expected integer multiple of 16 in range [-1024, 1008]
 // CHECK-ERROR-NEXT:         stnp q20, q25, [x5, #1024]
 // CHECK-ERROR-NEXT:                       ^
-// CHECK-ERROR-NEXT: error: expected integer multiple of 16 in range [-1024, 1016]
+// CHECK-ERROR-NEXT: error: expected integer multiple of 16 in range [-1024, 1008]
 // CHECK-ERROR-NEXT:         ldnp q30, q15, [x23, #-1040]
 // CHECK-ERROR-NEXT:                       ^
 
diff --git a/test/MC/AArch64/basic-a64-instructions.s b/test/MC/AArch64/basic-a64-instructions.s
index a50efb3..be00e14 100644
--- a/test/MC/AArch64/basic-a64-instructions.s
+++ b/test/MC/AArch64/basic-a64-instructions.s
@@ -1194,6 +1194,58 @@ _func:
 // CHECK: b.al lbl                        // encoding: [0x0e'A',A,A,0x54'A']
 // CHECK:                                 //   fixup A - offset: 0, value: lbl, kind: fixup_a64_condbr
 
+        beq lbl
+        bne lbl
+        bcs lbl
+        bhs lbl
+        blo lbl
+        bcc lbl
+        bmi lbl
+        bpl lbl
+        bvs lbl
+        bvc lbl
+        bhi lbl
+        bls lbl
+        bge lbl
+        blt lbl
+        bgt lbl
+        ble lbl
+        bal lbl
+// CHECK: b.eq lbl                        // encoding: [A,A,A,0x54'A']
+// CHECK:                                 //   fixup A - offset: 0, value: lbl, kind: fixup_a64_condbr
+// CHECK: b.ne lbl                        // encoding: [0x01'A',A,A,0x54'A']
+// CHECK:                                 //   fixup A - offset: 0, value: lbl, kind: fixup_a64_condbr
+// CHECK: b.hs lbl                        // encoding: [0x02'A',A,A,0x54'A']
+// CHECK:                                 //   fixup A - offset: 0, value: lbl, kind: fixup_a64_condbr
+// CHECK: b.hs lbl                        // encoding: [0x02'A',A,A,0x54'A']
+// CHECK:                                 //   fixup A - offset: 0, value: lbl, kind: fixup_a64_condbr
+// CHECK: b.lo lbl                        // encoding: [0x03'A',A,A,0x54'A']
+// CHECK:                                 //   fixup A - offset: 0, value: lbl, kind: fixup_a64_condbr
+// CHECK: b.lo lbl                        // encoding: [0x03'A',A,A,0x54'A']
+// CHECK:                                 //   fixup A - offset: 0, value: lbl, kind: fixup_a64_condbr
+// CHECK: b.mi lbl                        // encoding: [0x04'A',A,A,0x54'A']
+// CHECK:                                 //   fixup A - offset: 0, value: lbl, kind: fixup_a64_condbr
+// CHECK: b.pl lbl                        // encoding: [0x05'A',A,A,0x54'A']
+// CHECK:                                 //   fixup A - offset: 0, value: lbl, kind: fixup_a64_condbr
+// CHECK: b.vs lbl                        // encoding: [0x06'A',A,A,0x54'A']
+// CHECK:                                 //   fixup A - offset: 0, value: lbl, kind: fixup_a64_condbr
+// CHECK: b.vc lbl                        // encoding: [0x07'A',A,A,0x54'A']
+// CHECK:                                 //   fixup A - offset: 0, value: lbl, kind: fixup_a64_condbr
+// CHECK: b.hi lbl                        // encoding: [0x08'A',A,A,0x54'A']
+// CHECK:                                 //   fixup A - offset: 0, value: lbl, kind: fixup_a64_condbr
+// CHECK: b.ls lbl                        // encoding: [0x09'A',A,A,0x54'A']
+// CHECK:                                 //   fixup A - offset: 0, value: lbl, kind: fixup_a64_condbr
+// CHECK: b.ge lbl                        // encoding: [0x0a'A',A,A,0x54'A']
+// CHECK:                                 //   fixup A - offset: 0, value: lbl, kind: fixup_a64_condbr
+// CHECK: b.lt lbl                        // encoding: [0x0b'A',A,A,0x54'A']
+// CHECK:                                 //   fixup A - offset: 0, value: lbl, kind: fixup_a64_condbr
+// CHECK: b.gt lbl                        // encoding: [0x0c'A',A,A,0x54'A']
+// CHECK:                                 //   fixup A - offset: 0, value: lbl, kind: fixup_a64_condbr
+// CHECK: b.le lbl                        // encoding: [0x0d'A',A,A,0x54'A']
+// CHECK:                                 //   fixup A - offset: 0, value: lbl, kind: fixup_a64_condbr
+// CHECK: b.al lbl                        // encoding: [0x0e'A',A,A,0x54'A']
+// CHECK:                                 //   fixup A - offset: 0, value: lbl, kind: fixup_a64_condbr
+
         b.eq #0
         b.lt #-4
         b.cc #1048572
diff --git a/test/MC/AArch64/neon-compare-instructions.s b/test/MC/AArch64/neon-compare-instructions.s
index e4bc202..d4e3ef5 100644
--- a/test/MC/AArch64/neon-compare-instructions.s
+++ b/test/MC/AArch64/neon-compare-instructions.s
@@ -346,10 +346,16 @@
          fcmeq v0.2s, v31.2s, #0.0
          fcmeq v4.4s, v7.4s, #0.0
          fcmeq v29.2d, v2.2d, #0.0
+         fcmeq v0.2s, v31.2s, #0
+         fcmeq v4.4s, v7.4s, #0
+         fcmeq v29.2d, v2.2d, #0
 
 // CHECK: fcmeq v0.2s, v31.2s, #0.0  // encoding: [0xe0,0xdb,0xa0,0x0e]
 // CHECK: fcmeq v4.4s, v7.4s, #0.0   // encoding: [0xe4,0xd8,0xa0,0x4e]
 // CHECK: fcmeq v29.2d, v2.2d, #0.0  // encoding: [0x5d,0xd8,0xe0,0x4e]
+// CHECK: fcmeq v0.2s, v31.2s, #0.0  // encoding: [0xe0,0xdb,0xa0,0x0e]
+// CHECK: fcmeq v4.4s, v7.4s, #0.0   // encoding: [0xe4,0xd8,0xa0,0x4e]
+// CHECK: fcmeq v29.2d, v2.2d, #0.0  // encoding: [0x5d,0xd8,0xe0,0x4e]
 
 //----------------------------------------------------------------------
 // Vector Compare Mask Greater Than or Equal to Zero (Floating Point)
@@ -357,10 +363,16 @@
          fcmge v31.4s, v29.4s, #0.0
          fcmge v3.2s, v8.2s, #0.0
          fcmge v17.2d, v15.2d, #0.0
+         fcmge v31.4s, v29.4s, #0
+         fcmge v3.2s, v8.2s, #0
+         fcmge v17.2d, v15.2d, #0
 
 // CHECK: fcmge v31.4s, v29.4s, #0.0  // encoding: [0xbf,0xcb,0xa0,0x6e]
 // CHECK: fcmge v3.2s, v8.2s, #0.0    // encoding: [0x03,0xc9,0xa0,0x2e]
 // CHECK: fcmge v17.2d, v15.2d, #0.0   // encoding: [0xf1,0xc9,0xe0,0x6e]
+// CHECK: fcmge v31.4s, v29.4s, #0.0  // encoding: [0xbf,0xcb,0xa0,0x6e]
+// CHECK: fcmge v3.2s, v8.2s, #0.0    // encoding: [0x03,0xc9,0xa0,0x2e]
+// CHECK: fcmge v17.2d, v15.2d, #0.0   // encoding: [0xf1,0xc9,0xe0,0x6e]
 
 //----------------------------------------------------------------------
 // Vector Compare Mask Greater Than Zero (Floating Point)
@@ -368,10 +380,16 @@
          fcmgt v0.2s, v31.2s, #0.0
          fcmgt v4.4s, v7.4s, #0.0
          fcmgt v29.2d, v2.2d, #0.0
+         fcmgt v0.2s, v31.2s, #0
+         fcmgt v4.4s, v7.4s, #0
+         fcmgt v29.2d, v2.2d, #0
 
 // CHECK: fcmgt v0.2s, v31.2s, #0.0   // encoding: [0xe0,0xcb,0xa0,0x0e]
 // CHECK: fcmgt v4.4s, v7.4s, #0.0    // encoding: [0xe4,0xc8,0xa0,0x4e]
 // CHECK: fcmgt v29.2d, v2.2d, #0.0   // encoding: [0x5d,0xc8,0xe0,0x4e]
+// CHECK: fcmgt v0.2s, v31.2s, #0.0   // encoding: [0xe0,0xcb,0xa0,0x0e]
+// CHECK: fcmgt v4.4s, v7.4s, #0.0    // encoding: [0xe4,0xc8,0xa0,0x4e]
+// CHECK: fcmgt v29.2d, v2.2d, #0.0   // encoding: [0x5d,0xc8,0xe0,0x4e]
 
 //----------------------------------------------------------------------
 // Vector Compare Mask Less Than or Equal To Zero (Floating Point)
@@ -379,10 +397,16 @@
          fcmle v1.4s, v8.4s, #0.0
          fcmle v3.2s, v20.2s, #0.0
          fcmle v7.2d, v13.2d, #0.0
+         fcmle v1.4s, v8.4s, #0
+         fcmle v3.2s, v20.2s, #0
+         fcmle v7.2d, v13.2d, #0
 
 // CHECK: fcmle v1.4s, v8.4s, #0.0   // encoding: [0x01,0xd9,0xa0,0x6e]
 // CHECK: fcmle v3.2s, v20.2s, #0.0  // encoding: [0x83,0xda,0xa0,0x2e]
 // CHECK: fcmle v7.2d, v13.2d, #0.0  // encoding: [0xa7,0xd9,0xe0,0x6e]
+// CHECK: fcmle v1.4s, v8.4s, #0.0   // encoding: [0x01,0xd9,0xa0,0x6e]
+// CHECK: fcmle v3.2s, v20.2s, #0.0  // encoding: [0x83,0xda,0xa0,0x2e]
+// CHECK: fcmle v7.2d, v13.2d, #0.0  // encoding: [0xa7,0xd9,0xe0,0x6e]
 
 //----------------------------------------------------------------------
 // Vector Compare Mask Less Than Zero (Floating Point)
@@ -390,10 +414,16 @@
          fcmlt v16.2s, v2.2s, #0.0
          fcmlt v15.4s, v4.4s, #0.0
          fcmlt v5.2d, v29.2d, #0.0
+         fcmlt v16.2s, v2.2s, #0
+         fcmlt v15.4s, v4.4s, #0
+         fcmlt v5.2d, v29.2d, #0
 
 // CHECK: fcmlt v16.2s, v2.2s, #0.0   // encoding: [0x50,0xe8,0xa0,0x0e]
 // CHECK: fcmlt v15.4s, v4.4s, #0.0   // encoding: [0x8f,0xe8,0xa0,0x4e]
 // CHECK: fcmlt v5.2d, v29.2d, #0.0   // encoding: [0xa5,0xeb,0xe0,0x4e]
+// CHECK: fcmlt v16.2s, v2.2s, #0.0   // encoding: [0x50,0xe8,0xa0,0x0e]
+// CHECK: fcmlt v15.4s, v4.4s, #0.0   // encoding: [0x8f,0xe8,0xa0,0x4e]
+// CHECK: fcmlt v5.2d, v29.2d, #0.0   // encoding: [0xa5,0xeb,0xe0,0x4e]
 
 
 
diff --git a/test/MC/AArch64/neon-diagnostics.s b/test/MC/AArch64/neon-diagnostics.s
index be6c163..aa08857 100644
--- a/test/MC/AArch64/neon-diagnostics.s
+++ b/test/MC/AArch64/neon-diagnostics.s
@@ -680,10 +680,10 @@
 // CHECK-ERROR: error: invalid operand for instruction
 // CHECK-ERROR:        fcmeq v0.16b, v1.16b, #0.0
 // CHECK-ERROR:                 ^
-// CHECK-ERROR: error: invalid operand for instruction
+// CHECK-ERROR: error: only #0.0 is acceptable as immediate
 // CHECK-ERROR:        fcmeq v0.8b, v1.4h, #1.0
 // CHECK-ERROR:                             ^
-// CHECK-ERROR: error:  Expected floating-point immediate
+// CHECK-ERROR: error: only #0.0 is acceptable as immediate
 // CHECK-ERROR:        fcmeq v0.8b, v1.4h, #1
 // CHECK-ERROR:                             ^
 //----------------------------------------------------------------------
@@ -694,7 +694,7 @@
          fcmge v31.4s, v29.2s, #0.0
          fcmge v3.8b, v8.2s, #0.0
          fcmle v17.8h, v15.2d, #-1.0
-         fcmle v17.8h, v15.2d, #0
+         fcmle v17.8h, v15.2d, #2
 
 // CHECK-ERROR: error: invalid operand for instruction
 // CHECK-ERROR:        fcmge v31.4s, v29.2s, #0.0
@@ -702,11 +702,11 @@
 // CHECK-ERROR: error: invalid operand for instruction
 // CHECK-ERROR:        fcmge v3.8b, v8.2s, #0.0
 // CHECK-ERROR:                 ^
-// CHECK-ERROR: error: invalid operand for instruction
+// CHECK-ERROR: error: only #0.0 is acceptable as immediate
 // CHECK-ERROR:        fcmle v17.8h, v15.2d, #-1.0
 // CHECK-ERROR:                               ^
-// CHECK-ERROR: error:  Expected floating-point immediate
-// CHECK-ERROR:        fcmle v17.8h, v15.2d, #0
+// CHECK-ERROR: error: only #0.0 is acceptable as immediate
+// CHECK-ERROR:        fcmle v17.8h, v15.2d, #2
 // CHECK-ERROR:                               ^
 //----------------------------------------------------------------------
 // Vector Compare Mask Greater Than Zero (Floating Point)
@@ -723,10 +723,10 @@
 // CHECK-ERROR: error: invalid operand for instruction
 // CHECK-ERROR:        fcmgt v4.4s, v7.4h, #0.0
 // CHECK-ERROR:                        ^
-// CHECK-ERROR: error: expected floating-point constant #0.0 or invalid register type
+// CHECK-ERROR: error: only #0.0 is acceptable as immediate
 // CHECK-ERROR:        fcmlt v29.2d, v5.2d, #255.0
 // CHECK-ERROR:                              ^
-// CHECK-ERROR: error:  Expected floating-point immediate
+// CHECK-ERROR: error: only #0.0 is acceptable as immediate
 // CHECK-ERROR:        fcmlt v29.2d, v5.2d, #255
 // CHECK-ERROR:                              ^
 
@@ -745,10 +745,10 @@
 // CHECK-ERROR: error: invalid operand for instruction
 // CHECK-ERROR:        fcmge v3.8b, v8.2s, #0.0
 // CHECK-ERROR:                 ^
-// CHECK-ERROR: error: expected floating-point constant #0.0 or invalid register type
+// CHECK-ERROR: error: only #0.0 is acceptable as immediate
 // CHECK-ERROR:        fcmle v17.2d, v15.2d, #15.0
 // CHECK-ERROR:                               ^
-// CHECK-ERROR: error:  Expected floating-point immediate
+// CHECK-ERROR: error: only #0.0 is acceptable as immediate
 // CHECK-ERROR:        fcmle v17.2d, v15.2d, #15
 // CHECK-ERROR:                              ^
 
@@ -767,10 +767,10 @@
 // CHECK-ERROR: error: invalid operand for instruction
 // CHECK-ERROR:        fcmgt v4.4s, v7.4h, #0.0
 // CHECK-ERROR:                        ^
-// CHECK-ERROR: error: expected floating-point constant #0.0 or invalid register type
+// CHECK-ERROR: error: only #0.0 is acceptable as immediate
 // CHECK-ERROR:        fcmlt v29.2d, v5.2d, #16.0
 // CHECK-ERROR:                              ^
-// CHECK-ERROR: error:  Expected floating-point immediate
+// CHECK-ERROR: error: only #0.0 is acceptable as immediate
 // CHECK-ERROR:        fcmlt v29.2d, v5.2d, #2
 // CHECK-ERROR:                              ^
 
diff --git a/test/MC/AArch64/neon-scalar-fp-compare.s b/test/MC/AArch64/neon-scalar-fp-compare.s
index a59ec0d..b798b34 100644
--- a/test/MC/AArch64/neon-scalar-fp-compare.s
+++ b/test/MC/AArch64/neon-scalar-fp-compare.s
@@ -18,9 +18,13 @@
 
          fcmeq s10, s11, #0.0
          fcmeq d20, d21, #0.0
+         fcmeq s10, s11, #0
+         fcmeq d20, d21, #0x0
 
 // CHECK: fcmeq s10, s11, #0.0   // encoding: [0x6a,0xd9,0xa0,0x5e]
 // CHECK: fcmeq d20, d21, #0.0   // encoding: [0xb4,0xda,0xe0,0x5e]
+// CHECK: fcmeq s10, s11, #0.0   // encoding: [0x6a,0xd9,0xa0,0x5e]
+// CHECK: fcmeq d20, d21, #0.0   // encoding: [0xb4,0xda,0xe0,0x5e]
 
 //----------------------------------------------------------------------
 // Scalar Floating-point Compare Mask Greater Than Or Equal
@@ -38,9 +42,13 @@
 
          fcmge s10, s11, #0.0
          fcmge d20, d21, #0.0
+         fcmge s10, s11, #0
+         fcmge d20, d21, #0x0
 
 // CHECK: fcmge s10, s11, #0.0   // encoding: [0x6a,0xc9,0xa0,0x7e]
 // CHECK: fcmge d20, d21, #0.0   // encoding: [0xb4,0xca,0xe0,0x7e]
+// CHECK: fcmge s10, s11, #0.0   // encoding: [0x6a,0xc9,0xa0,0x7e]
+// CHECK: fcmge d20, d21, #0.0   // encoding: [0xb4,0xca,0xe0,0x7e]
 
 //----------------------------------------------------------------------
 // Scalar Floating-point Compare Mask Greather Than
@@ -58,9 +66,13 @@
 
          fcmgt s10, s11, #0.0
          fcmgt d20, d21, #0.0
+         fcmgt s10, s11, #0
+         fcmgt d20, d21, #0x0
 
 // CHECK: fcmgt s10, s11, #0.0   // encoding: [0x6a,0xc9,0xa0,0x5e]
 // CHECK: fcmgt d20, d21, #0.0   // encoding: [0xb4,0xca,0xe0,0x5e]
+// CHECK: fcmgt s10, s11, #0.0   // encoding: [0x6a,0xc9,0xa0,0x5e]
+// CHECK: fcmgt d20, d21, #0.0   // encoding: [0xb4,0xca,0xe0,0x5e]
 
 //----------------------------------------------------------------------
 // Scalar Floating-point Compare Mask Less Than Or Equal To Zero
@@ -68,9 +80,13 @@
 
          fcmle s10, s11, #0.0
          fcmle d20, d21, #0.0
+         fcmle s10, s11, #0
+         fcmle d20, d21, #0x0
 
 // CHECK: fcmle s10, s11, #0.0   // encoding: [0x6a,0xd9,0xa0,0x7e]
 // CHECK: fcmle d20, d21, #0.0   // encoding: [0xb4,0xda,0xe0,0x7e]
+// CHECK: fcmle s10, s11, #0.0   // encoding: [0x6a,0xd9,0xa0,0x7e]
+// CHECK: fcmle d20, d21, #0.0   // encoding: [0xb4,0xda,0xe0,0x7e]
 
 //----------------------------------------------------------------------
 // Scalar Floating-point Compare Mask Less Than
@@ -78,9 +94,13 @@
 
          fcmlt s10, s11, #0.0
          fcmlt d20, d21, #0.0
+         fcmlt s10, s11, #0
+         fcmlt d20, d21, #0x0
 
 // CHECK: fcmlt s10, s11, #0.0   // encoding: [0x6a,0xe9,0xa0,0x5e]
 // CHECK: fcmlt d20, d21, #0.0   // encoding: [0xb4,0xea,0xe0,0x5e]
+// CHECK: fcmlt s10, s11, #0.0   // encoding: [0x6a,0xe9,0xa0,0x5e]
+// CHECK: fcmlt d20, d21, #0.0   // encoding: [0xb4,0xea,0xe0,0x5e]
 
 //----------------------------------------------------------------------
 // Scalar Floating-point Absolute Compare Mask Greater Than Or Equal
diff --git a/test/MC/AArch64/neon-sxtl.s b/test/MC/AArch64/neon-sxtl.s
new file mode 100644
index 0000000..0fe26cb
--- /dev/null
+++ b/test/MC/AArch64/neon-sxtl.s
@@ -0,0 +1,26 @@
+// RUN: llvm-mc -triple=aarch64-none-linux-gnu -mattr=+neon -show-encoding < %s | FileCheck %s
+
+// Check that the assembler can handle the documented syntax for AArch64
+
+//------------------------------------------------------------------------------
+// Signed integer lengthen (vector)
+//------------------------------------------------------------------------------
+        sxtl v0.8h, v1.8b
+        sxtl v0.4s, v1.4h
+        sxtl v0.2d, v1.2s
+
+// CHECK: sshll v0.8h, v1.8b, #0        // encoding: [0x20,0xa4,0x08,0x0f]
+// CHECK: sshll v0.4s, v1.4h, #0        // encoding: [0x20,0xa4,0x10,0x0f]
+// CHECK: sshll v0.2d, v1.2s, #0        // encoding: [0x20,0xa4,0x20,0x0f]
+
+//------------------------------------------------------------------------------
+// Signed integer lengthen (vector, second part)
+//------------------------------------------------------------------------------
+
+        sxtl2 v0.8h, v1.16b
+        sxtl2 v0.4s, v1.8h
+        sxtl2 v0.2d, v1.4s
+
+// CHECK: sshll2 v0.8h, v1.16b, #0        // encoding: [0x20,0xa4,0x08,0x4f]
+// CHECK: sshll2 v0.4s, v1.8h, #0        // encoding: [0x20,0xa4,0x10,0x4f]
+// CHECK: sshll2 v0.2d, v1.4s, #0        // encoding: [0x20,0xa4,0x20,0x4f]
diff --git a/test/MC/AArch64/neon-uxtl.s b/test/MC/AArch64/neon-uxtl.s
new file mode 100644
index 0000000..685b636
--- /dev/null
+++ b/test/MC/AArch64/neon-uxtl.s
@@ -0,0 +1,26 @@
+// RUN: llvm-mc -triple=aarch64-none-linux-gnu -mattr=+neon -show-encoding < %s | FileCheck %s
+
+// Check that the assembler can handle the documented syntax for AArch64
+
+//------------------------------------------------------------------------------
+// Unsigned integer lengthen (vector)
+//------------------------------------------------------------------------------
+        uxtl v0.8h, v1.8b
+        uxtl v0.4s, v1.4h
+        uxtl v0.2d, v1.2s
+
+// CHECK: ushll v0.8h, v1.8b, #0        // encoding: [0x20,0xa4,0x08,0x2f]
+// CHECK: ushll v0.4s, v1.4h, #0        // encoding: [0x20,0xa4,0x10,0x2f]
+// CHECK: ushll v0.2d, v1.2s, #0        // encoding: [0x20,0xa4,0x20,0x2f]
+
+//------------------------------------------------------------------------------
+// Unsigned integer lengthen (vector, second part)
+//------------------------------------------------------------------------------
+
+        uxtl2 v0.8h, v1.16b
+        uxtl2 v0.4s, v1.8h
+        uxtl2 v0.2d, v1.4s
+
+// CHECK: ushll2 v0.8h, v1.16b, #0       // encoding: [0x20,0xa4,0x08,0x6f]
+// CHECK: ushll2 v0.4s, v1.8h, #0        // encoding: [0x20,0xa4,0x10,0x6f]
+// CHECK: ushll2 v0.2d, v1.4s, #0        // encoding: [0x20,0xa4,0x20,0x6f]
diff --git a/test/MC/AArch64/optional-hash.s b/test/MC/AArch64/optional-hash.s
new file mode 100644
index 0000000..54b6fb3
--- /dev/null
+++ b/test/MC/AArch64/optional-hash.s
@@ -0,0 +1,17 @@
+// PR18929
+// RUN: llvm-mc < %s -triple=aarch64-linux-gnueabi -mattr=+fp-armv8,+neon -filetype=obj -o - \
+// RUN: | llvm-objdump --disassemble -arch=aarch64 -mattr=+fp-armv8,+neon - | FileCheck %s
+
+    .text
+// CHECK: cmp w0, #123
+    cmp w0, 123
+// CHECK: fmov s0, #1.06250000
+    fmov s0, 1.0625
+// CHECK: fcmp s0, #0.0
+    fcmp s0, 0.0
+// CHECK: cmgt v0.8b, v15.8b, #0
+    cmgt v0.8b, v15.8b, 0
+// CHECK: fcmeq v0.2s, v31.2s, #0.0
+    fcmeq v0.2s, v31.2s, 0.0
+l1:
+l2:
diff --git a/test/MC/ARM/2013-03-18-Br-to-label-named-like-reg.s b/test/MC/ARM/2013-03-18-Br-to-label-named-like-reg.s
index 172abcf..66fba3b 100644
--- a/test/MC/ARM/2013-03-18-Br-to-label-named-like-reg.s
+++ b/test/MC/ARM/2013-03-18-Br-to-label-named-like-reg.s
@@ -1,5 +1,6 @@
-@ RUN: llvm-mc -arch arm %s
+@ RUN: llvm-mc -triple arm-eabi %s -o - | FileCheck %s
+
 @ CHECK: test:
-@ CHECK: br r1
+@ CHECK: bl r1
 test:
   bl r1
diff --git a/test/MC/ARM/arm-elf-symver.s b/test/MC/ARM/arm-elf-symver.s
new file mode 100644
index 0000000..5fb1f6a
--- /dev/null
+++ b/test/MC/ARM/arm-elf-symver.s
@@ -0,0 +1,143 @@
+@ RUN: llvm-mc -filetype=obj -triple arm-none-linux-gnueabi %s -o - | llvm-readobj -r -t | FileCheck %s
+@ RUN: llvm-mc -filetype=obj -triple thumb-none-linux-gnueabi %s -o - | llvm-readobj -r -t | FileCheck %s
+
+defined1:
+defined2:
+defined3:
+        .symver defined1, bar1@zed
+        .symver undefined1, bar2@zed
+
+        .symver defined2, bar3@@zed
+
+        .symver defined3, bar5@@@zed
+        .symver undefined3, bar6@@@zed
+
+        .long defined1
+        .long undefined1
+        .long defined2
+        .long defined3
+        .long undefined3
+
+        .global global1
+        .symver global1, g1@@zed
+global1:
+
+@ CHECK: Relocations [
+@ CHECK-NEXT:   Section (2) .rel.text {
+@ CHECK-NEXT:     0x0 R_ARM_ABS32 .text 0x0
+@ CHECK-NEXT:     0x4 R_ARM_ABS32 bar2@zed 0x0
+@ CHECK-NEXT:     0x8 R_ARM_ABS32 .text 0x0
+@ CHECK-NEXT:     0xC R_ARM_ABS32 .text 0x0
+@ CHECK-NEXT:     0x10 R_ARM_ABS32 bar6@zed 0x0
+@ CHECK-NEXT:   }
+@ CHECK-NEXT: ]
+
+@ CHECK:  Symbol {
+@ CHECK:    Name: bar1@zed
+@ CHECK-NEXT:     Value: 0x0
+@ CHECK-NEXT:     Size: 0
+@ CHECK-NEXT:     Binding: Local (0x0)
+@ CHECK-NEXT:     Type: None (0x0)
+@ CHECK-NEXT:     Other: 0
+@ CHECK-NEXT:     Section: .text (0x1)
+@ CHECK-NEXT:   }
+@ CHECK-NEXT:   Symbol {
+@ CHECK-NEXT:     Name: bar3@@zed
+@ CHECK-NEXT:     Value: 0x0
+@ CHECK-NEXT:     Size: 0
+@ CHECK-NEXT:     Binding: Local (0x0)
+@ CHECK-NEXT:     Type: None (0x0)
+@ CHECK-NEXT:     Other: 0
+@ CHECK-NEXT:     Section: .text (0x1)
+@ CHECK-NEXT:   }
+@ CHECK-NEXT:   Symbol {
+@ CHECK-NEXT:     Name: bar5@@zed
+@ CHECK-NEXT:     Value: 0x0
+@ CHECK-NEXT:     Size: 0
+@ CHECK-NEXT:     Binding: Local (0x0)
+@ CHECK-NEXT:     Type: None (0x0)
+@ CHECK-NEXT:     Other: 0
+@ CHECK-NEXT:     Section: .text (0x1)
+@ CHECK-NEXT:   }
+@ CHECK-NEXT:   Symbol {
+@ CHECK-NEXT:     Name: defined1
+@ CHECK-NEXT:     Value: 0x0
+@ CHECK-NEXT:     Size: 0
+@ CHECK-NEXT:     Binding: Local (0x0)
+@ CHECK-NEXT:     Type: None (0x0)
+@ CHECK-NEXT:     Other: 0
+@ CHECK-NEXT:     Section: .text (0x1)
+@ CHECK-NEXT:   }
+@ CHECK-NEXT:   Symbol {
+@ CHECK-NEXT:     Name: defined2
+@ CHECK-NEXT:     Value: 0x0
+@ CHECK-NEXT:     Size: 0
+@ CHECK-NEXT:     Binding: Local (0x0)
+@ CHECK-NEXT:     Type: None (0x0)
+@ CHECK-NEXT:     Other: 0
+@ CHECK-NEXT:     Section: .text (0x1)
+@ CHECK-NEXT:   }
+@ CHECK-NEXT:   Symbol {
+@ CHECK-NEXT:     Name: .text (0)
+@ CHECK-NEXT:     Value: 0x0
+@ CHECK-NEXT:     Size: 0
+@ CHECK-NEXT:     Binding: Local (0x0)
+@ CHECK-NEXT:     Type: Section (0x3)
+@ CHECK-NEXT:     Other: 0
+@ CHECK-NEXT:     Section: .text (0x1)
+@ CHECK-NEXT:   }
+@ CHECK-NEXT:   Symbol {
+@ CHECK-NEXT:     Name: .data (0)
+@ CHECK-NEXT:     Value: 0x0
+@ CHECK-NEXT:     Size: 0
+@ CHECK-NEXT:     Binding: Local (0x0)
+@ CHECK-NEXT:     Type: Section (0x3)
+@ CHECK-NEXT:     Other: 0
+@ CHECK-NEXT:     Section: .data (0x3)
+@ CHECK-NEXT:   }
+@ CHECK-NEXT:   Symbol {
+@ CHECK-NEXT:     Name: .bss (0)
+@ CHECK-NEXT:     Value: 0x0
+@ CHECK-NEXT:     Size: 0
+@ CHECK-NEXT:     Binding: Local (0x0)
+@ CHECK-NEXT:     Type: Section (0x3)
+@ CHECK-NEXT:     Other: 0
+@ CHECK-NEXT:     Section: .bss (0x4)
+@ CHECK-NEXT:   }
+@ CHECK-NEXT:   Symbol {
+@ CHECK-NEXT:     Name: g1@@zed
+@ CHECK-NEXT:     Value: 0x14
+@ CHECK-NEXT:     Size: 0
+@ CHECK-NEXT:     Binding: Global (0x1)
+@ CHECK-NEXT:     Type: None (0x0)
+@ CHECK-NEXT:     Other: 0
+@ CHECK-NEXT:     Section: .text (0x1)
+@ CHECK-NEXT:   }
+@ CHECK-NEXT:   Symbol {
+@ CHECK-NEXT:     Name: global1
+@ CHECK-NEXT:     Value: 0x14
+@ CHECK-NEXT:     Size: 0
+@ CHECK-NEXT:     Binding: Global (0x1)
+@ CHECK-NEXT:     Type: None (0x0)
+@ CHECK-NEXT:     Other: 0
+@ CHECK-NEXT:     Section: .text (0x1)
+@ CHECK-NEXT:   }
+@ CHECK-NEXT:   Symbol {
+@ CHECK-NEXT:     Name: bar2@zed
+@ CHECK-NEXT:     Value: 0x0
+@ CHECK-NEXT:     Size: 0
+@ CHECK-NEXT:     Binding: Global (0x1)
+@ CHECK-NEXT:     Type: None (0x0)
+@ CHECK-NEXT:     Other: 0
+@ CHECK-NEXT:     Section: Undefined (0x0)
+@ CHECK-NEXT:   }
+@ CHECK-NEXT:   Symbol {
+@ CHECK-NEXT:     Name: bar6@zed
+@ CHECK-NEXT:     Value: 0x0
+@ CHECK-NEXT:     Size: 0
+@ CHECK-NEXT:     Binding: Global (0x1)
+@ CHECK-NEXT:     Type: None (0x0)
+@ CHECK-NEXT:     Other: 0
+@ CHECK-NEXT:     Section: Undefined (0x0)
+@ CHECK-NEXT:   }
+@ CHECK-NEXT: ]
diff --git a/test/MC/ARM/arm-ldrd.s b/test/MC/ARM/arm-ldrd.s
index c26ee25..af4bc73 100644
--- a/test/MC/ARM/arm-ldrd.s
+++ b/test/MC/ARM/arm-ldrd.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -arch arm -mattr=+v5te %s 2>&1 | FileCheck %s
+// RUN: not llvm-mc -triple arm-eabi -mattr=+v5te %s -o /dev/null 2>&1 | FileCheck %s
 //
 // rdar://14479793
 
diff --git a/test/MC/ARM/arm-memory-instructions.s b/test/MC/ARM/arm-memory-instructions.s
index ad35dd2..f41c779 100644
--- a/test/MC/ARM/arm-memory-instructions.s
+++ b/test/MC/ARM/arm-memory-instructions.s
@@ -485,3 +485,14 @@ Lbaz: .quad 0
 @ CHECK: strht	r8, [r1], #-25          @ encoding: [0xb9,0x81,0x61,0xe0]
 @ CHECK: strht	r5, [r3], r4            @ encoding: [0xb4,0x50,0xa3,0xe0]
 @ CHECK: strht	r6, [r8], -r0           @ encoding: [0xb0,0x60,0x28,0xe0]
+
+@------------------------------------------------------------------------------
+@ GNU Assembler Compatibility
+@------------------------------------------------------------------------------
+
+	ldrd r0, [sp]
+	strd r0, [sp]
+
+@ CHECK: ldrd r0, r1, [sp]              @ encoding: [0xd0,0x00,0xcd,0xe1]
+@ CHECK: strd r0, r1, [sp]              @ encoding: [0xf0,0x00,0xcd,0xe1]
+
diff --git a/test/MC/ARM/arm-qualifier-diagnostics.s b/test/MC/ARM/arm-qualifier-diagnostics.s
new file mode 100644
index 0000000..8b75eee
--- /dev/null
+++ b/test/MC/ARM/arm-qualifier-diagnostics.s
@@ -0,0 +1,15 @@
+@ RUN: not llvm-mc -triple armv7-eabi -filetype asm -o - %s 2>&1 | FileCheck %s
+
+	.syntax unified
+
+	.type function,%function
+function:
+	ldr.n r0, [r0]
+
+@ CHECK: error: instruction with .n (narrow) qualifier not allowed in arm mode
+@ CHECK: 	ldr.n r0, [r0]
+@ CHECK:           ^
+@ CHECK-NOT: error: unexpected token in operand
+@ CHECK-NOT: 	ldr.n r0, [r0]
+@ CHECK-NOT:            ^
+
diff --git a/test/MC/ARM/arm_addrmode2.s b/test/MC/ARM/arm_addrmode2.s
index ca99233..53290ab 100644
--- a/test/MC/ARM/arm_addrmode2.s
+++ b/test/MC/ARM/arm_addrmode2.s
@@ -4,27 +4,35 @@
 @ CHECK: ldrt  r1, [r0], r2 @ encoding: [0x02,0x10,0xb0,0xe6]
 @ CHECK: ldrt  r1, [r0], r2, lsr #3 @ encoding: [0xa2,0x11,0xb0,0xe6]
 @ CHECK: ldrt  r1, [r0], #4 @ encoding: [0x04,0x10,0xb0,0xe4]
+@ CHECK: ldrt  r1, [r0], #0 @ encoding: [0x00,0x10,0xb0,0xe4]
 @ CHECK: ldrbt  r1, [r0], r2 @ encoding: [0x02,0x10,0xf0,0xe6]
 @ CHECK: ldrbt  r1, [r0], r2, lsr #3 @ encoding: [0xa2,0x11,0xf0,0xe6]
 @ CHECK: ldrbt  r1, [r0], #4 @ encoding: [0x04,0x10,0xf0,0xe4]
+@ CHECK: ldrbt  r1, [r0], #0 @ encoding: [0x00,0x10,0xf0,0xe4]
 @ CHECK: strt  r1, [r0], r2 @ encoding: [0x02,0x10,0xa0,0xe6]
 @ CHECK: strt  r1, [r0], r2, lsr #3 @ encoding: [0xa2,0x11,0xa0,0xe6]
 @ CHECK: strt  r1, [r0], #4 @ encoding: [0x04,0x10,0xa0,0xe4]
+@ CHECK: strt  r1, [r0], #0 @ encoding: [0x00,0x10,0xa0,0xe4]
 @ CHECK: strbt  r1, [r0], r2 @ encoding: [0x02,0x10,0xe0,0xe6]
 @ CHECK: strbt  r1, [r0], r2, lsr #3 @ encoding: [0xa2,0x11,0xe0,0xe6]
 @ CHECK: strbt  r1, [r0], #4 @ encoding: [0x04,0x10,0xe0,0xe4]
+@ CHECK: strbt  r1, [r0], #0 @ encoding: [0x00,0x10,0xe0,0xe4]
         ldrt  r1, [r0], r2
         ldrt  r1, [r0], r2, lsr #3
         ldrt  r1, [r0], #4
+        ldrt  r1, [r0]
         ldrbt  r1, [r0], r2
         ldrbt  r1, [r0], r2, lsr #3
         ldrbt  r1, [r0], #4
+        ldrbt  r1, [r0]
         strt  r1, [r0], r2
         strt  r1, [r0], r2, lsr #3
         strt  r1, [r0], #4
+        strt  r1, [r0]
         strbt  r1, [r0], r2
         strbt  r1, [r0], r2, lsr #3
         strbt  r1, [r0], #4
+        strbt  r1, [r0]
 
 @ Pre-indexed
 @ CHECK: ldr  r1, [r0, r2, lsr #3]! @ encoding: [0xa2,0x11,0xb0,0xe7]
diff --git a/test/MC/ARM/arm_fixups.s b/test/MC/ARM/arm_fixups.s
index 99eb3c5..bd6906b 100644
--- a/test/MC/ARM/arm_fixups.s
+++ b/test/MC/ARM/arm_fixups.s
@@ -1,9 +1,13 @@
 @ RUN: llvm-mc -triple armv7-unknown-unknown %s --show-encoding > %t
 @ RUN: FileCheck < %t %s
+@ RUN: llvm-mc -triple armebv7-unknown-unknown %s --show-encoding > %t
+@ RUN: FileCheck --check-prefix=CHECK-BE < %t %s
 
     bl _printf
 @ CHECK: bl _printf @ encoding: [A,A,A,0xeb]
 @ CHECK: @ fixup A - offset: 0, value: _printf, kind: fixup_arm_uncondbl
+@ CHECK-BE: bl _printf @ encoding: [0xeb,A,A,A]
+@ CHECK-BE: @ fixup A - offset: 0, value: _printf, kind: fixup_arm_uncondbl
 
     mov r9, :lower16:(_foo)
     movw r9, :lower16:(_foo)
@@ -11,12 +15,20 @@
 
 @ CHECK: movw	r9, :lower16:_foo       @ encoding: [A,0x90'A',0b0000AAAA,0xe3]
 @ CHECK: @   fixup A - offset: 0, value: _foo, kind: fixup_arm_movw_lo16
+@ CHECK-BE: movw	r9, :lower16:_foo       @ encoding: [0xe3,0b0000AAAA,0x90'A',A]
+@ CHECK-BE: @   fixup A - offset: 0, value: _foo, kind: fixup_arm_movw_lo16
 @ CHECK: movw	r9, :lower16:_foo       @ encoding: [A,0x90'A',0b0000AAAA,0xe3]
 @ CHECK: @   fixup A - offset: 0, value: _foo, kind: fixup_arm_movw_lo16
+@ CHECK-BE: movw	r9, :lower16:_foo       @ encoding: [0xe3,0b0000AAAA,0x90'A',A]
+@ CHECK-BE: @   fixup A - offset: 0, value: _foo, kind: fixup_arm_movw_lo16
 @ CHECK: movt	r9, :upper16:_foo       @ encoding: [A,0x90'A',0b0100AAAA,0xe3]
 @ CHECK: @   fixup A - offset: 0, value: _foo, kind: fixup_arm_movt_hi16
+@ CHECK-BE: movt	r9, :upper16:_foo       @ encoding: [0xe3,0b0100AAAA,0x90'A',A]
+@ CHECK-BE: @   fixup A - offset: 0, value: _foo, kind: fixup_arm_movt_hi16
 
     mov r2, fred
 
 @ CHECK: movw  r2, fred                 @ encoding: [A,0x20'A',0b0000AAAA,0xe3]
 @ CHECK: @   fixup A - offset: 0, value: fred, kind: fixup_arm_movw_lo16
+@ CHECK-BE: movw  r2, fred                 @ encoding: [0xe3,0b0000AAAA,0x20'A',A]
+@ CHECK-BE: @   fixup A - offset: 0, value: fred, kind: fixup_arm_movw_lo16
diff --git a/test/MC/ARM/arm_word_directive.s b/test/MC/ARM/arm_word_directive.s
deleted file mode 100644
index e782479..0000000
--- a/test/MC/ARM/arm_word_directive.s
+++ /dev/null
@@ -1,6 +0,0 @@
-@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown %s | FileCheck %s
-
-@ CHECK: TEST0:
-@ CHECK: .long 3
-TEST0:  
-        .word 3
diff --git a/test/MC/ARM/basic-arm-instructions.s b/test/MC/ARM/basic-arm-instructions.s
index 29bc6c0..e5e9617 100644
--- a/test/MC/ARM/basic-arm-instructions.s
+++ b/test/MC/ARM/basic-arm-instructions.s
@@ -1,4 +1,5 @@
 @ RUN: llvm-mc -triple=armv7-apple-darwin -mcpu=cortex-a8 -show-encoding < %s | FileCheck %s
+@ RUN: llvm-mc -triple=armebv7-unknown-unknown -mcpu=cortex-a8 -show-encoding < %s | FileCheck --check-prefix=CHECK-BE %s
   .syntax unified
   .globl _func
 
@@ -135,8 +136,12 @@ Lforward:
 @ CHECK: Lback:
 @ CHECK: adr	r2, Lback    @ encoding: [A,0x20'A',0x0f'A',0xe2'A']
 @ CHECK:  @   fixup A - offset: 0, value: Lback, kind: fixup_arm_adr_pcrel_12
+@ CHECK-BE: adr	r2, Lback    @ encoding: [0xe2'A',0x0f'A',0x20'A',A]
+@ CHECK-BE:  @   fixup A - offset: 0, value: Lback, kind: fixup_arm_adr_pcrel_12
 @ CHECK: adr	r3, Lforward @ encoding: [A,0x30'A',0x0f'A',0xe2'A']
 @ CHECK:  @   fixup A - offset: 0, value: Lforward, kind: fixup_arm_adr_pcrel_12
+@ CHECK-BE: adr	r3, Lforward @ encoding: [0xe2'A',0x0f'A',0x30'A',A]
+@ CHECK-BE:  @   fixup A - offset: 0, value: Lforward, kind: fixup_arm_adr_pcrel_12
 @ CHECK: Lforward:
 @ CHECK: adr	r2, #3                  @ encoding: [0x03,0x20,0x8f,0xe2]
 @ CHECK: adr	r2, #-3                 @ encoding: [0x03,0x20,0x4f,0xe2]
@@ -310,9 +315,13 @@ Lforward:
         beq _baz
 
 @ CHECK: b	_bar                    @ encoding: [A,A,A,0xea]
-             @   fixup A - offset: 0, value: _bar, kind: fixup_arm_uncondbranch
+@ CHECK: @   fixup A - offset: 0, value: _bar, kind: fixup_arm_uncondbranch
+@ CHECK-BE: b	_bar                    @ encoding: [0xea,A,A,A]
+@ CHECK-BE: @   fixup A - offset: 0, value: _bar, kind: fixup_arm_uncondbranch
 @ CHECK: beq	_baz                    @ encoding: [A,A,A,0x0a]
-             @   fixup A - offset: 0, value: _baz, kind: fixup_arm_condbranch
+@ CHECK: @   fixup A - offset: 0, value: _baz, kind: fixup_arm_condbranch
+@ CHECK-BE: beq	_baz                    @ encoding: [0x0a,A,A,A]
+@ CHECK-BE: @   fixup A - offset: 0, value: _baz, kind: fixup_arm_condbranch
 
 
 @------------------------------------------------------------------------------
@@ -420,10 +429,16 @@ Lforward:
 
 @ CHECK: bl  _bar @ encoding: [A,A,A,0xeb]
 @ CHECK:   @   fixup A - offset: 0, value: _bar, kind: fixup_arm_uncondbl
+@ CHECK-BE: bl  _bar @ encoding: [0xeb,A,A,A]
+@ CHECK-BE:   @   fixup A - offset: 0, value: _bar, kind: fixup_arm_uncondbl
 @ CHECK: bleq  _bar @ encoding: [A,A,A,0x0b]
 @ CHECK:   @   fixup A - offset: 0, value: _bar, kind: fixup_arm_condbl
+@ CHECK-BE: bleq  _bar @ encoding: [0x0b,A,A,A]
+@ CHECK-BE:   @   fixup A - offset: 0, value: _bar, kind: fixup_arm_condbl
 @ CHECK: blx	_bar @ encoding: [A,A,A,0xfa]
-           @   fixup A - offset: 0, value: _bar, kind: fixup_arm_blx
+@ CHECK:   @   fixup A - offset: 0, value: _bar, kind: fixup_arm_blx
+@ CHECK-BE: blx	_bar @ encoding: [0xfa,A,A,A]
+@ CHECK-BE:   @   fixup A - offset: 0, value: _bar, kind: fixup_arm_blx
 @ CHECK: blls	#28634268               @ encoding: [0x27,0x3b,0x6d,0x9b]
 @ CHECK: blx	#32424576               @ encoding: [0xa0,0xb0,0x7b,0xfa]
 @ CHECK: blx	#16212288               @ encoding: [0x50,0xd8,0x3d,0xfa]
diff --git a/test/MC/ARM/basic-thumb-instructions.s b/test/MC/ARM/basic-thumb-instructions.s
index dec7f5b..30ab733 100644
--- a/test/MC/ARM/basic-thumb-instructions.s
+++ b/test/MC/ARM/basic-thumb-instructions.s
@@ -4,6 +4,7 @@
 @---
 @ RUN: llvm-mc -triple=thumbv6-apple-darwin -show-encoding < %s | FileCheck %s
 @ RUN: llvm-mc -triple=thumbv7-apple-darwin -show-encoding < %s | FileCheck %s
+@ RUN: llvm-mc -triple=thumbebv7-unknown-unknown -show-encoding < %s | FileCheck --check-prefix=CHECK-BE %s
   .syntax unified
   .globl _func
 
@@ -90,7 +91,9 @@ _func:
         adr r3, #1020
 
 @ CHECK: adr	r2, _baz                @ encoding: [A,0xa2]
-            @   fixup A - offset: 0, value: _baz, kind: fixup_thumb_adr_pcrel_10
+@ CHECK:    @   fixup A - offset: 0, value: _baz, kind: fixup_thumb_adr_pcrel_10
+@ CHECK-BE: adr	r2, _baz                @ encoding: [0xa2,A]
+@ CHECK-BE:    @   fixup A - offset: 0, value: _baz, kind: fixup_thumb_adr_pcrel_10
 @ CHECK: adr	r5, #0                  @ encoding: [0x00,0xa5]
 @ CHECK: adr	r2, #4                  @ encoding: [0x01,0xa2]
 @ CHECK: adr	r3, #1020               @ encoding: [0xff,0xa3]
@@ -132,9 +135,13 @@ _func:
         beq     #160
 
 @ CHECK: b	_baz                    @ encoding: [A,0xe0'A']
-             @   fixup A - offset: 0, value: _baz, kind: fixup_arm_thumb_br
+@ CHECK:     @   fixup A - offset: 0, value: _baz, kind: fixup_arm_thumb_br
+@ CHECK-BE: b	_baz                    @ encoding: [0xe0'A',A]
+@ CHECK-BE:     @   fixup A - offset: 0, value: _baz, kind: fixup_arm_thumb_br
 @ CHECK: beq	_bar                    @ encoding: [A,0xd0]
-             @   fixup A - offset: 0, value: _bar, kind: fixup_arm_thumb_bcc
+@ CHECK:     @   fixup A - offset: 0, value: _bar, kind: fixup_arm_thumb_bcc
+@ CHECK-BE: beq	_bar                    @ encoding: [0xd0,A]
+@ CHECK-BE:     @   fixup A - offset: 0, value: _bar, kind: fixup_arm_thumb_bcc
 @ CHECK: b       #1838                   @ encoding: [0x97,0xe3]
 @ CHECK: b       #-420                   @ encoding: [0x2e,0xe7]
 @ CHECK: beq     #-256                   @ encoding: [0x80,0xd0]
@@ -174,9 +181,13 @@ _func:
         blx _baz
 
 @ CHECK: bl	_bar                    @ encoding: [A,0xf0'A',A,0xd0'A']
-             @   fixup A - offset: 0, value: _bar, kind: fixup_arm_thumb_bl
+@ CHECK:     @   fixup A - offset: 0, value: _bar, kind: fixup_arm_thumb_bl
+@ CHECK-BE: bl	_bar                    @ encoding: [0xf0'A',A,0xd0'A',A]
+@ CHECK-BE:     @   fixup A - offset: 0, value: _bar, kind: fixup_arm_thumb_bl
 @ CHECK: blx	_baz                    @ encoding: [A,0xf0'A',A,0xc0'A']
-             @   fixup A - offset: 0, value: _baz, kind: fixup_arm_thumb_blx
+@ CHECK:     @   fixup A - offset: 0, value: _baz, kind: fixup_arm_thumb_blx
+@ CHECK-BE: blx	_baz                    @ encoding: [0xf0'A',A,0xc0'A',A]
+@ CHECK-BE:     @   fixup A - offset: 0, value: _baz, kind: fixup_arm_thumb_blx
 
 
 @------------------------------------------------------------------------------
@@ -272,7 +283,9 @@ _func:
         ldr     r3, #368
 
 @ CHECK: ldr	r1, _foo                @ encoding: [A,0x49]
-             @   fixup A - offset: 0, value: _foo, kind: fixup_arm_thumb_cp
+@ CHECK:     @   fixup A - offset: 0, value: _foo, kind: fixup_arm_thumb_cp
+@ CHECK-BE: ldr	r1, _foo                @ encoding: [0x49,A]
+@ CHECK-BE:     @   fixup A - offset: 0, value: _foo, kind: fixup_arm_thumb_cp
 @ CHECK: ldr     r3, [pc, #604]         @ encoding: [0x97,0x4b]
 @ CHECK: ldr     r3, [pc, #368]         @ encoding: [0x5c,0x4b]
 
diff --git a/test/MC/ARM/basic-thumb2-instructions.s b/test/MC/ARM/basic-thumb2-instructions.s
index 3a5f488..a8c9cdc 100644
--- a/test/MC/ARM/basic-thumb2-instructions.s
+++ b/test/MC/ARM/basic-thumb2-instructions.s
@@ -1,4 +1,5 @@
 @ RUN: llvm-mc -triple=thumbv7-apple-darwin -mcpu=cortex-a8 -show-encoding < %s | FileCheck %s
+@ RUN: llvm-mc -triple=thumbebv7-unknown-unknown -mcpu=cortex-a8 -show-encoding < %s | FileCheck --check-prefix=CHECK-BE %s
   .syntax unified
   .globl _func
 
@@ -227,12 +228,18 @@ _func:
         bmi.w   #-183396
 
 @ CHECK: b.w	_bar                    @ encoding: [A,0xf0'A',A,0x90'A']
-          @   fixup A - offset: 0, value: _bar, kind: fixup_t2_uncondbranch
+@ CHECK:  @   fixup A - offset: 0, value: _bar, kind: fixup_t2_uncondbranch
+@ CHECK-BE: b.w	_bar                    @ encoding: [0xf0'A',A,0x90'A',A]
+@ CHECK-BE:  @   fixup A - offset: 0, value: _bar, kind: fixup_t2_uncondbranch
 @ CHECK: beq.w	_bar                    @ encoding: [A,0xf0'A',A,0x80'A']
-          @   fixup A - offset: 0, value: _bar, kind: fixup_t2_condbranch
+@ CHECK:  @   fixup A - offset: 0, value: _bar, kind: fixup_t2_condbranch
+@ CHECK-BE: beq.w	_bar                    @ encoding: [0xf0'A',A,0x80'A',A]
+@ CHECK-BE:  @   fixup A - offset: 0, value: _bar, kind: fixup_t2_condbranch
 @ CHECK: it	eq                      @ encoding: [0x08,0xbf]
 @ CHECK: beq.w	_bar                    @ encoding: [A,0xf0'A',A,0x90'A']
-          @   fixup A - offset: 0, value: _bar, kind: fixup_t2_uncondbranch
+@ CHECK:  @   fixup A - offset: 0, value: _bar, kind: fixup_t2_uncondbranch
+@ CHECK-BE: beq.w	_bar                    @ encoding: [0xf0'A',A,0x90'A',A]
+@ CHECK-BE:  @   fixup A - offset: 0, value: _bar, kind: fixup_t2_uncondbranch
 @ CHECK: bmi.w   #-183396                @ encoding: [0x13,0xf5,0xce,0xa9]
 
 
@@ -332,9 +339,13 @@ _func:
 @ CHECK: cbnz    r7, #6                  @ encoding: [0x1f,0xb9]
 @ CHECK: cbnz    r7, #12                 @ encoding: [0x37,0xb9]
 @ CHECK: cbz	r6, _bar                @ encoding: [0x06'A',0xb1'A']
-           @   fixup A - offset: 0, value: _bar, kind: fixup_arm_thumb_cb
+@ CHECK:   @   fixup A - offset: 0, value: _bar, kind: fixup_arm_thumb_cb
+@ CHECK-BE: cbz	r6, _bar                @ encoding: [0xb1'A',0x06'A']
+@ CHECK-BE:   @   fixup A - offset: 0, value: _bar, kind: fixup_arm_thumb_cb
 @ CHECK: cbnz	r6, _bar                @ encoding: [0x06'A',0xb9'A']
-           @   fixup A - offset: 0, value: _bar, kind: fixup_arm_thumb_cb
+@ CHECK:   @   fixup A - offset: 0, value: _bar, kind: fixup_arm_thumb_cb
+@ CHECK-BE: cbnz	r6, _bar                @ encoding: [0xb9'A',0x06'A']
+@ CHECK-BE:   @   fixup A - offset: 0, value: _bar, kind: fixup_arm_thumb_cb
 
 
 @------------------------------------------------------------------------------
@@ -800,11 +811,20 @@ _func:
 @------------------------------------------------------------------------------
         ldr.w r5, _foo
         ldr   lr, (_strcmp-4)
+        ldr sp, _foo
 
 @ CHECK: ldr.w	r5, _foo                @ encoding: [0x5f'A',0xf8'A',A,0x50'A']
 @ CHECK: @   fixup A - offset: 0, value: _foo, kind: fixup_t2_ldst_pcrel_12
+@ CHECK-BE: ldr.w	r5, _foo                @ encoding: [0xf8'A',0x5f'A',0x50'A',A]
+@ CHECK-BE: @   fixup A - offset: 0, value: _foo, kind: fixup_t2_ldst_pcrel_12
 @ CHECK: ldr.w	lr, _strcmp-4           @ encoding: [0x5f'A',0xf8'A',A,0xe0'A']
 @ CHECK: @   fixup A - offset: 0, value: _strcmp-4, kind: fixup_t2_ldst_pcrel_12
+@ CHECK-BE: ldr.w	lr, _strcmp-4           @ encoding: [0xf8'A',0x5f'A',0xe0'A',A]
+@ CHECK-BE: @   fixup A - offset: 0, value: _strcmp-4, kind: fixup_t2_ldst_pcrel_12
+@ CHECK: ldr.w sp, _foo                 @ encoding: [0x5f'A',0xf8'A',A,0xd0'A']
+@ CHECK: @   fixup A - offset: 0, value: _foo, kind: fixup_t2_ldst_pcrel_12
+@ CHECK-BE: ldr.w sp, _foo                 @ encoding: [0xf8'A',0x5f'A',0xd0'A',A]
+@ CHECK-BE: @   fixup A - offset: 0, value: _foo, kind: fixup_t2_ldst_pcrel_12
 
         ldr r7, [pc, #8]
         ldr.n r7, [pc, #8]
@@ -818,19 +838,21 @@ _func:
         ldr r8, [pc, #132]
         ldr pc, [pc, #256]
         ldr pc, [pc, #-400]
+        ldr sp, [pc, #4]
 
 @ CHECK: ldr	r7, [pc, #8]            @ encoding: [0x02,0x4f]
 @ CHECK: ldr	r7, [pc, #8]            @ encoding: [0x02,0x4f]
 @ CHECK: ldr.w	r7, [pc, #8]            @ encoding: [0xdf,0xf8,0x08,0x70]
-@ CHECK: ldr	r4, [pc, #1020]       @ encoding: [0xff,0x4c]
+@ CHECK: ldr	r4, [pc, #1020]         @ encoding: [0xff,0x4c]
 @ CHECK: ldr.w	r3, [pc, #-1020]        @ encoding: [0x5f,0xf8,0xfc,0x33]
-@ CHECK: ldr.w	r6, [pc, #1024]       @ encoding: [0xdf,0xf8,0x00,0x64]
-@ CHECK: ldr.w	r0, [pc, #-1024]      @ encoding: [0x5f,0xf8,0x00,0x04]
-@ CHECK: ldr.w	r2, [pc, #4095]       @ encoding: [0xdf,0xf8,0xff,0x2f]
-@ CHECK: ldr.w	r1, [pc, #-4095]      @ encoding: [0x5f,0xf8,0xff,0x1f]
-@ CHECK: ldr.w	r8, [pc, #132]        @ encoding: [0xdf,0xf8,0x84,0x80]
+@ CHECK: ldr.w	r6, [pc, #1024]         @ encoding: [0xdf,0xf8,0x00,0x64]
+@ CHECK: ldr.w	r0, [pc, #-1024]        @ encoding: [0x5f,0xf8,0x00,0x04]
+@ CHECK: ldr.w	r2, [pc, #4095]         @ encoding: [0xdf,0xf8,0xff,0x2f]
+@ CHECK: ldr.w	r1, [pc, #-4095]        @ encoding: [0x5f,0xf8,0xff,0x1f]
+@ CHECK: ldr.w	r8, [pc, #132]          @ encoding: [0xdf,0xf8,0x84,0x80]
 @ CHECK: ldr.w	pc, [pc, #256]          @ encoding: [0xdf,0xf8,0x00,0xf1]
 @ CHECK: ldr.w	pc, [pc, #-400]         @ encoding: [0x5f,0xf8,0x90,0xf1]
+@ CHECK: ldr.w  sp, [pc, #4]            @ encoding: [0xdf,0xf8,0x04,0xd0]
 
         ldrb  r9, [pc, #-0]
         ldrsb r11, [pc, #-0]
@@ -839,9 +861,9 @@ _func:
         ldr   r5, [pc, #-0]
 
 @ CHECK: ldrb.w	r9, [pc, #-0]           @ encoding: [0x1f,0xf8,0x00,0x90]
-@ CHECK: ldrsb.w	r11, [pc, #-0]        @ encoding: [0x1f,0xf9,0x00,0xb0]
+@ CHECK: ldrsb.w	r11, [pc, #-0]  @ encoding: [0x1f,0xf9,0x00,0xb0]
 @ CHECK: ldrh.w	r10, [pc, #-0]          @ encoding: [0x3f,0xf8,0x00,0xa0]
-@ CHECK: ldrsh.w	r1, [pc, #-0]         @ encoding: [0x3f,0xf9,0x00,0x10]
+@ CHECK: ldrsh.w	r1, [pc, #-0]   @ encoding: [0x3f,0xf9,0x00,0x10]
 @ CHECK: ldr.w	r5, [pc, #-0]           @ encoding: [0x5f,0xf8,0x00,0x50]
 
 @------------------------------------------------------------------------------
@@ -1022,6 +1044,8 @@ _func:
 
 @ CHECK: ldrh.w	r5, _bar                @ encoding: [0x3f'A',0xf8'A',A,0x50'A']
 @ CHECK:     @   fixup A - offset: 0, value: _bar, kind: fixup_t2_ldst_pcrel_12
+@ CHECK-BE: ldrh.w	r5, _bar                @ encoding: [0xf8'A',0x3f'A',0x50'A',A]
+@ CHECK-BE:     @   fixup A - offset: 0, value: _bar, kind: fixup_t2_ldst_pcrel_12
 
 
 @------------------------------------------------------------------------------
@@ -1091,6 +1115,8 @@ _func:
 
 @ CHECK: ldrsb.w r5, _bar               @ encoding: [0x1f'A',0xf9'A',A,0x50'A']
 @ CHECK:      @   fixup A - offset: 0, value: _bar, kind: fixup_t2_ldst_pcrel_12
+@ CHECK-BE: ldrsb.w r5, _bar               @ encoding: [0xf9'A',0x1f'A',0x50'A',A]
+@ CHECK-BE:      @   fixup A - offset: 0, value: _bar, kind: fixup_t2_ldst_pcrel_12
 
 
 @------------------------------------------------------------------------------
@@ -1160,6 +1186,8 @@ _func:
 
 @ CHECK: ldrsh.w r5, _bar               @ encoding: [0x3f'A',0xf9'A',A,0x50'A']
 @ CHECK:      @   fixup A - offset: 0, value: _bar, kind: fixup_t2_ldst_pcrel_12
+@ CHECK-BE: ldrsh.w r5, _bar               @ encoding: [0xf9'A',0x3f'A',0x50'A',A]
+@ CHECK-BE:      @   fixup A - offset: 0, value: _bar, kind: fixup_t2_ldst_pcrel_12
 
 @ TEMPORARILY DISABLED:
 @        ldrsh.w r4, [pc, #1435]
diff --git a/test/MC/ARM/bkpt.s b/test/MC/ARM/bkpt.s
new file mode 100644
index 0000000..fcd4040
--- /dev/null
+++ b/test/MC/ARM/bkpt.s
@@ -0,0 +1,32 @@
+@ RUN: llvm-mc -triple armv7-unknown-unknown -filetype asm -o - %s | FileCheck %s
+
+	.syntax unified
+	.thumb
+
+	.global thumb_default_bkpt
+	.type thumb_default_bkpt, %function
+	.thumb_func
+thumb_default_bkpt:
+	bkpt
+
+@ CHECK-LABEL: thumb_default_bkpt
+@ CHECK: bkpt #0
+
+	.global normal_bkpt
+	.type normal_bkpt, %function
+normal_bkpt:
+	bkpt #42
+
+@ CHECK-LABEL: normal_bkpt
+@ CHECK: bkpt #42
+
+	.arm
+
+	.global arm_default_bkpt
+	.type arm_default_bkpt, %function
+arm_default_bkpt:
+	bkpt
+
+@ CEHCK-LABEL: arm_default_bkpt
+@ CHECK: bkpt #0
+
diff --git a/test/MC/ARM/cmp-immediate-fixup-error.s b/test/MC/ARM/cmp-immediate-fixup-error.s
new file mode 100644
index 0000000..25a2368
--- /dev/null
+++ b/test/MC/ARM/cmp-immediate-fixup-error.s
@@ -0,0 +1,7 @@
+@ RUN: not llvm-mc -triple=arm-linux-gnueabi -filetype=obj < %s 2>&1 | FileCheck %s
+
+.text
+    cmp r0, #(l1 - unknownLabel + 4) >> 2
+@ CHECK: error: expected relocatable expression
+
+l1:
diff --git a/test/MC/ARM/cmp-immediate-fixup-error2.s b/test/MC/ARM/cmp-immediate-fixup-error2.s
new file mode 100644
index 0000000..71f7fa1
--- /dev/null
+++ b/test/MC/ARM/cmp-immediate-fixup-error2.s
@@ -0,0 +1,7 @@
+@ RUN: not llvm-mc -triple=arm-linux-gnueabi -filetype=obj < %s 2>&1 | FileCheck %s
+
+.text
+    cmp r0, #(l1 - unknownLabel)
+@ CHECK: error: symbol 'unknownLabel' can not be undefined in a subtraction expression
+
+l1:
diff --git a/test/MC/ARM/cmp-immediate-fixup.s b/test/MC/ARM/cmp-immediate-fixup.s
new file mode 100644
index 0000000..e21d5c2
--- /dev/null
+++ b/test/MC/ARM/cmp-immediate-fixup.s
@@ -0,0 +1,9 @@
+@ PR18931
+@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj -o - \
+@ RUN: | llvm-objdump --disassemble -arch=arm - | FileCheck %s
+
+    .text
+@ CHECK: cmp r2, #1
+    cmp r2, #(l2 - l1 + 4) >> 2
+l1:
+l2:
diff --git a/test/MC/ARM/cmp-immediate-fixup2.s b/test/MC/ARM/cmp-immediate-fixup2.s
new file mode 100644
index 0000000..c091145
--- /dev/null
+++ b/test/MC/ARM/cmp-immediate-fixup2.s
@@ -0,0 +1,9 @@
+@ PR18931
+@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj -o - \
+@ RUN: | llvm-objdump --disassemble -arch=arm - | FileCheck %s
+
+    .text
+@ CHECK: cmp r2, #0
+    cmp r2, #(l2 - l1)
+l1:
+l2:
diff --git a/test/MC/ARM/comment.s b/test/MC/ARM/comment.s
new file mode 100644
index 0000000..c24bc1a
--- /dev/null
+++ b/test/MC/ARM/comment.s
@@ -0,0 +1,47 @@
+@ Tests to check that '@' does not get lexed as an identifier for arm
+@ RUN: llvm-mc %s -triple=armv7-linux-gnueabi  | FileCheck %s
+@ RUN: llvm-mc %s -triple=armv7-linux-gnueabi 2>&1 | FileCheck %s --check-prefix=ERROR
+
+foo:
+  bl boo@plt should be ignored
+  bl goo@plt
+  .long bar@got to parse this as a comment
+  .long baz@got
+  add r0, r0@ignore this extra junk
+
+@ the symver directive should allow @ in the second symbol name
+defined1:
+defined2:
+defined3:
+bar:
+  .symver defined1, bar1@zed
+  .symver defined2, bar3@@zed
+  .symver defined3, bar5@@@zed
+
+far:
+  .long baz@got
+
+@CHECK-LABEL: foo:
+@CHECK: bl boo
+@CHECK-NOT: @
+@CHECK: bl goo
+@CHECK-NOT: @
+@CHECK: .long bar
+@CHECK-NOT: @
+@CHECK: .long baz
+@CHECK-NOT: @
+@CHECK: add r0, r0
+@CHECK-NOT: @
+
+@CHECK-LABEL: bar:
+@CHECK: bar1@zed = defined1
+@CHECK: bar3@@zed = defined2
+@CHECK: bar5@@@zed = defined3
+
+@ Make sure we did not mess up the parser state and it still lexes
+@ comments correctly by excluding the @ in normal symbols
+@CHECK-LABEL: far:
+@CHECK:  .long baz
+@CHECK-NOT: @
+
+@ERROR-NOT: error:
diff --git a/test/MC/ARM/complex-operands.s b/test/MC/ARM/complex-operands.s
new file mode 100644
index 0000000..2a721c4
--- /dev/null
+++ b/test/MC/ARM/complex-operands.s
@@ -0,0 +1,40 @@
+@ RUN: llvm-mc -triple armv7-eabi -filetype asm -o - %s | FileCheck %s
+
+	.syntax unified
+
+	.data
+
+	.type .L_table_begin,%object
+.L_table_begin:
+	.rep 2
+	.long 0xd15ab1ed
+	.long 0x0ff1c1a1
+	.endr
+.L_table_end:
+
+	.text
+
+	.type return,%function
+return:
+	bx lr
+
+	.global arm_function
+	.type arm_function,%function
+arm_function:
+	mov r0, #(.L_table_end - .L_table_begin) >> 2
+	blx return
+
+@ CHECK-LABEL: arm_function
+@ CHECK:  	movw r0, #(.L_table_end-.L_table_begin)>>2
+@ CHECK:  	blx return
+
+	.global thumb_function
+	.type thumb_function,%function
+thumb_function:
+	mov r0, #(.L_table_end - .L_table_begin) >> 2
+	blx return
+
+@ CHECK-LABEL: thumb_function
+@ CHECK:  	movw r0, #(.L_table_end-.L_table_begin)>>2
+@ CHECK:  	blx return
+
diff --git a/test/MC/ARM/data-in-code.ll b/test/MC/ARM/data-in-code.ll
index 9fccf2e..3bb017d 100644
--- a/test/MC/ARM/data-in-code.ll
+++ b/test/MC/ARM/data-in-code.ll
@@ -144,6 +144,16 @@ exit:
 ;; ARM-NEXT:     Other:
 ;; ARM-NEXT:     Section: [[MIXED_SECT]]
 
+;; ARM:        Symbol {
+;; ARM:          Name: $d
+;; ARM-NEXT:     Value: 0x0
+;; ARM-NEXT:     Size: 0
+;; ARM-NEXT:     Binding: Local (0x0)
+;; ARM-NEXT:     Type: None (0x0)
+;; ARM-NEXT:     Other: 0
+;; ARM-NEXT:     Section: .ARM.exidx
+;; ARM-NEXT:   }
+
 ;; ARM-NOT:     ${{[atd]}}
 
 ;; TMB:        Symbol {
diff --git a/test/MC/ARM/directive-align.s b/test/MC/ARM/directive-align.s
new file mode 100644
index 0000000..d3e39cb
--- /dev/null
+++ b/test/MC/ARM/directive-align.s
@@ -0,0 +1,28 @@
+@ RUN: llvm-mc -triple armv7-eabi %s | FileCheck %s
+
+	.data
+
+unaligned:
+	.byte 1
+	.align
+
+@ CHECK-LABEL: unaligned
+@ CHECK-NEXT:	.byte 1
+@ CHECK-NEXT:	.align 2
+
+aligned:
+	.long 0x1d10c1e5
+	.align
+
+@ CHECK-LABEL: aligned
+@ CHECK-NEXT:	.long 487637477
+@ CHECK-NEXT:	.align 2
+
+trailer:
+	.long 0xd1ab011c
+	.align 2
+
+@ CHECK-LABEL: trailer
+@ CHECK-NEXT:	.long 3517645084
+@ CHECK-NEXT:	.align 2
+
diff --git a/test/MC/ARM/directive-arch-armv2.s b/test/MC/ARM/directive-arch-armv2.s
new file mode 100644
index 0000000..40857ca
--- /dev/null
+++ b/test/MC/ARM/directive-arch-armv2.s
@@ -0,0 +1,30 @@
+@ Test the .arch directive for armv2
+
+@ This test case will check the default .ARM.attributes value for the
+@ armv2 architecture.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN:   | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
+
+	.syntax	unified
+	.arch	armv2
+
+@ CHECK-ASM: 	.arch	armv2
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_name
+@ CHECK-ATTR:     Value: 2
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_arch
+@ CHECK-ATTR:     Description: ARM v4
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: ARM_ISA_use
+@ CHECK-ATTR:     Description: Permitted
+@ CHECK-ATTR:   }
+@ CHECK-ATTR: }
+
diff --git a/test/MC/ARM/directive-arch-armv2a.s b/test/MC/ARM/directive-arch-armv2a.s
new file mode 100644
index 0000000..62c2ace
--- /dev/null
+++ b/test/MC/ARM/directive-arch-armv2a.s
@@ -0,0 +1,30 @@
+@ Test the .arch directive for armv2a
+
+@ This test case will check the default .ARM.attributes value for the
+@ armv2a architecture.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN:   | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
+
+	.syntax	unified
+	.arch	armv2a
+
+@ CHECK-ASM: 	.arch	armv2a
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_name
+@ CHECK-ATTR:     Value: 2A
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_arch
+@ CHECK-ATTR:     Description: ARM v4
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: ARM_ISA_use
+@ CHECK-ATTR:     Description: Permitted
+@ CHECK-ATTR:   }
+@ CHECK-ATTR: }
+
diff --git a/test/MC/ARM/directive-arch-armv3.s b/test/MC/ARM/directive-arch-armv3.s
new file mode 100644
index 0000000..41cce65
--- /dev/null
+++ b/test/MC/ARM/directive-arch-armv3.s
@@ -0,0 +1,30 @@
+@ Test the .arch directive for armv3
+
+@ This test case will check the default .ARM.attributes value for the
+@ armv3 architecture.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN:   | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
+
+	.syntax	unified
+	.arch	armv3
+
+@ CHECK-ASM: 	.arch	armv3
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_name
+@ CHECK-ATTR:     Value: 3
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_arch
+@ CHECK-ATTR:     Description: ARM v4
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: ARM_ISA_use
+@ CHECK-ATTR:     Description: Permitted
+@ CHECK-ATTR:   }
+@ CHECK-ATTR: }
+
diff --git a/test/MC/ARM/directive-arch-armv3m.s b/test/MC/ARM/directive-arch-armv3m.s
new file mode 100644
index 0000000..8041da2
--- /dev/null
+++ b/test/MC/ARM/directive-arch-armv3m.s
@@ -0,0 +1,30 @@
+@ Test the .arch directive for armv3m
+
+@ This test case will check the default .ARM.attributes value for the
+@ armv3m architecture.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN:   | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
+
+	.syntax	unified
+	.arch	armv3m
+
+@ CHECK-ASM: 	.arch	armv3m
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_name
+@ CHECK-ATTR:     Value: 3M
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_arch
+@ CHECK-ATTR:     Description: ARM v4
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: ARM_ISA_use
+@ CHECK-ATTR:     Description: Permitted
+@ CHECK-ATTR:   }
+@ CHECK-ATTR: }
+
diff --git a/test/MC/ARM/directive-arch-armv4.s b/test/MC/ARM/directive-arch-armv4.s
new file mode 100644
index 0000000..fb83842
--- /dev/null
+++ b/test/MC/ARM/directive-arch-armv4.s
@@ -0,0 +1,38 @@
+@ Test the .arch directive for armv4
+
+@ This test case will check the default .ARM.attributes value for the
+@ armv4 architecture.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN:   | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
+
+	.syntax	unified
+	.arch	armv4
+
+@ CHECK-ASM: 	.arch	armv4
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_name
+@ CHECK-ATTR:     Value: 4
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_arch
+@ CHECK-ATTR:     Description: ARM v4
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: ARM_ISA_use
+@ CHECK-ATTR:     Description: Permitted
+@ CHECK-ATTR:   }
+@ CHECK-ATTR: }
+
+@ Check that multiplication is supported
+	mul r4, r5, r6
+	mla r4, r5, r6, r3
+	smull r4, r5, r6, r3
+	umull r4, r5, r6, r3
+	smlal r4, r5, r6, r3
+	umlal r4, r5, r6, r3
+
diff --git a/test/MC/ARM/directive-arch-armv4t.s b/test/MC/ARM/directive-arch-armv4t.s
new file mode 100644
index 0000000..33a5ae3
--- /dev/null
+++ b/test/MC/ARM/directive-arch-armv4t.s
@@ -0,0 +1,34 @@
+@ Test the .arch directive for armv4t
+
+@ This test case will check the default .ARM.attributes value for the
+@ armv4t architecture.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN:   | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
+
+	.syntax	unified
+	.arch	armv4t
+
+@ CHECK-ASM: 	.arch	armv4t
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_name
+@ CHECK-ATTR:     Value: 4T
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_arch
+@ CHECK-ATTR:     Description: ARM v4T
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: ARM_ISA_use
+@ CHECK-ATTR:     Description: Permitted
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: THUMB_ISA_use
+@ CHECK-ATTR:     Description: Thumb-1
+@ CHECK-ATTR:   }
+@ CHECK-ATTR: }
+
diff --git a/test/MC/ARM/directive-arch-armv5.s b/test/MC/ARM/directive-arch-armv5.s
new file mode 100644
index 0000000..73a8c95
--- /dev/null
+++ b/test/MC/ARM/directive-arch-armv5.s
@@ -0,0 +1,30 @@
+@ Test the .arch directive for armv5
+
+@ This test case will check the default .ARM.attributes value for the
+@ armv5 architecture.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN:   | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
+
+	.syntax	unified
+	.arch	armv5
+
+@ CHECK-ASM: 	.arch	armv5
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_name
+@ CHECK-ATTR:     Value: 5
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_arch
+@ CHECK-ATTR:     Description: ARM v5T
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: ARM_ISA_use
+@ CHECK-ATTR:     Description: Permitted
+@ CHECK-ATTR:   }
+@ CHECK-ATTR: }
+
diff --git a/test/MC/ARM/directive-arch-armv5t.s b/test/MC/ARM/directive-arch-armv5t.s
new file mode 100644
index 0000000..66a75c4
--- /dev/null
+++ b/test/MC/ARM/directive-arch-armv5t.s
@@ -0,0 +1,34 @@
+@ Test the .arch directive for armv5t
+
+@ This test case will check the default .ARM.attributes value for the
+@ armv5t architecture.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN:   | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
+
+	.syntax	unified
+	.arch	armv5t
+
+@ CHECK-ASM: 	.arch	armv5t
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_name
+@ CHECK-ATTR:     Value: 5T
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_arch
+@ CHECK-ATTR:     Description: ARM v5T
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: ARM_ISA_use
+@ CHECK-ATTR:     Description: Permitted
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: THUMB_ISA_use
+@ CHECK-ATTR:     Description: Thumb-1
+@ CHECK-ATTR:   }
+@ CHECK-ATTR: }
+
diff --git a/test/MC/ARM/directive-arch-armv5te.s b/test/MC/ARM/directive-arch-armv5te.s
new file mode 100644
index 0000000..f3932d8
--- /dev/null
+++ b/test/MC/ARM/directive-arch-armv5te.s
@@ -0,0 +1,34 @@
+@ Test the .arch directive for armv5te
+
+@ This test case will check the default .ARM.attributes value for the
+@ armv5te architecture.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN:   | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
+
+	.syntax	unified
+	.arch	armv5te
+
+@ CHECK-ASM: 	.arch	armv5te
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_name
+@ CHECK-ATTR:     Value: 5TE
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_arch
+@ CHECK-ATTR:     Description: ARM v5TE
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: ARM_ISA_use
+@ CHECK-ATTR:     Description: Permitted
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: THUMB_ISA_use
+@ CHECK-ATTR:     Description: Thumb-1
+@ CHECK-ATTR:   }
+@ CHECK-ATTR: }
+
diff --git a/test/MC/ARM/directive-arch-armv6-m.s b/test/MC/ARM/directive-arch-armv6-m.s
new file mode 100644
index 0000000..d89a627
--- /dev/null
+++ b/test/MC/ARM/directive-arch-armv6-m.s
@@ -0,0 +1,30 @@
+@ Test the .arch directive for armv6-m
+
+@ This test case will check the default .ARM.attributes value for the
+@ armv6-m architecture.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN:   | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
+
+	.syntax	unified
+	.arch	armv6-m
+
+@ CHECK-ASM: 	.arch	armv6-m
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_name
+@ CHECK-ATTR:     Value: 6-M
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_arch
+@ CHECK-ATTR:     Description: ARM v6-M
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: THUMB_ISA_use
+@ CHECK-ATTR:     Description: Thumb-1
+@ CHECK-ATTR:   }
+@ CHECK-ATTR: }
+
diff --git a/test/MC/ARM/directive-arch-armv6.s b/test/MC/ARM/directive-arch-armv6.s
new file mode 100644
index 0000000..fb48920
--- /dev/null
+++ b/test/MC/ARM/directive-arch-armv6.s
@@ -0,0 +1,34 @@
+@ Test the .arch directive for armv6
+
+@ This test case will check the default .ARM.attributes value for the
+@ armv6 architecture.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN:   | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
+
+	.syntax	unified
+	.arch	armv6
+
+@ CHECK-ASM: 	.arch	armv6
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_name
+@ CHECK-ATTR:     Value: 6
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_arch
+@ CHECK-ATTR:     Description: ARM v6
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: ARM_ISA_use
+@ CHECK-ATTR:     Description: Permitted
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: THUMB_ISA_use
+@ CHECK-ATTR:     Description: Thumb-1
+@ CHECK-ATTR:   }
+@ CHECK-ATTR: }
+
diff --git a/test/MC/ARM/directive-arch-armv6j.s b/test/MC/ARM/directive-arch-armv6j.s
new file mode 100644
index 0000000..e27beef
--- /dev/null
+++ b/test/MC/ARM/directive-arch-armv6j.s
@@ -0,0 +1,34 @@
+@ Test the .arch directive for armv6j
+
+@ This test case will check the default .ARM.attributes value for the
+@ armv6j architecture.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN:   | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
+
+	.syntax	unified
+	.arch	armv6j
+
+@ CHECK-ASM: 	.arch	armv6j
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_name
+@ CHECK-ATTR:     Value: 6J
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_arch
+@ CHECK-ATTR:     Description: ARM v6
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: ARM_ISA_use
+@ CHECK-ATTR:     Description: Permitted
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: THUMB_ISA_use
+@ CHECK-ATTR:     Description: Thumb-1
+@ CHECK-ATTR:   }
+@ CHECK-ATTR: }
+
diff --git a/test/MC/ARM/directive-arch-armv6t2.s b/test/MC/ARM/directive-arch-armv6t2.s
new file mode 100644
index 0000000..85f4491
--- /dev/null
+++ b/test/MC/ARM/directive-arch-armv6t2.s
@@ -0,0 +1,34 @@
+@ Test the .arch directive for armv6t2
+
+@ This test case will check the default .ARM.attributes value for the
+@ armv6t2 architecture.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN:   | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
+
+	.syntax	unified
+	.arch	armv6t2
+
+@ CHECK-ASM: 	.arch	armv6t2
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_name
+@ CHECK-ATTR:     Value: 6T2
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_arch
+@ CHECK-ATTR:     Description: ARM v6T2
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: ARM_ISA_use
+@ CHECK-ATTR:     Description: Permitted
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: THUMB_ISA_use
+@ CHECK-ATTR:     Description: Thumb-2
+@ CHECK-ATTR:   }
+@ CHECK-ATTR: }
+
diff --git a/test/MC/ARM/directive-arch-armv6z.s b/test/MC/ARM/directive-arch-armv6z.s
new file mode 100644
index 0000000..78a9ab1
--- /dev/null
+++ b/test/MC/ARM/directive-arch-armv6z.s
@@ -0,0 +1,38 @@
+@ Test the .arch directive for armv6z
+
+@ This test case will check the default .ARM.attributes value for the
+@ armv6z architecture.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN:   | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
+
+	.syntax	unified
+	.arch	armv6z
+
+@ CHECK-ASM: 	.arch	armv6z
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_name
+@ CHECK-ATTR:     Value: 6Z
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_arch
+@ CHECK-ATTR:     Description: ARM v6KZ
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: ARM_ISA_use
+@ CHECK-ATTR:     Description: Permitted
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: THUMB_ISA_use
+@ CHECK-ATTR:     Description: Thumb-1
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: Virtualization_use
+@ CHECK-ATTR:     Description: TrustZone
+@ CHECK-ATTR:   }
+@ CHECK-ATTR: }
+
diff --git a/test/MC/ARM/directive-arch-armv6zk.s b/test/MC/ARM/directive-arch-armv6zk.s
new file mode 100644
index 0000000..48d9cc1
--- /dev/null
+++ b/test/MC/ARM/directive-arch-armv6zk.s
@@ -0,0 +1,38 @@
+@ Test the .arch directive for armv6zk
+
+@ This test case will check the default .ARM.attributes value for the
+@ armv6zk architecture.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN:   | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
+
+	.syntax	unified
+	.arch	armv6zk
+
+@ CHECK-ASM: 	.arch	armv6zk
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_name
+@ CHECK-ATTR:     Value: 6ZK
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_arch
+@ CHECK-ATTR:     Description: ARM v6KZ
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: ARM_ISA_use
+@ CHECK-ATTR:     Description: Permitted
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: THUMB_ISA_use
+@ CHECK-ATTR:     Description: Thumb-1
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: Virtualization_use
+@ CHECK-ATTR:     Description: TrustZone
+@ CHECK-ATTR:   }
+@ CHECK-ATTR: }
+
diff --git a/test/MC/ARM/directive-arch-armv7-a.s b/test/MC/ARM/directive-arch-armv7-a.s
new file mode 100644
index 0000000..792429a
--- /dev/null
+++ b/test/MC/ARM/directive-arch-armv7-a.s
@@ -0,0 +1,38 @@
+@ Test the .arch directive for armv7-a
+
+@ This test case will check the default .ARM.attributes value for the
+@ armv7-a architecture.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN:   | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
+
+	.syntax	unified
+	.arch	armv7-a
+
+@ CHECK-ASM: 	.arch	armv7-a
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_name
+@ CHECK-ATTR:     Value: 7-A
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_arch
+@ CHECK-ATTR:     Description: ARM v7
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_arch_profile
+@ CHECK-ATTR:     Description: Application
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: ARM_ISA_use
+@ CHECK-ATTR:     Description: Permitted
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: THUMB_ISA_use
+@ CHECK-ATTR:     Description: Thumb-2
+@ CHECK-ATTR:   }
+@ CHECK-ATTR: }
+
diff --git a/test/MC/ARM/directive-arch-armv7-m.s b/test/MC/ARM/directive-arch-armv7-m.s
new file mode 100644
index 0000000..058f23b
--- /dev/null
+++ b/test/MC/ARM/directive-arch-armv7-m.s
@@ -0,0 +1,34 @@
+@ Test the .arch directive for armv7-m
+
+@ This test case will check the default .ARM.attributes value for the
+@ armv7-m architecture.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN:   | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
+
+	.syntax	unified
+	.arch	armv7-m
+
+@ CHECK-ASM: 	.arch	armv7-m
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_name
+@ CHECK-ATTR:     Value: 7-M
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_arch
+@ CHECK-ATTR:     Description: ARM v7
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_arch_profile
+@ CHECK-ATTR:     Description: Microcontroller
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: THUMB_ISA_use
+@ CHECK-ATTR:     Description: Thumb-2
+@ CHECK-ATTR:   }
+@ CHECK-ATTR: }
+
diff --git a/test/MC/ARM/directive-arch-armv7-r.s b/test/MC/ARM/directive-arch-armv7-r.s
new file mode 100644
index 0000000..99481f7
--- /dev/null
+++ b/test/MC/ARM/directive-arch-armv7-r.s
@@ -0,0 +1,38 @@
+@ Test the .arch directive for armv7-r
+
+@ This test case will check the default .ARM.attributes value for the
+@ armv7-r architecture.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN:   | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
+
+	.syntax	unified
+	.arch	armv7-r
+
+@ CHECK-ASM: 	.arch	armv7-r
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_name
+@ CHECK-ATTR:     Value: 7-R
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_arch
+@ CHECK-ATTR:     Description: ARM v7
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_arch_profile
+@ CHECK-ATTR:     Description: Real-time
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: ARM_ISA_use
+@ CHECK-ATTR:     Description: Permitted
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: THUMB_ISA_use
+@ CHECK-ATTR:     Description: Thumb-2
+@ CHECK-ATTR:   }
+@ CHECK-ATTR: }
+
diff --git a/test/MC/ARM/directive-arch-armv7.s b/test/MC/ARM/directive-arch-armv7.s
new file mode 100644
index 0000000..0cd4996
--- /dev/null
+++ b/test/MC/ARM/directive-arch-armv7.s
@@ -0,0 +1,30 @@
+@ Test the .arch directive for armv7
+
+@ This test case will check the default .ARM.attributes value for the
+@ armv7 architecture.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN:   | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
+
+	.syntax	unified
+	.arch	armv7
+
+@ CHECK-ASM: 	.arch	armv7
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_name
+@ CHECK-ATTR:     Value: 7
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_arch
+@ CHECK-ATTR:     Description: ARM v7
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: THUMB_ISA_use
+@ CHECK-ATTR:     Description: Thumb-2
+@ CHECK-ATTR:   }
+@ CHECK-ATTR: }
+
diff --git a/test/MC/ARM/directive-arch-armv7a.s b/test/MC/ARM/directive-arch-armv7a.s
new file mode 100644
index 0000000..3bb202f
--- /dev/null
+++ b/test/MC/ARM/directive-arch-armv7a.s
@@ -0,0 +1,38 @@
+@ Test the .arch directive for armv7-a
+
+@ This test case will check the default .ARM.attributes value for the
+@ armv7-a architecture when using the armv7a alias.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN:   | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
+
+	.syntax	unified
+	.arch	armv7a
+
+@ CHECK-ASM: 	.arch	armv7-a
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_name
+@ CHECK-ATTR:     Value: 7-A
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_arch
+@ CHECK-ATTR:     Description: ARM v7
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_arch_profile
+@ CHECK-ATTR:     Description: Application
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: ARM_ISA_use
+@ CHECK-ATTR:     Description: Permitted
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: THUMB_ISA_use
+@ CHECK-ATTR:     Description: Thumb-2
+@ CHECK-ATTR:   }
+@ CHECK-ATTR: }
+
diff --git a/test/MC/ARM/directive-arch-armv7m.s b/test/MC/ARM/directive-arch-armv7m.s
new file mode 100644
index 0000000..0e9f546
--- /dev/null
+++ b/test/MC/ARM/directive-arch-armv7m.s
@@ -0,0 +1,34 @@
+@ Test the .arch directive for armv7-m
+
+@ This test case will check the default .ARM.attributes value for the
+@ armv7-m architecture when using the armv7m alias.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN:   | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
+
+	.syntax	unified
+	.arch	armv7m
+
+@ CHECK-ASM: 	.arch	armv7-m
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_name
+@ CHECK-ATTR:     Value: 7-M
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_arch
+@ CHECK-ATTR:     Description: ARM v7
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_arch_profile
+@ CHECK-ATTR:     Description: Microcontroller
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: THUMB_ISA_use
+@ CHECK-ATTR:     Description: Thumb-2
+@ CHECK-ATTR:   }
+@ CHECK-ATTR: }
+
diff --git a/test/MC/ARM/directive-arch-armv7r.s b/test/MC/ARM/directive-arch-armv7r.s
new file mode 100644
index 0000000..9009d13
--- /dev/null
+++ b/test/MC/ARM/directive-arch-armv7r.s
@@ -0,0 +1,38 @@
+@ Test the .arch directive for armv7-r
+
+@ This test case will check the default .ARM.attributes value for the
+@ armv7-r architecture when using the armv7r alias.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN:   | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
+
+	.syntax	unified
+	.arch	armv7r
+
+@ CHECK-ASM: 	.arch	armv7-r
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_name
+@ CHECK-ATTR:     Value: 7-R
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_arch
+@ CHECK-ATTR:     Description: ARM v7
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_arch_profile
+@ CHECK-ATTR:     Description: Real-time
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: ARM_ISA_use
+@ CHECK-ATTR:     Description: Permitted
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: THUMB_ISA_use
+@ CHECK-ATTR:     Description: Thumb-2
+@ CHECK-ATTR:   }
+@ CHECK-ATTR: }
+
diff --git a/test/MC/ARM/directive-arch-armv8-a.s b/test/MC/ARM/directive-arch-armv8-a.s
new file mode 100644
index 0000000..6363781
--- /dev/null
+++ b/test/MC/ARM/directive-arch-armv8-a.s
@@ -0,0 +1,46 @@
+@ Test the .arch directive for armv8-a
+
+@ This test case will check the default .ARM.attributes value for the
+@ armv8-a architecture.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN:   | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
+
+	.syntax	unified
+	.arch	armv8-a
+
+@ CHECK-ASM: 	.arch	armv8-a
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_name
+@ CHECK-ATTR:     Value: 8-A
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_arch
+@ CHECK-ATTR:     Description: ARM v8
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_arch_profile
+@ CHECK-ATTR:     Description: Application
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: ARM_ISA_use
+@ CHECK-ATTR:     Description: Permitted
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: THUMB_ISA_use
+@ CHECK-ATTR:     Description: Thumb-2
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: MPextension_use
+@ CHECK-ATTR:     Description: Permitted
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: Virtualization_use
+@ CHECK-ATTR:     Description: TrustZone + Virtualization Extensions
+@ CHECK-ATTR:   }
+@ CHECK-ATTR: }
+
diff --git a/test/MC/ARM/directive-arch-armv8a.s b/test/MC/ARM/directive-arch-armv8a.s
new file mode 100644
index 0000000..4a1915c
--- /dev/null
+++ b/test/MC/ARM/directive-arch-armv8a.s
@@ -0,0 +1,46 @@
+@ Test the .arch directive for armv8-a
+
+@ This test case will check the default .ARM.attributes value for the
+@ armv8-a architecture when using the armv8a alias.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN:   | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
+
+	.syntax	unified
+	.arch	armv8a
+
+@ CHECK-ASM: 	.arch	armv8-a
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_name
+@ CHECK-ATTR:     Value: 8-A
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_arch
+@ CHECK-ATTR:     Description: ARM v8
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_arch_profile
+@ CHECK-ATTR:     Description: Application
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: ARM_ISA_use
+@ CHECK-ATTR:     Description: Permitted
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: THUMB_ISA_use
+@ CHECK-ATTR:     Description: Thumb-2
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: MPextension_use
+@ CHECK-ATTR:     Description: Permitted
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: Virtualization_use
+@ CHECK-ATTR:     Description: TrustZone + Virtualization Extensions
+@ CHECK-ATTR:   }
+@ CHECK-ATTR: }
+
diff --git a/test/MC/ARM/directive-arch-iwmmxt.s b/test/MC/ARM/directive-arch-iwmmxt.s
new file mode 100644
index 0000000..db25ec6
--- /dev/null
+++ b/test/MC/ARM/directive-arch-iwmmxt.s
@@ -0,0 +1,38 @@
+@ Test the .arch directive for iwmmxt
+
+@ This test case will check the default .ARM.attributes value for the
+@ iwmmxt architecture.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN:   | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
+
+	.syntax	unified
+	.arch	iwmmxt
+
+@ CHECK-ASM: 	.arch	iwmmxt
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_name
+@ CHECK-ATTR:     Value: IWMMXT
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_arch
+@ CHECK-ATTR:     Description: ARM v5TE
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: ARM_ISA_use
+@ CHECK-ATTR:     Description: Permitted
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: THUMB_ISA_use
+@ CHECK-ATTR:     Description: Thumb-1
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: WMMX_arch
+@ CHECK-ATTR:     Description: WMMXv1
+@ CHECK-ATTR:   }
+@ CHECK-ATTR: }
+
diff --git a/test/MC/ARM/directive-arch-iwmmxt2.s b/test/MC/ARM/directive-arch-iwmmxt2.s
new file mode 100644
index 0000000..de94f97
--- /dev/null
+++ b/test/MC/ARM/directive-arch-iwmmxt2.s
@@ -0,0 +1,38 @@
+@ Test the .arch directive for iwmmxt2
+
+@ This test case will check the default .ARM.attributes value for the
+@ iwmmxt2 architecture.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN:   | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
+
+	.syntax	unified
+	.arch	iwmmxt2
+
+@ CHECK-ASM: 	.arch	iwmmxt2
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_name
+@ CHECK-ATTR:     Value: IWMMXT2
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_arch
+@ CHECK-ATTR:     Description: ARM v5TE
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: ARM_ISA_use
+@ CHECK-ATTR:     Description: Permitted
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: THUMB_ISA_use
+@ CHECK-ATTR:     Description: Thumb-1
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: WMMX_arch
+@ CHECK-ATTR:     Description: WMMXv2
+@ CHECK-ATTR:   }
+@ CHECK-ATTR: }
+
diff --git a/test/MC/ARM/directive-arch_extension-crc.s b/test/MC/ARM/directive-arch_extension-crc.s
new file mode 100644
index 0000000..9e4deda
--- /dev/null
+++ b/test/MC/ARM/directive-arch_extension-crc.s
@@ -0,0 +1,57 @@
+@ RUN: not llvm-mc -triple armv7-eabi -filetype asm -o /dev/null 2>&1 %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-V7
+@ RUN: not llvm-mc -triple armv8-eabi -filetype asm -o /dev/null 2>&1 %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-V8
+
+	.syntax unified
+
+	.arm
+
+	.arch_extension crc
+@ CHECK-V7: error: architectural extension 'crc' is not allowed for the current base architecture
+@ CHECK-V7-NEXT: 	.arch_extension crc
+@ CHECK-V7-NEXT:                     ^
+
+	.type crc,%function
+crc:
+	crc32b r0, r1, r2
+@ CHECK-V7: error: instruction requires: crc armv8
+	crc32h r0, r1, r2
+@ CHECK-V7: error: instruction requires: crc armv8
+	crc32w r0, r1, r2
+@ CHECK-V7: error: instruction requires: crc armv8
+
+	crc32cb r0, r1, r2
+@ CHECK-V7: error: instruction requires: crc armv8
+	crc32ch r0, r1, r2
+@ CHECK-V7: error: instruction requires: crc armv8
+	crc32cw r0, r1, r2
+@ CHECK-V7: error: instruction requires: crc armv8
+
+	.arch_extension nocrc
+@ CHECK-V7: error: architectural extension 'crc' is not allowed for the current base architecture
+@ CHECK-V7-NEXT: 	.arch_extension nocrc
+@ CHECK-V7-NEXT:                     ^
+
+	.type nocrc,%function
+nocrc:
+	crc32b r0, r1, r2
+@ CHECK-V7: error: instruction requires: crc armv8
+@ CHECK-V8: error: instruction requires: crc arm-mode
+	crc32h r0, r1, r2
+@ CHECK-V7: error: instruction requires: crc armv8
+@ CHECK-V8: error: instruction requires: crc arm-mode
+	crc32w r0, r1, r2
+@ CHECK-V7: error: instruction requires: crc armv8
+@ CHECK-V8: error: instruction requires: crc arm-mode
+
+	crc32cb r0, r1, r2
+@ CHECK-V7: error: instruction requires: crc armv8
+@ CHECK-V8: error: instruction requires: crc arm-mode
+	crc32ch r0, r1, r2
+@ CHECK-V7: error: instruction requires: crc armv8
+@ CHECK-V8: error: instruction requires: crc arm-mode
+	crc32cw r0, r1, r2
+@ CHECK-V7: error: instruction requires: crc armv8
+@ CHECK-V8: error: instruction requires: crc arm-mode
+
diff --git a/test/MC/ARM/directive-arch_extension-crypto.s b/test/MC/ARM/directive-arch_extension-crypto.s
new file mode 100644
index 0000000..898ba06
--- /dev/null
+++ b/test/MC/ARM/directive-arch_extension-crypto.s
@@ -0,0 +1,108 @@
+@ RUN: not llvm-mc -triple armv7-eabi -filetype asm -o /dev/null 2>&1 %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-V7
+@ RUN: not llvm-mc -triple armv8-eabi -filetype asm -o /dev/null 2>&1 %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-V8
+@ RUN: not llvm-mc -triple thumbv7-eabi -filetype asm -o /dev/null 2>&1 %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-V7
+@ RUN: not llvm-mc -triple thumbv8-eabi -filetype asm -o /dev/null 2>&1 %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-V8
+
+	.syntax unified
+
+	.arch_extension crypto
+@ CHECK-V7: error: architectural extension 'crypto' is not allowed for the current base architecture
+@ CHECK-V7-NEXT: 	.arch_extension crypto
+@ CHECK-V7-NEXT:                     ^
+
+	.type crypto,%function
+crypto:
+	vmull.p64 q0, d0, d1
+@ CHECK-V7: error: instruction requires: crypto armv8
+
+	aesd.8 q0, q1
+@ CHECK-V7: error: instruction requires: crypto armv8
+	aese.8 q0, q1
+@ CHECK-V7: error: instruction requires: crypto armv8
+	aesimc.8 q0, q1
+@ CHECK-V7: error: instruction requires: crypto armv8
+	aesmc.8 q0, q1
+@ CHECK-V7: error: instruction requires: crypto armv8
+
+	sha1h.32 q0, q1
+@ CHECK-V7: error: instruction requires: crypto armv8
+	sha1su1.32 q0, q1
+@ CHECK-V7: error: instruction requires: crypto armv8
+	sha256su0.32 q0, q1
+@ CHECK-V7: error: instruction requires: crypto armv8
+
+	sha1c.32 q0, q1, q2
+@ CHECK-V7: error: instruction requires: crypto armv8
+	sha1m.32 q0, q1, q2
+@ CHECK-V7: error: instruction requires: crypto armv8
+	sha1p.32 q0, q1, q2
+@ CHECK-V7: error: instruction requires: crypto armv8
+	sha1su0.32 q0, q1, q2
+@ CHECK-V7: error: instruction requires: crypto armv8
+	sha256h.32 q0, q1, q2
+@ CHECK-V7: error: instruction requires: crypto armv8
+	sha256h2.32 q0, q1, q2
+@ CHECK-V7: error: instruction requires: crypto armv8
+	sha256su1.32 q0, q1, q2
+@ CHECK-V7: error: instruction requires: crypto armv8
+
+	.arch_extension nocrypto
+@ CHECK-V7: error: architectural extension 'crypto' is not allowed for the current base architecture
+@ CHECK-V7-NEXT: 	.arch_extension nocrypto
+@ CHECK-V7-NEXT:                     ^
+
+	.type nocrypto,%function
+nocrypto:
+	vmull.p64 q0, d0, d1
+@ CHECK-V7: error: instruction requires: crypto armv8
+@ CHECK-V8: error: instruction requires: crypto
+
+	aesd.8 q0, q1
+@ CHECK-V7: error: instruction requires: crypto armv8
+@ CHECK-V8: error: instruction requires: crypto
+	aese.8 q0, q1
+@ CHECK-V7: error: instruction requires: crypto armv8
+@ CHECK-V8: error: instruction requires: crypto
+	aesimc.8 q0, q1
+@ CHECK-V7: error: instruction requires: crypto armv8
+@ CHECK-V8: error: instruction requires: crypto
+	aesmc.8 q0, q1
+@ CHECK-V7: error: instruction requires: crypto armv8
+@ CHECK-V8: error: instruction requires: crypto
+
+	sha1h.32 q0, q1
+@ CHECK-V7: error: instruction requires: crypto armv8
+@ CHECK-V8: error: instruction requires: crypto
+	sha1su1.32 q0, q1
+@ CHECK-V7: error: instruction requires: crypto armv8
+@ CHECK-V8: error: instruction requires: crypto
+	sha256su0.32 q0, q1
+@ CHECK-V7: error: instruction requires: crypto armv8
+@ CHECK-V8: error: instruction requires: crypto
+
+	sha1c.32 q0, q1, q2
+@ CHECK-V7: error: instruction requires: crypto armv8
+@ CHECK-V8: error: instruction requires: crypto
+	sha1m.32 q0, q1, q2
+@ CHECK-V7: error: instruction requires: crypto armv8
+@ CHECK-V8: error: instruction requires: crypto
+	sha1p.32 q0, q1, q2
+@ CHECK-V7: error: instruction requires: crypto armv8
+@ CHECK-V8: error: instruction requires: crypto
+	sha1su0.32 q0, q1, q2
+@ CHECK-V7: error: instruction requires: crypto armv8
+@ CHECK-V8: error: instruction requires: crypto
+	sha256h.32 q0, q1, q2
+@ CHECK-V7: error: instruction requires: crypto armv8
+@ CHECK-V8: error: instruction requires: crypto
+	sha256h2.32 q0, q1, q2
+@ CHECK-V7: error: instruction requires: crypto armv8
+@ CHECK-V8: error: instruction requires: crypto
+	sha256su1.32 q0, q1, q2
+@ CHECK-V7: error: instruction requires: crypto armv8
+@ CHECK-V8: error: instruction requires: crypto
+
diff --git a/test/MC/ARM/directive-arch_extension-fp.s b/test/MC/ARM/directive-arch_extension-fp.s
new file mode 100644
index 0000000..0327dd7
--- /dev/null
+++ b/test/MC/ARM/directive-arch_extension-fp.s
@@ -0,0 +1,344 @@
+@ RUN: not llvm-mc -triple armv7-eabi -filetype asm -o /dev/null 2>&1 %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-V7
+@ RUN: not llvm-mc -triple armv8-eabi -filetype asm -o /dev/null 2>&1 %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-V8
+@ RUN: not llvm-mc -triple thumbv7-eabi -filetype asm -o /dev/null 2>&1 %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-V7
+@ RUN: not llvm-mc -triple thumbv8-eabi -filetype asm -o /dev/null 2>&1 %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-V8
+
+	.syntax unified
+
+	.arch_extension fp
+@ CHECK-V7: error: architectural extension 'fp' is not allowed for the current base architecture
+@ CHECK-V7-NEXT: 	.arch_extension fp
+@ CHECK-V7-NEXT:                     ^
+
+	.type fp,%function
+fp:
+	vmrs r0, mvfr2
+@ CHECK-V7: error: instruction requires: FPARMv8
+
+	vselgt.f32 s0, s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vselge.f32 s0, s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vseleq.f32 s0, s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vselvs.f32 s0, s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vmaxnm.f32 s0, s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vminnm.f32 s0, s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+
+	vselgt.f64 d0, d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vselge.f64 d0, d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vseleq.f64 d0, d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vselvs.f64 d0, d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vmaxnm.f64 d0, d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vminnm.f64 d0, d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+
+	vcvtb.f64.f16 d0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vcvtb.f16.f64 s0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vcvtt.f64.f16 d0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vcvtt.f16.f64 s0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+
+	vcvta.s32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vcvta.u32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vcvta.s32.f64 s0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vcvta.u32.f64 s0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vcvtn.s32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vcvtn.u32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vcvtn.s32.f64 s0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vcvtn.u32.f64 s0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vcvtp.s32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vcvtp.u32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vcvtp.s32.f64 s0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vcvtp.u32.f64 s0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vcvtm.s32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vcvtm.u32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vcvtm.s32.f64 s0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vcvtm.u32.f64 s0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+
+	vrintz.f32 s0, s1
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrintz.f64 d0, d1
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrintz.f32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrintz.f64.f64 d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrintr.f32 s0, s1
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrintr.f64 d0, d1
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrintr.f32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrintr.f64.f64 d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrintx.f32 s0, s1
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrintx.f64 d0, d1
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrintx.f32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrintx.f64.f64 d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+
+	vrinta.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrinta.f64 d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrinta.f32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrinta.f64.f64 d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrintn.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrintn.f64 d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrintn.f32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrintn.f64.f64 d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrintp.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrintp.f64 d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrintp.f32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrintp.f64.f64 d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrintm.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrintm.f64 d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrintm.f32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrintm.f64.f64 d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+
+	.arch_extension nofp
+@ CHECK-V7: error: architectural extension 'fp' is not allowed for the current base architecture
+@ CHECK-V7-NEXT: 	.arch_extension nofp
+@ CHECK-V7-NEXT:                     ^
+
+	.type nofp,%function
+nofp:
+	vmrs r0, mvfr2
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+
+	vselgt.f32 s0, s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vselge.f32 s0, s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vseleq.f32 s0, s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vselvs.f32 s0, s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vmaxnm.f32 s0, s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vminnm.f32 s0, s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+
+	vselgt.f64 d0, d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vselge.f64 d0, d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vseleq.f64 d0, d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vselvs.f64 d0, d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vmaxnm.f64 d0, d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vminnm.f64 d0, d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+
+	vcvtb.f64.f16 d0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vcvtb.f16.f64 s0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vcvtt.f64.f16 d0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vcvtt.f16.f64 s0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+
+	vcvta.s32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vcvta.u32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vcvta.s32.f64 s0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vcvta.u32.f64 s0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vcvtn.s32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vcvtn.u32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vcvtn.s32.f64 s0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vcvtn.u32.f64 s0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vcvtp.s32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vcvtp.u32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vcvtp.s32.f64 s0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vcvtp.u32.f64 s0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vcvtm.s32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vcvtm.u32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vcvtm.s32.f64 s0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vcvtm.u32.f64 s0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+
+	vrintz.f32 s0, s1
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vrintz.f64 d0, d1
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vrintz.f32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vrintz.f64.f64 d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vrintr.f32 s0, s1
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vrintr.f64 d0, d1
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vrintr.f32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vrintr.f64.f64 d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vrintx.f32 s0, s1
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vrintx.f64 d0, d1
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vrintx.f32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vrintx.f64.f64 d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+
+	vrinta.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vrinta.f64 d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vrinta.f32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vrinta.f64.f64 d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vrintn.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vrintn.f64 d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vrintn.f32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vrintn.f64.f64 d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vrintp.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vrintp.f64 d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vrintp.f32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vrintp.f64.f64 d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vrintm.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vrintm.f64 d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vrintm.f32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vrintm.f64.f64 d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+
diff --git a/test/MC/ARM/directive-arch_extension-idiv.s b/test/MC/ARM/directive-arch_extension-idiv.s
new file mode 100644
index 0000000..c63bbfb
--- /dev/null
+++ b/test/MC/ARM/directive-arch_extension-idiv.s
@@ -0,0 +1,53 @@
+@ RUN: not llvm-mc -triple armv6-eabi -filetype asm -o /dev/null 2>&1 %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ARMv6 -check-prefix CHECK-V6
+@ RUN: not llvm-mc -triple armv7-eabi -filetype asm -o /dev/null 2>&1 %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ARMv7 -check-prefix CHECK-V7
+@ RUN: not llvm-mc -triple armv7m-eabi -filetype asm -o /dev/null 2>&1 %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ARMv7M -check-prefix CHECK-V7M
+@ RUN: not llvm-mc -triple thumbv6-eabi -filetype asm -o /dev/null 2>&1 %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-THUMBv6 -check-prefix CHECK-V6
+@ RUN: not llvm-mc -triple thumbv7-eabi -filetype asm -o /dev/null 2>&1 %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-THUMBv7 -check-prefix CHECK-V7
+@ RUN: not llvm-mc -triple thumbv7m-eabi -filetype asm -o /dev/null 2>&1 %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-THUMBv7M -check-prefix CHECK-V7M
+
+	.syntax unified
+
+	.arch_extension idiv
+@ CHECK-V6: error: architectural extension 'idiv' is not allowed for the current base architecture
+@ CHECK-V6-NEXT: 	.arch_extension idiv
+@ CHECK-V6-NEXT:                     ^
+@ CHECK-V7M: error: architectural extension 'idiv' is not allowed for the current base architecture
+@ CHECK-V7M-NEXT: 	.arch_extension idiv
+@ CHECK-V7M-NEXT:                     ^
+
+	.type idiv,%function
+idiv:
+	udiv r0, r1, r2
+@ CHECK-ARMv6: error: instruction requires: divide in ARM
+@ CHECK-THUMBv6: error: instruction requires: divide in ARM arm-mode
+	sdiv r0, r1, r2
+@ CHECK-ARMv6: error: instruction requires: divide in ARM
+@ CHECK-THUMBv6: error: instruction requires: divide in ARM arm-mode
+
+	.arch_extension noidiv
+@ CHECK-V6: error: architectural extension 'idiv' is not allowed for the current base architecture
+@ CHECK-V6-NEXT: 	.arch_extension noidiv
+@ CHECK-V6-NEXT:                     ^
+@ CHECK-V7M: error: architectural extension 'idiv' is not allowed for the current base architecture
+@ CHECK-V7M-NEXT: 	.arch_extension noidiv
+@ CHECK-V7M-NEXT:                     ^
+
+	.type noidiv,%function
+noidiv:
+	udiv r0, r1, r2
+@ CHECK-ARMv6: error: instruction requires: divide in ARM
+@ CHECK-THUMBv6: error: instruction requires: divide in ARM arm-mode
+@ CHECK-ARMv7: error: instruction requires: divide in ARM arm-mode
+@ CHECK-THUMBv7: error: instruction requires: divide in THUMB
+	sdiv r0, r1, r2
+@ CHECK-ARMv6: error: instruction requires: divide in ARM
+@ CHECK-THUMBv6: error: instruction requires: divide in ARM arm-mode
+@ CHECK-ARMv7: error: instruction requires: divide in ARM arm-mode
+@ CHECK-THUMBv7: error: instruction requires: divide in THUMB
+
diff --git a/test/MC/ARM/directive-arch_extension-mp.s b/test/MC/ARM/directive-arch_extension-mp.s
new file mode 100644
index 0000000..9046c215
--- /dev/null
+++ b/test/MC/ARM/directive-arch_extension-mp.s
@@ -0,0 +1,38 @@
+@ RUN: not llvm-mc -triple armv6-eabi -filetype asm -o /dev/null 2>&1 %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ARMv6 -check-prefix CHECK-V6
+@ RUN: not llvm-mc -triple armv7-eabi -filetype asm -o /dev/null 2>&1 %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ARMv7 -check-prefix CHECK-V7
+@ RUN: not llvm-mc -triple armv7m-eabi -filetype asm -o /dev/null 2>&1 %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ARMv7M -check-prefix CHECK-V7M
+@ RUN: not llvm-mc -triple thumbv6-eabi -filetype asm -o /dev/null 2>&1 %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-THUMBv6 -check-prefix CHECK-V6
+@ RUN: not llvm-mc -triple thumbv7-eabi -filetype asm -o /dev/null 2>&1 %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-THUMBv7 -check-prefix CHECK-V7
+@ RUN: not llvm-mc -triple thumbv7m-eabi -filetype asm -o /dev/null 2>&1 %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-THUMBv7M -check-prefix CHECK-V7M
+
+	.syntax unified
+
+	.arch_extension mp
+@ CHECK-V6: error: architectural extension 'mp' is not allowed for the current base architecture
+@ CHECK-V6-NEXT: 	.arch_extension mp
+@ CHECK-V6-NEXT:                     ^
+
+	.type mp,%function
+mp:
+	pldw [r0]
+@ CHECK-V6: error: instruction requires: mp-extensions armv7
+@ CHECK-V7M: error: instruction requires: mp-extensions
+
+	.arch_extension nomp
+@ CHECK-V6: error: architectural extension 'mp' is not allowed for the current base architecture
+@ CHECK-V6-NEXT: 	.arch_extension nomp
+@ CHECK-V6-NEXT:                     ^
+
+	.type nomp,%function
+nomp:
+	pldw [r0]
+@ CHECK-V6: error: instruction requires: mp-extensions armv7
+@ CHECK-V7: error: instruction requires: mp-extensions
+@ CHECK-V7M: error: instruction requires: mp-extensions
+
diff --git a/test/MC/ARM/directive-arch_extension-sec.s b/test/MC/ARM/directive-arch_extension-sec.s
new file mode 100644
index 0000000..55ead85
--- /dev/null
+++ b/test/MC/ARM/directive-arch_extension-sec.s
@@ -0,0 +1,31 @@
+@ RUN: not llvm-mc -triple armv6-eabi -filetype asm -o /dev/null 2>&1 %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ARMv6 -check-prefix CHECK-V6
+@ RUN: not llvm-mc -triple armv7-eabi -filetype asm -o /dev/null 2>&1 %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ARMv7 -check-prefix CHECK-V7
+@ RUN: not llvm-mc -triple thumbv6-eabi -filetype asm -o /dev/null 2>&1 %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-THUMBv6 -check-prefix CHECK-V6
+@ RUN: not llvm-mc -triple thumbv7-eabi -filetype asm -o /dev/null 2>&1 %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-THUMBv7 -check-prefix CHECK-V7
+
+	.syntax unified
+
+	.arch_extension sec
+@ CHECK-V6: error: architectural extension 'sec' is not allowed for the current base architecture
+@ CHECK-V6-NEXT: 	.arch_extension sec
+@ CHECK-V6-NEXT:                     ^
+
+	.type sec,%function
+sec:
+	smc #0
+@ CHECK-V6: error: instruction requires: TrustZone
+
+	.arch_extension nosec
+@ CHECK-V6: error: architectural extension 'sec' is not allowed for the current base architecture
+@ CHECK-V6-NEXT: 	.arch_extension nosec
+@ CHECK-V6-NEXT:                     ^
+
+	.type nosec,%function
+nosec:
+	smc #0
+@ CHECK-V7: error: instruction requires: TrustZone
+
diff --git a/test/MC/ARM/directive-arch_extension-simd.s b/test/MC/ARM/directive-arch_extension-simd.s
new file mode 100644
index 0000000..c9dbf21
--- /dev/null
+++ b/test/MC/ARM/directive-arch_extension-simd.s
@@ -0,0 +1,275 @@
+@ RUN: not llvm-mc -triple armv7-eabi -filetype asm -o /dev/null 2>&1 %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-V7
+@ RUN: not llvm-mc -triple armv8-eabi -filetype asm -o /dev/null 2>&1 %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-V8
+@ RUN: not llvm-mc -triple thumbv7-eabi -filetype asm -o /dev/null 2>&1 %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-V7
+@ RUN: not llvm-mc -triple thumbv8-eabi -filetype asm -o /dev/null 2>&1 %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-V8
+
+	.syntax unified
+
+	.arch_extension simd
+@ CHECK-V7: error: architectural extension 'simd' is not allowed for the current base architecture
+@ CHECK-V7-NEXT: 	.arch_extension simd
+@ CHECK-V7-NEXT:                     ^
+
+	.type simd,%function
+simd:
+	vmaxnm.f32 s0, s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vminnm.f32 s0, s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+
+	vmaxnm.f64 d0, d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vminnm.f64 d0, d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+
+	vcvta.s32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vcvta.u32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vcvta.s32.f64 s0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vcvta.u32.f64 s0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vcvtn.s32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vcvtn.u32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vcvtn.s32.f64 s0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vcvtn.u32.f64 s0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vcvtp.s32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vcvtp.u32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vcvtp.s32.f64 s0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vcvtp.u32.f64 s0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vcvtm.s32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vcvtm.u32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vcvtm.s32.f64 s0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vcvtm.u32.f64 s0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+
+	vrintz.f32 s0, s1
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrintz.f64 d0, d1
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrintz.f32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrintz.f64.f64 d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrintr.f32 s0, s1
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrintr.f64 d0, d1
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrintr.f32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrintr.f64.f64 d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrintx.f32 s0, s1
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrintx.f64 d0, d1
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrintx.f32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrintx.f64.f64 d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+
+	vrinta.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrinta.f64 d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrinta.f32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrinta.f64.f64 d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrintn.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrintn.f64 d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrintn.f32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrintn.f64.f64 d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrintp.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrintp.f64 d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrintp.f32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrintp.f64.f64 d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrintm.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrintm.f64 d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrintm.f32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+	vrintm.f64.f64 d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+
+	.arch_extension nosimd
+@ CHECK-V7: error: architectural extension 'simd' is not allowed for the current base architecture
+@ CHECK-V7-NEXT: 	.arch_extension nosimd
+@ CHECK-V7-NEXT:                     ^
+
+	.type nosimd,%function
+nosimd:
+	vmaxnm.f32 s0, s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vminnm.f32 s0, s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+
+	vmaxnm.f64 d0, d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vminnm.f64 d0, d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+
+	vcvta.s32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vcvta.u32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vcvta.s32.f64 s0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vcvta.u32.f64 s0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vcvtn.s32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vcvtn.u32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vcvtn.s32.f64 s0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vcvtn.u32.f64 s0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vcvtp.s32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vcvtp.u32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vcvtp.s32.f64 s0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vcvtp.u32.f64 s0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vcvtm.s32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vcvtm.u32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vcvtm.s32.f64 s0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vcvtm.u32.f64 s0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+
+	vrintz.f32 s0, s1
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vrintz.f64 d0, d1
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vrintz.f32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vrintz.f64.f64 d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vrintr.f32 s0, s1
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vrintr.f64 d0, d1
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vrintr.f32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vrintr.f64.f64 d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vrintx.f32 s0, s1
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vrintx.f64 d0, d1
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vrintx.f32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vrintx.f64.f64 d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+
+	vrinta.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vrinta.f64 d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vrinta.f32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vrinta.f64.f64 d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vrintn.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vrintn.f64 d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vrintn.f32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vrintn.f64.f64 d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vrintp.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vrintp.f64 d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vrintp.f32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vrintp.f64.f64 d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vrintm.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vrintm.f64 d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+	vrintm.f32.f32 s0, s0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: FPARMv8
+	vrintm.f64.f64 d0, d0
+@ CHECK-V7: error: instruction requires: FPARMv8
+@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8
+
diff --git a/test/MC/ARM/directive-eabi_attribute-2.s b/test/MC/ARM/directive-eabi_attribute-2.s
new file mode 100644
index 0000000..8f00ac8
--- /dev/null
+++ b/test/MC/ARM/directive-eabi_attribute-2.s
@@ -0,0 +1,98 @@
+@ RUN: llvm-mc -triple armv7-elf -filetype asm -o - %s | FileCheck %s
+
+	.syntax unified
+	.thumb
+
+	.eabi_attribute Tag_CPU_raw_name, "Cortex-A9"
+@ CHECK: .eabi_attribute 4, "Cortex-A9"
+	.eabi_attribute Tag_CPU_name, "cortex-a9"
+@ CHECK: .cpu cortex-a9
+	.eabi_attribute Tag_CPU_arch, 10
+@ CHECK: .eabi_attribute 6, 10
+	.eabi_attribute Tag_CPU_arch_profile, 'A'
+@ CHECK: .eabi_attribute 7, 65
+	.eabi_attribute Tag_ARM_ISA_use, 0
+@ CHECK: .eabi_attribute 8, 0
+	.eabi_attribute Tag_THUMB_ISA_use, 2
+@ CHECK: .eabi_attribute 9, 2
+	.eabi_attribute Tag_FP_arch, 3
+@ CHECK: .eabi_attribute 10, 3
+	.eabi_attribute Tag_WMMX_arch, 0
+@ CHECK: .eabi_attribute 11, 0
+	.eabi_attribute Tag_Advanced_SIMD_arch, 1
+@ CHECK: .eabi_attribute 12, 1
+	.eabi_attribute Tag_PCS_config, 2
+@ CHECK: .eabi_attribute 13, 2
+	.eabi_attribute Tag_ABI_PCS_R9_use, 0
+@ CHECK: .eabi_attribute 14, 0
+	.eabi_attribute Tag_ABI_PCS_RW_data, 0
+@ CHECK: .eabi_attribute 15, 0
+	.eabi_attribute Tag_ABI_PCS_RO_data, 0
+@ CHECK: .eabi_attribute 16, 0
+	.eabi_attribute Tag_ABI_PCS_GOT_use, 0
+@ CHECK: .eabi_attribute 17, 0
+	.eabi_attribute Tag_ABI_PCS_wchar_t, 4
+@ CHECK: .eabi_attribute 18, 4
+	.eabi_attribute Tag_ABI_FP_rounding, 1
+@ CHECK: .eabi_attribute 19, 1
+	.eabi_attribute Tag_ABI_FP_denormal, 2
+@ CHECK: .eabi_attribute 20, 2
+	.eabi_attribute Tag_ABI_FP_exceptions, 1
+@ CHECK: .eabi_attribute 21, 1
+	.eabi_attribute Tag_ABI_FP_user_exceptions, 1
+@ CHECK: .eabi_attribute 22, 1
+	.eabi_attribute Tag_ABI_FP_number_model, 3
+@ CHECK: .eabi_attribute 23, 3
+	.eabi_attribute Tag_ABI_align_needed, 1
+@ CHECK: .eabi_attribute 24, 1
+	.eabi_attribute Tag_ABI_align_preserved, 2
+@ CHECK: .eabi_attribute 25, 2
+	.eabi_attribute Tag_ABI_enum_size, 3
+@ CHECK: .eabi_attribute 26, 3
+	.eabi_attribute Tag_ABI_HardFP_use, 0
+@ CHECK: .eabi_attribute 27, 0
+	.eabi_attribute Tag_ABI_VFP_args, 1
+@ CHECK: .eabi_attribute 28, 1
+	.eabi_attribute Tag_ABI_WMMX_args, 0
+@ CHECK: .eabi_attribute 29, 0
+	.eabi_attribute Tag_ABI_FP_optimization_goals, 1
+@ CHECK: .eabi_attribute 31, 1
+	.eabi_attribute Tag_compatibility, 1
+@ CHECK: .eabi_attribute 32, 1
+	.eabi_attribute Tag_compatibility, 1, "aeabi"
+@ CHECK: .eabi_attribute 32, 1, "aeabi"
+	.eabi_attribute Tag_CPU_unaligned_access, 0
+@ CHECK: .eabi_attribute 34, 0
+	.eabi_attribute Tag_FP_HP_extension, 0
+@ CHECK: .eabi_attribute 36, 0
+	.eabi_attribute Tag_ABI_FP_16bit_format, 0
+@ CHECK: .eabi_attribute 38, 0
+	.eabi_attribute Tag_MPextension_use, 0
+@ CHECK: .eabi_attribute 42, 0
+	.eabi_attribute Tag_DIV_use, 0
+@ CHECK: .eabi_attribute 44, 0
+	.eabi_attribute Tag_nodefaults, 0
+@ CHECK: .eabi_attribute 64, 0
+	.eabi_attribute Tag_also_compatible_with, "gnu"
+@ CHECK: .eabi_attribute 65, "gnu"
+	.eabi_attribute Tag_T2EE_use, 0
+@ CHECK: .eabi_attribute 66, 0
+	.eabi_attribute Tag_conformance, "2.09"
+@ CHECK: .eabi_attribute 67, "2.09"
+	.eabi_attribute Tag_Virtualization_use, 0
+@ CHECK: .eabi_attribute 68, 0
+
+@ ===--- Compatibility Checks ---===
+
+	.eabi_attribute Tag_ABI_align8_needed, 1
+@ CHECK: .eabi_attribute 24, 1
+	.eabi_attribute Tag_ABI_align8_preserved, 2
+@ CHECK: .eabi_attribute 25, 2
+
+@ ===--- GNU AS Compatibility Checks ---===
+
+	.eabi_attribute 2 * 2 + 1, "cortex-a9"
+@ CHECK: .cpu cortex-a9
+	.eabi_attribute 2 * 2 + 2, 5 * 2
+@ CHECK: .eabi_attribute 6, 10
+
diff --git a/test/MC/ARM/directive-eabi_attribute-diagnostics.s b/test/MC/ARM/directive-eabi_attribute-diagnostics.s
new file mode 100644
index 0000000..d1ae352
--- /dev/null
+++ b/test/MC/ARM/directive-eabi_attribute-diagnostics.s
@@ -0,0 +1,36 @@
+@ RUN: not llvm-mc -triple armv7-elf -filetype asm -o /dev/null %s 2>&1 \
+@ RUN:   | FileCheck %s
+
+	.syntax unified
+	.thumb
+
+	.eabi_attribute Tag_unknown_name, 0
+@ CHECK: error: attribute name not recognised: Tag_unknown_name
+@ CHECK: 	.eabi_attribute Tag_unknown_name
+@ CHECK:                        ^
+
+	.eabi_attribute [non_constant_expression], 0
+@ CHECK: error: expected numeric constant
+@ CHECK: 	.eabi_attribute [non_constant_expression], 0
+@ CHECK:                        ^
+
+	.eabi_attribute 42, "forty two"
+@ CHECK: error: expected numeric constant
+@ CHECK: 	.eabi_attribute 42, "forty two"
+@ CHECK:                            ^
+
+	.eabi_attribute 43, 43
+@ CHECK: error: bad string constant
+@ CHECK: 	.eabi_attribute 43, 43
+@ CHECK:                            ^
+
+	.eabi_attribute 0
+@ CHECK: error: comma expected
+@ CHECK: 	.eabi_attribute 0
+@ CHECK:                         ^
+
+	.eabi_attribute Tag_MPextension_use_old, 0
+@ CHECK: error: attribute name not recognised: Tag_MPextension_use_old
+@ CHECK: 	.eabi_attribute Tag_MPextension_use_old, 0
+@ CHECK:                        ^
+
diff --git a/test/MC/ARM/directive-eabi_attribute-overwrite.s b/test/MC/ARM/directive-eabi_attribute-overwrite.s
new file mode 100644
index 0000000..6fdded3
--- /dev/null
+++ b/test/MC/ARM/directive-eabi_attribute-overwrite.s
@@ -0,0 +1,17 @@
+@ RUN: llvm-mc -triple armv7-eabi -filetype obj -o - %s \
+@ RUN:   | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
+
+	.syntax unified
+	.thumb
+
+	.eabi_attribute Tag_compatibility, 1
+	.eabi_attribute Tag_compatibility, 1, "aeabi"
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     Value: 1, AEABI
+@ CHECK-ATTR:     TagName: compatibility
+@ CHECK-ATTR:     Description: AEABI Conformant
+@ CHECK-ATTR:   }
+@ CHECK-ATTR: }
+
diff --git a/test/MC/ARM/directive-even.s b/test/MC/ARM/directive-even.s
new file mode 100644
index 0000000..b92c9f9
--- /dev/null
+++ b/test/MC/ARM/directive-even.s
@@ -0,0 +1,70 @@
+@ RUN: llvm-mc -triple armv7-eabi -filetype obj -o - %s | llvm-readobj -s -sd \
+@ RUN:   | FileCheck %s
+
+	.syntax unified
+
+	.text
+
+	.even
+
+	.global aligned_function
+	.type aligned_function,%function
+aligned_function:
+	bkpt
+
+	.space 5
+
+	.even
+
+	.global unaligned_function
+	.type unaligned_function,%function
+unaligned_function:
+	bkpt
+
+@ CHECK: Section {
+@ CHECK:   Name: .text
+@ CHECK:   SectionData (
+@ CHECK:     0000: 700020E1 00000000 00007000 20E1
+@ CHECK:   )
+@ CHECK: }
+
+	.data
+
+	.space 15
+
+	.even
+
+	.global classifiable
+	.type classifiable,%object
+classifiable:
+	.byte 0xf1
+	.byte 0x51
+	.byte 0xa5
+	.byte 0xc1
+	.byte 0x00
+	.byte 0x00
+	.byte 0x1e
+	.byte 0xab
+
+	.even
+
+	.global declassified
+	.type declassified,%object
+declassified:
+	.byte 0x51
+	.byte 0xa5
+	.byte 0xc1
+	.byte 0xde
+	.byte 0x00
+	.byte 0x00
+	.byte 0xed
+	.byte 0xf1
+
+@ CHECK: Section {
+@ CHECK:   Name: .data
+@ CHECK:   SectionData (
+@ CHECK:     0000: 00000000 00000000 00000000 00000000
+@ CHECK:     0010: F151A5C1 00001EAB 51A5C1DE 0000EDF1
+@ CHECK:   )
+@ CHECK: }
+
diff --git a/test/MC/ARM/directive-fpu-multiple.s b/test/MC/ARM/directive-fpu-multiple.s
index 6a93f24..de2baaf 100644
--- a/test/MC/ARM/directive-fpu-multiple.s
+++ b/test/MC/ARM/directive-fpu-multiple.s
@@ -3,24 +3,16 @@
 @ The later .fpu directive should overwrite the earlier one.
 @ See also: directive-fpu-multiple2.s.
 
-@ RUN: llvm-mc < %s -triple arm-unknown-linux-gnueabi -filetype=obj \
-@ RUN:   | llvm-readobj -s -sd | FileCheck %s
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s | llvm-readobj -arm-attributes \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ATTR
 
 	.fpu neon
 	.fpu vfpv4
 
-@ CHECK:      Name: .ARM.attributes
-@ CHECK-NEXT: Type: SHT_ARM_ATTRIBUTES (0x70000003)
-@ CHECK-NEXT: Flags [ (0x0)
-@ CHECK-NEXT: ]
-@ CHECK-NEXT: Address: 0x0
-@ CHECK-NEXT: Offset: 0x34
-@ CHECK-NEXT: Size: 18
-@ CHECK-NEXT: Link: 0
-@ CHECK-NEXT: Info: 0
-@ CHECK-NEXT: AddressAlignment: 1
-@ CHECK-NEXT: EntrySize: 0
-@ CHECK-NEXT: SectionData (
-@ CHECK-NEXT:   0000: 41110000 00616561 62690001 07000000
-@ CHECK-NEXT:   0010: 0A05
-@ CHECK-NEXT: )
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: FP_arch
+@ CHECK-ATTR:     Description: VFPv4
+@ CHECK-ATTR:   }
+@ CHECK-ATTR: }
+
diff --git a/test/MC/ARM/directive-fpu-softvfp.s b/test/MC/ARM/directive-fpu-softvfp.s
new file mode 100644
index 0000000..f10845f
--- /dev/null
+++ b/test/MC/ARM/directive-fpu-softvfp.s
@@ -0,0 +1,8 @@
+@ RUN: llvm-mc < %s -triple armv7-unknown-linux-gnueabi -filetype=obj -o /dev/null
+
+@ Check softvfp as the FPU name.
+
+@ Expected result: The integrated-as should be able to assemble this file
+@ without problems.
+
+	.fpu	softvfp
diff --git a/test/MC/ARM/directive-literals.s b/test/MC/ARM/directive-literals.s
new file mode 100644
index 0000000..eb09867
--- /dev/null
+++ b/test/MC/ARM/directive-literals.s
@@ -0,0 +1,26 @@
+@ RUN: llvm-mc -triple arm %s | FileCheck %s
+
+	.data
+
+short:
+	.short 0
+	.short 0xdefe
+
+@ CHECK-LABEL: short
+@ CHECK-NEXT:	.short 0
+@ CHECK-NEXT:	.short 57086
+
+hword:
+	.hword 0
+	.hword 0xdefe
+
+@ CHECK-LABEL: hword
+@ CHECK-NEXT:	.short 0
+@ CHECK-NEXT:	.short 57086
+
+word:
+	.word 3
+
+@ CHECK-LABEL: word
+@ CHECK-NEXT:	.long 3
+
diff --git a/test/MC/ARM/directive-object_arch-2.s b/test/MC/ARM/directive-object_arch-2.s
new file mode 100644
index 0000000..3aca434
--- /dev/null
+++ b/test/MC/ARM/directive-object_arch-2.s
@@ -0,0 +1,22 @@
+@ RUN: llvm-mc -triple armv7-eabi -filetype obj -o - %s \
+@ RUN:   | llvm-readobj -arm-attributes | FileCheck %s
+
+	.syntax unified
+
+	.object_arch armv4
+	.arch armv7
+
+@ CHECK: FileAttributes {
+@ CHECK:   Attribute {
+@ CHECK:     Tag: 5
+@ CHECK:     TagName: CPU_name
+@ CHECK:     Value: 7
+@ CHECK:   }
+@ CHECK:   Attribute {
+@ CHECK:     Tag: 6
+@ CHEKC:     Value: 1
+@ CHECK:     TagName: CPU_arch
+@ CHECK:     Description: ARM v4
+@ CHECK:   }
+@ CHECK: }
+
diff --git a/test/MC/ARM/directive-object_arch-3.s b/test/MC/ARM/directive-object_arch-3.s
new file mode 100644
index 0000000..5dd2619
--- /dev/null
+++ b/test/MC/ARM/directive-object_arch-3.s
@@ -0,0 +1,11 @@
+@ RUN: llvm-mc -triple armv7-eabi -filetype asm -o - %s | FileCheck %s
+
+	.syntax unified
+
+	.arch armv7
+	.object_arch armv4
+
+@ CHECK: .text
+@ CHECK: .arch	armv7
+@ CHECK: .object_arch	armv4
+
diff --git a/test/MC/ARM/directive-object_arch-diagnostics.s b/test/MC/ARM/directive-object_arch-diagnostics.s
new file mode 100644
index 0000000..91b15c8
--- /dev/null
+++ b/test/MC/ARM/directive-object_arch-diagnostics.s
@@ -0,0 +1,23 @@
+@ RUN: not llvm-mc -triple armv7-eabi -filetype asm -o /dev/null %s 2>&1 \
+@ RUN:   | FileCheck %s
+
+	.syntax unified
+
+	.object_arch i686
+
+@ CHECK: error: unknown architecture 'i686'
+@ CHECK: 	.object_arch i686
+@ CHECK:                     ^
+
+	.object_arch armv4!
+
+@ CHECK: error: unexpected token
+@ CHECK: 	.object_arch armv4!
+@ CHECK:                          ^
+
+	.object_arch, invalid
+
+@ CHECK: error: unexpected token
+@ CHECK: 	.object_arch, invalid
+@ CHECK:                    ^
+
diff --git a/test/MC/ARM/directive-object_arch.s b/test/MC/ARM/directive-object_arch.s
new file mode 100644
index 0000000..0707077
--- /dev/null
+++ b/test/MC/ARM/directive-object_arch.s
@@ -0,0 +1,22 @@
+@ RUN: llvm-mc -triple armv7-eabi -filetype obj -o - %s \
+@ RUN:   | llvm-readobj -arm-attributes | FileCheck %s
+
+	.syntax unified
+
+	.arch armv7
+	.object_arch armv4
+
+@ CHECK: FileAttributes {
+@ CHECK:   Attribute {
+@ CHECK:     Tag: 5
+@ CHECK:     TagName: CPU_name
+@ CHECK:     Value: 7
+@ CHECK:   }
+@ CHECK:   Attribute {
+@ CHECK:     Tag: 6
+@ CHEKC:     Value: 1
+@ CHECK:     TagName: CPU_arch
+@ CHECK:     Description: ARM v4
+@ CHECK:   }
+@ CHECK: }
+
diff --git a/test/MC/ARM/directive-tlsdescseq-diagnostics.s b/test/MC/ARM/directive-tlsdescseq-diagnostics.s
new file mode 100644
index 0000000..0d33b58
--- /dev/null
+++ b/test/MC/ARM/directive-tlsdescseq-diagnostics.s
@@ -0,0 +1,35 @@
+@ RUN: not llvm-mc -triple armv7-linux-gnu -filetype asm -o /dev/null %s 2>&1 \
+@ RUN:   | FileCheck %s
+
+	.type missing_variable,%function
+missing_variable:
+.tlsdescseq
+
+@ CHECK: error: expected variable after '.tlsdescseq' directive
+@ CHECK: 	.tlsdescseq
+@ CHECK:                   ^
+
+	.type bad_expression,%function
+bad_expression:
+.tlsdescseq variable(tlsdesc)
+
+@ CHECK: error: unexpected token
+@ CHECK: 	.tlsdescseq variable(tlsdesc)
+@ CHECK:                            ^
+
+	.type trailing_garbage,%function
+trailing_garbage:
+.tlsdescseq variable,
+
+@ CHECK: error: unexpected token
+@ CHECK: 	.tlsdescseq variable,
+@ CHECK:                            ^
+
+	.type invalid_use,%function
+invalid_use:
+	blx invalid(tlsdescseq)
+
+@ CHECK: error: invalid variant 'tlsdescseq'
+@ CHECK: 	blx invalid(tlsdescseq)
+@ CHECK:                    ^
+
diff --git a/test/MC/ARM/directive-tlsdescseq.s b/test/MC/ARM/directive-tlsdescseq.s
new file mode 100644
index 0000000..12db058
--- /dev/null
+++ b/test/MC/ARM/directive-tlsdescseq.s
@@ -0,0 +1,33 @@
+@ RUN: llvm-mc -triple armv7-linux-gnu -filetype obj -o - %s | llvm-readobj -r \
+@ RUN:   | FileCheck %s
+@ RUN: llvm-mc -triple armv7-linux-gnu -filetype asm -o - %s \
+@ RUN:   | FileCheck -check-prefix CHECK-ASM %s
+
+	.type tlsdescseq,%function
+tlsdescseq:
+	ldr r1, [pc, #8]
+1:
+.tlsdescseq variable
+	add r2, pc, r1
+.tlsdescseq variable
+	ldr r3, [r1, #4]
+.tlsdescseq variable
+	blx r3
+2:
+	.word variable(tlsdesc) + (. - 1b)
+
+@ CHECK: Relocations [
+@ CHECK:     0x4 R_ARM_TLS_DESCSEQ variable 0x0
+@ CHECK:     0x8 R_ARM_TLS_DESCSEQ variable 0x0
+@ CHECK:     0xC R_ARM_TLS_DESCSEQ variable 0x0
+@ CHECK:     0x10 R_ARM_TLS_GOTDESC variable 0x0
+@ CHECK: ]
+
+@ CHECK-ASM: ldr r1, [pc, #8]
+@ CHECK-ASM: .tlsdescseq variable
+@ CHECK-ASM: add r2, pc, r1
+@ CHECK-ASM: .tlsdescseq variable
+@ CHECK-ASM: ldr r3, [r1, #4]
+@ CHECK-ASM: .tlsdescseq variable
+@ CHECK-ASM: blx r3
+
diff --git a/test/MC/ARM/directive-word-diagnostics.s b/test/MC/ARM/directive-word-diagnostics.s
new file mode 100644
index 0000000..e68595b
--- /dev/null
+++ b/test/MC/ARM/directive-word-diagnostics.s
@@ -0,0 +1,12 @@
+@ RUN: not llvm-mc -triple armv7-eabi -filetype asm -o /dev/null 2>&1 %s \
+@ RUN:   | FileCheck %s
+
+	.cpu armv7
+
+	.type double_diagnostics,%function
+double_diagnostics:
+	.word invalid(invalid) + 32
+
+@ CHECK: error: invalid variant 'invalid'
+@ CHECK-NOT: error: unexpected token at start of statement
+
diff --git a/test/MC/ARM/dot-req-case-insensitive.s b/test/MC/ARM/dot-req-case-insensitive.s
new file mode 100644
index 0000000..c1ca566
--- /dev/null
+++ b/test/MC/ARM/dot-req-case-insensitive.s
@@ -0,0 +1,20 @@
+@ RUN: llvm-mc -triple=arm < %s | FileCheck %s
+ .syntax unified
+_foo:
+
+ OBJECT .req r2
+ mov r4, OBJECT
+ mov r4, oBjEcT
+ .unreq oBJECT
+
+_foo2:
+ OBJECT .req r5
+ mov r4, OBJECT
+ .unreq OBJECT
+
+@ CHECK-LABEL: _foo:
+@ CHECK: mov r4, r2
+@ CHECK: mov r4, r2
+
+@ CHECK-LABEL: _foo2:
+@ CHECK: mov r4, r5
diff --git a/test/MC/ARM/dwarf-cfi-initial-state.s b/test/MC/ARM/dwarf-cfi-initial-state.s
new file mode 100644
index 0000000..2d638e9
--- /dev/null
+++ b/test/MC/ARM/dwarf-cfi-initial-state.s
@@ -0,0 +1,16 @@
+# RUN: llvm-mc < %s -triple=armv7-linux-gnueabi -filetype=obj -o - \
+# RUN:     | llvm-dwarfdump - | FileCheck %s
+
+.cfi_sections .debug_frame
+.cfi_startproc
+bx lr
+.cfi_endproc
+
+# CHECK: .debug_frame contents:
+# CHECK: CIE
+# CHECK-NOT: DW_CFA
+# When llvm-dwarfdump prints the full info for the DW_CFA_def_cfa
+# field, we can check that here too.
+# CHECK: DW_CFA_def_cfa:
+# CHECK-NOT: DW_CFA
+# CHECK: FDE
diff --git a/test/MC/ARM/eh-directive-cantunwind-diagnostics.s b/test/MC/ARM/eh-directive-cantunwind-diagnostics.s
index 640cc30..9eca164 100644
--- a/test/MC/ARM/eh-directive-cantunwind-diagnostics.s
+++ b/test/MC/ARM/eh-directive-cantunwind-diagnostics.s
@@ -24,7 +24,7 @@ func1:
 @ CHECK: error: .personality can't be used with .cantunwind directive
 @ CHECK:        .personality __gxx_personality_v0
 @ CHECK:        ^
-@ CHECK: error: .cantunwind was specified here
+@ CHECK: note: .cantunwind was specified here
 @ CHECK:        .cantunwind
 @ CHECK:        ^
         .fnend
@@ -44,7 +44,7 @@ func2:
 @ CHECK: error: .handlerdata can't be used with .cantunwind directive
 @ CHECK:        .handlerdata
 @ CHECK:        ^
-@ CHECK: error: .cantunwind was specified here
+@ CHECK: note: .cantunwind was specified here
 @ CHECK:        .cantunwind
 @ CHECK:        ^
         .fnend
@@ -64,7 +64,7 @@ func3:
 @ CHECK: error: .cantunwind can't be used with .personality directive
 @ CHECK:        .cantunwind
 @ CHECK:        ^
-@ CHECK: error: .personality was specified here
+@ CHECK: note: .personality was specified here
 @ CHECK:        .personality __gxx_personality_v0
 @ CHECK:        ^
         .fnend
@@ -84,7 +84,7 @@ func4:
 @ CHECK: error: .cantunwind can't be used with .handlerdata directive
 @ CHECK:        .cantunwind
 @ CHECK:        ^
-@ CHECK: error: .handlerdata was specified here
+@ CHECK: note: .handlerdata was specified here
 @ CHECK:        .handlerdata
 @ CHECK:        ^
         .fnend
diff --git a/test/MC/ARM/eh-directive-fnstart-diagnostics.s b/test/MC/ARM/eh-directive-fnstart-diagnostics.s
index 75ddd9f..11364de 100644
--- a/test/MC/ARM/eh-directive-fnstart-diagnostics.s
+++ b/test/MC/ARM/eh-directive-fnstart-diagnostics.s
@@ -24,7 +24,7 @@ func1:
 @ CHECK: error: .fnstart starts before the end of previous one
 @ CHECK:        .fnstart
 @ CHECK:        ^
-@ CHECK: error: previous .fnstart starts here
+@ CHECK: note: .fnstart was specified here
 @ CHECK:        .fnstart
 @ CHECK:        ^
 func2:
diff --git a/test/MC/ARM/eh-directive-movsp-diagnostics.s b/test/MC/ARM/eh-directive-movsp-diagnostics.s
new file mode 100644
index 0000000..519e7d7
--- /dev/null
+++ b/test/MC/ARM/eh-directive-movsp-diagnostics.s
@@ -0,0 +1,102 @@
+@ RUN: not llvm-mc -triple armv7-eabi -filetype asm -o /dev/null 2>&1 %s \
+@ RUN:  | FileCheck %s
+
+	.syntax unified
+	.thumb
+
+	.global false_start
+	.type false_start,%function
+	.thumb_func
+false_start:
+	.movsp r7
+
+@ CHECK: error: .fnstart must precede .movsp directive
+@ CHECK: 	.movsp r7
+@ CHECK:        ^
+
+	.global beyond_saving
+	.type beyond_saving,%function
+	.thumb_func
+beyond_saving:
+	.fnstart
+	.setfp r11, sp, #8
+	add r11, sp, #8
+	.movsp r7
+	mov r7, r11
+	.fnend
+
+@ CHECK: error: unexpected .movsp directive
+@ CHECK: 	.movsp r7
+@ CHECK:        ^
+
+
+	.global sp_invalid
+	.type sp_invalid,%function
+	.thumb_func
+sp_invalid:
+	.fnstart
+	.movsp r13
+	mov sp, sp
+	.fnend
+
+@ CHECK: error: sp and pc are not permitted in .movsp directive
+@ CHECK: 	.movsp r13
+@ CHECK:               ^
+
+
+	.global pc_invalid
+	.type pc_invalid,%function
+	.thumb_func
+pc_invalid:
+	.fnstart
+	.movsp r15
+	mov sp, pc
+	.fnend
+
+@ CHECK: error: sp and pc are not permitted in .movsp directive
+@ CHECK: 	.movsp r15
+@ CHECK:               ^
+
+
+	.global constant_required
+	.type constant_required,%function
+	.thumb_func
+constant_required:
+	.fnstart
+	.movsp r11,
+	mov sp, r11
+	.fnend
+
+@ CHECK: error: expected #constant
+@ CHECK: 	.movsp r11,
+@ CHECK:                   ^
+
+
+	.global constant_constant
+	.type constant_constant,%function
+	.thumb_func
+constant_constant:
+	.fnstart
+	.movsp r11, #constant
+	mov sp, r11
+	.fnend
+
+@ CHECK: error: offset must be an immediate constant
+@ CHECK: 	.movsp r11, #constant
+@ CHECK:                     ^
+
+
+	.arm
+
+	.global register_required
+	.type register_required,%function
+register_required:
+	.fnstart
+	.movsp #42
+	mov sp, #42
+	.fnend
+
+@ CHECK: error: register expected
+@ CHECK: 	.movsp #42
+@ CHECK:               ^
+
diff --git a/test/MC/ARM/eh-directive-movsp.s b/test/MC/ARM/eh-directive-movsp.s
new file mode 100644
index 0000000..620f5b7
--- /dev/null
+++ b/test/MC/ARM/eh-directive-movsp.s
@@ -0,0 +1,44 @@
+@ RUN: llvm-mc -triple armv7-eabi -filetype obj -o - %s | llvm-readobj -s -sd \
+@ RUN:   | FileCheck %s
+
+	.syntax unified
+	.thumb
+
+	.section .duplicate
+
+	.global duplicate
+	.type duplicate,%function
+duplicate:
+	.fnstart
+	.setfp sp, sp, #8
+	add sp, sp, #8
+	.movsp r11
+	mov r11, sp
+	.fnend
+
+@ CHECK: Section {
+@ CHECK:   Name: .ARM.exidx.duplicate
+@ CHECK:   SectionData (
+@ CHECK:     0000: 00000000 B09B9B80
+@ CHECK:   )
+@ CHECK: }
+
+
+	.section .squash
+
+	.global squash
+	.type squash,%function
+squash:
+	.fnstart
+	.movsp ip
+	mov ip, sp
+	.save {fp, ip, lr}
+	stmfd sp!, {fp, ip, lr}
+	.fnend
+
+@ CHECK: Section {
+@ CHECK:   Name: .ARM.exidx.squash
+@ CHECK:   SectionData (
+@ CHECK:     0000: 00000000 9C808580
+@ CHECK:   )
+@ CHECK: }
diff --git a/test/MC/ARM/eh-directive-personalityindex-diagnostics.s b/test/MC/ARM/eh-directive-personalityindex-diagnostics.s
new file mode 100644
index 0000000..2dc2c80
--- /dev/null
+++ b/test/MC/ARM/eh-directive-personalityindex-diagnostics.s
@@ -0,0 +1,122 @@
+@ RUN: not llvm-mc -triple armv7-linux-eabi -filetype asm -o /dev/null %s 2>&1  \
+@ RUN:   | FileCheck %s
+
+	.syntax unified
+	.thumb
+
+	.global function
+	.type function,%function
+	.thumb_func
+function:
+	.personalityindex 0
+
+@ CHECK: error: .fnstart must precede .personalityindex directive
+@ CHECK: 	.personalityindex 0
+@ CHECK:        ^
+
+	.global ununwindable
+	.type ununwindable,%function
+	.thumb_func
+ununwindable:
+	.fnstart
+	.cantunwind
+	.personalityindex 0
+	.fnend
+
+@ CHECK: error: .personalityindex cannot be used with .cantunwind
+@ CHECK: 	.personalityindex 0
+@ CHECK:        ^
+@ CHECK: note: .cantunwind was specified here
+@ CHECK: 	.cantunwind
+@ CHECK:        ^
+
+	.global nodata
+	.type nodata,%function
+	.thumb_func
+nodata:
+	.fnstart
+	.handlerdata
+	.personalityindex 0
+	.fnend
+
+@ CHECK: error: .personalityindex must precede .handlerdata directive
+@ CHECK: 	.personalityindex 0
+@ CHECK:        ^
+@ CHECK: note: .handlerdata was specified here
+@ CHECK: 	.handlerdata
+@ CHECK:        ^
+
+	.global multiple_personality
+	.type multiple_personality,%function
+	.thumb_func
+multiple_personality:
+	.fnstart
+	.personality __aeabi_personality_pr0
+	.personalityindex 0
+	.fnend
+
+@ CHECK: error: multiple personality directives
+@ CHECK: 	.personalityindex 0
+@ CHECK:        ^
+@ CHECK: note: .personality was specified here
+@ CHECK: 	.personality __aeabi_personality_pr0
+@ CHECK:        ^
+@ CHECK: note: .personalityindex was specified here
+@ CHECK: 	.personalityindex 0
+@ CHECK:       ^
+
+	.global multiple_personality_indicies
+	.type multiple_personality_indicies,%function
+	.thumb_func
+multiple_personality_indicies:
+	.fnstart
+	.personalityindex 0
+	.personalityindex 1
+	.fnend
+
+@ CHECK: error: multiple personality directives
+@ CHECK: 	.personalityindex 1
+@ CHECK:        ^
+@ CHECK: note: .personalityindex was specified here
+@ CHECK: 	.personalityindex 0
+@ CHECK:        ^
+@ CHECK: note: .personalityindex was specified here
+@ CHECK: 	.personalityindex 1
+@ CHECK:        ^
+
+	.global invalid_expression
+	.type invalid_expression,%function
+	.thumb_func
+invalid_expression:
+	.fnstart
+	.personalityindex <expression>
+	.fnend
+
+@ CHECK: error: unknown token in expression
+@ CHECK: 	.personalityindex <expression>
+@ CHECK:                          ^
+
+	.global nonconstant_expression
+	.type nonconstant_expression,%function
+	.thumb_func
+nonconstant_expression:
+	.fnstart
+	.personalityindex nonconstant_expression
+	.fnend
+
+@ CHECK: error: index must be a constant number
+@ CHECK: 	.personalityindex nonconstant_expression
+@ CHECK:                          ^
+
+	.global bad_index
+	.type bad_index,%function
+	.thumb_func
+bad_index:
+	.fnstart
+	.personalityindex 42
+	.fnend
+
+@ CHECK: error: personality routine index should be in range [0-3]
+@ CHECK: 	.personalityindex 42
+@ CHECK:                          ^
+
diff --git a/test/MC/ARM/eh-directive-personalityindex.s b/test/MC/ARM/eh-directive-personalityindex.s
new file mode 100644
index 0000000..5517227
--- /dev/null
+++ b/test/MC/ARM/eh-directive-personalityindex.s
@@ -0,0 +1,202 @@
+@ RUN: llvm-mc -triple armv7-linux-eabi -filetype obj -o - %s \
+@ RUN:   | llvm-readobj -s -sd -sr | FileCheck %s
+
+	.syntax unified
+	.thumb
+
+
+	.section .pr0
+
+	.global pr0
+	.type pr0,%function
+	.thumb_func
+pr0:
+	.fnstart
+	.personalityindex 0
+	bx lr
+	.fnend
+
+@ CHECK: Section {
+@ CHECK:   Name: .ARM.exidx.pr0
+@ CHECK:   SectionData (
+@ CHECK:     0000: 00000000 B0B0B080
+@ CHECK:   )
+@ CHECK: }
+
+@ CHECK: Section {
+@ CHECK:   Name: .rel.ARM.exidx.pr0
+@ CHECK:   Relocations [
+@ CHECK:     0x0 R_ARM_PREL31 .pr0 0x0
+@ CHECK:     0x0 R_ARM_NONE __aeabi_unwind_cpp_pr0 0x0
+@ CHECK:   ]
+@ CHECK: }
+
+	.section .pr0.nontrivial
+
+	.global pr0_nontrivial
+	.type pr0_nontrivial,%function
+	.thumb_func
+pr0_nontrivial:
+	.fnstart
+	.personalityindex 0
+	.pad #0x10
+	sub sp, sp, #0x10
+	add sp, sp, #0x10
+	bx lr
+	.fnend
+
+@ CHECK: Section {
+@ CHECK:   Name: .ARM.exidx.pr0.nontrivial
+@ CHECK:   SectionData (
+@ CHECK:     0000: 00000000 B0B00380
+@ CHECK:   )
+@ CHECK: }
+
+@ CHECK: Section {
+@ CHECK:   Name: .rel.ARM.exidx.pr0.nontrivial
+@ CHECK:   Relocations [
+@ CHECK:     0x0 R_ARM_PREL31 .pr0.nontrivial 0x0
+@ CHECK:     0x0 R_ARM_NONE __aeabi_unwind_cpp_pr0 0x0
+@ CHECK:   ]
+@ CHECK: }
+
+	.section .pr1
+
+	.global pr1
+	.type pr1,%function
+	.thumb_func
+pr1:
+	.fnstart
+	.personalityindex 1
+	bx lr
+	.fnend
+
+@ CHECK: Section {
+@ CHECK:   Name: .ARM.extab.pr1
+@ CHECK:   SectionData (
+@ CHECK:     0000: B0B00081 00000000
+@ CHECK:   )
+@ CHECK: }
+
+@ CHECK: Section {
+@ CHECK:   Name: .ARM.exidx.pr1
+@ CHECK:   SectionData (
+@ CHECK:     0000: 00000000 00000000
+@ CHECK:   )
+@ CHECK: }
+
+@ CHECK: Section {
+@ CHECK:   Name: .rel.ARM.exidx.pr1
+@ CHECK:   Relocations [
+@ CHECK:     0x0 R_ARM_PREL31 .pr1 0x0
+@ CHECK:     0x0 R_ARM_NONE __aeabi_unwind_cpp_pr1 0x0
+@ CHECK:     0x4 R_ARM_PREL31 .ARM.extab.pr1 0x0
+@ CHECK:   ]
+@ CHECK: }
+
+	.section .pr1.nontrivial
+
+	.global pr1_nontrivial
+	.type pr1_nontrivial,%function
+	.thumb_func
+pr1_nontrivial:
+	.fnstart
+	.personalityindex 1
+	.pad #0x10
+	sub sp, sp, #0x10
+	add sp, sp, #0x10
+	bx lr
+	.fnend
+
+@ CHECK: Section {
+@ CHECK:   Name: .ARM.extab.pr1.nontrivial
+@ CHECK:   SectionData (
+@ CHECK:     0000: B0030081 00000000
+@ CHECK:   )
+@ CHECK: }
+
+@ CHECK: Section {
+@ CHECK:   Name: .ARM.exidx.pr1.nontrivial
+@ CHECK:   SectionData (
+@ CHECK:     0000: 00000000 00000000
+@ CHECK:   )
+@ CHECK: }
+
+@ CHECK: Section {
+@ CHECK:   Name: .rel.ARM.exidx.pr1.nontrivial
+@ CHECK:   Relocations [
+@ CHECK:     0x0 R_ARM_PREL31 .pr1.nontrivial 0x0
+@ CHECK:     0x0 R_ARM_NONE __aeabi_unwind_cpp_pr1 0x0
+@ CHECK:     0x4 R_ARM_PREL31 .ARM.extab.pr1.nontrivial 0x0
+@ CHECK:   ]
+@ CHECK: }
+
+	.section .pr2
+
+	.global pr2
+	.type pr2,%function
+	.thumb_func
+pr2:
+	.fnstart
+	.personalityindex 2
+	bx lr
+	.fnend
+
+@ CHECK: Section {
+@ CHECK:   Name: .ARM.extab.pr2
+@ CHECK:   SectionData (
+@ CHECK:     0000: B0B00082 00000000
+@ CHECK:   )
+@ CHECK: }
+
+@ CHECK: Section {
+@ CHECK:   Name: .ARM.exidx.pr2
+@ CHECK:   SectionData (
+@ CHECK:     0000: 00000000 00000000
+@ CHECK:   )
+@ CHECK: }
+
+@ CHECK: Section {
+@ CHECK:   Name: .rel.ARM.exidx.pr2
+@ CHECK:   Relocations [
+@ CHECK:     0x0 R_ARM_PREL31 .pr2 0x0
+@ CHECK:     0x0 R_ARM_NONE __aeabi_unwind_cpp_pr2 0x0
+@ CHECK:     0x4 R_ARM_PREL31 .ARM.extab.pr2 0x0
+@ CHECK:   ]
+@ CHECK: }
+
+	.section .pr2.nontrivial
+	.type pr2_nontrivial,%function
+	.thumb_func
+pr2_nontrivial:
+	.fnstart
+	.personalityindex 2
+	.pad #0x10
+	sub sp, sp, #0x10
+	add sp, sp, #0x10
+	bx lr
+	.fnend
+
+@ CHECK: Section {
+@ CHECK:   Name: .ARM.extab.pr2.nontrivial
+@ CHECK:   SectionData (
+@ CHECK:     0000: B0030082 00000000
+@ CHECK:   )
+@ CHECK: }
+
+@ CHECK: Section {
+@ CHECK:   Name: .ARM.exidx.pr2.nontrivial
+@ CHECK:   SectionData (
+@ CHECK:     0000: 00000000 00000000
+@ CHECK:   )
+@ CHECK: }
+
+@ CHECK: Section {
+@ CHECK:   Name: .rel.ARM.exidx.pr2.nontrivial
+@ CHECK:   Relocations [
+@ CHECK:     0x0 R_ARM_PREL31 .pr2.nontrivial 0x0
+@ CHECK:     0x0 R_ARM_NONE __aeabi_unwind_cpp_pr2 0x0
+@ CHECK:     0x4 R_ARM_PREL31 .ARM.extab.pr2.nontrivial 0x0
+@ CHECK:   ]
+@ CHECK: }
+
diff --git a/test/MC/ARM/eh-directive-setfp.s b/test/MC/ARM/eh-directive-setfp.s
index dfa79e6..ce7fe10 100644
--- a/test/MC/ARM/eh-directive-setfp.s
+++ b/test/MC/ARM/eh-directive-setfp.s
@@ -9,7 +9,7 @@
 @ then libunwind will reconstruct the stack pointer from the frame pointer.
 @ The reconstruction code is implemented by two different unwind opcode:
 @ (i) the unwind opcode to copy stack offset from the other register, and
-@ (ii) the unwind opcode to add or substract the stack offset.
+@ (ii) the unwind opcode to add or subtract the stack offset.
 @
 @ This file includes several cases separated by different range of -offset
 @
diff --git a/test/MC/ARM/eh-directive-unwind_raw-diagnostics.s b/test/MC/ARM/eh-directive-unwind_raw-diagnostics.s
new file mode 100644
index 0000000..72a208e
--- /dev/null
+++ b/test/MC/ARM/eh-directive-unwind_raw-diagnostics.s
@@ -0,0 +1,73 @@
+@ RUN: not llvm-mc -triple armv7-linux-eabi -filetype asm -o /dev/null 2>&1 %s \
+@ RUN:   | FileCheck %s
+
+	.syntax unified
+
+	.type require_fnstart,%function
+require_fnstart:
+	.unwind_raw 0, 0
+
+@ CHECK: error: .fnstart must precede .unwind_raw directive
+@ CHECK: 	.unwind_raw 0, 0
+@ CHECK:        ^
+
+	.type check_arguments,%function
+check_arguments:
+	.fnstart
+	.unwind_raw
+	.fnend
+
+@ CHECK: error: expected expression
+@ CHECK: 	.unwind_raw
+@ CHECK:                   ^
+
+	.type check_stack_offset,%function
+check_stack_offset:
+	.fnstart
+	.unwind_raw ., 0
+	.fnend
+
+@ CHECK: error: offset must be a constant
+@ CHECK: 	.unwind_raw ., 0
+@ CHECK:                    ^
+
+	.type comma_check,%function
+comma_check:
+	.fnstart
+	.unwind_raw 0
+	.fnend
+
+@ CHECK: error: expected comma
+@ CHECK: 	.unwind_raw 0
+@ CHECK:                     ^
+
+	.type require_opcode,%function
+require_opcode:
+	.fnstart
+	.unwind_raw 0,
+	.fnend
+
+@ CHECK: error: expected opcode expression
+@ CHECK: 	.unwind_raw 0,
+@ CHECK:                      ^
+
+	.type require_opcode_constant,%function
+require_opcode_constant:
+	.fnstart
+	.unwind_raw 0, .
+	.fnend
+
+@ CHECK: error: opcode value must be a constant
+@ CHECK: 	.unwind_raw 0, .
+@ CHECK:                       ^
+
+	.type check_opcode_range,%function
+check_opcode_range:
+	.fnstart
+	.unwind_raw 0, 0x100
+	.fnend
+
+@ CHECK: error: invalid opcode
+@ CHECK: 	.unwind_raw 0, 0x100
+@ CHECK:                       ^
+
diff --git a/test/MC/ARM/eh-directive-unwind_raw.s b/test/MC/ARM/eh-directive-unwind_raw.s
new file mode 100644
index 0000000..c617aa3
--- /dev/null
+++ b/test/MC/ARM/eh-directive-unwind_raw.s
@@ -0,0 +1,110 @@
+@ RUN: llvm-mc -triple armv7-linux-eabi -filetype obj -o - %s | llvm-readobj -u \
+@ RUN:   | FileCheck %s
+
+	.syntax unified
+
+	.type save,%function
+	.thumb_func
+save:
+	.fnstart
+	.unwind_raw 4, 0xb1, 0x01
+	push {r0}
+	pop {r0}
+	bx lr
+	.fnend
+
+	.type empty,%function
+	.thumb_func
+empty:
+	.fnstart
+	.unwind_raw 0, 0xb0
+	bx lr
+	.fnend
+
+	.type extended,%function
+	.thumb_func
+extended:
+	.fnstart
+	.unwind_raw 12, 0x9b, 0x40, 0x84, 0x80, 0xb0, 0xb0
+	@ .save {fp, lr}
+	stmfd sp!, {fp, lr}
+	@ .setfp fp, sp, #4
+	add fp, sp, #4
+	@ .pad #8
+	sub sp, sp, #8
+	add sp, sp, #8
+	sub fp, sp, #4
+	ldmfd sp!, {fp, lr}
+	bx lr
+	.fnend
+
+	.type refuse,%function
+	.thumb_func
+refuse:
+	.fnstart
+	.unwind_raw 0, 0x80, 0x00
+	bx lr
+	.fnend
+
+	.type stack_adjust,%function
+	.thumb_func
+stack_adjust:
+	.fnstart
+	.setfp fp, sp, #32
+	.unwind_raw 24, 0xc2
+	.fnend
+
+@ CHECK: UnwindInformation {
+@ CHECK:   UnwindIndexTable {
+@ CHECK:     SectionName: .ARM.exidx
+@ CHECK:     Entries [
+@ CHECK:       Entry {
+@ CHECK:         Model: Compact (Inline)
+@ CHECK:         PersonalityIndex: 0
+@ CHECK:         Opcodes [
+@ CHECK:           0xB1 0x01 ; pop {r0}
+@ CHECK:           0xB0      ; finish
+@ CHECK:         ]
+@ CHECK:       }
+@ CHECK:       Entry {
+@ CHECK:         Model: Compact (Inline)
+@ CHECK:         PersonalityIndex: 0
+@ CHECK:         Opcodes [
+@ CHECK:           0xB0      ; finish
+@ CHECK:           0xB0      ; finish
+@ CHECK:           0xB0      ; finish
+@ CHECK:         ]
+@ CHECK:       }
+@ CHECK:       Entry {
+@ CHECK:         ExceptionHandlingTable: .ARM.extab
+@ CHECK:         Model: Compact
+@ CHECK:         PersonalityIndex: 1
+@ CHECK:         Opcodes [
+@ CHECK:           0x9B      ; vsp = r11
+@ CHECK:           0x40      ; vsp = vsp - 4
+@ CHECK:           0x84 0x80 ; pop {fp, lr}
+@ CHECK:           0xB0      ; finish
+@ CHECK:           0xB0      ; finish
+@ CHECK:         ]
+@ CHECK:       }
+@ CHECK:       Entry {
+@ CHECK:         Model: Compact (Inline)
+@ CHECK:         PersonalityIndex: 0
+@ CHECK:         Opcodes [
+@ CHECK:           0x80 0x00 ; refuse to unwind
+@ CHECK:           0xB0      ; finish
+@ CHECK:         ]
+@ CHECK:       }
+@ CHECK:       Entry {
+@ CHECK:         Model: Compact (Inline)
+@ CHECK:         PersonalityIndex: 0
+@ CHECK:         Opcodes [
+@ CHECK:           0x9B      ; vsp = r11
+@ CHECK:           0x4D      ; vsp = vsp - 56
+@ CHECK:           0xC2      ; pop {wR10, wR11, wR12}
+@ CHECK:         ]
+@ CHECK:       }
+@ CHECK:     ]
+@ CHECK:   }
+@ CHECK: }
+
diff --git a/test/MC/ARM/elf-jump24-fixup.s b/test/MC/ARM/elf-jump24-fixup.s
index 75a4b86..affdcda 100644
--- a/test/MC/ARM/elf-jump24-fixup.s
+++ b/test/MC/ARM/elf-jump24-fixup.s
@@ -6,4 +6,4 @@
 foo:
 	b.w	bar
 
-@ CHECK: {{[0-9]+}} R_ARM_THM_JUMP24 bar
+@ CHECK: {{[0-9a-f]+}} R_ARM_THM_JUMP24 bar
diff --git a/test/MC/ARM/elf-thumbfunc-reloc.ll b/test/MC/ARM/elf-thumbfunc-reloc.ll
index 9fd360e..f502739 100644
--- a/test/MC/ARM/elf-thumbfunc-reloc.ll
+++ b/test/MC/ARM/elf-thumbfunc-reloc.ll
@@ -3,7 +3,7 @@
 ; RUN: FileCheck %s
 
 ; FIXME: This file needs to be in .s form!
-; We wanna test relocatable thumb function call,
+; We want to test relocatable thumb function call,
 ; but ARMAsmParser cannot handle "bl foo(PLT)" yet
 
 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:32-n32"
@@ -32,6 +32,10 @@ entry:
 ; CHECK-NEXT:   Section (2) .rel.text {
 ; CHECK-NEXT:     0x8 R_ARM_THM_CALL foo 0x0
 ; CHECK-NEXT:   }
+; CHECK-NEXT:   Section (7) .rel.ARM.exidx {
+; CHECK-NEXT:     0x0 R_ARM_PREL31 .text 0x0
+; CHECK-NEXT:     0x8 R_ARM_PREL31 .text 0x0
+; CHECK-NEXT:   }
 ; CHECK-NEXT: ]
 
 ; make sure foo is thumb function: bit 0 = 1
diff --git a/test/MC/ARM/fconst.s b/test/MC/ARM/fconst.s
new file mode 100644
index 0000000..e2c1b39
--- /dev/null
+++ b/test/MC/ARM/fconst.s
@@ -0,0 +1,22 @@
+@ RUN: llvm-mc -mcpu=cortex-a8 -triple armv7-apple-darwin -show-encoding < %s | FileCheck %s
+
+@ fconstd/fconsts aliases
+        fconsts s4, #0x0
+        fconsts s4, #0x70
+        fconstd d3, #0x0
+        fconstd d3, #0x70
+
+        fconstsne s5, #0x1
+        fconstsgt s5, #0x20
+        fconstdlt d2, #0x3
+        fconstdge d2, #0x40
+
+@ CHECK: vmov.f32        s4, #2.000000e+00 @ encoding: [0x00,0x2a,0xb0,0xee]
+@ CHECK: vmov.f32        s4, #1.000000e+00 @ encoding: [0x00,0x2a,0xb7,0xee]
+@ CHECK: vmov.f64        d3, #2.000000e+00 @ encoding: [0x00,0x3b,0xb0,0xee]
+@ CHECK: vmov.f64        d3, #1.000000e+00 @ encoding: [0x00,0x3b,0xb7,0xee]
+
+@ CHECK: vmovne.f32      s5, #2.125000e+00 @ encoding: [0x01,0x2a,0xf0,0x1e]
+@ CHECK: vmovgt.f32      s5, #8.000000e+00 @ encoding: [0x00,0x2a,0xf2,0xce]
+@ CHECK: vmovlt.f64      d2, #2.375000e+00 @ encoding: [0x03,0x2b,0xb0,0xbe]
+@ CHECK: vmovge.f64      d2, #1.250000e-01 @ encoding: [0x00,0x2b,0xb4,0xae]
diff --git a/test/MC/ARM/fixup-cpu-mode.s b/test/MC/ARM/fixup-cpu-mode.s
new file mode 100644
index 0000000..17f29f9
--- /dev/null
+++ b/test/MC/ARM/fixup-cpu-mode.s
@@ -0,0 +1,9 @@
+// RUN: llvm-mc -filetype=obj -triple thumbv7-linux-gnu %s -o %t
+// RUN: llvm-objdump -triple thumbv7-linux-gnu -d %t | FileCheck %s
+
+//PR18303
+.code 16
+.global edata
+b edata // CHECK: b.w
+.code 32
+
diff --git a/test/MC/ARM/fp-const-errors.s b/test/MC/ARM/fp-const-errors.s
new file mode 100644
index 0000000..2a68ddb
--- /dev/null
+++ b/test/MC/ARM/fp-const-errors.s
@@ -0,0 +1,22 @@
+@ RUN: not llvm-mc -mcpu=cortex-a8 -triple armv7-none-linux-gnueabi < %s 2>&1 | FileCheck %s
+
+@ Test for floating point constants that are out of the 8-bit encoded value range
+vmov.f32 s2, #32.0
+@ CHECK: error: invalid operand for instruction
+
+vmov.f64 d2, #32.0
+@ CHECK: error: invalid operand for instruction
+
+@ Test that vmov.f instructions do not accept an 8-bit encoded float as an operand
+vmov.f32 s1, #0x70
+@ CHECK: error: invalid floating point immediate
+
+vmov.f64 d2, #0x70
+@ CHECK: error: invalid floating point immediate
+
+@ Test that fconst instructions do not accept a float constant as an operand
+fconsts s1, #1.0
+@ CHECK: error: invalid floating point immediate
+
+fconstd d2, #1.0
+@ CHECK: error: invalid floating point immediate
diff --git a/test/MC/ARM/inst-arm-suffixes.s b/test/MC/ARM/inst-arm-suffixes.s
new file mode 100644
index 0000000..a80ef47
--- /dev/null
+++ b/test/MC/ARM/inst-arm-suffixes.s
@@ -0,0 +1,15 @@
+@ RUN: not llvm-mc %s -triple armv7-linux-gnueabi -filetype asm -o - 2>&1 \
+@ RUN:   | FileCheck -check-prefix CHECK-ERROR %s
+
+	.syntax unified
+	.arm
+
+	.align 2
+	.global suffixes_invalid_in_arm
+	.type suffixes_invalid_in_arm,%function
+suffixes_invalid_in_arm:
+	.inst.n 2
+@ CHECK-ERROR: width suffixes are invalid in ARM mode
+	.inst.w 4
+@ CHECK-ERROR: width suffixes are invalid in ARM mode
+
diff --git a/test/MC/ARM/inst-constant-required.s b/test/MC/ARM/inst-constant-required.s
new file mode 100644
index 0000000..d4863dd
--- /dev/null
+++ b/test/MC/ARM/inst-constant-required.s
@@ -0,0 +1,15 @@
+@ RUN: not llvm-mc %s -triple=armv7-linux-gnueabi -filetype asm -o - 2>&1 \
+@ RUN:   | FileCheck -check-prefix CHECK-ERROR %s
+
+	.syntax unified
+	.arm
+
+	.align 2
+	.global constant_expression_required
+	.type constant_expression_required,%function
+constant_expression_required:
+.Label:
+	movs r0, r0
+	.inst .Label
+@ CHECK-ERROR: expected constant expression
+
diff --git a/test/MC/ARM/inst-directive-emit.s b/test/MC/ARM/inst-directive-emit.s
new file mode 100644
index 0000000..13b7edf
--- /dev/null
+++ b/test/MC/ARM/inst-directive-emit.s
@@ -0,0 +1,20 @@
+@ RUN: llvm-mc %s -triple armv7-linux-gnueabi -filetype asm -o - | FileCheck %s
+
+	.syntax unified
+	.thumb
+
+	.align 2
+	.global emit_asm
+	.type emit_asm,%function
+emit_asm:
+	.inst.w 0xf2400000, 0xf2c00000
+
+@ CHECK: 	.text
+@ CHECK: 	.code	16
+@ CHECK: 	.align	2
+@ CHECK: 	.globl	emit_asm
+@ CHECK: 	.type	emit_asm,%function
+@ CHECK: emit_asm:
+@ CHECK: 	inst.w 0xF2400000
+@ CHECK: 	inst.w 0xF2C00000
+
diff --git a/test/MC/ARM/inst-directive.s b/test/MC/ARM/inst-directive.s
new file mode 100644
index 0000000..a3fd8c2
--- /dev/null
+++ b/test/MC/ARM/inst-directive.s
@@ -0,0 +1,81 @@
+@ RUN: llvm-mc %s -triple=armv7-linux-gnueabi -filetype=obj -o - \
+@ RUN:   | llvm-readobj -s -sd | FileCheck %s
+
+	.syntax unified
+
+@-------------------------------------------------------------------------------
+@ arm_inst
+@-------------------------------------------------------------------------------
+	.arm
+
+	.section	.inst.arm_inst
+
+	.align	2
+	.global	arm_inst
+	.type	arm_inst,%function
+arm_inst:
+	.inst 0xdefe
+
+@ CHECK: Section {
+@ CHECK:   Name: .inst.arm_inst
+@ CHECK:   SectionData (
+@ CHECK-NEXT:     0000: FEDE0000
+@ CHECK-NEXT:   )
+
+@-------------------------------------------------------------------------------
+@ thumb_inst_n
+@-------------------------------------------------------------------------------
+	.thumb
+
+	.section	.inst.thumb_inst_n
+
+	.align	2
+	.global	thumb_inst_n
+	.type	thumb_inst_n,%function
+thumb_inst_n:
+	.inst.n 0xdefe
+
+@ CHECK: Section {
+@ CHECK:   Name: .inst.thumb_inst_n
+@ CHECK:   SectionData (
+@ CHECK-NEXT:     0000: FEDE
+@ CHECK-NEXT:   )
+
+@-------------------------------------------------------------------------------
+@ thumb_inst_w
+@-------------------------------------------------------------------------------
+	.thumb
+
+	.section	.inst.thumb_inst_w
+
+	.align	2
+	.global	thumb_inst_w
+	.type	thumb_inst_w,%function
+thumb_inst_w:
+	.inst.w 0x00000000
+
+@ CHECK: Section {
+@ CHECK:   Name: .inst.thumb_inst_w
+@ CHECK:   SectionData (
+@ CHECK-NEXT:     0000: 00000000
+@ CHECK-NEXT:   )
+
+@-------------------------------------------------------------------------------
+@ thumb_inst_w
+@-------------------------------------------------------------------------------
+	.thumb
+
+	.section	.inst.thumb_inst_inst
+
+	.align	2
+	.global	thumb_inst_inst
+	.type	thumb_inst_inst,%function
+thumb_inst_inst:
+	.inst.w 0xf2400000, 0xf2c00000
+
+@ CHECK: Section {
+@ CHECK:   Name: .inst.thumb_inst_inst
+@ CHECK:   SectionData (
+@ CHECK-NEXT:     0000: 40F20000 C0F20000
+@ CHECK-NEXT:   )
+
diff --git a/test/MC/ARM/inst-overflow.s b/test/MC/ARM/inst-overflow.s
new file mode 100644
index 0000000..133d53f
--- /dev/null
+++ b/test/MC/ARM/inst-overflow.s
@@ -0,0 +1,14 @@
+@ RUN: not llvm-mc %s -triple armv7-linux-gnueabi -filetype asm -o - 2>&1 \
+@ RUN:   | FileCheck -check-prefix CHECK-ERROR %s
+
+	.syntax unified
+	.arm
+
+	.align 2
+	.global constant_overflow
+	.type constant_overflow,%function
+constant_overflow:
+	.inst 1 << 32
+@ CHECK-ERROR: inst operand is too big
+
+
diff --git a/test/MC/ARM/inst-thumb-overflow-2.s b/test/MC/ARM/inst-thumb-overflow-2.s
new file mode 100644
index 0000000..1b3d642
--- /dev/null
+++ b/test/MC/ARM/inst-thumb-overflow-2.s
@@ -0,0 +1,13 @@
+@ RUN: not llvm-mc %s -triple armv7-linux-gnueabi -filetype asm -o - 2>&1 \
+@ RUN:   | FileCheck -check-prefix CHECK-ERRORS %s
+
+	.syntax unified
+	.thumb
+
+	.align 2
+	.global constant_overflow
+	.type constant_overflow,%function
+constant_overflow:
+	.inst.w 1 << 32
+@ CHECK-ERRORS: inst.w operand is too big
+
diff --git a/test/MC/ARM/inst-thumb-overflow.s b/test/MC/ARM/inst-thumb-overflow.s
new file mode 100644
index 0000000..34626f9
--- /dev/null
+++ b/test/MC/ARM/inst-thumb-overflow.s
@@ -0,0 +1,13 @@
+@ RUN: not llvm-mc %s -triple armv7-linux-gnueabi -filetype asm -o - 2>&1 \
+@ RUN:   | FileCheck -check-prefix CHECK-ERROR %s
+
+	.syntax unified
+	.thumb
+
+	.align 2
+	.global constant_overflow
+	.type constant_overflow,%function
+constant_overflow:
+	.inst.n 1 << 31
+@ CHECK-ERROR: inst.n operand is too big, use inst.w instead
+
diff --git a/test/MC/ARM/inst-thumb-suffixes.s b/test/MC/ARM/inst-thumb-suffixes.s
new file mode 100644
index 0000000..40def3c
--- /dev/null
+++ b/test/MC/ARM/inst-thumb-suffixes.s
@@ -0,0 +1,13 @@
+@ RUN: not llvm-mc %s -triple armv7-linux-gnueabi -filetype asm -o - 2>&1 \
+@ RUN:   | FileCheck -check-prefix CHECK-ERROR %s
+
+	.syntax unified
+	.thumb
+
+	.align 2
+	.global suffixes_required_in_thumb
+	.type suffixes_required_in_thumb,%function
+suffixes_required_in_thumb:
+	.inst 0x0000
+@ CHECK-ERROR: cannot determine Thumb instruction size, use inst.n/inst.w instead
+
diff --git a/test/MC/ARM/invalid-vector-index.s b/test/MC/ARM/invalid-vector-index.s
new file mode 100644
index 0000000..b58e1bd
--- /dev/null
+++ b/test/MC/ARM/invalid-vector-index.s
@@ -0,0 +1,5 @@
+@ RUN: not llvm-mc -triple=armv7-apple-darwin < %s 2>&1 | FileCheck %s
+
+ldrd r6, r7 [r2, #15]
+
+@ CHECK: error: immediate value expected for vector index
diff --git a/test/MC/ARM/ldr-pseudo-darwin.s b/test/MC/ARM/ldr-pseudo-darwin.s
new file mode 100644
index 0000000..a77f6d5
--- /dev/null
+++ b/test/MC/ARM/ldr-pseudo-darwin.s
@@ -0,0 +1,241 @@
+@ This test has a partner (ldr-pseudo.s) that contains matching
+@ tests for the ldr-pseudo on linux targets. We need separate files
+@ because the syntax for switching sections and temporary labels differs
+@ between darwin and linux. Any tests added here should have a matching
+@ test added there.
+
+@RUN: llvm-mc -triple   armv7-apple-darwin %s | FileCheck %s
+@RUN: llvm-mc -triple thumbv5-apple-darwin %s | FileCheck %s
+@RUN: llvm-mc -triple thumbv7-apple-darwin %s | FileCheck %s
+
+@
+@ Check that large constants are converted to ldr from constant pool
+@
+@ simple test
+.section __TEXT,b,regular,pure_instructions
+@ CHECK-LABEL: f3:
+f3:
+  ldr r0, =0x10001
+@ CHECK: ldr r0, Ltmp0
+
+@ loading multiple constants
+.section __TEXT,c,regular,pure_instructions
+@ CHECK-LABEL: f4:
+f4:
+  ldr r0, =0x10002
+@ CHECK: ldr r0, Ltmp1
+  adds r0, r0, #1
+  adds r0, r0, #1
+  adds r0, r0, #1
+  adds r0, r0, #1
+  ldr r0, =0x10003
+@ CHECK: ldr r0, Ltmp2
+  adds r0, r0, #1
+  adds r0, r0, #1
+
+@ TODO: the same constants should have the same constant pool location
+.section __TEXT,d,regular,pure_instructions
+@ CHECK-LABEL: f5:
+f5:
+  ldr r0, =0x10004
+@ CHECK: ldr r0, Ltmp3
+  adds r0, r0, #1
+  adds r0, r0, #1
+  adds r0, r0, #1
+  adds r0, r0, #1
+  adds r0, r0, #1
+  adds r0, r0, #1
+  adds r0, r0, #1
+  ldr r0, =0x10004
+@ CHECK: ldr r0, Ltmp4
+  adds r0, r0, #1
+  adds r0, r0, #1
+  adds r0, r0, #1
+  adds r0, r0, #1
+  adds r0, r0, #1
+  adds r0, r0, #1
+
+@ a section defined in multiple pieces should be merged and use a single constant pool
+.section __TEXT,e,regular,pure_instructions
+@ CHECK-LABEL: f6:
+f6:
+  ldr r0, =0x10006
+@ CHECK: ldr r0, Ltmp5
+  adds r0, r0, #1
+  adds r0, r0, #1
+  adds r0, r0, #1
+
+.section __TEXT,f,regular,pure_instructions
+@ CHECK-LABEL: f7:
+f7:
+  adds r0, r0, #1
+  adds r0, r0, #1
+  adds r0, r0, #1
+
+.section __TEXT,e,regular,pure_instructions
+@ CHECK-LABEL: f8:
+f8:
+  adds r0, r0, #1
+  ldr r0, =0x10007
+@ CHECK: ldr r0, Ltmp6
+  adds r0, r0, #1
+  adds r0, r0, #1
+
+@
+@ Check that symbols can be loaded using ldr pseudo
+@
+
+@ load an undefined symbol
+.section __TEXT,g,regular,pure_instructions
+@ CHECK-LABEL: f9:
+f9:
+  ldr r0, =foo
+@ CHECK: ldr r0, Ltmp7
+
+@ load a symbol from another section
+.section __TEXT,h,regular,pure_instructions
+@ CHECK-LABEL: f10:
+f10:
+  ldr r0, =f5
+@ CHECK: ldr r0, Ltmp8
+
+@ load a symbol from the same section
+.section __TEXT,i,regular,pure_instructions
+@ CHECK-LABEL: f11:
+f11:
+  ldr r0, =f12
+@ CHECK: ldr r0, Ltmp9
+
+@ CHECK-LABEL: f12:
+f12:
+  adds r0, r0, #1
+  adds r0, r0, #1
+
+.section __TEXT,j,regular,pure_instructions
+@ mix of symbols and constants
+@ CHECK-LABEL: f13:
+f13:
+  adds r0, r0, #1
+  adds r0, r0, #1
+  ldr r0, =0x101
+@ CHECK: ldr r0, Ltmp10
+  adds r0, r0, #1
+  adds r0, r0, #1
+  ldr r0, =bar
+@ CHECK: ldr r0, Ltmp11
+  adds r0, r0, #1
+  adds r0, r0, #1
+@
+@ Check for correct usage in other contexts
+@
+
+@ usage in macro
+.macro useit_in_a_macro
+  ldr r0, =0x10008
+  ldr r0, =baz
+.endm
+.section __TEXT,k,regular,pure_instructions
+@ CHECK-LABEL: f14:
+f14:
+  useit_in_a_macro
+@ CHECK: ldr r0, Ltmp12
+@ CHECK: ldr r0, Ltmp13
+
+@ usage with expressions
+.section __TEXT,l,regular,pure_instructions
+@ CHECK-LABEL: f15:
+f15:
+  ldr r0, =0x10001+8
+@ CHECK: ldr r0, Ltmp14
+  adds r0, r0, #1
+  ldr r0, =bar+4
+@ CHECK: ldr r0, Ltmp15
+  adds r0, r0, #1
+
+@
+@ Constant Pools
+@
+@ CHECK: .section __TEXT,b,regular,pure_instructions
+@ CHECK: .align 2
+@ CHECK: .data_region
+@ CHECK-LABEL: Ltmp0:
+@ CHECK: .long 65537
+@ CHECK: .end_data_region
+
+@ CHECK: .section __TEXT,c,regular,pure_instructions
+@ CHECK: .align 2
+@ CHECK: .data_region
+@ CHECK-LABEL: Ltmp1:
+@ CHECK: .long 65538
+@ CHECK-LABEL: Ltmp2:
+@ CHECK: .long 65539
+@ CHECK: .end_data_region
+
+@ CHECK: .section __TEXT,d,regular,pure_instructions
+@ CHECK: .align 2
+@ CHECK: .data_region
+@ CHECK-LABEL: Ltmp3:
+@ CHECK: .long 65540
+@ CHECK-LABEL: Ltmp4:
+@ CHECK: .long 65540
+@ CHECK: .end_data_region
+
+@ CHECK: .section __TEXT,e,regular,pure_instructions
+@ CHECK: .align 2
+@ CHECK: .data_region
+@ CHECK-LABEL: Ltmp5:
+@ CHECK: .long 65542
+@ CHECK-LABEL: Ltmp6:
+@ CHECK: .long 65543
+@ CHECK: .end_data_region
+
+@ Should not switch to section because it has no constant pool
+@ CHECK-NOT: .section __TEXT,f,regular,pure_instructions
+
+@ CHECK: .section __TEXT,g,regular,pure_instructions
+@ CHECK: .align 2
+@ CHECK: .data_region
+@ CHECK-LABEL: Ltmp7:
+@ CHECK: .long foo
+@ CHECK: .end_data_region
+
+@ CHECK: .section __TEXT,h,regular,pure_instructions
+@ CHECK: .align 2
+@ CHECK: .data_region
+@ CHECK-LABEL: Ltmp8:
+@ CHECK: .long f5
+@ CHECK: .end_data_region
+
+@ CHECK: .section __TEXT,i,regular,pure_instructions
+@ CHECK: .align 2
+@ CHECK: .data_region
+@ CHECK-LABEL: Ltmp9:
+@ CHECK: .long f12
+@ CHECK: .end_data_region
+
+@ CHECK: .section __TEXT,j,regular,pure_instructions
+@ CHECK: .align 2
+@ CHECK: .data_region
+@ CHECK-LABEL: Ltmp10:
+@ CHECK: .long 257
+@ CHECK-LABEL: Ltmp11:
+@ CHECK: .long bar
+@ CHECK: .end_data_region
+
+@ CHECK: .section __TEXT,k,regular,pure_instructions
+@ CHECK: .align 2
+@ CHECK: .data_region
+@ CHECK-LABEL: Ltmp12:
+@ CHECK: .long 65544
+@ CHECK-LABEL: Ltmp13:
+@ CHECK: .long baz
+@ CHECK: .end_data_region
+
+@ CHECK: .section __TEXT,l,regular,pure_instructions
+@ CHECK: .align 2
+@ CHECK: .data_region
+@ CHECK-LABEL: Ltmp14:
+@ CHECK: .long 65545
+@ CHECK-LABEL: Ltmp15:
+@ CHECK: .long bar+4
+@ CHECK: .end_data_region
diff --git a/test/MC/ARM/ldr-pseudo-obj-errors.s b/test/MC/ARM/ldr-pseudo-obj-errors.s
new file mode 100644
index 0000000..dce88f0
--- /dev/null
+++ b/test/MC/ARM/ldr-pseudo-obj-errors.s
@@ -0,0 +1,17 @@
+@RUN: not llvm-mc -triple=armv7-unknown-linux-gnueabi -filetype=obj %s -o %t1 2> %t2
+@RUN: cat %t2 | FileCheck %s
+@RUN: not llvm-mc -triple=armv7-darwin-apple -filetype=obj %s -o %t1_darwin 2> %t2_darwin
+@RUN: cat %t2_darwin | FileCheck %s
+
+@These tests look for errors that should be reported for invalid object layout
+@with the ldr pseudo. They are tested separately from parse errors because they
+@only trigger when the file has successfully parsed and the object file is about
+@to be written out.
+
+.text
+foo:
+  ldr r0, =0x101
+  .space 8000
+@ CHECK: error: out of range pc-relative fixup value
+@ CHECK: ldr r0, =0x101
+@ CHECK: ^
diff --git a/test/MC/ARM/ldr-pseudo-parse-errors.s b/test/MC/ARM/ldr-pseudo-parse-errors.s
new file mode 100644
index 0000000..2e6114d
--- /dev/null
+++ b/test/MC/ARM/ldr-pseudo-parse-errors.s
@@ -0,0 +1,10 @@
+@RUN: not llvm-mc -triple=armv7-unknown-linux-gnueabi < %s  2>&1 | FileCheck %s
+@RUN: not llvm-mc -triple=armv7-apple-darwin < %s  2>&1 | FileCheck %s
+
+.text
+bar:
+  mov r0, =0x101
+@ CHECK: error: unexpected token in operand
+@ CHECK: mov r0, =0x101
+@ CHECK:         ^
+
diff --git a/test/MC/ARM/ldr-pseudo.s b/test/MC/ARM/ldr-pseudo.s
new file mode 100644
index 0000000..df0d88a
--- /dev/null
+++ b/test/MC/ARM/ldr-pseudo.s
@@ -0,0 +1,221 @@
+@ This test has a partner (ldr-pseudo-darwin.s) that contains matching
+@ tests for the ldr-pseudo on darwin targets. We need separate files
+@ because the syntax for switching sections and temporary labels differs
+@ between darwin and linux. Any tests added here should have a matching
+@ test added there.
+
+@RUN: llvm-mc -triple   armv7-unknown-linux-gnueabi %s | FileCheck %s
+@RUN: llvm-mc -triple thumbv5-unknown-linux-gnueabi %s | FileCheck %s
+@RUN: llvm-mc -triple thumbv7-unknown-linux-gnueabi %s | FileCheck %s
+
+@
+@ Check that large constants are converted to ldr from constant pool
+@
+@ simple test
+.section b,"ax",%progbits
+@ CHECK-LABEL: f3:
+f3:
+  ldr r0, =0x10001
+@ CHECK: ldr r0, .Ltmp[[TMP0:[0-9]+]]
+
+@ loading multiple constants
+.section c,"ax",%progbits
+@ CHECK-LABEL: f4:
+f4:
+  ldr r0, =0x10002
+@ CHECK: ldr r0, .Ltmp[[TMP1:[0-9]+]]
+  adds r0, r0, #1
+  adds r0, r0, #1
+  adds r0, r0, #1
+  adds r0, r0, #1
+  ldr r0, =0x10003
+@ CHECK: ldr r0, .Ltmp[[TMP2:[0-9]+]]
+  adds r0, r0, #1
+  adds r0, r0, #1
+
+@ TODO: the same constants should have the same constant pool location
+.section d,"ax",%progbits
+@ CHECK-LABEL: f5:
+f5:
+  ldr r0, =0x10004
+@ CHECK: ldr r0, .Ltmp[[TMP3:[0-9]+]]
+  adds r0, r0, #1
+  adds r0, r0, #1
+  adds r0, r0, #1
+  adds r0, r0, #1
+  adds r0, r0, #1
+  adds r0, r0, #1
+  adds r0, r0, #1
+  ldr r0, =0x10004
+@ CHECK: ldr r0, .Ltmp[[TMP4:[0-9]+]]
+  adds r0, r0, #1
+  adds r0, r0, #1
+  adds r0, r0, #1
+  adds r0, r0, #1
+  adds r0, r0, #1
+  adds r0, r0, #1
+
+@ a section defined in multiple pieces should be merged and use a single constant pool
+.section e,"ax",%progbits
+@ CHECK-LABEL: f6:
+f6:
+  ldr r0, =0x10006
+@ CHECK: ldr r0, .Ltmp[[TMP5:[0-9]+]]
+  adds r0, r0, #1
+  adds r0, r0, #1
+  adds r0, r0, #1
+
+.section f, "ax", %progbits
+@ CHECK-LABEL: f7:
+f7:
+  adds r0, r0, #1
+  adds r0, r0, #1
+  adds r0, r0, #1
+
+.section e, "ax", %progbits
+@ CHECK-LABEL: f8:
+f8:
+  adds r0, r0, #1
+  ldr r0, =0x10007
+@ CHECK: ldr r0, .Ltmp[[TMP6:[0-9]+]]
+  adds r0, r0, #1
+  adds r0, r0, #1
+
+@
+@ Check that symbols can be loaded using ldr pseudo
+@
+
+@ load an undefined symbol
+.section g,"ax",%progbits
+@ CHECK-LABEL: f9:
+f9:
+  ldr r0, =foo
+@ CHECK: ldr r0, .Ltmp[[TMP7:[0-9]+]]
+
+@ load a symbol from another section
+.section h,"ax",%progbits
+@ CHECK-LABEL: f10:
+f10:
+  ldr r0, =f5
+@ CHECK: ldr r0, .Ltmp[[TMP8:[0-9]+]]
+
+@ load a symbol from the same section
+.section i,"ax",%progbits
+@ CHECK-LABEL: f11:
+f11:
+  ldr r0, =f12
+@ CHECK: ldr r0, .Ltmp[[TMP9:[0-9]+]]
+
+@ CHECK-LABEL: f12:
+f12:
+  adds r0, r0, #1
+  adds r0, r0, #1
+
+.section j,"ax",%progbits
+@ mix of symbols and constants
+@ CHECK-LABEL: f13:
+f13:
+  adds r0, r0, #1
+  adds r0, r0, #1
+  ldr r0, =0x101
+@ CHECK: ldr r0, .Ltmp[[TMP10:[0-9]+]]
+  adds r0, r0, #1
+  adds r0, r0, #1
+  ldr r0, =bar
+@ CHECK: ldr r0, .Ltmp[[TMP11:[0-9]+]]
+  adds r0, r0, #1
+  adds r0, r0, #1
+@
+@ Check for correct usage in other contexts
+@
+
+@ usage in macro
+.macro useit_in_a_macro
+  ldr r0, =0x10008
+  ldr r0, =baz
+.endm
+.section k,"ax",%progbits
+@ CHECK-LABEL: f14:
+f14:
+  useit_in_a_macro
+@ CHECK: ldr r0, .Ltmp[[TMP12:[0-9]+]]
+@ CHECK: ldr r0, .Ltmp[[TMP13:[0-9]+]]
+
+@ usage with expressions
+.section l, "ax", %progbits
+@ CHECK-LABEL: f15:
+f15:
+  ldr r0, =0x10001+8
+@ CHECK: ldr r0, .Ltmp[[TMP14:[0-9]+]]
+  adds r0, r0, #1
+  ldr r0, =bar+4
+@ CHECK: ldr r0, .Ltmp[[TMP15:[0-9]+]]
+  adds r0, r0, #1
+
+@
+@ Constant Pools
+@
+@ CHECK: .section b,"ax",%progbits
+@ CHECK: .align 2
+@ CHECK: .Ltmp[[TMP0]]
+@ CHECK: .long 65537
+
+@ CHECK: .section c,"ax",%progbits
+@ CHECK: .align 2
+@ CHECK: .Ltmp[[TMP1]]
+@ CHECK: .long 65538
+@ CHECK: .Ltmp[[TMP2]]
+@ CHECK: .long 65539
+
+@ CHECK: .section d,"ax",%progbits
+@ CHECK: .align 2
+@ CHECK: .Ltmp[[TMP3]]
+@ CHECK: .long 65540
+@ CHECK: .Ltmp[[TMP4]]
+@ CHECK: .long 65540
+
+@ CHECK: .section e,"ax",%progbits
+@ CHECK: .align 2
+@ CHECK: .Ltmp[[TMP5]]
+@ CHECK: .long 65542
+@ CHECK: .Ltmp[[TMP6]]
+@ CHECK: .long 65543
+
+@ Should not switch to section because it has no constant pool
+@ CHECK-NOT: .section f,"ax",%progbits
+
+@ CHECK: .section g,"ax",%progbits
+@ CHECK: .align 2
+@ CHECK: .Ltmp[[TMP7]]
+@ CHECK: .long foo
+
+@ CHECK: .section h,"ax",%progbits
+@ CHECK: .align 2
+@ CHECK: .Ltmp[[TMP8]]
+@ CHECK: .long f5
+
+@ CHECK: .section i,"ax",%progbits
+@ CHECK: .align 2
+@ CHECK: .Ltmp[[TMP9]]
+@ CHECK: .long f12
+
+@ CHECK: .section j,"ax",%progbits
+@ CHECK: .align 2
+@ CHECK: .Ltmp[[TMP10]]
+@ CHECK: .long 257
+@ CHECK: .Ltmp[[TMP11]]
+@ CHECK: .long bar
+
+@ CHECK: .section k,"ax",%progbits
+@ CHECK: .align 2
+@ CHECK: .Ltmp[[TMP12]]
+@ CHECK: .long 65544
+@ CHECK: .Ltmp[[TMP13]]
+@ CHECK: .long baz
+
+@ CHECK: .section l,"ax",%progbits
+@ CHECK: .align 2
+@ CHECK: .Ltmp[[TMP14]]
+@ CHECK: .long 65545
+@ CHECK: .Ltmp[[TMP15]]
+@ CHECK: .long bar+4
diff --git a/test/MC/ARM/ldrd-strd-gnu-sp.s b/test/MC/ARM/ldrd-strd-gnu-sp.s
new file mode 100644
index 0000000..21efae9
--- /dev/null
+++ b/test/MC/ARM/ldrd-strd-gnu-sp.s
@@ -0,0 +1,9 @@
+// PR19320
+// RUN: llvm-mc -triple=armv7-linux-gnueabi -show-encoding < %s | FileCheck %s
+.text
+
+// CHECK: ldrd	r12, sp, [r0, #32]      @ encoding: [0xd0,0xc2,0xc0,0xe1]
+        ldrd    r12, [r0, #32]
+
+// CHECK: strd	r12, sp, [r0, #32]      @ encoding: [0xf0,0xc2,0xc0,0xe1]
+        strd    r12, [r0, #32]
diff --git a/test/MC/ARM/ltorg-darwin.s b/test/MC/ARM/ltorg-darwin.s
new file mode 100644
index 0000000..de6b7e9
--- /dev/null
+++ b/test/MC/ARM/ltorg-darwin.s
@@ -0,0 +1,151 @@
+@ This test has a partner (ltorg.s) that contains matching
+@ tests for the .ltorg on linux targets. We need separate files
+@ because the syntax for switching sections and temporary labels differs
+@ between darwin and linux. Any tests added here should have a matching
+@ test added there.
+
+@RUN: llvm-mc -triple   armv7-apple-darwin %s | FileCheck %s
+@RUN: llvm-mc -triple thumbv5-apple-darwin %s | FileCheck %s
+@RUN: llvm-mc -triple thumbv7-apple-darwin %s | FileCheck %s
+
+@ check that ltorg dumps the constant pool at the current location
+.section __TEXT,a,regular,pure_instructions
+@ CHECK-LABEL: f2:
+f2:
+  ldr r0, =0x10001
+@ CHECK: ldr r0, Ltmp0
+  adds r0, r0, #1
+  adds r0, r0, #1
+  b f3
+.ltorg
+@ constant pool
+@ CHECK: .align 2
+@ CHECK: .data_region
+@ CHECK-LABEL: Ltmp0:
+@ CHECK: .long 65537
+@ CHECK: .end_data_region
+
+@ CHECK-LABEL: f3:
+f3:
+  adds r0, r0, #1
+  adds r0, r0, #1
+
+@ check that ltorg clears the constant pool after dumping it
+.section __TEXT,b,regular,pure_instructions
+@ CHECK-LABEL: f4:
+f4:
+  ldr r0, =0x10002
+@ CHECK: ldr r0, Ltmp1
+  adds r0, r0, #1
+  adds r0, r0, #1
+  b f5
+.ltorg
+@ constant pool
+@ CHECK: .align 2
+@ CHECK: .data_region
+@ CHECK-LABEL: Ltmp1:
+@ CHECK: .long 65538
+@ CHECK: .end_data_region
+
+@ CHECK-LABEL: f5:
+f5:
+  adds r0, r0, #1
+  adds r0, r0, #1
+  ldr r0, =0x10003
+@ CHECK: ldr r0, Ltmp2
+  adds r0, r0, #1
+  b f6
+.ltorg
+@ constant pool
+@ CHECK: .align 2
+@ CHECK: .data_region
+@ CHECK-LABEL: Ltmp2:
+@ CHECK: .long 65539
+@ CHECK: .end_data_region
+
+@ CHECK-LABEL: f6:
+f6:
+  adds r0, r0, #1
+  adds r0, r0, #1
+
+@ check that ltorg does not issue an error if there is no constant pool
+.section __TEXT,c,regular,pure_instructions
+@ CHECK-LABEL: f7:
+f7:
+  adds r0, r0, #1
+  b f8
+  .ltorg
+f8:
+  adds r0, r0, #1
+
+@ check that ltorg works for labels
+.section __TEXT,d,regular,pure_instructions
+@ CHECK-LABEL: f9:
+f9:
+  adds r0, r0, #1
+  adds r0, r0, #1
+  ldr r0, =bar
+@ CHECK: ldr r0, Ltmp3
+  adds r0, r0, #1
+  adds r0, r0, #1
+  adds r0, r0, #1
+  b f10
+.ltorg
+@ constant pool
+@ CHECK: .align 2
+@ CHECK: .data_region
+@ CHECK-LABEL: Ltmp3:
+@ CHECK: .long bar
+@ CHECK: .end_data_region
+
+@ CHECK-LABEL: f10:
+f10:
+  adds r0, r0, #1
+  adds r0, r0, #1
+
+@ check that use of ltorg does not prevent dumping non-empty constant pools at end of section
+.section __TEXT,e,regular,pure_instructions
+@ CHECK-LABEL: f11:
+f11:
+  adds r0, r0, #1
+  adds r0, r0, #1
+  ldr r0, =0x10004
+@ CHECK: ldr r0, Ltmp4
+  b f12
+  .ltorg
+@ constant pool
+@ CHECK: .align 2
+@ CHECK: .data_region
+@ CHECK-LABEL: Ltmp4:
+@ CHECK: .long 65540
+@ CHECK: .end_data_region
+
+@ CHECK-LABEL: f12:
+f12:
+  adds r0, r0, #1
+  ldr r0, =0x10005
+@ CHECK: ldr r0, Ltmp5
+
+.section __TEXT,f,regular,pure_instructions
+@ CHECK-LABEL: f13
+f13:
+  adds r0, r0, #1
+  adds r0, r0, #1
+
+@ should not have a constant pool at end of section with empty constant pools
+@ CHECK-NOT: .section __TEXT,a,regular,pure_instructions
+@ CHECK-NOT: .section __TEXT,b,regular,pure_instructions
+@ CHECK-NOT: .section __TEXT,c,regular,pure_instructions
+@ CHECK-NOT: .section __TEXT,d,regular,pure_instructions
+
+@ should have a non-empty constant pool at end of this section
+@ CHECK: .section __TEXT,e,regular,pure_instructions
+@ constant pool
+@ CHECK: .align 2
+@ CHECK: .data_region
+@ CHECK-LABEL: Ltmp5:
+@ CHECK: .long 65541
+@ CHECK: .end_data_region
+
+@ should not have a constant pool at end of section with empty constant pools
+@ CHECK-NOT: .section __TEXT,f,regular,pure_instructions
diff --git a/test/MC/ARM/ltorg.s b/test/MC/ARM/ltorg.s
new file mode 100644
index 0000000..e28862c
--- /dev/null
+++ b/test/MC/ARM/ltorg.s
@@ -0,0 +1,138 @@
+@ This test has a partner (ltorg-darwin.s) that contains matching
+@ tests for the .ltorg on darwin targets. We need separate files
+@ because the syntax for switching sections and temporary labels differs
+@ between darwin and linux. Any tests added here should have a matching
+@ test added there.
+
+@RUN: llvm-mc -triple   armv7-unknown-linux-gnueabi %s | FileCheck %s
+@RUN: llvm-mc -triple thumbv5-unknown-linux-gnueabi %s | FileCheck %s
+@RUN: llvm-mc -triple thumbv7-unknown-linux-gnueabi %s | FileCheck %s
+
+@ check that ltorg dumps the constant pool at the current location
+.section a,"ax",%progbits
+@ CHECK-LABEL: f2:
+f2:
+  ldr r0, =0x10001
+@ CHECK: ldr r0, .Ltmp[[TMP0:[0-9+]]]
+  adds r0, r0, #1
+  adds r0, r0, #1
+  b f3
+.ltorg
+@ constant pool
+@ CHECK: .align 2
+@ CHECK: .Ltmp[[TMP0]]
+@ CHECK: .long 65537
+
+@ CHECK-LABEL: f3:
+f3:
+  adds r0, r0, #1
+  adds r0, r0, #1
+
+@ check that ltorg clears the constant pool after dumping it
+.section b,"ax",%progbits
+@ CHECK-LABEL: f4:
+f4:
+  ldr r0, =0x10002
+@ CHECK: ldr r0, .Ltmp[[TMP1:[0-9+]]]
+  adds r0, r0, #1
+  adds r0, r0, #1
+  b f5
+.ltorg
+@ constant pool
+@ CHECK: .align 2
+@ CHECK: .Ltmp[[TMP1]]
+@ CHECK: .long 65538
+
+@ CHECK-LABEL: f5:
+f5:
+  adds r0, r0, #1
+  adds r0, r0, #1
+  ldr r0, =0x10003
+@ CHECK: ldr r0, .Ltmp[[TMP2:[0-9+]]]
+  adds r0, r0, #1
+  b f6
+.ltorg
+@ constant pool
+@ CHECK: .align 2
+@ CHECK: .Ltmp[[TMP2]]
+@ CHECK: .long 65539
+
+@ CHECK-LABEL: f6:
+f6:
+  adds r0, r0, #1
+  adds r0, r0, #1
+
+@ check that ltorg does not issue an error if there is no constant pool
+.section c,"ax",%progbits
+@ CHECK-LABEL: f7:
+f7:
+  adds r0, r0, #1
+  b f8
+  .ltorg
+f8:
+  adds r0, r0, #1
+
+@ check that ltorg works for labels
+.section d,"ax",%progbits
+@ CHECK-LABEL: f9:
+f9:
+  adds r0, r0, #1
+  adds r0, r0, #1
+  ldr r0, =bar
+@ CHECK: ldr r0, .Ltmp[[TMP3:[0-9+]]]
+  adds r0, r0, #1
+  adds r0, r0, #1
+  adds r0, r0, #1
+  b f10
+.ltorg
+@ constant pool
+@ CHECK: .align 2
+@ CHECK: .Ltmp[[TMP3]]
+@ CHECK: .long bar
+
+@ CHECK-LABEL: f10:
+f10:
+  adds r0, r0, #1
+  adds r0, r0, #1
+
+@ check that use of ltorg does not prevent dumping non-empty constant pools at end of section
+.section e,"ax",%progbits
+@ CHECK-LABEL: f11:
+f11:
+  adds r0, r0, #1
+  adds r0, r0, #1
+  ldr r0, =0x10004
+@ CHECK: ldr r0, .Ltmp[[TMP4:[0-9+]]]
+  b f12
+  .ltorg
+@ constant pool
+@ CHECK: .align 2
+@ CHECK: .Ltmp[[TMP4]]
+@ CHECK: .long 65540
+@ CHECK-LABEL: f12:
+f12:
+  adds r0, r0, #1
+  ldr r0, =0x10005
+@ CHECK: ldr r0, .Ltmp[[TMP5:[0-9+]]]
+
+.section f,"ax",%progbits
+@ CHECK-LABEL: f13
+f13:
+  adds r0, r0, #1
+  adds r0, r0, #1
+
+@ should not have a constant pool at end of section with empty constant pools
+@ CHECK-NOT: .section a,"ax",%progbits
+@ CHECK-NOT: .section b,"ax",%progbits
+@ CHECK-NOT: .section c,"ax",%progbits
+@ CHECK-NOT: .section d,"ax",%progbits
+
+@ should have a non-empty constant pool at end of this section
+@ CHECK: .section e,"ax",%progbits
+@ constant pool
+@ CHECK: .align 2
+@ CHECK: .Ltmp[[TMP5]]
+@ CHECK: .long 65541
+
+@ should not have a constant pool at end of section with empty constant pools
+@ CHECK-NOT: .section f,"ax",%progbits
diff --git a/test/MC/ARM/mul-v4.s b/test/MC/ARM/mul-v4.s
new file mode 100644
index 0000000..e214680
--- /dev/null
+++ b/test/MC/ARM/mul-v4.s
@@ -0,0 +1,39 @@
+@ PR17647: MUL/MLA/SMLAL/UMLAL should be avalaibe to IAS for ARMv4 and higher
+
+@ RUN: llvm-mc < %s -triple armv4-unknown-unknown -show-encoding | FileCheck %s --check-prefix=ARMV4
+
+@ ARMV4: mul	r0, r1, r2              @ encoding: [0x91,0x02,0x00,0xe0]
+@ ARMV4: muls	r0, r1, r2              @ encoding: [0x91,0x02,0x10,0xe0]
+@ ARMV4: mulne	r0, r1, r2              @ encoding: [0x91,0x02,0x00,0x10]
+@ ARMV4: mulseq	r0, r1, r2              @ encoding: [0x91,0x02,0x10,0x00]
+mul r0, r1, r2
+muls r0, r1, r2
+mulne r0, r1, r2
+mulseq r0, r1, r2
+
+@ ARMV4: mla	r0, r1, r2, r3          @ encoding: [0x91,0x32,0x20,0xe0]
+@ ARMV4: mlas	r0, r1, r2, r3          @ encoding: [0x91,0x32,0x30,0xe0]
+@ ARMV4: mlane	r0, r1, r2, r3          @ encoding: [0x91,0x32,0x20,0x10]
+@ ARMV4: mlaseq	r0, r1, r2, r3          @ encoding: [0x91,0x32,0x30,0x00]
+mla r0, r1, r2, r3
+mlas r0, r1, r2, r3
+mlane r0, r1, r2, r3
+mlaseq r0, r1, r2, r3
+
+@ ARMV4: smlal	r2, r3, r0, r1          @ encoding: [0x90,0x21,0xe3,0xe0]
+@ ARMV4: smlals	r2, r3, r0, r1          @ encoding: [0x90,0x21,0xf3,0xe0]
+@ ARMV4: smlalne	r2, r3, r0, r1          @ encoding: [0x90,0x21,0xe3,0x10]
+@ ARMV4: smlalseq	r2, r3, r0, r1  @ encoding: [0x90,0x21,0xf3,0x00]
+smlal r2,r3,r0,r1
+smlals r2,r3,r0,r1
+smlalne r2,r3,r0,r1
+smlalseq r2,r3,r0,r1
+
+@ ARMV4: umlal	r2, r3, r0, r1          @ encoding: [0x90,0x21,0xa3,0xe0]
+@ ARMV4: umlals	r2, r3, r0, r1          @ encoding: [0x90,0x21,0xb3,0xe0]
+@ ARMV4: umlalne	r2, r3, r0, r1          @ encoding: [0x90,0x21,0xa3,0x10]
+@ ARMV4: umlalseq	r2, r3, r0, r1  @ encoding: [0x90,0x21,0xb3,0x00]
+umlal r2,r3,r0,r1
+umlals r2,r3,r0,r1
+umlalne r2,r3,r0,r1
+umlalseq r2,r3,r0,r1
diff --git a/test/MC/ARM/neon-vld-encoding.s b/test/MC/ARM/neon-vld-encoding.s
index 648e917..3fcbe3e 100644
--- a/test/MC/ARM/neon-vld-encoding.s
+++ b/test/MC/ARM/neon-vld-encoding.s
@@ -403,7 +403,7 @@
 @ CHECK: vld4.8	{d16[1], d17[1], d18[1], d19[1]}, [r1:32]! @ encoding: [0x3d,0x03,0xe1,0xf4]
 @ CHECK: vld4.16 {d16[1], d17[1], d18[1], d19[1]}, [r2:64]! @ encoding: [0x5d,0x07,0xe2,0xf4]
 @ CHECK: vld4.32 {d16[1], d17[1], d18[1], d19[1]}, [r3:128]! @ encoding: [0xad,0x0b,0xe3,0xf4]
-@ CHECK: vld4.16 {d17[1], d18[1], d19[1], d20[1]}, [r7]! @ encoding: [0x6d,0x17,0xe7,0xf4]
+@ CHECK: vld4.16 {d17[1], d19[1], d21[1], d23[1]}, [r7]! @ encoding: [0x6d,0x17,0xe7,0xf4]
 @ CHECK: vld4.32 {d16[1], d18[1], d20[1], d22[1]}, [r8]! @ encoding: [0xcd,0x0b,0xe8,0xf4]
 @ CHECK: vld4.8	{d16[1], d17[1], d18[1], d19[1]}, [r1:32], r8 @ encoding: [0x38,0x03,0xe1,0xf4]
 @ CHECK: vld4.16 {d16[1], d17[1], d18[1], d19[1]}, [r2], r7 @ encoding: [0x47,0x07,0xe2,0xf4]
diff --git a/test/MC/ARM/not-armv4.s b/test/MC/ARM/not-armv4.s
new file mode 100644
index 0000000..a1ba611
--- /dev/null
+++ b/test/MC/ARM/not-armv4.s
@@ -0,0 +1,8 @@
+@ RUN: not llvm-mc < %s -triple armv4-unknown-unknown -show-encoding 2>&1 | FileCheck %s
+
+@ PR18524
+@ CHECK: error: instruction requires: armv5t
+clz r4,r9
+
+@ CHECK: error: instruction requires: armv6t2
+rbit r4,r9
diff --git a/test/MC/ARM/pool.s b/test/MC/ARM/pool.s
new file mode 100644
index 0000000..926b4f1
--- /dev/null
+++ b/test/MC/ARM/pool.s
@@ -0,0 +1,18 @@
+@ RUN: llvm-mc -triple thumbv7-linux-gnueabi -o - %s | FileCheck %s
+
+	.syntax unified
+
+	.align 2
+	.global pool
+	.type pool,%function
+pool:
+	ldr r0, =0xba5eba11
+	bx lr
+	.pool
+
+@ CHECK-LABEL: pool
+@ CHECK: ldr r0, .Ltmp0
+@ CHECK: .align	2
+@ CHECK-LABEL: .Ltmp0:
+@ CHECK: .long	3126770193
+
diff --git a/test/MC/ARM/simple-fp-encoding.s b/test/MC/ARM/simple-fp-encoding.s
index d840e9c..539dd2c 100644
--- a/test/MC/ARM/simple-fp-encoding.s
+++ b/test/MC/ARM/simple-fp-encoding.s
@@ -395,3 +395,46 @@
 
 @ CHECK: vmov.i32	d4, #0x0        @ encoding: [0x10,0x40,0x80,0xf2]
 @ CHECK: vmov.i32	d4, #0x42000000 @ encoding: [0x12,0x46,0x84,0xf2]
+
+@ Test encoding of floating point constants for vmov functions
+@ vfp3
+         vmov.f32 s5, #1.0
+         vmov.f32 s5, #0.125
+         vmov.f32 s5, #-1.875
+         vmov.f32 s5, #-0.59375
+
+         vmov.f64 d6, #1.0
+         vmov.f64 d6, #0.125
+         vmov.f64 d6, #-1.875
+         vmov.f64 d6, #-0.59375
+
+@ neon
+         vmov.f32 d7, #1.0
+         vmov.f32 d7, #0.125
+         vmov.f32 d7, #-1.875
+         vmov.f32 d7, #-0.59375
+
+         vmov.f32 q8, #1.0
+         vmov.f32 q8, #0.125
+         vmov.f32 q8, #-1.875
+         vmov.f32 q8, #-0.59375
+
+@ CHECK: vmov.f32        s5, #1.000000e+00 @ encoding: [0x00,0x2a,0xf7,0xee]
+@ CHECK: vmov.f32        s5, #1.250000e-01 @ encoding: [0x00,0x2a,0xf4,0xee]
+@ CHECK: vmov.f32        s5, #-1.875000e+00 @ encoding: [0x0e,0x2a,0xff,0xee]
+@ CHECK: vmov.f32        s5, #-5.937500e-01 @ encoding: [0x03,0x2a,0xfe,0xee]
+
+@ CHECK: vmov.f64        d6, #1.000000e+00 @ encoding: [0x00,0x6b,0xb7,0xee]
+@ CHECK: vmov.f64        d6, #1.250000e-01 @ encoding: [0x00,0x6b,0xb4,0xee]
+@ CHECK: vmov.f64        d6, #-1.875000e+00 @ encoding: [0x0e,0x6b,0xbf,0xee]
+@ CHECK: vmov.f64        d6, #-5.937500e-01 @ encoding: [0x03,0x6b,0xbe,0xee]
+
+@ CHECK: vmov.f32        d7, #1.000000e+00 @ encoding: [0x10,0x7f,0x87,0xf2]
+@ CHECK: vmov.f32        d7, #1.250000e-01 @ encoding: [0x10,0x7f,0x84,0xf2]
+@ CHECK: vmov.f32        d7, #-1.875000e+00 @ encoding: [0x1e,0x7f,0x87,0xf3]
+@ CHECK: vmov.f32        d7, #-5.937500e-01 @ encoding: [0x13,0x7f,0x86,0xf3]
+
+@ CHECK: vmov.f32        q8, #1.000000e+00 @ encoding: [0x50,0x0f,0xc7,0xf2]
+@ CHECK: vmov.f32        q8, #1.250000e-01 @ encoding: [0x50,0x0f,0xc4,0xf2]
+@ CHECK: vmov.f32        q8, #-1.875000e+00 @ encoding: [0x5e,0x0f,0xc7,0xf3]
+@ CHECK: vmov.f32        q8, #-5.937500e-01 @ encoding: [0x53,0x0f,0xc6,0xf3]
diff --git a/test/MC/ARM/symbol-variants-errors.s b/test/MC/ARM/symbol-variants-errors.s
new file mode 100644
index 0000000..03401cd
--- /dev/null
+++ b/test/MC/ARM/symbol-variants-errors.s
@@ -0,0 +1,23 @@
+@ RUN: not llvm-mc < %s -triple armv7-none-linux-gnueabi 2>&1 | FileCheck %s
+
+@ check for invalid variant
+f1:
+  bl bar(blargh)
+@CHECK: error: invalid variant 'blargh'
+@CHECK:  bl bar(blargh)
+@CHECK:                ^
+
+@ check for missing closed paren
+f2:
+  .word bar(got
+@CHECK: error: unexpected token in variant, expected ')'
+@CHECK:  .word bar(got
+@CHECK:               ^
+
+@ check for invalid symbol before variant end
+f3:
+  .word bar(got+2)
+
+@CHECK: error: unexpected token in variant, expected ')'
+@CHECK:  .word bar(got+2)
+@CHECK:               ^
diff --git a/test/MC/ARM/symbol-variants.s b/test/MC/ARM/symbol-variants.s
new file mode 100644
index 0000000..e1036a3
--- /dev/null
+++ b/test/MC/ARM/symbol-variants.s
@@ -0,0 +1,85 @@
+@ RUN: llvm-mc < %s -triple armv7-none-linux-gnueabi -filetype=obj  | llvm-objdump -triple armv7-none-linux-gnueabi -r - | FileCheck %s --check-prefix=CHECK --check-prefix=ARM
+@ RUN: llvm-mc < %s -triple thumbv7-none-linux-gnueabi -filetype=obj  | llvm-objdump -triple thumbv7-none-linux-gnueabi -r - | FileCheck %s --check-prefix=CHECK --check-prefix=THUMB
+
+@ CHECK-LABEL: RELOCATION RECORDS FOR [.rel.text]
+
+@ empty
+.word f00
+.word f01
+@CHECK: 0 R_ARM_ABS32 f00
+@CHECK: 4 R_ARM_ABS32 f01
+
+@ none
+.word f02(NONE)
+.word f03(none)
+@CHECK: 8 R_ARM_NONE f02
+@CHECK: c R_ARM_NONE f03
+
+@ plt
+bl f04(PLT)
+bl f05(plt)
+@ARM: 10 R_ARM_PLT32 f04
+@ARM: 14 R_ARM_PLT32 f05
+@THUMB: 10 R_ARM_THM_CALL f04
+@THUMB: 14 R_ARM_THM_CALL f05
+
+@ got
+.word f06(GOT)
+.word f07(got)
+@CHECK: 18 R_ARM_GOT_BREL f06
+@CHECK: 1c R_ARM_GOT_BREL f07
+
+@ gotoff
+.word f08(GOTOFF)
+.word f09(gotoff)
+@CHECK: 20 R_ARM_GOTOFF32 f08
+@CHECK: 24 R_ARM_GOTOFF32 f09
+
+@ tpoff
+.word f10(TPOFF)
+.word f11(tpoff)
+@CHECK: 28 R_ARM_TLS_LE32 f10
+@CHECK: 2c R_ARM_TLS_LE32 f11
+
+@ tlsgd
+.word f12(TLSGD)
+.word f13(tlsgd)
+@CHECK: 30 R_ARM_TLS_GD32 f12
+@CHECK: 34 R_ARM_TLS_GD32 f13
+
+@ target1
+.word f14(TARGET1)
+.word f15(target1)
+@CHECK: 38 R_ARM_TARGET1 f14
+@CHECK: 3c R_ARM_TARGET1 f15
+
+@ target2
+.word f16(TARGET2)
+.word f17(target2)
+@CHECK: 40 R_ARM_TARGET2 f16
+@CHECK: 44 R_ARM_TARGET2 f17
+
+@ prel31
+.word f18(PREL31)
+.word f19(prel31)
+@CHECK: 48 R_ARM_PREL31 f18
+@CHECK: 4c R_ARM_PREL31 f19
+
+@ tlsldo
+.word f20(TLSLDO)
+.word f21(tlsldo)
+@CHECK: 50 R_ARM_TLS_LDO32 f20
+@CHECK: 54 R_ARM_TLS_LDO32 f21
+
+@ tlscall
+.word f22(TLSCALL)
+.word f23(tlscall)
+@ CHECK: 58 R_ARM_TLS_CALL f22
+@ CHECK: 5c R_ARM_TLS_CALL f23
+
+@ tlsdesc
+.word f24(TLSDESC)
+.word f25(tlsdesc)
+@ CHECK: 60 R_ARM_TLS_GOTDESC f24
+@ CHECK: 64 R_ARM_TLS_GOTDESC f25
+
diff --git a/test/MC/ARM/target-expressions.s b/test/MC/ARM/target-expressions.s
new file mode 100644
index 0000000..c87cd22
--- /dev/null
+++ b/test/MC/ARM/target-expressions.s
@@ -0,0 +1,80 @@
+@ RUN: llvm-mc -triple armv7-eabi -filetype asm -o - %s | FileCheck %s
+@ RUN: llvm-mc -triple armv7-eabi -filetype obj -o - %s | llvm-readobj -r \
+@ RUN:   | FileCheck -check-prefix CHECK-RELOCATIONS %s
+
+	.syntax unified
+
+	.type function,%function
+function:
+	bx lr
+
+	.global external
+	.type external,%function
+
+.set deadbeat, 0xdeadbea7
+
+	.type test,%function
+test:
+	movw r0, :lower16:function
+	movt r0, :upper16:function
+
+	movw r1, #:lower16:function
+	movt r1, #:upper16:function
+
+	movw r2, :lower16:deadbeat
+	movt r2, :upper16:deadbeat
+
+	movw r3, #:lower16:deadbeat
+	movt r3, #:upper16:deadbeat
+
+	movw r4, :lower16:0xD1510D6E
+	movt r4, :upper16:0xD1510D6E
+
+	movw r5, #:lower16:0xD1510D6E
+	movt r5, #:upper16:0xD1510D6E
+
+	movw r0, :lower16:external
+	movt r0, :upper16:external
+
+	movw r1, #:lower16:external
+	movt r1, #:upper16:external
+
+	movw r2, #:lower16:(16 + 16)
+	movt r2, #:upper16:(16 + 16)
+
+	movw r3, :lower16:(16 + 16)
+	movt r3, :upper16:(16 + 16)
+
+@ CHECK-LABEL: test:
+@ CHECK: 	movw r0, :lower16:function
+@ CHECK: 	movt r0, :upper16:function
+@ CHECK: 	movw r1, :lower16:function
+@ CHECK: 	movt r1, :upper16:function
+@ CHECK: 	movw r2, :lower16:(3735928487)
+@ CHECK: 	movt r2, :upper16:(3735928487)
+@ CHECK: 	movw r3, :lower16:(3735928487)
+@ CHECK: 	movt r3, :upper16:(3735928487)
+@ CHECK: 	movw r4, :lower16:(3511749998)
+@ CHECK: 	movt r4, :upper16:(3511749998)
+@ CHECK: 	movw r5, :lower16:(3511749998)
+@ CHECK: 	movt r5, :upper16:(3511749998)
+@ CHECK: 	movw r0, :lower16:external
+@ CHECK: 	movt r0, :upper16:external
+@ CHECK: 	movw r1, :lower16:external
+@ CHECK: 	movt r1, :upper16:external
+@ CHECK: 	movw r2, :lower16:(32)
+@ CHECK: 	movt r2, :upper16:(32)
+@ CHECK: 	movw r3, :lower16:(32)
+@ CHECK: 	movt r3, :upper16:(32)
+
+@ CHECK-RELOCATIONS: Relocations [
+@ CHECK-RELOCATIONS:   0x4 R_ARM_MOVW_ABS_NC function 0x0
+@ CHECK-RELOCATIONS:   0x8 R_ARM_MOVT_ABS function 0x0
+@ CHECK-RELOCATIONS:   0xC R_ARM_MOVW_ABS_NC function 0x0
+@ CHECK-RELOCATIONS:   0x10 R_ARM_MOVT_ABS function 0x0
+@ CHECK-RELOCATIONS:   0x34 R_ARM_MOVW_ABS_NC external 0x0
+@ CHECK-RELOCATIONS:   0x38 R_ARM_MOVT_ABS external 0x0
+@ CHECK-RELOCATIONS:   0x3C R_ARM_MOVW_ABS_NC external 0x0
+@ CHECK-RELOCATIONS:   0x40 R_ARM_MOVT_ABS external 0x0
+@ CHECK-RELOCATIONS: ]
+
diff --git a/test/MC/ARM/thumb-far-jump.s b/test/MC/ARM/thumb-far-jump.s
new file mode 100644
index 0000000..2fd2c56
--- /dev/null
+++ b/test/MC/ARM/thumb-far-jump.s
@@ -0,0 +1,26 @@
+@ RUN: llvm-mc < %s -triple thumbv5-linux-gnueabi -filetype=obj -o - \
+@ RUN:   | llvm-readobj -r | FileCheck %s
+	.syntax	unified
+
+	.text
+	.align	2
+	.globl	main
+	.type	main,%function
+	.thumb_func
+main:
+	bl	end
+	.space 8192
+end:
+	bl	main2
+	bx	lr
+
+	.text
+	.align	2
+	.globl	main2
+	.type	main2,%function
+	.thumb_func
+main2:
+	bx	lr
+
+@ CHECK-NOT: 0x0 R_ARM_THM_CALL end 0x0
+@ CHECK: 0x2004 R_ARM_THM_CALL main2 0x0
diff --git a/test/MC/ARM/thumb-st_other.s b/test/MC/ARM/thumb-st_other.s
new file mode 100644
index 0000000..8750c2b
--- /dev/null
+++ b/test/MC/ARM/thumb-st_other.s
@@ -0,0 +1,19 @@
+@ Check the value of st_other for thumb function.
+
+@ ARM does not define any st_other flags for thumb function.  The value
+@ for st_other should always be 0.
+
+@ RUN: llvm-mc < %s -triple thumbv5-linux-gnueabi -filetype=obj -o - \
+@ RUN:   | llvm-readobj -t | FileCheck %s
+
+	.syntax	unified
+	.text
+	.align	2
+	.thumb_func
+	.global	main
+	.type	main,%function
+main:
+	bx	lr
+
+@ CHECK: Name: main
+@ CHECK: Other: 0
diff --git a/test/MC/ARM/thumb-types.s b/test/MC/ARM/thumb-types.s
new file mode 100644
index 0000000..2fd7152
--- /dev/null
+++ b/test/MC/ARM/thumb-types.s
@@ -0,0 +1,82 @@
+@ RUN: llvm-mc -triple armv7-elf -filetype obj -o - %s | llvm-readobj -t \
+@ RUN:    | FileCheck %s
+
+	.syntax unified
+
+	.thumb
+
+	.type implicit_function,%function
+implicit_function:
+	nop
+
+	.type implicit_data,%object
+implicit_data:
+	.long 0
+
+	.arm
+	.type arm_function,%function
+arm_function:
+	nop
+
+	.thumb
+
+	.text
+
+untyped_text_label:
+	nop
+
+	.type explicit_function,%function
+explicit_function:
+	nop
+
+	.data
+
+untyped_data_label:
+	nop
+
+	.type explicit_data,%object
+explicit_data:
+	.long 0
+
+@ CHECK: Symbol {
+@ CHECK:   Name: arm_function
+@ CHECK:   Value: 0x6
+@ CHECK:   Type: Function
+@ CHECK: }
+
+@ CHECK: Symbol {
+@ CHECK:   Name: explicit_data
+@ CHECK:   Value: 0x2
+@ CHECK:   Type: Object
+@ CHECK: }
+
+@ CHECK: Symbol {
+@ CHECK:   Name: explicit_function
+@ CHECK:   Value: 0xD
+@ CHECK:   Type: Function
+@ CHECK: }
+
+@ CHECK: Symbol {
+@ CHECK:   Name: implicit_data
+@ CHECK:   Value: 0x2
+@ CHECK:   Type: Object
+@ CHECK: }
+
+@ CHECK: Symbol {
+@ CHECK:   Name: implicit_function
+@ CHECK:   Value: 0x1
+@ CHECK:   Type: Function
+@ CHECK: }
+
+@ CHECK: Symbol {
+@ CHECK:   Name: untyped_data_label
+@ CHECK:   Value: 0x0
+@ CHECK:   Type: None
+@ CHECK: }
+
+@ CHECK: Symbol {
+@ CHECK:   Name: untyped_text_label
+@ CHECK:   Value: 0xA
+@ CHECK:   Type: None
+@ CHECK: }
+
diff --git a/test/MC/ARM/thumb2-cbn-to-next-inst.s b/test/MC/ARM/thumb2-cbn-to-next-inst.s
new file mode 100644
index 0000000..a7ad11b
--- /dev/null
+++ b/test/MC/ARM/thumb2-cbn-to-next-inst.s
@@ -0,0 +1,33 @@
+@ RUN: llvm-mc -triple thumbv7-apple-darwin -filetype=obj -o %t.o %s
+@ RUN: llvm-objdump -triple thumbv7-apple-darwin -d %t.o | FileCheck %s
+
+.thumb
+start:
+.thumb_func start
+	add	 r1, r2, r3
+	cbnz	 r2, L1 @ this can't be encoded, must turn into a nop
+L1:
+	add	r4, r5, r6
+	cbnz	r2, L2
+	sub	r7, r8, r9
+L2:
+	add	r7, r8, r9
+	cbz	r2, L3 @ this can't be encoded, must turn into a nop
+L3:
+	add	r10, r11, r12
+	cbz	r2, L4
+	sub	r7, r8, r9
+L4:
+	add	r3, r4, r5
+
+@ CHECK: 0:	02 eb 03 01	add.w	r1, r2, r3
+@ CHECK: 4:	00 bf		nop
+@ CHECK: 6:	05 eb 06 04	add.w	r4, r5, r6
+@ CHECK: a:	0a b9		cbnz	r2, #2
+@ CHECK: c:	a8 eb 09 07	sub.w	r7, r8, r9
+@ CHECK: 10:	08 eb 09 07	add.w	r7, r8, r9
+@ CHECK: 14:	00 bf		nop
+@ CHECK: 16:	0b eb 0c 0a	add.w	r10, r11, r12
+@ CHECK: 1a:	0a b1		cbz	r2, #2
+@ CHECK: 1c:	a8 eb 09 07	sub.w	r7, r8, r9
+@ CHECK: 20:	04 eb 05 03	add.w	r3, r4, r5
diff --git a/test/MC/ARM/thumb2-ldrd.s b/test/MC/ARM/thumb2-ldrd.s
index 4463c21..5166ff0 100644
--- a/test/MC/ARM/thumb2-ldrd.s
+++ b/test/MC/ARM/thumb2-ldrd.s
@@ -1,9 +1,16 @@
-// RUN: not llvm-mc -arch thumb -mattr=+thumb2 \
-// RUN: < %s >/dev/null 2> %t
-// RUN: grep "error: destination operands can't be identical" %t | count 4
-// rdar://14479780
+@ RUN: not llvm-mc -triple thumb-eabi -mattr=+thumb2 %s -o /dev/null 2>&1 \
+@ RUN:	  | FileCheck %s
+
+@ rdar://14479780
 
 ldrd r0, r0, [pc, #0]
 ldrd r0, r0, [r1, #4]
 ldrd r0, r0, [r1], #4
 ldrd r0, r0, [r1, #4]!
+
+@ CHECK: error: destination operands can't be identical
+@ CHECK: error: destination operands can't be identical
+@ CHECK: error: destination operands can't be identical
+@ CHECK: error: destination operands can't be identical
+@ CHECK-NOT: error: destination operands can't be identical
+
diff --git a/test/MC/ARM/thumb2-mclass.s b/test/MC/ARM/thumb2-mclass.s
index b7af723..d9c96df 100644
--- a/test/MC/ARM/thumb2-mclass.s
+++ b/test/MC/ARM/thumb2-mclass.s
@@ -1,9 +1,10 @@
 @ RUN: llvm-mc -triple=thumbv7m-apple-darwin -show-encoding < %s | FileCheck %s
+@ RUN: llvm-mc -triple=thumbv6m -show-encoding < %s | FileCheck %s
   .syntax unified
   .globl _func
 
 @ Check that the assembler can handle the documented syntax from the ARM ARM.
-@ These tests test instruction encodings specific to v7m & v7m (FeatureMClass).
+@ These tests test instruction encodings specific to v6m & v7m (FeatureMClass).
 
 @------------------------------------------------------------------------------
 @ MRS
@@ -19,9 +20,6 @@
         mrs  r0, msp
         mrs  r0, psp
         mrs  r0, primask
-        mrs  r0, basepri
-        mrs  r0, basepri_max
-        mrs  r0, faultmask
         mrs  r0, control
 
 @ CHECK: mrs	r0, apsr                @ encoding: [0xef,0xf3,0x00,0x80]
@@ -34,9 +32,6 @@
 @ CHECK: mrs	r0, msp                 @ encoding: [0xef,0xf3,0x08,0x80]
 @ CHECK: mrs	r0, psp                 @ encoding: [0xef,0xf3,0x09,0x80]
 @ CHECK: mrs	r0, primask             @ encoding: [0xef,0xf3,0x10,0x80]
-@ CHECK: mrs	r0, basepri             @ encoding: [0xef,0xf3,0x11,0x80]
-@ CHECK: mrs	r0, basepri_max         @ encoding: [0xef,0xf3,0x12,0x80]
-@ CHECK: mrs	r0, faultmask           @ encoding: [0xef,0xf3,0x13,0x80]
 @ CHECK: mrs	r0, control             @ encoding: [0xef,0xf3,0x14,0x80]
 
 @------------------------------------------------------------------------------
@@ -65,9 +60,6 @@
         msr  msp, r0
         msr  psp, r0
         msr  primask, r0
-        msr  basepri, r0
-        msr  basepri_max, r0
-        msr  faultmask, r0
         msr  control, r0
 
 @ CHECK: msr	apsr, r0                @ encoding: [0x80,0xf3,0x00,0x88]
@@ -92,7 +84,4 @@
 @ CHECK: msr	msp, r0                 @ encoding: [0x80,0xf3,0x08,0x88]
 @ CHECK: msr	psp, r0                 @ encoding: [0x80,0xf3,0x09,0x88]
 @ CHECK: msr	primask, r0             @ encoding: [0x80,0xf3,0x10,0x88]
-@ CHECK: msr	basepri, r0             @ encoding: [0x80,0xf3,0x11,0x88]
-@ CHECK: msr	basepri_max, r0         @ encoding: [0x80,0xf3,0x12,0x88]
-@ CHECK: msr	faultmask, r0           @ encoding: [0x80,0xf3,0x13,0x88]
 @ CHECK: msr	control, r0             @ encoding: [0x80,0xf3,0x14,0x88]
diff --git a/test/MC/ARM/thumb_set-diagnostics.s b/test/MC/ARM/thumb_set-diagnostics.s
new file mode 100644
index 0000000..5f1844d
--- /dev/null
+++ b/test/MC/ARM/thumb_set-diagnostics.s
@@ -0,0 +1,43 @@
+@ RUN: not llvm-mc -triple armv7-eabi -o /dev/null 2>&1 %s | FileCheck %s
+
+	.syntax unified
+
+	.thumb
+
+	.thumb_set
+
+@ CHECK: error: expected identifier after '.thumb_set'
+@ CHECK: 	.thumb_set
+@ CHECL:                  ^
+
+	.thumb_set ., 0x0b5e55ed
+
+@ CHECK: error: expected identifier after '.thumb_set'
+@ CHECK: 	.thumb_set ., 0x0b5e55ed
+@ CHECK:                   ^
+
+	.thumb_set labelled, 0x1abe11ed
+	.thumb_set invalid, :lower16:labelled
+
+@ CHECK: error: unknown token in expression
+@ CHECK: 	.thumb_set invalid, :lower16:labelled
+@ CHECK:                            ^
+
+	.thumb_set missing_comma
+
+@ CHECK: error: expected comma after name 'missing_comma'
+@ CHECK: 	.thumb_set missing_comma
+@ CHECK:                                ^
+
+	.thumb_set missing_expression,
+
+@ CHECK: error: missing expression
+@ CHECK: 	.thumb_set missing_expression,
+@ CHECK:                                      ^
+
+	.thumb_set trailer_trash, 0x11fe1e55,
+
+@ CHECK: error: unexpected token
+@ CHECK: 	.thumb_set trailer_trash, 0x11fe1e55,
+@ CHECK:                                            ^
+
diff --git a/test/MC/ARM/thumb_set.s b/test/MC/ARM/thumb_set.s
new file mode 100644
index 0000000..d0bc985
--- /dev/null
+++ b/test/MC/ARM/thumb_set.s
@@ -0,0 +1,139 @@
+@ RUN: llvm-mc -triple armv7-eabi -filetype obj -o - %s | llvm-readobj -t \
+@ RUN:   | FileCheck %s
+
+	.syntax unified
+
+	.arm
+
+	.type arm_func,%function
+arm_func:
+	nop
+
+	.thumb_set alias_arm_func, arm_func
+
+	.thumb
+
+	.type thumb_func,%function
+	.thumb_func
+thumb_func:
+	nop
+
+	.thumb_set alias_thumb_func, thumb_func
+
+	.thumb_set seedless, 0x5eed1e55
+	.thumb_set eggsalad, seedless + 0x87788358
+	.thumb_set faceless, ~eggsalad + 0xe133c002
+
+	.thumb_set alias_undefined_data, badblood
+
+	.data
+
+	.type badblood,%object
+badblood:
+	.long 0xbadb100d
+
+	.type bedazzle,%object
+bedazzle:
+	.long 0xbeda221e
+
+	.text
+	.thumb
+
+	.thumb_set alias_defined_data, bedazzle
+
+	.type alpha,%function
+alpha:
+	nop
+
+        .type beta,%function
+beta:
+	bkpt
+
+	.thumb_set beta, alpha
+
+	.thumb_set alias_undefined, undefined
+
+@ CHECK: Symbol {
+@ CHECK:   Name: alias_arm_func
+@ CHECK:   Value: 0x1
+@ CHECK:   Type: Function
+@ CHECK: }
+
+@ CHECK: Symbol {
+@ CHECK:   Name: alias_defined_data
+@ CHECK:   Value: 0x5
+@ CHECK:   Type: Function
+@ CHECK: }
+
+@ CHECK: Symbol {
+@ CHECK:   Name: alias_thumb_func
+@ CHECK:   Value: 0x5
+@ CHECK:   Type: Function
+@ CHECK: }
+
+@ CHECK: Symbol {
+@ CHECK:   Name: alias_undefined_data
+@ CHECK:   Value: 0x0
+@ CHECK:   Type: Object
+@ CHECK: }
+
+@ CHECK: Symbol {
+@ CHECK:   Name: alpha
+@ CHECK:   Value: 0x7
+@ CHECK:   Type: Function
+@ CHECK: }
+
+@ CHECK: Symbol {
+@ CHECK:   Name: arm_func
+@ CHECK:   Value: 0x0
+@ CHECK:   Type: Function
+@ CHECK: }
+
+@ CHECK: Symbol {
+@ CHECK:   Name: bedazzle
+@ CHECK:   Value: 0x4
+@ CHECK:   Type: Object
+@ CHECK: }
+
+@ CHECK: Symbol {
+@ CHECK:   Name: beta
+@ CHECK:   Value: 0x7
+@ CHECK:   Type: Function
+@ CHECK: }
+
+@ CHECK: Symbol {
+@ CHECK:   Name: eggsalad
+@ CHECK:   Value: 0xE665A1AD
+@ CHECK:   Type: Function
+@ CHECK: }
+
+@ CHECK: Symbol {
+@ CHECK:   Name: faceless
+@ CHECK:   Value: 0xFACE1E55
+@ CHECK:   Type: Function
+@ CHECK: }
+
+@ CHECK: Symbol {
+@ CHECK:   Name: seedless
+@ CHECK:   Value: 0x5EED1E55
+@ CHECK:   Type: Function
+@ CHECK: }
+
+@ CHECK: Symbol {
+@ CHECK:   Name: thumb_func
+@ CHECK:   Value: 0x5
+@ CHECK:   Type: Function
+@ CHECK: }
+
+@ CHECK: Symbol {
+@ CHECK:   Name: badblood
+@ CHECK:   Value: 0x0
+@ CHECK:   Type: Object
+@ CHECK: }
+
+@ CHECK: Symbol {
+@ CHECK:   Name: undefined
+@ CHECK:   Value: 0x0
+@ CHECK:   Type: None
+@ CHECK: }
+
diff --git a/test/MC/ARM/thumbv7m.s b/test/MC/ARM/thumbv7m.s
new file mode 100644
index 0000000..33ed44c
--- /dev/null
+++ b/test/MC/ARM/thumbv7m.s
@@ -0,0 +1,45 @@
+@ RUN: llvm-mc -triple=thumbv7m-apple-darwin -show-encoding < %s | FileCheck %s
+@ RUN: not llvm-mc -triple=thumbv6 -show-encoding 2>&1 < %s | FileCheck %s --check-prefix=CHECK-V6M
+  .syntax unified
+  .globl _func
+
+@ Check that the assembler can handle the documented syntax from the ARM ARM.
+@ These tests test instruction encodings specific to ARMv7m.
+
+@------------------------------------------------------------------------------
+@ MRS
+@------------------------------------------------------------------------------
+
+        mrs  r0, basepri
+        mrs  r0, basepri_max
+        mrs  r0, faultmask
+
+@ CHECK: mrs	r0, basepri             @ encoding: [0xef,0xf3,0x11,0x80]
+@ CHECK: mrs	r0, basepri_max         @ encoding: [0xef,0xf3,0x12,0x80]
+@ CHECK: mrs	r0, faultmask           @ encoding: [0xef,0xf3,0x13,0x80]
+
+@------------------------------------------------------------------------------
+@ MSR
+@------------------------------------------------------------------------------
+
+        msr  basepri, r0
+        msr  basepri_max, r0
+        msr  faultmask, r0
+
+@ CHECK: msr	basepri, r0             @ encoding: [0x80,0xf3,0x11,0x88]
+@ CHECK: msr	basepri_max, r0         @ encoding: [0x80,0xf3,0x12,0x88]
+@ CHECK: msr	faultmask, r0           @ encoding: [0x80,0xf3,0x13,0x88]
+
+@ CHECK-V6M: error: invalid operand for instruction
+@ CHECK-V6M-NEXT: mrs r0, basepri
+@ CHECK-V6M: error: invalid operand for instruction
+@ CHECK-V6M-NEXT: mrs r0, basepri_max
+@ CHECK-V6M: error: invalid operand for instruction
+@ CHECK-V6M-NEXT: mrs r0, faultmask
+@ CHECK-V6M: error: invalid operand for instruction
+@ CHECK-V6M-NEXT: msr basepri, r0
+@ CHECK-V6M: error: invalid operand for instruction
+@ CHECK-V6M-NEXT: msr basepri_max, r0
+@ CHECK-V6M: error: invalid operand for instruction
+@ CHECK-V6M-NEXT: msr faultmask, r0
+
diff --git a/test/MC/ARM/unwind-stack-diagnostics.s b/test/MC/ARM/unwind-stack-diagnostics.s
new file mode 100644
index 0000000..28d5672
--- /dev/null
+++ b/test/MC/ARM/unwind-stack-diagnostics.s
@@ -0,0 +1,30 @@
+@ RUN: not llvm-mc -triple armv7-eabi -filetype asm -o /dev/null 2>&1 %s \
+@ RUN:   | FileCheck %s
+
+	.syntax unified
+	.thumb
+
+	.text
+
+	.global multiple_personality_disorder
+	.type multiple_personality_disorder,%function
+multiple_personality_disorder:
+	.fnstart
+	.personality __gcc_personality_v0
+	.personality __gxx_personality_v0
+	.personality __gxx_personality_sj0
+	.cantunwind
+
+@ CHECK: error: .cantunwind can't be used with .personality directive
+@ CHECK: .cantunwind
+@ CHECK: ^
+@ CHECK: note: .personality was specified here
+@ CHECK: .personality __gcc_personality_v0
+@ CHECK: ^
+@ CHECK: note: .personality was specified here
+@ CHECK: .personality __gxx_personality_v0
+@ CHECK: ^
+@ CHECK: note: .personality was specified here
+@ CHECK: .personality __gxx_personality_sj0
+@ CHECK: ^
+
diff --git a/test/MC/ARM/variant-diagnostics.s b/test/MC/ARM/variant-diagnostics.s
new file mode 100644
index 0000000..535ee26
--- /dev/null
+++ b/test/MC/ARM/variant-diagnostics.s
@@ -0,0 +1,13 @@
+@ RUN: not llvm-mc -triple armv7-linux-eabi -filetype asm -o /dev/null 2>&1 %s \
+@ RUN:   | FileCheck %s
+
+	.arch armv7
+
+	.type invalid_variant,%function
+invalid_variant:
+	bx target(invalid)
+
+@ CHECK: error: invalid variant 'invalid'
+@ CHECK: 	bx target(invalid)
+@ CHECK:                  ^
+
diff --git a/test/MC/ARM/vfp-aliases-diagnostics.s b/test/MC/ARM/vfp-aliases-diagnostics.s
new file mode 100644
index 0000000..d1ab18e
--- /dev/null
+++ b/test/MC/ARM/vfp-aliases-diagnostics.s
@@ -0,0 +1,114 @@
+@ RUN: not llvm-mc -triple armv7-eabi -filetype asm -o /dev/null %s 2>&1 \
+@ RUN:   | FileCheck %s
+
+	.syntax unified
+	.fpu vfp
+
+	.type aliases,%function
+aliases:
+	fstmfdd sp!, {s0}
+	fstmead sp!, {s0}
+	fstmdbd sp!, {s0}
+	fstmiad sp!, {s0}
+	fstmfds sp!, {d0}
+	fstmeas sp!, {d0}
+	fstmdbs sp!, {d0}
+	fstmias sp!, {d0}
+
+	fldmias sp!, {d0}
+	fldmdbs sp!, {d0}
+	fldmeas sp!, {d0}
+	fldmfds sp!, {d0}
+	fldmiad sp!, {s0}
+	fldmdbd sp!, {s0}
+	fldmead sp!, {s0}
+	fldmfdd sp!, {s0}
+
+	fstmeax sp!, {s0}
+	fldmfdx sp!, {s0}
+
+	fstmfdx sp!, {s0}
+	fldmeax sp!, {s0}
+
+@ CHECK-LABEL: aliases
+@ CHECK: error: VFP/Neon double precision register expected
+@ CHECK:	fstmfdd sp!, {s0}
+@ CHECK:                     ^
+@ CHECK: error: VFP/Neon double precision register expected
+@ CHECK:	fstmead sp!, {s0}
+@ CHECK:                     ^
+@ CHECK: error: VFP/Neon double precision register expected
+@ CHECK:	fstmdbd sp!, {s0}
+@ CHECK:                     ^
+@ CHECK: error: VFP/Neon double precision register expected
+@ CHECK:	fstmiad sp!, {s0}
+@ CHECK:                     ^
+@ CHECK: error: VFP/Neon single precision register expected
+@ CHECK:	fstmfds sp!, {d0}
+@ CHECK:                     ^
+@ CHECK: error: VFP/Neon single precision register expected
+@ CHECK:	fstmeas sp!, {d0}
+@ CHECK:                     ^
+@ CHECK: error: VFP/Neon single precision register expected
+@ CHECK:	fstmdbs sp!, {d0}
+@ CHECK:                     ^
+@ CHECK: error: VFP/Neon single precision register expected
+@ CHECK:	fstmias sp!, {d0}
+@ CHECK:                     ^
+
+@ CHECK: error: VFP/Neon single precision register expected
+@ CHECK:	fldmias sp!, {d0}
+@ CHECK:                     ^
+@ CHECK: error: VFP/Neon single precision register expected
+@ CHECK:	fldmdbs sp!, {d0}
+@ CHECK:                     ^
+@ CHECK: error: VFP/Neon single precision register expected
+@ CHECK:	fldmeas sp!, {d0}
+@ CHECK:                     ^
+@ CHECK: error: VFP/Neon single precision register expected
+@ CHECK:	fldmfds sp!, {d0}
+@ CHECK:                     ^
+@ CHECK: error: VFP/Neon double precision register expected
+@ CHECK:	fldmiad sp!, {s0}
+@ CHECK:                     ^
+@ CHECK: error: VFP/Neon double precision register expected
+@ CHECK:	fldmdbd sp!, {s0}
+@ CHECK:                     ^
+@ CHECK: error: VFP/Neon double precision register expected
+@ CHECK:	fldmead sp!, {s0}
+@ CHECK:                     ^
+@ CHECK: error: VFP/Neon double precision register expected
+@ CHECK:	fldmfdd sp!, {s0}
+@ CHECK:                     ^
+
+@ CHECK: error: VFP/Neon double precision register expected
+@ CHECK:	fstmeax sp!, {s0}
+@ CHECK:                     ^
+@ CHECK: error: VFP/Neon double precision register expected
+@ CHECK:	fldmfdx sp!, {s0}
+@ CHECK:                     ^
+
+@ CHECK: error: VFP/Neon double precision register expected
+@ CHECK:	fstmfdx sp!, {s0}
+@ CHECK:                     ^
+@ CHECK: error: VFP/Neon double precision register expected
+@ CHECK:	fldmeax sp!, {s0}
+@ CHECK:                     ^
+
+	fstmiaxcs r0, {s0}
+	fstmiaxhs r0, {s0}
+	fstmiaxls r0, {s0}
+	fstmiaxvs r0, {s0}
+@ CHECK: error: VFP/Neon double precision register expected
+@ CHECK: 	fstmiaxcs r0, {s0}
+@ CHECK:                      ^
+@ CHECK: error: VFP/Neon double precision register expected
+@ CHECK: 	fstmiaxhs r0, {s0}
+@ CHECK:                      ^
+@ CHECK: error: VFP/Neon double precision register expected
+@ CHECK: 	fstmiaxls r0, {s0}
+@ CHECK:                      ^
+@ CHECK: error: VFP/Neon double precision register expected
+@ CHECK: 	fstmiaxvs r0, {s0}
+@ CHECK:                      ^
+
diff --git a/test/MC/ARM/vfp-aliases.s b/test/MC/ARM/vfp-aliases.s
new file mode 100644
index 0000000..4074fea
--- /dev/null
+++ b/test/MC/ARM/vfp-aliases.s
@@ -0,0 +1,62 @@
+@ RUN: llvm-mc -triple armv7-eabi -filetype asm -o - %s | FileCheck %s
+
+	.syntax unified
+	.fpu vfp
+
+	.type aliases,%function
+aliases:
+	fstmfdd sp!, {d0}
+	fstmead sp!, {d0}
+	fstmdbd sp!, {d0}
+	fstmiad sp!, {d0}
+	fstmfds sp!, {s0}
+	fstmeas sp!, {s0}
+	fstmdbs sp!, {s0}
+	fstmias sp!, {s0}
+
+	fldmias sp!, {s0}
+	fldmdbs sp!, {s0}
+	fldmeas sp!, {s0}
+	fldmfds sp!, {s0}
+	fldmiad sp!, {d0}
+	fldmdbd sp!, {d0}
+	fldmead sp!, {d0}
+	fldmfdd sp!, {d0}
+
+	fstmeax sp!, {d0}
+	fldmfdx sp!, {d0}
+
+	fstmfdx sp!, {d0}
+	fldmeax sp!, {d0}
+
+@ CHECK-LABEL: aliases
+@ CHECK: 	vpush {d0}
+@ CHECK: 	vstmia sp!, {d0}
+@ CHECK: 	vpush {d0}
+@ CHECK: 	vstmia sp!, {d0}
+@ CHECK: 	vpush {s0}
+@ CHECK: 	vstmia sp!, {s0}
+@ CHECK: 	vpush {s0}
+@ CHECK: 	vstmia sp!, {s0}
+@ CHECK: 	vpop {s0}
+@ CHECK: 	vldmdb sp!, {s0}
+@ CHECK: 	vldmdb sp!, {s0}
+@ CHECK: 	vpop {s0}
+@ CHECK: 	vpop {d0}
+@ CHECK: 	vldmdb sp!, {d0}
+@ CHECK: 	vldmdb sp!, {d0}
+@ CHECK: 	vpop {d0}
+@ CHECK: 	fstmiax sp!, {d0}
+@ CHECK: 	fldmiax sp!, {d0}
+@ CHECK: 	fstmdbx sp!, {d0}
+@ CHECK: 	fldmdbx sp!, {d0}
+
+	fstmiaxcs r0, {d0}
+	fstmiaxhs r0, {d0}
+	fstmiaxls r0, {d0}
+	fstmiaxvs r0, {d0}
+@ CHECK: 	fstmiaxhs r0, {d0}
+@ CHECK: 	fstmiaxhs r0, {d0}
+@ CHECK: 	fstmiaxls r0, {d0}
+@ CHECK: 	fstmiaxvs r0, {d0}
+
diff --git a/test/MC/ARM/xscale-attributes.ll b/test/MC/ARM/xscale-attributes.ll
deleted file mode 100644
index 718fd8f..0000000
--- a/test/MC/ARM/xscale-attributes.ll
+++ /dev/null
@@ -1,39 +0,0 @@
-; RUN: llc %s -mtriple=thumbv5-linux-gnueabi -mcpu=xscale -o - | \
-; RUN: FileCheck -check-prefix=ASM %s
-
-; RUN: llc %s -mtriple=thumbv5-linux-gnueabi -filetype=obj \
-; RUN: -mcpu=xscale -o - | llvm-readobj -s -sd | \
-; RUN: FileCheck -check-prefix=OBJ %s
-
-; FIXME: The OBJ test should be a .s to .o test and the ASM test should
-; be moved to test/CodeGen/ARM.
-
-define void @foo() nounwind {
-entry:
-  ret void
-}
-
-; ASM:           .eabi_attribute 6, 5
-; ASM-NEXT:      .eabi_attribute 8, 1
-; ASM-NEXT:      .eabi_attribute 9, 1
-
-; OBJ:      Sections [
-; OBJ:        Section {
-; OBJ:          Index: 4
-; OBJ-NEXT:     Name: .ARM.attributes (12)
-; OBJ-NEXT:     Type: SHT_ARM_ATTRIBUTES
-; OBJ-NEXT:     Flags [ (0x0)
-; OBJ-NEXT:     ]
-; OBJ-NEXT:     Address: 0x0
-; OBJ-NEXT:     Offset: 0x38
-; OBJ-NEXT:     Size: 40
-; OBJ-NEXT:     Link: 0
-; OBJ-NEXT:     Info: 0
-; OBJ-NEXT:     AddressAlignment: 1
-; OBJ-NEXT:     EntrySize: 0
-; OBJ-NEXT:     SectionData (
-; OBJ-NEXT:       0000: 41270000 00616561 62690001 1D000000
-; OBJ-NEXT:       0010: 05585343 414C4500 06050801 09011401
-; OBJ-NEXT:       0020: 15011703 18011901
-; OBJ-NEXT:     )
-; OBJ-NEXT:   }
diff --git a/test/MC/ARM64/advsimd.s b/test/MC/ARM64/advsimd.s
new file mode 100644
index 0000000..fce0832
--- /dev/null
+++ b/test/MC/ARM64/advsimd.s
@@ -0,0 +1,1997 @@
+; RUN: llvm-mc -triple arm64-apple-darwin -output-asm-variant=1 -show-encoding < %s | FileCheck %s
+
+foo:
+
+  abs.8b  v0, v0
+  abs.16b v0, v0
+  abs.4h  v0, v0
+  abs.8h  v0, v0
+  abs.2s  v0, v0
+  abs.4s  v0, v0
+
+; CHECK: abs.8b  v0, v0              ; encoding: [0x00,0xb8,0x20,0x0e]
+; CHECK: abs.16b v0, v0              ; encoding: [0x00,0xb8,0x20,0x4e]
+; CHECK: abs.4h  v0, v0              ; encoding: [0x00,0xb8,0x60,0x0e]
+; CHECK: abs.8h  v0, v0              ; encoding: [0x00,0xb8,0x60,0x4e]
+; CHECK: abs.2s  v0, v0              ; encoding: [0x00,0xb8,0xa0,0x0e]
+; CHECK: abs.4s  v0, v0              ; encoding: [0x00,0xb8,0xa0,0x4e]
+
+  add.8b  v0, v0, v0
+  add.16b v0, v0, v0
+  add.4h  v0, v0, v0
+  add.8h  v0, v0, v0
+  add.2s  v0, v0, v0
+  add.4s  v0, v0, v0
+  add.2d  v0, v0, v0
+
+; CHECK: add.8b  v0, v0, v0          ; encoding: [0x00,0x84,0x20,0x0e]
+; CHECK: add.16b v0, v0, v0          ; encoding: [0x00,0x84,0x20,0x4e]
+; CHECK: add.4h  v0, v0, v0          ; encoding: [0x00,0x84,0x60,0x0e]
+; CHECK: add.8h  v0, v0, v0          ; encoding: [0x00,0x84,0x60,0x4e]
+; CHECK: add.2s  v0, v0, v0          ; encoding: [0x00,0x84,0xa0,0x0e]
+; CHECK: add.4s  v0, v0, v0          ; encoding: [0x00,0x84,0xa0,0x4e]
+; CHECK: add.2d  v0, v0, v0          ; encoding: [0x00,0x84,0xe0,0x4e]
+
+  add d1, d2, d3
+
+; CHECK: add d1, d2, d3              ; encoding: [0x41,0x84,0xe3,0x5e]
+
+  addhn.8b   v0, v0, v0
+  addhn2.16b v0, v0, v0
+  addhn.4h   v0, v0, v0
+  addhn2.8h  v0, v0, v0
+  addhn.2s   v0, v0, v0
+  addhn2.4s  v0, v0, v0
+
+; CHECK: addhn.8b   v0, v0, v0       ; encoding: [0x00,0x40,0x20,0x0e]
+; CHECK: addhn2.16b v0, v0, v0       ; encoding: [0x00,0x40,0x20,0x4e]
+; CHECK: addhn.4h   v0, v0, v0       ; encoding: [0x00,0x40,0x60,0x0e]
+; CHECK: addhn2.8h  v0, v0, v0       ; encoding: [0x00,0x40,0x60,0x4e]
+; CHECK: addhn.2s   v0, v0, v0       ; encoding: [0x00,0x40,0xa0,0x0e]
+; CHECK: addhn2.4s  v0, v0, v0       ; encoding: [0x00,0x40,0xa0,0x4e]
+
+  addp.8b  v0, v0, v0
+  addp.16b v0, v0, v0
+  addp.4h  v0, v0, v0
+  addp.8h  v0, v0, v0
+  addp.2s  v0, v0, v0
+  addp.4s  v0, v0, v0
+  addp.2d  v0, v0, v0
+
+; CHECK: addp.8b   v0, v0, v0        ; encoding: [0x00,0xbc,0x20,0x0e]
+; CHECK: addp.16b  v0, v0, v0        ; encoding: [0x00,0xbc,0x20,0x4e]
+; CHECK: addp.4h   v0, v0, v0        ; encoding: [0x00,0xbc,0x60,0x0e]
+; CHECK: addp.8h   v0, v0, v0        ; encoding: [0x00,0xbc,0x60,0x4e]
+; CHECK: addp.2s   v0, v0, v0        ; encoding: [0x00,0xbc,0xa0,0x0e]
+; CHECK: addp.4s   v0, v0, v0        ; encoding: [0x00,0xbc,0xa0,0x4e]
+; CHECK: addp.2d   v0, v0, v0        ; encoding: [0x00,0xbc,0xe0,0x4e]
+
+  addp.2d  d0, v0
+
+; CHECK: addp.2d d0, v0              ; encoding: [0x00,0xb8,0xf1,0x5e]
+
+  addv.8b  b0, v0
+  addv.16b b0, v0
+  addv.4h  h0, v0
+  addv.8h  h0, v0
+  addv.4s  s0, v0
+
+; CHECK: addv.8b  b0, v0             ; encoding: [0x00,0xb8,0x31,0x0e]
+; CHECK: addv.16b b0, v0             ; encoding: [0x00,0xb8,0x31,0x4e]
+; CHECK: addv.4h  h0, v0             ; encoding: [0x00,0xb8,0x71,0x0e]
+; CHECK: addv.8h  h0, v0             ; encoding: [0x00,0xb8,0x71,0x4e]
+; CHECK: addv.4s  s0, v0             ; encoding: [0x00,0xb8,0xb1,0x4e]
+
+
+; INS/DUP
+  dup.2d  v0, x3
+  dup.4s  v0, w3
+  dup.2s  v0, w3
+  dup.8h  v0, w3
+  dup.4h  v0, w3
+  dup.16b v0, w3
+  dup.8b  v0, w3
+
+  dup v1.2d, x3
+  dup v2.4s, w4
+  dup v3.2s, w5
+  dup v4.8h, w6
+  dup v5.4h, w7
+  dup v6.16b, w8
+  dup v7.8b, w9
+
+; CHECK: dup.2d  v0, x3              ; encoding: [0x60,0x0c,0x08,0x4e]
+; CHECK: dup.4s  v0, w3              ; encoding: [0x60,0x0c,0x04,0x4e]
+; CHECK: dup.2s  v0, w3              ; encoding: [0x60,0x0c,0x04,0x0e]
+; CHECK: dup.8h  v0, w3              ; encoding: [0x60,0x0c,0x02,0x4e]
+; CHECK: dup.4h  v0, w3              ; encoding: [0x60,0x0c,0x02,0x0e]
+; CHECK: dup.16b v0, w3              ; encoding: [0x60,0x0c,0x01,0x4e]
+; CHECK: dup.8b  v0, w3              ; encoding: [0x60,0x0c,0x01,0x0e]
+
+; CHECK: dup.2d	v1, x3               ; encoding: [0x61,0x0c,0x08,0x4e]
+; CHECK: dup.4s	v2, w4               ; encoding: [0x82,0x0c,0x04,0x4e]
+; CHECK: dup.2s	v3, w5               ; encoding: [0xa3,0x0c,0x04,0x0e]
+; CHECK: dup.8h	v4, w6               ; encoding: [0xc4,0x0c,0x02,0x4e]
+; CHECK: dup.4h	v5, w7               ; encoding: [0xe5,0x0c,0x02,0x0e]
+; CHECK: dup.16b v6, w8              ; encoding: [0x06,0x0d,0x01,0x4e]
+; CHECK: dup.8b	v7, w9               ; encoding: [0x27,0x0d,0x01,0x0e]
+
+  dup.2d  v0, v3[1]
+  dup.2s  v0, v3[1]
+  dup.4s  v0, v3[1]
+  dup.4h  v0, v3[1]
+  dup.8h  v0, v3[1]
+  dup.8b  v0, v3[1]
+  dup.16b v0, v3[1]
+
+  dup v7.2d, v9.d[1]
+  dup v6.2s, v8.s[1]
+  dup v5.4s, v7.s[2]
+  dup v4.4h, v6.h[3]
+  dup v3.8h, v5.h[4]
+  dup v2.8b, v4.b[5]
+  dup v1.16b, v3.b[6]
+
+; CHECK: dup.2d  v0, v3[1]           ; encoding: [0x60,0x04,0x18,0x4e]
+; CHECK: dup.2s  v0, v3[1]           ; encoding: [0x60,0x04,0x0c,0x0e]
+; CHECK: dup.4s  v0, v3[1]           ; encoding: [0x60,0x04,0x0c,0x4e]
+; CHECK: dup.4h  v0, v3[1]           ; encoding: [0x60,0x04,0x06,0x0e]
+; CHECK: dup.8h  v0, v3[1]           ; encoding: [0x60,0x04,0x06,0x4e]
+; CHECK: dup.8b  v0, v3[1]           ; encoding: [0x60,0x04,0x03,0x0e]
+; CHECK: dup.16b v0, v3[1]           ; encoding: [0x60,0x04,0x03,0x4e]
+
+; CHECK: dup.2d  v7, v9[1]            ; encoding: [0x27,0x05,0x18,0x4e]
+; CHECK: dup.2s  v6, v8[1]            ; encoding: [0x06,0x05,0x0c,0x0e]
+; CHECK: dup.4s  v5, v7[2]            ; encoding: [0xe5,0x04,0x14,0x4e]
+; CHECK: dup.4h  v4, v6[3]            ; encoding: [0xc4,0x04,0x0e,0x0e]
+; CHECK: dup.8h  v3, v5[4]            ; encoding: [0xa3,0x04,0x12,0x4e]
+; CHECK: dup.8b  v2, v4[5]            ; encoding: [0x82,0x04,0x0b,0x0e]
+; CHECK: dup.16b v1, v3[6]            ; encoding: [0x61,0x04,0x0d,0x4e]
+
+  dup b3, v4[1]
+  dup h3, v4[1]
+  dup s3, v4[1]
+  dup d3, v4[1]
+  dup b3, v4.b[1]
+  dup h3, v4.h[1]
+  dup s3, v4.s[1]
+  dup d3, v4.d[1]
+
+  mov b3, v4[1]
+  mov h3, v4[1]
+  mov s3, v4[1]
+  mov d3, v4[1]
+  mov b3, v4.b[1]
+  mov h3, v4.h[1]
+  mov s3, v4.s[1]
+  mov d3, v4.d[1]
+
+; CHECK: mov b3, v4[1]               ; encoding: [0x83,0x04,0x03,0x5e]
+; CHECK: mov h3, v4[1]               ; encoding: [0x83,0x04,0x06,0x5e]
+; CHECK: mov s3, v4[1]               ; encoding: [0x83,0x04,0x0c,0x5e]
+; CHECK: mov d3, v4[1]               ; encoding: [0x83,0x04,0x18,0x5e]
+; CHECK: mov b3, v4[1]               ; encoding: [0x83,0x04,0x03,0x5e]
+; CHECK: mov h3, v4[1]               ; encoding: [0x83,0x04,0x06,0x5e]
+; CHECK: mov s3, v4[1]               ; encoding: [0x83,0x04,0x0c,0x5e]
+; CHECK: mov d3, v4[1]               ; encoding: [0x83,0x04,0x18,0x5e]
+
+; CHECK: mov b3, v4[1]               ; encoding: [0x83,0x04,0x03,0x5e]
+; CHECK: mov h3, v4[1]               ; encoding: [0x83,0x04,0x06,0x5e]
+; CHECK: mov s3, v4[1]               ; encoding: [0x83,0x04,0x0c,0x5e]
+; CHECK: mov d3, v4[1]               ; encoding: [0x83,0x04,0x18,0x5e]
+; CHECK: mov b3, v4[1]               ; encoding: [0x83,0x04,0x03,0x5e]
+; CHECK: mov h3, v4[1]               ; encoding: [0x83,0x04,0x06,0x5e]
+; CHECK: mov s3, v4[1]               ; encoding: [0x83,0x04,0x0c,0x5e]
+; CHECK: mov d3, v4[1]               ; encoding: [0x83,0x04,0x18,0x5e]
+
+  smov.s x3, v2[2]
+  smov   x3, v2.s[2]
+  umov.s w3, v2[2]
+  umov   w3, v2.s[2]
+  umov.d x3, v2[1]
+  umov   x3, v2.d[1]
+
+; CHECK: smov.s  x3, v2[2]           ; encoding: [0x43,0x2c,0x14,0x4e]
+; CHECK: smov.s  x3, v2[2]           ; encoding: [0x43,0x2c,0x14,0x4e]
+; CHECK: umov.s  w3, v2[2]           ; encoding: [0x43,0x3c,0x14,0x0e]
+; CHECK: umov.s  w3, v2[2]           ; encoding: [0x43,0x3c,0x14,0x0e]
+; CHECK: umov.d  x3, v2[1]           ; encoding: [0x43,0x3c,0x18,0x4e]
+; CHECK: umov.d  x3, v2[1]           ; encoding: [0x43,0x3c,0x18,0x4e]
+
+  ; MOV aliases for UMOV instructions above
+
+  mov.s w2, v3[3]
+  mov   w5, v7.s[2]
+  mov.d x11, v13[1]
+  mov   x17, v19.d[0]
+
+; CHECK: umov.s  w2, v3[3]               ; encoding: [0x62,0x3c,0x1c,0x0e]
+; CHECK: umov.s  w5, v7[2]               ; encoding: [0xe5,0x3c,0x14,0x0e]
+; CHECK: umov.d  x11, v13[1]             ; encoding: [0xab,0x3d,0x18,0x4e]
+; CHECK: umov.d  x17, v19[0]             ; encoding: [0x71,0x3e,0x08,0x4e]
+
+  ins.d v2[1], x5
+  ins.s v2[1], w5
+  ins.h v2[1], w5
+  ins.b v2[1], w5
+
+  ins   v2.d[1], x5
+  ins   v2.s[1], w5
+  ins   v2.h[1], w5
+  ins   v2.b[1], w5
+
+; CHECK: ins.d v2[1], x5             ; encoding: [0xa2,0x1c,0x18,0x4e]
+; CHECK: ins.s v2[1], w5             ; encoding: [0xa2,0x1c,0x0c,0x4e]
+; CHECK: ins.h v2[1], w5             ; encoding: [0xa2,0x1c,0x06,0x4e]
+; CHECK: ins.b v2[1], w5             ; encoding: [0xa2,0x1c,0x03,0x4e]
+
+; CHECK: ins.d v2[1], x5             ; encoding: [0xa2,0x1c,0x18,0x4e]
+; CHECK: ins.s v2[1], w5             ; encoding: [0xa2,0x1c,0x0c,0x4e]
+; CHECK: ins.h v2[1], w5             ; encoding: [0xa2,0x1c,0x06,0x4e]
+; CHECK: ins.b v2[1], w5             ; encoding: [0xa2,0x1c,0x03,0x4e]
+
+  ins.d v2[1], v15[1]
+  ins.s v2[1], v15[1]
+  ins.h v2[1], v15[1]
+  ins.b v2[1], v15[1]
+
+  ins   v2.d[1], v15.d[0]
+  ins   v2.s[3], v15.s[2]
+  ins   v2.h[7], v15.h[3]
+  ins   v2.b[10], v15.b[5]
+
+; CHECK: ins.d v2[1], v15[1]         ; encoding: [0xe2,0x45,0x18,0x6e]
+; CHECK: ins.s v2[1], v15[1]         ; encoding: [0xe2,0x25,0x0c,0x6e]
+; CHECK: ins.h v2[1], v15[1]         ; encoding: [0xe2,0x15,0x06,0x6e]
+; CHECK: ins.b v2[1], v15[1]         ; encoding: [0xe2,0x0d,0x03,0x6e]
+
+; CHECK: ins.d v2[1], v15[0]         ; encoding: [0xe2,0x05,0x18,0x6e]
+; CHECK: ins.s v2[3], v15[2]         ; encoding: [0xe2,0x45,0x1c,0x6e]
+; CHECK: ins.h v2[7], v15[3]         ; encoding: [0xe2,0x35,0x1e,0x6e]
+; CHECK: ins.b v2[10], v15[5]        ; encoding: [0xe2,0x2d,0x15,0x6e]
+
+; MOV aliases for the above INS instructions.
+  mov.d v2[1], x5
+  mov.s v3[1], w6
+  mov.h v4[1], w7
+  mov.b v5[1], w8
+
+  mov   v9.d[1], x2
+  mov   v8.s[1], w3
+  mov   v7.h[1], w4
+  mov   v6.b[1], w5
+
+  mov.d v1[1], v10[1]
+  mov.s v2[1], v11[1]
+  mov.h v7[1], v12[1]
+  mov.b v8[1], v15[1]
+
+  mov   v2.d[1], v15.d[0]
+  mov   v7.s[3], v16.s[2]
+  mov   v8.h[7], v17.h[3]
+  mov   v9.b[10], v18.b[5]
+
+; CHECK: ins.d	v2[1], x5               ; encoding: [0xa2,0x1c,0x18,0x4e]
+; CHECK: ins.s	v3[1], w6               ; encoding: [0xc3,0x1c,0x0c,0x4e]
+; CHECK: ins.h	v4[1], w7               ; encoding: [0xe4,0x1c,0x06,0x4e]
+; CHECK: ins.b	v5[1], w8               ; encoding: [0x05,0x1d,0x03,0x4e]
+; CHECK: ins.d	v9[1], x2               ; encoding: [0x49,0x1c,0x18,0x4e]
+; CHECK: ins.s	v8[1], w3               ; encoding: [0x68,0x1c,0x0c,0x4e]
+; CHECK: ins.h	v7[1], w4               ; encoding: [0x87,0x1c,0x06,0x4e]
+; CHECK: ins.b	v6[1], w5               ; encoding: [0xa6,0x1c,0x03,0x4e]
+; CHECK: ins.d	v1[1], v10[1]           ; encoding: [0x41,0x45,0x18,0x6e]
+; CHECK: ins.s	v2[1], v11[1]           ; encoding: [0x62,0x25,0x0c,0x6e]
+; CHECK: ins.h	v7[1], v12[1]           ; encoding: [0x87,0x15,0x06,0x6e]
+; CHECK: ins.b	v8[1], v15[1]           ; encoding: [0xe8,0x0d,0x03,0x6e]
+; CHECK: ins.d	v2[1], v15[0]           ; encoding: [0xe2,0x05,0x18,0x6e]
+; CHECK: ins.s	v7[3], v16[2]           ; encoding: [0x07,0x46,0x1c,0x6e]
+; CHECK: ins.h	v8[7], v17[3]           ; encoding: [0x28,0x36,0x1e,0x6e]
+; CHECK: ins.b	v9[10], v18[5]          ; encoding: [0x49,0x2e,0x15,0x6e]
+
+
+  and.8b  v0, v0, v0
+  and.16b v0, v0, v0
+
+; CHECK: and.8b  v0, v0, v0          ; encoding: [0x00,0x1c,0x20,0x0e]
+; CHECK: and.16b v0, v0, v0          ; encoding: [0x00,0x1c,0x20,0x4e]
+
+  bic.8b  v0, v0, v0
+
+; CHECK: bic.8b  v0, v0, v0          ; encoding: [0x00,0x1c,0x60,0x0e]
+
+  cmeq.8b v0, v0, v0
+  cmge.8b v0, v0, v0
+  cmgt.8b v0, v0, v0
+  cmhi.8b v0, v0, v0
+  cmhs.8b v0, v0, v0
+  cmtst.8b v0, v0, v0
+  fabd.2s v0, v0, v0
+  facge.2s  v0, v0, v0
+  facgt.2s  v0, v0, v0
+  faddp.2s v0, v0, v0
+  fadd.2s v0, v0, v0
+  fcmeq.2s  v0, v0, v0
+  fcmge.2s  v0, v0, v0
+  fcmgt.2s  v0, v0, v0
+  fdiv.2s v0, v0, v0
+  fmaxnmp.2s v0, v0, v0
+  fmaxnm.2s v0, v0, v0
+  fmaxp.2s v0, v0, v0
+  fmax.2s v0, v0, v0
+  fminnmp.2s v0, v0, v0
+  fminnm.2s v0, v0, v0
+  fminp.2s v0, v0, v0
+  fmin.2s v0, v0, v0
+  fmla.2s v0, v0, v0
+  fmls.2s v0, v0, v0
+  fmulx.2s v0, v0, v0
+  fmul.2s v0, v0, v0
+  fmulx	d2, d3, d1
+  fmulx	s2, s3, s1
+  frecps.2s v0, v0, v0
+  frsqrts.2s v0, v0, v0
+  fsub.2s v0, v0, v0
+  mla.8b v0, v0, v0
+  mls.8b v0, v0, v0
+  mul.8b v0, v0, v0
+  pmul.8b v0, v0, v0
+  saba.8b v0, v0, v0
+  sabd.8b v0, v0, v0
+  shadd.8b v0, v0, v0
+  shsub.8b v0, v0, v0
+  smaxp.8b v0, v0, v0
+  smax.8b v0, v0, v0
+  sminp.8b v0, v0, v0
+  smin.8b v0, v0, v0
+  sqadd.8b v0, v0, v0
+  sqdmulh.4h v0, v0, v0
+  sqrdmulh.4h v0, v0, v0
+  sqrshl.8b v0, v0, v0
+  sqshl.8b v0, v0, v0
+  sqsub.8b v0, v0, v0
+  srhadd.8b v0, v0, v0
+  srshl.8b v0, v0, v0
+  sshl.8b v0, v0, v0
+  sub.8b v0, v0, v0
+  uaba.8b v0, v0, v0
+  uabd.8b v0, v0, v0
+  uhadd.8b v0, v0, v0
+  uhsub.8b v0, v0, v0
+  umaxp.8b v0, v0, v0
+  umax.8b v0, v0, v0
+  uminp.8b v0, v0, v0
+  umin.8b v0, v0, v0
+  uqadd.8b v0, v0, v0
+  uqrshl.8b v0, v0, v0
+  uqshl.8b v0, v0, v0
+  uqsub.8b v0, v0, v0
+  urhadd.8b v0, v0, v0
+  urshl.8b v0, v0, v0
+  ushl.8b v0, v0, v0
+
+; CHECK: cmeq.8b	v0, v0, v0              ; encoding: [0x00,0x8c,0x20,0x2e]
+; CHECK: cmge.8b	v0, v0, v0              ; encoding: [0x00,0x3c,0x20,0x0e]
+; CHECK: cmgt.8b	v0, v0, v0              ; encoding: [0x00,0x34,0x20,0x0e]
+; CHECK: cmhi.8b	v0, v0, v0              ; encoding: [0x00,0x34,0x20,0x2e]
+; CHECK: cmhs.8b	v0, v0, v0              ; encoding: [0x00,0x3c,0x20,0x2e]
+; CHECK: cmtst.8b	v0, v0, v0      ; encoding: [0x00,0x8c,0x20,0x0e]
+; CHECK: fabd.2s	v0, v0, v0              ; encoding: [0x00,0xd4,0xa0,0x2e]
+; CHECK: facge.2s	v0, v0, v0      ; encoding: [0x00,0xec,0x20,0x2e]
+; CHECK: facgt.2s	v0, v0, v0      ; encoding: [0x00,0xec,0xa0,0x2e]
+; CHECK: faddp.2s	v0, v0, v0      ; encoding: [0x00,0xd4,0x20,0x2e]
+; CHECK: fadd.2s	v0, v0, v0              ; encoding: [0x00,0xd4,0x20,0x0e]
+; CHECK: fcmeq.2s	v0, v0, v0      ; encoding: [0x00,0xe4,0x20,0x0e]
+; CHECK: fcmge.2s	v0, v0, v0      ; encoding: [0x00,0xe4,0x20,0x2e]
+; CHECK: fcmgt.2s	v0, v0, v0      ; encoding: [0x00,0xe4,0xa0,0x2e]
+; CHECK: fdiv.2s	v0, v0, v0              ; encoding: [0x00,0xfc,0x20,0x2e]
+; CHECK: fmaxnmp.2s	v0, v0, v0      ; encoding: [0x00,0xc4,0x20,0x2e]
+; CHECK: fmaxnm.2s	v0, v0, v0      ; encoding: [0x00,0xc4,0x20,0x0e]
+; CHECK: fmaxp.2s	v0, v0, v0      ; encoding: [0x00,0xf4,0x20,0x2e]
+; CHECK: fmax.2s	v0, v0, v0              ; encoding: [0x00,0xf4,0x20,0x0e]
+; CHECK: fminnmp.2s	v0, v0, v0      ; encoding: [0x00,0xc4,0xa0,0x2e]
+; CHECK: fminnm.2s	v0, v0, v0      ; encoding: [0x00,0xc4,0xa0,0x0e]
+; CHECK: fminp.2s	v0, v0, v0      ; encoding: [0x00,0xf4,0xa0,0x2e]
+; CHECK: fmin.2s	v0, v0, v0              ; encoding: [0x00,0xf4,0xa0,0x0e]
+; CHECK: fmla.2s	v0, v0, v0              ; encoding: [0x00,0xcc,0x20,0x0e]
+; CHECK: fmls.2s	v0, v0, v0              ; encoding: [0x00,0xcc,0xa0,0x0e]
+; CHECK: fmulx.2s	v0, v0, v0      ; encoding: [0x00,0xdc,0x20,0x0e]
+
+; CHECK: fmul.2s	v0, v0, v0              ; encoding: [0x00,0xdc,0x20,0x2e]
+; CHECK: fmulx	d2, d3, d1              ; encoding: [0x62,0xdc,0x61,0x5e]
+; CHECK: fmulx	s2, s3, s1              ; encoding: [0x62,0xdc,0x21,0x5e]
+; CHECK: frecps.2s	v0, v0, v0      ; encoding: [0x00,0xfc,0x20,0x0e]
+; CHECK: frsqrts.2s	v0, v0, v0      ; encoding: [0x00,0xfc,0xa0,0x0e]
+; CHECK: fsub.2s	v0, v0, v0              ; encoding: [0x00,0xd4,0xa0,0x0e]
+; CHECK: mla.8b	v0, v0, v0              ; encoding: [0x00,0x94,0x20,0x0e]
+; CHECK: mls.8b	v0, v0, v0              ; encoding: [0x00,0x94,0x20,0x2e]
+; CHECK: mul.8b	v0, v0, v0              ; encoding: [0x00,0x9c,0x20,0x0e]
+; CHECK: pmul.8b	v0, v0, v0              ; encoding: [0x00,0x9c,0x20,0x2e]
+; CHECK: saba.8b	v0, v0, v0              ; encoding: [0x00,0x7c,0x20,0x0e]
+; CHECK: sabd.8b	v0, v0, v0              ; encoding: [0x00,0x74,0x20,0x0e]
+; CHECK: shadd.8b	v0, v0, v0      ; encoding: [0x00,0x04,0x20,0x0e]
+; CHECK: shsub.8b	v0, v0, v0      ; encoding: [0x00,0x24,0x20,0x0e]
+; CHECK: smaxp.8b	v0, v0, v0      ; encoding: [0x00,0xa4,0x20,0x0e]
+; CHECK: smax.8b	v0, v0, v0              ; encoding: [0x00,0x64,0x20,0x0e]
+; CHECK: sminp.8b	v0, v0, v0      ; encoding: [0x00,0xac,0x20,0x0e]
+; CHECK: smin.8b	v0, v0, v0              ; encoding: [0x00,0x6c,0x20,0x0e]
+; CHECK: sqadd.8b	v0, v0, v0      ; encoding: [0x00,0x0c,0x20,0x0e]
+; CHECK: sqdmulh.4h v0, v0, v0 ; encoding: [0x00,0xb4,0x60,0x0e]
+; CHECK: sqrdmulh.4h v0, v0, v0 ; encoding: [0x00,0xb4,0x60,0x2e]
+; CHECK: sqrshl.8b	v0, v0, v0      ; encoding: [0x00,0x5c,0x20,0x0e]
+; CHECK: sqshl.8b	v0, v0, v0      ; encoding: [0x00,0x4c,0x20,0x0e]
+; CHECK: sqsub.8b	v0, v0, v0      ; encoding: [0x00,0x2c,0x20,0x0e]
+; CHECK: srhadd.8b	v0, v0, v0      ; encoding: [0x00,0x14,0x20,0x0e]
+; CHECK: srshl.8b	v0, v0, v0      ; encoding: [0x00,0x54,0x20,0x0e]
+; CHECK: sshl.8b	v0, v0, v0              ; encoding: [0x00,0x44,0x20,0x0e]
+; CHECK: sub.8b	v0, v0, v0              ; encoding: [0x00,0x84,0x20,0x2e]
+; CHECK: uaba.8b	v0, v0, v0              ; encoding: [0x00,0x7c,0x20,0x2e]
+; CHECK: uabd.8b	v0, v0, v0              ; encoding: [0x00,0x74,0x20,0x2e]
+; CHECK: uhadd.8b	v0, v0, v0      ; encoding: [0x00,0x04,0x20,0x2e]
+; CHECK: uhsub.8b	v0, v0, v0      ; encoding: [0x00,0x24,0x20,0x2e]
+; CHECK: umaxp.8b	v0, v0, v0      ; encoding: [0x00,0xa4,0x20,0x2e]
+; CHECK: umax.8b	v0, v0, v0              ; encoding: [0x00,0x64,0x20,0x2e]
+; CHECK: uminp.8b	v0, v0, v0      ; encoding: [0x00,0xac,0x20,0x2e]
+; CHECK: umin.8b	v0, v0, v0              ; encoding: [0x00,0x6c,0x20,0x2e]
+; CHECK: uqadd.8b	v0, v0, v0      ; encoding: [0x00,0x0c,0x20,0x2e]
+; CHECK: uqrshl.8b	v0, v0, v0      ; encoding: [0x00,0x5c,0x20,0x2e]
+; CHECK: uqshl.8b	v0, v0, v0      ; encoding: [0x00,0x4c,0x20,0x2e]
+; CHECK: uqsub.8b	v0, v0, v0      ; encoding: [0x00,0x2c,0x20,0x2e]
+; CHECK: urhadd.8b	v0, v0, v0      ; encoding: [0x00,0x14,0x20,0x2e]
+; CHECK: urshl.8b	v0, v0, v0      ; encoding: [0x00,0x54,0x20,0x2e]
+; CHECK: ushl.8b	v0, v0, v0              ; encoding: [0x00,0x44,0x20,0x2e]
+
+  bif.8b v0, v0, v0
+  bit.8b v0, v0, v0
+  bsl.8b v0, v0, v0
+  eor.8b v0, v0, v0
+  orn.8b v0, v0, v0
+  orr.8b v0, v0, v0
+
+; CHECK: bif.8b	v0, v0, v0              ; encoding: [0x00,0x1c,0xe0,0x2e]
+; CHECK: bit.8b	v0, v0, v0              ; encoding: [0x00,0x1c,0xa0,0x2e]
+; CHECK: bsl.8b	v0, v0, v0              ; encoding: [0x00,0x1c,0x60,0x2e]
+; CHECK: eor.8b	v0, v0, v0              ; encoding: [0x00,0x1c,0x20,0x2e]
+; CHECK: orn.8b	v0, v0, v0              ; encoding: [0x00,0x1c,0xe0,0x0e]
+; CHECK: orr.8b	v0, v0, v0              ; encoding: [0x00,0x1c,0xa0,0x0e]
+
+  sadalp.4h   v0, v0
+  sadalp.8h  v0, v0
+  sadalp.2s   v0, v0
+  sadalp.4s   v0, v0
+  sadalp.1d   v0, v0
+  sadalp.2d   v0, v0
+
+; CHECK: sadalp.4h	v0, v0          ; encoding: [0x00,0x68,0x20,0x0e]
+; CHECK: sadalp.8h	v0, v0          ; encoding: [0x00,0x68,0x20,0x4e]
+; CHECK: sadalp.2s	v0, v0          ; encoding: [0x00,0x68,0x60,0x0e]
+; CHECK: sadalp.4s	v0, v0          ; encoding: [0x00,0x68,0x60,0x4e]
+; CHECK: sadalp.1d	v0, v0          ; encoding: [0x00,0x68,0xa0,0x0e]
+; CHECK: sadalp.2d	v0, v0          ; encoding: [0x00,0x68,0xa0,0x4e]
+
+  cls.8b      v0, v0
+  clz.8b      v0, v0
+  cnt.8b      v0, v0
+  fabs.2s     v0, v0
+  fneg.2s     v0, v0
+  frecpe.2s   v0, v0
+  frinta.2s   v0, v0
+  frintx.2s   v0, v0
+  frinti.2s   v0, v0
+  frintm.2s   v0, v0
+  frintn.2s   v0, v0
+  frintp.2s   v0, v0
+  frintz.2s   v0, v0
+  frsqrte.2s  v0, v0
+  fsqrt.2s    v0, v0
+  neg.8b      v0, v0
+  not.8b      v0, v0
+  rbit.8b     v0, v0
+  rev16.8b    v0, v0
+  rev32.8b    v0, v0
+  rev64.8b    v0, v0
+  sadalp.4h   v0, v0
+  saddlp.4h	  v0, v0
+  scvtf.2s    v0, v0
+  sqabs.8b    v0, v0
+  sqneg.8b    v0, v0
+  sqxtn.8b    v0, v0
+  sqxtun.8b   v0, v0
+  suqadd.8b   v0, v0
+  uadalp.4h   v0, v0
+  uaddlp.4h   v0, v0
+  ucvtf.2s    v0, v0
+  uqxtn.8b    v0, v0
+  urecpe.2s   v0, v0
+  ursqrte.2s  v0, v0
+  usqadd.8b   v0, v0
+  xtn.8b      v0, v0
+  shll.8h v1, v2, #8
+  shll.4s v3, v4, #16
+  shll.2d v5, v6, #32
+  shll2.8h v7, v8, #8
+  shll2.4s v9, v10, #16
+  shll2.2d v11, v12, #32
+  shll v1.8h, v2.8b, #8
+  shll v1.4s, v2.4h, #16
+  shll v1.2d, v2.2s, #32
+  shll2 v1.8h, v2.16b, #8
+  shll2 v1.4s, v2.8h, #16
+  shll2 v1.2d, v2.4s, #32
+
+; CHECK: cls.8b	v0, v0                  ; encoding: [0x00,0x48,0x20,0x0e]
+; CHECK: clz.8b	v0, v0                  ; encoding: [0x00,0x48,0x20,0x2e]
+; CHECK: cnt.8b	v0, v0                  ; encoding: [0x00,0x58,0x20,0x0e]
+; CHECK: fabs.2s	v0, v0                  ; encoding: [0x00,0xf8,0xa0,0x0e]
+; CHECK: fneg.2s	v0, v0                  ; encoding: [0x00,0xf8,0xa0,0x2e]
+; CHECK: frecpe.2s	v0, v0          ; encoding: [0x00,0xd8,0xa1,0x0e]
+; CHECK: frinta.2s	v0, v0          ; encoding: [0x00,0x88,0x21,0x2e]
+; CHECK: frintx.2s	v0, v0          ; encoding: [0x00,0x98,0x21,0x2e]
+; CHECK: frinti.2s	v0, v0          ; encoding: [0x00,0x98,0xa1,0x2e]
+; CHECK: frintm.2s	v0, v0          ; encoding: [0x00,0x98,0x21,0x0e]
+; CHECK: frintn.2s	v0, v0          ; encoding: [0x00,0x88,0x21,0x0e]
+; CHECK: frintp.2s	v0, v0          ; encoding: [0x00,0x88,0xa1,0x0e]
+; CHECK: frintz.2s	v0, v0          ; encoding: [0x00,0x98,0xa1,0x0e]
+; CHECK: frsqrte.2s	v0, v0          ; encoding: [0x00,0xd8,0xa1,0x2e]
+; CHECK: fsqrt.2s	v0, v0          ; encoding: [0x00,0xf8,0xa1,0x2e]
+; CHECK: neg.8b	v0, v0                  ; encoding: [0x00,0xb8,0x20,0x2e]
+; CHECK: not.8b	v0, v0                  ; encoding: [0x00,0x58,0x20,0x2e]
+; CHECK: rbit.8b	v0, v0                  ; encoding: [0x00,0x58,0x60,0x2e]
+; CHECK: rev16.8b	v0, v0          ; encoding: [0x00,0x18,0x20,0x0e]
+; CHECK: rev32.8b	v0, v0          ; encoding: [0x00,0x08,0x20,0x2e]
+; CHECK: rev64.8b	v0, v0          ; encoding: [0x00,0x08,0x20,0x0e]
+; CHECK: sadalp.4h	v0, v0          ; encoding: [0x00,0x68,0x20,0x0e]
+; CHECK: saddlp.4h	v0, v0          ; encoding: [0x00,0x28,0x20,0x0e]
+; CHECK: scvtf.2s	v0, v0          ; encoding: [0x00,0xd8,0x21,0x0e]
+; CHECK: sqabs.8b	v0, v0          ; encoding: [0x00,0x78,0x20,0x0e]
+; CHECK: sqneg.8b	v0, v0          ; encoding: [0x00,0x78,0x20,0x2e]
+; CHECK: sqxtn.8b	v0, v0          ; encoding: [0x00,0x48,0x21,0x0e]
+; CHECK: sqxtun.8b	v0, v0          ; encoding: [0x00,0x28,0x21,0x2e]
+; CHECK: suqadd.8b	v0, v0          ; encoding: [0x00,0x38,0x20,0x0e]
+; CHECK: uadalp.4h	v0, v0          ; encoding: [0x00,0x68,0x20,0x2e]
+; CHECK: uaddlp.4h	v0, v0          ; encoding: [0x00,0x28,0x20,0x2e]
+; CHECK: ucvtf.2s	v0, v0          ; encoding: [0x00,0xd8,0x21,0x2e]
+; CHECK: uqxtn.8b	v0, v0          ; encoding: [0x00,0x48,0x21,0x2e]
+; CHECK: urecpe.2s	v0, v0          ; encoding: [0x00,0xc8,0xa1,0x0e]
+; CHECK: ursqrte.2s	v0, v0          ; encoding: [0x00,0xc8,0xa1,0x2e]
+; CHECK: usqadd.8b	v0, v0          ; encoding: [0x00,0x38,0x20,0x2e]
+; CHECK: xtn.8b	v0, v0                  ; encoding: [0x00,0x28,0x21,0x0e]
+; CHECK: shll.8h	v1, v2, #8      ; encoding: [0x41,0x38,0x21,0x2e]
+; CHECK: shll.4s	v3, v4, #16     ; encoding: [0x83,0x38,0x61,0x2e]
+; CHECK: shll.2d	v5, v6, #32     ; encoding: [0xc5,0x38,0xa1,0x2e]
+; CHECK: shll2.8h	v7, v8, #8      ; encoding: [0x07,0x39,0x21,0x6e]
+; CHECK: shll2.4s	v9, v10, #16    ; encoding: [0x49,0x39,0x61,0x6e]
+; CHECK: shll2.2d	v11, v12, #32   ; encoding: [0x8b,0x39,0xa1,0x6e]
+; CHECK: shll.8h	v1, v2, #8      ; encoding: [0x41,0x38,0x21,0x2e]
+; CHECK: shll.4s	v1, v2, #16     ; encoding: [0x41,0x38,0x61,0x2e]
+; CHECK: shll.2d	v1, v2, #32     ; encoding: [0x41,0x38,0xa1,0x2e]
+; CHECK: shll2.8h	v1, v2, #8      ; encoding: [0x41,0x38,0x21,0x6e]
+; CHECK: shll2.4s	v1, v2, #16     ; encoding: [0x41,0x38,0x61,0x6e]
+; CHECK: shll2.2d	v1, v2, #32     ; encoding: [0x41,0x38,0xa1,0x6e]
+
+
+  cmeq.8b   v0, v0, #0
+  cmeq.16b  v0, v0, #0
+  cmeq.4h   v0, v0, #0
+  cmeq.8h   v0, v0, #0
+  cmeq.2s   v0, v0, #0
+  cmeq.4s   v0, v0, #0
+  cmeq.2d   v0, v0, #0
+
+; CHECK: cmeq.8b	v0, v0, #0              ; encoding: [0x00,0x98,0x20,0x0e]
+; CHECK: cmeq.16b	v0, v0, #0      ; encoding: [0x00,0x98,0x20,0x4e]
+; CHECK: cmeq.4h	v0, v0, #0              ; encoding: [0x00,0x98,0x60,0x0e]
+; CHECK: cmeq.8h	v0, v0, #0              ; encoding: [0x00,0x98,0x60,0x4e]
+; CHECK: cmeq.2s	v0, v0, #0              ; encoding: [0x00,0x98,0xa0,0x0e]
+; CHECK: cmeq.4s	v0, v0, #0              ; encoding: [0x00,0x98,0xa0,0x4e]
+; CHECK: cmeq.2d	v0, v0, #0              ; encoding: [0x00,0x98,0xe0,0x4e]
+
+  cmge.8b   v0, v0, #0
+  cmgt.8b   v0, v0, #0
+  cmle.8b   v0, v0, #0
+  cmlt.8b   v0, v0, #0
+  fcmeq.2s  v0, v0, #0
+  fcmge.2s  v0, v0, #0
+  fcmgt.2s  v0, v0, #0
+  fcmle.2s  v0, v0, #0
+  fcmlt.2s  v0, v0, #0
+
+; ARM verbose mode aliases
+  cmlt v8.8b, v14.8b, #0
+  cmlt v8.16b, v14.16b, #0
+  cmlt v8.4h, v14.4h, #0
+  cmlt v8.8h, v14.8h, #0
+  cmlt v8.2s, v14.2s, #0
+  cmlt v8.4s, v14.4s, #0
+  cmlt v8.2d, v14.2d, #0
+
+; CHECK: cmge.8b	v0, v0, #0              ; encoding: [0x00,0x88,0x20,0x2e]
+; CHECK: cmgt.8b	v0, v0, #0              ; encoding: [0x00,0x88,0x20,0x0e]
+; CHECK: cmle.8b	v0, v0, #0              ; encoding: [0x00,0x98,0x20,0x2e]
+; CHECK: cmlt.8b	v0, v0, #0              ; encoding: [0x00,0xa8,0x20,0x0e]
+; CHECK: fcmeq.2s	v0, v0, #0      ; encoding: [0x00,0xd8,0xa0,0x0e]
+; CHECK: fcmge.2s	v0, v0, #0      ; encoding: [0x00,0xc8,0xa0,0x2e]
+; CHECK: fcmgt.2s	v0, v0, #0      ; encoding: [0x00,0xc8,0xa0,0x0e]
+; CHECK: fcmle.2s	v0, v0, #0      ; encoding: [0x00,0xd8,0xa0,0x2e]
+; CHECK: fcmlt.2s	v0, v0, #0      ; encoding: [0x00,0xe8,0xa0,0x0e]
+; CHECK: cmlt.8b	v8, v14, #0             ; encoding: [0xc8,0xa9,0x20,0x0e]
+; CHECK: cmlt.16b	v8, v14, #0     ; encoding: [0xc8,0xa9,0x20,0x4e]
+; CHECK: cmlt.4h	v8, v14, #0             ; encoding: [0xc8,0xa9,0x60,0x0e]
+; CHECK: cmlt.8h	v8, v14, #0             ; encoding: [0xc8,0xa9,0x60,0x4e]
+; CHECK: cmlt.2s	v8, v14, #0             ; encoding: [0xc8,0xa9,0xa0,0x0e]
+; CHECK: cmlt.4s	v8, v14, #0             ; encoding: [0xc8,0xa9,0xa0,0x4e]
+; CHECK: cmlt.2d	v8, v14, #0             ; encoding: [0xc8,0xa9,0xe0,0x4e]
+
+
+;===-------------------------------------------------------------------------===
+; AdvSIMD Floating-point <-> Integer Conversions
+;===-------------------------------------------------------------------------===
+
+  fcvtas.2s   v0, v0
+  fcvtas.4s   v0, v0
+  fcvtas.2d   v0, v0
+  fcvtas      s0, s0
+  fcvtas      d0, d0
+
+; CHECK: fcvtas.2s  v0, v0           ; encoding: [0x00,0xc8,0x21,0x0e]
+; CHECK: fcvtas.4s  v0, v0           ; encoding: [0x00,0xc8,0x21,0x4e]
+; CHECK: fcvtas.2d  v0, v0           ; encoding: [0x00,0xc8,0x61,0x4e]
+; CHECK: fcvtas     s0, s0           ; encoding: [0x00,0xc8,0x21,0x5e]
+; CHECK: fcvtas     d0, d0           ; encoding: [0x00,0xc8,0x61,0x5e]
+
+  fcvtau.2s   v0, v0
+  fcvtau.4s   v0, v0
+  fcvtau.2d   v0, v0
+  fcvtau      s0, s0
+  fcvtau      d0, d0
+
+; CHECK: fcvtau.2s  v0, v0           ; encoding: [0x00,0xc8,0x21,0x2e]
+; CHECK: fcvtau.4s  v0, v0           ; encoding: [0x00,0xc8,0x21,0x6e]
+; CHECK: fcvtau.2d  v0, v0           ; encoding: [0x00,0xc8,0x61,0x6e]
+; CHECK: fcvtau     s0, s0           ; encoding: [0x00,0xc8,0x21,0x7e]
+; CHECK: fcvtau     d0, d0           ; encoding: [0x00,0xc8,0x61,0x7e]
+
+  fcvtl   v1.4s, v5.4h
+  fcvtl   v2.2d, v6.2s
+  fcvtl2  v3.4s, v7.8h
+  fcvtl2  v4.2d, v8.4s
+
+; CHECK: fcvtl	v1.4s, v5.4h            ; encoding: [0xa1,0x78,0x21,0x0e]
+; CHECK: fcvtl	v2.2d, v6.2s            ; encoding: [0xc2,0x78,0x61,0x0e]
+; CHECK: fcvtl2	v3.4s, v7.8h            ; encoding: [0xe3,0x78,0x21,0x4e]
+; CHECK: fcvtl2	v4.2d, v8.4s            ; encoding: [0x04,0x79,0x61,0x4e]
+
+  fcvtms.2s  v0, v0
+  fcvtms.4s  v0, v0
+  fcvtms.2d  v0, v0
+  fcvtms     s0, s0
+  fcvtms     d0, d0
+
+; CHECK: fcvtms.2s v0, v0            ; encoding: [0x00,0xb8,0x21,0x0e]
+; CHECK: fcvtms.4s v0, v0            ; encoding: [0x00,0xb8,0x21,0x4e]
+; CHECK: fcvtms.2d v0, v0            ; encoding: [0x00,0xb8,0x61,0x4e]
+; CHECK: fcvtms    s0, s0            ; encoding: [0x00,0xb8,0x21,0x5e]
+; CHECK: fcvtms    d0, d0            ; encoding: [0x00,0xb8,0x61,0x5e]
+
+  fcvtmu.2s   v0, v0
+  fcvtmu.4s   v0, v0
+  fcvtmu.2d   v0, v0
+  fcvtmu      s0, s0
+  fcvtmu      d0, d0
+
+; CHECK: fcvtmu.2s v0, v0            ; encoding: [0x00,0xb8,0x21,0x2e]
+; CHECK: fcvtmu.4s v0, v0            ; encoding: [0x00,0xb8,0x21,0x6e]
+; CHECK: fcvtmu.2d v0, v0            ; encoding: [0x00,0xb8,0x61,0x6e]
+; CHECK: fcvtmu    s0, s0            ; encoding: [0x00,0xb8,0x21,0x7e]
+; CHECK: fcvtmu    d0, d0            ; encoding: [0x00,0xb8,0x61,0x7e]
+
+  fcvtns.2s   v0, v0
+  fcvtns.4s   v0, v0
+  fcvtns.2d   v0, v0
+  fcvtns      s0, s0
+  fcvtns      d0, d0
+
+; CHECK: fcvtns.2s v0, v0            ; encoding: [0x00,0xa8,0x21,0x0e]
+; CHECK: fcvtns.4s v0, v0            ; encoding: [0x00,0xa8,0x21,0x4e]
+; CHECK: fcvtns.2d v0, v0            ; encoding: [0x00,0xa8,0x61,0x4e]
+; CHECK: fcvtns    s0, s0            ; encoding: [0x00,0xa8,0x21,0x5e]
+; CHECK: fcvtns    d0, d0            ; encoding: [0x00,0xa8,0x61,0x5e]
+
+  fcvtnu.2s   v0, v0
+  fcvtnu.4s   v0, v0
+  fcvtnu.2d   v0, v0
+  fcvtnu      s0, s0
+  fcvtnu      d0, d0
+
+; CHECK: fcvtnu.2s v0, v0            ; encoding: [0x00,0xa8,0x21,0x2e]
+; CHECK: fcvtnu.4s v0, v0            ; encoding: [0x00,0xa8,0x21,0x6e]
+; CHECK: fcvtnu.2d v0, v0            ; encoding: [0x00,0xa8,0x61,0x6e]
+; CHECK: fcvtnu    s0, s0            ; encoding: [0x00,0xa8,0x21,0x7e]
+; CHECK: fcvtnu    d0, d0            ; encoding: [0x00,0xa8,0x61,0x7e]
+
+  fcvtn   v2.4h, v4.4s
+  fcvtn   v3.2s, v5.2d
+  fcvtn2  v4.8h, v6.4s
+  fcvtn2  v5.4s, v7.2d
+  fcvtxn  v6.2s, v9.2d
+  fcvtxn2 v7.4s, v8.2d
+
+; CHECK: fcvtn	v2.4h, v4.4s            ; encoding: [0x82,0x68,0x21,0x0e]
+; CHECK: fcvtn	v3.2s, v5.2d            ; encoding: [0xa3,0x68,0x61,0x0e]
+; CHECK: fcvtn2	v4.8h, v6.4s            ; encoding: [0xc4,0x68,0x21,0x4e]
+; CHECK: fcvtn2	v5.4s, v7.2d            ; encoding: [0xe5,0x68,0x61,0x4e]
+; CHECK: fcvtxn	v6.2s, v9.2d            ; encoding: [0x26,0x69,0x61,0x2e]
+; CHECK: fcvtxn2 v7.4s, v8.2d           ; encoding: [0x07,0x69,0x61,0x6e]
+
+  fcvtps.2s  v0, v0
+  fcvtps.4s  v0, v0
+  fcvtps.2d  v0, v0
+  fcvtps     s0, s0
+  fcvtps     d0, d0
+
+; CHECK: fcvtps.2s v0, v0            ; encoding: [0x00,0xa8,0xa1,0x0e]
+; CHECK: fcvtps.4s v0, v0            ; encoding: [0x00,0xa8,0xa1,0x4e]
+; CHECK: fcvtps.2d v0, v0            ; encoding: [0x00,0xa8,0xe1,0x4e]
+; CHECK: fcvtps    s0, s0            ; encoding: [0x00,0xa8,0xa1,0x5e]
+; CHECK: fcvtps    d0, d0            ; encoding: [0x00,0xa8,0xe1,0x5e]
+
+  fcvtpu.2s  v0, v0
+  fcvtpu.4s  v0, v0
+  fcvtpu.2d  v0, v0
+  fcvtpu     s0, s0
+  fcvtpu     d0, d0
+
+; CHECK: fcvtpu.2s v0, v0            ; encoding: [0x00,0xa8,0xa1,0x2e]
+; CHECK: fcvtpu.4s v0, v0            ; encoding: [0x00,0xa8,0xa1,0x6e]
+; CHECK: fcvtpu.2d v0, v0            ; encoding: [0x00,0xa8,0xe1,0x6e]
+; CHECK: fcvtpu    s0, s0            ; encoding: [0x00,0xa8,0xa1,0x7e]
+; CHECK: fcvtpu    d0, d0            ; encoding: [0x00,0xa8,0xe1,0x7e]
+
+  fcvtzs.2s  v0, v0
+  fcvtzs.4s  v0, v0
+  fcvtzs.2d  v0, v0
+  fcvtzs     s0, s0
+  fcvtzs     d0, d0
+
+; CHECK: fcvtzs.2s v0, v0            ; encoding: [0x00,0xb8,0xa1,0x0e]
+; CHECK: fcvtzs.4s v0, v0            ; encoding: [0x00,0xb8,0xa1,0x4e]
+; CHECK: fcvtzs.2d v0, v0            ; encoding: [0x00,0xb8,0xe1,0x4e]
+; CHECK: fcvtzs    s0, s0            ; encoding: [0x00,0xb8,0xa1,0x5e]
+; CHECK: fcvtzs    d0, d0            ; encoding: [0x00,0xb8,0xe1,0x5e]
+
+  fcvtzu.2s  v0, v0
+  fcvtzu.4s  v0, v0
+  fcvtzu.2d  v0, v0
+  fcvtzu     s0, s0
+  fcvtzu     d0, d0
+
+; CHECK: fcvtzu.2s v0, v0            ; encoding: [0x00,0xb8,0xa1,0x2e]
+; CHECK: fcvtzu.4s v0, v0            ; encoding: [0x00,0xb8,0xa1,0x6e]
+; CHECK: fcvtzu.2d v0, v0            ; encoding: [0x00,0xb8,0xe1,0x6e]
+; CHECK: fcvtzu    s0, s0            ; encoding: [0x00,0xb8,0xa1,0x7e]
+; CHECK: fcvtzu    d0, d0            ; encoding: [0x00,0xb8,0xe1,0x7e]
+
+;===-------------------------------------------------------------------------===
+; AdvSIMD modified immediate instructions
+;===-------------------------------------------------------------------------===
+
+  bic.2s  v0, #1
+  bic.2s  v0, #1, lsl #0
+  bic.2s  v0, #1, lsl #8
+  bic.2s  v0, #1, lsl #16
+  bic.2s  v0, #1, lsl #24
+
+; CHECK: bic.2s v0, #1               ; encoding: [0x20,0x14,0x00,0x2f]
+; CHECK: bic.2s v0, #1               ; encoding: [0x20,0x14,0x00,0x2f]
+; CHECK: bic.2s v0, #1, lsl #8       ; encoding: [0x20,0x34,0x00,0x2f]
+; CHECK: bic.2s v0, #1, lsl #16      ; encoding: [0x20,0x54,0x00,0x2f]
+; CHECK: bic.2s v0, #1, lsl #24      ; encoding: [0x20,0x74,0x00,0x2f]
+
+  bic.4h  v0, #1
+  bic.4h  v0, #1, lsl #0
+  bic.4h  v0, #1, lsl #8
+
+; CHECK: bic.4h v0, #1               ; encoding: [0x20,0x94,0x00,0x2f]
+; CHECK: bic.4h v0, #1               ; encoding: [0x20,0x94,0x00,0x2f]
+; CHECK: bic.4h v0, #1, lsl #8       ; encoding: [0x20,0xb4,0x00,0x2f]
+
+  bic.4s  v0, #1
+  bic.4s  v0, #1, lsl #0
+  bic.4s  v0, #1, lsl #8
+  bic.4s  v0, #1, lsl #16
+  bic.4s  v0, #1, lsl #24
+
+; CHECK: bic.4s v0, #1               ; encoding: [0x20,0x14,0x00,0x6f]
+; CHECK: bic.4s v0, #1               ; encoding: [0x20,0x14,0x00,0x6f]
+; CHECK: bic.4s v0, #1, lsl #8       ; encoding: [0x20,0x34,0x00,0x6f]
+; CHECK: bic.4s v0, #1, lsl #16      ; encoding: [0x20,0x54,0x00,0x6f]
+; CHECK: bic.4s v0, #1, lsl #24      ; encoding: [0x20,0x74,0x00,0x6f]
+
+  bic.8h  v0, #1
+  bic.8h  v0, #1, lsl #0
+  bic.8h  v0, #1, lsl #8
+
+; CHECK: bic.8h v0, #1               ; encoding: [0x20,0x94,0x00,0x6f]
+; CHECK: bic.8h v0, #1               ; encoding: [0x20,0x94,0x00,0x6f]
+; CHECK: bic.8h v0, #1, lsl #8       ; encoding: [0x20,0xb4,0x00,0x6f]
+
+  fmov.2d v0, #1.250000e-01
+
+; CHECK: fmov.2d v0, #1.250000e-01             ; encoding: [0x00,0xf4,0x02,0x6f]
+
+  fmov.2s v0, #1.250000e-01
+  fmov.4s v0, #1.250000e-01
+
+; CHECK: fmov.2s v0, #1.250000e-01             ; encoding: [0x00,0xf4,0x02,0x0f]
+; CHECK: fmov.4s v0, #1.250000e-01             ; encoding: [0x00,0xf4,0x02,0x4f]
+
+  orr.2s  v0, #1
+  orr.2s  v0, #1, lsl #0
+  orr.2s  v0, #1, lsl #8
+  orr.2s  v0, #1, lsl #16
+  orr.2s  v0, #1, lsl #24
+
+; CHECK: orr.2s v0, #1               ; encoding: [0x20,0x14,0x00,0x0f]
+; CHECK: orr.2s v0, #1               ; encoding: [0x20,0x14,0x00,0x0f]
+; CHECK: orr.2s v0, #1, lsl #8       ; encoding: [0x20,0x34,0x00,0x0f]
+; CHECK: orr.2s v0, #1, lsl #16      ; encoding: [0x20,0x54,0x00,0x0f]
+; CHECK: orr.2s v0, #1, lsl #24      ; encoding: [0x20,0x74,0x00,0x0f]
+
+  orr.4h  v0, #1
+  orr.4h  v0, #1, lsl #0
+  orr.4h  v0, #1, lsl #8
+
+; CHECK: orr.4h v0, #1               ; encoding: [0x20,0x94,0x00,0x0f]
+; CHECK: orr.4h v0, #1               ; encoding: [0x20,0x94,0x00,0x0f]
+; CHECK: orr.4h v0, #1, lsl #8       ; encoding: [0x20,0xb4,0x00,0x0f]
+
+  orr.4s  v0, #1
+  orr.4s  v0, #1, lsl #0
+  orr.4s  v0, #1, lsl #8
+  orr.4s  v0, #1, lsl #16
+  orr.4s  v0, #1, lsl #24
+
+; CHECK: orr.4s v0, #1               ; encoding: [0x20,0x14,0x00,0x4f]
+; CHECK: orr.4s v0, #1               ; encoding: [0x20,0x14,0x00,0x4f]
+; CHECK: orr.4s v0, #1, lsl #8       ; encoding: [0x20,0x34,0x00,0x4f]
+; CHECK: orr.4s v0, #1, lsl #16      ; encoding: [0x20,0x54,0x00,0x4f]
+; CHECK: orr.4s v0, #1, lsl #24      ; encoding: [0x20,0x74,0x00,0x4f]
+
+  orr.8h  v0, #1
+  orr.8h  v0, #1, lsl #0
+  orr.8h  v0, #1, lsl #8
+
+; CHECK: orr.8h v0, #1               ; encoding: [0x20,0x94,0x00,0x4f]
+; CHECK: orr.8h v0, #1               ; encoding: [0x20,0x94,0x00,0x4f]
+; CHECK: orr.8h v0, #1, lsl #8       ; encoding: [0x20,0xb4,0x00,0x4f]
+
+  movi     d0, #0x000000000000ff
+  movi.2d  v0, #0x000000000000ff
+
+; CHECK: movi     d0, #0x000000000000ff ; encoding: [0x20,0xe4,0x00,0x2f]
+; CHECK: movi.2d  v0, #0x000000000000ff ; encoding: [0x20,0xe4,0x00,0x6f]
+
+  movi.2s v0, #1
+  movi.2s v0, #1, lsl #0
+  movi.2s v0, #1, lsl #8
+  movi.2s v0, #1, lsl #16
+  movi.2s v0, #1, lsl #24
+
+; CHECK: movi.2s v0, #1              ; encoding: [0x20,0x04,0x00,0x0f]
+; CHECK: movi.2s v0, #1              ; encoding: [0x20,0x04,0x00,0x0f]
+; CHECK: movi.2s v0, #1, lsl #8      ; encoding: [0x20,0x24,0x00,0x0f]
+; CHECK: movi.2s v0, #1, lsl #16     ; encoding: [0x20,0x44,0x00,0x0f]
+; CHECK: movi.2s v0, #1, lsl #24     ; encoding: [0x20,0x64,0x00,0x0f]
+
+  movi.4s v0, #1
+  movi.4s v0, #1, lsl #0
+  movi.4s v0, #1, lsl #8
+  movi.4s v0, #1, lsl #16
+  movi.4s v0, #1, lsl #24
+
+; CHECK: movi.4s v0, #1              ; encoding: [0x20,0x04,0x00,0x4f]
+; CHECK: movi.4s v0, #1              ; encoding: [0x20,0x04,0x00,0x4f]
+; CHECK: movi.4s v0, #1, lsl #8      ; encoding: [0x20,0x24,0x00,0x4f]
+; CHECK: movi.4s v0, #1, lsl #16     ; encoding: [0x20,0x44,0x00,0x4f]
+; CHECK: movi.4s v0, #1, lsl #24     ; encoding: [0x20,0x64,0x00,0x4f]
+
+  movi.4h v0, #1
+  movi.4h v0, #1, lsl #0
+  movi.4h v0, #1, lsl #8
+
+; CHECK: movi.4h v0, #1              ; encoding: [0x20,0x84,0x00,0x0f]
+; CHECK: movi.4h v0, #1              ; encoding: [0x20,0x84,0x00,0x0f]
+; CHECK: movi.4h v0, #1, lsl #8      ; encoding: [0x20,0xa4,0x00,0x0f]
+
+  movi.8h v0, #1
+  movi.8h v0, #1, lsl #0
+  movi.8h v0, #1, lsl #8
+
+; CHECK: movi.8h v0, #1              ; encoding: [0x20,0x84,0x00,0x4f]
+; CHECK: movi.8h v0, #1              ; encoding: [0x20,0x84,0x00,0x4f]
+; CHECK: movi.8h v0, #1, lsl #8      ; encoding: [0x20,0xa4,0x00,0x4f]
+
+  movi.2s v0, #1, msl #8
+  movi.2s v0, #1, msl #16
+  movi.4s v0, #1, msl #8
+  movi.4s v0, #1, msl #16
+
+; CHECK: movi.2s v0, #1, msl #8      ; encoding: [0x20,0xc4,0x00,0x0f]
+; CHECK: movi.2s v0, #1, msl #16     ; encoding: [0x20,0xd4,0x00,0x0f]
+; CHECK: movi.4s v0, #1, msl #8      ; encoding: [0x20,0xc4,0x00,0x4f]
+; CHECK: movi.4s v0, #1, msl #16     ; encoding: [0x20,0xd4,0x00,0x4f]
+
+  movi.8b  v0, #1
+  movi.16b v0, #1
+
+; CHECK: movi.8b  v0, #1             ; encoding: [0x20,0xe4,0x00,0x0f]
+; CHECK: movi.16b v0, #1             ; encoding: [0x20,0xe4,0x00,0x4f]
+
+  mvni.2s v0, #1
+  mvni.2s v0, #1, lsl #0
+  mvni.2s v0, #1, lsl #8
+  mvni.2s v0, #1, lsl #16
+  mvni.2s v0, #1, lsl #24
+
+; CHECK: mvni.2s v0, #1              ; encoding: [0x20,0x04,0x00,0x2f]
+; CHECK: mvni.2s v0, #1              ; encoding: [0x20,0x04,0x00,0x2f]
+; CHECK: mvni.2s v0, #1, lsl #8      ; encoding: [0x20,0x24,0x00,0x2f]
+; CHECK: mvni.2s v0, #1, lsl #16     ; encoding: [0x20,0x44,0x00,0x2f]
+; CHECK: mvni.2s v0, #1, lsl #24     ; encoding: [0x20,0x64,0x00,0x2f]
+
+  mvni.4s v0, #1
+  mvni.4s v0, #1, lsl #0
+  mvni.4s v0, #1, lsl #8
+  mvni.4s v0, #1, lsl #16
+  mvni.4s v0, #1, lsl #24
+
+; CHECK: mvni.4s v0, #1              ; encoding: [0x20,0x04,0x00,0x6f]
+; CHECK: mvni.4s v0, #1              ; encoding: [0x20,0x04,0x00,0x6f]
+; CHECK: mvni.4s v0, #1, lsl #8      ; encoding: [0x20,0x24,0x00,0x6f]
+; CHECK: mvni.4s v0, #1, lsl #16     ; encoding: [0x20,0x44,0x00,0x6f]
+; CHECK: mvni.4s v0, #1, lsl #24     ; encoding: [0x20,0x64,0x00,0x6f]
+
+  mvni.4h v0, #1
+  mvni.4h v0, #1, lsl #0
+  mvni.4h v0, #1, lsl #8
+
+; CHECK: mvni.4h v0, #1              ; encoding: [0x20,0x84,0x00,0x2f]
+; CHECK: mvni.4h v0, #1              ; encoding: [0x20,0x84,0x00,0x2f]
+; CHECK: mvni.4h v0, #1, lsl #8      ; encoding: [0x20,0xa4,0x00,0x2f]
+
+  mvni.8h v0, #1
+  mvni.8h v0, #1, lsl #0
+  mvni.8h v0, #1, lsl #8
+
+; CHECK: mvni.8h v0, #1              ; encoding: [0x20,0x84,0x00,0x6f]
+; CHECK: mvni.8h v0, #1              ; encoding: [0x20,0x84,0x00,0x6f]
+; CHECK: mvni.8h v0, #1, lsl #8      ; encoding: [0x20,0xa4,0x00,0x6f]
+
+  mvni.2s v0, #1, msl #8
+  mvni.2s v0, #1, msl #16
+  mvni.4s v0, #1, msl #8
+  mvni.4s v0, #1, msl #16
+
+; CHECK: mvni.2s v0, #1, msl #8      ; encoding: [0x20,0xc4,0x00,0x2f]
+; CHECK: mvni.2s v0, #1, msl #16     ; encoding: [0x20,0xd4,0x00,0x2f]
+; CHECK: mvni.4s v0, #1, msl #8      ; encoding: [0x20,0xc4,0x00,0x6f]
+; CHECK: mvni.4s v0, #1, msl #16     ; encoding: [0x20,0xd4,0x00,0x6f]
+
+;===-------------------------------------------------------------------------===
+; AdvSIMD scalar x index
+;===-------------------------------------------------------------------------===
+
+  fmla.s  s0, s0, v0[3]
+  fmla.d  d0, d0, v0[1]
+  fmls.s  s0, s0, v0[3]
+  fmls.d  d0, d0, v0[1]
+  fmulx.s s0, s0, v0[3]
+  fmulx.d d0, d0, v0[1]
+  fmul.s  s0, s0, v0[3]
+  fmul.d  d0, d0, v0[1]
+  sqdmlal.h s0, h0, v0[7]
+  sqdmlal.s d0, s0, v0[3]
+  sqdmlsl.h s0, h0, v0[7]
+  sqdmulh.h h0, h0, v0[7]
+  sqdmulh.s s0, s0, v0[3]
+  sqdmull.h s0, h0, v0[7]
+  sqdmull.s d0, s0, v0[3]
+  sqrdmulh.h  h0, h0, v0[7]
+  sqrdmulh.s  s0, s0, v0[3]
+
+; CHECK: fmla.s	s0, s0, v0[3]           ; encoding: [0x00,0x18,0xa0,0x5f]
+; CHECK: fmla.d	d0, d0, v0[1]           ; encoding: [0x00,0x18,0xc0,0x5f]
+; CHECK: fmls.s	s0, s0, v0[3]           ; encoding: [0x00,0x58,0xa0,0x5f]
+; CHECK: fmls.d	d0, d0, v0[1]           ; encoding: [0x00,0x58,0xc0,0x5f]
+; CHECK: fmulx.s	s0, s0, v0[3]           ; encoding: [0x00,0x98,0xa0,0x7f]
+; CHECK: fmulx.d	d0, d0, v0[1]           ; encoding: [0x00,0x98,0xc0,0x7f]
+; CHECK: fmul.s	s0, s0, v0[3]           ; encoding: [0x00,0x98,0xa0,0x5f]
+; CHECK: fmul.d	d0, d0, v0[1]           ; encoding: [0x00,0x98,0xc0,0x5f]
+; CHECK: sqdmlal.h	s0, h0, v0[7]   ; encoding: [0x00,0x38,0x70,0x5f]
+; CHECK: sqdmlal.s	d0, s0, v0[3]   ; encoding: [0x00,0x38,0xa0,0x5f]
+; CHECK: sqdmlsl.h	s0, h0, v0[7]   ; encoding: [0x00,0x78,0x70,0x5f]
+; CHECK: sqdmulh.h	h0, h0, v0[7]   ; encoding: [0x00,0xc8,0x70,0x5f]
+; CHECK: sqdmulh.s	s0, s0, v0[3]   ; encoding: [0x00,0xc8,0xa0,0x5f]
+; CHECK: sqdmull.h	s0, h0, v0[7]   ; encoding: [0x00,0xb8,0x70,0x5f]
+; CHECK: sqdmull.s	d0, s0, v0[3]   ; encoding: [0x00,0xb8,0xa0,0x5f]
+; CHECK: sqrdmulh.h	h0, h0, v0[7]   ; encoding: [0x00,0xd8,0x70,0x5f]
+; CHECK: sqrdmulh.s	s0, s0, v0[3]   ; encoding: [0x00,0xd8,0xa0,0x5f]
+
+;===-------------------------------------------------------------------------===
+; AdvSIMD SMLAL
+;===-------------------------------------------------------------------------===
+        smlal.8h v1, v2, v3
+        smlal.4s v1, v2, v3
+        smlal.2d v1, v2, v3
+        smlal2.8h v1, v2, v3
+        smlal2.4s v1, v2, v3
+        smlal2.2d v1, v2, v3
+
+        smlal v13.8h, v8.8b, v0.8b
+        smlal v13.4s, v8.4h, v0.4h
+        smlal v13.2d, v8.2s, v0.2s
+        smlal2 v13.8h, v8.16b, v0.16b
+        smlal2 v13.4s, v8.8h, v0.8h
+        smlal2 v13.2d, v8.4s, v0.4s
+
+; CHECK: smlal.8h	v1, v2, v3      ; encoding: [0x41,0x80,0x23,0x0e]
+; CHECK: smlal.4s	v1, v2, v3      ; encoding: [0x41,0x80,0x63,0x0e]
+; CHECK: smlal.2d	v1, v2, v3      ; encoding: [0x41,0x80,0xa3,0x0e]
+; CHECK: smlal2.8h	v1, v2, v3      ; encoding: [0x41,0x80,0x23,0x4e]
+; CHECK: smlal2.4s	v1, v2, v3      ; encoding: [0x41,0x80,0x63,0x4e]
+; CHECK: smlal2.2d	v1, v2, v3      ; encoding: [0x41,0x80,0xa3,0x4e]
+; CHECK: smlal.8h	v13, v8, v0     ; encoding: [0x0d,0x81,0x20,0x0e]
+; CHECK: smlal.4s	v13, v8, v0     ; encoding: [0x0d,0x81,0x60,0x0e]
+; CHECK: smlal.2d	v13, v8, v0     ; encoding: [0x0d,0x81,0xa0,0x0e]
+; CHECK: smlal2.8h	v13, v8, v0     ; encoding: [0x0d,0x81,0x20,0x4e]
+; CHECK: smlal2.4s	v13, v8, v0     ; encoding: [0x0d,0x81,0x60,0x4e]
+; CHECK: smlal2.2d	v13, v8, v0     ; encoding: [0x0d,0x81,0xa0,0x4e]
+
+
+;===-------------------------------------------------------------------------===
+; AdvSIMD scalar x index
+;===-------------------------------------------------------------------------===
+
+  fmla.2s v0, v0, v0[0]
+  fmla.4s v0, v0, v0[1]
+  fmla.2d v0, v0, v0[1]
+  fmls.2s v0, v0, v0[0]
+  fmls.4s v0, v0, v0[1]
+  fmls.2d v0, v0, v0[1]
+  fmulx.2s  v0, v0, v0[0]
+  fmulx.4s  v0, v0, v0[1]
+  fmulx.2d  v0, v0, v0[1]
+  fmul.2s v0, v0, v0[0]
+  fmul.4s v0, v0, v0[1]
+  fmul.2d v0, v0, v0[1]
+  mla.4h  v0, v0, v0[0]
+  mla.8h  v0, v0, v0[1]
+  mla.2s  v0, v0, v0[2]
+  mla.4s  v0, v0, v0[3]
+  mls.4h  v0, v0, v0[0]
+  mls.8h  v0, v0, v0[1]
+  mls.2s  v0, v0, v0[2]
+  mls.4s  v0, v0, v0[3]
+  mul.4h  v0, v0, v0[0]
+  mul.8h  v0, v0, v0[1]
+  mul.2s  v0, v0, v0[2]
+  mul.4s  v0, v0, v0[3]
+  smlal.4s  v0, v0, v0[0]
+  smlal2.4s v0, v0, v0[1]
+  smlal.2d  v0, v0, v0[2]
+  smlal2.2d v0, v0, v0[3]
+  smlsl.4s  v0, v0, v0[0]
+  smlsl2.4s v0, v0, v0[1]
+  smlsl.2d  v0, v0, v0[2]
+  smlsl2.2d v0, v0, v0[3]
+  smull.4s  v0, v0, v0[0]
+  smull2.4s v0, v0, v0[1]
+  smull.2d  v0, v0, v0[2]
+  smull2.2d v0, v0, v0[3]
+  sqdmlal.4s  v0, v0, v0[0]
+  sqdmlal2.4s v0, v0, v0[1]
+  sqdmlal.2d  v0, v0, v0[2]
+  sqdmlal2.2d v0, v0, v0[3]
+  sqdmlsl.4s  v0, v0, v0[0]
+  sqdmlsl2.4s v0, v0, v0[1]
+  sqdmlsl.2d  v0, v0, v0[2]
+  sqdmlsl2.2d v0, v0, v0[3]
+  sqdmulh.4h  v0, v0, v0[0]
+  sqdmulh.8h  v0, v0, v0[1]
+  sqdmulh.2s  v0, v0, v0[2]
+  sqdmulh.4s  v0, v0, v0[3]
+  sqdmull.4s  v0, v0, v0[0]
+  sqdmull2.4s v0, v0, v0[1]
+  sqdmull.2d  v0, v0, v0[2]
+  sqdmull2.2d v0, v0, v0[3]
+  sqrdmulh.4h v0, v0, v0[0]
+  sqrdmulh.8h v0, v0, v0[1]
+  sqrdmulh.2s v0, v0, v0[2]
+  sqrdmulh.4s v0, v0, v0[3]
+  umlal.4s  v0, v0, v0[0]
+  umlal2.4s v0, v0, v0[1]
+  umlal.2d  v0, v0, v0[2]
+  umlal2.2d v0, v0, v0[3]
+  umlsl.4s  v0, v0, v0[0]
+  umlsl2.4s v0, v0, v0[1]
+  umlsl.2d  v0, v0, v0[2]
+  umlsl2.2d v0, v0, v0[3]
+  umull.4s  v0, v0, v0[0]
+  umull2.4s v0, v0, v0[1]
+  umull.2d  v0, v0, v0[2]
+  umull2.2d v0, v0, v0[3]
+
+; CHECK: fmla.2s	v0, v0, v0[0]           ; encoding: [0x00,0x10,0x80,0x0f]
+; CHECK: fmla.4s	v0, v0, v0[1]           ; encoding: [0x00,0x10,0xa0,0x4f]
+; CHECK: fmla.2d	v0, v0, v0[1]           ; encoding: [0x00,0x18,0xc0,0x4f]
+; CHECK: fmls.2s	v0, v0, v0[0]           ; encoding: [0x00,0x50,0x80,0x0f]
+; CHECK: fmls.4s	v0, v0, v0[1]           ; encoding: [0x00,0x50,0xa0,0x4f]
+; CHECK: fmls.2d	v0, v0, v0[1]           ; encoding: [0x00,0x58,0xc0,0x4f]
+; CHECK: fmulx.2s	v0, v0, v0[0]   ; encoding: [0x00,0x90,0x80,0x2f]
+; CHECK: fmulx.4s	v0, v0, v0[1]   ; encoding: [0x00,0x90,0xa0,0x6f]
+; CHECK: fmulx.2d	v0, v0, v0[1]   ; encoding: [0x00,0x98,0xc0,0x6f]
+; CHECK: fmul.2s	v0, v0, v0[0]           ; encoding: [0x00,0x90,0x80,0x0f]
+; CHECK: fmul.4s	v0, v0, v0[1]           ; encoding: [0x00,0x90,0xa0,0x4f]
+; CHECK: fmul.2d	v0, v0, v0[1]           ; encoding: [0x00,0x98,0xc0,0x4f]
+; CHECK: mla.4h	v0, v0, v0[0]           ; encoding: [0x00,0x00,0x40,0x2f]
+; CHECK: mla.8h	v0, v0, v0[1]           ; encoding: [0x00,0x00,0x50,0x6f]
+; CHECK: mla.2s	v0, v0, v0[2]           ; encoding: [0x00,0x08,0x80,0x2f]
+; CHECK: mla.4s	v0, v0, v0[3]           ; encoding: [0x00,0x08,0xa0,0x6f]
+; CHECK: mls.4h	v0, v0, v0[0]           ; encoding: [0x00,0x40,0x40,0x2f]
+; CHECK: mls.8h	v0, v0, v0[1]           ; encoding: [0x00,0x40,0x50,0x6f]
+; CHECK: mls.2s	v0, v0, v0[2]           ; encoding: [0x00,0x48,0x80,0x2f]
+; CHECK: mls.4s	v0, v0, v0[3]           ; encoding: [0x00,0x48,0xa0,0x6f]
+; CHECK: mul.4h	v0, v0, v0[0]           ; encoding: [0x00,0x80,0x40,0x0f]
+; CHECK: mul.8h	v0, v0, v0[1]           ; encoding: [0x00,0x80,0x50,0x4f]
+; CHECK: mul.2s	v0, v0, v0[2]           ; encoding: [0x00,0x88,0x80,0x0f]
+; CHECK: mul.4s	v0, v0, v0[3]           ; encoding: [0x00,0x88,0xa0,0x4f]
+; CHECK: smlal.4s	v0, v0, v0[0]   ; encoding: [0x00,0x20,0x40,0x0f]
+; CHECK: smlal2.4s	v0, v0, v0[1]   ; encoding: [0x00,0x20,0x50,0x4f]
+; CHECK: smlal.2d	v0, v0, v0[2]   ; encoding: [0x00,0x28,0x80,0x0f]
+; CHECK: smlal2.2d	v0, v0, v0[3]   ; encoding: [0x00,0x28,0xa0,0x4f]
+; CHECK: smlsl.4s	v0, v0, v0[0]   ; encoding: [0x00,0x60,0x40,0x0f]
+; CHECK: smlsl2.4s	v0, v0, v0[1]   ; encoding: [0x00,0x60,0x50,0x4f]
+; CHECK: smlsl.2d	v0, v0, v0[2]   ; encoding: [0x00,0x68,0x80,0x0f]
+; CHECK: smlsl2.2d	v0, v0, v0[3]   ; encoding: [0x00,0x68,0xa0,0x4f]
+; CHECK: smull.4s	v0, v0, v0[0]   ; encoding: [0x00,0xa0,0x40,0x0f]
+; CHECK: smull2.4s	v0, v0, v0[1]   ; encoding: [0x00,0xa0,0x50,0x4f]
+; CHECK: smull.2d	v0, v0, v0[2]   ; encoding: [0x00,0xa8,0x80,0x0f]
+; CHECK: smull2.2d	v0, v0, v0[3]   ; encoding: [0x00,0xa8,0xa0,0x4f]
+; CHECK: sqdmlal.4s	v0, v0, v0[0]   ; encoding: [0x00,0x30,0x40,0x0f]
+; CHECK: sqdmlal2.4s	v0, v0, v0[1]   ; encoding: [0x00,0x30,0x50,0x4f]
+; CHECK: sqdmlal.2d	v0, v0, v0[2]   ; encoding: [0x00,0x38,0x80,0x0f]
+; CHECK: sqdmlal2.2d	v0, v0, v0[3]   ; encoding: [0x00,0x38,0xa0,0x4f]
+; CHECK: sqdmlsl.4s	v0, v0, v0[0]   ; encoding: [0x00,0x70,0x40,0x0f]
+; CHECK: sqdmlsl2.4s	v0, v0, v0[1]   ; encoding: [0x00,0x70,0x50,0x4f]
+; CHECK: sqdmlsl.2d	v0, v0, v0[2]   ; encoding: [0x00,0x78,0x80,0x0f]
+; CHECK: sqdmlsl2.2d	v0, v0, v0[3]   ; encoding: [0x00,0x78,0xa0,0x4f]
+; CHECK: sqdmulh.4h	v0, v0, v0[0]   ; encoding: [0x00,0xc0,0x40,0x0f]
+; CHECK: sqdmulh.8h	v0, v0, v0[1]   ; encoding: [0x00,0xc0,0x50,0x4f]
+; CHECK: sqdmulh.2s	v0, v0, v0[2]   ; encoding: [0x00,0xc8,0x80,0x0f]
+; CHECK: sqdmulh.4s	v0, v0, v0[3]   ; encoding: [0x00,0xc8,0xa0,0x4f]
+; CHECK: sqdmull.4s	v0, v0, v0[0]   ; encoding: [0x00,0xb0,0x40,0x0f]
+; CHECK: sqdmull2.4s	v0, v0, v0[1]   ; encoding: [0x00,0xb0,0x50,0x4f]
+; CHECK: sqdmull.2d	v0, v0, v0[2]   ; encoding: [0x00,0xb8,0x80,0x0f]
+; CHECK: sqdmull2.2d	v0, v0, v0[3]   ; encoding: [0x00,0xb8,0xa0,0x4f]
+; CHECK: sqrdmulh.4h	v0, v0, v0[0]   ; encoding: [0x00,0xd0,0x40,0x0f]
+; CHECK: sqrdmulh.8h	v0, v0, v0[1]   ; encoding: [0x00,0xd0,0x50,0x4f]
+; CHECK: sqrdmulh.2s	v0, v0, v0[2]   ; encoding: [0x00,0xd8,0x80,0x0f]
+; CHECK: sqrdmulh.4s	v0, v0, v0[3]   ; encoding: [0x00,0xd8,0xa0,0x4f]
+; CHECK: umlal.4s	v0, v0, v0[0]   ; encoding: [0x00,0x20,0x40,0x2f]
+; CHECK: umlal2.4s	v0, v0, v0[1]   ; encoding: [0x00,0x20,0x50,0x6f]
+; CHECK: umlal.2d	v0, v0, v0[2]   ; encoding: [0x00,0x28,0x80,0x2f]
+; CHECK: umlal2.2d	v0, v0, v0[3]   ; encoding: [0x00,0x28,0xa0,0x6f]
+; CHECK: umlsl.4s	v0, v0, v0[0]   ; encoding: [0x00,0x60,0x40,0x2f]
+; CHECK: umlsl2.4s	v0, v0, v0[1]   ; encoding: [0x00,0x60,0x50,0x6f]
+; CHECK: umlsl.2d	v0, v0, v0[2]   ; encoding: [0x00,0x68,0x80,0x2f]
+; CHECK: umlsl2.2d	v0, v0, v0[3]   ; encoding: [0x00,0x68,0xa0,0x6f]
+; CHECK: umull.4s	v0, v0, v0[0]   ; encoding: [0x00,0xa0,0x40,0x2f]
+; CHECK: umull2.4s	v0, v0, v0[1]   ; encoding: [0x00,0xa0,0x50,0x6f]
+; CHECK: umull.2d	v0, v0, v0[2]   ; encoding: [0x00,0xa8,0x80,0x2f]
+; CHECK: umull2.2d	v0, v0, v0[3]   ; encoding: [0x00,0xa8,0xa0,0x6f]
+
+
+;===-------------------------------------------------------------------------===
+; AdvSIMD scalar with shift
+;===-------------------------------------------------------------------------===
+
+  fcvtzs s0, s0, #1
+  fcvtzs d0, d0, #2
+  fcvtzu s0, s0, #1
+  fcvtzu d0, d0, #2
+  shl    d0, d0, #1
+  sli    d0, d0, #1
+  sqrshrn b0, h0, #1
+  sqrshrn h0, s0, #2
+  sqrshrn s0, d0, #3
+  sqrshrun b0, h0, #1
+  sqrshrun h0, s0, #2
+  sqrshrun s0, d0, #3
+  sqshlu  b0, b0, #1
+  sqshlu  h0, h0, #2
+  sqshlu  s0, s0, #3
+  sqshlu  d0, d0, #4
+  sqshl   b0, b0, #1
+  sqshl   h0, h0, #2
+  sqshl   s0, s0, #3
+  sqshl   d0, d0, #4
+  sqshrn  b0, h0, #1
+  sqshrn  h0, s0, #2
+  sqshrn  s0, d0, #3
+  sqshrun b0, h0, #1
+  sqshrun h0, s0, #2
+  sqshrun s0, d0, #3
+  sri     d0, d0, #1
+  srshr   d0, d0, #1
+  srsra   d0, d0, #1
+  sshr    d0, d0, #1
+  ucvtf   s0, s0, #1
+  ucvtf   d0, d0, #2
+  scvtf   s0, s0, #1
+  scvtf   d0, d0, #2
+  uqrshrn b0, h0, #1
+  uqrshrn h0, s0, #2
+  uqrshrn s0, d0, #3
+  uqshl   b0, b0, #1
+  uqshl   h0, h0, #2
+  uqshl   s0, s0, #3
+  uqshl   d0, d0, #4
+  uqshrn  b0, h0, #1
+  uqshrn  h0, s0, #2
+  uqshrn  s0, d0, #3
+  urshr   d0, d0, #1
+  ursra   d0, d0, #1
+  ushr    d0, d0, #1
+  usra    d0, d0, #1
+
+; CHECK: fcvtzs	s0, s0, #1              ; encoding: [0x00,0xfc,0x3f,0x5f]
+; CHECK: fcvtzs	d0, d0, #2              ; encoding: [0x00,0xfc,0x7e,0x5f]
+; CHECK: fcvtzu	s0, s0, #1              ; encoding: [0x00,0xfc,0x3f,0x7f]
+; CHECK: fcvtzu	d0, d0, #2              ; encoding: [0x00,0xfc,0x7e,0x7f]
+; CHECK: shl	d0, d0, #1              ; encoding: [0x00,0x54,0x41,0x5f]
+; CHECK: sli	d0, d0, #1              ; encoding: [0x00,0x54,0x41,0x7f]
+; CHECK: sqrshrn	b0, h0, #1              ; encoding: [0x00,0x9c,0x0f,0x5f]
+; CHECK: sqrshrn	h0, s0, #2              ; encoding: [0x00,0x9c,0x1e,0x5f]
+; CHECK: sqrshrn	s0, d0, #3              ; encoding: [0x00,0x9c,0x3d,0x5f]
+; CHECK: sqrshrun	b0, h0, #1      ; encoding: [0x00,0x8c,0x0f,0x7f]
+; CHECK: sqrshrun	h0, s0, #2      ; encoding: [0x00,0x8c,0x1e,0x7f]
+; CHECK: sqrshrun	s0, d0, #3      ; encoding: [0x00,0x8c,0x3d,0x7f]
+; CHECK: sqshlu	b0, b0, #1              ; encoding: [0x00,0x64,0x09,0x7f]
+; CHECK: sqshlu	h0, h0, #2              ; encoding: [0x00,0x64,0x12,0x7f]
+; CHECK: sqshlu	s0, s0, #3              ; encoding: [0x00,0x64,0x23,0x7f]
+; CHECK: sqshlu	d0, d0, #4              ; encoding: [0x00,0x64,0x44,0x7f]
+; CHECK: sqshl	b0, b0, #1              ; encoding: [0x00,0x74,0x09,0x5f]
+; CHECK: sqshl	h0, h0, #2              ; encoding: [0x00,0x74,0x12,0x5f]
+; CHECK: sqshl	s0, s0, #3              ; encoding: [0x00,0x74,0x23,0x5f]
+; CHECK: sqshl	d0, d0, #4              ; encoding: [0x00,0x74,0x44,0x5f]
+; CHECK: sqshrn	b0, h0, #1              ; encoding: [0x00,0x94,0x0f,0x5f]
+; CHECK: sqshrn	h0, s0, #2              ; encoding: [0x00,0x94,0x1e,0x5f]
+; CHECK: sqshrn	s0, d0, #3              ; encoding: [0x00,0x94,0x3d,0x5f]
+; CHECK: sqshrun	b0, h0, #1              ; encoding: [0x00,0x84,0x0f,0x7f]
+; CHECK: sqshrun	h0, s0, #2              ; encoding: [0x00,0x84,0x1e,0x7f]
+; CHECK: sqshrun	s0, d0, #3              ; encoding: [0x00,0x84,0x3d,0x7f]
+; CHECK: sri	d0, d0, #1              ; encoding: [0x00,0x44,0x7f,0x7f]
+; CHECK: srshr	d0, d0, #1              ; encoding: [0x00,0x24,0x7f,0x5f]
+; CHECK: srsra	d0, d0, #1              ; encoding: [0x00,0x34,0x7f,0x5f]
+; CHECK: sshr	d0, d0, #1              ; encoding: [0x00,0x04,0x7f,0x5f]
+; CHECK: ucvtf	s0, s0, #1              ; encoding: [0x00,0xe4,0x3f,0x7f]
+; CHECK: ucvtf	d0, d0, #2              ; encoding: [0x00,0xe4,0x7e,0x7f]
+; check: scvtf  s0, s0, #1              ; encoding: [0x00,0xe4,0x3f,0x5f]
+; check: scvtf  d0, d0, #2              ; encoding: [0x00,0xe4,0x7e,0x5f]
+; CHECK: uqrshrn	b0, h0, #1              ; encoding: [0x00,0x9c,0x0f,0x7f]
+; CHECK: uqrshrn	h0, s0, #2              ; encoding: [0x00,0x9c,0x1e,0x7f]
+; CHECK: uqrshrn	s0, d0, #3              ; encoding: [0x00,0x9c,0x3d,0x7f]
+; CHECK: uqshl	b0, b0, #1              ; encoding: [0x00,0x74,0x09,0x7f]
+; CHECK: uqshl	h0, h0, #2              ; encoding: [0x00,0x74,0x12,0x7f]
+; CHECK: uqshl	s0, s0, #3              ; encoding: [0x00,0x74,0x23,0x7f]
+; CHECK: uqshl	d0, d0, #4              ; encoding: [0x00,0x74,0x44,0x7f]
+; CHECK: uqshrn	b0, h0, #1              ; encoding: [0x00,0x94,0x0f,0x7f]
+; CHECK: uqshrn	h0, s0, #2              ; encoding: [0x00,0x94,0x1e,0x7f]
+; CHECK: uqshrn	s0, d0, #3              ; encoding: [0x00,0x94,0x3d,0x7f]
+; CHECK: urshr	d0, d0, #1              ; encoding: [0x00,0x24,0x7f,0x7f]
+; CHECK: ursra	d0, d0, #1              ; encoding: [0x00,0x34,0x7f,0x7f]
+; CHECK: ushr	d0, d0, #1              ; encoding: [0x00,0x04,0x7f,0x7f]
+; CHECK: usra	d0, d0, #1              ; encoding: [0x00,0x14,0x7f,0x7f]
+
+
+;===-------------------------------------------------------------------------===
+; AdvSIMD vector with shift
+;===-------------------------------------------------------------------------===
+
+   fcvtzs.2s v0, v0, #1
+   fcvtzs.4s v0, v0, #2
+   fcvtzs.2d v0, v0, #3
+   fcvtzu.2s v0, v0, #1
+   fcvtzu.4s v0, v0, #2
+   fcvtzu.2d v0, v0, #3
+   rshrn.8b v0, v0, #1
+   rshrn2.16b v0, v0, #2
+   rshrn.4h v0, v0, #3
+   rshrn2.8h v0, v0, #4
+   rshrn.2s v0, v0, #5
+   rshrn2.4s v0, v0, #6
+   scvtf.2s v0, v0, #1
+   scvtf.4s v0, v0, #2
+   scvtf.2d v0, v0, #3
+   shl.8b v0, v0, #1
+   shl.16b v0, v0, #2
+   shl.4h v0, v0, #3
+   shl.8h v0, v0, #4
+   shl.2s v0, v0, #5
+   shl.4s v0, v0, #6
+   shl.2d v0, v0, #7
+   shrn.8b v0, v0, #1
+   shrn2.16b v0, v0, #2
+   shrn.4h v0, v0, #3
+   shrn2.8h v0, v0, #4
+   shrn.2s v0, v0, #5
+   shrn2.4s v0, v0, #6
+   sli.8b v0, v0, #1
+   sli.16b v0, v0, #2
+   sli.4h v0, v0, #3
+   sli.8h v0, v0, #4
+   sli.2s v0, v0, #5
+   sli.4s v0, v0, #6
+   sli.2d v0, v0, #7
+   sqrshrn.8b v0, v0, #1
+   sqrshrn2.16b v0, v0, #2
+   sqrshrn.4h v0, v0, #3
+   sqrshrn2.8h v0, v0, #4
+   sqrshrn.2s v0, v0, #5
+   sqrshrn2.4s v0, v0, #6
+   sqrshrun.8b v0, v0, #1
+   sqrshrun2.16b v0, v0, #2
+   sqrshrun.4h v0, v0, #3
+   sqrshrun2.8h v0, v0, #4
+   sqrshrun.2s v0, v0, #5
+   sqrshrun2.4s v0, v0, #6
+   sqshlu.8b v0, v0, #1
+   sqshlu.16b v0, v0, #2
+   sqshlu.4h v0, v0, #3
+   sqshlu.8h v0, v0, #4
+   sqshlu.2s v0, v0, #5
+   sqshlu.4s v0, v0, #6
+   sqshlu.2d v0, v0, #7
+   sqshl.8b v0, v0, #1
+   sqshl.16b v0, v0, #2
+   sqshl.4h v0, v0, #3
+   sqshl.8h v0, v0, #4
+   sqshl.2s v0, v0, #5
+   sqshl.4s v0, v0, #6
+   sqshl.2d v0, v0, #7
+   sqshrn.8b v0, v0, #1
+   sqshrn2.16b v0, v0, #2
+   sqshrn.4h v0, v0, #3
+   sqshrn2.8h v0, v0, #4
+   sqshrn.2s v0, v0, #5
+   sqshrn2.4s v0, v0, #6
+   sqshrun.8b v0, v0, #1
+   sqshrun2.16b v0, v0, #2
+   sqshrun.4h v0, v0, #3
+   sqshrun2.8h v0, v0, #4
+   sqshrun.2s v0, v0, #5
+   sqshrun2.4s v0, v0, #6
+   sri.8b v0, v0, #1
+   sri.16b v0, v0, #2
+   sri.4h v0, v0, #3
+   sri.8h v0, v0, #4
+   sri.2s v0, v0, #5
+   sri.4s v0, v0, #6
+   sri.2d v0, v0, #7
+   srshr.8b v0, v0, #1
+   srshr.16b v0, v0, #2
+   srshr.4h v0, v0, #3
+   srshr.8h v0, v0, #4
+   srshr.2s v0, v0, #5
+   srshr.4s v0, v0, #6
+   srshr.2d v0, v0, #7
+   srsra.8b v0, v0, #1
+   srsra.16b v0, v0, #2
+   srsra.4h v0, v0, #3
+   srsra.8h v0, v0, #4
+   srsra.2s v0, v0, #5
+   srsra.4s v0, v0, #6
+   srsra.2d v0, v0, #7
+   sshll.8h v0, v0, #1
+   sshll2.8h v0, v0, #2
+   sshll.4s v0, v0, #3
+   sshll2.4s v0, v0, #4
+   sshll.2d v0, v0, #5
+   sshll2.2d v0, v0, #6
+   sshr.8b v0, v0, #1
+   sshr.16b v0, v0, #2
+   sshr.4h v0, v0, #3
+   sshr.8h v0, v0, #4
+   sshr.2s v0, v0, #5
+   sshr.4s v0, v0, #6
+   sshr.2d v0, v0, #7
+   sshr.8b v0, v0, #1
+   ssra.16b v0, v0, #2
+   ssra.4h v0, v0, #3
+   ssra.8h v0, v0, #4
+   ssra.2s v0, v0, #5
+   ssra.4s v0, v0, #6
+   ssra.2d v0, v0, #7
+   ssra d0, d0, #64
+   ucvtf.2s v0, v0, #1
+   ucvtf.4s v0, v0, #2
+   ucvtf.2d v0, v0, #3
+   uqrshrn.8b v0, v0, #1
+   uqrshrn2.16b v0, v0, #2
+   uqrshrn.4h v0, v0, #3
+   uqrshrn2.8h v0, v0, #4
+   uqrshrn.2s v0, v0, #5
+   uqrshrn2.4s v0, v0, #6
+   uqshl.8b v0, v0, #1
+   uqshl.16b v0, v0, #2
+   uqshl.4h v0, v0, #3
+   uqshl.8h v0, v0, #4
+   uqshl.2s v0, v0, #5
+   uqshl.4s v0, v0, #6
+   uqshl.2d v0, v0, #7
+   uqshrn.8b v0, v0, #1
+   uqshrn2.16b v0, v0, #2
+   uqshrn.4h v0, v0, #3
+   uqshrn2.8h v0, v0, #4
+   uqshrn.2s v0, v0, #5
+   uqshrn2.4s v0, v0, #6
+   urshr.8b v0, v0, #1
+   urshr.16b v0, v0, #2
+   urshr.4h v0, v0, #3
+   urshr.8h v0, v0, #4
+   urshr.2s v0, v0, #5
+   urshr.4s v0, v0, #6
+   urshr.2d v0, v0, #7
+   ursra.8b v0, v0, #1
+   ursra.16b v0, v0, #2
+   ursra.4h v0, v0, #3
+   ursra.8h v0, v0, #4
+   ursra.2s v0, v0, #5
+   ursra.4s v0, v0, #6
+   ursra.2d v0, v0, #7
+   ushll.8h v0, v0, #1
+   ushll2.8h v0, v0, #2
+   ushll.4s v0, v0, #3
+   ushll2.4s v0, v0, #4
+   ushll.2d v0, v0, #5
+   ushll2.2d v0, v0, #6
+   ushr.8b v0, v0, #1
+   ushr.16b v0, v0, #2
+   ushr.4h v0, v0, #3
+   ushr.8h v0, v0, #4
+   ushr.2s v0, v0, #5
+   ushr.4s v0, v0, #6
+   ushr.2d v0, v0, #7
+   usra.8b v0, v0, #1
+   usra.16b v0, v0, #2
+   usra.4h v0, v0, #3
+   usra.8h v0, v0, #4
+   usra.2s v0, v0, #5
+   usra.4s v0, v0, #6
+   usra.2d v0, v0, #7
+
+; CHECK: fcvtzs.2s	v0, v0, #1      ; encoding: [0x00,0xfc,0x3f,0x0f]
+; CHECK: fcvtzs.4s	v0, v0, #2      ; encoding: [0x00,0xfc,0x3e,0x4f]
+; CHECK: fcvtzs.2d	v0, v0, #3      ; encoding: [0x00,0xfc,0x7d,0x4f]
+; CHECK: fcvtzu.2s	v0, v0, #1      ; encoding: [0x00,0xfc,0x3f,0x2f]
+; CHECK: fcvtzu.4s	v0, v0, #2      ; encoding: [0x00,0xfc,0x3e,0x6f]
+; CHECK: fcvtzu.2d	v0, v0, #3      ; encoding: [0x00,0xfc,0x7d,0x6f]
+; CHECK: rshrn.8b	v0, v0, #1      ; encoding: [0x00,0x8c,0x0f,0x0f]
+; CHECK: rshrn2.16b	v0, v0, #2      ; encoding: [0x00,0x8c,0x0e,0x4f]
+; CHECK: rshrn.4h	v0, v0, #3      ; encoding: [0x00,0x8c,0x1d,0x0f]
+; CHECK: rshrn2.8h	v0, v0, #4      ; encoding: [0x00,0x8c,0x1c,0x4f]
+; CHECK: rshrn.2s	v0, v0, #5      ; encoding: [0x00,0x8c,0x3b,0x0f]
+; CHECK: rshrn2.4s	v0, v0, #6      ; encoding: [0x00,0x8c,0x3a,0x4f]
+; CHECK: scvtf.2s	v0, v0, #1      ; encoding: [0x00,0xe4,0x3f,0x0f]
+; CHECK: scvtf.4s	v0, v0, #2      ; encoding: [0x00,0xe4,0x3e,0x4f]
+; CHECK: scvtf.2d	v0, v0, #3      ; encoding: [0x00,0xe4,0x7d,0x4f]
+; CHECK: shl.8b	v0, v0, #1              ; encoding: [0x00,0x54,0x09,0x0f]
+; CHECK: shl.16b	v0, v0, #2              ; encoding: [0x00,0x54,0x0a,0x4f]
+; CHECK: shl.4h	v0, v0, #3              ; encoding: [0x00,0x54,0x13,0x0f]
+; CHECK: shl.8h	v0, v0, #4              ; encoding: [0x00,0x54,0x14,0x4f]
+; CHECK: shl.2s	v0, v0, #5              ; encoding: [0x00,0x54,0x25,0x0f]
+; CHECK: shl.4s	v0, v0, #6              ; encoding: [0x00,0x54,0x26,0x4f]
+; CHECK: shl.2d	v0, v0, #7              ; encoding: [0x00,0x54,0x47,0x4f]
+; CHECK: shrn.8b	v0, v0, #1              ; encoding: [0x00,0x84,0x0f,0x0f]
+; CHECK: shrn2.16b	v0, v0, #2      ; encoding: [0x00,0x84,0x0e,0x4f]
+; CHECK: shrn.4h	v0, v0, #3              ; encoding: [0x00,0x84,0x1d,0x0f]
+; CHECK: shrn2.8h	v0, v0, #4      ; encoding: [0x00,0x84,0x1c,0x4f]
+; CHECK: shrn.2s	v0, v0, #5              ; encoding: [0x00,0x84,0x3b,0x0f]
+; CHECK: shrn2.4s	v0, v0, #6      ; encoding: [0x00,0x84,0x3a,0x4f]
+; CHECK: sli.8b	v0, v0, #1              ; encoding: [0x00,0x54,0x09,0x2f]
+; CHECK: sli.16b	v0, v0, #2              ; encoding: [0x00,0x54,0x0a,0x6f]
+; CHECK: sli.4h	v0, v0, #3              ; encoding: [0x00,0x54,0x13,0x2f]
+; CHECK: sli.8h	v0, v0, #4              ; encoding: [0x00,0x54,0x14,0x6f]
+; CHECK: sli.2s	v0, v0, #5              ; encoding: [0x00,0x54,0x25,0x2f]
+; CHECK: sli.4s	v0, v0, #6              ; encoding: [0x00,0x54,0x26,0x6f]
+; CHECK: sli.2d	v0, v0, #7              ; encoding: [0x00,0x54,0x47,0x6f]
+; CHECK: sqrshrn.8b	v0, v0, #1      ; encoding: [0x00,0x9c,0x0f,0x0f]
+; CHECK: sqrshrn2.16b	v0, v0, #2      ; encoding: [0x00,0x9c,0x0e,0x4f]
+; CHECK: sqrshrn.4h	v0, v0, #3      ; encoding: [0x00,0x9c,0x1d,0x0f]
+; CHECK: sqrshrn2.8h	v0, v0, #4      ; encoding: [0x00,0x9c,0x1c,0x4f]
+; CHECK: sqrshrn.2s	v0, v0, #5      ; encoding: [0x00,0x9c,0x3b,0x0f]
+; CHECK: sqrshrn2.4s	v0, v0, #6      ; encoding: [0x00,0x9c,0x3a,0x4f]
+; CHECK: sqrshrun.8b	v0, v0, #1      ; encoding: [0x00,0x8c,0x0f,0x2f]
+; CHECK: sqrshrun2.16b	v0, v0, #2      ; encoding: [0x00,0x8c,0x0e,0x6f]
+; CHECK: sqrshrun.4h	v0, v0, #3      ; encoding: [0x00,0x8c,0x1d,0x2f]
+; CHECK: sqrshrun2.8h	v0, v0, #4      ; encoding: [0x00,0x8c,0x1c,0x6f]
+; CHECK: sqrshrun.2s	v0, v0, #5      ; encoding: [0x00,0x8c,0x3b,0x2f]
+; CHECK: sqrshrun2.4s	v0, v0, #6      ; encoding: [0x00,0x8c,0x3a,0x6f]
+; CHECK: sqshlu.8b	v0, v0, #1      ; encoding: [0x00,0x64,0x09,0x2f]
+; CHECK: sqshlu.16b	v0, v0, #2      ; encoding: [0x00,0x64,0x0a,0x6f]
+; CHECK: sqshlu.4h	v0, v0, #3      ; encoding: [0x00,0x64,0x13,0x2f]
+; CHECK: sqshlu.8h	v0, v0, #4      ; encoding: [0x00,0x64,0x14,0x6f]
+; CHECK: sqshlu.2s	v0, v0, #5      ; encoding: [0x00,0x64,0x25,0x2f]
+; CHECK: sqshlu.4s	v0, v0, #6      ; encoding: [0x00,0x64,0x26,0x6f]
+; CHECK: sqshlu.2d	v0, v0, #7      ; encoding: [0x00,0x64,0x47,0x6f]
+; CHECK: sqshl.8b	v0, v0, #1      ; encoding: [0x00,0x74,0x09,0x0f]
+; CHECK: sqshl.16b	v0, v0, #2      ; encoding: [0x00,0x74,0x0a,0x4f]
+; CHECK: sqshl.4h	v0, v0, #3      ; encoding: [0x00,0x74,0x13,0x0f]
+; CHECK: sqshl.8h	v0, v0, #4      ; encoding: [0x00,0x74,0x14,0x4f]
+; CHECK: sqshl.2s	v0, v0, #5      ; encoding: [0x00,0x74,0x25,0x0f]
+; CHECK: sqshl.4s	v0, v0, #6      ; encoding: [0x00,0x74,0x26,0x4f]
+; CHECK: sqshl.2d	v0, v0, #7      ; encoding: [0x00,0x74,0x47,0x4f]
+; CHECK: sqshrn.8b	v0, v0, #1      ; encoding: [0x00,0x94,0x0f,0x0f]
+; CHECK: sqshrn2.16b	v0, v0, #2      ; encoding: [0x00,0x94,0x0e,0x4f]
+; CHECK: sqshrn.4h	v0, v0, #3      ; encoding: [0x00,0x94,0x1d,0x0f]
+; CHECK: sqshrn2.8h	v0, v0, #4      ; encoding: [0x00,0x94,0x1c,0x4f]
+; CHECK: sqshrn.2s	v0, v0, #5      ; encoding: [0x00,0x94,0x3b,0x0f]
+; CHECK: sqshrn2.4s	v0, v0, #6      ; encoding: [0x00,0x94,0x3a,0x4f]
+; CHECK: sqshrun.8b	v0, v0, #1      ; encoding: [0x00,0x84,0x0f,0x2f]
+; CHECK: sqshrun2.16b	v0, v0, #2      ; encoding: [0x00,0x84,0x0e,0x6f]
+; CHECK: sqshrun.4h	v0, v0, #3      ; encoding: [0x00,0x84,0x1d,0x2f]
+; CHECK: sqshrun2.8h	v0, v0, #4      ; encoding: [0x00,0x84,0x1c,0x6f]
+; CHECK: sqshrun.2s	v0, v0, #5      ; encoding: [0x00,0x84,0x3b,0x2f]
+; CHECK: sqshrun2.4s	v0, v0, #6      ; encoding: [0x00,0x84,0x3a,0x6f]
+; CHECK: sri.8b	v0, v0, #1              ; encoding: [0x00,0x44,0x0f,0x2f]
+; CHECK: sri.16b	v0, v0, #2              ; encoding: [0x00,0x44,0x0e,0x6f]
+; CHECK: sri.4h	v0, v0, #3              ; encoding: [0x00,0x44,0x1d,0x2f]
+; CHECK: sri.8h	v0, v0, #4              ; encoding: [0x00,0x44,0x1c,0x6f]
+; CHECK: sri.2s	v0, v0, #5              ; encoding: [0x00,0x44,0x3b,0x2f]
+; CHECK: sri.4s	v0, v0, #6              ; encoding: [0x00,0x44,0x3a,0x6f]
+; CHECK: sri.2d	v0, v0, #7              ; encoding: [0x00,0x44,0x79,0x6f]
+; CHECK: srshr.8b	v0, v0, #1      ; encoding: [0x00,0x24,0x0f,0x0f]
+; CHECK: srshr.16b	v0, v0, #2      ; encoding: [0x00,0x24,0x0e,0x4f]
+; CHECK: srshr.4h	v0, v0, #3      ; encoding: [0x00,0x24,0x1d,0x0f]
+; CHECK: srshr.8h	v0, v0, #4      ; encoding: [0x00,0x24,0x1c,0x4f]
+; CHECK: srshr.2s	v0, v0, #5      ; encoding: [0x00,0x24,0x3b,0x0f]
+; CHECK: srshr.4s	v0, v0, #6      ; encoding: [0x00,0x24,0x3a,0x4f]
+; CHECK: srshr.2d	v0, v0, #7      ; encoding: [0x00,0x24,0x79,0x4f]
+; CHECK: srsra.8b	v0, v0, #1      ; encoding: [0x00,0x34,0x0f,0x0f]
+; CHECK: srsra.16b	v0, v0, #2      ; encoding: [0x00,0x34,0x0e,0x4f]
+; CHECK: srsra.4h	v0, v0, #3      ; encoding: [0x00,0x34,0x1d,0x0f]
+; CHECK: srsra.8h	v0, v0, #4      ; encoding: [0x00,0x34,0x1c,0x4f]
+; CHECK: srsra.2s	v0, v0, #5      ; encoding: [0x00,0x34,0x3b,0x0f]
+; CHECK: srsra.4s	v0, v0, #6      ; encoding: [0x00,0x34,0x3a,0x4f]
+; CHECK: srsra.2d	v0, v0, #7      ; encoding: [0x00,0x34,0x79,0x4f]
+; CHECK: sshll.8h	v0, v0, #1      ; encoding: [0x00,0xa4,0x09,0x0f]
+; CHECK: sshll2.8h	v0, v0, #2      ; encoding: [0x00,0xa4,0x0a,0x4f]
+; CHECK: sshll.4s	v0, v0, #3      ; encoding: [0x00,0xa4,0x13,0x0f]
+; CHECK: sshll2.4s	v0, v0, #4      ; encoding: [0x00,0xa4,0x14,0x4f]
+; CHECK: sshll.2d	v0, v0, #5      ; encoding: [0x00,0xa4,0x25,0x0f]
+; CHECK: sshll2.2d	v0, v0, #6      ; encoding: [0x00,0xa4,0x26,0x4f]
+; CHECK: sshr.8b	v0, v0, #1              ; encoding: [0x00,0x04,0x0f,0x0f]
+; CHECK: sshr.16b	v0, v0, #2      ; encoding: [0x00,0x04,0x0e,0x4f]
+; CHECK: sshr.4h	v0, v0, #3              ; encoding: [0x00,0x04,0x1d,0x0f]
+; CHECK: sshr.8h	v0, v0, #4              ; encoding: [0x00,0x04,0x1c,0x4f]
+; CHECK: sshr.2s	v0, v0, #5              ; encoding: [0x00,0x04,0x3b,0x0f]
+; CHECK: sshr.4s	v0, v0, #6              ; encoding: [0x00,0x04,0x3a,0x4f]
+; CHECK: sshr.2d	v0, v0, #7              ; encoding: [0x00,0x04,0x79,0x4f]
+; CHECK: sshr.8b	v0, v0, #1              ; encoding: [0x00,0x04,0x0f,0x0f]
+; CHECK: ssra.16b	v0, v0, #2      ; encoding: [0x00,0x14,0x0e,0x4f]
+; CHECK: ssra.4h	v0, v0, #3              ; encoding: [0x00,0x14,0x1d,0x0f]
+; CHECK: ssra.8h	v0, v0, #4              ; encoding: [0x00,0x14,0x1c,0x4f]
+; CHECK: ssra.2s	v0, v0, #5              ; encoding: [0x00,0x14,0x3b,0x0f]
+; CHECK: ssra.4s	v0, v0, #6              ; encoding: [0x00,0x14,0x3a,0x4f]
+; CHECK: ssra.2d	v0, v0, #7              ; encoding: [0x00,0x14,0x79,0x4f]
+; CHECK: ssra		d0, d0, #64             ; encoding: [0x00,0x14,0x40,0x5f]
+; CHECK: ucvtf.2s	v0, v0, #1      ; encoding: [0x00,0xe4,0x3f,0x2f]
+; CHECK: ucvtf.4s	v0, v0, #2      ; encoding: [0x00,0xe4,0x3e,0x6f]
+; CHECK: ucvtf.2d	v0, v0, #3      ; encoding: [0x00,0xe4,0x7d,0x6f]
+; CHECK: uqrshrn.8b	v0, v0, #1      ; encoding: [0x00,0x9c,0x0f,0x2f]
+; CHECK: uqrshrn2.16b	v0, v0, #2      ; encoding: [0x00,0x9c,0x0e,0x6f]
+; CHECK: uqrshrn.4h	v0, v0, #3      ; encoding: [0x00,0x9c,0x1d,0x2f]
+; CHECK: uqrshrn2.8h	v0, v0, #4      ; encoding: [0x00,0x9c,0x1c,0x6f]
+; CHECK: uqrshrn.2s	v0, v0, #5      ; encoding: [0x00,0x9c,0x3b,0x2f]
+; CHECK: uqrshrn2.4s	v0, v0, #6      ; encoding: [0x00,0x9c,0x3a,0x6f]
+; CHECK: uqshl.8b	v0, v0, #1      ; encoding: [0x00,0x74,0x09,0x2f]
+; CHECK: uqshl.16b	v0, v0, #2      ; encoding: [0x00,0x74,0x0a,0x6f]
+; CHECK: uqshl.4h	v0, v0, #3      ; encoding: [0x00,0x74,0x13,0x2f]
+; CHECK: uqshl.8h	v0, v0, #4      ; encoding: [0x00,0x74,0x14,0x6f]
+; CHECK: uqshl.2s	v0, v0, #5      ; encoding: [0x00,0x74,0x25,0x2f]
+; CHECK: uqshl.4s	v0, v0, #6      ; encoding: [0x00,0x74,0x26,0x6f]
+; CHECK: uqshl.2d	v0, v0, #7      ; encoding: [0x00,0x74,0x47,0x6f]
+; CHECK: uqshrn.8b	v0, v0, #1      ; encoding: [0x00,0x94,0x0f,0x2f]
+; CHECK: uqshrn2.16b	v0, v0, #2      ; encoding: [0x00,0x94,0x0e,0x6f]
+; CHECK: uqshrn.4h	v0, v0, #3      ; encoding: [0x00,0x94,0x1d,0x2f]
+; CHECK: uqshrn2.8h	v0, v0, #4      ; encoding: [0x00,0x94,0x1c,0x6f]
+; CHECK: uqshrn.2s	v0, v0, #5      ; encoding: [0x00,0x94,0x3b,0x2f]
+; CHECK: uqshrn2.4s	v0, v0, #6      ; encoding: [0x00,0x94,0x3a,0x6f]
+; CHECK: urshr.8b	v0, v0, #1      ; encoding: [0x00,0x24,0x0f,0x2f]
+; CHECK: urshr.16b	v0, v0, #2      ; encoding: [0x00,0x24,0x0e,0x6f]
+; CHECK: urshr.4h	v0, v0, #3      ; encoding: [0x00,0x24,0x1d,0x2f]
+; CHECK: urshr.8h	v0, v0, #4      ; encoding: [0x00,0x24,0x1c,0x6f]
+; CHECK: urshr.2s	v0, v0, #5      ; encoding: [0x00,0x24,0x3b,0x2f]
+; CHECK: urshr.4s	v0, v0, #6      ; encoding: [0x00,0x24,0x3a,0x6f]
+; CHECK: urshr.2d	v0, v0, #7      ; encoding: [0x00,0x24,0x79,0x6f]
+; CHECK: ursra.8b	v0, v0, #1      ; encoding: [0x00,0x34,0x0f,0x2f]
+; CHECK: ursra.16b	v0, v0, #2      ; encoding: [0x00,0x34,0x0e,0x6f]
+; CHECK: ursra.4h	v0, v0, #3      ; encoding: [0x00,0x34,0x1d,0x2f]
+; CHECK: ursra.8h	v0, v0, #4      ; encoding: [0x00,0x34,0x1c,0x6f]
+; CHECK: ursra.2s	v0, v0, #5      ; encoding: [0x00,0x34,0x3b,0x2f]
+; CHECK: ursra.4s	v0, v0, #6      ; encoding: [0x00,0x34,0x3a,0x6f]
+; CHECK: ursra.2d	v0, v0, #7      ; encoding: [0x00,0x34,0x79,0x6f]
+; CHECK: ushll.8h	v0, v0, #1      ; encoding: [0x00,0xa4,0x09,0x2f]
+; CHECK: ushll2.8h	v0, v0, #2      ; encoding: [0x00,0xa4,0x0a,0x6f]
+; CHECK: ushll.4s	v0, v0, #3      ; encoding: [0x00,0xa4,0x13,0x2f]
+; CHECK: ushll2.4s	v0, v0, #4      ; encoding: [0x00,0xa4,0x14,0x6f]
+; CHECK: ushll.2d	v0, v0, #5      ; encoding: [0x00,0xa4,0x25,0x2f]
+; CHECK: ushll2.2d	v0, v0, #6      ; encoding: [0x00,0xa4,0x26,0x6f]
+; CHECK: ushr.8b	v0, v0, #1              ; encoding: [0x00,0x04,0x0f,0x2f]
+; CHECK: ushr.16b	v0, v0, #2      ; encoding: [0x00,0x04,0x0e,0x6f]
+; CHECK: ushr.4h	v0, v0, #3              ; encoding: [0x00,0x04,0x1d,0x2f]
+; CHECK: ushr.8h	v0, v0, #4              ; encoding: [0x00,0x04,0x1c,0x6f]
+; CHECK: ushr.2s	v0, v0, #5              ; encoding: [0x00,0x04,0x3b,0x2f]
+; CHECK: ushr.4s	v0, v0, #6              ; encoding: [0x00,0x04,0x3a,0x6f]
+; CHECK: ushr.2d	v0, v0, #7              ; encoding: [0x00,0x04,0x79,0x6f]
+; CHECK: usra.8b	v0, v0, #1              ; encoding: [0x00,0x14,0x0f,0x2f]
+; CHECK: usra.16b	v0, v0, #2      ; encoding: [0x00,0x14,0x0e,0x6f]
+; CHECK: usra.4h	v0, v0, #3              ; encoding: [0x00,0x14,0x1d,0x2f]
+; CHECK: usra.8h	v0, v0, #4              ; encoding: [0x00,0x14,0x1c,0x6f]
+; CHECK: usra.2s	v0, v0, #5              ; encoding: [0x00,0x14,0x3b,0x2f]
+; CHECK: usra.4s	v0, v0, #6              ; encoding: [0x00,0x14,0x3a,0x6f]
+; CHECK: usra.2d	v0, v0, #7              ; encoding: [0x00,0x14,0x79,0x6f]
+
+
+; ARM Verbose syntax variants.
+
+   rshrn v9.8b, v11.8h, #1
+   rshrn2 v8.16b, v9.8h, #2
+   rshrn v7.4h, v8.4s, #3
+   rshrn2 v6.8h, v7.4s, #4
+   rshrn v5.2s, v6.2d, #5
+   rshrn2 v4.4s, v5.2d, #6
+
+   shrn v9.8b, v11.8h, #1
+   shrn2 v8.16b, v9.8h, #2
+   shrn v7.4h, v8.4s, #3
+   shrn2 v6.8h, v7.4s, #4
+   shrn v5.2s, v6.2d, #5
+   shrn2 v4.4s, v5.2d, #6
+
+   sqrshrn v9.8b, v11.8h, #1
+   sqrshrn2 v8.16b, v9.8h, #2
+   sqrshrn v7.4h, v8.4s, #3
+   sqrshrn2 v6.8h, v7.4s, #4
+   sqrshrn v5.2s, v6.2d, #5
+   sqrshrn2 v4.4s, v5.2d, #6
+
+   sqshrn v9.8b, v11.8h, #1
+   sqshrn2 v8.16b, v9.8h, #2
+   sqshrn v7.4h, v8.4s, #3
+   sqshrn2 v6.8h, v7.4s, #4
+   sqshrn v5.2s, v6.2d, #5
+   sqshrn2 v4.4s, v5.2d, #6
+
+   sqrshrun v9.8b, v11.8h, #1
+   sqrshrun2 v8.16b, v9.8h, #2
+   sqrshrun v7.4h, v8.4s, #3
+   sqrshrun2 v6.8h, v7.4s, #4
+   sqrshrun v5.2s, v6.2d, #5
+   sqrshrun2 v4.4s, v5.2d, #6
+
+   sqshrun v9.8b, v11.8h, #1
+   sqshrun2 v8.16b, v9.8h, #2
+   sqshrun v7.4h, v8.4s, #3
+   sqshrun2 v6.8h, v7.4s, #4
+   sqshrun v5.2s, v6.2d, #5
+   sqshrun2 v4.4s, v5.2d, #6
+
+   uqrshrn v9.8b, v11.8h, #1
+   uqrshrn2 v8.16b, v9.8h, #2
+   uqrshrn v7.4h, v8.4s, #3
+   uqrshrn2 v6.8h, v7.4s, #4
+   uqrshrn v5.2s, v6.2d, #5
+   uqrshrn2 v4.4s, v5.2d, #6
+
+   uqshrn v9.8b, v11.8h, #1
+   uqshrn2 v8.16b, v9.8h, #2
+   uqshrn v7.4h, v8.4s, #3
+   uqshrn2 v6.8h, v7.4s, #4
+   uqshrn v5.2s, v6.2d, #5
+   uqshrn2 v4.4s, v5.2d, #6
+
+   sshll2 v10.8h, v3.16b, #6
+   sshll2 v11.4s, v4.8h, #5
+   sshll2 v12.2d, v5.4s, #4
+   sshll v13.8h, v6.8b, #3
+   sshll v14.4s, v7.4h, #2
+   sshll v15.2d, v8.2s, #7
+
+   ushll2 v10.8h, v3.16b, #6
+   ushll2 v11.4s, v4.8h, #5
+   ushll2 v12.2d, v5.4s, #4
+   ushll v13.8h, v6.8b, #3
+   ushll v14.4s, v7.4h, #2
+   ushll v15.2d, v8.2s, #7
+
+
+; CHECK: rshrn.8b	v9, v11, #1     ; encoding: [0x69,0x8d,0x0f,0x0f]
+; CHECK: rshrn2.16b	v8, v9, #2      ; encoding: [0x28,0x8d,0x0e,0x4f]
+; CHECK: rshrn.4h	v7, v8, #3      ; encoding: [0x07,0x8d,0x1d,0x0f]
+; CHECK: rshrn2.8h	v6, v7, #4      ; encoding: [0xe6,0x8c,0x1c,0x4f]
+; CHECK: rshrn.2s	v5, v6, #5      ; encoding: [0xc5,0x8c,0x3b,0x0f]
+; CHECK: rshrn2.4s	v4, v5, #6      ; encoding: [0xa4,0x8c,0x3a,0x4f]
+; CHECK: shrn.8b	v9, v11, #1             ; encoding: [0x69,0x85,0x0f,0x0f]
+; CHECK: shrn2.16b	v8, v9, #2      ; encoding: [0x28,0x85,0x0e,0x4f]
+; CHECK: shrn.4h	v7, v8, #3              ; encoding: [0x07,0x85,0x1d,0x0f]
+; CHECK: shrn2.8h	v6, v7, #4      ; encoding: [0xe6,0x84,0x1c,0x4f]
+; CHECK: shrn.2s	v5, v6, #5              ; encoding: [0xc5,0x84,0x3b,0x0f]
+; CHECK: shrn2.4s	v4, v5, #6      ; encoding: [0xa4,0x84,0x3a,0x4f]
+; CHECK: sqrshrn.8b	v9, v11, #1     ; encoding: [0x69,0x9d,0x0f,0x0f]
+; CHECK: sqrshrn2.16b	v8, v9, #2      ; encoding: [0x28,0x9d,0x0e,0x4f]
+; CHECK: sqrshrn.4h	v7, v8, #3      ; encoding: [0x07,0x9d,0x1d,0x0f]
+; CHECK: sqrshrn2.8h	v6, v7, #4      ; encoding: [0xe6,0x9c,0x1c,0x4f]
+; CHECK: sqrshrn.2s	v5, v6, #5      ; encoding: [0xc5,0x9c,0x3b,0x0f]
+; CHECK: sqrshrn2.4s	v4, v5, #6      ; encoding: [0xa4,0x9c,0x3a,0x4f]
+; CHECK: sqshrn.8b	v9, v11, #1     ; encoding: [0x69,0x95,0x0f,0x0f]
+; CHECK: sqshrn2.16b	v8, v9, #2      ; encoding: [0x28,0x95,0x0e,0x4f]
+; CHECK: sqshrn.4h	v7, v8, #3      ; encoding: [0x07,0x95,0x1d,0x0f]
+; CHECK: sqshrn2.8h	v6, v7, #4      ; encoding: [0xe6,0x94,0x1c,0x4f]
+; CHECK: sqshrn.2s	v5, v6, #5      ; encoding: [0xc5,0x94,0x3b,0x0f]
+; CHECK: sqshrn2.4s	v4, v5, #6      ; encoding: [0xa4,0x94,0x3a,0x4f]
+; CHECK: sqrshrun.8b	v9, v11, #1     ; encoding: [0x69,0x8d,0x0f,0x2f]
+; CHECK: sqrshrun2.16b	v8, v9, #2      ; encoding: [0x28,0x8d,0x0e,0x6f]
+; CHECK: sqrshrun.4h	v7, v8, #3      ; encoding: [0x07,0x8d,0x1d,0x2f]
+; CHECK: sqrshrun2.8h	v6, v7, #4      ; encoding: [0xe6,0x8c,0x1c,0x6f]
+; CHECK: sqrshrun.2s	v5, v6, #5      ; encoding: [0xc5,0x8c,0x3b,0x2f]
+; CHECK: sqrshrun2.4s	v4, v5, #6      ; encoding: [0xa4,0x8c,0x3a,0x6f]
+; CHECK: sqshrun.8b	v9, v11, #1     ; encoding: [0x69,0x85,0x0f,0x2f]
+; CHECK: sqshrun2.16b	v8, v9, #2      ; encoding: [0x28,0x85,0x0e,0x6f]
+; CHECK: sqshrun.4h	v7, v8, #3      ; encoding: [0x07,0x85,0x1d,0x2f]
+; CHECK: sqshrun2.8h	v6, v7, #4      ; encoding: [0xe6,0x84,0x1c,0x6f]
+; CHECK: sqshrun.2s	v5, v6, #5      ; encoding: [0xc5,0x84,0x3b,0x2f]
+; CHECK: sqshrun2.4s	v4, v5, #6      ; encoding: [0xa4,0x84,0x3a,0x6f]
+; CHECK: uqrshrn.8b	v9, v11, #1     ; encoding: [0x69,0x9d,0x0f,0x2f]
+; CHECK: uqrshrn2.16b	v8, v9, #2      ; encoding: [0x28,0x9d,0x0e,0x6f]
+; CHECK: uqrshrn.4h	v7, v8, #3      ; encoding: [0x07,0x9d,0x1d,0x2f]
+; CHECK: uqrshrn2.8h	v6, v7, #4      ; encoding: [0xe6,0x9c,0x1c,0x6f]
+; CHECK: uqrshrn.2s	v5, v6, #5      ; encoding: [0xc5,0x9c,0x3b,0x2f]
+; CHECK: uqrshrn2.4s	v4, v5, #6      ; encoding: [0xa4,0x9c,0x3a,0x6f]
+; CHECK: uqshrn.8b	v9, v11, #1     ; encoding: [0x69,0x95,0x0f,0x2f]
+; CHECK: uqshrn2.16b	v8, v9, #2      ; encoding: [0x28,0x95,0x0e,0x6f]
+; CHECK: uqshrn.4h	v7, v8, #3      ; encoding: [0x07,0x95,0x1d,0x2f]
+; CHECK: uqshrn2.8h	v6, v7, #4      ; encoding: [0xe6,0x94,0x1c,0x6f]
+; CHECK: uqshrn.2s	v5, v6, #5      ; encoding: [0xc5,0x94,0x3b,0x2f]
+; CHECK: uqshrn2.4s	v4, v5, #6      ; encoding: [0xa4,0x94,0x3a,0x6f]
+; CHECK: sshll2.8h	v10, v3, #6     ; encoding: [0x6a,0xa4,0x0e,0x4f]
+; CHECK: sshll2.4s	v11, v4, #5     ; encoding: [0x8b,0xa4,0x15,0x4f]
+; CHECK: sshll2.2d	v12, v5, #4     ; encoding: [0xac,0xa4,0x24,0x4f]
+; CHECK: sshll.8h	v13, v6, #3     ; encoding: [0xcd,0xa4,0x0b,0x0f]
+; CHECK: sshll.4s	v14, v7, #2     ; encoding: [0xee,0xa4,0x12,0x0f]
+; CHECK: sshll.2d	v15, v8, #7     ; encoding: [0x0f,0xa5,0x27,0x0f]
+; CHECK: ushll2.8h	v10, v3, #6     ; encoding: [0x6a,0xa4,0x0e,0x6f]
+; CHECK: ushll2.4s	v11, v4, #5     ; encoding: [0x8b,0xa4,0x15,0x6f]
+; CHECK: ushll2.2d	v12, v5, #4     ; encoding: [0xac,0xa4,0x24,0x6f]
+; CHECK: ushll.8h	v13, v6, #3     ; encoding: [0xcd,0xa4,0x0b,0x2f]
+; CHECK: ushll.4s	v14, v7, #2     ; encoding: [0xee,0xa4,0x12,0x2f]
+; CHECK: ushll.2d	v15, v8, #7     ; encoding: [0x0f,0xa5,0x27,0x2f]
+
+
+  pmull.8h v0, v0, v0
+  pmull2.8h v0, v0, v0
+  pmull.1q v2, v3, v4
+  pmull2.1q v2, v3, v4
+  pmull v2.1q, v3.1d, v4.1d
+  pmull2 v2.1q, v3.2d, v4.2d
+
+; CHECK: pmull.8h	v0, v0, v0      ; encoding: [0x00,0xe0,0x20,0x0e]
+; CHECK: pmull2.8h	v0, v0, v0      ; encoding: [0x00,0xe0,0x20,0x4e]
+; CHECK: pmull.1q	v2, v3, v4      ; encoding: [0x62,0xe0,0xe4,0x0e]
+; CHECK: pmull2.1q	v2, v3, v4      ; encoding: [0x62,0xe0,0xe4,0x4e]
+; CHECK: pmull.1q	v2, v3, v4      ; encoding: [0x62,0xe0,0xe4,0x0e]
+; CHECK: pmull2.1q	v2, v3, v4      ; encoding: [0x62,0xe0,0xe4,0x4e]
+
+
+  faddp.2d d1, v2
+  faddp.2s s3, v4
+; CHECK: faddp.2d	d1, v2          ; encoding: [0x41,0xd8,0x70,0x7e]
+; CHECK: faddp.2s	s3, v4          ; encoding: [0x83,0xd8,0x30,0x7e]
+
+  tbl.16b v2, {v4,v5,v6,v7}, v1
+  tbl.8b v0, {v4,v5,v6,v7}, v1
+  tbl.16b v2, {v5}, v1
+  tbl.8b v0, {v5}, v1
+  tbl.16b v2, {v5,v6,v7}, v1
+  tbl.8b v0, {v5,v6,v7}, v1
+  tbl.16b v2, {v6,v7}, v1
+  tbl.8b v0, {v6,v7}, v1
+; CHECK: tbl.16b	v2, { v4, v5, v6, v7 }, v1 ; encoding: [0x82,0x60,0x01,0x4e]
+; CHECK: tbl.8b	v0, { v4, v5, v6, v7 }, v1 ; encoding: [0x80,0x60,0x01,0x0e]
+; CHECK: tbl.16b	v2, { v5 }, v1          ; encoding: [0xa2,0x00,0x01,0x4e]
+; CHECK: tbl.8b	v0, { v5 }, v1          ; encoding: [0xa0,0x00,0x01,0x0e]
+; CHECK: tbl.16b	v2, { v5, v6, v7 }, v1  ; encoding: [0xa2,0x40,0x01,0x4e]
+; CHECK: tbl.8b	v0, { v5, v6, v7 }, v1  ; encoding: [0xa0,0x40,0x01,0x0e]
+; CHECK: tbl.16b	v2, { v6, v7 }, v1      ; encoding: [0xc2,0x20,0x01,0x4e]
+; CHECK: tbl.8b	v0, { v6, v7 }, v1      ; encoding: [0xc0,0x20,0x01,0x0e]
+
+  tbl v2.16b, {v4.16b,v5.16b,v6.16b,v7.16b}, v1.16b
+  tbl v0.8b, {v4.16b,v5.16b,v6.16b,v7.16b}, v1.8b
+  tbl v2.16b, {v5.16b}, v1.16b
+  tbl v0.8b, {v5.16b}, v1.8b
+  tbl v2.16b, {v5.16b,v6.16b,v7.16b}, v1.16b
+  tbl v0.8b, {v5.16b,v6.16b,v7.16b}, v1.8b
+  tbl v2.16b, {v6.16b,v7.16b}, v1.16b
+  tbl v0.8b, {v6.16b,v7.16b}, v1.8b
+; CHECK: tbl.16b v2, { v4, v5, v6, v7 }, v1 ; encoding: [0x82,0x60,0x01,0x4e]
+; CHECK: tbl.8b v0, { v4, v5, v6, v7 }, v1 ; encoding: [0x80,0x60,0x01,0x0e]
+; CHECK: tbl.16b v2, { v5 }, v1          ; encoding: [0xa2,0x00,0x01,0x4e]
+; CHECK: tbl.8b v0, { v5 }, v1          ; encoding: [0xa0,0x00,0x01,0x0e]
+; CHECK: tbl.16b v2, { v5, v6, v7 }, v1  ; encoding: [0xa2,0x40,0x01,0x4e]
+; CHECK: tbl.8b v0, { v5, v6, v7 }, v1  ; encoding: [0xa0,0x40,0x01,0x0e]
+; CHECK: tbl.16b v2, { v6, v7 }, v1      ; encoding: [0xc2,0x20,0x01,0x4e]
+; CHECK: tbl.8b v0, { v6, v7 }, v1      ; encoding: [0xc0,0x20,0x01,0x0e]
+
+  sqdmull	s0, h0, h0
+  sqdmull	d0, s0, s0
+; CHECK: sqdmull	s0, h0, h0              ; encoding: [0x00,0xd0,0x60,0x5e]
+; CHECK: sqdmull	d0, s0, s0              ; encoding: [0x00,0xd0,0xa0,0x5e]
+
+  frsqrte s0, s0
+  frsqrte d0, d0
+; CHECK: frsqrte s0, s0                  ; encoding: [0x00,0xd8,0xa1,0x7e]
+; CHECK: frsqrte d0, d0                  ; encoding: [0x00,0xd8,0xe1,0x7e]
+
+  mov.16b v0, v0
+  mov.2s v0, v0
+; CHECK: orr.16b	v0, v0, v0              ; encoding: [0x00,0x1c,0xa0,0x4e]
+; CHECK: orr.8b	v0, v0, v0              ; encoding: [0x00,0x1c,0xa0,0x0e]
+
+
+; uadalp/sadalp verbose mode aliases.
+  uadalp v14.4h, v25.8b
+  uadalp v15.8h, v24.16b
+  uadalp v16.2s, v23.4h
+  uadalp v17.4s, v22.8h
+  uadalp v18.1d, v21.2s
+  uadalp v19.2d, v20.4s
+
+  sadalp v1.4h, v11.8b
+  sadalp v2.8h, v12.16b
+  sadalp v3.2s, v13.4h
+  sadalp v4.4s, v14.8h
+  sadalp v5.1d, v15.2s
+  sadalp v6.2d, v16.4s
+
+; CHECK: uadalp.4h	v14, v25        ; encoding: [0x2e,0x6b,0x20,0x2e]
+; CHECK: uadalp.8h	v15, v24        ; encoding: [0x0f,0x6b,0x20,0x6e]
+; CHECK: uadalp.2s	v16, v23        ; encoding: [0xf0,0x6a,0x60,0x2e]
+; CHECK: uadalp.4s	v17, v22        ; encoding: [0xd1,0x6a,0x60,0x6e]
+; CHECK: uadalp.1d	v18, v21        ; encoding: [0xb2,0x6a,0xa0,0x2e]
+; CHECK: uadalp.2d	v19, v20        ; encoding: [0x93,0x6a,0xa0,0x6e]
+; CHECK: sadalp.4h	v1, v11         ; encoding: [0x61,0x69,0x20,0x0e]
+; CHECK: sadalp.8h	v2, v12         ; encoding: [0x82,0x69,0x20,0x4e]
+; CHECK: sadalp.2s	v3, v13         ; encoding: [0xa3,0x69,0x60,0x0e]
+; CHECK: sadalp.4s	v4, v14         ; encoding: [0xc4,0x69,0x60,0x4e]
+; CHECK: sadalp.1d	v5, v15         ; encoding: [0xe5,0x69,0xa0,0x0e]
+; CHECK: sadalp.2d	v6, v16         ; encoding: [0x06,0x6a,0xa0,0x4e]
+
+; MVN is an alias for 'not'.
+  mvn v1.8b, v4.8b
+  mvn v19.16b, v17.16b
+  mvn.8b v10, v6
+  mvn.16b v11, v7
+
+; CHECK: not.8b	v1, v4                  ; encoding: [0x81,0x58,0x20,0x2e]
+; CHECK: not.16b	v19, v17                ; encoding: [0x33,0x5a,0x20,0x6e]
+; CHECK: not.8b	v10, v6                 ; encoding: [0xca,0x58,0x20,0x2e]
+; CHECK: not.16b	v11, v7                 ; encoding: [0xeb,0x58,0x20,0x6e]
+
+; sqdmull verbose mode aliases
+ sqdmull v10.4s, v12.4h, v12.4h
+ sqdmull2 v10.4s, v13.8h, v13.8h
+ sqdmull v10.2d, v13.2s, v13.2s
+ sqdmull2 v10.2d, v13.4s, v13.4s
+; CHECK: sqdmull.4s	v10, v12, v12   ; encoding: [0x8a,0xd1,0x6c,0x0e]
+; CHECK: sqdmull2.4s	v10, v13, v13   ; encoding: [0xaa,0xd1,0x6d,0x4e]
+; CHECK: sqdmull.2d	v10, v13, v13   ; encoding: [0xaa,0xd1,0xad,0x0e]
+; CHECK: sqdmull2.2d	v10, v13, v13   ; encoding: [0xaa,0xd1,0xad,0x4e]
+
+; xtn verbose mode aliases
+ xtn v14.8b, v14.8h
+ xtn2 v14.16b, v14.8h
+ xtn v14.4h, v14.4s
+ xtn2 v14.8h, v14.4s
+ xtn v14.2s, v14.2d
+ xtn2 v14.4s, v14.2d
+; CHECK: xtn.8b v14, v14                ; encoding: [0xce,0x29,0x21,0x0e]
+; CHECK: xtn2.16b v14, v14              ; encoding: [0xce,0x29,0x21,0x4e]
+; CHECK: xtn.4h v14, v14                ; encoding: [0xce,0x29,0x61,0x0e]
+; CHECK: xtn2.8h v14, v14               ; encoding: [0xce,0x29,0x61,0x4e]
+; CHECK: xtn.2s v14, v14                ; encoding: [0xce,0x29,0xa1,0x0e]
+; CHECK: xtn2.4s v14, v14               ; encoding: [0xce,0x29,0xa1,0x4e]
+
+; uaddl verbose mode aliases
+ uaddl v9.8h, v13.8b, v14.8b
+ uaddl2 v9.8h, v13.16b, v14.16b
+ uaddl v9.4s, v13.4h, v14.4h
+ uaddl2 v9.4s, v13.8h, v14.8h
+ uaddl v9.2d, v13.2s, v14.2s
+ uaddl2 v9.2d, v13.4s, v14.4s
+; CHECK: uaddl.8h	v9, v13, v14    ; encoding: [0xa9,0x01,0x2e,0x2e]
+; CHECK: uaddl2.8h	v9, v13, v14    ; encoding: [0xa9,0x01,0x2e,0x6e]
+; CHECK: uaddl.4s	v9, v13, v14    ; encoding: [0xa9,0x01,0x6e,0x2e]
+; CHECK: uaddl2.4s	v9, v13, v14    ; encoding: [0xa9,0x01,0x6e,0x6e]
+; CHECK: uaddl.2d	v9, v13, v14    ; encoding: [0xa9,0x01,0xae,0x2e]
+; CHECK: uaddl2.2d	v9, v13, v14    ; encoding: [0xa9,0x01,0xae,0x6e]
+
+; bit verbose mode aliases
+ bit v9.16b, v10.16b, v10.16b
+ bit v9.8b, v10.8b, v10.8b
+; CHECK: bit.16b v9, v10, v10           ; encoding: [0x49,0x1d,0xaa,0x6e]
+; CHECK: bit.8b v9, v10, v10            ; encoding: [0x49,0x1d,0xaa,0x2e]
+
+; pmull verbose mode aliases
+ pmull v8.8h, v8.8b, v8.8b
+ pmull2 v8.8h, v8.16b, v8.16b
+ pmull v8.1q, v8.1d, v8.1d
+ pmull2 v8.1q, v8.2d, v8.2d
+; CHECK: pmull.8h	v8, v8, v8      ; encoding: [0x08,0xe1,0x28,0x0e]
+; CHECK: pmull2.8h	v8, v8, v8      ; encoding: [0x08,0xe1,0x28,0x4e]
+; CHECK: pmull.1q	v8, v8, v8      ; encoding: [0x08,0xe1,0xe8,0x0e]
+; CHECK: pmull2.1q	v8, v8, v8      ; encoding: [0x08,0xe1,0xe8,0x4e]
+
+; usubl verbose mode aliases
+ usubl v9.8h, v13.8b, v14.8b
+ usubl2 v9.8h, v13.16b, v14.16b
+ usubl v9.4s, v13.4h, v14.4h
+ usubl2 v9.4s, v13.8h, v14.8h
+ usubl v9.2d, v13.2s, v14.2s
+ usubl2 v9.2d, v13.4s, v14.4s
+; CHECK: usubl.8h	v9, v13, v14    ; encoding: [0xa9,0x21,0x2e,0x2e]
+; CHECK: usubl2.8h	v9, v13, v14    ; encoding: [0xa9,0x21,0x2e,0x6e]
+; CHECK: usubl.4s	v9, v13, v14    ; encoding: [0xa9,0x21,0x6e,0x2e]
+; CHECK: usubl2.4s	v9, v13, v14    ; encoding: [0xa9,0x21,0x6e,0x6e]
+; CHECK: usubl.2d	v9, v13, v14    ; encoding: [0xa9,0x21,0xae,0x2e]
+; CHECK: usubl2.2d	v9, v13, v14    ; encoding: [0xa9,0x21,0xae,0x6e]
+
+; uabdl verbose mode aliases
+ uabdl v9.8h, v13.8b, v14.8b
+ uabdl2 v9.8h, v13.16b, v14.16b
+ uabdl v9.4s, v13.4h, v14.4h
+ uabdl2 v9.4s, v13.8h, v14.8h
+ uabdl v9.2d, v13.2s, v14.2s
+ uabdl2 v9.2d, v13.4s, v14.4s
+; CHECK: uabdl.8h	v9, v13, v14    ; encoding: [0xa9,0x71,0x2e,0x2e]
+; CHECK: uabdl2.8h	v9, v13, v14    ; encoding: [0xa9,0x71,0x2e,0x6e]
+; CHECK: uabdl.4s	v9, v13, v14    ; encoding: [0xa9,0x71,0x6e,0x2e]
+; CHECK: uabdl2.4s	v9, v13, v14    ; encoding: [0xa9,0x71,0x6e,0x6e]
+; CHECK: uabdl.2d	v9, v13, v14    ; encoding: [0xa9,0x71,0xae,0x2e]
+; CHECK: uabdl2.2d	v9, v13, v14    ; encoding: [0xa9,0x71,0xae,0x6e]
+
+; umull verbose mode aliases
+ umull v9.8h, v13.8b, v14.8b
+ umull2 v9.8h, v13.16b, v14.16b
+ umull v9.4s, v13.4h, v14.4h
+ umull2 v9.4s, v13.8h, v14.8h
+ umull v9.2d, v13.2s, v14.2s
+ umull2 v9.2d, v13.4s, v14.4s
+; CHECK: umull.8h	v9, v13, v14    ; encoding: [0xa9,0xc1,0x2e,0x2e]
+; CHECK: umull2.8h	v9, v13, v14    ; encoding: [0xa9,0xc1,0x2e,0x6e]
+; CHECK: umull.4s	v9, v13, v14    ; encoding: [0xa9,0xc1,0x6e,0x2e]
+; CHECK: umull2.4s	v9, v13, v14    ; encoding: [0xa9,0xc1,0x6e,0x6e]
+; CHECK: umull.2d	v9, v13, v14    ; encoding: [0xa9,0xc1,0xae,0x2e]
+; CHECK: umull2.2d	v9, v13, v14    ; encoding: [0xa9,0xc1,0xae,0x6e]
+
+; smull verbose mode aliases
+ smull v9.8h, v13.8b, v14.8b
+ smull2 v9.8h, v13.16b, v14.16b
+ smull v9.4s, v13.4h, v14.4h
+ smull2 v9.4s, v13.8h, v14.8h
+ smull v9.2d, v13.2s, v14.2s
+ smull2 v9.2d, v13.4s, v14.4s
+; CHECK: smull.8h	v9, v13, v14    ; encoding: [0xa9,0xc1,0x2e,0x0e]
+; CHECK: smull2.8h	v9, v13, v14    ; encoding: [0xa9,0xc1,0x2e,0x4e]
+; CHECK: smull.4s	v9, v13, v14    ; encoding: [0xa9,0xc1,0x6e,0x0e]
+; CHECK: smull2.4s	v9, v13, v14    ; encoding: [0xa9,0xc1,0x6e,0x4e]
+; CHECK: smull.2d	v9, v13, v14    ; encoding: [0xa9,0xc1,0xae,0x0e]
+; CHECK: smull2.2d	v9, v13, v14    ; encoding: [0xa9,0xc1,0xae,0x4e]
diff --git a/test/MC/ARM64/aliases.s b/test/MC/ARM64/aliases.s
new file mode 100644
index 0000000..055edb5
--- /dev/null
+++ b/test/MC/ARM64/aliases.s
@@ -0,0 +1,733 @@
+; RUN: llvm-mc -triple arm64-apple-darwin -output-asm-variant=1 -show-encoding < %s | FileCheck %s
+
+foo:
+;-----------------------------------------------------------------------------
+; ADD #0 to/from SP/WSP is a MOV
+;-----------------------------------------------------------------------------
+  add x1, sp, #0
+; CHECK: mov x1, sp
+  add sp, x2, #0
+; CHECK: mov sp, x2
+  add w3, wsp, #0
+; CHECK: mov w3, wsp
+  add wsp, w4, #0
+; CHECK: mov wsp, w4
+  mov x5, sp
+; CHECK: mov x5, sp
+  mov sp, x6
+; CHECK: mov sp, x6
+  mov w7, wsp
+; CHECK: mov w7, wsp
+  mov wsp, w8
+; CHECK: mov wsp, w8
+
+;-----------------------------------------------------------------------------
+; ORR Rd, Rn, Rn is a MOV
+;-----------------------------------------------------------------------------
+  orr x2, xzr, x9
+; CHECK: mov x2, x9
+  orr w2, wzr, w9
+; CHECK: mov w2, w9
+  mov x3, x4
+; CHECK: mov x3, x4
+  mov w5, w6
+; CHECK: mov w5, w6
+
+;-----------------------------------------------------------------------------
+; TST Xn, #<imm>
+;-----------------------------------------------------------------------------
+        tst w1, #3
+        tst x1, #3
+        tst w1, w2
+        tst x1, x2
+        ands wzr, w1, w2, lsl #2
+        ands xzr, x1, x2, lsl #3
+        tst w3, w7, lsl #31
+        tst x2, x20, asr #0
+
+; CHECK: tst	w1, #0x3                ; encoding: [0x3f,0x04,0x00,0x72]
+; CHECK: tst	x1, #0x3                ; encoding: [0x3f,0x04,0x40,0xf2]
+; CHECK: tst	w1, w2                  ; encoding: [0x3f,0x00,0x02,0x6a]
+; CHECK: tst	x1, x2                  ; encoding: [0x3f,0x00,0x02,0xea]
+; CHECK: tst	w1, w2, lsl #2          ; encoding: [0x3f,0x08,0x02,0x6a]
+; CHECK: tst	x1, x2, lsl #3          ; encoding: [0x3f,0x0c,0x02,0xea]
+; CHECK: tst	w3, w7, lsl #31         ; encoding: [0x7f,0x7c,0x07,0x6a]
+; CHECK: tst	x2, x20, asr #0         ; encoding: [0x5f,0x00,0x94,0xea]
+
+;-----------------------------------------------------------------------------
+; ADDS to WZR/XZR is a CMN
+;-----------------------------------------------------------------------------
+  cmn w1, #3, lsl #0
+  cmn x2, #4194304
+  cmn w4, w5
+  cmn x6, x7
+  cmn w8, w9, asr #3
+  cmn x2, x3, lsr #4
+  cmn x2, w3, uxtb #1
+  cmn x4, x5, uxtx #1
+
+; CHECK: cmn	w1, #3                  ; encoding: [0x3f,0x0c,0x00,0x31]
+; CHECK: cmn	x2, #4194304            ; encoding: [0x5f,0x00,0x50,0xb1]
+; CHECK: cmn	w4, w5                  ; encoding: [0x9f,0x00,0x05,0x2b]
+; CHECK: cmn	x6, x7                  ; encoding: [0xdf,0x00,0x07,0xab]
+; CHECK: cmn	w8, w9, asr #3          ; encoding: [0x1f,0x0d,0x89,0x2b]
+; CHECK: cmn	x2, x3, lsr #4          ; encoding: [0x5f,0x10,0x43,0xab]
+; CHECK: cmn	x2, w3, uxtb #1         ; encoding: [0x5f,0x04,0x23,0xab]
+; CHECK: cmn	x4, x5, uxtx #1         ; encoding: [0x9f,0x64,0x25,0xab]
+
+
+;-----------------------------------------------------------------------------
+; SUBS to WZR/XZR is a CMP
+;-----------------------------------------------------------------------------
+  cmp w1, #1024, lsl #12
+  cmp x2, #1024
+  cmp w4, w5
+  cmp x6, x7
+  cmp w8, w9, asr #3
+  cmp x2, x3, lsr #4
+  cmp x2, w3, uxth #2
+  cmp x4, x5, uxtx
+  cmp wzr, w1
+  cmp x8, w8, uxtw
+  cmp w9, w8, uxtw
+  cmp wsp, w9, lsl #0
+
+; CHECK: cmp	w1, #4194304            ; encoding: [0x3f,0x00,0x50,0x71]
+; CHECK: cmp	x2, #1024               ; encoding: [0x5f,0x00,0x10,0xf1]
+; CHECK: cmp	w4, w5                  ; encoding: [0x9f,0x00,0x05,0x6b]
+; CHECK: cmp	x6, x7                  ; encoding: [0xdf,0x00,0x07,0xeb]
+; CHECK: cmp	w8, w9, asr #3          ; encoding: [0x1f,0x0d,0x89,0x6b]
+; CHECK: cmp	x2, x3, lsr #4          ; encoding: [0x5f,0x10,0x43,0xeb]
+; CHECK: cmp	x2, w3, uxth #2         ; encoding: [0x5f,0x28,0x23,0xeb]
+; CHECK: cmp	x4, x5, uxtx            ; encoding: [0x9f,0x60,0x25,0xeb]
+; CHECK: cmp	wzr, w1                 ; encoding: [0xff,0x03,0x01,0x6b]
+; CHECK: cmp	x8, w8, uxtw            ; encoding: [0x1f,0x41,0x28,0xeb]
+; CHECK: cmp	w9, w8, uxtw            ; encoding: [0x3f,0x41,0x28,0x6b]
+; CHECK: cmp	wsp, w9                 ; encoding: [0xff,0x63,0x29,0x6b]
+
+
+;-----------------------------------------------------------------------------
+; SUB/SUBS from WZR/XZR is a NEG
+;-----------------------------------------------------------------------------
+
+  neg w0, w1
+; CHECK: neg w0, w1
+  neg w0, w1, lsl #1
+; CHECK: sub w0, wzr, w1, lsl #1
+  neg x0, x1
+; CHECK: neg x0, x1
+  neg x0, x1, asr #1
+; CHECK: sub x0, xzr, x1, asr #1
+  negs w0, w1
+; CHECK: negs w0, w1
+  negs w0, w1, lsl #1
+; CHECK: subs w0, wzr, w1, lsl #1
+  negs x0, x1
+; CHECK: negs x0, x1
+  negs x0, x1, asr #1
+; CHECK: subs x0, xzr, x1, asr #1
+
+;-----------------------------------------------------------------------------
+; MOV aliases
+;-----------------------------------------------------------------------------
+
+  mov x0, #281470681743360
+  mov x0, #18446744073709486080
+
+; CHECK: movz	x0, #65535, lsl #32
+; CHECK: movn	x0, #65535
+
+  mov w0, #0xffffffff
+  mov w0, #0xffffff00
+
+; CHECK: movn   w0, #0
+; CHECK: movn   w0, #255
+
+;-----------------------------------------------------------------------------
+; MVN aliases
+;-----------------------------------------------------------------------------
+
+        mvn w4, w9
+        mvn x2, x3
+        orn w4, wzr, w9
+
+; CHECK: mvn	w4, w9             ; encoding: [0xe4,0x03,0x29,0x2a]
+; CHECK: mvn	x2, x3             ; encoding: [0xe2,0x03,0x23,0xaa]
+; CHECK: mvn	w4, w9             ; encoding: [0xe4,0x03,0x29,0x2a]
+
+;-----------------------------------------------------------------------------
+; Bitfield aliases
+;-----------------------------------------------------------------------------
+
+  bfi   w0, w0, #1, #4
+  bfi   x0, x0, #1, #4
+  bfi   w0, w0, #0, #2
+  bfi   x0, x0, #0, #2
+  bfxil w0, w0, #2, #3
+  bfxil x0, x0, #2, #3
+  sbfiz w0, w0, #1, #4
+  sbfiz x0, x0, #1, #4
+  sbfx  w0, w0, #2, #3
+  sbfx  x0, x0, #2, #3
+  ubfiz w0, w0, #1, #4
+  ubfiz x0, x0, #1, #4
+  ubfx  w0, w0, #2, #3
+  ubfx  x0, x0, #2, #3
+
+; CHECK: bfm  w0, w0, #31, #3
+; CHECK: bfm  x0, x0, #63, #3
+; CHECK: bfm  w0, w0, #0, #1
+; CHECK: bfm  x0, x0, #0, #1
+; CHECK: bfm  w0, w0, #2, #4
+; CHECK: bfm  x0, x0, #2, #4
+; CHECK: sbfm w0, w0, #31, #3
+; CHECK: sbfm x0, x0, #63, #3
+; CHECK: sbfm w0, w0, #2, #4
+; CHECK: sbfm x0, x0, #2, #4
+; CHECK: ubfm w0, w0, #31, #3
+; CHECK: ubfm x0, x0, #63, #3
+; CHECK: ubfm w0, w0, #2, #4
+; CHECK: ubfm x0, x0, #2, #4
+
+;-----------------------------------------------------------------------------
+; Shift (immediate) aliases
+;-----------------------------------------------------------------------------
+
+; CHECK: asr w1, w3, #13
+; CHECK: asr x1, x3, #13
+; CHECK: lsl w0, w0, #1
+; CHECK: lsl x0, x0, #1
+; CHECK: lsr w0, w0, #4
+; CHECK: lsr x0, x0, #4
+
+   sbfm w1, w3, #13, #31
+   sbfm x1, x3, #13, #63
+   ubfm w0, w0, #31, #30
+   ubfm x0, x0, #63, #62
+   ubfm w0, w0, #4, #31
+   ubfm x0, x0, #4, #63
+; CHECK: extr w1, w3, w3, #5
+; CHECK: extr x1, x3, x3, #5
+   ror w1, w3, #5
+   ror x1, x3, #5
+; CHECK: lsl w1, wzr, #3
+   lsl w1, wzr, #3
+
+;-----------------------------------------------------------------------------
+; Sign/Zero extend aliases
+;-----------------------------------------------------------------------------
+
+  sxtb  w1, w2
+  sxth  w1, w2
+  uxtb  w1, w2
+  uxth  w1, w2
+
+; CHECK: sxtb w1, w2
+; CHECK: sxth w1, w2
+; CHECK: uxtb w1, w2
+; CHECK: uxth w1, w2
+
+  sxtb  x1, x2
+  sxth  x1, x2
+  sxtw  x1, x2
+  uxtb  x1, x2
+  uxth  x1, x2
+  uxtw  x1, x2
+
+; CHECK: sxtb x1, x2
+; CHECK: sxth x1, x2
+; CHECK: sxtw x1, x2
+; CHECK: uxtb x1, x2
+; CHECK: uxth x1, x2
+; CHECK: uxtw x1, x2
+
+;-----------------------------------------------------------------------------
+; Negate with carry
+;-----------------------------------------------------------------------------
+
+  ngc   w1, w2
+  ngc   x1, x2
+  ngcs  w1, w2
+  ngcs  x1, x2
+
+; CHECK: ngc  w1, w2
+; CHECK: ngc  x1, x2
+; CHECK: ngcs w1, w2
+; CHECK: ngcs x1, x2
+
+;-----------------------------------------------------------------------------
+; 6.6.1 Multiply aliases
+;-----------------------------------------------------------------------------
+
+  mneg   w1, w2, w3
+  mneg   x1, x2, x3
+  mul    w1, w2, w3
+  mul    x1, x2, x3
+  smnegl x1, w2, w3
+  umnegl x1, w2, w3
+  smull   x1, w2, w3
+  umull   x1, w2, w3
+
+; CHECK: mneg w1, w2, w3
+; CHECK: mneg x1, x2, x3
+; CHECK: mul w1, w2, w3
+; CHECK: mul x1, x2, x3
+; CHECK: smnegl x1, w2, w3
+; CHECK: umnegl x1, w2, w3
+; CHECK: smull x1, w2, w3
+; CHECK: umull x1, w2, w3
+
+;-----------------------------------------------------------------------------
+; Conditional select aliases
+;-----------------------------------------------------------------------------
+
+  cset   w1, eq
+  cset   x1, eq
+  csetm  w1, ne
+  csetm  x1, ne
+  cinc   w1, w2, lt
+  cinc   x1, x2, lt
+  cinv   w1, w2, mi
+  cinv   x1, x2, mi
+
+; CHECK: csinc  w1, wzr, wzr, ne
+; CHECK: csinc  x1, xzr, xzr, ne
+; CHECK: csinv  w1, wzr, wzr, eq
+; CHECK: csinv  x1, xzr, xzr, eq
+; CHECK: csinc  w1, w2, w2, ge
+; CHECK: csinc  x1, x2, x2, ge
+; CHECK: csinv  w1, w2, w2, pl
+; CHECK: csinv  x1, x2, x2, pl
+
+;-----------------------------------------------------------------------------
+; SYS aliases
+;-----------------------------------------------------------------------------
+
+  sys #0, c7, c1, #0
+; CHECK: ic ialluis
+  sys #0, c7, c5, #0
+; CHECK: ic iallu
+  sys #3, c7, c5, #1
+; CHECK: ic ivau
+
+  sys #3, c7, c4, #1
+; CHECK: dc zva
+  sys #0, c7, c6, #1
+; CHECK: dc ivac
+  sys #0, c7, c6, #2
+; CHECK: dc isw
+  sys #3, c7, c10, #1
+; CHECK: dc cvac
+  sys #0, c7, c10, #2
+; CHECK: dc csw
+  sys #3, c7, c11, #1
+; CHECK: dc cvau
+  sys #3, c7, c14, #1
+; CHECK: dc civac
+  sys #0, c7, c14, #2
+; CHECK: dc cisw
+
+  sys #0, c7, c8, #0
+; CHECK: at s1e1r
+  sys #4, c7, c8, #0
+; CHECK: at s1e2r
+  sys #6, c7, c8, #0
+; CHECK: at s1e3r
+  sys #0, c7, c8, #1
+; CHECK: at s1e1w
+  sys #4, c7, c8, #1
+; CHECK: at s1e2w
+  sys #6, c7, c8, #1
+; CHECK: at s1e3w
+  sys #0, c7, c8, #2
+; CHECK: at s1e0r
+  sys #0, c7, c8, #3
+; CHECK: at s1e0w
+  sys #4, c7, c8, #4
+; CHECK: at s12e1r
+  sys #4, c7, c8, #5
+; CHECK: at s12e1w
+  sys #4, c7, c8, #6
+; CHECK: at s12e0r
+  sys #4, c7, c8, #7
+; CHECK: at s12e0w
+
+  sys #0, c8, c3, #0
+; CHECK: tlbi vmalle1is
+  sys #4, c8, c3, #0
+; CHECK: tlbi alle2is
+  sys #6, c8, c3, #0
+; CHECK: tlbi alle3is
+  sys #0, c8, c3, #1
+; CHECK: tlbi vae1is
+  sys #4, c8, c3, #1
+; CHECK: tlbi vae2is
+  sys #6, c8, c3, #1
+; CHECK: tlbi vae3is
+  sys #0, c8, c3, #2
+; CHECK: tlbi aside1is
+  sys #0, c8, c3, #3
+; CHECK: tlbi vaae1is
+  sys #4, c8, c3, #4
+; CHECK: tlbi alle1is
+  sys #0, c8, c3, #5
+; CHECK: tlbi vale1is
+  sys #0, c8, c3, #7
+; CHECK: tlbi vaale1is
+  sys #0, c8, c7, #0
+; CHECK: tlbi vmalle1
+  sys #4, c8, c7, #0
+; CHECK: tlbi alle2
+  sys #4, c8, c3, #5
+; CHECK: tlbi vale2is
+  sys #6, c8, c3, #5
+; CHECK: tlbi vale3is
+  sys #6, c8, c7, #0
+; CHECK: tlbi alle3
+  sys #0, c8, c7, #1
+; CHECK: tlbi vae1
+  sys #4, c8, c7, #1
+; CHECK: tlbi vae2
+  sys #6, c8, c7, #1
+; CHECK: tlbi vae3
+  sys #0, c8, c7, #2
+; CHECK: tlbi aside1
+  sys #0, c8, c7, #3
+; CHECK: tlbi vaae1
+  sys #4, c8, c7, #4
+; CHECK: tlbi alle1
+  sys #0, c8, c7, #5
+; CHECK: tlbi vale1
+  sys #4, c8, c7, #5
+; CHECK: tlbi vale2
+  sys #6, c8, c7, #5
+; CHECK: tlbi vale3
+  sys #0, c8, c7, #7
+; CHECK: tlbi vaale1
+  sys #4, c8, c4, #1
+; CHECK: tlbi ipas2e1
+  sys #4, c8, c4, #5
+; CHECK: tlbi ipas2le1
+  sys #4, c8, c7, #6
+; CHECK: tlbi vmalls12e1
+  sys #4, c8, c3, #6
+; CHECK: tlbi vmalls12e1is
+
+  ic ialluis
+; CHECK: ic ialluis
+  ic iallu
+; CHECK: ic iallu
+  ic ivau
+; CHECK: ic ivau
+
+  dc zva
+; CHECK: dc zva
+  dc ivac
+; CHECK: dc ivac
+  dc isw
+; CHECK: dc isw
+  dc cvac
+; CHECK: dc cvac
+  dc csw
+; CHECK: dc csw
+  dc cvau
+; CHECK: dc cvau
+  dc civac
+; CHECK: dc civac
+  dc cisw
+; CHECK: dc cisw
+
+  at s1e1r
+; CHECK: at s1e1r
+  at s1e2r
+; CHECK: at s1e2r
+  at s1e3r
+; CHECK: at s1e3r
+  at s1e1w
+; CHECK: at s1e1w
+  at s1e2w
+; CHECK: at s1e2w
+  at s1e3w
+; CHECK: at s1e3w
+  at s1e0r
+; CHECK: at s1e0r
+  at s1e0w
+; CHECK: at s1e0w
+  at s12e1r
+; CHECK: at s12e1r
+  at s12e1w
+; CHECK: at s12e1w
+  at s12e0r
+; CHECK: at s12e0r
+  at s12e0w
+; CHECK: at s12e0w
+
+  tlbi vmalle1is
+; CHECK: tlbi vmalle1is
+  tlbi alle2is
+; CHECK: tlbi alle2is
+  tlbi alle3is
+; CHECK: tlbi alle3is
+  tlbi vae1is
+; CHECK: tlbi vae1is
+  tlbi vae2is
+; CHECK: tlbi vae2is
+  tlbi vae3is
+; CHECK: tlbi vae3is
+  tlbi aside1is
+; CHECK: tlbi aside1is
+  tlbi vaae1is
+; CHECK: tlbi vaae1is
+  tlbi alle1is
+; CHECK: tlbi alle1is
+  tlbi vale1is
+; CHECK: tlbi vale1is
+  tlbi vaale1is
+; CHECK: tlbi vaale1is
+  tlbi vmalle1
+; CHECK: tlbi vmalle1
+  tlbi alle2
+; CHECK: tlbi alle2
+  tlbi vale2is
+; CHECK: tlbi vale2is
+  tlbi vale3is
+; CHECK: tlbi vale3is
+  tlbi alle3
+; CHECK: tlbi alle3
+  tlbi vae1
+; CHECK: tlbi vae1
+  tlbi vae2
+; CHECK: tlbi vae2
+  tlbi vae3
+; CHECK: tlbi vae3
+  tlbi aside1
+; CHECK: tlbi aside1
+  tlbi vaae1
+; CHECK: tlbi vaae1
+  tlbi alle1
+; CHECK: tlbi alle1
+  tlbi vale1
+; CHECK: tlbi vale1
+  tlbi vale2
+; CHECK: tlbi vale2
+  tlbi vale3
+; CHECK: tlbi vale3
+  tlbi vaale1
+; CHECK: tlbi vaale1
+  tlbi ipas2e1, x10
+; CHECK: tlbi ipas2e1, x10
+  tlbi ipas2le1, x1
+; CHECK: tlbi ipas2le1, x1
+  tlbi vmalls12e1
+; CHECK: tlbi vmalls12e1
+  tlbi vmalls12e1is
+; CHECK: tlbi vmalls12e1is
+
+;-----------------------------------------------------------------------------
+; 5.8.5 Vector Arithmetic aliases
+;-----------------------------------------------------------------------------
+
+  cmls.8b v0, v2, v1
+  cmls.16b v0, v2, v1
+  cmls.4h v0, v2, v1
+  cmls.8h v0, v2, v1
+  cmls.2s v0, v2, v1
+  cmls.4s v0, v2, v1
+  cmls.2d v0, v2, v1
+; CHECK: cmhs.8b v0, v1, v2
+; CHECK: cmhs.16b v0, v1, v2
+; CHECK: cmhs.4h v0, v1, v2
+; CHECK: cmhs.8h v0, v1, v2
+; CHECK: cmhs.2s v0, v1, v2
+; CHECK: cmhs.4s v0, v1, v2
+; CHECK: cmhs.2d v0, v1, v2
+
+  cmlo.8b v0, v2, v1
+  cmlo.16b v0, v2, v1
+  cmlo.4h v0, v2, v1
+  cmlo.8h v0, v2, v1
+  cmlo.2s v0, v2, v1
+  cmlo.4s v0, v2, v1
+  cmlo.2d v0, v2, v1
+; CHECK: cmhi.8b v0, v1, v2
+; CHECK: cmhi.16b v0, v1, v2
+; CHECK: cmhi.4h v0, v1, v2
+; CHECK: cmhi.8h v0, v1, v2
+; CHECK: cmhi.2s v0, v1, v2
+; CHECK: cmhi.4s v0, v1, v2
+; CHECK: cmhi.2d v0, v1, v2
+
+  cmle.8b v0, v2, v1
+  cmle.16b v0, v2, v1
+  cmle.4h v0, v2, v1
+  cmle.8h  v0, v2, v1
+  cmle.2s v0, v2, v1
+  cmle.4s v0, v2, v1
+  cmle.2d v0, v2, v1
+; CHECK: cmge.8b v0, v1, v2
+; CHECK: cmge.16b v0, v1, v2
+; CHECK: cmge.4h v0, v1, v2
+; CHECK: cmge.8h v0, v1, v2
+; CHECK: cmge.2s v0, v1, v2
+; CHECK: cmge.4s v0, v1, v2
+; CHECK: cmge.2d v0, v1, v2
+
+  cmlt.8b v0, v2, v1
+  cmlt.16b v0, v2, v1
+  cmlt.4h v0, v2, v1
+  cmlt.8h  v0, v2, v1
+  cmlt.2s v0, v2, v1
+  cmlt.4s v0, v2, v1
+  cmlt.2d v0, v2, v1
+; CHECK: cmgt.8b v0, v1, v2
+; CHECK: cmgt.16b v0, v1, v2
+; CHECK: cmgt.4h v0, v1, v2
+; CHECK: cmgt.8h v0, v1, v2
+; CHECK: cmgt.2s v0, v1, v2
+; CHECK: cmgt.4s v0, v1, v2
+; CHECK: cmgt.2d v0, v1, v2
+
+  fcmle.2s v0, v2, v1
+  fcmle.4s v0, v2, v1
+  fcmle.2d v0, v2, v1
+; CHECK: fcmge.2s v0, v1, v2
+; CHECK: fcmge.4s v0, v1, v2
+; CHECK: fcmge.2d v0, v1, v2
+
+  fcmlt.2s v0, v2, v1
+  fcmlt.4s v0, v2, v1
+  fcmlt.2d v0, v2, v1
+; CHECK: fcmgt.2s v0, v1, v2
+; CHECK: fcmgt.4s v0, v1, v2
+; CHECK: fcmgt.2d v0, v1, v2
+
+  facle.2s v0, v2, v1
+  facle.4s v0, v2, v1
+  facle.2d v0, v2, v1
+; CHECK: facge.2s v0, v1, v2
+; CHECK: facge.4s v0, v1, v2
+; CHECK: facge.2d v0, v1, v2
+
+  faclt.2s v0, v2, v1
+  faclt.4s v0, v2, v1
+  faclt.2d v0, v2, v1
+; CHECK: facgt.2s v0, v1, v2
+; CHECK: facgt.4s v0, v1, v2
+; CHECK: facgt.2d v0, v1, v2
+
+;-----------------------------------------------------------------------------
+; 5.8.6 Scalar Arithmetic aliases
+;-----------------------------------------------------------------------------
+
+  cmls d0, d2, d1
+; CHECK: cmhs d0, d1, d2
+
+  cmle d0, d2, d1
+; CHECK: cmge d0, d1, d2
+
+  cmlo d0, d2, d1
+; CHECK: cmhi d0, d1, d2
+
+  cmlt d0, d2, d1
+; CHECK: cmgt d0, d1, d2
+
+  fcmle s0, s2, s1
+  fcmle d0, d2, d1
+; CHECK: fcmge s0, s1, s2
+; CHECK: fcmge d0, d1, d2
+
+  fcmlt s0, s2, s1
+  fcmlt d0, d2, d1
+; CHECK: fcmgt s0, s1, s2
+; CHECK: fcmgt d0, d1, d2
+
+  facle s0, s2, s1
+  facle d0, d2, d1
+; CHECK: facge s0, s1, s2
+; CHECK: facge d0, d1, d2
+
+  faclt s0, s2, s1
+  faclt d0, d2, d1
+; CHECK: facgt s0, s1, s2
+; CHECK: facgt d0, d1, d2
+
+;-----------------------------------------------------------------------------
+; 5.8.14 Vector Shift (immediate)
+;-----------------------------------------------------------------------------
+  sxtl v1.8h, v2.8b
+; CHECK: sshll.8h v1, v2, #0
+  sxtl.8h v1, v2
+; CHECK: sshll.8h v1, v2, #0
+
+  sxtl v1.4s, v2.4h
+; CHECK: sshll.4s v1, v2, #0
+  sxtl.4s v1, v2
+; CHECK: sshll.4s v1, v2, #0
+
+  sxtl v1.2d, v2.2s
+; CHECK: sshll.2d v1, v2, #0
+  sxtl.2d v1, v2
+; CHECK: sshll.2d v1, v2, #0
+
+  sxtl2 v1.8h, v2.16b
+; CHECK: sshll2.8h v1, v2, #0
+  sxtl2.8h v1, v2
+; CHECK: sshll2.8h v1, v2, #0
+
+  sxtl2 v1.4s, v2.8h
+; CHECK: sshll2.4s v1, v2, #0
+  sxtl2.4s v1, v2
+; CHECK: sshll2.4s v1, v2, #0
+
+  sxtl2 v1.2d, v2.4s
+; CHECK: sshll2.2d v1, v2, #0
+  sxtl2.2d v1, v2
+; CHECK: sshll2.2d v1, v2, #0
+
+  uxtl v1.8h, v2.8b
+; CHECK: ushll.8h v1, v2, #0
+  uxtl.8h v1, v2
+; CHECK: ushll.8h v1, v2, #0
+
+  uxtl v1.4s, v2.4h
+; CHECK: ushll.4s v1, v2, #0
+  uxtl.4s v1, v2
+; CHECK: ushll.4s v1, v2, #0
+
+  uxtl v1.2d, v2.2s
+; CHECK: ushll.2d v1, v2, #0
+  uxtl.2d v1, v2
+; CHECK: ushll.2d v1, v2, #0
+
+  uxtl2 v1.8h, v2.16b
+; CHECK: ushll2.8h v1, v2, #0
+  uxtl2.8h v1, v2
+; CHECK: ushll2.8h v1, v2, #0
+
+  uxtl2 v1.4s, v2.8h
+; CHECK: ushll2.4s v1, v2, #0
+  uxtl2.4s v1, v2
+; CHECK: ushll2.4s v1, v2, #0
+
+  uxtl2 v1.2d, v2.4s
+; CHECK: ushll2.2d v1, v2, #0
+  uxtl2.2d v1, v2
+; CHECK: ushll2.2d v1, v2, #0
+
+
+;-----------------------------------------------------------------------------
+; MOVI verbose syntax with shift operand omitted.
+;-----------------------------------------------------------------------------
+  movi v4.16b, #0x00
+  movi v4.16B, #0x01
+  movi v4.8b, #0x02
+  movi v4.8B, #0x03
+  movi v1.2d, #0x000000000000ff
+  movi v2.2D, #0x000000000000ff
+
+; CHECK: movi.16b	v4, #0              ; encoding: [0x04,0xe4,0x00,0x4f]
+; CHECK: movi.16b	v4, #1              ; encoding: [0x24,0xe4,0x00,0x4f]
+; CHECK: movi.8b	v4, #2               ; encoding: [0x44,0xe4,0x00,0x0f]
+; CHECK: movi.8b	v4, #3               ; encoding: [0x64,0xe4,0x00,0x0f]
+; CHECK: movi.2d	v1, #0x000000000000ff ; encoding: [0x21,0xe4,0x00,0x6f]
+; CHECK: movi.2d	v2, #0x000000000000ff ; encoding: [0x22,0xe4,0x00,0x6f]
diff --git a/test/MC/ARM64/arithmetic-encoding.s b/test/MC/ARM64/arithmetic-encoding.s
new file mode 100644
index 0000000..7c89244
--- /dev/null
+++ b/test/MC/ARM64/arithmetic-encoding.s
@@ -0,0 +1,631 @@
+; RUN: llvm-mc -triple arm64-apple-darwin -show-encoding < %s | FileCheck %s
+
+foo:
+;==---------------------------------------------------------------------------==
+; Add/Subtract with carry/borrow
+;==---------------------------------------------------------------------------==
+
+  adc   w1, w2, w3
+  adc   x1, x2, x3
+  adcs  w5, w4, w3
+  adcs  x5, x4, x3
+
+; CHECK: adc  w1, w2, w3             ; encoding: [0x41,0x00,0x03,0x1a]
+; CHECK: adc  x1, x2, x3             ; encoding: [0x41,0x00,0x03,0x9a]
+; CHECK: adcs w5, w4, w3             ; encoding: [0x85,0x00,0x03,0x3a]
+; CHECK: adcs x5, x4, x3             ; encoding: [0x85,0x00,0x03,0xba]
+
+  sbc   w1, w2, w3
+  sbc   x1, x2, x3
+  sbcs  w1, w2, w3
+  sbcs  x1, x2, x3
+
+; CHECK: sbc  w1, w2, w3             ; encoding: [0x41,0x00,0x03,0x5a]
+; CHECK: sbc  x1, x2, x3             ; encoding: [0x41,0x00,0x03,0xda]
+; CHECK: sbcs w1, w2, w3             ; encoding: [0x41,0x00,0x03,0x7a]
+; CHECK: sbcs x1, x2, x3             ; encoding: [0x41,0x00,0x03,0xfa]
+
+;==---------------------------------------------------------------------------==
+; Add/Subtract with (optionally shifted) immediate
+;==---------------------------------------------------------------------------==
+
+  add w3, w4, #1024
+  add w3, w4, #1024, lsl #0
+  add x3, x4, #1024
+  add x3, x4, #1024, lsl #0
+
+; CHECK: add w3, w4, #1024           ; encoding: [0x83,0x00,0x10,0x11]
+; CHECK: add w3, w4, #1024           ; encoding: [0x83,0x00,0x10,0x11]
+; CHECK: add x3, x4, #1024           ; encoding: [0x83,0x00,0x10,0x91]
+; CHECK: add x3, x4, #1024           ; encoding: [0x83,0x00,0x10,0x91]
+
+  add w3, w4, #1024, lsl #12
+  add w3, w4, #4194304
+  add w3, w4, #0, lsl #12
+  add x3, x4, #1024, lsl #12
+  add x3, x4, #4194304
+  add x3, x4, #0, lsl #12
+  add sp, sp, #32
+
+; CHECK: add w3, w4, #4194304        ; encoding: [0x83,0x00,0x50,0x11]
+; CHECK: add w3, w4, #4194304        ; encoding: [0x83,0x00,0x50,0x11]
+; CHECK: add w3, w4, #0, lsl #12     ; encoding: [0x83,0x00,0x40,0x11]
+; CHECK: add x3, x4, #4194304        ; encoding: [0x83,0x00,0x50,0x91]
+; CHECK: add x3, x4, #4194304        ; encoding: [0x83,0x00,0x50,0x91]
+; CHECK: add x3, x4, #0, lsl #12     ; encoding: [0x83,0x00,0x40,0x91]
+; CHECK: add sp, sp, #32             ; encoding: [0xff,0x83,0x00,0x91]
+
+  adds w3, w4, #1024
+  adds w3, w4, #1024, lsl #0
+  adds w3, w4, #1024, lsl #12
+  adds x3, x4, #1024
+  adds x3, x4, #1024, lsl #0
+  adds x3, x4, #1024, lsl #12
+
+; CHECK: adds w3, w4, #1024          ; encoding: [0x83,0x00,0x10,0x31]
+; CHECK: adds w3, w4, #1024          ; encoding: [0x83,0x00,0x10,0x31]
+; CHECK: adds w3, w4, #4194304       ; encoding: [0x83,0x00,0x50,0x31]
+; CHECK: adds x3, x4, #1024          ; encoding: [0x83,0x00,0x10,0xb1]
+; CHECK: adds x3, x4, #1024          ; encoding: [0x83,0x00,0x10,0xb1]
+; CHECK: adds x3, x4, #4194304       ; encoding: [0x83,0x00,0x50,0xb1]
+
+  sub w3, w4, #1024
+  sub w3, w4, #1024, lsl #0
+  sub w3, w4, #1024, lsl #12
+  sub x3, x4, #1024
+  sub x3, x4, #1024, lsl #0
+  sub x3, x4, #1024, lsl #12
+  sub sp, sp, #32
+
+; CHECK: sub w3, w4, #1024           ; encoding: [0x83,0x00,0x10,0x51]
+; CHECK: sub w3, w4, #1024           ; encoding: [0x83,0x00,0x10,0x51]
+; CHECK: sub w3, w4, #4194304        ; encoding: [0x83,0x00,0x50,0x51]
+; CHECK: sub x3, x4, #1024           ; encoding: [0x83,0x00,0x10,0xd1]
+; CHECK: sub x3, x4, #1024           ; encoding: [0x83,0x00,0x10,0xd1]
+; CHECK: sub x3, x4, #4194304        ; encoding: [0x83,0x00,0x50,0xd1]
+; CHECK: sub sp, sp, #32             ; encoding: [0xff,0x83,0x00,0xd1]
+
+  subs w3, w4, #1024
+  subs w3, w4, #1024, lsl #0
+  subs w3, w4, #1024, lsl #12
+  subs x3, x4, #1024
+  subs x3, x4, #1024, lsl #0
+  subs x3, x4, #1024, lsl #12
+
+; CHECK: subs w3, w4, #1024          ; encoding: [0x83,0x00,0x10,0x71]
+; CHECK: subs w3, w4, #1024          ; encoding: [0x83,0x00,0x10,0x71]
+; CHECK: subs w3, w4, #4194304       ; encoding: [0x83,0x00,0x50,0x71]
+; CHECK: subs x3, x4, #1024          ; encoding: [0x83,0x00,0x10,0xf1]
+; CHECK: subs x3, x4, #1024          ; encoding: [0x83,0x00,0x10,0xf1]
+; CHECK: subs x3, x4, #4194304       ; encoding: [0x83,0x00,0x50,0xf1]
+
+;==---------------------------------------------------------------------------==
+; Add/Subtract register with (optional) shift
+;==---------------------------------------------------------------------------==
+
+  add w12, w13, w14
+  add x12, x13, x14
+  add w12, w13, w14, lsl #12
+  add x12, x13, x14, lsl #12
+  add w12, w13, w14, lsr #42
+  add x12, x13, x14, lsr #42
+  add w12, w13, w14, asr #39
+  add x12, x13, x14, asr #39
+
+; CHECK: add w12, w13, w14           ; encoding: [0xac,0x01,0x0e,0x0b]
+; CHECK: add x12, x13, x14           ; encoding: [0xac,0x01,0x0e,0x8b]
+; CHECK: add w12, w13, w14, lsl #12  ; encoding: [0xac,0x31,0x0e,0x0b]
+; CHECK: add x12, x13, x14, lsl #12  ; encoding: [0xac,0x31,0x0e,0x8b]
+; CHECK: add w12, w13, w14, lsr #42  ; encoding: [0xac,0xa9,0x4e,0x0b]
+; CHECK: add x12, x13, x14, lsr #42  ; encoding: [0xac,0xa9,0x4e,0x8b]
+; CHECK: add w12, w13, w14, asr #39  ; encoding: [0xac,0x9d,0x8e,0x0b]
+; CHECK: add x12, x13, x14, asr #39  ; encoding: [0xac,0x9d,0x8e,0x8b]
+
+  sub w12, w13, w14
+  sub x12, x13, x14
+  sub w12, w13, w14, lsl #12
+  sub x12, x13, x14, lsl #12
+  sub w12, w13, w14, lsr #42
+  sub x12, x13, x14, lsr #42
+  sub w12, w13, w14, asr #39
+  sub x12, x13, x14, asr #39
+
+; CHECK: sub w12, w13, w14           ; encoding: [0xac,0x01,0x0e,0x4b]
+; CHECK: sub x12, x13, x14           ; encoding: [0xac,0x01,0x0e,0xcb]
+; CHECK: sub w12, w13, w14, lsl #12  ; encoding: [0xac,0x31,0x0e,0x4b]
+; CHECK: sub x12, x13, x14, lsl #12  ; encoding: [0xac,0x31,0x0e,0xcb]
+; CHECK: sub w12, w13, w14, lsr #42  ; encoding: [0xac,0xa9,0x4e,0x4b]
+; CHECK: sub x12, x13, x14, lsr #42  ; encoding: [0xac,0xa9,0x4e,0xcb]
+; CHECK: sub w12, w13, w14, asr #39  ; encoding: [0xac,0x9d,0x8e,0x4b]
+; CHECK: sub x12, x13, x14, asr #39  ; encoding: [0xac,0x9d,0x8e,0xcb]
+
+  adds w12, w13, w14
+  adds x12, x13, x14
+  adds w12, w13, w14, lsl #12
+  adds x12, x13, x14, lsl #12
+  adds w12, w13, w14, lsr #42
+  adds x12, x13, x14, lsr #42
+  adds w12, w13, w14, asr #39
+  adds x12, x13, x14, asr #39
+
+; CHECK: adds w12, w13, w14          ; encoding: [0xac,0x01,0x0e,0x2b]
+; CHECK: adds x12, x13, x14          ; encoding: [0xac,0x01,0x0e,0xab]
+; CHECK: adds w12, w13, w14, lsl #12 ; encoding: [0xac,0x31,0x0e,0x2b]
+; CHECK: adds x12, x13, x14, lsl #12 ; encoding: [0xac,0x31,0x0e,0xab]
+; CHECK: adds w12, w13, w14, lsr #42 ; encoding: [0xac,0xa9,0x4e,0x2b]
+; CHECK: adds x12, x13, x14, lsr #42 ; encoding: [0xac,0xa9,0x4e,0xab]
+; CHECK: adds w12, w13, w14, asr #39 ; encoding: [0xac,0x9d,0x8e,0x2b]
+; CHECK: adds x12, x13, x14, asr #39 ; encoding: [0xac,0x9d,0x8e,0xab]
+
+  subs w12, w13, w14
+  subs x12, x13, x14
+  subs w12, w13, w14, lsl #12
+  subs x12, x13, x14, lsl #12
+  subs w12, w13, w14, lsr #42
+  subs x12, x13, x14, lsr #42
+  subs w12, w13, w14, asr #39
+  subs x12, x13, x14, asr #39
+
+; CHECK: subs w12, w13, w14          ; encoding: [0xac,0x01,0x0e,0x6b]
+; CHECK: subs x12, x13, x14          ; encoding: [0xac,0x01,0x0e,0xeb]
+; CHECK: subs w12, w13, w14, lsl #12 ; encoding: [0xac,0x31,0x0e,0x6b]
+; CHECK: subs x12, x13, x14, lsl #12 ; encoding: [0xac,0x31,0x0e,0xeb]
+; CHECK: subs w12, w13, w14, lsr #42 ; encoding: [0xac,0xa9,0x4e,0x6b]
+; CHECK: subs x12, x13, x14, lsr #42 ; encoding: [0xac,0xa9,0x4e,0xeb]
+; CHECK: subs w12, w13, w14, asr #39 ; encoding: [0xac,0x9d,0x8e,0x6b]
+; CHECK: subs x12, x13, x14, asr #39 ; encoding: [0xac,0x9d,0x8e,0xeb]
+
+; Check use of upper case register names rdar://14354073
+  add X2, X2, X2
+; CHECK: add x2, x2, x2              ; encoding: [0x42,0x00,0x02,0x8b]
+
+;==---------------------------------------------------------------------------==
+; Add/Subtract with (optional) extend
+;==---------------------------------------------------------------------------==
+
+  add w1, w2, w3, uxtb
+  add w1, w2, w3, uxth
+  add w1, w2, w3, uxtw
+  add w1, w2, w3, uxtx
+  add w1, w2, w3, sxtb
+  add w1, w2, w3, sxth
+  add w1, w2, w3, sxtw
+  add w1, w2, w3, sxtx
+
+; CHECK: add w1, w2, w3, uxtb        ; encoding: [0x41,0x00,0x23,0x0b]
+; CHECK: add w1, w2, w3, uxth        ; encoding: [0x41,0x20,0x23,0x0b]
+; CHECK: add w1, w2, w3, uxtw        ; encoding: [0x41,0x40,0x23,0x0b]
+; CHECK: add w1, w2, w3, uxtx        ; encoding: [0x41,0x60,0x23,0x0b]
+; CHECK: add w1, w2, w3, sxtb        ; encoding: [0x41,0x80,0x23,0x0b]
+; CHECK: add w1, w2, w3, sxth        ; encoding: [0x41,0xa0,0x23,0x0b]
+; CHECK: add w1, w2, w3, sxtw        ; encoding: [0x41,0xc0,0x23,0x0b]
+; CHECK: add w1, w2, w3, sxtx        ; encoding: [0x41,0xe0,0x23,0x0b]
+
+  add x1, x2, w3, uxtb
+  add x1, x2, w3, uxth
+  add x1, x2, w3, uxtw
+  add x1, x2, w3, sxtb
+  add x1, x2, w3, sxth
+  add x1, x2, w3, sxtw
+
+; CHECK: add x1, x2, w3, uxtb        ; encoding: [0x41,0x00,0x23,0x8b]
+; CHECK: add x1, x2, w3, uxth        ; encoding: [0x41,0x20,0x23,0x8b]
+; CHECK: add x1, x2, w3, uxtw        ; encoding: [0x41,0x40,0x23,0x8b]
+; CHECK: add x1, x2, w3, sxtb        ; encoding: [0x41,0x80,0x23,0x8b]
+; CHECK: add x1, x2, w3, sxth        ; encoding: [0x41,0xa0,0x23,0x8b]
+; CHECK: add x1, x2, w3, sxtw        ; encoding: [0x41,0xc0,0x23,0x8b]
+
+  add w1, wsp, w3
+  add w1, wsp, w3, uxtw #0
+  add w2, wsp, w3, lsl #1
+  add sp, x2, x3
+  add sp, x2, x3, uxtx #0
+
+; CHECK: add w1, wsp, w3             ; encoding: [0xe1,0x43,0x23,0x0b]
+; CHECK: add w1, wsp, w3             ; encoding: [0xe1,0x43,0x23,0x0b]
+; CHECK: add w2, wsp, w3, lsl #1     ; encoding: [0xe2,0x67,0x23,0x0b]
+; CHECK: add sp, x2, x3              ; encoding: [0x5f,0x60,0x23,0x8b]
+; CHECK: add sp, x2, x3              ; encoding: [0x5f,0x60,0x23,0x8b]
+
+  sub w1, w2, w3, uxtb
+  sub w1, w2, w3, uxth
+  sub w1, w2, w3, uxtw
+  sub w1, w2, w3, uxtx
+  sub w1, w2, w3, sxtb
+  sub w1, w2, w3, sxth
+  sub w1, w2, w3, sxtw
+  sub w1, w2, w3, sxtx
+
+; CHECK: sub w1, w2, w3, uxtb        ; encoding: [0x41,0x00,0x23,0x4b]
+; CHECK: sub w1, w2, w3, uxth        ; encoding: [0x41,0x20,0x23,0x4b]
+; CHECK: sub w1, w2, w3, uxtw        ; encoding: [0x41,0x40,0x23,0x4b]
+; CHECK: sub w1, w2, w3, uxtx        ; encoding: [0x41,0x60,0x23,0x4b]
+; CHECK: sub w1, w2, w3, sxtb        ; encoding: [0x41,0x80,0x23,0x4b]
+; CHECK: sub w1, w2, w3, sxth        ; encoding: [0x41,0xa0,0x23,0x4b]
+; CHECK: sub w1, w2, w3, sxtw        ; encoding: [0x41,0xc0,0x23,0x4b]
+; CHECK: sub w1, w2, w3, sxtx        ; encoding: [0x41,0xe0,0x23,0x4b]
+
+  sub x1, x2, w3, uxtb
+  sub x1, x2, w3, uxth
+  sub x1, x2, w3, uxtw
+  sub x1, x2, w3, sxtb
+  sub x1, x2, w3, sxth
+  sub x1, x2, w3, sxtw
+
+; CHECK: sub x1, x2, w3, uxtb        ; encoding: [0x41,0x00,0x23,0xcb]
+; CHECK: sub x1, x2, w3, uxth        ; encoding: [0x41,0x20,0x23,0xcb]
+; CHECK: sub x1, x2, w3, uxtw        ; encoding: [0x41,0x40,0x23,0xcb]
+; CHECK: sub x1, x2, w3, sxtb        ; encoding: [0x41,0x80,0x23,0xcb]
+; CHECK: sub x1, x2, w3, sxth        ; encoding: [0x41,0xa0,0x23,0xcb]
+; CHECK: sub x1, x2, w3, sxtw        ; encoding: [0x41,0xc0,0x23,0xcb]
+
+  sub w1, wsp, w3
+  sub w1, wsp, w3, uxtw #0
+  sub sp, x2, x3
+  sub sp, x2, x3, uxtx #0
+  sub sp, x3, x7, lsl #4
+
+; CHECK: sub w1, wsp, w3             ; encoding: [0xe1,0x43,0x23,0x4b]
+; CHECK: sub w1, wsp, w3             ; encoding: [0xe1,0x43,0x23,0x4b]
+; CHECK: sub sp, x2, x3              ; encoding: [0x5f,0x60,0x23,0xcb]
+; CHECK: sub sp, x2, x3              ; encoding: [0x5f,0x60,0x23,0xcb]
+; CHECK: sp, x3, x7, lsl #4          ; encoding: [0x7f,0x70,0x27,0xcb]
+
+  adds w1, w2, w3, uxtb
+  adds w1, w2, w3, uxth
+  adds w1, w2, w3, uxtw
+  adds w1, w2, w3, uxtx
+  adds w1, w2, w3, sxtb
+  adds w1, w2, w3, sxth
+  adds w1, w2, w3, sxtw
+  adds w1, w2, w3, sxtx
+
+; CHECK: adds w1, w2, w3, uxtb       ; encoding: [0x41,0x00,0x23,0x2b]
+; CHECK: adds w1, w2, w3, uxth       ; encoding: [0x41,0x20,0x23,0x2b]
+; CHECK: adds w1, w2, w3, uxtw       ; encoding: [0x41,0x40,0x23,0x2b]
+; CHECK: adds w1, w2, w3, uxtx       ; encoding: [0x41,0x60,0x23,0x2b]
+; CHECK: adds w1, w2, w3, sxtb       ; encoding: [0x41,0x80,0x23,0x2b]
+; CHECK: adds w1, w2, w3, sxth       ; encoding: [0x41,0xa0,0x23,0x2b]
+; CHECK: adds w1, w2, w3, sxtw       ; encoding: [0x41,0xc0,0x23,0x2b]
+; CHECK: adds w1, w2, w3, sxtx       ; encoding: [0x41,0xe0,0x23,0x2b]
+
+  adds x1, x2, w3, uxtb
+  adds x1, x2, w3, uxth
+  adds x1, x2, w3, uxtw
+  adds x1, x2, w3, uxtx
+  adds x1, x2, w3, sxtb
+  adds x1, x2, w3, sxth
+  adds x1, x2, w3, sxtw
+  adds x1, x2, w3, sxtx
+
+; CHECK: adds x1, x2, w3, uxtb       ; encoding: [0x41,0x00,0x23,0xab]
+; CHECK: adds x1, x2, w3, uxth       ; encoding: [0x41,0x20,0x23,0xab]
+; CHECK: adds x1, x2, w3, uxtw       ; encoding: [0x41,0x40,0x23,0xab]
+; CHECK: adds x1, x2, w3, uxtx       ; encoding: [0x41,0x60,0x23,0xab]
+; CHECK: adds x1, x2, w3, sxtb       ; encoding: [0x41,0x80,0x23,0xab]
+; CHECK: adds x1, x2, w3, sxth       ; encoding: [0x41,0xa0,0x23,0xab]
+; CHECK: adds x1, x2, w3, sxtw       ; encoding: [0x41,0xc0,0x23,0xab]
+; CHECK: adds x1, x2, w3, sxtx       ; encoding: [0x41,0xe0,0x23,0xab]
+
+  adds w1, wsp, w3
+  adds w1, wsp, w3, uxtw #0
+  adds wzr, wsp, w3, lsl #4
+
+; CHECK: adds w1, wsp, w3            ; encoding: [0xe1,0x43,0x23,0x2b]
+; CHECK: adds w1, wsp, w3            ; encoding: [0xe1,0x43,0x23,0x2b]
+; CHECK: adds wzr, wsp, w3, lsl #4   ; encoding: [0xff,0x73,0x23,0x2b]
+
+  subs w1, w2, w3, uxtb
+  subs w1, w2, w3, uxth
+  subs w1, w2, w3, uxtw
+  subs w1, w2, w3, uxtx
+  subs w1, w2, w3, sxtb
+  subs w1, w2, w3, sxth
+  subs w1, w2, w3, sxtw
+  subs w1, w2, w3, sxtx
+
+; CHECK: subs w1, w2, w3, uxtb       ; encoding: [0x41,0x00,0x23,0x6b]
+; CHECK: subs w1, w2, w3, uxth       ; encoding: [0x41,0x20,0x23,0x6b]
+; CHECK: subs w1, w2, w3, uxtw       ; encoding: [0x41,0x40,0x23,0x6b]
+; CHECK: subs w1, w2, w3, uxtx       ; encoding: [0x41,0x60,0x23,0x6b]
+; CHECK: subs w1, w2, w3, sxtb       ; encoding: [0x41,0x80,0x23,0x6b]
+; CHECK: subs w1, w2, w3, sxth       ; encoding: [0x41,0xa0,0x23,0x6b]
+; CHECK: subs w1, w2, w3, sxtw       ; encoding: [0x41,0xc0,0x23,0x6b]
+; CHECK: subs w1, w2, w3, sxtx       ; encoding: [0x41,0xe0,0x23,0x6b]
+
+  subs x1, x2, w3, uxtb
+  subs x1, x2, w3, uxth
+  subs x1, x2, w3, uxtw
+  subs x1, x2, w3, uxtx
+  subs x1, x2, w3, sxtb
+  subs x1, x2, w3, sxth
+  subs x1, x2, w3, sxtw
+  subs x1, x2, w3, sxtx
+
+; CHECK: subs x1, x2, w3, uxtb       ; encoding: [0x41,0x00,0x23,0xeb]
+; CHECK: subs x1, x2, w3, uxth       ; encoding: [0x41,0x20,0x23,0xeb]
+; CHECK: subs x1, x2, w3, uxtw       ; encoding: [0x41,0x40,0x23,0xeb]
+; CHECK: subs x1, x2, w3, uxtx       ; encoding: [0x41,0x60,0x23,0xeb]
+; CHECK: subs x1, x2, w3, sxtb       ; encoding: [0x41,0x80,0x23,0xeb]
+; CHECK: subs x1, x2, w3, sxth       ; encoding: [0x41,0xa0,0x23,0xeb]
+; CHECK: subs x1, x2, w3, sxtw       ; encoding: [0x41,0xc0,0x23,0xeb]
+; CHECK: subs x1, x2, w3, sxtx       ; encoding: [0x41,0xe0,0x23,0xeb]
+
+  subs w1, wsp, w3
+  subs w1, wsp, w3, uxtw #0
+
+; CHECK: subs w1, wsp, w3            ; encoding: [0xe1,0x43,0x23,0x6b]
+; CHECK: subs w1, wsp, w3            ; encoding: [0xe1,0x43,0x23,0x6b]
+
+  cmp wsp, w9, lsl #0
+  subs x3, sp, x9, lsl #2
+  cmp wsp, w8, uxtw
+  subs wzr, wsp, w8, uxtw
+  cmp sp, w8, uxtw
+  subs xzr, sp, w8, uxtw
+
+; CHECK: cmp wsp, w9                 ; encoding: [0xff,0x63,0x29,0x6b]
+; CHECK: subs x3, sp, x9, lsl #2     ; encoding: [0xe3,0x6b,0x29,0xeb]
+; CHECK: cmp wsp, w8                 ; encoding: [0xff,0x43,0x28,0x6b]
+; CHECK: cmp wsp, w8                 ; encoding: [0xff,0x43,0x28,0x6b]
+; CHECK: cmp sp, w8                  ; encoding: [0xff,0x43,0x28,0xeb]
+; CHECK: cmp sp, w8                  ; encoding: [0xff,0x43,0x28,0xeb]
+
+  sub wsp, w9, w8, uxtw
+  sub w1, wsp, w8, uxtw
+  sub wsp, wsp, w8, uxtw
+  sub sp, x9, w8, uxtw
+  sub x1, sp, w8, uxtw
+  sub sp, sp, w8, uxtw
+  subs w1, wsp, w8, uxtw
+  subs x1, sp, w8, uxtw
+
+; CHECK: sub wsp, w9, w8             ; encoding: [0x3f,0x41,0x28,0x4b]
+; CHECK: sub w1, wsp, w8             ; encoding: [0xe1,0x43,0x28,0x4b]
+; CHECK: sub wsp, wsp, w8            ; encoding: [0xff,0x43,0x28,0x4b]
+; CHECK: sub sp, x9, w8              ; encoding: [0x3f,0x41,0x28,0xcb]
+; CHECK: sub x1, sp, w8              ; encoding: [0xe1,0x43,0x28,0xcb]
+; CHECK: sub sp, sp, w8              ; encoding: [0xff,0x43,0x28,0xcb]
+; CHECK: subs w1, wsp, w8            ; encoding: [0xe1,0x43,0x28,0x6b]
+; CHECK: subs x1, sp, w8             ; encoding: [0xe1,0x43,0x28,0xeb]
+
+;==---------------------------------------------------------------------------==
+; Signed/Unsigned divide
+;==---------------------------------------------------------------------------==
+
+  sdiv w1, w2, w3
+  sdiv x1, x2, x3
+  udiv w1, w2, w3
+  udiv x1, x2, x3
+
+; CHECK: sdiv w1, w2, w3             ; encoding: [0x41,0x0c,0xc3,0x1a]
+; CHECK: sdiv x1, x2, x3             ; encoding: [0x41,0x0c,0xc3,0x9a]
+; CHECK: udiv w1, w2, w3             ; encoding: [0x41,0x08,0xc3,0x1a]
+; CHECK: udiv x1, x2, x3             ; encoding: [0x41,0x08,0xc3,0x9a]
+
+;==---------------------------------------------------------------------------==
+; Variable shifts
+;==---------------------------------------------------------------------------==
+
+  asrv w1, w2, w3
+  asrv x1, x2, x3
+  asr w1, w2, w3
+  asr x1, x2, x3
+  lslv w1, w2, w3
+  lslv x1, x2, x3
+  lsl w1, w2, w3
+  lsl x1, x2, x3
+  lsrv w1, w2, w3
+  lsrv x1, x2, x3
+  lsr w1, w2, w3
+  lsr x1, x2, x3
+  rorv w1, w2, w3
+  rorv x1, x2, x3
+  ror w1, w2, w3
+  ror x1, x2, x3
+
+; CHECK: encoding: [0x41,0x28,0xc3,0x1a]
+; CHECK: encoding: [0x41,0x28,0xc3,0x9a]
+; CHECK: encoding: [0x41,0x28,0xc3,0x1a]
+; CHECK: encoding: [0x41,0x28,0xc3,0x9a]
+; CHECK: encoding: [0x41,0x20,0xc3,0x1a]
+; CHECK: encoding: [0x41,0x20,0xc3,0x9a]
+; CHECK: encoding: [0x41,0x20,0xc3,0x1a]
+; CHECK: encoding: [0x41,0x20,0xc3,0x9a]
+; CHECK: encoding: [0x41,0x24,0xc3,0x1a]
+; CHECK: encoding: [0x41,0x24,0xc3,0x9a]
+; CHECK: encoding: [0x41,0x24,0xc3,0x1a]
+; CHECK: encoding: [0x41,0x24,0xc3,0x9a]
+; CHECK: encoding: [0x41,0x2c,0xc3,0x1a]
+; CHECK: encoding: [0x41,0x2c,0xc3,0x9a]
+; CHECK: encoding: [0x41,0x2c,0xc3,0x1a]
+; CHECK: encoding: [0x41,0x2c,0xc3,0x9a]
+
+;==---------------------------------------------------------------------------==
+; One operand instructions
+;==---------------------------------------------------------------------------==
+
+  cls w1, w2
+  cls x1, x2
+  clz w1, w2
+  clz x1, x2
+  rbit w1, w2
+  rbit x1, x2
+  rev w1, w2
+  rev x1, x2
+  rev16 w1, w2
+  rev16 x1, x2
+  rev32 x1, x2
+
+; CHECK: encoding: [0x41,0x14,0xc0,0x5a]
+; CHECK: encoding: [0x41,0x14,0xc0,0xda]
+; CHECK: encoding: [0x41,0x10,0xc0,0x5a]
+; CHECK: encoding: [0x41,0x10,0xc0,0xda]
+; CHECK: encoding: [0x41,0x00,0xc0,0x5a]
+; CHECK: encoding: [0x41,0x00,0xc0,0xda]
+; CHECK: encoding: [0x41,0x08,0xc0,0x5a]
+; CHECK: encoding: [0x41,0x0c,0xc0,0xda]
+; CHECK: encoding: [0x41,0x04,0xc0,0x5a]
+; CHECK: encoding: [0x41,0x04,0xc0,0xda]
+; CHECK: encoding: [0x41,0x08,0xc0,0xda]
+
+;==---------------------------------------------------------------------------==
+; 6.6.1 Multiply-add instructions
+;==---------------------------------------------------------------------------==
+
+  madd   w1, w2, w3, w4
+  madd   x1, x2, x3, x4
+  msub   w1, w2, w3, w4
+  msub   x1, x2, x3, x4
+  smaddl x1, w2, w3, x4
+  smsubl x1, w2, w3, x4
+  umaddl x1, w2, w3, x4
+  umsubl x1, w2, w3, x4
+
+; CHECK: madd   w1, w2, w3, w4       ; encoding: [0x41,0x10,0x03,0x1b]
+; CHECK: madd   x1, x2, x3, x4       ; encoding: [0x41,0x10,0x03,0x9b]
+; CHECK: msub   w1, w2, w3, w4       ; encoding: [0x41,0x90,0x03,0x1b]
+; CHECK: msub   x1, x2, x3, x4       ; encoding: [0x41,0x90,0x03,0x9b]
+; CHECK: smaddl x1, w2, w3, x4       ; encoding: [0x41,0x10,0x23,0x9b]
+; CHECK: smsubl x1, w2, w3, x4       ; encoding: [0x41,0x90,0x23,0x9b]
+; CHECK: umaddl x1, w2, w3, x4       ; encoding: [0x41,0x10,0xa3,0x9b]
+; CHECK: umsubl x1, w2, w3, x4       ; encoding: [0x41,0x90,0xa3,0x9b]
+
+;==---------------------------------------------------------------------------==
+; Multiply-high instructions
+;==---------------------------------------------------------------------------==
+
+  smulh x1, x2, x3
+  umulh x1, x2, x3
+
+; CHECK: smulh x1, x2, x3            ; encoding: [0x41,0x7c,0x43,0x9b]
+; CHECK: umulh x1, x2, x3            ; encoding: [0x41,0x7c,0xc3,0x9b]
+
+;==---------------------------------------------------------------------------==
+; Move immediate instructions
+;==---------------------------------------------------------------------------==
+
+  movz w0, #1
+  movz x0, #1
+  movz w0, #1, lsl #16
+  movz x0, #1, lsl #16
+
+; CHECK: movz w0, #1                 ; encoding: [0x20,0x00,0x80,0x52]
+; CHECK: movz x0, #1                 ; encoding: [0x20,0x00,0x80,0xd2]
+; CHECK: movz w0, #1, lsl #16        ; encoding: [0x20,0x00,0xa0,0x52]
+; CHECK: movz x0, #1, lsl #16        ; encoding: [0x20,0x00,0xa0,0xd2]
+
+  movn w0, #2
+  movn x0, #2
+  movn w0, #2, lsl #16
+  movn x0, #2, lsl #16
+
+; CHECK: movn w0, #2                 ; encoding: [0x40,0x00,0x80,0x12]
+; CHECK: movn x0, #2                 ; encoding: [0x40,0x00,0x80,0x92]
+; CHECK: movn w0, #2, lsl #16        ; encoding: [0x40,0x00,0xa0,0x12]
+; CHECK: movn x0, #2, lsl #16        ; encoding: [0x40,0x00,0xa0,0x92]
+
+  movk w0, #1
+  movk x0, #1
+  movk w0, #1, lsl #16
+  movk x0, #1, lsl #16
+
+; CHECK: movk w0, #1                 ; encoding: [0x20,0x00,0x80,0x72]
+; CHECK: movk x0, #1                 ; encoding: [0x20,0x00,0x80,0xf2]
+; CHECK: movk w0, #1, lsl #16        ; encoding: [0x20,0x00,0xa0,0x72]
+; CHECK: movk x0, #1, lsl #16        ; encoding: [0x20,0x00,0xa0,0xf2]
+
+;==---------------------------------------------------------------------------==
+; Conditionally set flags instructions
+;==---------------------------------------------------------------------------==
+
+  ccmn w1, #2, #3, eq
+  ccmn x1, #2, #3, eq
+  ccmp w1, #2, #3, eq
+  ccmp x1, #2, #3, eq
+
+; CHECK: encoding: [0x23,0x08,0x42,0x3a]
+; CHECK: encoding: [0x23,0x08,0x42,0xba]
+; CHECK: encoding: [0x23,0x08,0x42,0x7a]
+; CHECK: encoding: [0x23,0x08,0x42,0xfa]
+
+  ccmn w1, w2, #3, eq
+  ccmn x1, x2, #3, eq
+  ccmp w1, w2, #3, eq
+  ccmp x1, x2, #3, eq
+
+; CHECK: encoding: [0x23,0x00,0x42,0x3a]
+; CHECK: encoding: [0x23,0x00,0x42,0xba]
+; CHECK: encoding: [0x23,0x00,0x42,0x7a]
+; CHECK: encoding: [0x23,0x00,0x42,0xfa]
+
+;==---------------------------------------------------------------------------==
+; Conditional select instructions
+;==---------------------------------------------------------------------------==
+
+  csel w1, w2, w3, eq
+  csel x1, x2, x3, eq
+  csinc w1, w2, w3, eq
+  csinc x1, x2, x3, eq
+  csinv w1, w2, w3, eq
+  csinv x1, x2, x3, eq
+  csneg w1, w2, w3, eq
+  csneg x1, x2, x3, eq
+
+; CHECK: encoding: [0x41,0x00,0x83,0x1a]
+; CHECK: encoding: [0x41,0x00,0x83,0x9a]
+; CHECK: encoding: [0x41,0x04,0x83,0x1a]
+; CHECK: encoding: [0x41,0x04,0x83,0x9a]
+; CHECK: encoding: [0x41,0x00,0x83,0x5a]
+; CHECK: encoding: [0x41,0x00,0x83,0xda]
+; CHECK: encoding: [0x41,0x04,0x83,0x5a]
+; CHECK: encoding: [0x41,0x04,0x83,0xda]
+
+; Make sure we handle upper case, too. In particular, condition codes.
+  CSEL W16, W7, W27, EQ
+  CSEL W15, W6, W26, NE
+  CSEL W14, W5, W25, CS
+  CSEL W13, W4, W24, HS
+  csel w12, w3, w23, CC
+  csel w11, w2, w22, LO
+  csel w10, w1, w21, MI
+  csel x9, x9, x1, PL
+  csel x8, x8, x2, VS
+  CSEL X7, X7, X3, VC
+  CSEL X6, X7, X4, HI
+  CSEL X5, X6, X5, LS
+  CSEL X4, X5, X6, GE
+  csel x3, x4, x7, LT
+  csel x2, x3, x8, GT
+  csel x1, x2, x9, LE
+  csel x10, x1, x20, AL
+
+; CHECK: csel	w16, w7, w27, eq        ; encoding: [0xf0,0x00,0x9b,0x1a]
+; CHECK: csel	w15, w6, w26, ne        ; encoding: [0xcf,0x10,0x9a,0x1a]
+; CHECK: csel	w14, w5, w25, cs        ; encoding: [0xae,0x20,0x99,0x1a]
+; CHECK: csel	w13, w4, w24, cs        ; encoding: [0x8d,0x20,0x98,0x1a]
+; CHECK: csel	w12, w3, w23, cc        ; encoding: [0x6c,0x30,0x97,0x1a]
+; CHECK: csel	w11, w2, w22, cc        ; encoding: [0x4b,0x30,0x96,0x1a]
+; CHECK: csel	w10, w1, w21, mi        ; encoding: [0x2a,0x40,0x95,0x1a]
+; CHECK: csel	x9, x9, x1, pl          ; encoding: [0x29,0x51,0x81,0x9a]
+; CHECK: csel	x8, x8, x2, vs          ; encoding: [0x08,0x61,0x82,0x9a]
+; CHECK: csel	x7, x7, x3, vc          ; encoding: [0xe7,0x70,0x83,0x9a]
+; CHECK: csel	x6, x7, x4, hi          ; encoding: [0xe6,0x80,0x84,0x9a]
+; CHECK: csel	x5, x6, x5, ls          ; encoding: [0xc5,0x90,0x85,0x9a]
+; CHECK: csel	x4, x5, x6, ge          ; encoding: [0xa4,0xa0,0x86,0x9a]
+; CHECK: csel	x3, x4, x7, lt          ; encoding: [0x83,0xb0,0x87,0x9a]
+; CHECK: csel	x2, x3, x8, gt          ; encoding: [0x62,0xc0,0x88,0x9a]
+; CHECK: csel	x1, x2, x9, le          ; encoding: [0x41,0xd0,0x89,0x9a]
+; CHECK: csel	x10, x1, x20, al        ; encoding: [0x2a,0xe0,0x94,0x9a]
+
+
+;==---------------------------------------------------------------------------==
+; Scalar saturating arithmetic
+;==---------------------------------------------------------------------------==
+  uqxtn b4, h2
+  uqxtn h2, s3
+  uqxtn s9, d2
+
+; CHECK: uqxtn b4, h2                  ; encoding: [0x44,0x48,0x21,0x7e]
+; CHECK: uqxtn h2, s3                  ; encoding: [0x62,0x48,0x61,0x7e]
+; CHECK: uqxtn s9, d2                  ; encoding: [0x49,0x48,0xa1,0x7e]
diff --git a/test/MC/ARM64/arm64-fixup.s b/test/MC/ARM64/arm64-fixup.s
new file mode 100644
index 0000000..eae6f68
--- /dev/null
+++ b/test/MC/ARM64/arm64-fixup.s
@@ -0,0 +1,10 @@
+; RUN: llvm-mc < %s -triple arm64-apple-darwin --show-encoding | FileCheck %s
+
+foo:
+  adr x3, Lbar
+; CHECK: adr x3, Lbar            ; encoding: [0x03'A',A,A,0x10'A']
+; CHECK: fixup A - offset: 0, value: Lbar, kind: fixup_arm64_pcrel_adr_imm21
+Lbar:
+  adrp x3, _printf@page
+; CHECK: adrp x3, _printf@PAGE      ; encoding: [0x03'A',A,A,0x90'A']
+; CHECK: fixup A - offset: 0, value: _printf@PAGE, kind: fixup_arm64_pcrel_adrp_imm21
diff --git a/test/MC/ARM64/basic-a64-instructions.s b/test/MC/ARM64/basic-a64-instructions.s
new file mode 100644
index 0000000..99b438d
--- /dev/null
+++ b/test/MC/ARM64/basic-a64-instructions.s
@@ -0,0 +1,18 @@
+// RUN: llvm-mc -triple arm64 -show-encoding < %s | FileCheck %s
+
+        crc32b  w5, w7, w20
+        crc32h  w28, wzr, w30
+        crc32w  w0, w1, w2
+        crc32x  w7, w9, x20
+        crc32cb w9, w5, w4
+        crc32ch w13, w17, w25
+        crc32cw wzr, w3, w5
+        crc32cx w18, w16, xzr
+// CHECK: crc32b   w5, w7, w20             // encoding: [0xe5,0x40,0xd4,0x1a]
+// CHECK: crc32h   w28, wzr, w30           // encoding: [0xfc,0x47,0xde,0x1a]
+// CHECK: crc32w   w0, w1, w2              // encoding: [0x20,0x48,0xc2,0x1a]
+// CHECK: crc32x   w7, w9, x20             // encoding: [0x27,0x4d,0xd4,0x9a]
+// CHECK: crc32cb  w9, w5, w4              // encoding: [0xa9,0x50,0xc4,0x1a]
+// CHECK: crc32ch  w13, w17, w25           // encoding: [0x2d,0x56,0xd9,0x1a]
+// CHECK: crc32cw  wzr, w3, w5             // encoding: [0x7f,0x58,0xc5,0x1a]
+// CHECK: crc32cx  w18, w16, xzr           // encoding: [0x12,0x5e,0xdf,0x9a]
diff --git a/test/MC/ARM64/bitfield-encoding.s b/test/MC/ARM64/bitfield-encoding.s
new file mode 100644
index 0000000..cdbac08
--- /dev/null
+++ b/test/MC/ARM64/bitfield-encoding.s
@@ -0,0 +1,30 @@
+; RUN: llvm-mc -triple arm64-apple-darwin -show-encoding < %s | FileCheck %s
+
+foo:
+;==---------------------------------------------------------------------------==
+; 5.4.4 Bitfield Operations
+;==---------------------------------------------------------------------------==
+
+  bfm  w1, w2, #1, #15
+  bfm  x1, x2, #1, #15
+  sbfm w1, w2, #1, #15
+  sbfm x1, x2, #1, #15
+  ubfm w1, w2, #1, #15
+  ubfm x1, x2, #1, #15
+
+; CHECK: bfm  w1, w2, #1, #15        ; encoding: [0x41,0x3c,0x01,0x33]
+; CHECK: bfm  x1, x2, #1, #15        ; encoding: [0x41,0x3c,0x41,0xb3]
+; CHECK: sbfm w1, w2, #1, #15        ; encoding: [0x41,0x3c,0x01,0x13]
+; CHECK: sbfm x1, x2, #1, #15        ; encoding: [0x41,0x3c,0x41,0x93]
+; CHECK: ubfm w1, w2, #1, #15        ; encoding: [0x41,0x3c,0x01,0x53]
+; CHECK: ubfm x1, x2, #1, #15        ; encoding: [0x41,0x3c,0x41,0xd3]
+
+;==---------------------------------------------------------------------------==
+; 5.4.5 Extract (immediate)
+;==---------------------------------------------------------------------------==
+
+  extr w1, w2, w3, #15
+  extr x2, x3, x4, #1
+
+; CHECK: extr w1, w2, w3, #15        ; encoding: [0x41,0x3c,0x83,0x13]
+; CHECK: extr x2, x3, x4, #1         ; encoding: [0x62,0x04,0xc4,0x93]
diff --git a/test/MC/ARM64/branch-encoding.s b/test/MC/ARM64/branch-encoding.s
new file mode 100644
index 0000000..7857fea
--- /dev/null
+++ b/test/MC/ARM64/branch-encoding.s
@@ -0,0 +1,159 @@
+; RUN: llvm-mc -triple arm64-apple-darwin -show-encoding < %s | FileCheck %s
+
+foo:
+
+;-----------------------------------------------------------------------------
+; Unconditional branch (register) instructions.
+;-----------------------------------------------------------------------------
+
+  ret
+; CHECK: encoding: [0xc0,0x03,0x5f,0xd6]
+  ret x1
+; CHECK: encoding: [0x20,0x00,0x5f,0xd6]
+  drps
+; CHECK: encoding: [0xe0,0x03,0xbf,0xd6]
+  eret
+; CHECK: encoding: [0xe0,0x03,0x9f,0xd6]
+  br  x5
+; CHECK: encoding: [0xa0,0x00,0x1f,0xd6]
+  blr x9
+; CHECK: encoding: [0x20,0x01,0x3f,0xd6]
+  bl  L1
+; CHECK: bl L1   ; encoding: [A,A,A,0b100101AA]
+; CHECK: fixup A - offset: 0, value: L1, kind: fixup_arm64_pcrel_call26
+
+;-----------------------------------------------------------------------------
+; Contitional branch instructions.
+;-----------------------------------------------------------------------------
+
+  b     L1
+; CHECK: b L1      ; encoding: [A,A,A,0b000101AA]
+; CHECK: fixup A - offset: 0, value: L1, kind: fixup_arm64_pcrel_branch26
+  b.eq  L1
+; CHECK: b.eq L1   ; encoding: [0bAAA00000,A,A,0x54]
+; CHECK: fixup A - offset: 0, value: L1, kind: fixup_arm64_pcrel_imm19
+  b.ne  L1
+; CHECK: b.ne L1   ; encoding: [0bAAA00001,A,A,0x54]
+; CHECK: fixup A - offset: 0, value: L1, kind: fixup_arm64_pcrel_imm19
+  b.cs  L1
+; CHECK: b.cs L1   ; encoding: [0bAAA00010,A,A,0x54]
+; CHECK: fixup A - offset: 0, value: L1, kind: fixup_arm64_pcrel_imm19
+  b.cc  L1
+; CHECK: b.cc L1   ; encoding: [0bAAA00011,A,A,0x54]
+; CHECK: fixup A - offset: 0, value: L1, kind: fixup_arm64_pcrel_imm19
+  b.mi  L1
+; CHECK: b.mi L1   ; encoding: [0bAAA00100,A,A,0x54]
+; CHECK: fixup A - offset: 0, value: L1, kind: fixup_arm64_pcrel_imm19
+  b.pl  L1
+; CHECK: b.pl L1   ; encoding: [0bAAA00101,A,A,0x54]
+; CHECK: fixup A - offset: 0, value: L1, kind: fixup_arm64_pcrel_imm19
+  b.vs  L1
+; CHECK: b.vs L1   ; encoding: [0bAAA00110,A,A,0x54]
+; CHECK: fixup A - offset: 0, value: L1, kind: fixup_arm64_pcrel_imm19
+  b.vc  L1
+; CHECK: b.vc L1   ; encoding: [0bAAA00111,A,A,0x54]
+; CHECK: fixup A - offset: 0, value: L1, kind: fixup_arm64_pcrel_imm19
+  b.hi  L1
+; CHECK: b.hi L1   ; encoding: [0bAAA01000,A,A,0x54]
+; CHECK: fixup A - offset: 0, value: L1, kind: fixup_arm64_pcrel_imm19
+  b.ls  L1
+; CHECK: b.ls L1   ; encoding: [0bAAA01001,A,A,0x54]
+; CHECK: fixup A - offset: 0, value: L1, kind: fixup_arm64_pcrel_imm19
+  b.ge  L1
+; CHECK: b.ge L1   ; encoding: [0bAAA01010,A,A,0x54]
+; CHECK: fixup A - offset: 0, value: L1, kind: fixup_arm64_pcrel_imm19
+  b.lt  L1
+; CHECK: b.lt L1   ; encoding: [0bAAA01011,A,A,0x54]
+; CHECK: fixup A - offset: 0, value: L1, kind: fixup_arm64_pcrel_imm19
+  b.gt  L1
+; CHECK: b.gt L1   ; encoding: [0bAAA01100,A,A,0x54]
+; CHECK: fixup A - offset: 0, value: L1, kind: fixup_arm64_pcrel_imm19
+  b.le  L1
+; CHECK: b.le L1   ; encoding: [0bAAA01101,A,A,0x54]
+; CHECK: fixup A - offset: 0, value: L1, kind: fixup_arm64_pcrel_imm19
+  b.al  L1
+; CHECK: b L1      ; encoding: [0bAAA01110,A,A,0x54]
+; CHECK: fixup A - offset: 0, value: L1, kind: fixup_arm64_pcrel_imm19
+L1:
+  b #28
+; CHECK: b #28
+  b.lt #28
+; CHECK: b.lt #28
+  b.cc #1048572
+; CHECK: b.cc	#1048572                ; encoding: [0xe3,0xff,0x7f,0x54]
+  b #134217724
+; CHECK: b	#134217724              ; encoding: [0xff,0xff,0xff,0x15]
+  b #-134217728
+; CHECK: b	#-134217728             ; encoding: [0x00,0x00,0x00,0x16]
+
+;-----------------------------------------------------------------------------
+; Compare-and-branch instructions.
+;-----------------------------------------------------------------------------
+
+  cbz w1, foo
+; CHECK: encoding: [0bAAA00001,A,A,0x34]
+  cbz x1, foo
+; CHECK: encoding: [0bAAA00001,A,A,0xb4]
+  cbnz w2, foo
+; CHECK: encoding: [0bAAA00010,A,A,0x35]
+  cbnz x2, foo
+; CHECK: encoding: [0bAAA00010,A,A,0xb5]
+  cbz w1, #28
+; CHECK: cbz w1, #28
+  cbz     w20, #1048572
+; CHECK: cbz	w20, #1048572           ; encoding: [0xf4,0xff,0x7f,0x34]
+  cbnz x2, #-1048576
+; CHECK: cbnz	x2, #-1048576           ; encoding: [0x02,0x00,0x80,0xb5]
+
+
+;-----------------------------------------------------------------------------
+; Bit-test-and-branch instructions.
+;-----------------------------------------------------------------------------
+
+  tbz x1, #3, foo
+; CHECK: encoding: [0bAAA00001,A,0b00011AAA,0x36]
+  tbnz x1, #63, foo
+; CHECK: encoding: [0bAAA00001,A,0b11111AAA,0xb7]
+
+  tbz w1, #3, foo
+; CHECK: encoding: [0bAAA00001,A,0b00011AAA,0x36]
+  tbnz w1, #31, foo
+; CHECK: encoding: [0bAAA00001,A,0b11111AAA,0x37]
+
+  tbz w1, #3, #28
+; CHECK: tbz w1, #3, #28
+  tbz w3, #5, #32764
+; CHECK: tbz	w3, #5, #32764          ; encoding: [0xe3,0xff,0x2b,0x36]
+  tbnz x3, #8, #-32768
+; CHECK: tbnz	w3, #8, #-32768         ; encoding: [0x03,0x00,0x44,0x37]
+
+;-----------------------------------------------------------------------------
+; Exception generation instructions.
+;-----------------------------------------------------------------------------
+
+  brk   #1
+; CHECK: encoding: [0x20,0x00,0x20,0xd4]
+  dcps1 #2
+; CHECK: encoding: [0x41,0x00,0xa0,0xd4]
+  dcps2 #3
+; CHECK: encoding: [0x62,0x00,0xa0,0xd4]
+  dcps3 #4
+; CHECK: encoding: [0x83,0x00,0xa0,0xd4]
+  hlt   #5
+; CHECK: encoding: [0xa0,0x00,0x40,0xd4]
+  hvc   #6
+; CHECK: encoding: [0xc2,0x00,0x00,0xd4]
+  smc   #7
+; CHECK: encoding: [0xe3,0x00,0x00,0xd4]
+  svc   #8
+; CHECK: encoding: [0x01,0x01,0x00,0xd4]
+
+; The immediate defaults to zero for DCPSn
+  dcps1
+  dcps2
+  dcps3
+
+; CHECK: dcps1                     ; encoding: [0x01,0x00,0xa0,0xd4]
+; CHECK: dcps2                     ; encoding: [0x02,0x00,0xa0,0xd4]
+; CHECK: dcps3                     ; encoding: [0x03,0x00,0xa0,0xd4]
+
diff --git a/test/MC/ARM64/crypto.s b/test/MC/ARM64/crypto.s
new file mode 100644
index 0000000..d7c4ec3
--- /dev/null
+++ b/test/MC/ARM64/crypto.s
@@ -0,0 +1,66 @@
+; RUN: llvm-mc -triple arm64-apple-darwin -show-encoding -output-asm-variant=1 < %s | FileCheck %s
+
+foo:
+  aese.16b v0, v1
+  aesd.16b v0, v1
+  aesmc.16b v0, v1
+  aesimc.16b v0, v1
+
+  sha1c.4s q0, s1, v2
+  sha1p.4s q0, s1, v2
+  sha1m.4s q0, s1, v2
+  sha1su0.4s v0, v1, v2
+  sha256h.4s q0, q1, v2
+  sha256h2.4s q0, q1, v2
+  sha256su1.4s v0, v1, v2
+  sha1h s0, s1
+  sha1su1.4s v0, v1
+  sha256su0.4s v0, v1
+
+; CHECK: aese.16b v0, v1               ; encoding: [0x20,0x48,0x28,0x4e]
+; CHECK: aesd.16b v0, v1               ; encoding: [0x20,0x58,0x28,0x4e]
+; CHECK: aesmc.16b v0, v1              ; encoding: [0x20,0x68,0x28,0x4e]
+; CHECK: aesimc.16b v0, v1             ; encoding: [0x20,0x78,0x28,0x4e]
+
+; CHECK: sha1c.4s q0, s1, v2           ; encoding: [0x20,0x00,0x02,0x5e]
+; CHECK: sha1p.4s q0, s1, v2           ; encoding: [0x20,0x10,0x02,0x5e]
+; CHECK: sha1m.4s q0, s1, v2           ; encoding: [0x20,0x20,0x02,0x5e]
+; CHECK: sha1su0.4s v0, v1, v2         ; encoding: [0x20,0x30,0x02,0x5e]
+; CHECK: sha256h.4s q0, q1, v2         ; encoding: [0x20,0x40,0x02,0x5e]
+; CHECK: sha256h2.4s q0, q1, v2        ; encoding: [0x20,0x50,0x02,0x5e]
+; CHECK: sha256su1.4s v0, v1, v2       ; encoding: [0x20,0x60,0x02,0x5e]
+; CHECK: sha1h s0, s1                  ; encoding: [0x20,0x08,0x28,0x5e]
+; CHECK: sha1su1.4s v0, v1             ; encoding: [0x20,0x18,0x28,0x5e]
+; CHECK: sha256su0.4s v0, v1           ; encoding: [0x20,0x28,0x28,0x5e]
+
+  aese v2.16b, v3.16b
+  aesd v5.16b, v7.16b
+  aesmc v11.16b, v13.16b
+  aesimc v17.16b, v19.16b
+
+; CHECK: aese.16b v2, v3            ; encoding: [0x62,0x48,0x28,0x4e]
+; CHECK: aesd.16b v5, v7            ; encoding: [0xe5,0x58,0x28,0x4e]
+; CHECK: aesmc.16b v11, v13         ; encoding: [0xab,0x69,0x28,0x4e]
+; CHECK: aesimc.16b v17, v19        ; encoding: [0x71,0x7a,0x28,0x4e]
+
+  sha1c q23, s29, v3.4s
+  sha1p q14, s15, v9.4s
+  sha1m q2, s6, v5.4s
+  sha1su0 v3.4s, v5.4s, v9.4s
+  sha256h q2, q7, v18.4s
+  sha256h2 q28, q18, v28.4s
+  sha256su1 v4.4s, v5.4s, v9.4s
+  sha1h s30, s0
+  sha1su1 v10.4s, v21.4s
+  sha256su0 v2.4s, v31.4s
+
+; CHECK: sha1c.4s q23, s29, v3       ; encoding: [0xb7,0x03,0x03,0x5e]
+; CHECK: sha1p.4s q14, s15, v9       ; encoding: [0xee,0x11,0x09,0x5e]
+; CHECK: sha1m.4s q2, s6, v5         ; encoding: [0xc2,0x20,0x05,0x5e]
+; CHECK: sha1su0.4s v3, v5, v9       ; encoding: [0xa3,0x30,0x09,0x5e]
+; CHECK: sha256h.4s q2, q7, v18      ; encoding: [0xe2,0x40,0x12,0x5e]
+; CHECK: sha256h2.4s q28, q18, v28   ; encoding: [0x5c,0x52,0x1c,0x5e]
+; CHECK: sha256su1.4s v4, v5, v9     ; encoding: [0xa4,0x60,0x09,0x5e]
+; CHECK: sha1h s30, s0               ; encoding: [0x1e,0x08,0x28,0x5e]
+; CHECK: sha1su1.4s v10, v21         ; encoding: [0xaa,0x1a,0x28,0x5e]
+; CHECK: sha256su0.4s v2, v31        ; encoding: [0xe2,0x2b,0x28,0x5e]
diff --git a/test/MC/ARM64/diags.s b/test/MC/ARM64/diags.s
new file mode 100644
index 0000000..d857fe1
--- /dev/null
+++ b/test/MC/ARM64/diags.s
@@ -0,0 +1,242 @@
+; RUN: not llvm-mc -triple arm64-apple-darwin -show-encoding < %s 2> %t | FileCheck %s
+; RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s
+
+foo:
+
+; The first should encode as an expression. The second should error expecting
+; a register.
+  ldr x3, (foo + 4)
+  ldr x3, [foo + 4]
+; CHECK:  ldr x3, foo+4               ; encoding: [0bAAA00011,A,A,0x58]
+; CHECK:                              ;   fixup A - offset: 0, value: foo+4, kind: fixup_arm64_pcrel_imm19
+; CHECK-ERRORS: error: register expected
+
+; The last argument should be flagged as an error.  rdar://9576009
+  ld4.8b	{v0, v1, v2, v3}, [x0], #33
+; CHECK-ERRORS: error: invalid operand for instruction
+; CHECK-ERRORS: ld4.8b	{v0, v1, v2, v3}, [x0], #33
+
+
+        ldr x0, [x0, #804]
+        ldr w0, [x0, #802]
+        ldr x0, [x0, #804]!
+        ldr w0, [w0, #301]!
+        ldr x0, [x0], #804
+        ldr w0, [w0], #301
+
+        ldp w3, w4, [x5, #11]!
+        ldp x3, x4, [x5, #12]!
+        ldp q3, q4, [x5, #12]!
+        ldp w3, w4, [x5], #11
+        ldp x3, x4, [x5], #12
+        ldp q3, q4, [x5], #12
+
+        ldur x0, [x1, #-257]
+
+; CHECK-ERRORS: error: index must be a multiple of 8 in range [0,32760].
+; CHECK-ERRORS:         ldr x0, [x0, #804]
+; CHECK-ERRORS:                 ^
+; CHECK-ERRORS: error: index must be a multiple of 4 in range [0,16380].
+; CHECK-ERRORS:         ldr w0, [x0, #802]
+; CHECK-ERRORS:                 ^
+; CHECK-ERRORS: error: index must be an integer in range [-256,255].
+; CHECK-ERRORS:         ldr x0, [x0, #804]!
+; CHECK-ERRORS:                 ^
+; CHECK-ERRORS: error: index must be an integer in range [-256,255].
+; CHECK-ERRORS:         ldr w0, [w0, #301]!
+; CHECK-ERRORS:                 ^
+; CHECK-ERRORS: error: index must be an integer in range [-256,255].
+; CHECK-ERRORS:         ldr x0, [x0], #804
+; CHECK-ERRORS:                       ^
+; CHECK-ERRORS: error: index must be an integer in range [-256,255].
+; CHECK-ERRORS:         ldr w0, [w0], #301
+; CHECK-ERRORS:                       ^
+; CHECK-ERRORS: error: index must be a multiple of 4 in range [-256,252].
+; CHECK-ERRORS:         ldp w3, w4, [x5, #11]!
+; CHECK-ERRORS:                     ^
+; CHECK-ERRORS: error: index must be a multiple of 8 in range [-512,504].
+; CHECK-ERRORS:         ldp x3, x4, [x5, #12]!
+; CHECK-ERRORS:                     ^
+; CHECK-ERRORS: error: index must be a multiple of 16 in range [-1024,1008].
+; CHECK-ERRORS:         ldp q3, q4, [x5, #12]!
+; CHECK-ERRORS:                     ^
+; CHECK-ERRORS: error: index must be a multiple of 4 in range [-256,252].
+; CHECK-ERRORS:         ldp w3, w4, [x5], #11
+; CHECK-ERRORS:                           ^
+; CHECK-ERRORS: error: index must be a multiple of 8 in range [-512,504].
+; CHECK-ERRORS:         ldp x3, x4, [x5], #12
+; CHECK-ERRORS:                           ^
+; CHECK-ERRORS: error: index must be a multiple of 8 in range [-512,504].
+; CHECK-ERRORS:         ldp q3, q4, [x5], #12
+; CHECK-ERRORS:                           ^
+; CHECK-ERRORS: error: index must be an integer in range [-256,255].
+; CHECK-ERRORS:         ldur x0, [x1, #-257]
+; CHECK-ERRORS:                   ^
+
+
+
+; Shift immediates range checking.
+  sqrshrn b4, h9, #10
+  rshrn v9.8b, v11.8h, #17
+  sqrshrn v7.4h, v8.4s, #39
+  uqshrn2 v4.4s, v5.2d, #67
+
+; CHECK-ERRORS: error: immediate must be an integer in range [1,8].
+; CHECK-ERRORS:   sqrshrn b4, h9, #10
+; CHECK-ERRORS:                   ^
+; CHECK-ERRORS: error: immediate must be an integer in range [1,8].
+; CHECK-ERRORS:   rshrn v9.8b, v11.8h, #17
+; CHECK-ERRORS:                        ^
+; CHECK-ERRORS: error: immediate must be an integer in range [1,16].
+; CHECK-ERRORS:   sqrshrn v7.4h, v8.4s, #39
+; CHECK-ERRORS:                         ^
+; CHECK-ERRORS: error: immediate must be an integer in range [1,32].
+; CHECK-ERRORS:   uqshrn2 v4.4s, v5.2d, #67
+; CHECK-ERRORS:                         ^
+
+
+  st1.s4 {v14, v15}, [x2], #32
+; CHECK-ERRORS: error: invalid type suffix for instruction
+; CHECK-ERRORS: st1.s4 {v14, v15}, [x2], #32
+; CHECK-ERRORS:     ^
+
+
+
+; Load pair instructions where Rt==Rt2 and writeback load/store instructions
+; where Rt==Rn or Rt2==Rn are unpredicatable.
+  ldp x1, x2, [x2], #16
+  ldp x2, x2, [x2], #16
+  ldp w1, w2, [x2], #16
+  ldp w2, w2, [x2], #16
+  ldp x1, x1, [x2]
+
+  ldr x2, [x2], #8
+  ldr x2, [x2, #8]!
+  ldr w2, [x2], #8
+  ldr w2, [x2, #8]!
+
+  str x2, [x2], #8
+  str x2, [x2, #8]!
+  str w2, [x2], #8
+  str w2, [x2, #8]!
+
+; CHECK-ERRORS: error: unpredictable LDP instruction, writeback base is also a destination
+; CHECK-ERRORS:   ldp x1, x2, [x2], #16
+; CHECK-ERRORS:           ^
+; CHECK-ERRORS: error: unpredictable LDP instruction, writeback base is also a destination
+; CHECK-ERRORS:   ldp x2, x2, [x2], #16
+; CHECK-ERRORS:       ^
+; CHECK-ERRORS: error: unpredictable LDP instruction, writeback base is also a destination
+; CHECK-ERRORS:   ldp w1, w2, [x2], #16
+; CHECK-ERRORS:           ^
+; CHECK-ERRORS: error: unpredictable LDP instruction, writeback base is also a destination
+; CHECK-ERRORS:   ldp w2, w2, [x2], #16
+; CHECK-ERRORS:       ^
+; CHECK-ERRORS: error: unpredictable LDP instruction, Rt2==Rt
+; CHECK-ERRORS:   ldp x1, x1, [x2]
+; CHECK-ERRORS:           ^
+; CHECK-ERRORS: error: unpredictable LDR instruction, writeback base is also a source
+; CHECK-ERRORS:   ldr x2, [x2], #8
+; CHECK-ERRORS:       ^
+; CHECK-ERRORS: error: unpredictable LDR instruction, writeback base is also a source
+; CHECK-ERRORS:   ldr x2, [x2, #8]!
+; CHECK-ERRORS:       ^
+; CHECK-ERRORS: error: unpredictable LDR instruction, writeback base is also a source
+; CHECK-ERRORS:   ldr w2, [x2], #8
+; CHECK-ERRORS:       ^
+; CHECK-ERRORS: error: unpredictable LDR instruction, writeback base is also a source
+; CHECK-ERRORS:   ldr w2, [x2, #8]!
+; CHECK-ERRORS:       ^
+; CHECK-ERRORS: error: unpredictable STR instruction, writeback base is also a source
+; CHECK-ERRORS:   str x2, [x2], #8
+; CHECK-ERRORS:       ^
+; CHECK-ERRORS: error: unpredictable STR instruction, writeback base is also a source
+; CHECK-ERRORS:   str x2, [x2, #8]!
+; CHECK-ERRORS:       ^
+; CHECK-ERRORS: error: unpredictable STR instruction, writeback base is also a source
+; CHECK-ERRORS:   str w2, [x2], #8
+; CHECK-ERRORS:       ^
+; CHECK-ERRORS: error: unpredictable STR instruction, writeback base is also a source
+; CHECK-ERRORS:   str w2, [x2, #8]!
+; CHECK-ERRORS:       ^
+
+; The validity checking for shifted-immediate operands.  rdar://13174476
+; Where the immediate is out of range.
+  add w1, w2, w3, lsr #75
+
+; CHECK-ERRORS: error: immediate value too large for shifter operand
+; CHECK-ERRORS: add w1, w2, w3, lsr #75
+; CHECK-ERRORS:                      ^
+
+; logical instructions on 32-bit regs with shift > 31 is not legal
+orr w0, w0, w0, lsl #32
+; CHECK-ERRORS: error: shift value out of range
+; CHECK-ERRORS:        orr w0, w0, w0, lsl #32
+; CHECK-ERRORS:                        ^
+eor w0, w0, w0, lsl #32
+; CHECK-ERRORS: error: shift value out of range
+; CHECK-ERRORS:        eor w0, w0, w0, lsl #32
+; CHECK-ERRORS:                        ^
+and w0, w0, w0, lsl #32
+; CHECK-ERRORS: error: shift value out of range
+; CHECK-ERRORS:        and w0, w0, w0, lsl #32
+; CHECK-ERRORS:                        ^
+ands w0, w0, w0, lsl #32
+; CHECK-ERRORS: error: shift value out of range
+; CHECK-ERRORS:        ands w0, w0, w0, lsl #32
+; CHECK-ERRORS:                        ^
+
+; Relocated expressions should not be accepted for 32-bit adds or sub (imm)
+add w3, w5, sym@PAGEOFF
+; CHECK-ERRORS: error: invalid immediate expression
+; CHECK-ERRORS: add w3, w5, sym@PAGEOFF
+; CHECK-ERRORS:             ^
+
+adds w3, w5, sym@PAGEOFF
+adds x9, x12, sym@PAGEOFF
+; CHECK-ERRORS: error: invalid immediate expression
+; CHECK-ERRORS: adds w3, w5, sym@PAGEOFF
+; CHECK-ERRORS:              ^
+; CHECK-ERRORS: error: invalid immediate expression
+; CHECK-ERRORS: adds x9, x12, sym@PAGEOFF
+; CHECK-ERRORS:               ^
+
+sub x3, x5, sym@PAGEOFF
+sub w20, w30, sym@PAGEOFF
+; CHECK-ERRORS: error: invalid immediate expression
+; CHECK-ERRORS: sub x3, x5, sym@PAGEOFF
+; CHECK-ERRORS:             ^
+; CHECK-ERRORS: error: invalid immediate expression
+; CHECK-ERRORS: sub w20, w30, sym@PAGEOFF
+; CHECK-ERRORS:               ^
+
+subs w9, w10, sym@PAGEOFF
+subs x20, x30, sym@PAGEOFF
+; CHECK-ERRORS: error: invalid immediate expression
+; CHECK-ERRORS: subs w9, w10, sym@PAGEOFF
+; CHECK-ERRORS:               ^
+; CHECK-ERRORS: error: invalid immediate expression
+; CHECK-ERRORS: subs x20, x30, sym@PAGEOFF
+; CHECK-ERRORS:                ^
+
+tbl v0.8b, { v1 }, v0.8b
+tbl v0.16b, { v1.8b, v2.8b, v3.8b }, v0.16b
+tbx v3.16b, { v12.8b, v13.8b, v14.8b }, v6.8b
+tbx v2.8b, { v0 }, v6.8b
+; CHECK-ERRORS: error: invalid operand for instruction
+; CHECK-ERRORS: tbl v0.8b, { v1 }, v0.8b
+; CHECK-ERRORS:            ^
+; CHECK-ERRORS: error: invalid operand for instruction
+; CHECK-ERRORS: tbl v0.16b, { v1.8b, v2.8b, v3.8b }, v0.16b
+; CHECK-ERRORS:             ^
+; CHECK-ERRORS: error: invalid operand for instruction
+; CHECK-ERRORS: tbx v3.16b, { v12.8b, v13.8b, v14.8b }, v6.8b
+; CHECK-ERRORS:             ^
+; CHECK-ERRORS: error: invalid operand for instruction
+; CHECK-ERRORS: tbx v2.8b, { v0 }, v6.8b
+; CHECK-ERRORS:            ^
+
+b.c #0x4
+; CHECK-ERRORS: error: invalid condition code
+; CHECK-ERRORS: b.c #0x4
+; CHECK-ERRORS:   ^
diff --git a/test/MC/ARM64/directive_loh.s b/test/MC/ARM64/directive_loh.s
new file mode 100644
index 0000000..76d2d7f
--- /dev/null
+++ b/test/MC/ARM64/directive_loh.s
@@ -0,0 +1,93 @@
+# RUN: not llvm-mc -triple arm64-apple-darwin < %s 2> %t | FileCheck %s
+# RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s
+
+.globl _fct1
+_fct1:
+  L1:
+  L2:
+  L3:
+  L4:
+  ret lr;
+
+# Known LOHs with:
+# - Regular syntax.
+# - Alternative syntax.
+
+# CHECK: .loh AdrpAdrp L1, L2
+# CHECK: .loh AdrpAdrp L1, L2
+.loh AdrpAdrp L1, L2
+.loh 1 L1, L2
+
+# CHECK: .loh AdrpLdr L1, L2
+# CHECK: .loh AdrpLdr L1, L2
+.loh AdrpLdr L1, L2
+.loh 2 L1, L2
+
+# CHECK: .loh AdrpAddLdr L1, L2, L3
+# CHECK: .loh AdrpAddLdr L1, L2, L3
+.loh AdrpAddLdr L1, L2, L3
+.loh 3 L1, L2, L3
+
+# CHECK: .loh AdrpLdrGotLdr L1, L2, L3
+# CHECK: .loh AdrpLdrGotLdr L1, L2, L3
+.loh AdrpLdrGotLdr L1, L2, L3
+.loh 4 L1, L2, L3
+
+# CHECK: .loh AdrpAddStr L1, L2, L3
+# CHECK: .loh AdrpAddStr L1, L2, L3
+.loh AdrpAddStr L1, L2, L3
+.loh 5 L1, L2, L3
+
+# CHECK: .loh AdrpLdrGotStr L1, L2, L3
+# CHECK: .loh AdrpLdrGotStr L1, L2, L3
+.loh AdrpLdrGotStr L1, L2, L3
+.loh 6 L1, L2, L3
+
+# CHECK: .loh AdrpAdd L1, L2
+# CHECK: .loh AdrpAdd L1, L2
+.loh AdrpAdd L1, L2
+.loh 7 L1, L2
+
+# CHECK: .loh AdrpLdrGot L1, L2
+# CHECK: .loh AdrpLdrGot L1, L2
+.loh AdrpLdrGot L1, L2
+.loh 8 L1, L2
+
+# End Known LOHs.
+
+### Errors Check ####
+
+# Unknown textual identifier.
+# CHECK-ERRORS: error: invalid identifier in directive
+# CHECK-ERRORS-NEXT: .loh Unknown
+# CHECK-ERRORS-NEXT:      ^
+.loh Unknown
+# Unknown numeric identifier.
+# CHECK-ERRORS: error: invalid numeric identifier in directive
+# CHECK-ERRORS-NEXT: .loh 153, L1
+# CHECK-ERRORS-NEXT:      ^
+.loh 153, L1
+
+# Too much arguments.
+# CHECK-ERRORS: error: unexpected token in '.loh' directive
+# CHECK-ERRORS-NEXT: .loh AdrpAdrp L1, L2, L3
+# CHECK-ERRORS-NEXT:                     ^
+.loh AdrpAdrp L1, L2, L3
+
+# Too much arguments with alternative syntax.
+# CHECK-ERRORS: error: unexpected token in '.loh' directive
+# CHECK-ERRORS-NEXT: .loh 1 L1, L2, L3
+# CHECK-ERRORS-NEXT:              ^
+.loh 1 L1, L2, L3
+
+# Too few argumets.
+# CHECK-ERRORS: error: unexpected token in '.loh' directive
+# CHECK-ERRORS-NEXT: .loh AdrpAdrp L1
+# CHECK-ERRORS-NEXT:                 ^
+.loh AdrpAdrp L1
+
+# Too few argumets with alternative syntax.
+# CHECK-ERRORS: error: unexpected token in '.loh' directive
+# CHECK-ERRORS-NEXT: .loh 1 L1
+# CHECK-ERRORS-NEXT:          ^
+.loh 1 L1
diff --git a/test/MC/ARM64/elf-relocs.s b/test/MC/ARM64/elf-relocs.s
new file mode 100644
index 0000000..31446ff
--- /dev/null
+++ b/test/MC/ARM64/elf-relocs.s
@@ -0,0 +1,249 @@
+// RUN: llvm-mc -triple=arm64-linux-gnu -o - < %s | FileCheck %s
+// RUN: llvm-mc -triple=arm64-linux-gnu -filetype=obj < %s | llvm-objdump -triple=arm64-linux-gnu - -r | FileCheck %s --check-prefix=CHECK-OBJ
+
+   add x0, x2, #:lo12:sym
+// CHECK: add x0, x2, :lo12:sym
+// CHECK-OBJ: 0 R_AARCH64_ADD_ABS_LO12_NC sym
+
+   add x5, x7, #:dtprel_lo12:sym
+// CHECK: add x5, x7, :dtprel_lo12:sym
+// CHECK-OBJ: 4 R_AARCH64_TLSLD_ADD_DTPREL_LO12 sym
+
+   add x9, x12, #:dtprel_lo12_nc:sym
+// CHECK: add x9, x12, :dtprel_lo12_nc:sym
+// CHECK-OBJ: 8 R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC sym
+
+   add x20, x30, #:tprel_lo12:sym
+// CHECK: add x20, lr, :tprel_lo12:sym
+// CHECK-OBJ: c R_AARCH64_TLSLE_ADD_TPREL_LO12 sym
+
+   add x9, x12, #:tprel_lo12_nc:sym
+// CHECK: add x9, x12, :tprel_lo12_nc:sym
+// CHECK-OBJ: 10 R_AARCH64_TLSLE_ADD_TPREL_LO12_NC sym
+
+   add x5, x0, #:tlsdesc_lo12:sym
+// CHECK: add x5, x0, :tlsdesc_lo12:sym
+// CHECK-OBJ: 14 R_AARCH64_TLSDESC_ADD_LO12_NC sym
+
+        add x0, x2, #:lo12:sym+8
+// CHECK: add x0, x2, :lo12:sym
+// CHECK-OBJ: 18 R_AARCH64_ADD_ABS_LO12_NC sym+8
+
+   add x5, x7, #:dtprel_lo12:sym+1
+// CHECK: add x5, x7, :dtprel_lo12:sym+1
+// CHECK-OBJ: 1c R_AARCH64_TLSLD_ADD_DTPREL_LO12 sym+1
+
+   add x9, x12, #:dtprel_lo12_nc:sym+2
+// CHECK: add x9, x12, :dtprel_lo12_nc:sym+2
+// CHECK-OBJ:20 R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC sym+2
+
+   add x20, x30, #:tprel_lo12:sym+12
+// CHECK: add x20, lr, :tprel_lo12:sym+12
+// CHECK-OBJ: 24 R_AARCH64_TLSLE_ADD_TPREL_LO12 sym+12
+
+   add x9, x12, #:tprel_lo12_nc:sym+54
+// CHECK: add x9, x12, :tprel_lo12_nc:sym+54
+// CHECK-OBJ: 28 R_AARCH64_TLSLE_ADD_TPREL_LO12_NC sym+54
+
+   add x5, x0, #:tlsdesc_lo12:sym+70
+// CHECK: add x5, x0, :tlsdesc_lo12:sym+70
+// CHECK-OBJ: 2c R_AARCH64_TLSDESC_ADD_LO12_NC sym+70
+
+        .hword sym + 4 - .
+// CHECK-OBJ: 30 R_AARCH64_PREL16 sym+4
+        .word sym - . + 8
+// CHECK-OBJ: 32 R_AARCH64_PREL32 sym+8
+        .xword sym-.
+// CHECK-OBJ: 36 R_AARCH64_PREL64 sym{{$}}
+
+        .hword sym
+// CHECK-OBJ: 3e R_AARCH64_ABS16 sym
+        .word sym+1
+// CHECK-OBJ: 40 R_AARCH64_ABS32 sym+1
+        .xword sym+16
+// CHECK-OBJ: 44 R_AARCH64_ABS64 sym+16
+
+   adrp x0, sym
+// CHECK: adrp x0, sym
+// CHECK-OBJ: 4c R_AARCH64_ADR_PREL_PG_HI21 sym
+
+   adrp x15, :got:sym
+// CHECK: adrp x15, :got:sym
+// CHECK-OBJ: 50 R_AARCH64_ADR_GOT_PAGE sym
+
+   adrp x29, :gottprel:sym
+// CHECK: adrp fp, :gottprel:sym
+// CHECK-OBJ: 54 R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 sym
+
+   adrp x2, :tlsdesc:sym
+// CHECK: adrp x2, :tlsdesc:sym
+// CHECK-OBJ: 58 R_AARCH64_TLSDESC_ADR_PAGE sym
+
+   // LLVM is not competent enough to do this relocation because the
+   // page boundary could occur anywhere after linking. A relocation
+   // is needed.
+   adrp x3, trickQuestion
+   .global trickQuestion
+trickQuestion:
+// CHECK: adrp x3, trickQuestion
+// CHECK-OBJ: 5c R_AARCH64_ADR_PREL_PG_HI21 trickQuestion
+
+   ldrb w2, [x3, #:lo12:sym]
+   ldrsb w5, [x7, #:lo12:sym]
+   ldrsb x11, [x13, #:lo12:sym]
+   ldr b17, [x19, #:lo12:sym]
+// CHECK: ldrb w2, [x3, :lo12:sym]
+// CHECK: ldrsb w5, [x7, :lo12:sym]
+// CHECK: ldrsb x11, [x13, :lo12:sym]
+// CHECK: ldr b17, [x19, :lo12:sym]
+// CHECK-OBJ: R_AARCH64_LDST8_ABS_LO12_NC sym
+// CHECK-OBJ: R_AARCH64_LDST8_ABS_LO12_NC sym
+// CHECK-OBJ: R_AARCH64_LDST8_ABS_LO12_NC sym
+// CHECK-OBJ: R_AARCH64_LDST8_ABS_LO12_NC sym
+
+   ldrb w23, [x29, #:dtprel_lo12_nc:sym]
+   ldrsb w23, [x19, #:dtprel_lo12:sym]
+   ldrsb x17, [x13, #:dtprel_lo12_nc:sym]
+   ldr b11, [x7, #:dtprel_lo12:sym]
+// CHECK: ldrb w23, [fp, :dtprel_lo12_nc:sym]
+// CHECK: ldrsb w23, [x19, :dtprel_lo12:sym]
+// CHECK: ldrsb x17, [x13, :dtprel_lo12_nc:sym]
+// CHECK: ldr b11, [x7, :dtprel_lo12:sym]
+// CHECK-OBJ: R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC sym
+// CHECK-OBJ: R_AARCH64_TLSLD_LDST8_DTPREL_LO12 sym
+// CHECK-OBJ: R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC sym
+// CHECK-OBJ: R_AARCH64_TLSLD_LDST8_DTPREL_LO12 sym
+
+   ldrb w1, [x2, #:tprel_lo12:sym]
+   ldrsb w3, [x4, #:tprel_lo12_nc:sym]
+   ldrsb x5, [x6, #:tprel_lo12:sym]
+   ldr b7, [x8, #:tprel_lo12_nc:sym]
+// CHECK: ldrb w1, [x2, :tprel_lo12:sym]
+// CHECK: ldrsb w3, [x4, :tprel_lo12_nc:sym]
+// CHECK: ldrsb x5, [x6, :tprel_lo12:sym]
+// CHECK: ldr b7, [x8, :tprel_lo12_nc:sym]
+// CHECK-OBJ: R_AARCH64_TLSLE_LDST8_TPREL_LO12 sym
+// CHECK-OBJ: R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC sym
+// CHECK-OBJ: R_AARCH64_TLSLE_LDST8_TPREL_LO12 sym
+// CHECK-OBJ: R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC sym
+
+   ldrh w2, [x3, #:lo12:sym]
+   ldrsh w5, [x7, #:lo12:sym]
+   ldrsh x11, [x13, #:lo12:sym]
+   ldr h17, [x19, #:lo12:sym]
+// CHECK: ldrh w2, [x3, :lo12:sym]
+// CHECK: ldrsh w5, [x7, :lo12:sym]
+// CHECK: ldrsh x11, [x13, :lo12:sym]
+// CHECK: ldr h17, [x19, :lo12:sym]
+// CHECK-OBJ: R_AARCH64_LDST16_ABS_LO12_NC sym
+// CHECK-OBJ: R_AARCH64_LDST16_ABS_LO12_NC sym
+// CHECK-OBJ: R_AARCH64_LDST16_ABS_LO12_NC sym
+// CHECK-OBJ: R_AARCH64_LDST16_ABS_LO12_NC sym
+
+   ldrh w23, [x29, #:dtprel_lo12_nc:sym]
+   ldrsh w23, [x19, #:dtprel_lo12:sym]
+   ldrsh x17, [x13, #:dtprel_lo12_nc:sym]
+   ldr h11, [x7, #:dtprel_lo12:sym]
+// CHECK: ldrh w23, [fp, :dtprel_lo12_nc:sym]
+// CHECK: ldrsh w23, [x19, :dtprel_lo12:sym]
+// CHECK: ldrsh x17, [x13, :dtprel_lo12_nc:sym]
+// CHECK: ldr h11, [x7, :dtprel_lo12:sym]
+// CHECK-OBJ: R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC sym
+// CHECK-OBJ: R_AARCH64_TLSLD_LDST16_DTPREL_LO12 sym
+// CHECK-OBJ: R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC sym
+// CHECK-OBJ: R_AARCH64_TLSLD_LDST16_DTPREL_LO12 sym
+
+   ldrh w1, [x2, #:tprel_lo12:sym]
+   ldrsh w3, [x4, #:tprel_lo12_nc:sym]
+   ldrsh x5, [x6, #:tprel_lo12:sym]
+   ldr h7, [x8, #:tprel_lo12_nc:sym]
+// CHECK: ldrh w1, [x2, :tprel_lo12:sym]
+// CHECK: ldrsh w3, [x4, :tprel_lo12_nc:sym]
+// CHECK: ldrsh x5, [x6, :tprel_lo12:sym]
+// CHECK: ldr h7, [x8, :tprel_lo12_nc:sym]
+// CHECK-OBJ: R_AARCH64_TLSLE_LDST16_TPREL_LO12 sym
+// CHECK-OBJ: R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC sym
+// CHECK-OBJ: R_AARCH64_TLSLE_LDST16_TPREL_LO12 sym
+// CHECK-OBJ: R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC sym
+
+   ldr w1, [x2, #:lo12:sym]
+   ldrsw x3, [x4, #:lo12:sym]
+   ldr s4, [x5, #:lo12:sym]
+// CHECK: ldr w1, [x2, :lo12:sym]
+// CHECK: ldrsw x3, [x4, :lo12:sym]
+// CHECK: ldr s4, [x5, :lo12:sym]
+// CHECK-OBJ: R_AARCH64_LDST32_ABS_LO12_NC sym
+// CHECK-OBJ: R_AARCH64_LDST32_ABS_LO12_NC sym
+// CHECK-OBJ: R_AARCH64_LDST32_ABS_LO12_NC sym
+
+   ldr w1, [x2, #:dtprel_lo12:sym]
+   ldrsw x3, [x4, #:dtprel_lo12_nc:sym]
+   ldr s4, [x5, #:dtprel_lo12_nc:sym]
+// CHECK: ldr w1, [x2, :dtprel_lo12:sym]
+// CHECK: ldrsw x3, [x4, :dtprel_lo12_nc:sym]
+// CHECK: ldr s4, [x5, :dtprel_lo12_nc:sym]
+// CHECK-OBJ: R_AARCH64_TLSLD_LDST32_DTPREL_LO12 sym
+// CHECK-OBJ: R_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC sym
+// CHECK-OBJ: R_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC sym
+
+
+   ldr w1, [x2, #:tprel_lo12:sym]
+   ldrsw x3, [x4, #:tprel_lo12_nc:sym]
+   ldr s4, [x5, #:tprel_lo12_nc:sym]
+// CHECK: ldr w1, [x2, :tprel_lo12:sym]
+// CHECK: ldrsw x3, [x4, :tprel_lo12_nc:sym]
+// CHECK: ldr s4, [x5, :tprel_lo12_nc:sym]
+// CHECK-OBJ: R_AARCH64_TLSLE_LDST32_TPREL_LO12 sym
+// CHECK-OBJ: R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC sym
+// CHECK-OBJ: R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC sym
+
+   ldr x28, [x27, #:lo12:sym]
+   ldr d26, [x25, #:lo12:sym]
+// CHECK: ldr x28, [x27, :lo12:sym]
+// CHECK: ldr d26, [x25, :lo12:sym]
+// CHECK-OBJ: R_AARCH64_LDST64_ABS_LO12_NC sym
+// CHECK-OBJ: R_AARCH64_LDST64_ABS_LO12_NC sym
+
+   ldr x24, [x23, #:got_lo12:sym]
+   ldr d22, [x21, #:got_lo12:sym]
+// CHECK: ldr x24, [x23, :got_lo12:sym]
+// CHECK: ldr d22, [x21, :got_lo12:sym]
+// CHECK-OBJ: R_AARCH64_LD64_GOT_LO12_NC sym
+// CHECK-OBJ: R_AARCH64_LD64_GOT_LO12_NC sym
+
+   ldr x24, [x23, #:dtprel_lo12_nc:sym]
+   ldr d22, [x21, #:dtprel_lo12:sym]
+// CHECK: ldr x24, [x23, :dtprel_lo12_nc:sym]
+// CHECK: ldr d22, [x21, :dtprel_lo12:sym]
+// CHECK-OBJ: R_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC sym
+// CHECK-OBJ: R_AARCH64_TLSLD_LDST64_DTPREL_LO12 sym
+
+   ldr x24, [x23, #:tprel_lo12:sym]
+   ldr d22, [x21, #:tprel_lo12_nc:sym]
+// CHECK: ldr x24, [x23, :tprel_lo12:sym]
+// CHECK: ldr d22, [x21, :tprel_lo12_nc:sym]
+// CHECK-OBJ: R_AARCH64_TLSLE_LDST64_TPREL_LO12 sym
+// CHECK-OBJ: R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC sym
+
+   ldr x24, [x23, #:gottprel_lo12:sym]
+   ldr d22, [x21, #:gottprel_lo12:sym]
+// CHECK: ldr x24, [x23, :gottprel_lo12:sym]
+// CHECK: ldr d22, [x21, :gottprel_lo12:sym]
+// CHECK-OBJ: R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC sym
+// CHECK-OBJ: R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC sym
+
+   ldr x24, [x23, #:tlsdesc_lo12:sym]
+   ldr d22, [x21, #:tlsdesc_lo12:sym]
+// CHECK: ldr x24, [x23, :tlsdesc_lo12:sym]
+// CHECK: ldr d22, [x21, :tlsdesc_lo12:sym]
+// CHECK-OBJ: R_AARCH64_TLSDESC_LD64_LO12_NC sym
+// CHECK-OBJ: R_AARCH64_TLSDESC_LD64_LO12_NC sym
+
+   ldr q20, [x19, #:lo12:sym]
+// CHECK: ldr q20, [x19, :lo12:sym]
+// CHECK-OBJ: R_AARCH64_LDST128_ABS_LO12_NC sym
+
+// Since relocated instructions print without a '#', that syntax should
+// certainly be accepted when assembling.
+   add x3, x5, :lo12:imm
+// CHECK: add x3, x5, :lo12:imm
diff --git a/test/MC/ARM64/fp-encoding.s b/test/MC/ARM64/fp-encoding.s
new file mode 100644
index 0000000..25474c1
--- /dev/null
+++ b/test/MC/ARM64/fp-encoding.s
@@ -0,0 +1,507 @@
+; RUN: llvm-mc -triple arm64-apple-darwin -show-encoding < %s | FileCheck %s
+
+foo:
+;-----------------------------------------------------------------------------
+; Floating-point arithmetic
+;-----------------------------------------------------------------------------
+
+  fabs s1, s2
+  fabs d1, d2
+
+; CHECK: fabs s1, s2                 ; encoding: [0x41,0xc0,0x20,0x1e]
+; CHECK: fabs d1, d2                 ; encoding: [0x41,0xc0,0x60,0x1e]
+
+  fadd s1, s2, s3
+  fadd d1, d2, d3
+
+; CHECK: fadd s1, s2, s3             ; encoding: [0x41,0x28,0x23,0x1e]
+; CHECK: fadd d1, d2, d3             ; encoding: [0x41,0x28,0x63,0x1e]
+
+  fdiv s1, s2, s3
+  fdiv d1, d2, d3
+
+; CHECK: fdiv s1, s2, s3             ; encoding: [0x41,0x18,0x23,0x1e]
+; CHECK: fdiv d1, d2, d3             ; encoding: [0x41,0x18,0x63,0x1e]
+
+  fmadd s1, s2, s3, s4
+  fmadd d1, d2, d3, d4
+
+; CHECK: fmadd s1, s2, s3, s4        ; encoding: [0x41,0x10,0x03,0x1f]
+; CHECK: fmadd d1, d2, d3, d4        ; encoding: [0x41,0x10,0x43,0x1f]
+
+  fmax   s1, s2, s3
+  fmax   d1, d2, d3
+  fmaxnm s1, s2, s3
+  fmaxnm d1, d2, d3
+
+; CHECK: fmax   s1, s2, s3           ; encoding: [0x41,0x48,0x23,0x1e]
+; CHECK: fmax   d1, d2, d3           ; encoding: [0x41,0x48,0x63,0x1e]
+; CHECK: fmaxnm s1, s2, s3           ; encoding: [0x41,0x68,0x23,0x1e]
+; CHECK: fmaxnm d1, d2, d3           ; encoding: [0x41,0x68,0x63,0x1e]
+
+  fmin   s1, s2, s3
+  fmin   d1, d2, d3
+  fminnm s1, s2, s3
+  fminnm d1, d2, d3
+
+; CHECK: fmin   s1, s2, s3           ; encoding: [0x41,0x58,0x23,0x1e]
+; CHECK: fmin   d1, d2, d3           ; encoding: [0x41,0x58,0x63,0x1e]
+; CHECK: fminnm s1, s2, s3           ; encoding: [0x41,0x78,0x23,0x1e]
+; CHECK: fminnm d1, d2, d3           ; encoding: [0x41,0x78,0x63,0x1e]
+
+  fmsub s1, s2, s3, s4
+  fmsub d1, d2, d3, d4
+
+; CHECK: fmsub s1, s2, s3, s4        ; encoding: [0x41,0x90,0x03,0x1f]
+; CHECK: fmsub d1, d2, d3, d4        ; encoding: [0x41,0x90,0x43,0x1f]
+
+  fmul s1, s2, s3
+  fmul d1, d2, d3
+
+; CHECK: fmul s1, s2, s3             ; encoding: [0x41,0x08,0x23,0x1e]
+; CHECK: fmul d1, d2, d3             ; encoding: [0x41,0x08,0x63,0x1e]
+
+  fneg s1, s2
+  fneg d1, d2
+
+; CHECK: fneg s1, s2                 ; encoding: [0x41,0x40,0x21,0x1e]
+; CHECK: fneg d1, d2                 ; encoding: [0x41,0x40,0x61,0x1e]
+
+  fnmadd s1, s2, s3, s4
+  fnmadd d1, d2, d3, d4
+
+; CHECK: fnmadd s1, s2, s3, s4       ; encoding: [0x41,0x10,0x23,0x1f]
+; CHECK: fnmadd d1, d2, d3, d4       ; encoding: [0x41,0x10,0x63,0x1f]
+
+  fnmsub s1, s2, s3, s4
+  fnmsub d1, d2, d3, d4
+
+; CHECK: fnmsub s1, s2, s3, s4       ; encoding: [0x41,0x90,0x23,0x1f]
+; CHECK: fnmsub d1, d2, d3, d4       ; encoding: [0x41,0x90,0x63,0x1f]
+
+  fnmul s1, s2, s3
+  fnmul d1, d2, d3
+
+; CHECK: fnmul s1, s2, s3            ; encoding: [0x41,0x88,0x23,0x1e]
+; CHECK: fnmul d1, d2, d3            ; encoding: [0x41,0x88,0x63,0x1e]
+
+  fsqrt s1, s2
+  fsqrt d1, d2
+
+; CHECK: fsqrt s1, s2                ; encoding: [0x41,0xc0,0x21,0x1e]
+; CHECK: fsqrt d1, d2                ; encoding: [0x41,0xc0,0x61,0x1e]
+
+  fsub s1, s2, s3
+  fsub d1, d2, d3
+
+; CHECK: fsub s1, s2, s3             ; encoding: [0x41,0x38,0x23,0x1e]
+; CHECK: fsub d1, d2, d3             ; encoding: [0x41,0x38,0x63,0x1e]
+
+;-----------------------------------------------------------------------------
+; Floating-point comparison
+;-----------------------------------------------------------------------------
+
+  fccmp  s1, s2, #0, eq
+  fccmp  d1, d2, #0, eq
+  fccmpe s1, s2, #0, eq
+  fccmpe d1, d2, #0, eq
+
+; CHECK: fccmp  s1, s2, #0, eq       ; encoding: [0x20,0x04,0x22,0x1e]
+; CHECK: fccmp  d1, d2, #0, eq       ; encoding: [0x20,0x04,0x62,0x1e]
+; CHECK: fccmpe s1, s2, #0, eq       ; encoding: [0x30,0x04,0x22,0x1e]
+; CHECK: fccmpe d1, d2, #0, eq       ; encoding: [0x30,0x04,0x62,0x1e]
+
+  fcmp  s1, s2
+  fcmp  d1, d2
+  fcmp  s1, #0.0
+  fcmp  d1, #0.0
+  fcmpe s1, s2
+  fcmpe d1, d2
+  fcmpe s1, #0.0
+  fcmpe d1, #0.0
+
+; CHECK: fcmp  s1, s2                ; encoding: [0x20,0x20,0x22,0x1e]
+; CHECK: fcmp  d1, d2                ; encoding: [0x20,0x20,0x62,0x1e]
+; CHECK: fcmp  s1, #0.0              ; encoding: [0x28,0x20,0x20,0x1e]
+; CHECK: fcmp  d1, #0.0              ; encoding: [0x28,0x20,0x60,0x1e]
+; CHECK: fcmpe s1, s2                ; encoding: [0x30,0x20,0x22,0x1e]
+; CHECK: fcmpe d1, d2                ; encoding: [0x30,0x20,0x62,0x1e]
+; CHECK: fcmpe s1, #0.0              ; encoding: [0x38,0x20,0x20,0x1e]
+; CHECK: fcmpe d1, #0.0              ; encoding: [0x38,0x20,0x60,0x1e]
+
+;-----------------------------------------------------------------------------
+; Floating-point conditional select
+;-----------------------------------------------------------------------------
+
+  fcsel s1, s2, s3, eq
+  fcsel d1, d2, d3, eq
+
+; CHECK: fcsel s1, s2, s3, eq        ; encoding: [0x41,0x0c,0x23,0x1e]
+; CHECK: fcsel d1, d2, d3, eq        ; encoding: [0x41,0x0c,0x63,0x1e]
+
+;-----------------------------------------------------------------------------
+; Floating-point convert
+;-----------------------------------------------------------------------------
+
+  fcvt h1, d2
+  fcvt s1, d2
+  fcvt d1, h2
+  fcvt s1, h2
+  fcvt d1, s2
+  fcvt h1, s2
+
+; CHECK: fcvt h1, d2                 ; encoding: [0x41,0xc0,0x63,0x1e]
+; CHECK: fcvt s1, d2                 ; encoding: [0x41,0x40,0x62,0x1e]
+; CHECK: fcvt d1, h2                 ; encoding: [0x41,0xc0,0xe2,0x1e]
+; CHECK: fcvt s1, h2                 ; encoding: [0x41,0x40,0xe2,0x1e]
+; CHECK: fcvt d1, s2                 ; encoding: [0x41,0xc0,0x22,0x1e]
+; CHECK: fcvt h1, s2                 ; encoding: [0x41,0xc0,0x23,0x1e]
+
+  fcvtas w1, d2
+  fcvtas w1, d2, #1
+  fcvtas x1, d2
+  fcvtas x1, d2, #1
+  fcvtas w1, s2
+  fcvtas w1, s2, #1
+  fcvtas x1, s2
+  fcvtas x1, s2, #1
+
+; CHECK: fcvtas	w1, d2                  ; encoding: [0x41,0x00,0x64,0x1e]
+; CHECK: fcvtas	w1, d2, #1              ; encoding: [0x41,0xfc,0x44,0x1e]
+; CHECK: fcvtas	x1, d2                  ; encoding: [0x41,0x00,0x64,0x9e]
+; CHECK: fcvtas	x1, d2, #1              ; encoding: [0x41,0xfc,0x44,0x9e]
+; CHECK: fcvtas	w1, s2                  ; encoding: [0x41,0x00,0x24,0x1e]
+; CHECK: fcvtas	w1, s2, #1              ; encoding: [0x41,0xfc,0x04,0x1e]
+; CHECK: fcvtas	x1, s2                  ; encoding: [0x41,0x00,0x24,0x9e]
+; CHECK: fcvtas	x1, s2, #1              ; encoding: [0x41,0xfc,0x04,0x9e]
+
+  fcvtau w1, s2
+  fcvtau w1, s2, #1
+  fcvtau w1, d2
+  fcvtau w1, d2, #1
+  fcvtau x1, s2
+  fcvtau x1, s2, #1
+  fcvtau x1, d2
+  fcvtau x1, d2, #1
+
+; CHECK: fcvtau	w1, s2                  ; encoding: [0x41,0x00,0x25,0x1e]
+; CHECK: fcvtau	w1, s2, #1              ; encoding: [0x41,0xfc,0x05,0x1e]
+; CHECK: fcvtau	w1, d2                  ; encoding: [0x41,0x00,0x65,0x1e]
+; CHECK: fcvtau	w1, d2, #1              ; encoding: [0x41,0xfc,0x45,0x1e]
+; CHECK: fcvtau	x1, s2                  ; encoding: [0x41,0x00,0x25,0x9e]
+; CHECK: fcvtau	x1, s2, #1              ; encoding: [0x41,0xfc,0x05,0x9e]
+; CHECK: fcvtau	x1, d2                  ; encoding: [0x41,0x00,0x65,0x9e]
+; CHECK: fcvtau	x1, d2, #1              ; encoding: [0x41,0xfc,0x45,0x9e]
+
+  fcvtms w1, s2
+  fcvtms w1, s2, #1
+  fcvtms w1, d2
+  fcvtms w1, d2, #1
+  fcvtms x1, s2
+  fcvtms x1, s2, #1
+  fcvtms x1, d2
+  fcvtms x1, d2, #1
+
+; CHECK: fcvtms	w1, s2                  ; encoding: [0x41,0x00,0x30,0x1e]
+; CHECK: fcvtms	w1, s2, #1              ; encoding: [0x41,0xfc,0x10,0x1e]
+; CHECK: fcvtms	w1, d2                  ; encoding: [0x41,0x00,0x70,0x1e]
+; CHECK: fcvtms	w1, d2, #1              ; encoding: [0x41,0xfc,0x50,0x1e]
+; CHECK: fcvtms	x1, s2                  ; encoding: [0x41,0x00,0x30,0x9e]
+; CHECK: fcvtms	x1, s2, #1              ; encoding: [0x41,0xfc,0x10,0x9e]
+; CHECK: fcvtms	x1, d2                  ; encoding: [0x41,0x00,0x70,0x9e]
+; CHECK: fcvtms	x1, d2, #1              ; encoding: [0x41,0xfc,0x50,0x9e]
+
+  fcvtmu w1, s2
+  fcvtmu w1, s2, #1
+  fcvtmu w1, d2
+  fcvtmu w1, d2, #1
+  fcvtmu x1, s2
+  fcvtmu x1, s2, #1
+  fcvtmu x1, d2
+  fcvtmu x1, d2, #1
+
+; CHECK: fcvtmu	w1, s2                  ; encoding: [0x41,0x00,0x31,0x1e]
+; CHECK: fcvtmu	w1, s2, #1              ; encoding: [0x41,0xfc,0x11,0x1e]
+; CHECK: fcvtmu	w1, d2                  ; encoding: [0x41,0x00,0x71,0x1e]
+; CHECK: fcvtmu	w1, d2, #1              ; encoding: [0x41,0xfc,0x51,0x1e]
+; CHECK: fcvtmu	x1, s2                  ; encoding: [0x41,0x00,0x31,0x9e]
+; CHECK: fcvtmu	x1, s2, #1              ; encoding: [0x41,0xfc,0x11,0x9e]
+; CHECK: fcvtmu	x1, d2                  ; encoding: [0x41,0x00,0x71,0x9e]
+; CHECK: fcvtmu	x1, d2, #1              ; encoding: [0x41,0xfc,0x51,0x9e]
+
+  fcvtns w1, s2
+  fcvtns w1, s2, #1
+  fcvtns w1, d2
+  fcvtns w1, d2, #1
+  fcvtns x1, s2
+  fcvtns x1, s2, #1
+  fcvtns x1, d2
+  fcvtns x1, d2, #1
+
+; CHECK: fcvtns	w1, s2                  ; encoding: [0x41,0x00,0x20,0x1e]
+; CHECK: fcvtns	w1, s2, #1              ; encoding: [0x41,0xfc,0x00,0x1e]
+; CHECK: fcvtns	w1, d2                  ; encoding: [0x41,0x00,0x60,0x1e]
+; CHECK: fcvtns	w1, d2, #1              ; encoding: [0x41,0xfc,0x40,0x1e]
+; CHECK: fcvtns	x1, s2                  ; encoding: [0x41,0x00,0x20,0x9e]
+; CHECK: fcvtns	x1, s2, #1              ; encoding: [0x41,0xfc,0x00,0x9e]
+; CHECK: fcvtns	x1, d2                  ; encoding: [0x41,0x00,0x60,0x9e]
+; CHECK: fcvtns	x1, d2, #1              ; encoding: [0x41,0xfc,0x40,0x9e]
+
+  fcvtnu w1, s2
+  fcvtnu w1, s2, #1
+  fcvtnu w1, d2
+  fcvtnu w1, d2, #1
+  fcvtnu x1, s2
+  fcvtnu x1, s2, #1
+  fcvtnu x1, d2
+  fcvtnu x1, d2, #1
+
+; CHECK: fcvtnu	w1, s2                  ; encoding: [0x41,0x00,0x21,0x1e]
+; CHECK: fcvtnu	w1, s2, #1              ; encoding: [0x41,0xfc,0x01,0x1e]
+; CHECK: fcvtnu	w1, d2                  ; encoding: [0x41,0x00,0x61,0x1e]
+; CHECK: fcvtnu	w1, d2, #1              ; encoding: [0x41,0xfc,0x41,0x1e]
+; CHECK: fcvtnu	x1, s2                  ; encoding: [0x41,0x00,0x21,0x9e]
+; CHECK: fcvtnu	x1, s2, #1              ; encoding: [0x41,0xfc,0x01,0x9e]
+; CHECK: fcvtnu	x1, d2                  ; encoding: [0x41,0x00,0x61,0x9e]
+; CHECK: fcvtnu	x1, d2, #1              ; encoding: [0x41,0xfc,0x41,0x9e]
+
+  fcvtps w1, s2
+  fcvtps w1, s2, #1
+  fcvtps w1, d2
+  fcvtps w1, d2, #1
+  fcvtps x1, s2
+  fcvtps x1, s2, #1
+  fcvtps x1, d2
+  fcvtps x1, d2, #1
+
+; CHECK: fcvtps	w1, s2                  ; encoding: [0x41,0x00,0x28,0x1e]
+; CHECK: fcvtps	w1, s2, #1              ; encoding: [0x41,0xfc,0x08,0x1e]
+; CHECK: fcvtps	w1, d2                  ; encoding: [0x41,0x00,0x68,0x1e]
+; CHECK: fcvtps	w1, d2, #1              ; encoding: [0x41,0xfc,0x48,0x1e]
+; CHECK: fcvtps	x1, s2                  ; encoding: [0x41,0x00,0x28,0x9e]
+; CHECK: fcvtps	x1, s2, #1              ; encoding: [0x41,0xfc,0x08,0x9e]
+; CHECK: fcvtps	x1, d2                  ; encoding: [0x41,0x00,0x68,0x9e]
+; CHECK: fcvtps	x1, d2, #1              ; encoding: [0x41,0xfc,0x48,0x9e]
+
+  fcvtpu w1, s2
+  fcvtpu w1, s2, #1
+  fcvtpu w1, d2
+  fcvtpu w1, d2, #1
+  fcvtpu x1, s2
+  fcvtpu x1, s2, #1
+  fcvtpu x1, d2
+  fcvtpu x1, d2, #1
+
+; CHECK: fcvtpu	w1, s2                  ; encoding: [0x41,0x00,0x29,0x1e]
+; CHECK: fcvtpu	w1, s2, #1              ; encoding: [0x41,0xfc,0x09,0x1e]
+; CHECK: fcvtpu	w1, d2                  ; encoding: [0x41,0x00,0x69,0x1e]
+; CHECK: fcvtpu	w1, d2, #1              ; encoding: [0x41,0xfc,0x49,0x1e]
+; CHECK: fcvtpu	x1, s2                  ; encoding: [0x41,0x00,0x29,0x9e]
+; CHECK: fcvtpu	x1, s2, #1              ; encoding: [0x41,0xfc,0x09,0x9e]
+; CHECK: fcvtpu	x1, d2                  ; encoding: [0x41,0x00,0x69,0x9e]
+; CHECK: fcvtpu	x1, d2, #1              ; encoding: [0x41,0xfc,0x49,0x9e]
+
+  fcvtzs w1, s2
+  fcvtzs w1, s2, #1
+  fcvtzs w1, d2
+  fcvtzs w1, d2, #1
+  fcvtzs x1, s2
+  fcvtzs x1, s2, #1
+  fcvtzs x1, d2
+  fcvtzs x1, d2, #1
+
+; CHECK: fcvtzs	w1, s2                  ; encoding: [0x41,0x00,0x38,0x1e]
+; CHECK: fcvtzs	w1, s2, #1              ; encoding: [0x41,0xfc,0x18,0x1e]
+; CHECK: fcvtzs	w1, d2                  ; encoding: [0x41,0x00,0x78,0x1e]
+; CHECK: fcvtzs	w1, d2, #1              ; encoding: [0x41,0xfc,0x58,0x1e]
+; CHECK: fcvtzs	x1, s2                  ; encoding: [0x41,0x00,0x38,0x9e]
+; CHECK: fcvtzs	x1, s2, #1              ; encoding: [0x41,0xfc,0x18,0x9e]
+; CHECK: fcvtzs	x1, d2                  ; encoding: [0x41,0x00,0x78,0x9e]
+; CHECK: fcvtzs	x1, d2, #1              ; encoding: [0x41,0xfc,0x58,0x9e]
+
+  fcvtzu w1, s2
+  fcvtzu w1, s2, #1
+  fcvtzu w1, d2
+  fcvtzu w1, d2, #1
+  fcvtzu x1, s2
+  fcvtzu x1, s2, #1
+  fcvtzu x1, d2
+  fcvtzu x1, d2, #1
+
+; CHECK: fcvtzu	w1, s2                  ; encoding: [0x41,0x00,0x39,0x1e]
+; CHECK: fcvtzu	w1, s2, #1              ; encoding: [0x41,0xfc,0x19,0x1e]
+; CHECK: fcvtzu	w1, d2                  ; encoding: [0x41,0x00,0x79,0x1e]
+; CHECK: fcvtzu	w1, d2, #1              ; encoding: [0x41,0xfc,0x59,0x1e]
+; CHECK: fcvtzu	x1, s2                  ; encoding: [0x41,0x00,0x39,0x9e]
+; CHECK: fcvtzu	x1, s2, #1              ; encoding: [0x41,0xfc,0x19,0x9e]
+; CHECK: fcvtzu	x1, d2                  ; encoding: [0x41,0x00,0x79,0x9e]
+; CHECK: fcvtzu	x1, d2, #1              ; encoding: [0x41,0xfc,0x59,0x9e]
+
+  scvtf s1, w2
+  scvtf s1, w2, #1
+  scvtf d1, w2
+  scvtf d1, w2, #1
+  scvtf s1, x2
+  scvtf s1, x2, #1
+  scvtf d1, x2
+  scvtf d1, x2, #1
+
+; CHECK: scvtf	s1, w2                  ; encoding: [0x41,0x00,0x22,0x1e]
+; CHECK: scvtf	s1, w2, #1              ; encoding: [0x41,0xfc,0x02,0x1e]
+; CHECK: scvtf	d1, w2                  ; encoding: [0x41,0x00,0x62,0x1e]
+; CHECK: scvtf	d1, w2, #1              ; encoding: [0x41,0xfc,0x42,0x1e]
+; CHECK: scvtf	s1, x2                  ; encoding: [0x41,0x00,0x22,0x9e]
+; CHECK: scvtf	s1, x2, #1              ; encoding: [0x41,0xfc,0x02,0x9e]
+; CHECK: scvtf	d1, x2                  ; encoding: [0x41,0x00,0x62,0x9e]
+; CHECK: scvtf	d1, x2, #1              ; encoding: [0x41,0xfc,0x42,0x9e]
+
+  ucvtf s1, w2
+  ucvtf s1, w2, #1
+  ucvtf d1, w2
+  ucvtf d1, w2, #1
+  ucvtf s1, x2
+  ucvtf s1, x2, #1
+  ucvtf d1, x2
+  ucvtf d1, x2, #1
+
+; CHECK: ucvtf	s1, w2                  ; encoding: [0x41,0x00,0x23,0x1e]
+; CHECK: ucvtf	s1, w2, #1              ; encoding: [0x41,0xfc,0x03,0x1e]
+; CHECK: ucvtf	d1, w2                  ; encoding: [0x41,0x00,0x63,0x1e]
+; CHECK: ucvtf	d1, w2, #1              ; encoding: [0x41,0xfc,0x43,0x1e]
+; CHECK: ucvtf	s1, x2                  ; encoding: [0x41,0x00,0x23,0x9e]
+; CHECK: ucvtf	s1, x2, #1              ; encoding: [0x41,0xfc,0x03,0x9e]
+; CHECK: ucvtf	d1, x2                  ; encoding: [0x41,0x00,0x63,0x9e]
+; CHECK: ucvtf	d1, x2, #1              ; encoding: [0x41,0xfc,0x43,0x9e]
+
+;-----------------------------------------------------------------------------
+; Floating-point move
+;-----------------------------------------------------------------------------
+
+  fmov s1, w2
+  fmov w1, s2
+  fmov d1, x2
+  fmov x1, d2
+
+; CHECK: fmov s1, w2                 ; encoding: [0x41,0x00,0x27,0x1e]
+; CHECK: fmov w1, s2                 ; encoding: [0x41,0x00,0x26,0x1e]
+; CHECK: fmov d1, x2                 ; encoding: [0x41,0x00,0x67,0x9e]
+; CHECK: fmov x1, d2                 ; encoding: [0x41,0x00,0x66,0x9e]
+
+  fmov s1, #0.125
+  fmov s1, #0x40
+  fmov d1, #0.125
+  fmov d1, #0x40
+  fmov d1, #-4.843750e-01
+  fmov d1, #4.843750e-01
+  fmov d3, #3
+  fmov s2, #0.0
+  fmov d2, #0.0
+
+; CHECK: fmov s1, #1.250000e-01      ; encoding: [0x01,0x10,0x28,0x1e]
+; CHECK: fmov s1, #1.250000e-01      ; encoding: [0x01,0x10,0x28,0x1e]
+; CHECK: fmov d1, #1.250000e-01      ; encoding: [0x01,0x10,0x68,0x1e]
+; CHECK: fmov d1, #1.250000e-01      ; encoding: [0x01,0x10,0x68,0x1e]
+; CHECK: fmov d1, #-4.843750e-01     ; encoding: [0x01,0xf0,0x7b,0x1e]
+; CHECK: fmov d1, #4.843750e-01      ; encoding: [0x01,0xf0,0x6b,0x1e]
+; CHECK: fmov d3, #3.000000e+00      ; encoding: [0x03,0x10,0x61,0x1e]
+; CHECK: fmov s2, wzr                ; encoding: [0xe2,0x03,0x27,0x1e]
+; CHECK: fmov d2, xzr                ; encoding: [0xe2,0x03,0x67,0x9e]
+
+  fmov s1, s2
+  fmov d1, d2
+
+; CHECK: fmov s1, s2                 ; encoding: [0x41,0x40,0x20,0x1e]
+; CHECK: fmov d1, d2                 ; encoding: [0x41,0x40,0x60,0x1e]
+
+
+  fmov x2, v5.d[1]
+  fmov.d x9, v7[1]
+  fmov v1.d[1], x1
+  fmov.d v8[1], x6
+
+; CHECK: fmov.d	x2, v5[1]               ; encoding: [0xa2,0x00,0xae,0x9e]
+; CHECK: fmov.d	x9, v7[1]               ; encoding: [0xe9,0x00,0xae,0x9e]
+; CHECK: fmov.d	v1[1], x1               ; encoding: [0x21,0x00,0xaf,0x9e]
+; CHECK: fmov.d	v8[1], x6               ; encoding: [0xc8,0x00,0xaf,0x9e]
+
+
+;-----------------------------------------------------------------------------
+; Floating-point round to integral
+;-----------------------------------------------------------------------------
+
+  frinta s1, s2
+  frinta d1, d2
+
+; CHECK: frinta s1, s2               ; encoding: [0x41,0x40,0x26,0x1e]
+; CHECK: frinta d1, d2               ; encoding: [0x41,0x40,0x66,0x1e]
+
+  frinti s1, s2
+  frinti d1, d2
+
+; CHECK: frinti s1, s2               ; encoding: [0x41,0xc0,0x27,0x1e]
+; CHECK: frinti d1, d2               ; encoding: [0x41,0xc0,0x67,0x1e]
+
+  frintm s1, s2
+  frintm d1, d2
+
+; CHECK: frintm s1, s2               ; encoding: [0x41,0x40,0x25,0x1e]
+; CHECK: frintm d1, d2               ; encoding: [0x41,0x40,0x65,0x1e]
+
+  frintn s1, s2
+  frintn d1, d2
+
+; CHECK: frintn s1, s2               ; encoding: [0x41,0x40,0x24,0x1e]
+; CHECK: frintn d1, d2               ; encoding: [0x41,0x40,0x64,0x1e]
+
+  frintp s1, s2
+  frintp d1, d2
+
+; CHECK: frintp s1, s2               ; encoding: [0x41,0xc0,0x24,0x1e]
+; CHECK: frintp d1, d2               ; encoding: [0x41,0xc0,0x64,0x1e]
+
+  frintx s1, s2
+  frintx d1, d2
+
+; CHECK: frintx s1, s2               ; encoding: [0x41,0x40,0x27,0x1e]
+; CHECK: frintx d1, d2               ; encoding: [0x41,0x40,0x67,0x1e]
+
+  frintz s1, s2
+  frintz d1, d2
+
+; CHECK: frintz s1, s2               ; encoding: [0x41,0xc0,0x25,0x1e]
+; CHECK: frintz d1, d2               ; encoding: [0x41,0xc0,0x65,0x1e]
+
+  cmhs d0, d0, d0
+  cmtst d0, d0, d0
+
+; CHECK: cmhs	d0, d0, d0              ; encoding: [0x00,0x3c,0xe0,0x7e]
+; CHECK: cmtst	d0, d0, d0              ; encoding: [0x00,0x8c,0xe0,0x5e]
+
+
+
+;-----------------------------------------------------------------------------
+; Floating-point extract and narrow
+;-----------------------------------------------------------------------------
+  sqxtn b4, h2
+  sqxtn h2, s3
+  sqxtn s9, d2
+
+; CHECK: sqxtn b4, h2                  ; encoding: [0x44,0x48,0x21,0x5e]
+; CHECK: sqxtn h2, s3                  ; encoding: [0x62,0x48,0x61,0x5e]
+; CHECK: sqxtn s9, d2                  ; encoding: [0x49,0x48,0xa1,0x5e]
+
+  sqxtun b4, h2
+  sqxtun h2, s3
+  sqxtun s9, d2
+
+; CHECK: sqxtun b4, h2                  ; encoding: [0x44,0x28,0x21,0x7e]
+; CHECK: sqxtun h2, s3                  ; encoding: [0x62,0x28,0x61,0x7e]
+; CHECK: sqxtun s9, d2                  ; encoding: [0x49,0x28,0xa1,0x7e]
+
+  uqxtn b4, h2
+  uqxtn h2, s3
+  uqxtn s9, d2
+
+; CHECK: uqxtn b4, h2                  ; encoding: [0x44,0x48,0x21,0x7e]
+; CHECK: uqxtn h2, s3                  ; encoding: [0x62,0x48,0x61,0x7e]
+; CHECK: uqxtn s9, d2                  ; encoding: [0x49,0x48,0xa1,0x7e]
diff --git a/test/MC/ARM64/large-relocs.s b/test/MC/ARM64/large-relocs.s
new file mode 100644
index 0000000..348ceb6
--- /dev/null
+++ b/test/MC/ARM64/large-relocs.s
@@ -0,0 +1,38 @@
+// RUN: llvm-mc -triple=arm64-linux-gnu -show-encoding -o - %s | FileCheck %s
+// RUN: llvm-mc -triple=arm64-linux-gnu -show-encoding -filetype=obj -o - %s | llvm-objdump -r - | FileCheck --check-prefix=CHECK-OBJ %s
+
+        movz x2, #:abs_g0:sym
+        movk w3, #:abs_g0_nc:sym
+// CHECK: movz    x2, #:abs_g0:sym        // encoding: [0bAAA00010,A,0b100AAAAA,0x92]
+// CHECK-NEXT:                            //   fixup A - offset: 0, value: :abs_g0:sym, kind: fixup_arm64_movw
+// CHECK: movk     w3, #:abs_g0_nc:sym    // encoding: [0bAAA00011,A,0b100AAAAA,0x72]
+// CHECK-NEXT:                            //   fixup A - offset: 0, value: :abs_g0_nc:sym, kind: fixup_arm64_movw
+
+// CHECK-OBJ: 0 R_AARCH64_MOVW_UABS_G0 sym
+// CHECK-OBJ: 4 R_AARCH64_MOVW_UABS_G0_NC sym
+
+        movz x4, #:abs_g1:sym
+        movk w5, #:abs_g1_nc:sym
+// CHECK: movz     x4, #:abs_g1:sym       // encoding: [0bAAA00100,A,0b101AAAAA,0x92]
+// CHECK-NEXT:                            //   fixup A - offset: 0, value: :abs_g1:sym, kind: fixup_arm64_movw
+// CHECK: movk     w5, #:abs_g1_nc:sym    // encoding: [0bAAA00101,A,0b101AAAAA,0x72]
+// CHECK-NEXT:                            //   fixup A - offset: 0, value: :abs_g1_nc:sym, kind: fixup_arm64_movw
+
+// CHECK-OBJ: 8 R_AARCH64_MOVW_UABS_G1 sym
+// CHECK-OBJ: c R_AARCH64_MOVW_UABS_G1_NC sym
+
+        movz x6, #:abs_g2:sym
+        movk x7, #:abs_g2_nc:sym
+// CHECK: movz     x6, #:abs_g2:sym       // encoding: [0bAAA00110,A,0b110AAAAA,0x92]
+// CHECK-NEXT:                            //   fixup A - offset: 0, value: :abs_g2:sym, kind: fixup_arm64_movw
+// CHECK: movk     x7, #:abs_g2_nc:sym    // encoding: [0bAAA00111,A,0b110AAAAA,0xf2]
+// CHECK-NEXT:                            //   fixup A - offset: 0, value: :abs_g2_nc:sym, kind: fixup_arm64_movw
+
+// CHECK-OBJ: 10 R_AARCH64_MOVW_UABS_G2 sym
+// CHECK-OBJ: 14 R_AARCH64_MOVW_UABS_G2_NC sym
+
+        movz x8, #:abs_g3:sym
+// CHECK: movz     x8, #:abs_g3:sym       // encoding: [0bAAA01000,A,0b111AAAAA,0x92]
+// CHECK-NEXT:                            //   fixup A - offset: 0, value: :abs_g3:sym, kind: fixup_arm64_movw
+
+// CHECK-OBJ: 18 R_AARCH64_MOVW_UABS_G3 sym
diff --git a/test/MC/ARM64/lit.local.cfg b/test/MC/ARM64/lit.local.cfg
new file mode 100644
index 0000000..49447af
--- /dev/null
+++ b/test/MC/ARM64/lit.local.cfg
@@ -0,0 +1,6 @@
+config.suffixes = ['.ll', '.c', '.cpp', '.s']
+
+targets = set(config.root.targets_to_build.split())
+if not 'ARM64' in targets:
+    config.unsupported = True
+
diff --git a/test/MC/ARM64/logical-encoding.s b/test/MC/ARM64/logical-encoding.s
new file mode 100644
index 0000000..e5f1436
--- /dev/null
+++ b/test/MC/ARM64/logical-encoding.s
@@ -0,0 +1,224 @@
+; RUN: llvm-mc -triple arm64-apple-darwin -show-encoding < %s | FileCheck %s
+
+foo:
+;==---------------------------------------------------------------------------==
+; 5.4.2 Logical (immediate)
+;==---------------------------------------------------------------------------==
+
+  and   w0, w0, #1
+  and   x0, x0, #1
+  and   w1, w2, #15
+  and   x1, x2, #15
+  and   sp, x5, #~15
+  ands  w0, w0, #1
+  ands  x0, x0, #1
+  ands  w1, w2, #15
+  ands  x1, x2, #15
+
+; CHECK: and  w0, w0, #0x1           ; encoding: [0x00,0x00,0x00,0x12]
+; CHECK: and  x0, x0, #0x1           ; encoding: [0x00,0x00,0x40,0x92]
+; CHECK: and  w1, w2, #0xf           ; encoding: [0x41,0x0c,0x00,0x12]
+; CHECK: and  x1, x2, #0xf           ; encoding: [0x41,0x0c,0x40,0x92]
+; CHECK: and  sp, x5, #0xfffffffffffffff0 ; encoding: [0xbf,0xec,0x7c,0x92]
+; CHECK: ands w0, w0, #0x1           ; encoding: [0x00,0x00,0x00,0x72]
+; CHECK: ands x0, x0, #0x1           ; encoding: [0x00,0x00,0x40,0xf2]
+; CHECK: ands w1, w2, #0xf           ; encoding: [0x41,0x0c,0x00,0x72]
+; CHECK: ands x1, x2, #0xf           ; encoding: [0x41,0x0c,0x40,0xf2]
+
+  eor w1, w2, #0x4000
+  eor x1, x2, #0x8000
+
+; CHECK: eor w1, w2, #0x4000         ; encoding: [0x41,0x00,0x12,0x52]
+; CHECK: eor x1, x2, #0x8000         ; encoding: [0x41,0x00,0x71,0xd2]
+
+  orr w1, w2, #0x4000
+  orr x1, x2, #0x8000
+
+; CHECK: orr w1, w2, #0x4000         ; encoding: [0x41,0x00,0x12,0x32]
+; CHECK: orr x1, x2, #0x8000         ; encoding: [0x41,0x00,0x71,0xb2]
+
+  orr w8, wzr, #0x1
+  orr x8, xzr, #0x1
+
+; CHECK: orr w8, wzr, #0x1           ; encoding: [0xe8,0x03,0x00,0x32]
+; CHECK: orr x8, xzr, #0x1           ; encoding: [0xe8,0x03,0x40,0xb2]
+
+;==---------------------------------------------------------------------------==
+; 5.5.3 Logical (shifted register)
+;==---------------------------------------------------------------------------==
+
+  and   w1, w2, w3
+  and   x1, x2, x3
+  and   w1, w2, w3, lsl #2
+  and   x1, x2, x3, lsl #2
+  and   w1, w2, w3, lsr #2
+  and   x1, x2, x3, lsr #2
+  and   w1, w2, w3, asr #2
+  and   x1, x2, x3, asr #2
+  and   w1, w2, w3, ror #2
+  and   x1, x2, x3, ror #2
+
+; CHECK: and  w1, w2, w3             ; encoding: [0x41,0x00,0x03,0x0a]
+; CHECK: and  x1, x2, x3             ; encoding: [0x41,0x00,0x03,0x8a]
+; CHECK: and  w1, w2, w3, lsl #2     ; encoding: [0x41,0x08,0x03,0x0a]
+; CHECK: and  x1, x2, x3, lsl #2     ; encoding: [0x41,0x08,0x03,0x8a]
+; CHECK: and  w1, w2, w3, lsr #2     ; encoding: [0x41,0x08,0x43,0x0a]
+; CHECK: and  x1, x2, x3, lsr #2     ; encoding: [0x41,0x08,0x43,0x8a]
+; CHECK: and  w1, w2, w3, asr #2     ; encoding: [0x41,0x08,0x83,0x0a]
+; CHECK: and  x1, x2, x3, asr #2     ; encoding: [0x41,0x08,0x83,0x8a]
+; CHECK: and  w1, w2, w3, ror #2     ; encoding: [0x41,0x08,0xc3,0x0a]
+; CHECK: and  x1, x2, x3, ror #2     ; encoding: [0x41,0x08,0xc3,0x8a]
+
+  ands  w1, w2, w3
+  ands  x1, x2, x3
+  ands  w1, w2, w3, lsl #2
+  ands  x1, x2, x3, lsl #2
+  ands  w1, w2, w3, lsr #2
+  ands  x1, x2, x3, lsr #2
+  ands  w1, w2, w3, asr #2
+  ands  x1, x2, x3, asr #2
+  ands  w1, w2, w3, ror #2
+  ands  x1, x2, x3, ror #2
+
+; CHECK: ands w1, w2, w3             ; encoding: [0x41,0x00,0x03,0x6a]
+; CHECK: ands x1, x2, x3             ; encoding: [0x41,0x00,0x03,0xea]
+; CHECK: ands w1, w2, w3, lsl #2     ; encoding: [0x41,0x08,0x03,0x6a]
+; CHECK: ands x1, x2, x3, lsl #2     ; encoding: [0x41,0x08,0x03,0xea]
+; CHECK: ands w1, w2, w3, lsr #2     ; encoding: [0x41,0x08,0x43,0x6a]
+; CHECK: ands x1, x2, x3, lsr #2     ; encoding: [0x41,0x08,0x43,0xea]
+; CHECK: ands w1, w2, w3, asr #2     ; encoding: [0x41,0x08,0x83,0x6a]
+; CHECK: ands x1, x2, x3, asr #2     ; encoding: [0x41,0x08,0x83,0xea]
+; CHECK: ands w1, w2, w3, ror #2     ; encoding: [0x41,0x08,0xc3,0x6a]
+; CHECK: ands x1, x2, x3, ror #2     ; encoding: [0x41,0x08,0xc3,0xea]
+
+  bic w1, w2, w3
+  bic x1, x2, x3
+  bic w1, w2, w3, lsl #3
+  bic x1, x2, x3, lsl #3
+  bic w1, w2, w3, lsr #3
+  bic x1, x2, x3, lsr #3
+  bic w1, w2, w3, asr #3
+  bic x1, x2, x3, asr #3
+  bic w1, w2, w3, ror #3
+  bic x1, x2, x3, ror #3
+
+; CHECK: bic w1, w2, w3              ; encoding: [0x41,0x00,0x23,0x0a]
+; CHECK: bic x1, x2, x3              ; encoding: [0x41,0x00,0x23,0x8a]
+; CHECK: bic w1, w2, w3, lsl #3      ; encoding: [0x41,0x0c,0x23,0x0a]
+; CHECK: bic x1, x2, x3, lsl #3      ; encoding: [0x41,0x0c,0x23,0x8a]
+; CHECK: bic w1, w2, w3, lsr #3      ; encoding: [0x41,0x0c,0x63,0x0a]
+; CHECK: bic x1, x2, x3, lsr #3      ; encoding: [0x41,0x0c,0x63,0x8a]
+; CHECK: bic w1, w2, w3, asr #3      ; encoding: [0x41,0x0c,0xa3,0x0a]
+; CHECK: bic x1, x2, x3, asr #3      ; encoding: [0x41,0x0c,0xa3,0x8a]
+; CHECK: bic w1, w2, w3, ror #3      ; encoding: [0x41,0x0c,0xe3,0x0a]
+; CHECK: bic x1, x2, x3, ror #3      ; encoding: [0x41,0x0c,0xe3,0x8a]
+
+  bics w1, w2, w3
+  bics x1, x2, x3
+  bics w1, w2, w3, lsl #3
+  bics x1, x2, x3, lsl #3
+  bics w1, w2, w3, lsr #3
+  bics x1, x2, x3, lsr #3
+  bics w1, w2, w3, asr #3
+  bics x1, x2, x3, asr #3
+  bics w1, w2, w3, ror #3
+  bics x1, x2, x3, ror #3
+
+; CHECK: bics w1, w2, w3             ; encoding: [0x41,0x00,0x23,0x6a]
+; CHECK: bics x1, x2, x3             ; encoding: [0x41,0x00,0x23,0xea]
+; CHECK: bics w1, w2, w3, lsl #3     ; encoding: [0x41,0x0c,0x23,0x6a]
+; CHECK: bics x1, x2, x3, lsl #3     ; encoding: [0x41,0x0c,0x23,0xea]
+; CHECK: bics w1, w2, w3, lsr #3     ; encoding: [0x41,0x0c,0x63,0x6a]
+; CHECK: bics x1, x2, x3, lsr #3     ; encoding: [0x41,0x0c,0x63,0xea]
+; CHECK: bics w1, w2, w3, asr #3     ; encoding: [0x41,0x0c,0xa3,0x6a]
+; CHECK: bics x1, x2, x3, asr #3     ; encoding: [0x41,0x0c,0xa3,0xea]
+; CHECK: bics w1, w2, w3, ror #3     ; encoding: [0x41,0x0c,0xe3,0x6a]
+; CHECK: bics x1, x2, x3, ror #3     ; encoding: [0x41,0x0c,0xe3,0xea]
+
+  eon w1, w2, w3
+  eon x1, x2, x3
+  eon w1, w2, w3, lsl #4
+  eon x1, x2, x3, lsl #4
+  eon w1, w2, w3, lsr #4
+  eon x1, x2, x3, lsr #4
+  eon w1, w2, w3, asr #4
+  eon x1, x2, x3, asr #4
+  eon w1, w2, w3, ror #4
+  eon x1, x2, x3, ror #4
+
+; CHECK: eon w1, w2, w3              ; encoding: [0x41,0x00,0x23,0x4a]
+; CHECK: eon x1, x2, x3              ; encoding: [0x41,0x00,0x23,0xca]
+; CHECK: eon w1, w2, w3, lsl #4      ; encoding: [0x41,0x10,0x23,0x4a]
+; CHECK: eon x1, x2, x3, lsl #4      ; encoding: [0x41,0x10,0x23,0xca]
+; CHECK: eon w1, w2, w3, lsr #4      ; encoding: [0x41,0x10,0x63,0x4a]
+; CHECK: eon x1, x2, x3, lsr #4      ; encoding: [0x41,0x10,0x63,0xca]
+; CHECK: eon w1, w2, w3, asr #4      ; encoding: [0x41,0x10,0xa3,0x4a]
+; CHECK: eon x1, x2, x3, asr #4      ; encoding: [0x41,0x10,0xa3,0xca]
+; CHECK: eon w1, w2, w3, ror #4      ; encoding: [0x41,0x10,0xe3,0x4a]
+; CHECK: eon x1, x2, x3, ror #4      ; encoding: [0x41,0x10,0xe3,0xca]
+
+  eor w1, w2, w3
+  eor x1, x2, x3
+  eor w1, w2, w3, lsl #5
+  eor x1, x2, x3, lsl #5
+  eor w1, w2, w3, lsr #5
+  eor x1, x2, x3, lsr #5
+  eor w1, w2, w3, asr #5
+  eor x1, x2, x3, asr #5
+  eor w1, w2, w3, ror #5
+  eor x1, x2, x3, ror #5
+
+; CHECK: eor w1, w2, w3              ; encoding: [0x41,0x00,0x03,0x4a]
+; CHECK: eor x1, x2, x3              ; encoding: [0x41,0x00,0x03,0xca]
+; CHECK: eor w1, w2, w3, lsl #5      ; encoding: [0x41,0x14,0x03,0x4a]
+; CHECK: eor x1, x2, x3, lsl #5      ; encoding: [0x41,0x14,0x03,0xca]
+; CHECK: eor w1, w2, w3, lsr #5      ; encoding: [0x41,0x14,0x43,0x4a]
+; CHECK: eor x1, x2, x3, lsr #5      ; encoding: [0x41,0x14,0x43,0xca]
+; CHECK: eor w1, w2, w3, asr #5      ; encoding: [0x41,0x14,0x83,0x4a]
+; CHECK: eor x1, x2, x3, asr #5      ; encoding: [0x41,0x14,0x83,0xca]
+; CHECK: eor w1, w2, w3, ror #5      ; encoding: [0x41,0x14,0xc3,0x4a]
+; CHECK: eor x1, x2, x3, ror #5      ; encoding: [0x41,0x14,0xc3,0xca]
+
+  orr w1, w2, w3
+  orr x1, x2, x3
+  orr w1, w2, w3, lsl #6
+  orr x1, x2, x3, lsl #6
+  orr w1, w2, w3, lsr #6
+  orr x1, x2, x3, lsr #6
+  orr w1, w2, w3, asr #6
+  orr x1, x2, x3, asr #6
+  orr w1, w2, w3, ror #6
+  orr x1, x2, x3, ror #6
+
+; CHECK: orr w1, w2, w3              ; encoding: [0x41,0x00,0x03,0x2a]
+; CHECK: orr x1, x2, x3              ; encoding: [0x41,0x00,0x03,0xaa]
+; CHECK: orr w1, w2, w3, lsl #6      ; encoding: [0x41,0x18,0x03,0x2a]
+; CHECK: orr x1, x2, x3, lsl #6      ; encoding: [0x41,0x18,0x03,0xaa]
+; CHECK: orr w1, w2, w3, lsr #6      ; encoding: [0x41,0x18,0x43,0x2a]
+; CHECK: orr x1, x2, x3, lsr #6      ; encoding: [0x41,0x18,0x43,0xaa]
+; CHECK: orr w1, w2, w3, asr #6      ; encoding: [0x41,0x18,0x83,0x2a]
+; CHECK: orr x1, x2, x3, asr #6      ; encoding: [0x41,0x18,0x83,0xaa]
+; CHECK: orr w1, w2, w3, ror #6      ; encoding: [0x41,0x18,0xc3,0x2a]
+; CHECK: orr x1, x2, x3, ror #6      ; encoding: [0x41,0x18,0xc3,0xaa]
+
+  orn w1, w2, w3
+  orn x1, x2, x3
+  orn w1, w2, w3, lsl #7
+  orn x1, x2, x3, lsl #7
+  orn w1, w2, w3, lsr #7
+  orn x1, x2, x3, lsr #7
+  orn w1, w2, w3, asr #7
+  orn x1, x2, x3, asr #7
+  orn w1, w2, w3, ror #7
+  orn x1, x2, x3, ror #7
+
+; CHECK: orn w1, w2, w3              ; encoding: [0x41,0x00,0x23,0x2a]
+; CHECK: orn x1, x2, x3              ; encoding: [0x41,0x00,0x23,0xaa]
+; CHECK: orn w1, w2, w3, lsl #7      ; encoding: [0x41,0x1c,0x23,0x2a]
+; CHECK: orn x1, x2, x3, lsl #7      ; encoding: [0x41,0x1c,0x23,0xaa]
+; CHECK: orn w1, w2, w3, lsr #7      ; encoding: [0x41,0x1c,0x63,0x2a]
+; CHECK: orn x1, x2, x3, lsr #7      ; encoding: [0x41,0x1c,0x63,0xaa]
+; CHECK: orn w1, w2, w3, asr #7      ; encoding: [0x41,0x1c,0xa3,0x2a]
+; CHECK: orn x1, x2, x3, asr #7      ; encoding: [0x41,0x1c,0xa3,0xaa]
+; CHECK: orn w1, w2, w3, ror #7      ; encoding: [0x41,0x1c,0xe3,0x2a]
+; CHECK: orn x1, x2, x3, ror #7      ; encoding: [0x41,0x1c,0xe3,0xaa]
diff --git a/test/MC/ARM64/mapping-across-sections.s b/test/MC/ARM64/mapping-across-sections.s
new file mode 100644
index 0000000..00b324c
--- /dev/null
+++ b/test/MC/ARM64/mapping-across-sections.s
@@ -0,0 +1,28 @@
+// RUN: llvm-mc -triple=arm64-none-linux-gnu -filetype=obj < %s | llvm-objdump -t - | FileCheck %s
+
+        .text
+        add w0, w0, w0
+
+// .wibble should *not* inherit .text's mapping symbol. It's a completely different section.
+        .section .wibble
+        add w0, w0, w0
+
+// A setion should be able to start with a $d
+        .section .starts_data
+        .word 42
+
+// Changing back to .text should not emit a redundant $x
+        .text
+        add w0, w0, w0
+
+// With all those constraints, we want:
+//   + .text to have $x at 0 and no others
+//   + .wibble to have $x at 0
+//   + .starts_data to have $d at 0
+
+
+// CHECK: 00000000 .starts_data 00000000 $d
+// CHECK-NEXT: 00000000 .text 00000000 $x
+// CHECK-NEXT: 00000000 .wibble 00000000 $x
+// CHECK-NOT: ${{[adtx]}}
+
diff --git a/test/MC/ARM64/mapping-within-section.s b/test/MC/ARM64/mapping-within-section.s
new file mode 100644
index 0000000..f515cb9
--- /dev/null
+++ b/test/MC/ARM64/mapping-within-section.s
@@ -0,0 +1,23 @@
+// RUN: llvm-mc -triple=arm64-none-linux-gnu -filetype=obj < %s | llvm-objdump -t - | FileCheck %s
+
+    .text
+// $x at 0x0000
+    add w0, w0, w0
+// $d at 0x0004
+    .ascii "012"
+    .byte 1
+    .hword 2
+    .word 4
+    .xword 8
+    .single 4.0
+    .double 8.0
+    .space 10
+    .zero 3
+    .fill 10, 2, 42
+    .org 100, 12
+// $x at 0x0018
+    add x0, x0, x0
+
+// CHECK: 00000004         .text  00000000 $d
+// CHECK-NEXT: 00000000         .text  00000000 $x
+// CHECK-NEXT: 00000064         .text  00000000 $x
diff --git a/test/MC/ARM64/memory.s b/test/MC/ARM64/memory.s
new file mode 100644
index 0000000..0e8f1d5
--- /dev/null
+++ b/test/MC/ARM64/memory.s
@@ -0,0 +1,634 @@
+; RUN: llvm-mc -triple arm64-apple-darwin -show-encoding < %s | FileCheck %s
+
+foo:
+;-----------------------------------------------------------------------------
+; Indexed loads
+;-----------------------------------------------------------------------------
+
+  ldr    w5, [x4, #20]
+  ldr    x4, [x3]
+  ldr    x2, [sp, #32]
+  ldr    b5, [sp, #1]
+  ldr    h6, [sp, #2]
+  ldr    s7, [sp, #4]
+  ldr    d8, [sp, #8]
+  ldr    q9, [sp, #16]
+  ldrb   w4, [x3]
+  ldrb   w5, [x4, #20]
+  ldrb	 w2, [x3, _foo@pageoff]
+  ldrb   w3, [x2, "+[Test method].var"@PAGEOFF]
+  ldrsb  w9, [x3]
+  ldrsb  x2, [sp, #128]
+  ldrh   w2, [sp, #32]
+  ldrsh  w3, [sp, #32]
+  ldrsh  x5, [x9, #24]
+  ldrsw  x9, [sp, #512]
+
+  prfm   #5, [sp, #32]
+  prfm   #31, [sp, #32]
+  prfm   pldl1keep, [x2]
+  prfm   pldl1strm, [x2]
+  prfm   pldl2keep, [x2]
+  prfm   pldl2strm, [x2]
+  prfm   pldl3keep, [x2]
+  prfm   pldl3strm, [x2]
+  prfm   pstl1keep, [x2]
+  prfm   pstl1strm, [x2]
+  prfm   pstl2keep, [x2]
+  prfm   pstl2strm, [x2]
+  prfm   pstl3keep, [x2]
+  prfm   pstl3strm, [x2]
+  prfm  pstl3strm, [x4, x5, lsl #3]
+
+; CHECK: ldr    w5, [x4, #20]           ; encoding: [0x85,0x14,0x40,0xb9]
+; CHECK: ldr    x4, [x3]                ; encoding: [0x64,0x00,0x40,0xf9]
+; CHECK: ldr    x2, [sp, #32]           ; encoding: [0xe2,0x13,0x40,0xf9]
+; CHECK: ldr    b5, [sp, #1]            ; encoding: [0xe5,0x07,0x40,0x3d]
+; CHECK: ldr    h6, [sp, #2]            ; encoding: [0xe6,0x07,0x40,0x7d]
+; CHECK: ldr    s7, [sp, #4]            ; encoding: [0xe7,0x07,0x40,0xbd]
+; CHECK: ldr    d8, [sp, #8]            ; encoding: [0xe8,0x07,0x40,0xfd]
+; CHECK: ldr    q9, [sp, #16]           ; encoding: [0xe9,0x07,0xc0,0x3d]
+; CHECK: ldrb   w4, [x3]                ; encoding: [0x64,0x00,0x40,0x39]
+; CHECK: ldrb   w5, [x4, #20]           ; encoding: [0x85,0x50,0x40,0x39]
+; CHECK: ldrb	w2, [x3, _foo@PAGEOFF]  ; encoding: [0x62,0bAAAAAA00,0b01AAAAAA,0x39]
+; CHECK: ldrb	w3, [x2, "+[Test method].var"@PAGEOFF] ; encoding: [0x43,0bAAAAAA00,0b01AAAAAA,0x39]
+; CHECK: ldrsb  w9, [x3]                ; encoding: [0x69,0x00,0xc0,0x39]
+; CHECK: ldrsb  x2, [sp, #128]          ; encoding: [0xe2,0x03,0x82,0x39]
+; CHECK: ldrh   w2, [sp, #32]           ; encoding: [0xe2,0x43,0x40,0x79]
+; CHECK: ldrsh  w3, [sp, #32]           ; encoding: [0xe3,0x43,0xc0,0x79]
+; CHECK: ldrsh  x5, [x9, #24]           ; encoding: [0x25,0x31,0x80,0x79]
+; CHECK: ldrsw  x9, [sp, #512]          ; encoding: [0xe9,0x03,0x82,0xb9]
+; CHECK: prfm   pldl3strm, [sp, #32]    ; encoding: [0xe5,0x13,0x80,0xf9]
+; CHECK: prfm	#31, [sp, #32]          ; encoding: [0xff,0x13,0x80,0xf9]
+; CHECK: prfm   pldl1keep, [x2]         ; encoding: [0x40,0x00,0x80,0xf9]
+; CHECK: prfm   pldl1strm, [x2]         ; encoding: [0x41,0x00,0x80,0xf9]
+; CHECK: prfm   pldl2keep, [x2]         ; encoding: [0x42,0x00,0x80,0xf9]
+; CHECK: prfm   pldl2strm, [x2]         ; encoding: [0x43,0x00,0x80,0xf9]
+; CHECK: prfm   pldl3keep, [x2]         ; encoding: [0x44,0x00,0x80,0xf9]
+; CHECK: prfm   pldl3strm, [x2]         ; encoding: [0x45,0x00,0x80,0xf9]
+; CHECK: prfm   pstl1keep, [x2]         ; encoding: [0x50,0x00,0x80,0xf9]
+; CHECK: prfm   pstl1strm, [x2]         ; encoding: [0x51,0x00,0x80,0xf9]
+; CHECK: prfm   pstl2keep, [x2]         ; encoding: [0x52,0x00,0x80,0xf9]
+; CHECK: prfm   pstl2strm, [x2]         ; encoding: [0x53,0x00,0x80,0xf9]
+; CHECK: prfm   pstl3keep, [x2]         ; encoding: [0x54,0x00,0x80,0xf9]
+; CHECK: prfm   pstl3strm, [x2]         ; encoding: [0x55,0x00,0x80,0xf9]
+; CHECK: prfm	pstl3strm, [x4, x5, lsl #3] ; encoding: [0x95,0x78,0xa5,0xf8]
+
+;-----------------------------------------------------------------------------
+; Indexed stores
+;-----------------------------------------------------------------------------
+
+  str   x4, [x3]
+  str   x2, [sp, #32]
+  str   w5, [x4, #20]
+  str   b5, [sp, #1]
+  str   h6, [sp, #2]
+  str   s7, [sp, #4]
+  str   d8, [sp, #8]
+  str   q9, [sp, #16]
+  strb  w4, [x3]
+  strb  w5, [x4, #20]
+  strh  w2, [sp, #32]
+
+; CHECK: str   x4, [x3]                 ; encoding: [0x64,0x00,0x00,0xf9]
+; CHECK: str   x2, [sp, #32]            ; encoding: [0xe2,0x13,0x00,0xf9]
+; CHECK: str   w5, [x4, #20]            ; encoding: [0x85,0x14,0x00,0xb9]
+; CHECK: str   b5, [sp, #1]             ; encoding: [0xe5,0x07,0x00,0x3d]
+; CHECK: str   h6, [sp, #2]             ; encoding: [0xe6,0x07,0x00,0x7d]
+; CHECK: str   s7, [sp, #4]             ; encoding: [0xe7,0x07,0x00,0xbd]
+; CHECK: str   d8, [sp, #8]             ; encoding: [0xe8,0x07,0x00,0xfd]
+; CHECK: str   q9, [sp, #16]            ; encoding: [0xe9,0x07,0x80,0x3d]
+; CHECK: strb  w4, [x3]                 ; encoding: [0x64,0x00,0x00,0x39]
+; CHECK: strb  w5, [x4, #20]            ; encoding: [0x85,0x50,0x00,0x39]
+; CHECK: strh  w2, [sp, #32]            ; encoding: [0xe2,0x43,0x00,0x79]
+
+;-----------------------------------------------------------------------------
+; Unscaled immediate loads and stores
+;-----------------------------------------------------------------------------
+
+  ldur    w2, [x3]
+  ldur    w2, [sp, #24]
+  ldur    x2, [x3]
+  ldur    x2, [sp, #24]
+  ldur    b5, [sp, #1]
+  ldur    h6, [sp, #2]
+  ldur    s7, [sp, #4]
+  ldur    d8, [sp, #8]
+  ldur    q9, [sp, #16]
+  ldursb  w9, [x3]
+  ldursb  x2, [sp, #128]
+  ldursh  w3, [sp, #32]
+  ldursh  x5, [x9, #24]
+  ldursw  x9, [sp, #-128]
+
+; CHECK: ldur    w2, [x3]               ; encoding: [0x62,0x00,0x40,0xb8]
+; CHECK: ldur    w2, [sp, #24]          ; encoding: [0xe2,0x83,0x41,0xb8]
+; CHECK: ldur    x2, [x3]               ; encoding: [0x62,0x00,0x40,0xf8]
+; CHECK: ldur    x2, [sp, #24]          ; encoding: [0xe2,0x83,0x41,0xf8]
+; CHECK: ldur    b5, [sp, #1]           ; encoding: [0xe5,0x13,0x40,0x3c]
+; CHECK: ldur    h6, [sp, #2]           ; encoding: [0xe6,0x23,0x40,0x7c]
+; CHECK: ldur    s7, [sp, #4]           ; encoding: [0xe7,0x43,0x40,0xbc]
+; CHECK: ldur    d8, [sp, #8]           ; encoding: [0xe8,0x83,0x40,0xfc]
+; CHECK: ldur    q9, [sp, #16]          ; encoding: [0xe9,0x03,0xc1,0x3c]
+; CHECK: ldursb  w9, [x3]               ; encoding: [0x69,0x00,0xc0,0x38]
+; CHECK: ldursb  x2, [sp, #128]         ; encoding: [0xe2,0x03,0x88,0x38]
+; CHECK: ldursh  w3, [sp, #32]          ; encoding: [0xe3,0x03,0xc2,0x78]
+; CHECK: ldursh  x5, [x9, #24]          ; encoding: [0x25,0x81,0x81,0x78]
+; CHECK: ldursw  x9, [sp, #-128]        ; encoding: [0xe9,0x03,0x98,0xb8]
+
+  stur    w4, [x3]
+  stur    w2, [sp, #32]
+  stur    x4, [x3]
+  stur    x2, [sp, #32]
+  stur    w5, [x4, #20]
+  stur    b5, [sp, #1]
+  stur    h6, [sp, #2]
+  stur    s7, [sp, #4]
+  stur    d8, [sp, #8]
+  stur    q9, [sp, #16]
+  sturb   w4, [x3]
+  sturb   w5, [x4, #20]
+  sturh   w2, [sp, #32]
+  prfum   #5, [sp, #32]
+
+; CHECK: stur    w4, [x3]               ; encoding: [0x64,0x00,0x00,0xb8]
+; CHECK: stur    w2, [sp, #32]          ; encoding: [0xe2,0x03,0x02,0xb8]
+; CHECK: stur    x4, [x3]               ; encoding: [0x64,0x00,0x00,0xf8]
+; CHECK: stur    x2, [sp, #32]          ; encoding: [0xe2,0x03,0x02,0xf8]
+; CHECK: stur    w5, [x4, #20]          ; encoding: [0x85,0x40,0x01,0xb8]
+; CHECK: stur    b5, [sp, #1]           ; encoding: [0xe5,0x13,0x00,0x3c]
+; CHECK: stur    h6, [sp, #2]           ; encoding: [0xe6,0x23,0x00,0x7c]
+; CHECK: stur    s7, [sp, #4]           ; encoding: [0xe7,0x43,0x00,0xbc]
+; CHECK: stur    d8, [sp, #8]           ; encoding: [0xe8,0x83,0x00,0xfc]
+; CHECK: stur    q9, [sp, #16]          ; encoding: [0xe9,0x03,0x81,0x3c]
+; CHECK: sturb   w4, [x3]               ; encoding: [0x64,0x00,0x00,0x38]
+; CHECK: sturb   w5, [x4, #20]          ; encoding: [0x85,0x40,0x01,0x38]
+; CHECK: sturh   w2, [sp, #32]          ; encoding: [0xe2,0x03,0x02,0x78]
+; CHECK: prfum   pldl3strm, [sp, #32]   ; encoding: [0xe5,0x03,0x82,0xf8]
+
+;-----------------------------------------------------------------------------
+; Unprivileged loads and stores
+;-----------------------------------------------------------------------------
+
+  ldtr    w3, [x4, #16]
+  ldtr    x3, [x4, #16]
+  ldtrb   w3, [x4, #16]
+  ldtrsb  w9, [x3]
+  ldtrsb  x2, [sp, #128]
+  ldtrh   w3, [x4, #16]
+  ldtrsh  w3, [sp, #32]
+  ldtrsh  x5, [x9, #24]
+  ldtrsw  x9, [sp, #-128]
+
+; CHECK: ldtr   w3, [x4, #16]           ; encoding: [0x83,0x08,0x41,0xb8]
+; CHECK: ldtr   x3, [x4, #16]           ; encoding: [0x83,0x08,0x41,0xf8]
+; CHECK: ldtrb  w3, [x4, #16]           ; encoding: [0x83,0x08,0x41,0x38]
+; CHECK: ldtrsb w9, [x3]                ; encoding: [0x69,0x08,0xc0,0x38]
+; CHECK: ldtrsb x2, [sp, #128]          ; encoding: [0xe2,0x0b,0x88,0x38]
+; CHECK: ldtrh  w3, [x4, #16]           ; encoding: [0x83,0x08,0x41,0x78]
+; CHECK: ldtrsh w3, [sp, #32]           ; encoding: [0xe3,0x0b,0xc2,0x78]
+; CHECK: ldtrsh x5, [x9, #24]           ; encoding: [0x25,0x89,0x81,0x78]
+; CHECK: ldtrsw x9, [sp, #-128]         ; encoding: [0xe9,0x0b,0x98,0xb8]
+
+  sttr    w5, [x4, #20]
+  sttr    x4, [x3]
+  sttr    x2, [sp, #32]
+  sttrb   w4, [x3]
+  sttrb   w5, [x4, #20]
+  sttrh   w2, [sp, #32]
+
+; CHECK: sttr   w5, [x4, #20]           ; encoding: [0x85,0x48,0x01,0xb8]
+; CHECK: sttr   x4, [x3]                ; encoding: [0x64,0x08,0x00,0xf8]
+; CHECK: sttr   x2, [sp, #32]           ; encoding: [0xe2,0x0b,0x02,0xf8]
+; CHECK: sttrb  w4, [x3]                ; encoding: [0x64,0x08,0x00,0x38]
+; CHECK: sttrb  w5, [x4, #20]           ; encoding: [0x85,0x48,0x01,0x38]
+; CHECK: sttrh  w2, [sp, #32]           ; encoding: [0xe2,0x0b,0x02,0x78]
+
+;-----------------------------------------------------------------------------
+; Pre-indexed loads and stores
+;-----------------------------------------------------------------------------
+
+  ldr   fp, [x7, #8]!
+  ldr   lr, [x7, #8]!
+  ldr   b5, [x0, #1]!
+  ldr   h6, [x0, #2]!
+  ldr   s7, [x0, #4]!
+  ldr   d8, [x0, #8]!
+  ldr   q9, [x0, #16]!
+
+  str   lr, [x7, #-8]!
+  str   fp, [x7, #-8]!
+  str   b5, [x0, #-1]!
+  str   h6, [x0, #-2]!
+  str   s7, [x0, #-4]!
+  str   d8, [x0, #-8]!
+  str   q9, [x0, #-16]!
+
+; CHECK: ldr  fp, [x7, #8]!             ; encoding: [0xfd,0x8c,0x40,0xf8]
+; CHECK: ldr  lr, [x7, #8]!             ; encoding: [0xfe,0x8c,0x40,0xf8]
+; CHECK: ldr  b5, [x0, #1]!             ; encoding: [0x05,0x1c,0x40,0x3c]
+; CHECK: ldr  h6, [x0, #2]!             ; encoding: [0x06,0x2c,0x40,0x7c]
+; CHECK: ldr  s7, [x0, #4]!             ; encoding: [0x07,0x4c,0x40,0xbc]
+; CHECK: ldr  d8, [x0, #8]!             ; encoding: [0x08,0x8c,0x40,0xfc]
+; CHECK: ldr  q9, [x0, #16]!            ; encoding: [0x09,0x0c,0xc1,0x3c]
+
+; CHECK: str  lr, [x7, #-8]!            ; encoding: [0xfe,0x8c,0x1f,0xf8]
+; CHECK: str  fp, [x7, #-8]!            ; encoding: [0xfd,0x8c,0x1f,0xf8]
+; CHECK: str  b5, [x0, #-1]!            ; encoding: [0x05,0xfc,0x1f,0x3c]
+; CHECK: str  h6, [x0, #-2]!            ; encoding: [0x06,0xec,0x1f,0x7c]
+; CHECK: str  s7, [x0, #-4]!            ; encoding: [0x07,0xcc,0x1f,0xbc]
+; CHECK: str  d8, [x0, #-8]!            ; encoding: [0x08,0x8c,0x1f,0xfc]
+; CHECK: str  q9, [x0, #-16]!           ; encoding: [0x09,0x0c,0x9f,0x3c]
+
+;-----------------------------------------------------------------------------
+; post-indexed loads and stores
+;-----------------------------------------------------------------------------
+  str lr, [x7], #-8
+  str fp, [x7], #-8
+  str b5, [x0], #-1
+  str h6, [x0], #-2
+  str s7, [x0], #-4
+  str d8, [x0], #-8
+  str q9, [x0], #-16
+
+  ldr fp, [x7], #8
+  ldr lr, [x7], #8
+  ldr b5, [x0], #1
+  ldr h6, [x0], #2
+  ldr s7, [x0], #4
+  ldr d8, [x0], #8
+  ldr q9, [x0], #16
+
+; CHECK: str lr, [x7], #-8             ; encoding: [0xfe,0x84,0x1f,0xf8]
+; CHECK: str fp, [x7], #-8             ; encoding: [0xfd,0x84,0x1f,0xf8]
+; CHECK: str b5, [x0], #-1             ; encoding: [0x05,0xf4,0x1f,0x3c]
+; CHECK: str h6, [x0], #-2             ; encoding: [0x06,0xe4,0x1f,0x7c]
+; CHECK: str s7, [x0], #-4             ; encoding: [0x07,0xc4,0x1f,0xbc]
+; CHECK: str d8, [x0], #-8             ; encoding: [0x08,0x84,0x1f,0xfc]
+; CHECK: str q9, [x0], #-16            ; encoding: [0x09,0x04,0x9f,0x3c]
+
+; CHECK: ldr fp, [x7], #8              ; encoding: [0xfd,0x84,0x40,0xf8]
+; CHECK: ldr lr, [x7], #8              ; encoding: [0xfe,0x84,0x40,0xf8]
+; CHECK: ldr b5, [x0], #1              ; encoding: [0x05,0x14,0x40,0x3c]
+; CHECK: ldr h6, [x0], #2              ; encoding: [0x06,0x24,0x40,0x7c]
+; CHECK: ldr s7, [x0], #4              ; encoding: [0x07,0x44,0x40,0xbc]
+; CHECK: ldr d8, [x0], #8              ; encoding: [0x08,0x84,0x40,0xfc]
+; CHECK: ldr q9, [x0], #16             ; encoding: [0x09,0x04,0xc1,0x3c]
+
+;-----------------------------------------------------------------------------
+; Load/Store pair (indexed, offset)
+;-----------------------------------------------------------------------------
+
+  ldp    w3, w2, [x15, #16]
+  ldp    x4, x9, [sp, #-16]
+  ldpsw  x2, x3, [x14, #16]
+  ldpsw  x2, x3, [sp, #-16]
+  ldp    s10, s1, [x2, #64]
+  ldp    d10, d1, [x2]
+  ldp    q2, q3, [x0, #32]
+
+; CHECK: ldp    w3, w2, [x15, #16]      ; encoding: [0xe3,0x09,0x42,0x29]
+; CHECK: ldp    x4, x9, [sp, #-16]      ; encoding: [0xe4,0x27,0x7f,0xa9]
+; CHECK: ldpsw  x2, x3, [x14, #16]      ; encoding: [0xc2,0x0d,0x42,0x69]
+; CHECK: ldpsw  x2, x3, [sp, #-16]      ; encoding: [0xe2,0x0f,0x7e,0x69]
+; CHECK: ldp    s10, s1, [x2, #64]      ; encoding: [0x4a,0x04,0x48,0x2d]
+; CHECK: ldp    d10, d1, [x2]           ; encoding: [0x4a,0x04,0x40,0x6d]
+; CHECK: ldp    q2, q3, [x0, #32]       ; encoding: [0x02,0x0c,0x41,0xad]
+
+  stp    w3, w2, [x15, #16]
+  stp    x4, x9, [sp, #-16]
+  stp    s10, s1, [x2, #64]
+  stp    d10, d1, [x2]
+  stp    q2, q3, [x0, #32]
+
+; CHECK: stp    w3, w2, [x15, #16]      ; encoding: [0xe3,0x09,0x02,0x29]
+; CHECK: stp    x4, x9, [sp, #-16]      ; encoding: [0xe4,0x27,0x3f,0xa9]
+; CHECK: stp    s10, s1, [x2, #64]      ; encoding: [0x4a,0x04,0x08,0x2d]
+; CHECK: stp    d10, d1, [x2]           ; encoding: [0x4a,0x04,0x00,0x6d]
+; CHECK: stp    q2, q3, [x0, #32]       ; encoding: [0x02,0x0c,0x01,0xad]
+
+;-----------------------------------------------------------------------------
+; Load/Store pair (pre-indexed)
+;-----------------------------------------------------------------------------
+
+  ldp    w3, w2, [x15, #16]!
+  ldp    x4, x9, [sp, #-16]!
+  ldpsw  x2, x3, [x14, #16]!
+  ldpsw  x2, x3, [sp, #-16]!
+  ldp    s10, s1, [x2, #64]!
+  ldp    d10, d1, [x2, #16]!
+
+; CHECK: ldp  w3, w2, [x15, #16]!       ; encoding: [0xe3,0x09,0xc2,0x29]
+; CHECK: ldp  x4, x9, [sp, #-16]!       ; encoding: [0xe4,0x27,0xff,0xa9]
+; CHECK: ldpsw	x2, x3, [x14, #16]!     ; encoding: [0xc2,0x0d,0xc2,0x69]
+; CHECK: ldpsw	x2, x3, [sp, #-16]!     ; encoding: [0xe2,0x0f,0xfe,0x69]
+; CHECK: ldp  s10, s1, [x2, #64]!       ; encoding: [0x4a,0x04,0xc8,0x2d]
+; CHECK: ldp  d10, d1, [x2, #16]!       ; encoding: [0x4a,0x04,0xc1,0x6d]
+
+  stp    w3, w2, [x15, #16]!
+  stp    x4, x9, [sp, #-16]!
+  stp    s10, s1, [x2, #64]!
+  stp    d10, d1, [x2, #16]!
+
+; CHECK: stp  w3, w2, [x15, #16]!       ; encoding: [0xe3,0x09,0x82,0x29]
+; CHECK: stp  x4, x9, [sp, #-16]!       ; encoding: [0xe4,0x27,0xbf,0xa9]
+; CHECK: stp  s10, s1, [x2, #64]!       ; encoding: [0x4a,0x04,0x88,0x2d]
+; CHECK: stp  d10, d1, [x2, #16]!       ; encoding: [0x4a,0x04,0x81,0x6d]
+
+;-----------------------------------------------------------------------------
+; Load/Store pair (post-indexed)
+;-----------------------------------------------------------------------------
+
+  ldp    w3, w2, [x15], #16
+  ldp    x4, x9, [sp], #-16
+  ldpsw  x2, x3, [x14], #16
+  ldpsw  x2, x3, [sp], #-16
+  ldp    s10, s1, [x2], #64
+  ldp    d10, d1, [x2], #16
+
+; CHECK: ldp  w3, w2, [x15], #16        ; encoding: [0xe3,0x09,0xc2,0x28]
+; CHECK: ldp  x4, x9, [sp], #-16        ; encoding: [0xe4,0x27,0xff,0xa8]
+; CHECK: ldpsw	x2, x3, [x14], #16      ; encoding: [0xc2,0x0d,0xc2,0x68]
+; CHECK: ldpsw	x2, x3, [sp], #-16      ; encoding: [0xe2,0x0f,0xfe,0x68]
+; CHECK: ldp  s10, s1, [x2], #64        ; encoding: [0x4a,0x04,0xc8,0x2c]
+; CHECK: ldp  d10, d1, [x2], #16        ; encoding: [0x4a,0x04,0xc1,0x6c]
+
+  stp    w3, w2, [x15], #16
+  stp    x4, x9, [sp], #-16
+  stp    s10, s1, [x2], #64
+  stp    d10, d1, [x2], #16
+
+; CHECK: stp  w3, w2, [x15], #16        ; encoding: [0xe3,0x09,0x82,0x28]
+; CHECK: stp  x4, x9, [sp], #-16        ; encoding: [0xe4,0x27,0xbf,0xa8]
+; CHECK: stp  s10, s1, [x2], #64        ; encoding: [0x4a,0x04,0x88,0x2c]
+; CHECK: stp  d10, d1, [x2], #16        ; encoding: [0x4a,0x04,0x81,0x6c]
+
+;-----------------------------------------------------------------------------
+; Load/Store pair (no-allocate)
+;-----------------------------------------------------------------------------
+
+  ldnp  w3, w2, [x15, #16]
+  ldnp  x4, x9, [sp, #-16]
+  ldnp  s10, s1, [x2, #64]
+  ldnp  d10, d1, [x2]
+
+; CHECK: ldnp  w3, w2, [x15, #16]       ; encoding: [0xe3,0x09,0x42,0x28]
+; CHECK: ldnp  x4, x9, [sp, #-16]       ; encoding: [0xe4,0x27,0x7f,0xa8]
+; CHECK: ldnp  s10, s1, [x2, #64]       ; encoding: [0x4a,0x04,0x48,0x2c]
+; CHECK: ldnp  d10, d1, [x2]            ; encoding: [0x4a,0x04,0x40,0x6c]
+
+  stnp  w3, w2, [x15, #16]
+  stnp  x4, x9, [sp, #-16]
+  stnp  s10, s1, [x2, #64]
+  stnp  d10, d1, [x2]
+
+; CHECK: stnp  w3, w2, [x15, #16]       ; encoding: [0xe3,0x09,0x02,0x28]
+; CHECK: stnp  x4, x9, [sp, #-16]       ; encoding: [0xe4,0x27,0x3f,0xa8]
+; CHECK: stnp  s10, s1, [x2, #64]       ; encoding: [0x4a,0x04,0x08,0x2c]
+; CHECK: stnp  d10, d1, [x2]            ; encoding: [0x4a,0x04,0x00,0x6c]
+
+;-----------------------------------------------------------------------------
+; Load/Store register offset
+;-----------------------------------------------------------------------------
+
+  ldr  w0, [x0, x0]
+  ldr  w0, [x0, x0, lsl #2]
+  ldr  x0, [x0, x0]
+  ldr  x0, [x0, x0, lsl #3]
+  ldr  x0, [x0, x0, sxtx]
+
+; CHECK: ldr  w0, [x0, x0]              ; encoding: [0x00,0x68,0x60,0xb8]
+; CHECK: ldr  w0, [x0, x0, lsl #2]      ; encoding: [0x00,0x78,0x60,0xb8]
+; CHECK: ldr  x0, [x0, x0]              ; encoding: [0x00,0x68,0x60,0xf8]
+; CHECK: ldr  x0, [x0, x0, lsl #3]      ; encoding: [0x00,0x78,0x60,0xf8]
+; CHECK: ldr  x0, [x0, x0, sxtx]        ; encoding: [0x00,0xe8,0x60,0xf8]
+
+  ldr  b1, [x1, x2]
+  ldr  b1, [x1, x2, lsl #0]
+  ldr  h1, [x1, x2]
+  ldr  h1, [x1, x2, lsl #1]
+  ldr  s1, [x1, x2]
+  ldr  s1, [x1, x2, lsl #2]
+  ldr  d1, [x1, x2]
+  ldr  d1, [x1, x2, lsl #3]
+  ldr  q1, [x1, x2]
+  ldr  q1, [x1, x2, lsl #4]
+
+; CHECK: ldr  b1, [x1, x2]              ; encoding: [0x21,0x68,0x62,0x3c]
+; CHECK: ldr  b1, [x1, x2, lsl #0]      ; encoding: [0x21,0x78,0x62,0x3c]
+; CHECK: ldr  h1, [x1, x2]              ; encoding: [0x21,0x68,0x62,0x7c]
+; CHECK: ldr  h1, [x1, x2, lsl #1]      ; encoding: [0x21,0x78,0x62,0x7c]
+; CHECK: ldr  s1, [x1, x2]              ; encoding: [0x21,0x68,0x62,0xbc]
+; CHECK: ldr  s1, [x1, x2, lsl #2]      ; encoding: [0x21,0x78,0x62,0xbc]
+; CHECK: ldr  d1, [x1, x2]              ; encoding: [0x21,0x68,0x62,0xfc]
+; CHECK: ldr  d1, [x1, x2, lsl #3]      ; encoding: [0x21,0x78,0x62,0xfc]
+; CHECK: ldr  q1, [x1, x2]              ; encoding: [0x21,0x68,0xe2,0x3c]
+; CHECK: ldr  q1, [x1, x2, lsl #4]      ; encoding: [0x21,0x78,0xe2,0x3c]
+
+  str  d1, [sp, x3]
+  str  d1, [sp, x3, uxtw #3]
+  str  q1, [sp, x3]
+  str  q1, [sp, x3, uxtw #4]
+
+; CHECK: str  d1, [sp, x3]              ; encoding: [0xe1,0x6b,0x23,0xfc]
+; CHECK: str  d1, [sp, x3, uxtw #3]     ; encoding: [0xe1,0x5b,0x23,0xfc]
+; CHECK: str  q1, [sp, x3]              ; encoding: [0xe1,0x6b,0xa3,0x3c]
+; CHECK: str  q1, [sp, x3, uxtw #4]     ; encoding: [0xe1,0x5b,0xa3,0x3c]
+
+;-----------------------------------------------------------------------------
+; Load literal
+;-----------------------------------------------------------------------------
+
+  ldr    w5, foo
+  ldr    x4, foo
+  ldrsw  x9, foo
+  prfm   #5, foo
+
+; CHECK: ldr    w5, foo                 ; encoding: [0bAAA00101,A,A,0x18]
+; CHECK: ldr    x4, foo                 ; encoding: [0bAAA00100,A,A,0x58]
+; CHECK: ldrsw  x9, foo                 ; encoding: [0bAAA01001,A,A,0x98]
+; CHECK: prfm   pldl3strm, foo          ; encoding: [0bAAA00101,A,A,0xd8]
+
+;-----------------------------------------------------------------------------
+; Load/Store exclusive
+;-----------------------------------------------------------------------------
+
+  ldxr   w6, [x1]
+  ldxr   x6, [x1]
+  ldxrb  w6, [x1]
+  ldxrh  w6, [x1]
+  ldxp   w7, w3, [x9]
+  ldxp   x7, x3, [x9]
+
+; CHECK: ldxrb  w6, [x1]                ; encoding: [0x26,0x7c,0x5f,0x08]
+; CHECK: ldxrh  w6, [x1]                ; encoding: [0x26,0x7c,0x5f,0x48]
+; CHECK: ldxp   w7, w3, [x9]            ; encoding: [0x27,0x0d,0x7f,0x88]
+; CHECK: ldxp   x7, x3, [x9]            ; encoding: [0x27,0x0d,0x7f,0xc8]
+
+  stxr   w1, x4, [x3]
+  stxr   w1, w4, [x3]
+  stxrb  w1, w4, [x3]
+  stxrh  w1, w4, [x3]
+  stxp   w1, x2, x6, [x1]
+  stxp   w1, w2, w6, [x1]
+
+; CHECK: stxr   w1, x4, [x3]            ; encoding: [0x64,0x7c,0x01,0xc8]
+; CHECK: stxr   w1, w4, [x3]            ; encoding: [0x64,0x7c,0x01,0x88]
+; CHECK: stxrb  w1, w4, [x3]            ; encoding: [0x64,0x7c,0x01,0x08]
+; CHECK: stxrh  w1, w4, [x3]            ; encoding: [0x64,0x7c,0x01,0x48]
+; CHECK: stxp   w1, x2, x6, [x1]        ; encoding: [0x22,0x18,0x21,0xc8]
+; CHECK: stxp   w1, w2, w6, [x1]        ; encoding: [0x22,0x18,0x21,0x88]
+
+;-----------------------------------------------------------------------------
+; Load-acquire/Store-release non-exclusive
+;-----------------------------------------------------------------------------
+
+  ldar   w4, [sp]
+  ldar   x4, [sp, #0]
+  ldarb  w4, [sp]
+  ldarh  w4, [sp]
+
+; CHECK: ldar   w4, [sp]                ; encoding: [0xe4,0xff,0xdf,0x88]
+; CHECK: ldar   x4, [sp]                ; encoding: [0xe4,0xff,0xdf,0xc8]
+; CHECK: ldarb  w4, [sp]                ; encoding: [0xe4,0xff,0xdf,0x08]
+; CHECK: ldarh  w4, [sp]                ; encoding: [0xe4,0xff,0xdf,0x48]
+
+  stlr   w3, [x6]
+  stlr   x3, [x6]
+  stlrb  w3, [x6]
+  stlrh  w3, [x6]
+
+; CHECK: stlr   w3, [x6]                ; encoding: [0xc3,0xfc,0x9f,0x88]
+; CHECK: stlr   x3, [x6]                ; encoding: [0xc3,0xfc,0x9f,0xc8]
+; CHECK: stlrb  w3, [x6]                ; encoding: [0xc3,0xfc,0x9f,0x08]
+; CHECK: stlrh  w3, [x6]                ; encoding: [0xc3,0xfc,0x9f,0x48]
+
+;-----------------------------------------------------------------------------
+; Load-acquire/Store-release exclusive
+;-----------------------------------------------------------------------------
+
+  ldaxr   w2, [x4]
+  ldaxr   x2, [x4]
+  ldaxrb  w2, [x4, #0]
+  ldaxrh  w2, [x4]
+  ldaxp   w2, w6, [x1]
+  ldaxp   x2, x6, [x1]
+
+; CHECK: ldaxr   w2, [x4]               ; encoding: [0x82,0xfc,0x5f,0x88]
+; CHECK: ldaxr   x2, [x4]               ; encoding: [0x82,0xfc,0x5f,0xc8]
+; CHECK: ldaxrb  w2, [x4]               ; encoding: [0x82,0xfc,0x5f,0x08]
+; CHECK: ldaxrh  w2, [x4]               ; encoding: [0x82,0xfc,0x5f,0x48]
+; CHECK: ldaxp   w2, w6, [x1]           ; encoding: [0x22,0x98,0x7f,0x88]
+; CHECK: ldaxp   x2, x6, [x1]           ; encoding: [0x22,0x98,0x7f,0xc8]
+
+  stlxr   w8, x7, [x1]
+  stlxr   w8, w7, [x1]
+  stlxrb  w8, w7, [x1]
+  stlxrh  w8, w7, [x1]
+  stlxp   w1, x2, x6, [x1]
+  stlxp   w1, w2, w6, [x1]
+
+; CHECK: stlxr  w8, x7, [x1]            ; encoding: [0x27,0xfc,0x08,0xc8]
+; CHECK: stlxr  w8, w7, [x1]            ; encoding: [0x27,0xfc,0x08,0x88]
+; CHECK: stlxrb w8, w7, [x1]            ; encoding: [0x27,0xfc,0x08,0x08]
+; CHECK: stlxrh w8, w7, [x1]            ; encoding: [0x27,0xfc,0x08,0x48]
+; CHECK: stlxp  w1, x2, x6, [x1]        ; encoding: [0x22,0x98,0x21,0xc8]
+; CHECK: stlxp  w1, w2, w6, [x1]        ; encoding: [0x22,0x98,0x21,0x88]
+
+
+;-----------------------------------------------------------------------------
+; LDUR/STUR aliases for negative and unaligned LDR/STR instructions.
+;
+; According to the ARM ISA documentation:
+; "A programmer-friendly assembler should also generate these instructions
+; in response to the standard LDR/STR mnemonics when the immediate offset is
+; unambiguous, i.e. negative or unaligned."
+;-----------------------------------------------------------------------------
+
+  ldr x11, [fp, #-8]
+  ldr x11, [fp, #7]
+  ldr w0, [x0, #2]
+  ldr w0, [x0, #-256]
+  ldr b2, [x1, #-2]
+  ldr h3, [x2, #3]
+  ldr h3, [x3, #-4]
+  ldr s3, [x4, #3]
+  ldr s3, [x5, #-4]
+  ldr d4, [x6, #4]
+  ldr d4, [x7, #-8]
+  ldr q5, [x8, #8]
+  ldr q5, [x9, #-16]
+
+; CHECK: ldur	x11, [fp, #-8]          ; encoding: [0xab,0x83,0x5f,0xf8]
+; CHECK: ldur	x11, [fp, #7]           ; encoding: [0xab,0x73,0x40,0xf8]
+; CHECK: ldur	w0, [x0, #2]            ; encoding: [0x00,0x20,0x40,0xb8]
+; CHECK: ldur	w0, [x0, #-256]         ; encoding: [0x00,0x00,0x50,0xb8]
+; CHECK: ldur	b2, [x1, #-2]           ; encoding: [0x22,0xe0,0x5f,0x3c]
+; CHECK: ldur	h3, [x2, #3]            ; encoding: [0x43,0x30,0x40,0x7c]
+; CHECK: ldur	h3, [x3, #-4]           ; encoding: [0x63,0xc0,0x5f,0x7c]
+; CHECK: ldur	s3, [x4, #3]            ; encoding: [0x83,0x30,0x40,0xbc]
+; CHECK: ldur	s3, [x5, #-4]           ; encoding: [0xa3,0xc0,0x5f,0xbc]
+; CHECK: ldur	d4, [x6, #4]            ; encoding: [0xc4,0x40,0x40,0xfc]
+; CHECK: ldur	d4, [x7, #-8]           ; encoding: [0xe4,0x80,0x5f,0xfc]
+; CHECK: ldur	q5, [x8, #8]            ; encoding: [0x05,0x81,0xc0,0x3c]
+; CHECK: ldur	q5, [x9, #-16]          ; encoding: [0x25,0x01,0xdf,0x3c]
+
+  str x11, [fp, #-8]
+  str x11, [fp, #7]
+  str w0, [x0, #2]
+  str w0, [x0, #-256]
+  str b2, [x1, #-2]
+  str h3, [x2, #3]
+  str h3, [x3, #-4]
+  str s3, [x4, #3]
+  str s3, [x5, #-4]
+  str d4, [x6, #4]
+  str d4, [x7, #-8]
+  str q5, [x8, #8]
+  str q5, [x9, #-16]
+
+; CHECK: stur	x11, [fp, #-8]          ; encoding: [0xab,0x83,0x1f,0xf8]
+; CHECK: stur	x11, [fp, #7]           ; encoding: [0xab,0x73,0x00,0xf8]
+; CHECK: stur	w0, [x0, #2]            ; encoding: [0x00,0x20,0x00,0xb8]
+; CHECK: stur	w0, [x0, #-256]         ; encoding: [0x00,0x00,0x10,0xb8]
+; CHECK: stur	b2, [x1, #-2]           ; encoding: [0x22,0xe0,0x1f,0x3c]
+; CHECK: stur	h3, [x2, #3]            ; encoding: [0x43,0x30,0x00,0x7c]
+; CHECK: stur	h3, [x3, #-4]           ; encoding: [0x63,0xc0,0x1f,0x7c]
+; CHECK: stur	s3, [x4, #3]            ; encoding: [0x83,0x30,0x00,0xbc]
+; CHECK: stur	s3, [x5, #-4]           ; encoding: [0xa3,0xc0,0x1f,0xbc]
+; CHECK: stur	d4, [x6, #4]            ; encoding: [0xc4,0x40,0x00,0xfc]
+; CHECK: stur	d4, [x7, #-8]           ; encoding: [0xe4,0x80,0x1f,0xfc]
+; CHECK: stur	q5, [x8, #8]            ; encoding: [0x05,0x81,0x80,0x3c]
+; CHECK: stur	q5, [x9, #-16]          ; encoding: [0x25,0x01,0x9f,0x3c]
+
+  ldrb w3, [x1, #-1]
+  ldrh w4, [x2, #1]
+  ldrh w5, [x3, #-1]
+  ldrsb w6, [x4, #-1]
+  ldrsb x7, [x5, #-1]
+  ldrsh w8, [x6, #1]
+  ldrsh w9, [x7, #-1]
+  ldrsh x1, [x8, #1]
+  ldrsh x2, [x9, #-1]
+  ldrsw x3, [x10, #10]
+  ldrsw x4, [x11, #-1]
+
+; CHECK: ldurb	w3, [x1, #-1]           ; encoding: [0x23,0xf0,0x5f,0x38]
+; CHECK: ldurh	w4, [x2, #1]            ; encoding: [0x44,0x10,0x40,0x78]
+; CHECK: ldurh	w5, [x3, #-1]           ; encoding: [0x65,0xf0,0x5f,0x78]
+; CHECK: ldursb	w6, [x4, #-1]           ; encoding: [0x86,0xf0,0xdf,0x38]
+; CHECK: ldursb	x7, [x5, #-1]           ; encoding: [0xa7,0xf0,0x9f,0x38]
+; CHECK: ldursh	w8, [x6, #1]            ; encoding: [0xc8,0x10,0xc0,0x78]
+; CHECK: ldursh	w9, [x7, #-1]           ; encoding: [0xe9,0xf0,0xdf,0x78]
+; CHECK: ldursh	x1, [x8, #1]            ; encoding: [0x01,0x11,0x80,0x78]
+; CHECK: ldursh	x2, [x9, #-1]           ; encoding: [0x22,0xf1,0x9f,0x78]
+; CHECK: ldursw	x3, [x10, #10]          ; encoding: [0x43,0xa1,0x80,0xb8]
+; CHECK: ldursw	x4, [x11, #-1]          ; encoding: [0x64,0xf1,0x9f,0xb8]
+
+  strb w3, [x1, #-1]
+  strh w4, [x2, #1]
+  strh w5, [x3, #-1]
+
+; CHECK: sturb	w3, [x1, #-1]           ; encoding: [0x23,0xf0,0x1f,0x38]
+; CHECK: sturh	w4, [x2, #1]            ; encoding: [0x44,0x10,0x00,0x78]
+; CHECK: sturh	w5, [x3, #-1]           ; encoding: [0x65,0xf0,0x1f,0x78]
diff --git a/test/MC/ARM64/separator.s b/test/MC/ARM64/separator.s
new file mode 100644
index 0000000..18f34b9
--- /dev/null
+++ b/test/MC/ARM64/separator.s
@@ -0,0 +1,20 @@
+; RUN: llvm-mc -triple arm64-apple-darwin -show-encoding < %s | FileCheck %s
+
+; ARM64 uses a multi-character statment separator, "%%". Check that we lex
+; it properly and recognize the multiple assembly statements on the line.
+
+; To make sure the output assembly correctly handled the instructions,
+; tell it to show encodings. That will result in the two 'mov' instructions
+; being on separate lines in the output. We look for the "; encoding" string
+; to verify that. For this test, we don't care what the encoding is, just that
+; there is one for each 'mov' instruction.
+
+
+_foo:
+; CHECK: foo
+; CHECK: mov x0, x1 ; encoding
+; CHECK: mov x1, x0 ; encoding
+	mov x0, x1 %% mov x1, x0
+	ret	lr
+
+
diff --git a/test/MC/ARM64/simd-ldst.s b/test/MC/ARM64/simd-ldst.s
new file mode 100644
index 0000000..a754c72
--- /dev/null
+++ b/test/MC/ARM64/simd-ldst.s
@@ -0,0 +1,2404 @@
+; RUN: llvm-mc -triple arm64-apple-darwin -output-asm-variant=1 -show-encoding < %s | FileCheck %s
+
+_ld1st1_multiple:
+  ld1.8b {v0}, [x1]
+  ld1.8b {v0, v1}, [x1]
+  ld1.8b {v0, v1, v2}, [x1]
+  ld1.8b {v0, v1, v2, v3}, [x1]
+
+  ld1.8b {v3}, [x1]
+  ld1.8b {v3, v4}, [x2]
+  ld1.8b {v4, v5, v6}, [x3]
+  ld1.8b {v7, v8, v9, v10}, [x4]
+
+  ld1.16b {v0}, [x1]
+  ld1.16b {v0, v1}, [x1]
+  ld1.16b {v0, v1, v2}, [x1]
+  ld1.16b {v0, v1, v2, v3}, [x1]
+
+  ld1.4h {v0}, [x1]
+  ld1.4h {v0, v1}, [x1]
+  ld1.4h {v0, v1, v2}, [x1]
+  ld1.4h {v0, v1, v2, v3}, [x1]
+
+  ld1.8h {v0}, [x1]
+  ld1.8h {v0, v1}, [x1]
+  ld1.8h {v0, v1, v2}, [x1]
+  ld1.8h {v0, v1, v2, v3}, [x1]
+
+  ld1.2s {v0}, [x1]
+  ld1.2s {v0, v1}, [x1]
+  ld1.2s {v0, v1, v2}, [x1]
+  ld1.2s {v0, v1, v2, v3}, [x1]
+
+  ld1.4s {v0}, [x1]
+  ld1.4s {v0, v1}, [x1]
+  ld1.4s {v0, v1, v2}, [x1]
+  ld1.4s {v0, v1, v2, v3}, [x1]
+
+  ld1.1d {v0}, [x1]
+  ld1.1d {v0, v1}, [x1]
+  ld1.1d {v0, v1, v2}, [x1]
+  ld1.1d {v0, v1, v2, v3}, [x1]
+
+  ld1.2d {v0}, [x1]
+  ld1.2d {v0, v1}, [x1]
+  ld1.2d {v0, v1, v2}, [x1]
+  ld1.2d {v0, v1, v2, v3}, [x1]
+
+  st1.8b {v0}, [x1]
+  st1.8b {v0, v1}, [x1]
+  st1.8b {v0, v1, v2}, [x1]
+  st1.8b {v0, v1, v2, v3}, [x1]
+
+  st1.16b {v0}, [x1]
+  st1.16b {v0, v1}, [x1]
+  st1.16b {v0, v1, v2}, [x1]
+  st1.16b {v0, v1, v2, v3}, [x1]
+
+  st1.4h {v0}, [x1]
+  st1.4h {v0, v1}, [x1]
+  st1.4h {v0, v1, v2}, [x1]
+  st1.4h {v0, v1, v2, v3}, [x1]
+
+  st1.8h {v0}, [x1]
+  st1.8h {v0, v1}, [x1]
+  st1.8h {v0, v1, v2}, [x1]
+  st1.8h {v0, v1, v2, v3}, [x1]
+
+  st1.2s {v0}, [x1]
+  st1.2s {v0, v1}, [x1]
+  st1.2s {v0, v1, v2}, [x1]
+  st1.2s {v0, v1, v2, v3}, [x1]
+
+  st1.4s {v0}, [x1]
+  st1.4s {v0, v1}, [x1]
+  st1.4s {v0, v1, v2}, [x1]
+  st1.4s {v0, v1, v2, v3}, [x1]
+
+  st1.1d {v0}, [x1]
+  st1.1d {v0, v1}, [x1]
+  st1.1d {v0, v1, v2}, [x1]
+  st1.1d {v0, v1, v2, v3}, [x1]
+
+  st1.2d {v0}, [x1]
+  st1.2d {v0, v1}, [x1]
+  st1.2d {v0, v1, v2}, [x1]
+  st1.2d {v0, v1, v2, v3}, [x1]
+
+  st1.2d {v5}, [x1]
+  st1.2d {v7, v8}, [x10]
+  st1.2d {v11, v12, v13}, [x1]
+  st1.2d {v28, v29, v30, v31}, [x13]
+
+; CHECK: _ld1st1_multiple:
+; CHECK: ld1.8b	{ v0 }, [x1]            ; encoding: [0x20,0x70,0x40,0x0c]
+; CHECK: ld1.8b	{ v0, v1 }, [x1]        ; encoding: [0x20,0xa0,0x40,0x0c]
+; CHECK: ld1.8b	{ v0, v1, v2 }, [x1]    ; encoding: [0x20,0x60,0x40,0x0c]
+; CHECK: ld1.8b	{ v0, v1, v2, v3 }, [x1] ; encoding: [0x20,0x20,0x40,0x0c]
+
+; CHECK: ld1.8b { v3 }, [x1]            ; encoding: [0x23,0x70,0x40,0x0c]
+; CHECK: ld1.8b { v3, v4 }, [x2]        ; encoding: [0x43,0xa0,0x40,0x0c]
+; CHECK: ld1.8b { v4, v5, v6 }, [x3]    ; encoding: [0x64,0x60,0x40,0x0c]
+; CHECK: ld1.8b { v7, v8, v9, v10 }, [x4] ; encoding: [0x87,0x20,0x40,0x0c]
+
+; CHECK: ld1.16b	{ v0 }, [x1]            ; encoding: [0x20,0x70,0x40,0x4c]
+; CHECK: ld1.16b	{ v0, v1 }, [x1]        ; encoding: [0x20,0xa0,0x40,0x4c]
+; CHECK: ld1.16b	{ v0, v1, v2 }, [x1]    ; encoding: [0x20,0x60,0x40,0x4c]
+; CHECK: ld1.16b	{ v0, v1, v2, v3 }, [x1] ; encoding: [0x20,0x20,0x40,0x4c]
+
+; CHECK: ld1.4h	{ v0 }, [x1]            ; encoding: [0x20,0x74,0x40,0x0c]
+; CHECK: ld1.4h	{ v0, v1 }, [x1]        ; encoding: [0x20,0xa4,0x40,0x0c]
+; CHECK: ld1.4h	{ v0, v1, v2 }, [x1]    ; encoding: [0x20,0x64,0x40,0x0c]
+; CHECK: ld1.4h	{ v0, v1, v2, v3 }, [x1] ; encoding: [0x20,0x24,0x40,0x0c]
+
+; CHECK: ld1.8h	{ v0 }, [x1]            ; encoding: [0x20,0x74,0x40,0x4c]
+; CHECK: ld1.8h	{ v0, v1 }, [x1]        ; encoding: [0x20,0xa4,0x40,0x4c]
+; CHECK: ld1.8h	{ v0, v1, v2 }, [x1]    ; encoding: [0x20,0x64,0x40,0x4c]
+; CHECK: ld1.8h	{ v0, v1, v2, v3 }, [x1] ; encoding: [0x20,0x24,0x40,0x4c]
+
+; CHECK: ld1.2s	{ v0 }, [x1]            ; encoding: [0x20,0x78,0x40,0x0c]
+; CHECK: ld1.2s	{ v0, v1 }, [x1]        ; encoding: [0x20,0xa8,0x40,0x0c]
+; CHECK: ld1.2s	{ v0, v1, v2 }, [x1]    ; encoding: [0x20,0x68,0x40,0x0c]
+; CHECK: ld1.2s	{ v0, v1, v2, v3 }, [x1] ; encoding: [0x20,0x28,0x40,0x0c]
+
+; CHECK: ld1.4s	{ v0 }, [x1]            ; encoding: [0x20,0x78,0x40,0x4c]
+; CHECK: ld1.4s	{ v0, v1 }, [x1]        ; encoding: [0x20,0xa8,0x40,0x4c]
+; CHECK: ld1.4s	{ v0, v1, v2 }, [x1]    ; encoding: [0x20,0x68,0x40,0x4c]
+; CHECK: ld1.4s	{ v0, v1, v2, v3 }, [x1] ; encoding: [0x20,0x28,0x40,0x4c]
+
+; CHECK: ld1.1d	{ v0 }, [x1]            ; encoding: [0x20,0x7c,0x40,0x0c]
+; CHECK: ld1.1d	{ v0, v1 }, [x1]        ; encoding: [0x20,0xac,0x40,0x0c]
+; CHECK: ld1.1d	{ v0, v1, v2 }, [x1]    ; encoding: [0x20,0x6c,0x40,0x0c]
+; CHECK: ld1.1d	{ v0, v1, v2, v3 }, [x1] ; encoding: [0x20,0x2c,0x40,0x0c]
+
+; CHECK: ld1.2d	{ v0 }, [x1]            ; encoding: [0x20,0x7c,0x40,0x4c]
+; CHECK: ld1.2d	{ v0, v1 }, [x1]        ; encoding: [0x20,0xac,0x40,0x4c]
+; CHECK: ld1.2d	{ v0, v1, v2 }, [x1]    ; encoding: [0x20,0x6c,0x40,0x4c]
+; CHECK: ld1.2d	{ v0, v1, v2, v3 }, [x1] ; encoding: [0x20,0x2c,0x40,0x4c]
+
+
+; CHECK: st1.8b	{ v0 }, [x1]            ; encoding: [0x20,0x70,0x00,0x0c]
+; CHECK: st1.8b	{ v0, v1 }, [x1]        ; encoding: [0x20,0xa0,0x00,0x0c]
+; CHECK: st1.8b	{ v0, v1, v2 }, [x1]    ; encoding: [0x20,0x60,0x00,0x0c]
+; CHECK: st1.8b	{ v0, v1, v2, v3 }, [x1] ; encoding: [0x20,0x20,0x00,0x0c]
+
+; CHECK: st1.16b	{ v0 }, [x1]            ; encoding: [0x20,0x70,0x00,0x4c]
+; CHECK: st1.16b	{ v0, v1 }, [x1]        ; encoding: [0x20,0xa0,0x00,0x4c]
+; CHECK: st1.16b	{ v0, v1, v2 }, [x1]    ; encoding: [0x20,0x60,0x00,0x4c]
+; CHECK: st1.16b	{ v0, v1, v2, v3 }, [x1] ; encoding: [0x20,0x20,0x00,0x4c]
+
+; CHECK: st1.4h	{ v0 }, [x1]            ; encoding: [0x20,0x74,0x00,0x0c]
+; CHECK: st1.4h	{ v0, v1 }, [x1]        ; encoding: [0x20,0xa4,0x00,0x0c]
+; CHECK: st1.4h	{ v0, v1, v2 }, [x1]    ; encoding: [0x20,0x64,0x00,0x0c]
+; CHECK: st1.4h	{ v0, v1, v2, v3 }, [x1] ; encoding: [0x20,0x24,0x00,0x0c]
+
+; CHECK: st1.8h	{ v0 }, [x1]            ; encoding: [0x20,0x74,0x00,0x4c]
+; CHECK: st1.8h	{ v0, v1 }, [x1]        ; encoding: [0x20,0xa4,0x00,0x4c]
+; CHECK: st1.8h	{ v0, v1, v2 }, [x1]    ; encoding: [0x20,0x64,0x00,0x4c]
+; CHECK: st1.8h	{ v0, v1, v2, v3 }, [x1] ; encoding: [0x20,0x24,0x00,0x4c]
+
+; CHECK: st1.2s	{ v0 }, [x1]            ; encoding: [0x20,0x78,0x00,0x0c]
+; CHECK: st1.2s	{ v0, v1 }, [x1]        ; encoding: [0x20,0xa8,0x00,0x0c]
+; CHECK: st1.2s	{ v0, v1, v2 }, [x1]    ; encoding: [0x20,0x68,0x00,0x0c]
+; CHECK: st1.2s	{ v0, v1, v2, v3 }, [x1] ; encoding: [0x20,0x28,0x00,0x0c]
+
+; CHECK: st1.4s	{ v0 }, [x1]            ; encoding: [0x20,0x78,0x00,0x4c]
+; CHECK: st1.4s	{ v0, v1 }, [x1]        ; encoding: [0x20,0xa8,0x00,0x4c]
+; CHECK: st1.4s	{ v0, v1, v2 }, [x1]    ; encoding: [0x20,0x68,0x00,0x4c]
+; CHECK: st1.4s	{ v0, v1, v2, v3 }, [x1] ; encoding: [0x20,0x28,0x00,0x4c]
+
+; CHECK: st1.1d	{ v0 }, [x1]            ; encoding: [0x20,0x7c,0x00,0x0c]
+; CHECK: st1.1d	{ v0, v1 }, [x1]        ; encoding: [0x20,0xac,0x00,0x0c]
+; CHECK: st1.1d	{ v0, v1, v2 }, [x1]    ; encoding: [0x20,0x6c,0x00,0x0c]
+; CHECK: st1.1d	{ v0, v1, v2, v3 }, [x1] ; encoding: [0x20,0x2c,0x00,0x0c]
+
+; CHECK: st1.2d	{ v0 }, [x1]            ; encoding: [0x20,0x7c,0x00,0x4c]
+; CHECK: st1.2d	{ v0, v1 }, [x1]        ; encoding: [0x20,0xac,0x00,0x4c]
+; CHECK: st1.2d	{ v0, v1, v2 }, [x1]    ; encoding: [0x20,0x6c,0x00,0x4c]
+; CHECK: st1.2d	{ v0, v1, v2, v3 }, [x1] ; encoding: [0x20,0x2c,0x00,0x4c]
+
+; CHECK: st1.2d { v5 }, [x1]            ; encoding: [0x25,0x7c,0x00,0x4c]
+; CHECK: st1.2d { v7, v8 }, [x10]       ; encoding: [0x47,0xad,0x00,0x4c]
+; CHECK: st1.2d { v11, v12, v13 }, [x1] ; encoding: [0x2b,0x6c,0x00,0x4c]
+; CHECK: st1.2d { v28, v29, v30, v31 }, [x13] ; encoding: [0xbc,0x2d,0x00,0x4c]
+
+_ld2st2_multiple:
+  ld2.8b {v4, v5}, [x19]
+  ld2.16b {v4, v5}, [x19]
+  ld2.4h {v4, v5}, [x19]
+  ld2.8h {v4, v5}, [x19]
+  ld2.2s {v4, v5}, [x19]
+  ld2.4s {v4, v5}, [x19]
+  ld2.2d {v4, v5}, [x19]
+
+  st2.8b {v4, v5}, [x19]
+  st2.16b {v4, v5}, [x19]
+  st2.4h {v4, v5}, [x19]
+  st2.8h {v4, v5}, [x19]
+  st2.2s {v4, v5}, [x19]
+  st2.4s {v4, v5}, [x19]
+  st2.2d {v4, v5}, [x19]
+
+
+; CHECK: _ld2st2_multiple
+; CHECK: ld2.8b { v4, v5 }, [x19]       ; encoding: [0x64,0x82,0x40,0x0c]
+; CHECK: ld2.16b { v4, v5 }, [x19]      ; encoding: [0x64,0x82,0x40,0x4c]
+; CHECK: ld2.4h { v4, v5 }, [x19]       ; encoding: [0x64,0x86,0x40,0x0c]
+; CHECK: ld2.8h { v4, v5 }, [x19]       ; encoding: [0x64,0x86,0x40,0x4c]
+; CHECK: ld2.2s { v4, v5 }, [x19]       ; encoding: [0x64,0x8a,0x40,0x0c]
+; CHECK: ld2.4s { v4, v5 }, [x19]       ; encoding: [0x64,0x8a,0x40,0x4c]
+; CHECK: ld2.2d { v4, v5 }, [x19]       ; encoding: [0x64,0x8e,0x40,0x4c]
+
+; CHECK: st2.8b { v4, v5 }, [x19]       ; encoding: [0x64,0x82,0x00,0x0c]
+; CHECK: st2.16b { v4, v5 }, [x19]      ; encoding: [0x64,0x82,0x00,0x4c]
+; CHECK: st2.4h { v4, v5 }, [x19]       ; encoding: [0x64,0x86,0x00,0x0c]
+; CHECK: st2.8h { v4, v5 }, [x19]       ; encoding: [0x64,0x86,0x00,0x4c]
+; CHECK: st2.2s { v4, v5 }, [x19]       ; encoding: [0x64,0x8a,0x00,0x0c]
+; CHECK: st2.4s { v4, v5 }, [x19]       ; encoding: [0x64,0x8a,0x00,0x4c]
+; CHECK: st2.2d { v4, v5 }, [x19]       ; encoding: [0x64,0x8e,0x00,0x4c]
+
+
+ld3st3_multiple:
+    ld3.8b {v4, v5, v6}, [x19]
+    ld3.16b {v4, v5, v6}, [x19]
+    ld3.4h {v4, v5, v6}, [x19]
+    ld3.8h {v4, v5, v6}, [x19]
+    ld3.2s {v4, v5, v6}, [x19]
+    ld3.4s {v4, v5, v6}, [x19]
+    ld3.2d {v4, v5, v6}, [x19]
+
+    ld3.8b {v9, v10, v11}, [x9]
+    ld3.16b {v14, v15, v16}, [x19]
+    ld3.4h {v24, v25, v26}, [x29]
+    ld3.8h {v30, v31, v0}, [x9]
+    ld3.2s {v2, v3, v4}, [x19]
+    ld3.4s {v4, v5, v6}, [x29]
+    ld3.2d {v7, v8, v9}, [x9]
+
+    st3.8b {v4, v5, v6}, [x19]
+    st3.16b {v4, v5, v6}, [x19]
+    st3.4h {v4, v5, v6}, [x19]
+    st3.8h {v4, v5, v6}, [x19]
+    st3.2s {v4, v5, v6}, [x19]
+    st3.4s {v4, v5, v6}, [x19]
+    st3.2d {v4, v5, v6}, [x19]
+
+    st3.8b {v10, v11, v12}, [x9]
+    st3.16b {v14, v15, v16}, [x19]
+    st3.4h {v24, v25, v26}, [x29]
+    st3.8h {v30, v31, v0}, [x9]
+    st3.2s {v2, v3, v4}, [x19]
+    st3.4s {v7, v8, v9}, [x29]
+    st3.2d {v4, v5, v6}, [x9]
+
+; CHECK: ld3st3_multiple:
+; CHECK: ld3.8b { v4, v5, v6 }, [x19]   ; encoding: [0x64,0x42,0x40,0x0c]
+; CHECK: ld3.16b { v4, v5, v6 }, [x19]   ; encoding: [0x64,0x42,0x40,0x4c]
+; CHECK: ld3.4h { v4, v5, v6 }, [x19]   ; encoding: [0x64,0x46,0x40,0x0c]
+; CHECK: ld3.8h { v4, v5, v6 }, [x19]   ; encoding: [0x64,0x46,0x40,0x4c]
+; CHECK: ld3.2s { v4, v5, v6 }, [x19]   ; encoding: [0x64,0x4a,0x40,0x0c]
+; CHECK: ld3.4s { v4, v5, v6 }, [x19]   ; encoding: [0x64,0x4a,0x40,0x4c]
+; CHECK: ld3.2d { v4, v5, v6 }, [x19]   ; encoding: [0x64,0x4e,0x40,0x4c]
+
+; CHECK: ld3.8b { v9, v10, v11 }, [x9]  ; encoding: [0x29,0x41,0x40,0x0c]
+; CHECK: ld3.16b { v14, v15, v16 }, [x19] ; encoding: [0x6e,0x42,0x40,0x4c]
+; CHECK: ld3.4h { v24, v25, v26 }, [fp] ; encoding: [0xb8,0x47,0x40,0x0c]
+; CHECK: ld3.8h { v30, v31, v0 }, [x9]  ; encoding: [0x3e,0x45,0x40,0x4c]
+; CHECK: ld3.2s { v2, v3, v4 }, [x19]   ; encoding: [0x62,0x4a,0x40,0x0c]
+; CHECK: ld3.4s { v4, v5, v6 }, [fp]    ; encoding: [0xa4,0x4b,0x40,0x4c]
+; CHECK: ld3.2d { v7, v8, v9 }, [x9]    ; encoding: [0x27,0x4d,0x40,0x4c]
+
+; CHECK: st3.8b { v4, v5, v6 }, [x19]   ; encoding: [0x64,0x42,0x00,0x0c]
+; CHECK: st3.16b { v4, v5, v6 }, [x19]   ; encoding: [0x64,0x42,0x00,0x4c]
+; CHECK: st3.4h { v4, v5, v6 }, [x19]   ; encoding: [0x64,0x46,0x00,0x0c]
+; CHECK: st3.8h { v4, v5, v6 }, [x19]   ; encoding: [0x64,0x46,0x00,0x4c]
+; CHECK: st3.2s { v4, v5, v6 }, [x19]   ; encoding: [0x64,0x4a,0x00,0x0c]
+; CHECK: st3.4s { v4, v5, v6 }, [x19]   ; encoding: [0x64,0x4a,0x00,0x4c]
+; CHECK: st3.2d { v4, v5, v6 }, [x19]   ; encoding: [0x64,0x4e,0x00,0x4c]
+
+; CHECK: st3.8b { v10, v11, v12 }, [x9] ; encoding: [0x2a,0x41,0x00,0x0c]
+; CHECK: st3.16b { v14, v15, v16 }, [x19] ; encoding: [0x6e,0x42,0x00,0x4c]
+; CHECK: st3.4h { v24, v25, v26 }, [fp] ; encoding: [0xb8,0x47,0x00,0x0c]
+; CHECK: st3.8h { v30, v31, v0 }, [x9]  ; encoding: [0x3e,0x45,0x00,0x4c]
+; CHECK: st3.2s { v2, v3, v4 }, [x19]   ; encoding: [0x62,0x4a,0x00,0x0c]
+; CHECK: st3.4s { v7, v8, v9 }, [fp]    ; encoding: [0xa7,0x4b,0x00,0x4c]
+; CHECK: st3.2d { v4, v5, v6 }, [x9]    ; encoding: [0x24,0x4d,0x00,0x4c]
+
+ld4st4_multiple:
+    ld4.8b {v4, v5, v6, v7}, [x19]
+    ld4.16b {v4, v5, v6, v7}, [x19]
+    ld4.4h {v4, v5, v6, v7}, [x19]
+    ld4.8h {v4, v5, v6, v7}, [x19]
+    ld4.2s {v4, v5, v6, v7}, [x19]
+    ld4.4s {v4, v5, v6, v7}, [x19]
+    ld4.2d {v4, v5, v6, v7}, [x19]
+
+    st4.8b {v4, v5, v6, v7}, [x19]
+    st4.16b {v4, v5, v6, v7}, [x19]
+    st4.4h {v4, v5, v6, v7}, [x19]
+    st4.8h {v4, v5, v6, v7}, [x19]
+    st4.2s {v4, v5, v6, v7}, [x19]
+    st4.4s {v4, v5, v6, v7}, [x19]
+    st4.2d {v4, v5, v6, v7}, [x19]
+
+; CHECK: ld4st4_multiple:
+; CHECK: ld4.8b { v4, v5, v6, v7 }, [x19] ; encoding: [0x64,0x02,0x40,0x0c]
+; CHECK: ld4.16b { v4, v5, v6, v7 }, [x19] ; encoding: [0x64,0x02,0x40,0x4c]
+; CHECK: ld4.4h { v4, v5, v6, v7 }, [x19] ; encoding: [0x64,0x06,0x40,0x0c]
+; CHECK: ld4.8h { v4, v5, v6, v7 }, [x19] ; encoding: [0x64,0x06,0x40,0x4c]
+; CHECK: ld4.2s { v4, v5, v6, v7 }, [x19] ; encoding: [0x64,0x0a,0x40,0x0c]
+; CHECK: ld4.4s { v4, v5, v6, v7 }, [x19] ; encoding: [0x64,0x0a,0x40,0x4c]
+; CHECK: ld4.2d { v4, v5, v6, v7 }, [x19] ; encoding: [0x64,0x0e,0x40,0x4c]
+
+; CHECK: st4.8b { v4, v5, v6, v7 }, [x19] ; encoding: [0x64,0x02,0x00,0x0c]
+; CHECK: st4.16b { v4, v5, v6, v7 }, [x19] ; encoding: [0x64,0x02,0x00,0x4c]
+; CHECK: st4.4h { v4, v5, v6, v7 }, [x19] ; encoding: [0x64,0x06,0x00,0x0c]
+; CHECK: st4.8h { v4, v5, v6, v7 }, [x19] ; encoding: [0x64,0x06,0x00,0x4c]
+; CHECK: st4.2s { v4, v5, v6, v7 }, [x19] ; encoding: [0x64,0x0a,0x00,0x0c]
+; CHECK: st4.4s { v4, v5, v6, v7 }, [x19] ; encoding: [0x64,0x0a,0x00,0x4c]
+; CHECK: st4.2d { v4, v5, v6, v7 }, [x19] ; encoding: [0x64,0x0e,0x00,0x4c]
+
+;-----------------------------------------------------------------------------
+; Post-increment versions.
+;-----------------------------------------------------------------------------
+
+_ld1st1_multiple_post:
+  ld1.8b {v0}, [x1], x15
+  ld1.8b {v0, v1}, [x1], x15
+  ld1.8b {v0, v1, v2}, [x1], x15
+  ld1.8b {v0, v1, v2, v3}, [x1], x15
+
+  ld1.16b {v0}, [x1], x15
+  ld1.16b {v0, v1}, [x1], x15
+  ld1.16b {v0, v1, v2}, [x1], x15
+  ld1.16b {v0, v1, v2, v3}, [x1], x15
+
+  ld1.4h {v0}, [x1], x15
+  ld1.4h {v0, v1}, [x1], x15
+  ld1.4h {v0, v1, v2}, [x1], x15
+  ld1.4h {v0, v1, v2, v3}, [x1], x15
+
+  ld1.8h {v0}, [x1], x15
+  ld1.8h {v0, v1}, [x1], x15
+  ld1.8h {v0, v1, v2}, [x1], x15
+  ld1.8h {v0, v1, v2, v3}, [x1], x15
+
+  ld1.2s {v0}, [x1], x15
+  ld1.2s {v0, v1}, [x1], x15
+  ld1.2s {v0, v1, v2}, [x1], x15
+  ld1.2s {v0, v1, v2, v3}, [x1], x15
+
+  ld1.4s {v0}, [x1], x15
+  ld1.4s {v0, v1}, [x1], x15
+  ld1.4s {v0, v1, v2}, [x1], x15
+  ld1.4s {v0, v1, v2, v3}, [x1], x15
+
+  ld1.1d {v0}, [x1], x15
+  ld1.1d {v0, v1}, [x1], x15
+  ld1.1d {v0, v1, v2}, [x1], x15
+  ld1.1d {v0, v1, v2, v3}, [x1], x15
+
+  ld1.2d {v0}, [x1], x15
+  ld1.2d {v0, v1}, [x1], x15
+  ld1.2d {v0, v1, v2}, [x1], x15
+  ld1.2d {v0, v1, v2, v3}, [x1], x15
+
+  st1.8b {v0}, [x1], x15
+  st1.8b {v0, v1}, [x1], x15
+  st1.8b {v0, v1, v2}, [x1], x15
+  st1.8b {v0, v1, v2, v3}, [x1], x15
+
+  st1.16b {v0}, [x1], x15
+  st1.16b {v0, v1}, [x1], x15
+  st1.16b {v0, v1, v2}, [x1], x15
+  st1.16b {v0, v1, v2, v3}, [x1], x15
+
+  st1.4h {v0}, [x1], x15
+  st1.4h {v0, v1}, [x1], x15
+  st1.4h {v0, v1, v2}, [x1], x15
+  st1.4h {v0, v1, v2, v3}, [x1], x15
+
+  st1.8h {v0}, [x1], x15
+  st1.8h {v0, v1}, [x1], x15
+  st1.8h {v0, v1, v2}, [x1], x15
+  st1.8h {v0, v1, v2, v3}, [x1], x15
+
+  st1.2s {v0}, [x1], x15
+  st1.2s {v0, v1}, [x1], x15
+  st1.2s {v0, v1, v2}, [x1], x15
+  st1.2s {v0, v1, v2, v3}, [x1], x15
+
+  st1.4s {v0}, [x1], x15
+  st1.4s {v0, v1}, [x1], x15
+  st1.4s {v0, v1, v2}, [x1], x15
+  st1.4s {v0, v1, v2, v3}, [x1], x15
+
+  st1.1d {v0}, [x1], x15
+  st1.1d {v0, v1}, [x1], x15
+  st1.1d {v0, v1, v2}, [x1], x15
+  st1.1d {v0, v1, v2, v3}, [x1], x15
+
+  st1.2d {v0}, [x1], x15
+  st1.2d {v0, v1}, [x1], x15
+  st1.2d {v0, v1, v2}, [x1], x15
+  st1.2d {v0, v1, v2, v3}, [x1], x15
+
+  ld1.8b {v0}, [x1], #8
+  ld1.8b {v0, v1}, [x1], #16
+  ld1.8b {v0, v1, v2}, [x1], #24
+  ld1.8b {v0, v1, v2, v3}, [x1], #32
+
+  ld1.16b {v0}, [x1], #16
+  ld1.16b {v0, v1}, [x1], #32
+  ld1.16b {v0, v1, v2}, [x1], #48
+  ld1.16b {v0, v1, v2, v3}, [x1], #64
+
+  ld1.4h {v0}, [x1], #8
+  ld1.4h {v0, v1}, [x1], #16
+  ld1.4h {v0, v1, v2}, [x1], #24
+  ld1.4h {v0, v1, v2, v3}, [x1], #32
+
+  ld1.8h {v0}, [x1], #16
+  ld1.8h {v0, v1}, [x1], #32
+  ld1.8h {v0, v1, v2}, [x1], #48
+  ld1.8h {v0, v1, v2, v3}, [x1], #64
+
+  ld1.2s {v0}, [x1], #8
+  ld1.2s {v0, v1}, [x1], #16
+  ld1.2s {v0, v1, v2}, [x1], #24
+  ld1.2s {v0, v1, v2, v3}, [x1], #32
+
+  ld1.4s {v0}, [x1], #16
+  ld1.4s {v0, v1}, [x1], #32
+  ld1.4s {v0, v1, v2}, [x1], #48
+  ld1.4s {v0, v1, v2, v3}, [x1], #64
+
+  ld1.1d {v0}, [x1], #8
+  ld1.1d {v0, v1}, [x1], #16
+  ld1.1d {v0, v1, v2}, [x1], #24
+  ld1.1d {v0, v1, v2, v3}, [x1], #32
+
+  ld1.2d {v0}, [x1], #16
+  ld1.2d {v0, v1}, [x1], #32
+  ld1.2d {v0, v1, v2}, [x1], #48
+  ld1.2d {v0, v1, v2, v3}, [x1], #64
+
+  st1.8b {v0}, [x1], #8
+  st1.8b {v0, v1}, [x1], #16
+  st1.8b {v0, v1, v2}, [x1], #24
+  st1.8b {v0, v1, v2, v3}, [x1], #32
+
+  st1.16b {v0}, [x1], #16
+  st1.16b {v0, v1}, [x1], #32
+  st1.16b {v0, v1, v2}, [x1], #48
+  st1.16b {v0, v1, v2, v3}, [x1], #64
+
+  st1.4h {v0}, [x1], #8
+  st1.4h {v0, v1}, [x1], #16
+  st1.4h {v0, v1, v2}, [x1], #24
+  st1.4h {v0, v1, v2, v3}, [x1], #32
+
+  st1.8h {v0}, [x1], #16
+  st1.8h {v0, v1}, [x1], #32
+  st1.8h {v0, v1, v2}, [x1], #48
+  st1.8h {v0, v1, v2, v3}, [x1], #64
+
+  st1.2s {v0}, [x1], #8
+  st1.2s {v0, v1}, [x1], #16
+  st1.2s {v0, v1, v2}, [x1], #24
+  st1.2s {v0, v1, v2, v3}, [x1], #32
+
+  st1.4s {v0}, [x1], #16
+  st1.4s {v0, v1}, [x1], #32
+  st1.4s {v0, v1, v2}, [x1], #48
+  st1.4s {v0, v1, v2, v3}, [x1], #64
+
+  st1.1d {v0}, [x1], #8
+  st1.1d {v0, v1}, [x1], #16
+  st1.1d {v0, v1, v2}, [x1], #24
+  st1.1d {v0, v1, v2, v3}, [x1], #32
+
+  st1.2d {v0}, [x1], #16
+  st1.2d {v0, v1}, [x1], #32
+  st1.2d {v0, v1, v2}, [x1], #48
+  st1.2d {v0, v1, v2, v3}, [x1], #64
+
+; CHECK: ld1st1_multiple_post:
+; CHECK: ld1.8b { v0 }, [x1], x15       ; encoding: [0x20,0x70,0xcf,0x0c]
+; CHECK: ld1.8b { v0, v1 }, [x1], x15   ; encoding: [0x20,0xa0,0xcf,0x0c]
+; CHECK: ld1.8b { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x60,0xcf,0x0c]
+; CHECK: ld1.8b { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x20,0xcf,0x0c]
+
+; CHECK: ld1.16b { v0 }, [x1], x15       ; encoding: [0x20,0x70,0xcf,0x4c]
+; CHECK: ld1.16b { v0, v1 }, [x1], x15   ; encoding: [0x20,0xa0,0xcf,0x4c]
+; CHECK: ld1.16b { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x60,0xcf,0x4c]
+; CHECK: ld1.16b { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x20,0xcf,0x4c]
+
+; CHECK: ld1.4h { v0 }, [x1], x15       ; encoding: [0x20,0x74,0xcf,0x0c]
+; CHECK: ld1.4h { v0, v1 }, [x1], x15   ; encoding: [0x20,0xa4,0xcf,0x0c]
+; CHECK: ld1.4h { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x64,0xcf,0x0c]
+; CHECK: ld1.4h { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x24,0xcf,0x0c]
+
+; CHECK: ld1.8h { v0 }, [x1], x15       ; encoding: [0x20,0x74,0xcf,0x4c]
+; CHECK: ld1.8h { v0, v1 }, [x1], x15   ; encoding: [0x20,0xa4,0xcf,0x4c]
+; CHECK: ld1.8h { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x64,0xcf,0x4c]
+; CHECK: ld1.8h { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x24,0xcf,0x4c]
+
+; CHECK: ld1.2s { v0 }, [x1], x15       ; encoding: [0x20,0x78,0xcf,0x0c]
+; CHECK: ld1.2s { v0, v1 }, [x1], x15   ; encoding: [0x20,0xa8,0xcf,0x0c]
+; CHECK: ld1.2s { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x68,0xcf,0x0c]
+; CHECK: ld1.2s { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x28,0xcf,0x0c]
+
+; CHECK: ld1.4s { v0 }, [x1], x15       ; encoding: [0x20,0x78,0xcf,0x4c]
+; CHECK: ld1.4s { v0, v1 }, [x1], x15   ; encoding: [0x20,0xa8,0xcf,0x4c]
+; CHECK: ld1.4s { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x68,0xcf,0x4c]
+; CHECK: ld1.4s { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x28,0xcf,0x4c]
+
+; CHECK: ld1.1d { v0 }, [x1], x15       ; encoding: [0x20,0x7c,0xcf,0x0c]
+; CHECK: ld1.1d { v0, v1 }, [x1], x15   ; encoding: [0x20,0xac,0xcf,0x0c]
+; CHECK: ld1.1d { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x6c,0xcf,0x0c]
+; CHECK: ld1.1d { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x2c,0xcf,0x0c]
+
+; CHECK: ld1.2d { v0 }, [x1], x15       ; encoding: [0x20,0x7c,0xcf,0x4c]
+; CHECK: ld1.2d { v0, v1 }, [x1], x15   ; encoding: [0x20,0xac,0xcf,0x4c]
+; CHECK: ld1.2d { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x6c,0xcf,0x4c]
+; CHECK: ld1.2d { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x2c,0xcf,0x4c]
+
+; CHECK: st1.8b { v0 }, [x1], x15       ; encoding: [0x20,0x70,0x8f,0x0c]
+; CHECK: st1.8b { v0, v1 }, [x1], x15   ; encoding: [0x20,0xa0,0x8f,0x0c]
+; CHECK: st1.8b { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x60,0x8f,0x0c]
+; CHECK: st1.8b { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x20,0x8f,0x0c]
+
+; CHECK: st1.16b { v0 }, [x1], x15       ; encoding: [0x20,0x70,0x8f,0x4c]
+; CHECK: st1.16b { v0, v1 }, [x1], x15   ; encoding: [0x20,0xa0,0x8f,0x4c]
+; CHECK: st1.16b { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x60,0x8f,0x4c]
+; CHECK: st1.16b { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x20,0x8f,0x4c]
+
+; CHECK: st1.4h { v0 }, [x1], x15       ; encoding: [0x20,0x74,0x8f,0x0c]
+; CHECK: st1.4h { v0, v1 }, [x1], x15   ; encoding: [0x20,0xa4,0x8f,0x0c]
+; CHECK: st1.4h { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x64,0x8f,0x0c]
+; CHECK: st1.4h { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x24,0x8f,0x0c]
+
+; CHECK: st1.8h { v0 }, [x1], x15       ; encoding: [0x20,0x74,0x8f,0x4c]
+; CHECK: st1.8h { v0, v1 }, [x1], x15   ; encoding: [0x20,0xa4,0x8f,0x4c]
+; CHECK: st1.8h { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x64,0x8f,0x4c]
+; CHECK: st1.8h { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x24,0x8f,0x4c]
+
+; CHECK: st1.2s { v0 }, [x1], x15       ; encoding: [0x20,0x78,0x8f,0x0c]
+; CHECK: st1.2s { v0, v1 }, [x1], x15   ; encoding: [0x20,0xa8,0x8f,0x0c]
+; CHECK: st1.2s { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x68,0x8f,0x0c]
+; CHECK: st1.2s { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x28,0x8f,0x0c]
+
+; CHECK: st1.4s { v0 }, [x1], x15       ; encoding: [0x20,0x78,0x8f,0x4c]
+; CHECK: st1.4s { v0, v1 }, [x1], x15   ; encoding: [0x20,0xa8,0x8f,0x4c]
+; CHECK: st1.4s { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x68,0x8f,0x4c]
+; CHECK: st1.4s { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x28,0x8f,0x4c]
+
+; CHECK: st1.1d { v0 }, [x1], x15       ; encoding: [0x20,0x7c,0x8f,0x0c]
+; CHECK: st1.1d { v0, v1 }, [x1], x15   ; encoding: [0x20,0xac,0x8f,0x0c]
+; CHECK: st1.1d { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x6c,0x8f,0x0c]
+; CHECK: st1.1d { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x2c,0x8f,0x0c]
+
+; CHECK: st1.2d { v0 }, [x1], x15       ; encoding: [0x20,0x7c,0x8f,0x4c]
+; CHECK: st1.2d { v0, v1 }, [x1], x15   ; encoding: [0x20,0xac,0x8f,0x4c]
+; CHECK: st1.2d { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x6c,0x8f,0x4c]
+; CHECK: st1.2d { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x2c,0x8f,0x4c]
+
+; CHECK: ld1.8b { v0 }, [x1], #8       ; encoding: [0x20,0x70,0xdf,0x0c]
+; CHECK: ld1.8b { v0, v1 }, [x1], #16   ; encoding: [0x20,0xa0,0xdf,0x0c]
+; CHECK: ld1.8b { v0, v1, v2 }, [x1], #24 ; encoding: [0x20,0x60,0xdf,0x0c]
+; CHECK: ld1.8b { v0, v1, v2, v3 }, [x1], #32 ; encoding: [0x20,0x20,0xdf,0x0c]
+
+; CHECK: ld1.16b { v0 }, [x1], #16       ; encoding: [0x20,0x70,0xdf,0x4c]
+; CHECK: ld1.16b { v0, v1 }, [x1], #32   ; encoding: [0x20,0xa0,0xdf,0x4c]
+; CHECK: ld1.16b { v0, v1, v2 }, [x1], #48 ; encoding: [0x20,0x60,0xdf,0x4c]
+; CHECK: ld1.16b { v0, v1, v2, v3 }, [x1], #64 ; encoding: [0x20,0x20,0xdf,0x4c]
+
+; CHECK: ld1.4h { v0 }, [x1], #8       ; encoding: [0x20,0x74,0xdf,0x0c]
+; CHECK: ld1.4h { v0, v1 }, [x1], #16   ; encoding: [0x20,0xa4,0xdf,0x0c]
+; CHECK: ld1.4h { v0, v1, v2 }, [x1], #24 ; encoding: [0x20,0x64,0xdf,0x0c]
+; CHECK: ld1.4h { v0, v1, v2, v3 }, [x1], #32 ; encoding: [0x20,0x24,0xdf,0x0c]
+
+; CHECK: ld1.8h { v0 }, [x1], #16       ; encoding: [0x20,0x74,0xdf,0x4c]
+; CHECK: ld1.8h { v0, v1 }, [x1], #32   ; encoding: [0x20,0xa4,0xdf,0x4c]
+; CHECK: ld1.8h { v0, v1, v2 }, [x1], #48 ; encoding: [0x20,0x64,0xdf,0x4c]
+; CHECK: ld1.8h { v0, v1, v2, v3 }, [x1], #64 ; encoding: [0x20,0x24,0xdf,0x4c]
+
+; CHECK: ld1.2s { v0 }, [x1], #8       ; encoding: [0x20,0x78,0xdf,0x0c]
+; CHECK: ld1.2s { v0, v1 }, [x1], #16   ; encoding: [0x20,0xa8,0xdf,0x0c]
+; CHECK: ld1.2s { v0, v1, v2 }, [x1], #24 ; encoding: [0x20,0x68,0xdf,0x0c]
+; CHECK: ld1.2s { v0, v1, v2, v3 }, [x1], #32 ; encoding: [0x20,0x28,0xdf,0x0c]
+
+; CHECK: ld1.4s { v0 }, [x1], #16       ; encoding: [0x20,0x78,0xdf,0x4c]
+; CHECK: ld1.4s { v0, v1 }, [x1], #32   ; encoding: [0x20,0xa8,0xdf,0x4c]
+; CHECK: ld1.4s { v0, v1, v2 }, [x1], #48 ; encoding: [0x20,0x68,0xdf,0x4c]
+; CHECK: ld1.4s { v0, v1, v2, v3 }, [x1], #64 ; encoding: [0x20,0x28,0xdf,0x4c]
+
+; CHECK: ld1.1d { v0 }, [x1], #8       ; encoding: [0x20,0x7c,0xdf,0x0c]
+; CHECK: ld1.1d { v0, v1 }, [x1], #16   ; encoding: [0x20,0xac,0xdf,0x0c]
+; CHECK: ld1.1d { v0, v1, v2 }, [x1], #24 ; encoding: [0x20,0x6c,0xdf,0x0c]
+; CHECK: ld1.1d { v0, v1, v2, v3 }, [x1], #32 ; encoding: [0x20,0x2c,0xdf,0x0c]
+
+; CHECK: ld1.2d { v0 }, [x1], #16       ; encoding: [0x20,0x7c,0xdf,0x4c]
+; CHECK: ld1.2d { v0, v1 }, [x1], #32   ; encoding: [0x20,0xac,0xdf,0x4c]
+; CHECK: ld1.2d { v0, v1, v2 }, [x1], #48 ; encoding: [0x20,0x6c,0xdf,0x4c]
+; CHECK: ld1.2d { v0, v1, v2, v3 }, [x1], #64 ; encoding: [0x20,0x2c,0xdf,0x4c]
+
+; CHECK: st1.8b { v0 }, [x1], #8       ; encoding: [0x20,0x70,0x9f,0x0c]
+; CHECK: st1.8b { v0, v1 }, [x1], #16   ; encoding: [0x20,0xa0,0x9f,0x0c]
+; CHECK: st1.8b { v0, v1, v2 }, [x1], #24 ; encoding: [0x20,0x60,0x9f,0x0c]
+; CHECK: st1.8b { v0, v1, v2, v3 }, [x1], #32 ; encoding: [0x20,0x20,0x9f,0x0c]
+
+; CHECK: st1.16b { v0 }, [x1], #16       ; encoding: [0x20,0x70,0x9f,0x4c]
+; CHECK: st1.16b { v0, v1 }, [x1], #32   ; encoding: [0x20,0xa0,0x9f,0x4c]
+; CHECK: st1.16b { v0, v1, v2 }, [x1], #48 ; encoding: [0x20,0x60,0x9f,0x4c]
+; CHECK: st1.16b { v0, v1, v2, v3 }, [x1], #64 ; encoding: [0x20,0x20,0x9f,0x4c]
+
+; CHECK: st1.4h { v0 }, [x1], #8       ; encoding: [0x20,0x74,0x9f,0x0c]
+; CHECK: st1.4h { v0, v1 }, [x1], #16   ; encoding: [0x20,0xa4,0x9f,0x0c]
+; CHECK: st1.4h { v0, v1, v2 }, [x1], #24 ; encoding: [0x20,0x64,0x9f,0x0c]
+; CHECK: st1.4h { v0, v1, v2, v3 }, [x1], #32 ; encoding: [0x20,0x24,0x9f,0x0c]
+
+; CHECK: st1.8h { v0 }, [x1], #16       ; encoding: [0x20,0x74,0x9f,0x4c]
+; CHECK: st1.8h { v0, v1 }, [x1], #32   ; encoding: [0x20,0xa4,0x9f,0x4c]
+; CHECK: st1.8h { v0, v1, v2 }, [x1], #48 ; encoding: [0x20,0x64,0x9f,0x4c]
+; CHECK: st1.8h { v0, v1, v2, v3 }, [x1], #64 ; encoding: [0x20,0x24,0x9f,0x4c]
+
+; CHECK: st1.2s { v0 }, [x1], #8       ; encoding: [0x20,0x78,0x9f,0x0c]
+; CHECK: st1.2s { v0, v1 }, [x1], #16   ; encoding: [0x20,0xa8,0x9f,0x0c]
+; CHECK: st1.2s { v0, v1, v2 }, [x1], #24 ; encoding: [0x20,0x68,0x9f,0x0c]
+; CHECK: st1.2s { v0, v1, v2, v3 }, [x1], #32 ; encoding: [0x20,0x28,0x9f,0x0c]
+
+; CHECK: st1.4s { v0 }, [x1], #16       ; encoding: [0x20,0x78,0x9f,0x4c]
+; CHECK: st1.4s { v0, v1 }, [x1], #32   ; encoding: [0x20,0xa8,0x9f,0x4c]
+; CHECK: st1.4s { v0, v1, v2 }, [x1], #48 ; encoding: [0x20,0x68,0x9f,0x4c]
+; CHECK: st1.4s { v0, v1, v2, v3 }, [x1], #64 ; encoding: [0x20,0x28,0x9f,0x4c]
+
+; CHECK: st1.1d { v0 }, [x1], #8       ; encoding: [0x20,0x7c,0x9f,0x0c]
+; CHECK: st1.1d { v0, v1 }, [x1], #16   ; encoding: [0x20,0xac,0x9f,0x0c]
+; CHECK: st1.1d { v0, v1, v2 }, [x1], #24 ; encoding: [0x20,0x6c,0x9f,0x0c]
+; CHECK: st1.1d { v0, v1, v2, v3 }, [x1], #32 ; encoding: [0x20,0x2c,0x9f,0x0c]
+
+; CHECK: st1.2d { v0 }, [x1], #16       ; encoding: [0x20,0x7c,0x9f,0x4c]
+; CHECK: st1.2d { v0, v1 }, [x1], #32   ; encoding: [0x20,0xac,0x9f,0x4c]
+; CHECK: st1.2d { v0, v1, v2 }, [x1], #48 ; encoding: [0x20,0x6c,0x9f,0x4c]
+; CHECK: st1.2d { v0, v1, v2, v3 }, [x1], #64 ; encoding: [0x20,0x2c,0x9f,0x4c]
+
+
+_ld2st2_multiple_post:
+  ld2.8b {v0, v1}, [x1], x15
+  ld2.16b {v0, v1}, [x1], x15
+  ld2.4h {v0, v1}, [x1], x15
+  ld2.8h {v0, v1}, [x1], x15
+  ld2.2s {v0, v1}, [x1], x15
+  ld2.4s {v0, v1}, [x1], x15
+  ld2.2d {v0, v1}, [x1], x15
+
+  st2.8b {v0, v1}, [x1], x15
+  st2.16b {v0, v1}, [x1], x15
+  st2.4h {v0, v1}, [x1], x15
+  st2.8h {v0, v1}, [x1], x15
+  st2.2s {v0, v1}, [x1], x15
+  st2.4s {v0, v1}, [x1], x15
+  st2.2d {v0, v1}, [x1], x15
+
+  ld2.8b {v0, v1}, [x1], #16
+  ld2.16b {v0, v1}, [x1], #32
+  ld2.4h {v0, v1}, [x1], #16
+  ld2.8h {v0, v1}, [x1], #32
+  ld2.2s {v0, v1}, [x1], #16
+  ld2.4s {v0, v1}, [x1], #32
+  ld2.2d {v0, v1}, [x1], #32
+
+  st2.8b {v0, v1}, [x1], #16
+  st2.16b {v0, v1}, [x1], #32
+  st2.4h {v0, v1}, [x1], #16
+  st2.8h {v0, v1}, [x1], #32
+  st2.2s {v0, v1}, [x1], #16
+  st2.4s {v0, v1}, [x1], #32
+  st2.2d {v0, v1}, [x1], #32
+
+
+; CHECK: ld2st2_multiple_post:
+; CHECK: ld2.8b { v0, v1 }, [x1], x15   ; encoding: [0x20,0x80,0xcf,0x0c]
+; CHECK: ld2.16b { v0, v1 }, [x1], x15   ; encoding: [0x20,0x80,0xcf,0x4c]
+; CHECK: ld2.4h { v0, v1 }, [x1], x15   ; encoding: [0x20,0x84,0xcf,0x0c]
+; CHECK: ld2.8h { v0, v1 }, [x1], x15   ; encoding: [0x20,0x84,0xcf,0x4c]
+; CHECK: ld2.2s { v0, v1 }, [x1], x15   ; encoding: [0x20,0x88,0xcf,0x0c]
+; CHECK: ld2.4s { v0, v1 }, [x1], x15   ; encoding: [0x20,0x88,0xcf,0x4c]
+; CHECK: ld2.2d { v0, v1 }, [x1], x15   ; encoding: [0x20,0x8c,0xcf,0x4c]
+
+; CHECK: st2.8b { v0, v1 }, [x1], x15   ; encoding: [0x20,0x80,0x8f,0x0c]
+; CHECK: st2.16b { v0, v1 }, [x1], x15   ; encoding: [0x20,0x80,0x8f,0x4c]
+; CHECK: st2.4h { v0, v1 }, [x1], x15   ; encoding: [0x20,0x84,0x8f,0x0c]
+; CHECK: st2.8h { v0, v1 }, [x1], x15   ; encoding: [0x20,0x84,0x8f,0x4c]
+; CHECK: st2.2s { v0, v1 }, [x1], x15   ; encoding: [0x20,0x88,0x8f,0x0c]
+; CHECK: st2.4s { v0, v1 }, [x1], x15   ; encoding: [0x20,0x88,0x8f,0x4c]
+; CHECK: st2.2d { v0, v1 }, [x1], x15   ; encoding: [0x20,0x8c,0x8f,0x4c]
+
+; CHECK: ld2.8b { v0, v1 }, [x1], #16   ; encoding: [0x20,0x80,0xdf,0x0c]
+; CHECK: ld2.16b { v0, v1 }, [x1], #32   ; encoding: [0x20,0x80,0xdf,0x4c]
+; CHECK: ld2.4h { v0, v1 }, [x1], #16   ; encoding: [0x20,0x84,0xdf,0x0c]
+; CHECK: ld2.8h { v0, v1 }, [x1], #32   ; encoding: [0x20,0x84,0xdf,0x4c]
+; CHECK: ld2.2s { v0, v1 }, [x1], #16   ; encoding: [0x20,0x88,0xdf,0x0c]
+; CHECK: ld2.4s { v0, v1 }, [x1], #32   ; encoding: [0x20,0x88,0xdf,0x4c]
+; CHECK: ld2.2d { v0, v1 }, [x1], #32   ; encoding: [0x20,0x8c,0xdf,0x4c]
+
+; CHECK: st2.8b { v0, v1 }, [x1], #16   ; encoding: [0x20,0x80,0x9f,0x0c]
+; CHECK: st2.16b { v0, v1 }, [x1], #32   ; encoding: [0x20,0x80,0x9f,0x4c]
+; CHECK: st2.4h { v0, v1 }, [x1], #16   ; encoding: [0x20,0x84,0x9f,0x0c]
+; CHECK: st2.8h { v0, v1 }, [x1], #32   ; encoding: [0x20,0x84,0x9f,0x4c]
+; CHECK: st2.2s { v0, v1 }, [x1], #16   ; encoding: [0x20,0x88,0x9f,0x0c]
+; CHECK: st2.4s { v0, v1 }, [x1], #32   ; encoding: [0x20,0x88,0x9f,0x4c]
+; CHECK: st2.2d { v0, v1 }, [x1], #32   ; encoding: [0x20,0x8c,0x9f,0x4c]
+
+
+_ld3st3_multiple_post:
+  ld3.8b {v0, v1, v2}, [x1], x15
+  ld3.16b {v0, v1, v2}, [x1], x15
+  ld3.4h {v0, v1, v2}, [x1], x15
+  ld3.8h {v0, v1, v2}, [x1], x15
+  ld3.2s {v0, v1, v2}, [x1], x15
+  ld3.4s {v0, v1, v2}, [x1], x15
+  ld3.2d {v0, v1, v2}, [x1], x15
+
+  st3.8b {v0, v1, v2}, [x1], x15
+  st3.16b {v0, v1, v2}, [x1], x15
+  st3.4h {v0, v1, v2}, [x1], x15
+  st3.8h {v0, v1, v2}, [x1], x15
+  st3.2s {v0, v1, v2}, [x1], x15
+  st3.4s {v0, v1, v2}, [x1], x15
+  st3.2d {v0, v1, v2}, [x1], x15
+
+  ld3.8b {v0, v1, v2}, [x1], #24
+  ld3.16b {v0, v1, v2}, [x1], #48
+  ld3.4h {v0, v1, v2}, [x1], #24
+  ld3.8h {v0, v1, v2}, [x1], #48
+  ld3.2s {v0, v1, v2}, [x1], #24
+  ld3.4s {v0, v1, v2}, [x1], #48
+  ld3.2d {v0, v1, v2}, [x1], #48
+
+  st3.8b {v0, v1, v2}, [x1], #24
+  st3.16b {v0, v1, v2}, [x1], #48
+  st3.4h {v0, v1, v2}, [x1], #24
+  st3.8h {v0, v1, v2}, [x1], #48
+  st3.2s {v0, v1, v2}, [x1], #24
+  st3.4s {v0, v1, v2}, [x1], #48
+  st3.2d {v0, v1, v2}, [x1], #48
+
+; CHECK: ld3st3_multiple_post:
+; CHECK: ld3.8b { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x40,0xcf,0x0c]
+; CHECK: ld3.16b { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x40,0xcf,0x4c]
+; CHECK: ld3.4h { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x44,0xcf,0x0c]
+; CHECK: ld3.8h { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x44,0xcf,0x4c]
+; CHECK: ld3.2s { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x48,0xcf,0x0c]
+; CHECK: ld3.4s { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x48,0xcf,0x4c]
+; CHECK: ld3.2d { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x4c,0xcf,0x4c]
+
+; CHECK: st3.8b { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x40,0x8f,0x0c]
+; CHECK: st3.16b { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x40,0x8f,0x4c]
+; CHECK: st3.4h { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x44,0x8f,0x0c]
+; CHECK: st3.8h { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x44,0x8f,0x4c]
+; CHECK: st3.2s { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x48,0x8f,0x0c]
+; CHECK: st3.4s { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x48,0x8f,0x4c]
+; CHECK: st3.2d { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x4c,0x8f,0x4c]
+
+; CHECK: ld3.8b { v0, v1, v2 }, [x1], #24 ; encoding: [0x20,0x40,0xdf,0x0c]
+; CHECK: ld3.16b { v0, v1, v2 }, [x1], #48 ; encoding: [0x20,0x40,0xdf,0x4c]
+; CHECK: ld3.4h { v0, v1, v2 }, [x1], #24 ; encoding: [0x20,0x44,0xdf,0x0c]
+; CHECK: ld3.8h { v0, v1, v2 }, [x1], #48 ; encoding: [0x20,0x44,0xdf,0x4c]
+; CHECK: ld3.2s { v0, v1, v2 }, [x1], #24 ; encoding: [0x20,0x48,0xdf,0x0c]
+; CHECK: ld3.4s { v0, v1, v2 }, [x1], #48 ; encoding: [0x20,0x48,0xdf,0x4c]
+; CHECK: ld3.2d { v0, v1, v2 }, [x1], #48 ; encoding: [0x20,0x4c,0xdf,0x4c]
+
+; CHECK: st3.8b { v0, v1, v2 }, [x1], #24 ; encoding: [0x20,0x40,0x9f,0x0c]
+; CHECK: st3.16b { v0, v1, v2 }, [x1], #48 ; encoding: [0x20,0x40,0x9f,0x4c]
+; CHECK: st3.4h { v0, v1, v2 }, [x1], #24 ; encoding: [0x20,0x44,0x9f,0x0c]
+; CHECK: st3.8h { v0, v1, v2 }, [x1], #48 ; encoding: [0x20,0x44,0x9f,0x4c]
+; CHECK: st3.2s { v0, v1, v2 }, [x1], #24 ; encoding: [0x20,0x48,0x9f,0x0c]
+; CHECK: st3.4s { v0, v1, v2 }, [x1], #48 ; encoding: [0x20,0x48,0x9f,0x4c]
+; CHECK: st3.2d { v0, v1, v2 }, [x1], #48 ; encoding: [0x20,0x4c,0x9f,0x4c]
+
+_ld4st4_multiple_post:
+  ld4.8b {v0, v1, v2, v3}, [x1], x15
+  ld4.16b {v0, v1, v2, v3}, [x1], x15
+  ld4.4h {v0, v1, v2, v3}, [x1], x15
+  ld4.8h {v0, v1, v2, v3}, [x1], x15
+  ld4.2s {v0, v1, v2, v3}, [x1], x15
+  ld4.4s {v0, v1, v2, v3}, [x1], x15
+  ld4.2d {v0, v1, v2, v3}, [x1], x15
+
+  st4.8b {v0, v1, v2, v3}, [x1], x15
+  st4.16b {v0, v1, v2, v3}, [x1], x15
+  st4.4h {v0, v1, v2, v3}, [x1], x15
+  st4.8h {v0, v1, v2, v3}, [x1], x15
+  st4.2s {v0, v1, v2, v3}, [x1], x15
+  st4.4s {v0, v1, v2, v3}, [x1], x15
+  st4.2d {v0, v1, v2, v3}, [x1], x15
+
+  ld4.8b {v0, v1, v2, v3}, [x1], #32
+  ld4.16b {v0, v1, v2, v3}, [x1], #64
+  ld4.4h {v0, v1, v2, v3}, [x1], #32
+  ld4.8h {v0, v1, v2, v3}, [x1], #64
+  ld4.2s {v0, v1, v2, v3}, [x1], #32
+  ld4.4s {v0, v1, v2, v3}, [x1], #64
+  ld4.2d {v0, v1, v2, v3}, [x1], #64
+
+  st4.8b {v0, v1, v2, v3}, [x1], #32
+  st4.16b {v0, v1, v2, v3}, [x1], #64
+  st4.4h {v0, v1, v2, v3}, [x1], #32
+  st4.8h {v0, v1, v2, v3}, [x1], #64
+  st4.2s {v0, v1, v2, v3}, [x1], #32
+  st4.4s {v0, v1, v2, v3}, [x1], #64
+  st4.2d {v0, v1, v2, v3}, [x1], #64
+
+
+; CHECK: ld4st4_multiple_post:
+; CHECK: ld4.8b { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x00,0xcf,0x0c]
+; CHECK: ld4.16b { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x00,0xcf,0x4c]
+; CHECK: ld4.4h { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x04,0xcf,0x0c]
+; CHECK: ld4.8h { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x04,0xcf,0x4c]
+; CHECK: ld4.2s { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x08,0xcf,0x0c]
+; CHECK: ld4.4s { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x08,0xcf,0x4c]
+; CHECK: ld4.2d { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x0c,0xcf,0x4c]
+
+; CHECK: st4.8b { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x00,0x8f,0x0c]
+; CHECK: st4.16b { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x00,0x8f,0x4c]
+; CHECK: st4.4h { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x04,0x8f,0x0c]
+; CHECK: st4.8h { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x04,0x8f,0x4c]
+; CHECK: st4.2s { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x08,0x8f,0x0c]
+; CHECK: st4.4s { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x08,0x8f,0x4c]
+; CHECK: st4.2d { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x0c,0x8f,0x4c]
+
+; CHECK: ld4.8b { v0, v1, v2, v3 }, [x1], #32 ; encoding: [0x20,0x00,0xdf,0x0c]
+; CHECK: ld4.16b { v0, v1, v2, v3 }, [x1], #64 ; encoding: [0x20,0x00,0xdf,0x4c]
+; CHECK: ld4.4h { v0, v1, v2, v3 }, [x1], #32 ; encoding: [0x20,0x04,0xdf,0x0c]
+; CHECK: ld4.8h { v0, v1, v2, v3 }, [x1], #64 ; encoding: [0x20,0x04,0xdf,0x4c]
+; CHECK: ld4.2s { v0, v1, v2, v3 }, [x1], #32 ; encoding: [0x20,0x08,0xdf,0x0c]
+; CHECK: ld4.4s { v0, v1, v2, v3 }, [x1], #64 ; encoding: [0x20,0x08,0xdf,0x4c]
+; CHECK: ld4.2d { v0, v1, v2, v3 }, [x1], #64 ; encoding: [0x20,0x0c,0xdf,0x4c]
+
+; CHECK: st4.8b { v0, v1, v2, v3 }, [x1], #32 ; encoding: [0x20,0x00,0x9f,0x0c]
+; CHECK: st4.16b { v0, v1, v2, v3 }, [x1], #64 ; encoding: [0x20,0x00,0x9f,0x4c]
+; CHECK: st4.4h { v0, v1, v2, v3 }, [x1], #32 ; encoding: [0x20,0x04,0x9f,0x0c]
+; CHECK: st4.8h { v0, v1, v2, v3 }, [x1], #64 ; encoding: [0x20,0x04,0x9f,0x4c]
+; CHECK: st4.2s { v0, v1, v2, v3 }, [x1], #32 ; encoding: [0x20,0x08,0x9f,0x0c]
+; CHECK: st4.4s { v0, v1, v2, v3 }, [x1], #64 ; encoding: [0x20,0x08,0x9f,0x4c]
+; CHECK: st4.2d { v0, v1, v2, v3 }, [x1], #64 ; encoding: [0x20,0x0c,0x9f,0x4c]
+
+ld1r:
+  ld1r.8b {v4}, [x2]
+  ld1r.8b {v4}, [x2], x3
+  ld1r.16b {v4}, [x2]
+  ld1r.16b {v4}, [x2], x3
+  ld1r.4h {v4}, [x2]
+  ld1r.4h {v4}, [x2], x3
+  ld1r.8h {v4}, [x2]
+  ld1r.8h {v4}, [x2], x3
+  ld1r.2s {v4}, [x2]
+  ld1r.2s {v4}, [x2], x3
+  ld1r.4s {v4}, [x2]
+  ld1r.4s {v4}, [x2], x3
+  ld1r.1d {v4}, [x2]
+  ld1r.1d {v4}, [x2], x3
+  ld1r.2d {v4}, [x2]
+  ld1r.2d {v4}, [x2], x3
+
+  ld1r.8b {v4}, [x2], #1
+  ld1r.16b {v4}, [x2], #1
+  ld1r.4h {v4}, [x2], #2
+  ld1r.8h {v4}, [x2], #2
+  ld1r.2s {v4}, [x2], #4
+  ld1r.4s {v4}, [x2], #4
+  ld1r.1d {v4}, [x2], #8
+  ld1r.2d {v4}, [x2], #8
+
+; CHECK: ld1r:
+; CHECK: ld1r.8b { v4 }, [x2]            ; encoding: [0x44,0xc0,0x40,0x0d]
+; CHECK: ld1r.8b { v4 }, [x2], x3        ; encoding: [0x44,0xc0,0xc3,0x0d]
+; CHECK: ld1r.16b { v4 }, [x2]    ; encoding: [0x44,0xc0,0x40,0x4d]
+; CHECK: ld1r.16b { v4 }, [x2], x3 ; encoding: [0x44,0xc0,0xc3,0x4d]
+; CHECK: ld1r.4h { v4 }, [x2]            ; encoding: [0x44,0xc4,0x40,0x0d]
+; CHECK: ld1r.4h { v4 }, [x2], x3        ; encoding: [0x44,0xc4,0xc3,0x0d]
+; CHECK: ld1r.8h { v4 }, [x2]            ; encoding: [0x44,0xc4,0x40,0x4d]
+; CHECK: ld1r.8h { v4 }, [x2], x3        ; encoding: [0x44,0xc4,0xc3,0x4d]
+; CHECK: ld1r.2s { v4 }, [x2]            ; encoding: [0x44,0xc8,0x40,0x0d]
+; CHECK: ld1r.2s { v4 }, [x2], x3        ; encoding: [0x44,0xc8,0xc3,0x0d]
+; CHECK: ld1r.4s { v4 }, [x2]            ; encoding: [0x44,0xc8,0x40,0x4d]
+; CHECK: ld1r.4s { v4 }, [x2], x3        ; encoding: [0x44,0xc8,0xc3,0x4d]
+; CHECK: ld1r.1d { v4 }, [x2]            ; encoding: [0x44,0xcc,0x40,0x0d]
+; CHECK: ld1r.1d { v4 }, [x2], x3        ; encoding: [0x44,0xcc,0xc3,0x0d]
+; CHECK: ld1r.2d { v4 }, [x2]            ; encoding: [0x44,0xcc,0x40,0x4d]
+; CHECK: ld1r.2d { v4 }, [x2], x3        ; encoding: [0x44,0xcc,0xc3,0x4d]
+
+; CHECK: ld1r.8b { v4 }, [x2], #1        ; encoding: [0x44,0xc0,0xdf,0x0d]
+; CHECK: ld1r.16b { v4 }, [x2], #1 ; encoding: [0x44,0xc0,0xdf,0x4d]
+; CHECK: ld1r.4h { v4 }, [x2], #2        ; encoding: [0x44,0xc4,0xdf,0x0d]
+; CHECK: ld1r.8h { v4 }, [x2], #2        ; encoding: [0x44,0xc4,0xdf,0x4d]
+; CHECK: ld1r.2s { v4 }, [x2], #4        ; encoding: [0x44,0xc8,0xdf,0x0d]
+; CHECK: ld1r.4s { v4 }, [x2], #4        ; encoding: [0x44,0xc8,0xdf,0x4d]
+; CHECK: ld1r.1d { v4 }, [x2], #8        ; encoding: [0x44,0xcc,0xdf,0x0d]
+; CHECK: ld1r.2d { v4 }, [x2], #8        ; encoding: [0x44,0xcc,0xdf,0x4d]
+
+ld2r:
+  ld2r.8b {v4, v5}, [x2]
+  ld2r.8b {v4, v5}, [x2], x3
+  ld2r.16b {v4, v5}, [x2]
+  ld2r.16b {v4, v5}, [x2], x3
+  ld2r.4h {v4, v5}, [x2]
+  ld2r.4h {v4, v5}, [x2], x3
+  ld2r.8h {v4, v5}, [x2]
+  ld2r.8h {v4, v5}, [x2], x3
+  ld2r.2s {v4, v5}, [x2]
+  ld2r.2s {v4, v5}, [x2], x3
+  ld2r.4s {v4, v5}, [x2]
+  ld2r.4s {v4, v5}, [x2], x3
+  ld2r.1d {v4, v5}, [x2]
+  ld2r.1d {v4, v5}, [x2], x3
+  ld2r.2d {v4, v5}, [x2]
+  ld2r.2d {v4, v5}, [x2], x3
+
+  ld2r.8b {v4, v5}, [x2], #2
+  ld2r.16b {v4, v5}, [x2], #2
+  ld2r.4h {v4, v5}, [x2], #4
+  ld2r.8h {v4, v5}, [x2], #4
+  ld2r.2s {v4, v5}, [x2], #8
+  ld2r.4s {v4, v5}, [x2], #8
+  ld2r.1d {v4, v5}, [x2], #16
+  ld2r.2d {v4, v5}, [x2], #16
+
+; CHECK: ld2r:
+; CHECK: ld2r.8b { v4, v5 }, [x2]        ; encoding: [0x44,0xc0,0x60,0x0d]
+; CHECK: ld2r.8b { v4, v5 }, [x2], x3    ; encoding: [0x44,0xc0,0xe3,0x0d]
+; CHECK: ld2r.16b { v4, v5 }, [x2] ; encoding: [0x44,0xc0,0x60,0x4d]
+; CHECK: ld2r.16b { v4, v5 }, [x2], x3 ; encoding: [0x44,0xc0,0xe3,0x4d]
+; CHECK: ld2r.4h { v4, v5 }, [x2]        ; encoding: [0x44,0xc4,0x60,0x0d]
+; CHECK: ld2r.4h { v4, v5 }, [x2], x3    ; encoding: [0x44,0xc4,0xe3,0x0d]
+; CHECK: ld2r.8h { v4, v5 }, [x2]        ; encoding: [0x44,0xc4,0x60,0x4d]
+; CHECK: ld2r.8h { v4, v5 }, [x2], x3    ; encoding: [0x44,0xc4,0xe3,0x4d]
+; CHECK: ld2r.2s { v4, v5 }, [x2]        ; encoding: [0x44,0xc8,0x60,0x0d]
+; CHECK: ld2r.2s { v4, v5 }, [x2], x3    ; encoding: [0x44,0xc8,0xe3,0x0d]
+; CHECK: ld2r.4s { v4, v5 }, [x2]        ; encoding: [0x44,0xc8,0x60,0x4d]
+; CHECK: ld2r.4s { v4, v5 }, [x2], x3    ; encoding: [0x44,0xc8,0xe3,0x4d]
+; CHECK: ld2r.1d { v4, v5 }, [x2]        ; encoding: [0x44,0xcc,0x60,0x0d]
+; CHECK: ld2r.1d { v4, v5 }, [x2], x3    ; encoding: [0x44,0xcc,0xe3,0x0d]
+; CHECK: ld2r.2d { v4, v5 }, [x2]        ; encoding: [0x44,0xcc,0x60,0x4d]
+; CHECK: ld2r.2d { v4, v5 }, [x2], x3    ; encoding: [0x44,0xcc,0xe3,0x4d]
+
+; CHECK: ld2r.8b { v4, v5 }, [x2], #2    ; encoding: [0x44,0xc0,0xff,0x0d]
+; CHECK: ld2r.16b { v4, v5 }, [x2], #2 ; encoding: [0x44,0xc0,0xff,0x4d]
+; CHECK: ld2r.4h { v4, v5 }, [x2], #4    ; encoding: [0x44,0xc4,0xff,0x0d]
+; CHECK: ld2r.8h { v4, v5 }, [x2], #4    ; encoding: [0x44,0xc4,0xff,0x4d]
+; CHECK: ld2r.2s { v4, v5 }, [x2], #8    ; encoding: [0x44,0xc8,0xff,0x0d]
+; CHECK: ld2r.4s { v4, v5 }, [x2], #8    ; encoding: [0x44,0xc8,0xff,0x4d]
+; CHECK: ld2r.1d { v4, v5 }, [x2], #16    ; encoding: [0x44,0xcc,0xff,0x0d]
+; CHECK: ld2r.2d { v4, v5 }, [x2], #16    ; encoding: [0x44,0xcc,0xff,0x4d]
+
+ld3r:
+  ld3r.8b {v4, v5, v6}, [x2]
+  ld3r.8b {v4, v5, v6}, [x2], x3
+  ld3r.16b {v4, v5, v6}, [x2]
+  ld3r.16b {v4, v5, v6}, [x2], x3
+  ld3r.4h {v4, v5, v6}, [x2]
+  ld3r.4h {v4, v5, v6}, [x2], x3
+  ld3r.8h {v4, v5, v6}, [x2]
+  ld3r.8h {v4, v5, v6}, [x2], x3
+  ld3r.2s {v4, v5, v6}, [x2]
+  ld3r.2s {v4, v5, v6}, [x2], x3
+  ld3r.4s {v4, v5, v6}, [x2]
+  ld3r.4s {v4, v5, v6}, [x2], x3
+  ld3r.1d {v4, v5, v6}, [x2]
+  ld3r.1d {v4, v5, v6}, [x2], x3
+  ld3r.2d {v4, v5, v6}, [x2]
+  ld3r.2d {v4, v5, v6}, [x2], x3
+
+  ld3r.8b {v4, v5, v6}, [x2], #3
+  ld3r.16b {v4, v5, v6}, [x2], #3
+  ld3r.4h {v4, v5, v6}, [x2], #6
+  ld3r.8h {v4, v5, v6}, [x2], #6
+  ld3r.2s {v4, v5, v6}, [x2], #12
+  ld3r.4s {v4, v5, v6}, [x2], #12
+  ld3r.1d {v4, v5, v6}, [x2], #24
+  ld3r.2d {v4, v5, v6}, [x2], #24
+
+; CHECK: ld3r:
+; CHECK: ld3r.8b { v4, v5, v6 }, [x2]    ; encoding: [0x44,0xe0,0x40,0x0d]
+; CHECK: ld3r.8b { v4, v5, v6 }, [x2], x3 ; encoding: [0x44,0xe0,0xc3,0x0d]
+; CHECK: ld3r.16b { v4, v5, v6 }, [x2] ; encoding: [0x44,0xe0,0x40,0x4d]
+; CHECK: ld3r.16b { v4, v5, v6 }, [x2], x3 ; encoding: [0x44,0xe0,0xc3,0x4d]
+; CHECK: ld3r.4h { v4, v5, v6 }, [x2]    ; encoding: [0x44,0xe4,0x40,0x0d]
+; CHECK: ld3r.4h { v4, v5, v6 }, [x2], x3 ; encoding: [0x44,0xe4,0xc3,0x0d]
+; CHECK: ld3r.8h { v4, v5, v6 }, [x2]    ; encoding: [0x44,0xe4,0x40,0x4d]
+; CHECK: ld3r.8h { v4, v5, v6 }, [x2], x3 ; encoding: [0x44,0xe4,0xc3,0x4d]
+; CHECK: ld3r.2s { v4, v5, v6 }, [x2]    ; encoding: [0x44,0xe8,0x40,0x0d]
+; CHECK: ld3r.2s { v4, v5, v6 }, [x2], x3 ; encoding: [0x44,0xe8,0xc3,0x0d]
+; CHECK: ld3r.4s { v4, v5, v6 }, [x2]    ; encoding: [0x44,0xe8,0x40,0x4d]
+; CHECK: ld3r.4s { v4, v5, v6 }, [x2], x3 ; encoding: [0x44,0xe8,0xc3,0x4d]
+; CHECK: ld3r.1d { v4, v5, v6 }, [x2]    ; encoding: [0x44,0xec,0x40,0x0d]
+; CHECK: ld3r.1d { v4, v5, v6 }, [x2], x3 ; encoding: [0x44,0xec,0xc3,0x0d]
+; CHECK: ld3r.2d { v4, v5, v6 }, [x2]    ; encoding: [0x44,0xec,0x40,0x4d]
+; CHECK: ld3r.2d { v4, v5, v6 }, [x2], x3 ; encoding: [0x44,0xec,0xc3,0x4d]
+
+; CHECK: ld3r.8b { v4, v5, v6 }, [x2], #3 ; encoding: [0x44,0xe0,0xdf,0x0d]
+; CHECK: ld3r.16b { v4, v5, v6 }, [x2], #3 ; encoding: [0x44,0xe0,0xdf,0x4d]
+; CHECK: ld3r.4h { v4, v5, v6 }, [x2], #6 ; encoding: [0x44,0xe4,0xdf,0x0d]
+; CHECK: ld3r.8h { v4, v5, v6 }, [x2], #6 ; encoding: [0x44,0xe4,0xdf,0x4d]
+; CHECK: ld3r.2s { v4, v5, v6 }, [x2], #12 ; encoding: [0x44,0xe8,0xdf,0x0d]
+; CHECK: ld3r.4s { v4, v5, v6 }, [x2], #12 ; encoding: [0x44,0xe8,0xdf,0x4d]
+; CHECK: ld3r.1d { v4, v5, v6 }, [x2], #24 ; encoding: [0x44,0xec,0xdf,0x0d]
+; CHECK: ld3r.2d { v4, v5, v6 }, [x2], #24 ; encoding: [0x44,0xec,0xdf,0x4d]
+
+ld4r:
+  ld4r.8b {v4, v5, v6, v7}, [x2]
+  ld4r.8b {v4, v5, v6, v7}, [x2], x3
+  ld4r.16b {v4, v5, v6, v7}, [x2]
+  ld4r.16b {v4, v5, v6, v7}, [x2], x3
+  ld4r.4h {v4, v5, v6, v7}, [x2]
+  ld4r.4h {v4, v5, v6, v7}, [x2], x3
+  ld4r.8h {v4, v5, v6, v7}, [x2]
+  ld4r.8h {v4, v5, v6, v7}, [x2], x3
+  ld4r.2s {v4, v5, v6, v7}, [x2]
+  ld4r.2s {v4, v5, v6, v7}, [x2], x3
+  ld4r.4s {v4, v5, v6, v7}, [x2]
+  ld4r.4s {v4, v5, v6, v7}, [x2], x3
+  ld4r.1d {v4, v5, v6, v7}, [x2]
+  ld4r.1d {v4, v5, v6, v7}, [x2], x3
+  ld4r.2d {v4, v5, v6, v7}, [x2]
+  ld4r.2d {v4, v5, v6, v7}, [x2], x3
+
+  ld4r.8b {v4, v5, v6, v7}, [x2], #4
+  ld4r.16b {v5, v6, v7, v8}, [x2], #4
+  ld4r.4h {v6, v7, v8, v9}, [x2], #8
+  ld4r.8h {v1, v2, v3, v4}, [x2], #8
+  ld4r.2s {v2, v3, v4, v5}, [x2], #16
+  ld4r.4s {v3, v4, v5, v6}, [x2], #16
+  ld4r.1d {v0, v1, v2, v3}, [x2], #32
+  ld4r.2d {v4, v5, v6, v7}, [x2], #32
+
+; CHECK: ld4r:
+; CHECK: ld4r.8b { v4, v5, v6, v7 }, [x2] ; encoding: [0x44,0xe0,0x60,0x0d]
+; CHECK: ld4r.8b { v4, v5, v6, v7 }, [x2], x3 ; encoding: [0x44,0xe0,0xe3,0x0d]
+; CHECK: ld4r.16b { v4, v5, v6, v7 }, [x2] ; encoding: [0x44,0xe0,0x60,0x4d]
+; CHECK: ld4r.16b { v4, v5, v6, v7 }, [x2], x3 ; encoding: [0x44,0xe0,0xe3,0x4d]
+; CHECK: ld4r.4h { v4, v5, v6, v7 }, [x2] ; encoding: [0x44,0xe4,0x60,0x0d]
+; CHECK: ld4r.4h { v4, v5, v6, v7 }, [x2], x3 ; encoding: [0x44,0xe4,0xe3,0x0d]
+; CHECK: ld4r.8h { v4, v5, v6, v7 }, [x2] ; encoding: [0x44,0xe4,0x60,0x4d]
+; CHECK: ld4r.8h { v4, v5, v6, v7 }, [x2], x3 ; encoding: [0x44,0xe4,0xe3,0x4d]
+; CHECK: ld4r.2s { v4, v5, v6, v7 }, [x2] ; encoding: [0x44,0xe8,0x60,0x0d]
+; CHECK: ld4r.2s { v4, v5, v6, v7 }, [x2], x3 ; encoding: [0x44,0xe8,0xe3,0x0d]
+; CHECK: ld4r.4s { v4, v5, v6, v7 }, [x2] ; encoding: [0x44,0xe8,0x60,0x4d]
+; CHECK: ld4r.4s { v4, v5, v6, v7 }, [x2], x3 ; encoding: [0x44,0xe8,0xe3,0x4d]
+; CHECK: ld4r.1d { v4, v5, v6, v7 }, [x2] ; encoding: [0x44,0xec,0x60,0x0d]
+; CHECK: ld4r.1d { v4, v5, v6, v7 }, [x2], x3 ; encoding: [0x44,0xec,0xe3,0x0d]
+; CHECK: ld4r.2d { v4, v5, v6, v7 }, [x2] ; encoding: [0x44,0xec,0x60,0x4d]
+; CHECK: ld4r.2d { v4, v5, v6, v7 }, [x2], x3 ; encoding: [0x44,0xec,0xe3,0x4d]
+
+; CHECK: ld4r.8b { v4, v5, v6, v7 }, [x2], #4 ; encoding: [0x44,0xe0,0xff,0x0d]
+; CHECK: ld4r.16b { v5, v6, v7, v8 }, [x2], #4 ; encoding: [0x45,0xe0,0xff,0x4d]
+; CHECK: ld4r.4h { v6, v7, v8, v9 }, [x2], #8 ; encoding: [0x46,0xe4,0xff,0x0d]
+; CHECK: ld4r.8h { v1, v2, v3, v4 }, [x2], #8 ; encoding: [0x41,0xe4,0xff,0x4d]
+; CHECK: ld4r.2s { v2, v3, v4, v5 }, [x2], #16 ; encoding: [0x42,0xe8,0xff,0x0d]
+; CHECK: ld4r.4s { v3, v4, v5, v6 }, [x2], #16 ; encoding: [0x43,0xe8,0xff,0x4d]
+; CHECK: ld4r.1d { v0, v1, v2, v3 }, [x2], #32 ; encoding: [0x40,0xec,0xff,0x0d]
+; CHECK: ld4r.2d { v4, v5, v6, v7 }, [x2], #32 ; encoding: [0x44,0xec,0xff,0x4d]
+
+
+_ld1:
+  ld1.b {v4}[13], [x3]
+  ld1.h {v4}[2], [x3]
+  ld1.s {v4}[2], [x3]
+  ld1.d {v4}[1], [x3]
+  ld1.b {v4}[13], [x3], x5
+  ld1.h {v4}[2], [x3], x5
+  ld1.s {v4}[2], [x3], x5
+  ld1.d {v4}[1], [x3], x5
+  ld1.b {v4}[13], [x3], #1
+  ld1.h {v4}[2], [x3], #2
+  ld1.s {v4}[2], [x3], #4
+  ld1.d {v4}[1], [x3], #8
+
+; CHECK: _ld1:
+; CHECK: ld1.b { v4 }[13], [x3]        ; encoding: [0x64,0x14,0x40,0x4d]
+; CHECK: ld1.h { v4 }[2], [x3]         ; encoding: [0x64,0x50,0x40,0x0d]
+; CHECK: ld1.s { v4 }[2], [x3]         ; encoding: [0x64,0x80,0x40,0x4d]
+; CHECK: ld1.d { v4 }[1], [x3]         ; encoding: [0x64,0x84,0x40,0x4d]
+; CHECK: ld1.b { v4 }[13], [x3], x5    ; encoding: [0x64,0x14,0xc5,0x4d]
+; CHECK: ld1.h { v4 }[2], [x3], x5     ; encoding: [0x64,0x50,0xc5,0x0d]
+; CHECK: ld1.s { v4 }[2], [x3], x5     ; encoding: [0x64,0x80,0xc5,0x4d]
+; CHECK: ld1.d { v4 }[1], [x3], x5     ; encoding: [0x64,0x84,0xc5,0x4d]
+; CHECK: ld1.b { v4 }[13], [x3], #1   ; encoding: [0x64,0x14,0xdf,0x4d]
+; CHECK: ld1.h { v4 }[2], [x3], #2    ; encoding: [0x64,0x50,0xdf,0x0d]
+; CHECK: ld1.s { v4 }[2], [x3], #4    ; encoding: [0x64,0x80,0xdf,0x4d]
+; CHECK: ld1.d { v4 }[1], [x3], #8    ; encoding: [0x64,0x84,0xdf,0x4d]
+
+_ld2:
+  ld2.b {v4, v5}[13], [x3]
+  ld2.h {v4, v5}[2], [x3]
+  ld2.s {v4, v5}[2], [x3]
+  ld2.d {v4, v5}[1], [x3]
+  ld2.b {v4, v5}[13], [x3], x5
+  ld2.h {v4, v5}[2], [x3], x5
+  ld2.s {v4, v5}[2], [x3], x5
+  ld2.d {v4, v5}[1], [x3], x5
+  ld2.b {v4, v5}[13], [x3], #2
+  ld2.h {v4, v5}[2], [x3], #4
+  ld2.s {v4, v5}[2], [x3], #8
+  ld2.d {v4, v5}[1], [x3], #16
+
+
+; CHECK: _ld2:
+; CHECK: ld2.b { v4, v5 }[13], [x3]    ; encoding: [0x64,0x14,0x60,0x4d]
+; CHECK: ld2.h { v4, v5 }[2], [x3]     ; encoding: [0x64,0x50,0x60,0x0d]
+; CHECK: ld2.s { v4, v5 }[2], [x3]     ; encoding: [0x64,0x80,0x60,0x4d]
+; CHECK: ld2.d { v4, v5 }[1], [x3]     ; encoding: [0x64,0x84,0x60,0x4d]
+; CHECK: ld2.b { v4, v5 }[13], [x3], x5 ; encoding: [0x64,0x14,0xe5,0x4d]
+; CHECK: ld2.h { v4, v5 }[2], [x3], x5 ; encoding: [0x64,0x50,0xe5,0x0d]
+; CHECK: ld2.s { v4, v5 }[2], [x3], x5 ; encoding: [0x64,0x80,0xe5,0x4d]
+; CHECK: ld2.d { v4, v5 }[1], [x3], x5 ; encoding: [0x64,0x84,0xe5,0x4d]
+; CHECK: ld2.b { v4, v5 }[13], [x3], #2 ; encoding: [0x64,0x14,0xff,0x4d]
+; CHECK: ld2.h { v4, v5 }[2], [x3], #4 ; encoding: [0x64,0x50,0xff,0x0d]
+; CHECK: ld2.s { v4, v5 }[2], [x3], #8 ; encoding: [0x64,0x80,0xff,0x4d]
+; CHECK: ld2.d { v4, v5 }[1], [x3], #16 ; encoding: [0x64,0x84,0xff,0x4d]
+
+
+_ld3:
+  ld3.b {v4, v5, v6}[13], [x3]
+  ld3.h {v4, v5, v6}[2], [x3]
+  ld3.s {v4, v5, v6}[2], [x3]
+  ld3.d {v4, v5, v6}[1], [x3]
+  ld3.b {v4, v5, v6}[13], [x3], x5
+  ld3.h {v4, v5, v6}[2], [x3], x5
+  ld3.s {v4, v5, v6}[2], [x3], x5
+  ld3.d {v4, v5, v6}[1], [x3], x5
+  ld3.b {v4, v5, v6}[13], [x3], #3
+  ld3.h {v4, v5, v6}[2], [x3], #6
+  ld3.s {v4, v5, v6}[2], [x3], #12
+  ld3.d {v4, v5, v6}[1], [x3], #24
+
+
+; CHECK: _ld3:
+; CHECK: ld3.b { v4, v5, v6 }[13], [x3] ; encoding: [0x64,0x34,0x40,0x4d]
+; CHECK: ld3.h { v4, v5, v6 }[2], [x3] ; encoding: [0x64,0x70,0x40,0x0d]
+; CHECK: ld3.s { v4, v5, v6 }[2], [x3] ; encoding: [0x64,0xa0,0x40,0x4d]
+; CHECK: ld3.d { v4, v5, v6 }[1], [x3] ; encoding: [0x64,0xa4,0x40,0x4d]
+; CHECK: ld3.b { v4, v5, v6 }[13], [x3], x5 ; encoding: [0x64,0x34,0xc5,0x4d]
+; CHECK: ld3.h { v4, v5, v6 }[2], [x3], x5 ; encoding: [0x64,0x70,0xc5,0x0d]
+; CHECK: ld3.s { v4, v5, v6 }[2], [x3], x5 ; encoding: [0x64,0xa0,0xc5,0x4d]
+; CHECK: ld3.d { v4, v5, v6 }[1], [x3], x5 ; encoding: [0x64,0xa4,0xc5,0x4d]
+; CHECK: ld3.b { v4, v5, v6 }[13], [x3], #3 ; encoding: [0x64,0x34,0xdf,0x4d]
+; CHECK: ld3.h { v4, v5, v6 }[2], [x3], #6 ; encoding: [0x64,0x70,0xdf,0x0d]
+; CHECK: ld3.s { v4, v5, v6 }[2], [x3], #12 ; encoding: [0x64,0xa0,0xdf,0x4d]
+; CHECK: ld3.d { v4, v5, v6 }[1], [x3], #24 ; encoding: [0x64,0xa4,0xdf,0x4d]
+
+
+_ld4:
+  ld4.b {v4, v5, v6, v7}[13], [x3]
+  ld4.h {v4, v5, v6, v7}[2], [x3]
+  ld4.s {v4, v5, v6, v7}[2], [x3]
+  ld4.d {v4, v5, v6, v7}[1], [x3]
+  ld4.b {v4, v5, v6, v7}[13], [x3], x5
+  ld4.h {v4, v5, v6, v7}[2], [x3], x5
+  ld4.s {v4, v5, v6, v7}[2], [x3], x5
+  ld4.d {v4, v5, v6, v7}[1], [x3], x5
+  ld4.b {v4, v5, v6, v7}[13], [x3], #4
+  ld4.h {v4, v5, v6, v7}[2], [x3], #8
+  ld4.s {v4, v5, v6, v7}[2], [x3], #16
+  ld4.d {v4, v5, v6, v7}[1], [x3], #32
+
+; CHECK: _ld4:
+; CHECK: ld4.b { v4, v5, v6, v7 }[13], [x3] ; encoding: [0x64,0x34,0x60,0x4d]
+; CHECK: ld4.h { v4, v5, v6, v7 }[2], [x3] ; encoding: [0x64,0x70,0x60,0x0d]
+; CHECK: ld4.s { v4, v5, v6, v7 }[2], [x3] ; encoding: [0x64,0xa0,0x60,0x4d]
+; CHECK: ld4.d { v4, v5, v6, v7 }[1], [x3] ; encoding: [0x64,0xa4,0x60,0x4d]
+; CHECK: ld4.b { v4, v5, v6, v7 }[13], [x3], x5 ; encoding: [0x64,0x34,0xe5,0x4d]
+; CHECK: ld4.h { v4, v5, v6, v7 }[2], [x3], x5 ; encoding: [0x64,0x70,0xe5,0x0d]
+; CHECK: ld4.s { v4, v5, v6, v7 }[2], [x3], x5 ; encoding: [0x64,0xa0,0xe5,0x4d]
+; CHECK: ld4.d { v4, v5, v6, v7 }[1], [x3], x5 ; encoding: [0x64,0xa4,0xe5,0x4d]
+; CHECK: ld4.b { v4, v5, v6, v7 }[13], [x3], #4 ; encoding: [0x64,0x34,0xff,0x4d]
+; CHECK: ld4.h { v4, v5, v6, v7 }[2], [x3], #8 ; encoding: [0x64,0x70,0xff,0x0d]
+; CHECK: ld4.s { v4, v5, v6, v7 }[2], [x3], #16 ; encoding: [0x64,0xa0,0xff,0x4d]
+; CHECK: ld4.d { v4, v5, v6, v7 }[1], [x3], #32 ; encoding: [0x64,0xa4,0xff,0x4d]
+
+_st1:
+  st1.b {v4}[13], [x3]
+  st1.h {v4}[2], [x3]
+  st1.s {v4}[2], [x3]
+  st1.d {v4}[1], [x3]
+  st1.b {v4}[13], [x3], x5
+  st1.h {v4}[2], [x3], x5
+  st1.s {v4}[2], [x3], x5
+  st1.d {v4}[1], [x3], x5
+  st1.b {v4}[13], [x3], #1
+  st1.h {v4}[2], [x3], #2
+  st1.s {v4}[2], [x3], #4
+  st1.d {v4}[1], [x3], #8
+
+; CHECK: _st1:
+; CHECK: st1.b { v4 }[13], [x3]        ; encoding: [0x64,0x14,0x00,0x4d]
+; CHECK: st1.h { v4 }[2], [x3]         ; encoding: [0x64,0x50,0x00,0x0d]
+; CHECK: st1.s { v4 }[2], [x3]         ; encoding: [0x64,0x80,0x00,0x4d]
+; CHECK: st1.d { v4 }[1], [x3]         ; encoding: [0x64,0x84,0x00,0x4d]
+; CHECK: st1.b { v4 }[13], [x3], x5    ; encoding: [0x64,0x14,0x85,0x4d]
+; CHECK: st1.h { v4 }[2], [x3], x5     ; encoding: [0x64,0x50,0x85,0x0d]
+; CHECK: st1.s { v4 }[2], [x3], x5     ; encoding: [0x64,0x80,0x85,0x4d]
+; CHECK: st1.d { v4 }[1], [x3], x5     ; encoding: [0x64,0x84,0x85,0x4d]
+; CHECK: st1.b { v4 }[13], [x3], #1   ; encoding: [0x64,0x14,0x9f,0x4d]
+; CHECK: st1.h { v4 }[2], [x3], #2    ; encoding: [0x64,0x50,0x9f,0x0d]
+; CHECK: st1.s { v4 }[2], [x3], #4    ; encoding: [0x64,0x80,0x9f,0x4d]
+; CHECK: st1.d { v4 }[1], [x3], #8    ; encoding: [0x64,0x84,0x9f,0x4d]
+
+_st2:
+  st2.b {v4, v5}[13], [x3]
+  st2.h {v4, v5}[2], [x3]
+  st2.s {v4, v5}[2], [x3]
+  st2.d {v4, v5}[1], [x3]
+  st2.b {v4, v5}[13], [x3], x5
+  st2.h {v4, v5}[2], [x3], x5
+  st2.s {v4, v5}[2], [x3], x5
+  st2.d {v4, v5}[1], [x3], x5
+  st2.b {v4, v5}[13], [x3], #2
+  st2.h {v4, v5}[2], [x3], #4
+  st2.s {v4, v5}[2], [x3], #8
+  st2.d {v4, v5}[1], [x3], #16
+
+; CHECK: _st2:
+; CHECK: st2.b { v4, v5 }[13], [x3]    ; encoding: [0x64,0x14,0x20,0x4d]
+; CHECK: st2.h { v4, v5 }[2], [x3]     ; encoding: [0x64,0x50,0x20,0x0d]
+; CHECK: st2.s { v4, v5 }[2], [x3]     ; encoding: [0x64,0x80,0x20,0x4d]
+; CHECK: st2.d { v4, v5 }[1], [x3]     ; encoding: [0x64,0x84,0x20,0x4d]
+; CHECK: st2.b { v4, v5 }[13], [x3], x5 ; encoding: [0x64,0x14,0xa5,0x4d]
+; CHECK: st2.h { v4, v5 }[2], [x3], x5 ; encoding: [0x64,0x50,0xa5,0x0d]
+; CHECK: st2.s { v4, v5 }[2], [x3], x5 ; encoding: [0x64,0x80,0xa5,0x4d]
+; CHECK: st2.d { v4, v5 }[1], [x3], x5 ; encoding: [0x64,0x84,0xa5,0x4d]
+; CHECK: st2.b { v4, v5 }[13], [x3], #2 ; encoding: [0x64,0x14,0xbf,0x4d]
+; CHECK: st2.h { v4, v5 }[2], [x3], #4 ; encoding: [0x64,0x50,0xbf,0x0d]
+; CHECK: st2.s { v4, v5 }[2], [x3], #8 ; encoding: [0x64,0x80,0xbf,0x4d]
+; CHECK: st2.d { v4, v5 }[1], [x3], #16 ; encoding: [0x64,0x84,0xbf,0x4d]
+
+
+_st3:
+  st3.b {v4, v5, v6}[13], [x3]
+  st3.h {v4, v5, v6}[2], [x3]
+  st3.s {v4, v5, v6}[2], [x3]
+  st3.d {v4, v5, v6}[1], [x3]
+  st3.b {v4, v5, v6}[13], [x3], x5
+  st3.h {v4, v5, v6}[2], [x3], x5
+  st3.s {v4, v5, v6}[2], [x3], x5
+  st3.d {v4, v5, v6}[1], [x3], x5
+  st3.b {v4, v5, v6}[13], [x3], #3
+  st3.h {v4, v5, v6}[2], [x3], #6
+  st3.s {v4, v5, v6}[2], [x3], #12
+  st3.d {v4, v5, v6}[1], [x3], #24
+
+; CHECK: _st3:
+; CHECK: st3.b { v4, v5, v6 }[13], [x3] ; encoding: [0x64,0x34,0x00,0x4d]
+; CHECK: st3.h { v4, v5, v6 }[2], [x3] ; encoding: [0x64,0x70,0x00,0x0d]
+; CHECK: st3.s { v4, v5, v6 }[2], [x3] ; encoding: [0x64,0xa0,0x00,0x4d]
+; CHECK: st3.d { v4, v5, v6 }[1], [x3] ; encoding: [0x64,0xa4,0x00,0x4d]
+; CHECK: st3.b { v4, v5, v6 }[13], [x3], x5 ; encoding: [0x64,0x34,0x85,0x4d]
+; CHECK: st3.h { v4, v5, v6 }[2], [x3], x5 ; encoding: [0x64,0x70,0x85,0x0d]
+; CHECK: st3.s { v4, v5, v6 }[2], [x3], x5 ; encoding: [0x64,0xa0,0x85,0x4d]
+; CHECK: st3.d { v4, v5, v6 }[1], [x3], x5 ; encoding: [0x64,0xa4,0x85,0x4d]
+; CHECK: st3.b { v4, v5, v6 }[13], [x3], #3 ; encoding: [0x64,0x34,0x9f,0x4d]
+; CHECK: st3.h { v4, v5, v6 }[2], [x3], #6 ; encoding: [0x64,0x70,0x9f,0x0d]
+; CHECK: st3.s { v4, v5, v6 }[2], [x3], #12 ; encoding: [0x64,0xa0,0x9f,0x4d]
+; CHECK: st3.d { v4, v5, v6 }[1], [x3], #24 ; encoding: [0x64,0xa4,0x9f,0x4d]
+
+_st4:
+  st4.b {v4, v5, v6, v7}[13], [x3]
+  st4.h {v4, v5, v6, v7}[2], [x3]
+  st4.s {v4, v5, v6, v7}[2], [x3]
+  st4.d {v4, v5, v6, v7}[1], [x3]
+  st4.b {v4, v5, v6, v7}[13], [x3], x5
+  st4.h {v4, v5, v6, v7}[2], [x3], x5
+  st4.s {v4, v5, v6, v7}[2], [x3], x5
+  st4.d {v4, v5, v6, v7}[1], [x3], x5
+  st4.b {v4, v5, v6, v7}[13], [x3], #4
+  st4.h {v4, v5, v6, v7}[2], [x3], #8
+  st4.s {v4, v5, v6, v7}[2], [x3], #16
+  st4.d {v4, v5, v6, v7}[1], [x3], #32
+
+; CHECK: _st4:
+; CHECK: st4.b { v4, v5, v6, v7 }[13], [x3] ; encoding: [0x64,0x34,0x20,0x4d]
+; CHECK: st4.h { v4, v5, v6, v7 }[2], [x3] ; encoding: [0x64,0x70,0x20,0x0d]
+; CHECK: st4.s { v4, v5, v6, v7 }[2], [x3] ; encoding: [0x64,0xa0,0x20,0x4d]
+; CHECK: st4.d { v4, v5, v6, v7 }[1], [x3] ; encoding: [0x64,0xa4,0x20,0x4d]
+; CHECK: st4.b { v4, v5, v6, v7 }[13], [x3], x5 ; encoding: [0x64,0x34,0xa5,0x4d]
+; CHECK: st4.h { v4, v5, v6, v7 }[2], [x3], x5 ; encoding: [0x64,0x70,0xa5,0x0d]
+; CHECK: st4.s { v4, v5, v6, v7 }[2], [x3], x5 ; encoding: [0x64,0xa0,0xa5,0x4d]
+; CHECK: st4.d { v4, v5, v6, v7 }[1], [x3], x5 ; encoding: [0x64,0xa4,0xa5,0x4d]
+; CHECK: st4.b { v4, v5, v6, v7 }[13], [x3], #4 ; encoding: [0x64,0x34,0xbf,0x4d]
+; CHECK: st4.h { v4, v5, v6, v7 }[2], [x3], #8 ; encoding: [0x64,0x70,0xbf,0x0d]
+; CHECK: st4.s { v4, v5, v6, v7 }[2], [x3], #16 ; encoding: [0x64,0xa0,0xbf,0x4d]
+; CHECK: st4.d { v4, v5, v6, v7 }[1], [x3], #32 ; encoding: [0x64,0xa4,0xbf,0x4d]
+
+
+;---------
+; ARM verbose syntax equivalents to the above.
+;---------
+verbose_syntax:
+
+  ld1 { v1.8b }, [x1]
+  ld1 { v2.8b, v3.8b }, [x1]
+  ld1 { v3.8b, v4.8b, v5.8b }, [x1]
+  ld1 { v4.8b, v5.8b, v6.8b, v7.8b }, [x1]
+
+  ld1 { v1.16b }, [x1]
+  ld1 { v2.16b, v3.16b }, [x1]
+  ld1 { v3.16b, v4.16b, v5.16b }, [x1]
+  ld1 { v4.16b, v5.16b, v6.16b, v7.16b }, [x1]
+
+  ld1 { v1.4h }, [x1]
+  ld1 { v2.4h, v3.4h }, [x1]
+  ld1 { v3.4h, v4.4h, v5.4h }, [x1]
+  ld1 { v7.4h, v8.4h, v9.4h, v10.4h }, [x1]
+
+  ld1 { v1.8h }, [x1]
+  ld1 { v2.8h, v3.8h }, [x1]
+  ld1 { v3.8h, v4.8h, v5.8h }, [x1]
+  ld1 { v7.8h, v8.8h, v9.8h, v10.8h }, [x1]
+
+  ld1 { v1.2s }, [x1]
+  ld1 { v2.2s, v3.2s }, [x1]
+  ld1 { v3.2s, v4.2s, v5.2s }, [x1]
+  ld1 { v7.2s, v8.2s, v9.2s, v10.2s }, [x1]
+
+  ld1 { v1.4s }, [x1]
+  ld1 { v2.4s, v3.4s }, [x1]
+  ld1 { v3.4s, v4.4s, v5.4s }, [x1]
+  ld1 { v7.4s, v8.4s, v9.4s, v10.4s }, [x1]
+
+  ld1 { v1.1d }, [x1]
+  ld1 { v2.1d, v3.1d }, [x1]
+  ld1 { v3.1d, v4.1d, v5.1d }, [x1]
+  ld1 { v7.1d, v8.1d, v9.1d, v10.1d }, [x1]
+
+  ld1 { v1.2d }, [x1]
+  ld1 { v2.2d, v3.2d }, [x1]
+  ld1 { v3.2d, v4.2d, v5.2d }, [x1]
+  ld1 { v7.2d, v8.2d, v9.2d, v10.2d }, [x1]
+
+  st1 { v1.8b }, [x1]
+  st1 { v2.8b, v3.8b }, [x1]
+  st1 { v3.8b, v4.8b, v5.8b }, [x1]
+  st1 { v4.8b, v5.8b, v6.8b, v7.8b }, [x1]
+
+  st1 { v1.16b }, [x1]
+  st1 { v2.16b, v3.16b }, [x1]
+  st1 { v3.16b, v4.16b, v5.16b }, [x1]
+  st1 { v4.16b, v5.16b, v6.16b, v7.16b }, [x1]
+
+  st1 { v1.4h }, [x1]
+  st1 { v2.4h, v3.4h }, [x1]
+  st1 { v3.4h, v4.4h, v5.4h }, [x1]
+  st1 { v7.4h, v8.4h, v9.4h, v10.4h }, [x1]
+
+  st1 { v1.8h }, [x1]
+  st1 { v2.8h, v3.8h }, [x1]
+  st1 { v3.8h, v4.8h, v5.8h }, [x1]
+  st1 { v7.8h, v8.8h, v9.8h, v10.8h }, [x1]
+
+  st1 { v1.2s }, [x1]
+  st1 { v2.2s, v3.2s }, [x1]
+  st1 { v3.2s, v4.2s, v5.2s }, [x1]
+  st1 { v7.2s, v8.2s, v9.2s, v10.2s }, [x1]
+
+  st1 { v1.4s }, [x1]
+  st1 { v2.4s, v3.4s }, [x1]
+  st1 { v3.4s, v4.4s, v5.4s }, [x1]
+  st1 { v7.4s, v8.4s, v9.4s, v10.4s }, [x1]
+
+  st1 { v1.1d }, [x1]
+  st1 { v2.1d, v3.1d }, [x1]
+  st1 { v3.1d, v4.1d, v5.1d }, [x1]
+  st1 { v7.1d, v8.1d, v9.1d, v10.1d }, [x1]
+
+  st1 { v1.2d }, [x1]
+  st1 { v2.2d, v3.2d }, [x1]
+  st1 { v3.2d, v4.2d, v5.2d }, [x1]
+  st1 { v7.2d, v8.2d, v9.2d, v10.2d }, [x1]
+
+  ld2 { v3.8b, v4.8b }, [x19]
+  ld2 { v3.16b, v4.16b }, [x19]
+  ld2 { v3.4h, v4.4h }, [x19]
+  ld2 { v3.8h, v4.8h }, [x19]
+  ld2 { v3.2s, v4.2s }, [x19]
+  ld2 { v3.4s, v4.4s }, [x19]
+  ld2 { v3.2d, v4.2d }, [x19]
+
+  st2 { v3.8b, v4.8b }, [x19]
+  st2 { v3.16b, v4.16b }, [x19]
+  st2 { v3.4h, v4.4h }, [x19]
+  st2 { v3.8h, v4.8h }, [x19]
+  st2 { v3.2s, v4.2s }, [x19]
+  st2 { v3.4s, v4.4s }, [x19]
+  st2 { v3.2d, v4.2d }, [x19]
+
+  ld3 { v2.8b, v3.8b, v4.8b }, [x19]
+  ld3 { v2.16b, v3.16b, v4.16b }, [x19]
+  ld3 { v2.4h, v3.4h, v4.4h }, [x19]
+  ld3 { v2.8h, v3.8h, v4.8h }, [x19]
+  ld3 { v2.2s, v3.2s, v4.2s }, [x19]
+  ld3 { v2.4s, v3.4s, v4.4s }, [x19]
+  ld3 { v2.2d, v3.2d, v4.2d }, [x19]
+
+  st3 { v2.8b, v3.8b, v4.8b }, [x19]
+  st3 { v2.16b, v3.16b, v4.16b }, [x19]
+  st3 { v2.4h, v3.4h, v4.4h }, [x19]
+  st3 { v2.8h, v3.8h, v4.8h }, [x19]
+  st3 { v2.2s, v3.2s, v4.2s }, [x19]
+  st3 { v2.4s, v3.4s, v4.4s }, [x19]
+  st3 { v2.2d, v3.2d, v4.2d }, [x19]
+
+  ld4 { v2.8b, v3.8b, v4.8b, v5.8b }, [x19]
+  ld4 { v2.16b, v3.16b, v4.16b, v5.16b }, [x19]
+  ld4 { v2.4h, v3.4h, v4.4h, v5.4h }, [x19]
+  ld4 { v2.8h, v3.8h, v4.8h, v5.8h }, [x19]
+  ld4 { v2.2s, v3.2s, v4.2s, v5.2s }, [x19]
+  ld4 { v2.4s, v3.4s, v4.4s, v5.4s }, [x19]
+  ld4 { v2.2d, v3.2d, v4.2d, v5.2d }, [x19]
+
+  st4 { v2.8b, v3.8b, v4.8b, v5.8b }, [x19]
+  st4 { v2.16b, v3.16b, v4.16b, v5.16b }, [x19]
+  st4 { v2.4h, v3.4h, v4.4h, v5.4h }, [x19]
+  st4 { v2.8h, v3.8h, v4.8h, v5.8h }, [x19]
+  st4 { v2.2s, v3.2s, v4.2s, v5.2s }, [x19]
+  st4 { v2.4s, v3.4s, v4.4s, v5.4s }, [x19]
+  st4 { v2.2d, v3.2d, v4.2d, v5.2d }, [x19]
+
+  ld1 { v1.8b }, [x1], x15
+  ld1 { v2.8b, v3.8b }, [x1], x15
+  ld1 { v3.8b, v4.8b, v5.8b }, [x1], x15
+  ld1 { v4.8b, v5.8b, v6.8b, v7.8b }, [x1], x15
+
+  ld1 { v1.16b }, [x1], x15
+  ld1 { v2.16b, v3.16b }, [x1], x15
+  ld1 { v3.16b, v4.16b, v5.16b }, [x1], x15
+  ld1 { v4.16b, v5.16b, v6.16b, v7.16b }, [x1], x15
+
+  ld1 { v1.4h }, [x1], x15
+  ld1 { v2.4h, v3.4h }, [x1], x15
+  ld1 { v3.4h, v4.4h, v5.4h }, [x1], x15
+  ld1 { v7.4h, v8.4h, v9.4h, v10.4h }, [x1], x15
+
+  ld1 { v1.8h }, [x1], x15
+  ld1 { v2.8h, v3.8h }, [x1], x15
+  ld1 { v3.8h, v4.8h, v5.8h }, [x1], x15
+  ld1 { v7.8h, v8.8h, v9.8h, v10.8h }, [x1], x15
+
+  ld1 { v1.2s }, [x1], x15
+  ld1 { v2.2s, v3.2s }, [x1], x15
+  ld1 { v3.2s, v4.2s, v5.2s }, [x1], x15
+  ld1 { v7.2s, v8.2s, v9.2s, v10.2s }, [x1], x15
+
+  ld1 { v1.4s }, [x1], x15
+  ld1 { v2.4s, v3.4s }, [x1], x15
+  ld1 { v3.4s, v4.4s, v5.4s }, [x1], x15
+  ld1 { v7.4s, v8.4s, v9.4s, v10.4s }, [x1], x15
+
+  ld1 { v1.1d }, [x1], x15
+  ld1 { v2.1d, v3.1d }, [x1], x15
+  ld1 { v3.1d, v4.1d, v5.1d }, [x1], x15
+  ld1 { v7.1d, v8.1d, v9.1d, v10.1d }, [x1], x15
+
+  ld1 { v1.2d }, [x1], x15
+  ld1 { v2.2d, v3.2d }, [x1], x15
+  ld1 { v3.2d, v4.2d, v5.2d }, [x1], x15
+  ld1 { v7.2d, v8.2d, v9.2d, v10.2d }, [x1], x15
+
+  st1 { v1.8b }, [x1], x15
+  st1 { v2.8b, v3.8b }, [x1], x15
+  st1 { v3.8b, v4.8b, v5.8b }, [x1], x15
+  st1 { v4.8b, v5.8b, v6.8b, v7.8b }, [x1], x15
+
+  st1 { v1.16b }, [x1], x15
+  st1 { v2.16b, v3.16b }, [x1], x15
+  st1 { v3.16b, v4.16b, v5.16b }, [x1], x15
+  st1 { v4.16b, v5.16b, v6.16b, v7.16b }, [x1], x15
+
+  st1 { v1.4h }, [x1], x15
+  st1 { v2.4h, v3.4h }, [x1], x15
+  st1 { v3.4h, v4.4h, v5.4h }, [x1], x15
+  st1 { v7.4h, v8.4h, v9.4h, v10.4h }, [x1], x15
+
+  st1 { v1.8h }, [x1], x15
+  st1 { v2.8h, v3.8h }, [x1], x15
+  st1 { v3.8h, v4.8h, v5.8h }, [x1], x15
+  st1 { v7.8h, v8.8h, v9.8h, v10.8h }, [x1], x15
+
+  st1 { v1.2s }, [x1], x15
+  st1 { v2.2s, v3.2s }, [x1], x15
+  st1 { v3.2s, v4.2s, v5.2s }, [x1], x15
+  st1 { v7.2s, v8.2s, v9.2s, v10.2s }, [x1], x15
+
+  st1 { v1.4s }, [x1], x15
+  st1 { v2.4s, v3.4s }, [x1], x15
+  st1 { v3.4s, v4.4s, v5.4s }, [x1], x15
+  st1 { v7.4s, v8.4s, v9.4s, v10.4s }, [x1], x15
+
+  st1 { v1.1d }, [x1], x15
+  st1 { v2.1d, v3.1d }, [x1], x15
+  st1 { v3.1d, v4.1d, v5.1d }, [x1], x15
+  st1 { v7.1d, v8.1d, v9.1d, v10.1d }, [x1], x15
+
+  st1 { v1.2d }, [x1], x15
+  st1 { v2.2d, v3.2d }, [x1], x15
+  st1 { v3.2d, v4.2d, v5.2d }, [x1], x15
+  st1 { v7.2d, v8.2d, v9.2d, v10.2d }, [x1], x15
+
+  ld1 { v1.8b }, [x1], #8
+  ld1 { v2.8b, v3.8b }, [x1], #16
+  ld1 { v3.8b, v4.8b, v5.8b }, [x1], #24
+  ld1 { v4.8b, v5.8b, v6.8b, v7.8b }, [x1], #32
+
+  ld1 { v1.16b }, [x1], #16
+  ld1 { v2.16b, v3.16b }, [x1], #32
+  ld1 { v3.16b, v4.16b, v5.16b }, [x1], #48
+  ld1 { v4.16b, v5.16b, v6.16b, v7.16b }, [x1], #64
+
+  ld1 { v1.4h }, [x1], #8
+  ld1 { v2.4h, v3.4h }, [x1], #16
+  ld1 { v3.4h, v4.4h, v5.4h }, [x1], #24
+  ld1 { v7.4h, v8.4h, v9.4h, v10.4h }, [x1], #32
+
+  ld1 { v1.8h }, [x1], #16
+  ld1 { v2.8h, v3.8h }, [x1], #32
+  ld1 { v3.8h, v4.8h, v5.8h }, [x1], #48
+  ld1 { v7.8h, v8.8h, v9.8h, v10.8h }, [x1], #64
+
+  ld1 { v1.2s }, [x1], #8
+  ld1 { v2.2s, v3.2s }, [x1], #16
+  ld1 { v3.2s, v4.2s, v5.2s }, [x1], #24
+  ld1 { v7.2s, v8.2s, v9.2s, v10.2s }, [x1], #32
+
+  ld1 { v1.4s }, [x1], #16
+  ld1 { v2.4s, v3.4s }, [x1], #32
+  ld1 { v3.4s, v4.4s, v5.4s }, [x1], #48
+  ld1 { v7.4s, v8.4s, v9.4s, v10.4s }, [x1], #64
+
+  ld1 { v1.1d }, [x1], #8
+  ld1 { v2.1d, v3.1d }, [x1], #16
+  ld1 { v3.1d, v4.1d, v5.1d }, [x1], #24
+  ld1 { v7.1d, v8.1d, v9.1d, v10.1d }, [x1], #32
+
+  ld1 { v1.2d }, [x1], #16
+  ld1 { v2.2d, v3.2d }, [x1], #32
+  ld1 { v3.2d, v4.2d, v5.2d }, [x1], #48
+  ld1 { v7.2d, v8.2d, v9.2d, v10.2d }, [x1], #64
+
+  st1 { v1.8b }, [x1], #8
+  st1 { v2.8b, v3.8b }, [x1], #16
+  st1 { v3.8b, v4.8b, v5.8b }, [x1], #24
+  st1 { v4.8b, v5.8b, v6.8b, v7.8b }, [x1], #32
+
+  st1 { v1.16b }, [x1], #16
+  st1 { v2.16b, v3.16b }, [x1], #32
+  st1 { v3.16b, v4.16b, v5.16b }, [x1], #48
+  st1 { v4.16b, v5.16b, v6.16b, v7.16b }, [x1], #64
+
+  st1 { v1.4h }, [x1], #8
+  st1 { v2.4h, v3.4h }, [x1], #16
+  st1 { v3.4h, v4.4h, v5.4h }, [x1], #24
+  st1 { v7.4h, v8.4h, v9.4h, v10.4h }, [x1], #32
+
+  st1 { v1.8h }, [x1], #16
+  st1 { v2.8h, v3.8h }, [x1], #32
+  st1 { v3.8h, v4.8h, v5.8h }, [x1], #48
+  st1 { v7.8h, v8.8h, v9.8h, v10.8h }, [x1], #64
+
+  st1 { v1.2s }, [x1], #8
+  st1 { v2.2s, v3.2s }, [x1], #16
+  st1 { v3.2s, v4.2s, v5.2s }, [x1], #24
+  st1 { v7.2s, v8.2s, v9.2s, v10.2s }, [x1], #32
+
+  st1 { v1.4s }, [x1], #16
+  st1 { v2.4s, v3.4s }, [x1], #32
+  st1 { v3.4s, v4.4s, v5.4s }, [x1], #48
+  st1 { v7.4s, v8.4s, v9.4s, v10.4s }, [x1], #64
+
+  st1 { v1.1d }, [x1], #8
+  st1 { v2.1d, v3.1d }, [x1], #16
+  st1 { v3.1d, v4.1d, v5.1d }, [x1], #24
+  st1 { v7.1d, v8.1d, v9.1d, v10.1d }, [x1], #32
+
+  st1 { v1.2d }, [x1], #16
+  st1 { v2.2d, v3.2d }, [x1], #32
+  st1 { v3.2d, v4.2d, v5.2d }, [x1], #48
+  st1 { v7.2d, v8.2d, v9.2d, v10.2d }, [x1], #64
+
+  ld2 { v2.8b, v3.8b }, [x1], x15
+  ld2 { v2.16b, v3.16b }, [x1], x15
+  ld2 { v2.4h, v3.4h }, [x1], x15
+  ld2 { v2.8h, v3.8h }, [x1], x15
+  ld2 { v2.2s, v3.2s }, [x1], x15
+  ld2 { v2.4s, v3.4s }, [x1], x15
+  ld2 { v2.2d, v3.2d }, [x1], x15
+
+  st2 { v2.8b, v3.8b }, [x1], x15
+  st2 { v2.16b, v3.16b }, [x1], x15
+  st2 { v2.4h, v3.4h }, [x1], x15
+  st2 { v2.8h, v3.8h }, [x1], x15
+  st2 { v2.2s, v3.2s }, [x1], x15
+  st2 { v2.4s, v3.4s }, [x1], x15
+  st2 { v2.2d, v3.2d }, [x1], x15
+
+  ld2 { v2.8b, v3.8b }, [x1], #16
+  ld2 { v2.16b, v3.16b }, [x1], #32
+  ld2 { v2.4h, v3.4h }, [x1], #16
+  ld2 { v2.8h, v3.8h }, [x1], #32
+  ld2 { v2.2s, v3.2s }, [x1], #16
+  ld2 { v2.4s, v3.4s }, [x1], #32
+  ld2 { v2.2d, v3.2d }, [x1], #32
+
+  st2 { v2.8b, v3.8b }, [x1], #16
+  st2 { v2.16b, v3.16b }, [x1], #32
+  st2 { v2.4h, v3.4h }, [x1], #16
+  st2 { v2.8h, v3.8h }, [x1], #32
+  st2 { v2.2s, v3.2s }, [x1], #16
+  st2 { v2.4s, v3.4s }, [x1], #32
+  st2 { v2.2d, v3.2d }, [x1], #32
+
+  ld3 { v3.8b, v4.8b, v5.8b }, [x1], x15
+  ld3 { v3.16b, v4.16b, v5.16b }, [x1], x15
+  ld3 { v3.4h, v4.4h, v5.4h }, [x1], x15
+  ld3 { v3.8h, v4.8h, v5.8h }, [x1], x15
+  ld3 { v3.2s, v4.2s, v5.2s }, [x1], x15
+  ld3 { v3.4s, v4.4s, v5.4s }, [x1], x15
+  ld3 { v3.2d, v4.2d, v5.2d }, [x1], x15
+
+  st3 { v3.8b, v4.8b, v5.8b }, [x1], x15
+  st3 { v3.16b, v4.16b, v5.16b }, [x1], x15
+  st3 { v3.4h, v4.4h, v5.4h }, [x1], x15
+  st3 { v3.8h, v4.8h, v5.8h }, [x1], x15
+  st3 { v3.2s, v4.2s, v5.2s }, [x1], x15
+  st3 { v3.4s, v4.4s, v5.4s }, [x1], x15
+  st3 { v3.2d, v4.2d, v5.2d }, [x1], x15
+  ld3 { v3.8b, v4.8b, v5.8b }, [x1], #24
+
+  ld3 { v3.16b, v4.16b, v5.16b }, [x1], #48
+  ld3 { v3.4h, v4.4h, v5.4h }, [x1], #24
+  ld3 { v3.8h, v4.8h, v5.8h }, [x1], #48
+  ld3 { v3.2s, v4.2s, v5.2s }, [x1], #24
+  ld3 { v3.4s, v4.4s, v5.4s }, [x1], #48
+  ld3 { v3.2d, v4.2d, v5.2d }, [x1], #48
+
+  st3 { v3.8b, v4.8b, v5.8b }, [x1], #24
+  st3 { v3.16b, v4.16b, v5.16b }, [x1], #48
+  st3 { v3.4h, v4.4h, v5.4h }, [x1], #24
+  st3 { v3.8h, v4.8h, v5.8h }, [x1], #48
+  st3 { v3.2s, v4.2s, v5.2s }, [x1], #24
+  st3 { v3.4s, v4.4s, v5.4s }, [x1], #48
+  st3 { v3.2d, v4.2d, v5.2d }, [x1], #48
+
+  ld4 { v4.8b, v5.8b, v6.8b, v7.8b }, [x1], x15
+  ld4 { v4.16b, v5.16b, v6.16b, v7.16b }, [x1], x15
+  ld4 { v7.4h, v8.4h, v9.4h, v10.4h }, [x1], x15
+  ld4 { v7.8h, v8.8h, v9.8h, v10.8h }, [x1], x15
+  ld4 { v7.2s, v8.2s, v9.2s, v10.2s }, [x1], x15
+  ld4 { v7.4s, v8.4s, v9.4s, v10.4s }, [x1], x15
+  ld4 { v7.2d, v8.2d, v9.2d, v10.2d }, [x1], x15
+
+  st4 { v4.8b, v5.8b, v6.8b, v7.8b }, [x1], x15
+  st4 { v4.16b, v5.16b, v6.16b, v7.16b }, [x1], x15
+  st4 { v7.4h, v8.4h, v9.4h, v10.4h }, [x1], x15
+  st4 { v7.8h, v8.8h, v9.8h, v10.8h }, [x1], x15
+  st4 { v7.2s, v8.2s, v9.2s, v10.2s }, [x1], x15
+  st4 { v7.4s, v8.4s, v9.4s, v10.4s }, [x1], x15
+  st4 { v7.2d, v8.2d, v9.2d, v10.2d }, [x1], x15
+
+  ld4 { v4.8b, v5.8b, v6.8b, v7.8b }, [x1], #32
+  ld4 { v4.16b, v5.16b, v6.16b, v7.16b }, [x1], #64
+  ld4 { v7.4h, v8.4h, v9.4h, v10.4h }, [x1], #32
+  ld4 { v7.8h, v8.8h, v9.8h, v10.8h }, [x1], #64
+  ld4 { v7.2s, v8.2s, v9.2s, v10.2s }, [x1], #32
+  ld4 { v7.4s, v8.4s, v9.4s, v10.4s }, [x1], #64
+  ld4 { v7.2d, v8.2d, v9.2d, v10.2d }, [x1], #64
+
+  st4 { v4.8b, v5.8b, v6.8b, v7.8b }, [x1], #32
+  st4 { v4.16b, v5.16b, v6.16b, v7.16b }, [x1], #64
+  st4 { v7.4h, v8.4h, v9.4h, v10.4h }, [x1], #32
+  st4 { v7.8h, v8.8h, v9.8h, v10.8h }, [x1], #64
+  st4 { v7.2s, v8.2s, v9.2s, v10.2s }, [x1], #32
+  st4 { v7.4s, v8.4s, v9.4s, v10.4s }, [x1], #64
+  st4 { v7.2d, v8.2d, v9.2d, v10.2d }, [x1], #64
+
+
+  ld1r { v12.8b }, [x2]
+  ld1r { v12.8b }, [x2], x3
+  ld1r { v12.16b }, [x2]
+  ld1r { v12.16b }, [x2], x3
+  ld1r { v12.4h }, [x2]
+  ld1r { v12.4h }, [x2], x3
+  ld1r { v12.8h }, [x2]
+  ld1r { v12.8h }, [x2], x3
+  ld1r { v12.2s }, [x2]
+  ld1r { v12.2s }, [x2], x3
+  ld1r { v12.4s }, [x2]
+  ld1r { v12.4s }, [x2], x3
+  ld1r { v12.1d }, [x2]
+  ld1r { v12.1d }, [x2], x3
+  ld1r { v12.2d }, [x2]
+  ld1r { v12.2d }, [x2], x3
+
+  ld1r { v12.8b }, [x2], #1
+  ld1r { v12.16b }, [x2], #1
+  ld1r { v12.4h }, [x2], #2
+  ld1r { v12.8h }, [x2], #2
+  ld1r { v12.2s }, [x2], #4
+  ld1r { v12.4s }, [x2], #4
+  ld1r { v12.1d }, [x2], #8
+  ld1r { v12.2d }, [x2], #8
+  ld2r { v3.8b, v4.8b }, [x2]
+  ld2r { v3.8b, v4.8b }, [x2], x3
+  ld2r { v3.16b, v4.16b }, [x2]
+  ld2r { v3.16b, v4.16b }, [x2], x3
+  ld2r { v3.4h, v4.4h }, [x2]
+  ld2r { v3.4h, v4.4h }, [x2], x3
+  ld2r { v3.8h, v4.8h }, [x2]
+  ld2r { v3.8h, v4.8h }, [x2], x3
+  ld2r { v3.2s, v4.2s }, [x2]
+  ld2r { v3.2s, v4.2s }, [x2], x3
+  ld2r { v3.4s, v4.4s }, [x2]
+  ld2r { v3.4s, v4.4s }, [x2], x3
+  ld2r { v3.1d, v4.1d }, [x2]
+  ld2r { v3.1d, v4.1d }, [x2], x3
+  ld2r { v3.2d, v4.2d }, [x2]
+  ld2r { v3.2d, v4.2d }, [x2], x3
+
+  ld2r { v3.8b, v4.8b }, [x2], #2
+  ld2r { v3.16b, v4.16b }, [x2], #2
+  ld2r { v3.4h, v4.4h }, [x2], #4
+  ld2r { v3.8h, v4.8h }, [x2], #4
+  ld2r { v3.2s, v4.2s }, [x2], #8
+  ld2r { v3.4s, v4.4s }, [x2], #8
+  ld2r { v3.1d, v4.1d }, [x2], #16
+  ld2r { v3.2d, v4.2d }, [x2], #16
+
+  ld3r { v2.8b, v3.8b, v4.8b }, [x2]
+  ld3r { v2.8b, v3.8b, v4.8b }, [x2], x3
+  ld3r { v2.16b, v3.16b, v4.16b }, [x2]
+  ld3r { v2.16b, v3.16b, v4.16b }, [x2], x3
+  ld3r { v2.4h, v3.4h, v4.4h }, [x2]
+  ld3r { v2.4h, v3.4h, v4.4h }, [x2], x3
+  ld3r { v2.8h, v3.8h, v4.8h }, [x2]
+  ld3r { v2.8h, v3.8h, v4.8h }, [x2], x3
+  ld3r { v2.2s, v3.2s, v4.2s }, [x2]
+  ld3r { v2.2s, v3.2s, v4.2s }, [x2], x3
+  ld3r { v2.4s, v3.4s, v4.4s }, [x2]
+  ld3r { v2.4s, v3.4s, v4.4s }, [x2], x3
+  ld3r { v2.1d, v3.1d, v4.1d }, [x2]
+  ld3r { v2.1d, v3.1d, v4.1d }, [x2], x3
+  ld3r { v2.2d, v3.2d, v4.2d }, [x2]
+  ld3r { v2.2d, v3.2d, v4.2d }, [x2], x3
+
+  ld3r { v2.8b, v3.8b, v4.8b }, [x2], #3
+  ld3r { v2.16b, v3.16b, v4.16b }, [x2], #3
+  ld3r { v2.4h, v3.4h, v4.4h }, [x2], #6
+  ld3r { v2.8h, v3.8h, v4.8h }, [x2], #6
+  ld3r { v2.2s, v3.2s, v4.2s }, [x2], #12
+  ld3r { v2.4s, v3.4s, v4.4s }, [x2], #12
+  ld3r { v2.1d, v3.1d, v4.1d }, [x2], #24
+  ld3r { v2.2d, v3.2d, v4.2d }, [x2], #24
+
+  ld4r { v2.8b, v3.8b, v4.8b, v5.8b }, [x2]
+  ld4r { v2.8b, v3.8b, v4.8b, v5.8b }, [x2], x3
+  ld4r { v2.16b, v3.16b, v4.16b, v5.16b }, [x2]
+  ld4r { v2.16b, v3.16b, v4.16b, v5.16b }, [x2], x3
+  ld4r { v2.4h, v3.4h, v4.4h, v5.4h }, [x2]
+  ld4r { v2.4h, v3.4h, v4.4h, v5.4h }, [x2], x3
+  ld4r { v2.8h, v3.8h, v4.8h, v5.8h }, [x2]
+  ld4r { v2.8h, v3.8h, v4.8h, v5.8h }, [x2], x3
+  ld4r { v2.2s, v3.2s, v4.2s, v5.2s }, [x2]
+  ld4r { v2.2s, v3.2s, v4.2s, v5.2s }, [x2], x3
+  ld4r { v2.4s, v3.4s, v4.4s, v5.4s }, [x2]
+  ld4r { v2.4s, v3.4s, v4.4s, v5.4s }, [x2], x3
+  ld4r { v2.1d, v3.1d, v4.1d, v5.1d }, [x2]
+  ld4r { v2.1d, v3.1d, v4.1d, v5.1d }, [x2], x3
+  ld4r { v2.2d, v3.2d, v4.2d, v5.2d }, [x2]
+  ld4r { v2.2d, v3.2d, v4.2d, v5.2d }, [x2], x3
+
+  ld4r { v2.8b, v3.8b, v4.8b, v5.8b }, [x2], #4
+  ld4r { v2.16b, v3.16b, v4.16b, v5.16b }, [x2], #4
+  ld4r { v2.4h, v3.4h, v4.4h, v5.4h }, [x2], #8
+  ld4r { v2.8h, v3.8h, v4.8h, v5.8h }, [x2], #8
+  ld4r { v2.2s, v3.2s, v4.2s, v5.2s }, [x2], #16
+  ld4r { v2.4s, v3.4s, v4.4s, v5.4s }, [x2], #16
+  ld4r { v2.1d, v3.1d, v4.1d, v5.1d }, [x2], #32
+  ld4r { v2.2d, v3.2d, v4.2d, v5.2d }, [x2], #32
+
+  ld1 { v6.b }[13], [x3]
+  ld1 { v6.h }[2], [x3]
+  ld1 { v6.s }[2], [x3]
+  ld1 { v6.d }[1], [x3]
+  ld1 { v6.b }[13], [x3], x5
+  ld1 { v6.h }[2], [x3], x5
+  ld1 { v6.s }[2], [x3], x5
+  ld1 { v6.d }[1], [x3], x5
+  ld1 { v6.b }[13], [x3], #1
+  ld1 { v6.h }[2], [x3], #2
+  ld1 { v6.s }[2], [x3], #4
+  ld1 { v6.d }[1], [x3], #8
+
+  ld2 { v5.b, v6.b }[13], [x3]
+  ld2 { v5.h, v6.h }[2], [x3]
+  ld2 { v5.s, v6.s }[2], [x3]
+  ld2 { v5.d, v6.d }[1], [x3]
+  ld2 { v5.b, v6.b }[13], [x3], x5
+  ld2 { v5.h, v6.h }[2], [x3], x5
+  ld2 { v5.s, v6.s }[2], [x3], x5
+  ld2 { v5.d, v6.d }[1], [x3], x5
+  ld2 { v5.b, v6.b }[13], [x3], #2
+  ld2 { v5.h, v6.h }[2], [x3], #4
+  ld2 { v5.s, v6.s }[2], [x3], #8
+  ld2 { v5.d, v6.d }[1], [x3], #16
+
+  ld3 { v7.b, v8.b, v9.b }[13], [x3]
+  ld3 { v7.h, v8.h, v9.h }[2], [x3]
+  ld3 { v7.s, v8.s, v9.s }[2], [x3]
+  ld3 { v7.d, v8.d, v9.d }[1], [x3]
+  ld3 { v7.b, v8.b, v9.b }[13], [x3], x5
+  ld3 { v7.h, v8.h, v9.h }[2], [x3], x5
+  ld3 { v7.s, v8.s, v9.s }[2], [x3], x5
+  ld3 { v7.d, v8.d, v9.d }[1], [x3], x5
+  ld3 { v7.b, v8.b, v9.b }[13], [x3], #3
+  ld3 { v7.h, v8.h, v9.h }[2], [x3], #6
+  ld3 { v7.s, v8.s, v9.s }[2], [x3], #12
+  ld3 { v7.d, v8.d, v9.d }[1], [x3], #24
+
+  ld4 { v7.b, v8.b, v9.b, v10.b }[13], [x3]
+  ld4 { v7.h, v8.h, v9.h, v10.h }[2], [x3]
+  ld4 { v7.s, v8.s, v9.s, v10.s }[2], [x3]
+  ld4 { v7.d, v8.d, v9.d, v10.d }[1], [x3]
+  ld4 { v7.b, v8.b, v9.b, v10.b }[13], [x3], x5
+  ld4 { v7.h, v8.h, v9.h, v10.h }[2], [x3], x5
+  ld4 { v7.s, v8.s, v9.s, v10.s }[2], [x3], x5
+  ld4 { v7.d, v8.d, v9.d, v10.d }[1], [x3], x5
+  ld4 { v7.b, v8.b, v9.b, v10.b }[13], [x3], #4
+  ld4 { v7.h, v8.h, v9.h, v10.h }[2], [x3], #8
+  ld4 { v7.s, v8.s, v9.s, v10.s }[2], [x3], #16
+  ld4 { v7.d, v8.d, v9.d, v10.d }[1], [x3], #32
+
+  st1 { v6.b }[13], [x3]
+  st1 { v6.h }[2], [x3]
+  st1 { v6.s }[2], [x3]
+  st1 { v6.d }[1], [x3]
+  st1 { v6.b }[13], [x3], x5
+  st1 { v6.h }[2], [x3], x5
+  st1 { v6.s }[2], [x3], x5
+  st1 { v6.d }[1], [x3], x5
+  st1 { v6.b }[13], [x3], #1
+  st1 { v6.h }[2], [x3], #2
+  st1 { v6.s }[2], [x3], #4
+  st1 { v6.d }[1], [x3], #8
+
+
+  st2 { v5.b, v6.b }[13], [x3]
+  st2 { v5.h, v6.h }[2], [x3]
+  st2 { v5.s, v6.s }[2], [x3]
+  st2 { v5.d, v6.d }[1], [x3]
+  st2 { v5.b, v6.b }[13], [x3], x5
+  st2 { v5.h, v6.h }[2], [x3], x5
+  st2 { v5.s, v6.s }[2], [x3], x5
+  st2 { v5.d, v6.d }[1], [x3], x5
+  st2 { v5.b, v6.b }[13], [x3], #2
+  st2 { v5.h, v6.h }[2], [x3], #4
+  st2 { v5.s, v6.s }[2], [x3], #8
+  st2 { v5.d, v6.d }[1], [x3], #16
+
+  st3 { v7.b, v8.b, v9.b }[13], [x3]
+  st3 { v7.h, v8.h, v9.h }[2], [x3]
+  st3 { v7.s, v8.s, v9.s }[2], [x3]
+  st3 { v7.d, v8.d, v9.d }[1], [x3]
+  st3 { v7.b, v8.b, v9.b }[13], [x3], x5
+  st3 { v7.h, v8.h, v9.h }[2], [x3], x5
+  st3 { v7.s, v8.s, v9.s }[2], [x3], x5
+  st3 { v7.d, v8.d, v9.d }[1], [x3], x5
+  st3 { v7.b, v8.b, v9.b }[13], [x3], #3
+  st3 { v7.h, v8.h, v9.h }[2], [x3], #6
+  st3 { v7.s, v8.s, v9.s }[2], [x3], #12
+  st3 { v7.d, v8.d, v9.d }[1], [x3], #24
+
+  st4 { v7.b, v8.b, v9.b, v10.b }[13], [x3]
+  st4 { v7.h, v8.h, v9.h, v10.h }[2], [x3]
+  st4 { v7.s, v8.s, v9.s, v10.s }[2], [x3]
+  st4 { v7.d, v8.d, v9.d, v10.d }[1], [x3]
+  st4 { v7.b, v8.b, v9.b, v10.b }[13], [x3], x5
+  st4 { v7.h, v8.h, v9.h, v10.h }[2], [x3], x5
+  st4 { v7.s, v8.s, v9.s, v10.s }[2], [x3], x5
+  st4 { v7.d, v8.d, v9.d, v10.d }[1], [x3], x5
+  st4 { v7.b, v8.b, v9.b, v10.b }[13], [x3], #4
+  st4 { v7.h, v8.h, v9.h, v10.h }[2], [x3], #8
+  st4 { v7.s, v8.s, v9.s, v10.s }[2], [x3], #16
+  st4 { v7.d, v8.d, v9.d, v10.d }[1], [x3], #32
+
+; CHECK: ld1.8b	{ v1 }, [x1]            ; encoding: [0x21,0x70,0x40,0x0c]
+; CHECK: ld1.8b	{ v2, v3 }, [x1]        ; encoding: [0x22,0xa0,0x40,0x0c]
+; CHECK: ld1.8b	{ v3, v4, v5 }, [x1]    ; encoding: [0x23,0x60,0x40,0x0c]
+; CHECK: ld1.8b	{ v4, v5, v6, v7 }, [x1] ; encoding: [0x24,0x20,0x40,0x0c]
+; CHECK: ld1.16b	{ v1 }, [x1]            ; encoding: [0x21,0x70,0x40,0x4c]
+; CHECK: ld1.16b	{ v2, v3 }, [x1]        ; encoding: [0x22,0xa0,0x40,0x4c]
+; CHECK: ld1.16b	{ v3, v4, v5 }, [x1]    ; encoding: [0x23,0x60,0x40,0x4c]
+; CHECK: ld1.16b	{ v4, v5, v6, v7 }, [x1] ; encoding: [0x24,0x20,0x40,0x4c]
+; CHECK: ld1.4h	{ v1 }, [x1]            ; encoding: [0x21,0x74,0x40,0x0c]
+; CHECK: ld1.4h	{ v2, v3 }, [x1]        ; encoding: [0x22,0xa4,0x40,0x0c]
+; CHECK: ld1.4h	{ v3, v4, v5 }, [x1]    ; encoding: [0x23,0x64,0x40,0x0c]
+; CHECK: ld1.4h	{ v7, v8, v9, v10 }, [x1] ; encoding: [0x27,0x24,0x40,0x0c]
+; CHECK: ld1.8h	{ v1 }, [x1]            ; encoding: [0x21,0x74,0x40,0x4c]
+; CHECK: ld1.8h	{ v2, v3 }, [x1]        ; encoding: [0x22,0xa4,0x40,0x4c]
+; CHECK: ld1.8h	{ v3, v4, v5 }, [x1]    ; encoding: [0x23,0x64,0x40,0x4c]
+; CHECK: ld1.8h	{ v7, v8, v9, v10 }, [x1] ; encoding: [0x27,0x24,0x40,0x4c]
+; CHECK: ld1.2s	{ v1 }, [x1]            ; encoding: [0x21,0x78,0x40,0x0c]
+; CHECK: ld1.2s	{ v2, v3 }, [x1]        ; encoding: [0x22,0xa8,0x40,0x0c]
+; CHECK: ld1.2s	{ v3, v4, v5 }, [x1]    ; encoding: [0x23,0x68,0x40,0x0c]
+; CHECK: ld1.2s	{ v7, v8, v9, v10 }, [x1] ; encoding: [0x27,0x28,0x40,0x0c]
+; CHECK: ld1.4s	{ v1 }, [x1]            ; encoding: [0x21,0x78,0x40,0x4c]
+; CHECK: ld1.4s	{ v2, v3 }, [x1]        ; encoding: [0x22,0xa8,0x40,0x4c]
+; CHECK: ld1.4s	{ v3, v4, v5 }, [x1]    ; encoding: [0x23,0x68,0x40,0x4c]
+; CHECK: ld1.4s	{ v7, v8, v9, v10 }, [x1] ; encoding: [0x27,0x28,0x40,0x4c]
+; CHECK: ld1.1d	{ v1 }, [x1]            ; encoding: [0x21,0x7c,0x40,0x0c]
+; CHECK: ld1.1d	{ v2, v3 }, [x1]        ; encoding: [0x22,0xac,0x40,0x0c]
+; CHECK: ld1.1d	{ v3, v4, v5 }, [x1]    ; encoding: [0x23,0x6c,0x40,0x0c]
+; CHECK: ld1.1d	{ v7, v8, v9, v10 }, [x1] ; encoding: [0x27,0x2c,0x40,0x0c]
+; CHECK: ld1.2d	{ v1 }, [x1]            ; encoding: [0x21,0x7c,0x40,0x4c]
+; CHECK: ld1.2d	{ v2, v3 }, [x1]        ; encoding: [0x22,0xac,0x40,0x4c]
+; CHECK: ld1.2d	{ v3, v4, v5 }, [x1]    ; encoding: [0x23,0x6c,0x40,0x4c]
+; CHECK: ld1.2d	{ v7, v8, v9, v10 }, [x1] ; encoding: [0x27,0x2c,0x40,0x4c]
+; CHECK: st1.8b	{ v1 }, [x1]            ; encoding: [0x21,0x70,0x00,0x0c]
+; CHECK: st1.8b	{ v2, v3 }, [x1]        ; encoding: [0x22,0xa0,0x00,0x0c]
+; CHECK: st1.8b	{ v3, v4, v5 }, [x1]    ; encoding: [0x23,0x60,0x00,0x0c]
+; CHECK: st1.8b	{ v4, v5, v6, v7 }, [x1] ; encoding: [0x24,0x20,0x00,0x0c]
+; CHECK: st1.16b	{ v1 }, [x1]            ; encoding: [0x21,0x70,0x00,0x4c]
+; CHECK: st1.16b	{ v2, v3 }, [x1]        ; encoding: [0x22,0xa0,0x00,0x4c]
+; CHECK: st1.16b	{ v3, v4, v5 }, [x1]    ; encoding: [0x23,0x60,0x00,0x4c]
+; CHECK: st1.16b	{ v4, v5, v6, v7 }, [x1] ; encoding: [0x24,0x20,0x00,0x4c]
+; CHECK: st1.4h	{ v1 }, [x1]            ; encoding: [0x21,0x74,0x00,0x0c]
+; CHECK: st1.4h	{ v2, v3 }, [x1]        ; encoding: [0x22,0xa4,0x00,0x0c]
+; CHECK: st1.4h	{ v3, v4, v5 }, [x1]    ; encoding: [0x23,0x64,0x00,0x0c]
+; CHECK: st1.4h	{ v7, v8, v9, v10 }, [x1] ; encoding: [0x27,0x24,0x00,0x0c]
+; CHECK: st1.8h	{ v1 }, [x1]            ; encoding: [0x21,0x74,0x00,0x4c]
+; CHECK: st1.8h	{ v2, v3 }, [x1]        ; encoding: [0x22,0xa4,0x00,0x4c]
+; CHECK: st1.8h	{ v3, v4, v5 }, [x1]    ; encoding: [0x23,0x64,0x00,0x4c]
+; CHECK: st1.8h	{ v7, v8, v9, v10 }, [x1] ; encoding: [0x27,0x24,0x00,0x4c]
+; CHECK: st1.2s	{ v1 }, [x1]            ; encoding: [0x21,0x78,0x00,0x0c]
+; CHECK: st1.2s	{ v2, v3 }, [x1]        ; encoding: [0x22,0xa8,0x00,0x0c]
+; CHECK: st1.2s	{ v3, v4, v5 }, [x1]    ; encoding: [0x23,0x68,0x00,0x0c]
+; CHECK: st1.2s	{ v7, v8, v9, v10 }, [x1] ; encoding: [0x27,0x28,0x00,0x0c]
+; CHECK: st1.4s	{ v1 }, [x1]            ; encoding: [0x21,0x78,0x00,0x4c]
+; CHECK: st1.4s	{ v2, v3 }, [x1]        ; encoding: [0x22,0xa8,0x00,0x4c]
+; CHECK: st1.4s	{ v3, v4, v5 }, [x1]    ; encoding: [0x23,0x68,0x00,0x4c]
+; CHECK: st1.4s	{ v7, v8, v9, v10 }, [x1] ; encoding: [0x27,0x28,0x00,0x4c]
+; CHECK: st1.1d	{ v1 }, [x1]            ; encoding: [0x21,0x7c,0x00,0x0c]
+; CHECK: st1.1d	{ v2, v3 }, [x1]        ; encoding: [0x22,0xac,0x00,0x0c]
+; CHECK: st1.1d	{ v3, v4, v5 }, [x1]    ; encoding: [0x23,0x6c,0x00,0x0c]
+; CHECK: st1.1d	{ v7, v8, v9, v10 }, [x1] ; encoding: [0x27,0x2c,0x00,0x0c]
+; CHECK: st1.2d	{ v1 }, [x1]            ; encoding: [0x21,0x7c,0x00,0x4c]
+; CHECK: st1.2d	{ v2, v3 }, [x1]        ; encoding: [0x22,0xac,0x00,0x4c]
+; CHECK: st1.2d	{ v3, v4, v5 }, [x1]    ; encoding: [0x23,0x6c,0x00,0x4c]
+; CHECK: st1.2d	{ v7, v8, v9, v10 }, [x1] ; encoding: [0x27,0x2c,0x00,0x4c]
+; CHECK: ld2.8b	{ v3, v4 }, [x19]       ; encoding: [0x63,0x82,0x40,0x0c]
+; CHECK: ld2.16b	{ v3, v4 }, [x19]       ; encoding: [0x63,0x82,0x40,0x4c]
+; CHECK: ld2.4h	{ v3, v4 }, [x19]       ; encoding: [0x63,0x86,0x40,0x0c]
+; CHECK: ld2.8h	{ v3, v4 }, [x19]       ; encoding: [0x63,0x86,0x40,0x4c]
+; CHECK: ld2.2s	{ v3, v4 }, [x19]       ; encoding: [0x63,0x8a,0x40,0x0c]
+; CHECK: ld2.4s	{ v3, v4 }, [x19]       ; encoding: [0x63,0x8a,0x40,0x4c]
+; CHECK: ld2.2d	{ v3, v4 }, [x19]       ; encoding: [0x63,0x8e,0x40,0x4c]
+; CHECK: st2.8b	{ v3, v4 }, [x19]       ; encoding: [0x63,0x82,0x00,0x0c]
+; CHECK: st2.16b { v3, v4 }, [x19]       ; encoding: [0x63,0x82,0x00,0x4c]
+; CHECK: st2.4h	{ v3, v4 }, [x19]       ; encoding: [0x63,0x86,0x00,0x0c]
+; CHECK: st2.8h	{ v3, v4 }, [x19]       ; encoding: [0x63,0x86,0x00,0x4c]
+; CHECK: st2.2s	{ v3, v4 }, [x19]       ; encoding: [0x63,0x8a,0x00,0x0c]
+; CHECK: st2.4s	{ v3, v4 }, [x19]       ; encoding: [0x63,0x8a,0x00,0x4c]
+; CHECK: st2.2d	{ v3, v4 }, [x19]       ; encoding: [0x63,0x8e,0x00,0x4c]
+; CHECK: ld3.8b	{ v2, v3, v4 }, [x19]   ; encoding: [0x62,0x42,0x40,0x0c]
+; CHECK: ld3.16b	{ v2, v3, v4 }, [x19]   ; encoding: [0x62,0x42,0x40,0x4c]
+; CHECK: ld3.4h	{ v2, v3, v4 }, [x19]   ; encoding: [0x62,0x46,0x40,0x0c]
+; CHECK: ld3.8h	{ v2, v3, v4 }, [x19]   ; encoding: [0x62,0x46,0x40,0x4c]
+; CHECK: ld3.2s	{ v2, v3, v4 }, [x19]   ; encoding: [0x62,0x4a,0x40,0x0c]
+; CHECK: ld3.4s	{ v2, v3, v4 }, [x19]   ; encoding: [0x62,0x4a,0x40,0x4c]
+; CHECK: ld3.2d	{ v2, v3, v4 }, [x19]   ; encoding: [0x62,0x4e,0x40,0x4c]
+; CHECK: st3.8b	{ v2, v3, v4 }, [x19]   ; encoding: [0x62,0x42,0x00,0x0c]
+; CHECK: st3.16b	{ v2, v3, v4 }, [x19]   ; encoding: [0x62,0x42,0x00,0x4c]
+; CHECK: st3.4h	{ v2, v3, v4 }, [x19]   ; encoding: [0x62,0x46,0x00,0x0c]
+; CHECK: st3.8h	{ v2, v3, v4 }, [x19]   ; encoding: [0x62,0x46,0x00,0x4c]
+; CHECK: st3.2s	{ v2, v3, v4 }, [x19]   ; encoding: [0x62,0x4a,0x00,0x0c]
+; CHECK: st3.4s	{ v2, v3, v4 }, [x19]   ; encoding: [0x62,0x4a,0x00,0x4c]
+; CHECK: st3.2d	{ v2, v3, v4 }, [x19]   ; encoding: [0x62,0x4e,0x00,0x4c]
+; CHECK: ld4.8b	{ v2, v3, v4, v5 }, [x19] ; encoding: [0x62,0x02,0x40,0x0c]
+; CHECK: ld4.16b	{ v2, v3, v4, v5 }, [x19] ; encoding: [0x62,0x02,0x40,0x4c]
+; CHECK: ld4.4h	{ v2, v3, v4, v5 }, [x19] ; encoding: [0x62,0x06,0x40,0x0c]
+; CHECK: ld4.8h	{ v2, v3, v4, v5 }, [x19] ; encoding: [0x62,0x06,0x40,0x4c]
+; CHECK: ld4.2s	{ v2, v3, v4, v5 }, [x19] ; encoding: [0x62,0x0a,0x40,0x0c]
+; CHECK: ld4.4s	{ v2, v3, v4, v5 }, [x19] ; encoding: [0x62,0x0a,0x40,0x4c]
+; CHECK: ld4.2d	{ v2, v3, v4, v5 }, [x19] ; encoding: [0x62,0x0e,0x40,0x4c]
+; CHECK: st4.8b	{ v2, v3, v4, v5 }, [x19] ; encoding: [0x62,0x02,0x00,0x0c]
+; CHECK: st4.16b	{ v2, v3, v4, v5 }, [x19] ; encoding: [0x62,0x02,0x00,0x4c]
+; CHECK: st4.4h	{ v2, v3, v4, v5 }, [x19] ; encoding: [0x62,0x06,0x00,0x0c]
+; CHECK: st4.8h	{ v2, v3, v4, v5 }, [x19] ; encoding: [0x62,0x06,0x00,0x4c]
+; CHECK: st4.2s	{ v2, v3, v4, v5 }, [x19] ; encoding: [0x62,0x0a,0x00,0x0c]
+; CHECK: st4.4s	{ v2, v3, v4, v5 }, [x19] ; encoding: [0x62,0x0a,0x00,0x4c]
+; CHECK: st4.2d	{ v2, v3, v4, v5 }, [x19] ; encoding: [0x62,0x0e,0x00,0x4c]
+; CHECK: ld1.8b	{ v1 }, [x1], x15       ; encoding: [0x21,0x70,0xcf,0x0c]
+; CHECK: ld1.8b	{ v2, v3 }, [x1], x15   ; encoding: [0x22,0xa0,0xcf,0x0c]
+; CHECK: ld1.8b	{ v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x60,0xcf,0x0c]
+; CHECK: ld1.8b	{ v4, v5, v6, v7 }, [x1], x15 ; encoding: [0x24,0x20,0xcf,0x0c]
+; CHECK: ld1.16b	{ v1 }, [x1], x15       ; encoding: [0x21,0x70,0xcf,0x4c]
+; CHECK: ld1.16b	{ v2, v3 }, [x1], x15   ; encoding: [0x22,0xa0,0xcf,0x4c]
+; CHECK: ld1.16b	{ v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x60,0xcf,0x4c]
+; CHECK: ld1.16b	{ v4, v5, v6, v7 }, [x1], x15 ; encoding: [0x24,0x20,0xcf,0x4c]
+; CHECK: ld1.4h	{ v1 }, [x1], x15       ; encoding: [0x21,0x74,0xcf,0x0c]
+; CHECK: ld1.4h	{ v2, v3 }, [x1], x15   ; encoding: [0x22,0xa4,0xcf,0x0c]
+; CHECK: ld1.4h	{ v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x64,0xcf,0x0c]
+; CHECK: ld1.4h	{ v7, v8, v9, v10 }, [x1], x15 ; encoding: [0x27,0x24,0xcf,0x0c]
+; CHECK: ld1.8h	{ v1 }, [x1], x15       ; encoding: [0x21,0x74,0xcf,0x4c]
+; CHECK: ld1.8h	{ v2, v3 }, [x1], x15   ; encoding: [0x22,0xa4,0xcf,0x4c]
+; CHECK: ld1.8h	{ v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x64,0xcf,0x4c]
+; CHECK: ld1.8h	{ v7, v8, v9, v10 }, [x1], x15 ; encoding: [0x27,0x24,0xcf,0x4c]
+; CHECK: ld1.2s	{ v1 }, [x1], x15       ; encoding: [0x21,0x78,0xcf,0x0c]
+; CHECK: ld1.2s	{ v2, v3 }, [x1], x15   ; encoding: [0x22,0xa8,0xcf,0x0c]
+; CHECK: ld1.2s	{ v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x68,0xcf,0x0c]
+; CHECK: ld1.2s	{ v7, v8, v9, v10 }, [x1], x15 ; encoding: [0x27,0x28,0xcf,0x0c]
+; CHECK: ld1.4s	{ v1 }, [x1], x15       ; encoding: [0x21,0x78,0xcf,0x4c]
+; CHECK: ld1.4s	{ v2, v3 }, [x1], x15   ; encoding: [0x22,0xa8,0xcf,0x4c]
+; CHECK: ld1.4s	{ v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x68,0xcf,0x4c]
+; CHECK: ld1.4s	{ v7, v8, v9, v10 }, [x1], x15 ; encoding: [0x27,0x28,0xcf,0x4c]
+; CHECK: ld1.1d	{ v1 }, [x1], x15       ; encoding: [0x21,0x7c,0xcf,0x0c]
+; CHECK: ld1.1d	{ v2, v3 }, [x1], x15   ; encoding: [0x22,0xac,0xcf,0x0c]
+; CHECK: ld1.1d	{ v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x6c,0xcf,0x0c]
+; CHECK: ld1.1d	{ v7, v8, v9, v10 }, [x1], x15 ; encoding: [0x27,0x2c,0xcf,0x0c]
+; CHECK: ld1.2d	{ v1 }, [x1], x15       ; encoding: [0x21,0x7c,0xcf,0x4c]
+; CHECK: ld1.2d	{ v2, v3 }, [x1], x15   ; encoding: [0x22,0xac,0xcf,0x4c]
+; CHECK: ld1.2d	{ v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x6c,0xcf,0x4c]
+; CHECK: ld1.2d	{ v7, v8, v9, v10 }, [x1], x15 ; encoding: [0x27,0x2c,0xcf,0x4c]
+; CHECK: st1.8b	{ v1 }, [x1], x15       ; encoding: [0x21,0x70,0x8f,0x0c]
+; CHECK: st1.8b	{ v2, v3 }, [x1], x15   ; encoding: [0x22,0xa0,0x8f,0x0c]
+; CHECK: st1.8b	{ v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x60,0x8f,0x0c]
+; CHECK: st1.8b	{ v4, v5, v6, v7 }, [x1], x15 ; encoding: [0x24,0x20,0x8f,0x0c]
+; CHECK: st1.16b	{ v1 }, [x1], x15       ; encoding: [0x21,0x70,0x8f,0x4c]
+; CHECK: st1.16b	{ v2, v3 }, [x1], x15   ; encoding: [0x22,0xa0,0x8f,0x4c]
+; CHECK: st1.16b	{ v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x60,0x8f,0x4c]
+; CHECK: st1.16b	{ v4, v5, v6, v7 }, [x1], x15 ; encoding: [0x24,0x20,0x8f,0x4c]
+; CHECK: st1.4h	{ v1 }, [x1], x15       ; encoding: [0x21,0x74,0x8f,0x0c]
+; CHECK: st1.4h	{ v2, v3 }, [x1], x15   ; encoding: [0x22,0xa4,0x8f,0x0c]
+; CHECK: st1.4h	{ v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x64,0x8f,0x0c]
+; CHECK: st1.4h	{ v7, v8, v9, v10 }, [x1], x15 ; encoding: [0x27,0x24,0x8f,0x0c]
+; CHECK: st1.8h	{ v1 }, [x1], x15       ; encoding: [0x21,0x74,0x8f,0x4c]
+; CHECK: st1.8h	{ v2, v3 }, [x1], x15   ; encoding: [0x22,0xa4,0x8f,0x4c]
+; CHECK: st1.8h	{ v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x64,0x8f,0x4c]
+; CHECK: st1.8h	{ v7, v8, v9, v10 }, [x1], x15 ; encoding: [0x27,0x24,0x8f,0x4c]
+; CHECK: st1.2s	{ v1 }, [x1], x15       ; encoding: [0x21,0x78,0x8f,0x0c]
+; CHECK: st1.2s	{ v2, v3 }, [x1], x15   ; encoding: [0x22,0xa8,0x8f,0x0c]
+; CHECK: st1.2s	{ v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x68,0x8f,0x0c]
+; CHECK: st1.2s	{ v7, v8, v9, v10 }, [x1], x15 ; encoding: [0x27,0x28,0x8f,0x0c]
+; CHECK: st1.4s	{ v1 }, [x1], x15       ; encoding: [0x21,0x78,0x8f,0x4c]
+; CHECK: st1.4s	{ v2, v3 }, [x1], x15   ; encoding: [0x22,0xa8,0x8f,0x4c]
+; CHECK: st1.4s	{ v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x68,0x8f,0x4c]
+; CHECK: st1.4s	{ v7, v8, v9, v10 }, [x1], x15 ; encoding: [0x27,0x28,0x8f,0x4c]
+; CHECK: st1.1d	{ v1 }, [x1], x15       ; encoding: [0x21,0x7c,0x8f,0x0c]
+; CHECK: st1.1d	{ v2, v3 }, [x1], x15   ; encoding: [0x22,0xac,0x8f,0x0c]
+; CHECK: st1.1d	{ v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x6c,0x8f,0x0c]
+; CHECK: st1.1d	{ v7, v8, v9, v10 }, [x1], x15 ; encoding: [0x27,0x2c,0x8f,0x0c]
+; CHECK: st1.2d	{ v1 }, [x1], x15       ; encoding: [0x21,0x7c,0x8f,0x4c]
+; CHECK: st1.2d	{ v2, v3 }, [x1], x15   ; encoding: [0x22,0xac,0x8f,0x4c]
+; CHECK: st1.2d	{ v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x6c,0x8f,0x4c]
+; CHECK: st1.2d	{ v7, v8, v9, v10 }, [x1], x15 ; encoding: [0x27,0x2c,0x8f,0x4c]
+; CHECK: ld1.8b	{ v1 }, [x1], #8       ; encoding: [0x21,0x70,0xdf,0x0c]
+; CHECK: ld1.8b	{ v2, v3 }, [x1], #16   ; encoding: [0x22,0xa0,0xdf,0x0c]
+; CHECK: ld1.8b	{ v3, v4, v5 }, [x1], #24 ; encoding: [0x23,0x60,0xdf,0x0c]
+; CHECK: ld1.8b	{ v4, v5, v6, v7 }, [x1], #32 ; encoding: [0x24,0x20,0xdf,0x0c]
+; CHECK: ld1.16b	{ v1 }, [x1], #16       ; encoding: [0x21,0x70,0xdf,0x4c]
+; CHECK: ld1.16b	{ v2, v3 }, [x1], #32   ; encoding: [0x22,0xa0,0xdf,0x4c]
+; CHECK: ld1.16b	{ v3, v4, v5 }, [x1], #48 ; encoding: [0x23,0x60,0xdf,0x4c]
+; CHECK: ld1.16b	{ v4, v5, v6, v7 }, [x1], #64 ; encoding: [0x24,0x20,0xdf,0x4c]
+; CHECK: ld1.4h	{ v1 }, [x1], #8       ; encoding: [0x21,0x74,0xdf,0x0c]
+; CHECK: ld1.4h	{ v2, v3 }, [x1], #16   ; encoding: [0x22,0xa4,0xdf,0x0c]
+; CHECK: ld1.4h	{ v3, v4, v5 }, [x1], #24 ; encoding: [0x23,0x64,0xdf,0x0c]
+; CHECK: ld1.4h	{ v7, v8, v9, v10 }, [x1], #32 ; encoding: [0x27,0x24,0xdf,0x0c]
+; CHECK: ld1.8h	{ v1 }, [x1], #16       ; encoding: [0x21,0x74,0xdf,0x4c]
+; CHECK: ld1.8h	{ v2, v3 }, [x1], #32   ; encoding: [0x22,0xa4,0xdf,0x4c]
+; CHECK: ld1.8h	{ v3, v4, v5 }, [x1], #48 ; encoding: [0x23,0x64,0xdf,0x4c]
+; CHECK: ld1.8h	{ v7, v8, v9, v10 }, [x1], #64 ; encoding: [0x27,0x24,0xdf,0x4c]
+; CHECK: ld1.2s	{ v1 }, [x1], #8       ; encoding: [0x21,0x78,0xdf,0x0c]
+; CHECK: ld1.2s	{ v2, v3 }, [x1], #16   ; encoding: [0x22,0xa8,0xdf,0x0c]
+; CHECK: ld1.2s	{ v3, v4, v5 }, [x1], #24 ; encoding: [0x23,0x68,0xdf,0x0c]
+; CHECK: ld1.2s	{ v7, v8, v9, v10 }, [x1], #32 ; encoding: [0x27,0x28,0xdf,0x0c]
+; CHECK: ld1.4s	{ v1 }, [x1], #16       ; encoding: [0x21,0x78,0xdf,0x4c]
+; CHECK: ld1.4s	{ v2, v3 }, [x1], #32   ; encoding: [0x22,0xa8,0xdf,0x4c]
+; CHECK: ld1.4s	{ v3, v4, v5 }, [x1], #48 ; encoding: [0x23,0x68,0xdf,0x4c]
+; CHECK: ld1.4s	{ v7, v8, v9, v10 }, [x1], #64 ; encoding: [0x27,0x28,0xdf,0x4c]
+; CHECK: ld1.1d	{ v1 }, [x1], #8       ; encoding: [0x21,0x7c,0xdf,0x0c]
+; CHECK: ld1.1d	{ v2, v3 }, [x1], #16   ; encoding: [0x22,0xac,0xdf,0x0c]
+; CHECK: ld1.1d	{ v3, v4, v5 }, [x1], #24 ; encoding: [0x23,0x6c,0xdf,0x0c]
+; CHECK: ld1.1d	{ v7, v8, v9, v10 }, [x1], #32 ; encoding: [0x27,0x2c,0xdf,0x0c]
+; CHECK: ld1.2d	{ v1 }, [x1], #16       ; encoding: [0x21,0x7c,0xdf,0x4c]
+; CHECK: ld1.2d	{ v2, v3 }, [x1], #32   ; encoding: [0x22,0xac,0xdf,0x4c]
+; CHECK: ld1.2d	{ v3, v4, v5 }, [x1], #48 ; encoding: [0x23,0x6c,0xdf,0x4c]
+; CHECK: ld1.2d	{ v7, v8, v9, v10 }, [x1], #64 ; encoding: [0x27,0x2c,0xdf,0x4c]
+; CHECK: st1.8b	{ v1 }, [x1], #8       ; encoding: [0x21,0x70,0x9f,0x0c]
+; CHECK: st1.8b	{ v2, v3 }, [x1], #16   ; encoding: [0x22,0xa0,0x9f,0x0c]
+; CHECK: st1.8b	{ v3, v4, v5 }, [x1], #24 ; encoding: [0x23,0x60,0x9f,0x0c]
+; CHECK: st1.8b	{ v4, v5, v6, v7 }, [x1], #32 ; encoding: [0x24,0x20,0x9f,0x0c]
+; CHECK: st1.16b	{ v1 }, [x1], #16       ; encoding: [0x21,0x70,0x9f,0x4c]
+; CHECK: st1.16b	{ v2, v3 }, [x1], #32   ; encoding: [0x22,0xa0,0x9f,0x4c]
+; CHECK: st1.16b	{ v3, v4, v5 }, [x1], #48 ; encoding: [0x23,0x60,0x9f,0x4c]
+; CHECK: st1.16b	{ v4, v5, v6, v7 }, [x1], #64 ; encoding: [0x24,0x20,0x9f,0x4c]
+; CHECK: st1.4h	{ v1 }, [x1], #8       ; encoding: [0x21,0x74,0x9f,0x0c]
+; CHECK: st1.4h	{ v2, v3 }, [x1], #16   ; encoding: [0x22,0xa4,0x9f,0x0c]
+; CHECK: st1.4h	{ v3, v4, v5 }, [x1], #24 ; encoding: [0x23,0x64,0x9f,0x0c]
+; CHECK: st1.4h	{ v7, v8, v9, v10 }, [x1], #32 ; encoding: [0x27,0x24,0x9f,0x0c]
+; CHECK: st1.8h	{ v1 }, [x1], #16       ; encoding: [0x21,0x74,0x9f,0x4c]
+; CHECK: st1.8h	{ v2, v3 }, [x1], #32   ; encoding: [0x22,0xa4,0x9f,0x4c]
+; CHECK: st1.8h	{ v3, v4, v5 }, [x1], #48 ; encoding: [0x23,0x64,0x9f,0x4c]
+; CHECK: st1.8h	{ v7, v8, v9, v10 }, [x1], #64 ; encoding: [0x27,0x24,0x9f,0x4c]
+; CHECK: st1.2s	{ v1 }, [x1], #8       ; encoding: [0x21,0x78,0x9f,0x0c]
+; CHECK: st1.2s	{ v2, v3 }, [x1], #16   ; encoding: [0x22,0xa8,0x9f,0x0c]
+; CHECK: st1.2s	{ v3, v4, v5 }, [x1], #24 ; encoding: [0x23,0x68,0x9f,0x0c]
+; CHECK: st1.2s	{ v7, v8, v9, v10 }, [x1], #32 ; encoding: [0x27,0x28,0x9f,0x0c]
+; CHECK: st1.4s	{ v1 }, [x1], #16       ; encoding: [0x21,0x78,0x9f,0x4c]
+; CHECK: st1.4s	{ v2, v3 }, [x1], #32   ; encoding: [0x22,0xa8,0x9f,0x4c]
+; CHECK: st1.4s	{ v3, v4, v5 }, [x1], #48 ; encoding: [0x23,0x68,0x9f,0x4c]
+; CHECK: st1.4s	{ v7, v8, v9, v10 }, [x1], #64 ; encoding: [0x27,0x28,0x9f,0x4c]
+; CHECK: st1.1d	{ v1 }, [x1], #8       ; encoding: [0x21,0x7c,0x9f,0x0c]
+; CHECK: st1.1d	{ v2, v3 }, [x1], #16   ; encoding: [0x22,0xac,0x9f,0x0c]
+; CHECK: st1.1d	{ v3, v4, v5 }, [x1], #24 ; encoding: [0x23,0x6c,0x9f,0x0c]
+; CHECK: st1.1d	{ v7, v8, v9, v10 }, [x1], #32 ; encoding: [0x27,0x2c,0x9f,0x0c]
+; CHECK: st1.2d	{ v1 }, [x1], #16       ; encoding: [0x21,0x7c,0x9f,0x4c]
+; CHECK: st1.2d	{ v2, v3 }, [x1], #32   ; encoding: [0x22,0xac,0x9f,0x4c]
+; CHECK: st1.2d	{ v3, v4, v5 }, [x1], #48 ; encoding: [0x23,0x6c,0x9f,0x4c]
+; CHECK: st1.2d	{ v7, v8, v9, v10 }, [x1], #64 ; encoding: [0x27,0x2c,0x9f,0x4c]
+; CHECK: ld2.8b	{ v2, v3 }, [x1], x15   ; encoding: [0x22,0x80,0xcf,0x0c]
+; CHECK: ld2.16b	{ v2, v3 }, [x1], x15   ; encoding: [0x22,0x80,0xcf,0x4c]
+; CHECK: ld2.4h	{ v2, v3 }, [x1], x15   ; encoding: [0x22,0x84,0xcf,0x0c]
+; CHECK: ld2.8h	{ v2, v3 }, [x1], x15   ; encoding: [0x22,0x84,0xcf,0x4c]
+; CHECK: ld2.2s	{ v2, v3 }, [x1], x15   ; encoding: [0x22,0x88,0xcf,0x0c]
+; CHECK: ld2.4s	{ v2, v3 }, [x1], x15   ; encoding: [0x22,0x88,0xcf,0x4c]
+; CHECK: ld2.2d	{ v2, v3 }, [x1], x15   ; encoding: [0x22,0x8c,0xcf,0x4c]
+; CHECK: st2.8b	{ v2, v3 }, [x1], x15   ; encoding: [0x22,0x80,0x8f,0x0c]
+; CHECK: st2.16b	{ v2, v3 }, [x1], x15   ; encoding: [0x22,0x80,0x8f,0x4c]
+; CHECK: st2.4h	{ v2, v3 }, [x1], x15   ; encoding: [0x22,0x84,0x8f,0x0c]
+; CHECK: st2.8h	{ v2, v3 }, [x1], x15   ; encoding: [0x22,0x84,0x8f,0x4c]
+; CHECK: st2.2s	{ v2, v3 }, [x1], x15   ; encoding: [0x22,0x88,0x8f,0x0c]
+; CHECK: st2.4s	{ v2, v3 }, [x1], x15   ; encoding: [0x22,0x88,0x8f,0x4c]
+; CHECK: st2.2d	{ v2, v3 }, [x1], x15   ; encoding: [0x22,0x8c,0x8f,0x4c]
+; CHECK: ld2.8b	{ v2, v3 }, [x1], #16   ; encoding: [0x22,0x80,0xdf,0x0c]
+; CHECK: ld2.16b	{ v2, v3 }, [x1], #32   ; encoding: [0x22,0x80,0xdf,0x4c]
+; CHECK: ld2.4h	{ v2, v3 }, [x1], #16   ; encoding: [0x22,0x84,0xdf,0x0c]
+; CHECK: ld2.8h	{ v2, v3 }, [x1], #32   ; encoding: [0x22,0x84,0xdf,0x4c]
+; CHECK: ld2.2s	{ v2, v3 }, [x1], #16   ; encoding: [0x22,0x88,0xdf,0x0c]
+; CHECK: ld2.4s	{ v2, v3 }, [x1], #32   ; encoding: [0x22,0x88,0xdf,0x4c]
+; CHECK: ld2.2d	{ v2, v3 }, [x1], #32	; encoding: [0x22,0x8c,0xdf,0x4c]
+; CHECK: st2.8b	{ v2, v3 }, [x1], #16   ; encoding: [0x22,0x80,0x9f,0x0c]
+; CHECK: st2.16b	{ v2, v3 }, [x1], #32   ; encoding: [0x22,0x80,0x9f,0x4c]
+; CHECK: st2.4h	{ v2, v3 }, [x1], #16   ; encoding: [0x22,0x84,0x9f,0x0c]
+; CHECK: st2.8h	{ v2, v3 }, [x1], #32   ; encoding: [0x22,0x84,0x9f,0x4c]
+; CHECK: st2.2s	{ v2, v3 }, [x1], #16   ; encoding: [0x22,0x88,0x9f,0x0c]
+; CHECK: st2.4s	{ v2, v3 }, [x1], #32   ; encoding: [0x22,0x88,0x9f,0x4c]
+; CHECK: st2.2d	{ v2, v3 }, [x1], #32   ; encoding: [0x22,0x8c,0x9f,0x4c]
+; CHECK: ld3.8b	{ v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x40,0xcf,0x0c]
+; CHECK: ld3.16b	{ v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x40,0xcf,0x4c]
+; CHECK: ld3.4h	{ v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x44,0xcf,0x0c]
+; CHECK: ld3.8h	{ v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x44,0xcf,0x4c]
+; CHECK: ld3.2s	{ v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x48,0xcf,0x0c]
+; CHECK: ld3.4s	{ v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x48,0xcf,0x4c]
+; CHECK: ld3.2d	{ v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x4c,0xcf,0x4c]
+; CHECK: st3.8b	{ v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x40,0x8f,0x0c]
+; CHECK: st3.16b	{ v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x40,0x8f,0x4c]
+; CHECK: st3.4h	{ v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x44,0x8f,0x0c]
+; CHECK: st3.8h	{ v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x44,0x8f,0x4c]
+; CHECK: st3.2s	{ v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x48,0x8f,0x0c]
+; CHECK: st3.4s	{ v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x48,0x8f,0x4c]
+; CHECK: st3.2d	{ v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x4c,0x8f,0x4c]
+; CHECK: ld3.8b	{ v3, v4, v5 }, [x1], #24 ; encoding: [0x23,0x40,0xdf,0x0c]
+; CHECK: ld3.16b	{ v3, v4, v5 }, [x1], #48 ; encoding: [0x23,0x40,0xdf,0x4c]
+; CHECK: ld3.4h	{ v3, v4, v5 }, [x1], #24 ; encoding: [0x23,0x44,0xdf,0x0c]
+; CHECK: ld3.8h	{ v3, v4, v5 }, [x1], #48 ; encoding: [0x23,0x44,0xdf,0x4c]
+; CHECK: ld3.2s	{ v3, v4, v5 }, [x1], #24 ; encoding: [0x23,0x48,0xdf,0x0c]
+; CHECK: ld3.4s	{ v3, v4, v5 }, [x1], #48 ; encoding: [0x23,0x48,0xdf,0x4c]
+; CHECK: ld3.2d	{ v3, v4, v5 }, [x1], #48 ; encoding: [0x23,0x4c,0xdf,0x4c]
+; CHECK: st3.8b	{ v3, v4, v5 }, [x1], #24 ; encoding: [0x23,0x40,0x9f,0x0c]
+; CHECK: st3.16b	{ v3, v4, v5 }, [x1], #48 ; encoding: [0x23,0x40,0x9f,0x4c]
+; CHECK: st3.4h	{ v3, v4, v5 }, [x1], #24 ; encoding: [0x23,0x44,0x9f,0x0c]
+; CHECK: st3.8h	{ v3, v4, v5 }, [x1], #48 ; encoding: [0x23,0x44,0x9f,0x4c]
+; CHECK: st3.2s	{ v3, v4, v5 }, [x1], #24 ; encoding: [0x23,0x48,0x9f,0x0c]
+; CHECK: st3.4s	{ v3, v4, v5 }, [x1], #48 ; encoding: [0x23,0x48,0x9f,0x4c]
+; CHECK: st3.2d	{ v3, v4, v5 }, [x1], #48 ; encoding: [0x23,0x4c,0x9f,0x4c]
+; CHECK: ld4.8b	{ v4, v5, v6, v7 }, [x1], x15 ; encoding: [0x24,0x00,0xcf,0x0c]
+; CHECK: ld4.16b	{ v4, v5, v6, v7 }, [x1], x15 ; encoding: [0x24,0x00,0xcf,0x4c]
+; CHECK: ld4.4h	{ v7, v8, v9, v10 }, [x1], x15 ; encoding: [0x27,0x04,0xcf,0x0c]
+; CHECK: ld4.8h	{ v7, v8, v9, v10 }, [x1], x15 ; encoding: [0x27,0x04,0xcf,0x4c]
+; CHECK: ld4.2s	{ v7, v8, v9, v10 }, [x1], x15 ; encoding: [0x27,0x08,0xcf,0x0c]
+; CHECK: ld4.4s	{ v7, v8, v9, v10 }, [x1], x15 ; encoding: [0x27,0x08,0xcf,0x4c]
+; CHECK: ld4.2d	{ v7, v8, v9, v10 }, [x1], x15 ; encoding: [0x27,0x0c,0xcf,0x4c]
+; CHECK: st4.8b	{ v4, v5, v6, v7 }, [x1], x15 ; encoding: [0x24,0x00,0x8f,0x0c]
+; CHECK: st4.16b	{ v4, v5, v6, v7 }, [x1], x15 ; encoding: [0x24,0x00,0x8f,0x4c]
+; CHECK: st4.4h	{ v7, v8, v9, v10 }, [x1], x15 ; encoding: [0x27,0x04,0x8f,0x0c]
+; CHECK: st4.8h	{ v7, v8, v9, v10 }, [x1], x15 ; encoding: [0x27,0x04,0x8f,0x4c]
+; CHECK: st4.2s	{ v7, v8, v9, v10 }, [x1], x15 ; encoding: [0x27,0x08,0x8f,0x0c]
+; CHECK: st4.4s	{ v7, v8, v9, v10 }, [x1], x15 ; encoding: [0x27,0x08,0x8f,0x4c]
+; CHECK: st4.2d	{ v7, v8, v9, v10 }, [x1], x15 ; encoding: [0x27,0x0c,0x8f,0x4c]
+; CHECK: ld4.8b	{ v4, v5, v6, v7 }, [x1], #32 ; encoding: [0x24,0x00,0xdf,0x0c]
+; CHECK: ld4.16b	{ v4, v5, v6, v7 }, [x1], #64 ; encoding: [0x24,0x00,0xdf,0x4c]
+; CHECK: ld4.4h	{ v7, v8, v9, v10 }, [x1], #32 ; encoding: [0x27,0x04,0xdf,0x0c]
+; CHECK: ld4.8h	{ v7, v8, v9, v10 }, [x1], #64 ; encoding: [0x27,0x04,0xdf,0x4c]
+; CHECK: ld4.2s	{ v7, v8, v9, v10 }, [x1], #32 ; encoding: [0x27,0x08,0xdf,0x0c]
+; CHECK: ld4.4s	{ v7, v8, v9, v10 }, [x1], #64 ; encoding: [0x27,0x08,0xdf,0x4c]
+; CHECK: ld4.2d	{ v7, v8, v9, v10 }, [x1], #64 ; encoding: [0x27,0x0c,0xdf,0x4c]
+; CHECK: st4.8b	{ v4, v5, v6, v7 }, [x1], #32 ; encoding: [0x24,0x00,0x9f,0x0c]
+; CHECK: st4.16b	{ v4, v5, v6, v7 }, [x1], #64 ; encoding: [0x24,0x00,0x9f,0x4c]
+; CHECK: st4.4h	{ v7, v8, v9, v10 }, [x1], #32 ; encoding: [0x27,0x04,0x9f,0x0c]
+; CHECK: st4.8h	{ v7, v8, v9, v10 }, [x1], #64 ; encoding: [0x27,0x04,0x9f,0x4c]
+; CHECK: st4.2s	{ v7, v8, v9, v10 }, [x1], #32 ; encoding: [0x27,0x08,0x9f,0x0c]
+; CHECK: st4.4s	{ v7, v8, v9, v10 }, [x1], #64 ; encoding: [0x27,0x08,0x9f,0x4c]
+; CHECK: st4.2d	{ v7, v8, v9, v10 }, [x1], #64 ; encoding: [0x27,0x0c,0x9f,0x4c]
+; CHECK: ld1r.8b	{ v12 }, [x2]           ; encoding: [0x4c,0xc0,0x40,0x0d]
+; CHECK: ld1r.8b	{ v12 }, [x2], x3       ; encoding: [0x4c,0xc0,0xc3,0x0d]
+; CHECK: ld1r.16b	{ v12 }, [x2]   ; encoding: [0x4c,0xc0,0x40,0x4d]
+; CHECK: ld1r.16b	{ v12 }, [x2], x3 ; encoding: [0x4c,0xc0,0xc3,0x4d]
+; CHECK: ld1r.4h	{ v12 }, [x2]           ; encoding: [0x4c,0xc4,0x40,0x0d]
+; CHECK: ld1r.4h	{ v12 }, [x2], x3       ; encoding: [0x4c,0xc4,0xc3,0x0d]
+; CHECK: ld1r.8h	{ v12 }, [x2]           ; encoding: [0x4c,0xc4,0x40,0x4d]
+; CHECK: ld1r.8h	{ v12 }, [x2], x3       ; encoding: [0x4c,0xc4,0xc3,0x4d]
+; CHECK: ld1r.2s	{ v12 }, [x2]           ; encoding: [0x4c,0xc8,0x40,0x0d]
+; CHECK: ld1r.2s	{ v12 }, [x2], x3       ; encoding: [0x4c,0xc8,0xc3,0x0d]
+; CHECK: ld1r.4s	{ v12 }, [x2]           ; encoding: [0x4c,0xc8,0x40,0x4d]
+; CHECK: ld1r.4s	{ v12 }, [x2], x3       ; encoding: [0x4c,0xc8,0xc3,0x4d]
+; CHECK: ld1r.1d	{ v12 }, [x2]           ; encoding: [0x4c,0xcc,0x40,0x0d]
+; CHECK: ld1r.1d	{ v12 }, [x2], x3       ; encoding: [0x4c,0xcc,0xc3,0x0d]
+; CHECK: ld1r.2d	{ v12 }, [x2]           ; encoding: [0x4c,0xcc,0x40,0x4d]
+; CHECK: ld1r.2d	{ v12 }, [x2], x3       ; encoding: [0x4c,0xcc,0xc3,0x4d]
+; CHECK: ld1r.8b	{ v12 }, [x2], #1      ; encoding: [0x4c,0xc0,0xdf,0x0d]
+; CHECK: ld1r.16b	{ v12 }, [x2], #1 ; encoding: [0x4c,0xc0,0xdf,0x4d]
+; CHECK: ld1r.4h	{ v12 }, [x2], #2      ; encoding: [0x4c,0xc4,0xdf,0x0d]
+; CHECK: ld1r.8h	{ v12 }, [x2], #2      ; encoding: [0x4c,0xc4,0xdf,0x4d]
+; CHECK: ld1r.2s	{ v12 }, [x2], #4      ; encoding: [0x4c,0xc8,0xdf,0x0d]
+; CHECK: ld1r.4s	{ v12 }, [x2], #4      ; encoding: [0x4c,0xc8,0xdf,0x4d]
+; CHECK: ld1r.1d	{ v12 }, [x2], #8      ; encoding: [0x4c,0xcc,0xdf,0x0d]
+; CHECK: ld1r.2d	{ v12 }, [x2], #8      ; encoding: [0x4c,0xcc,0xdf,0x4d]
+; CHECK: ld2r.8b	{ v3, v4 }, [x2]        ; encoding: [0x43,0xc0,0x60,0x0d]
+; CHECK: ld2r.8b	{ v3, v4 }, [x2], x3    ; encoding: [0x43,0xc0,0xe3,0x0d]
+; CHECK: ld2r.16b	{ v3, v4 }, [x2] ; encoding: [0x43,0xc0,0x60,0x4d]
+; CHECK: ld2r.16b	{ v3, v4 }, [x2], x3 ; encoding: [0x43,0xc0,0xe3,0x4d]
+; CHECK: ld2r.4h	{ v3, v4 }, [x2]        ; encoding: [0x43,0xc4,0x60,0x0d]
+; CHECK: ld2r.4h	{ v3, v4 }, [x2], x3    ; encoding: [0x43,0xc4,0xe3,0x0d]
+; CHECK: ld2r.8h	{ v3, v4 }, [x2]        ; encoding: [0x43,0xc4,0x60,0x4d]
+; CHECK: ld2r.8h	{ v3, v4 }, [x2], x3    ; encoding: [0x43,0xc4,0xe3,0x4d]
+; CHECK: ld2r.2s	{ v3, v4 }, [x2]        ; encoding: [0x43,0xc8,0x60,0x0d]
+; CHECK: ld2r.2s	{ v3, v4 }, [x2], x3    ; encoding: [0x43,0xc8,0xe3,0x0d]
+; CHECK: ld2r.4s	{ v3, v4 }, [x2]        ; encoding: [0x43,0xc8,0x60,0x4d]
+; CHECK: ld2r.4s	{ v3, v4 }, [x2], x3    ; encoding: [0x43,0xc8,0xe3,0x4d]
+; CHECK: ld2r.1d	{ v3, v4 }, [x2]        ; encoding: [0x43,0xcc,0x60,0x0d]
+; CHECK: ld2r.1d	{ v3, v4 }, [x2], x3    ; encoding: [0x43,0xcc,0xe3,0x0d]
+; CHECK: ld2r.2d	{ v3, v4 }, [x2]        ; encoding: [0x43,0xcc,0x60,0x4d]
+; CHECK: ld2r.2d	{ v3, v4 }, [x2], x3    ; encoding: [0x43,0xcc,0xe3,0x4d]
+; CHECK: ld2r.8b	{ v3, v4 }, [x2], #2   ; encoding: [0x43,0xc0,0xff,0x0d]
+; CHECK: ld2r.16b	{ v3, v4 }, [x2], #2 ; encoding: [0x43,0xc0,0xff,0x4d]
+; CHECK: ld2r.4h	{ v3, v4 }, [x2], #4   ; encoding: [0x43,0xc4,0xff,0x0d]
+; CHECK: ld2r.8h	{ v3, v4 }, [x2], #4   ; encoding: [0x43,0xc4,0xff,0x4d]
+; CHECK: ld2r.2s	{ v3, v4 }, [x2], #8   ; encoding: [0x43,0xc8,0xff,0x0d]
+; CHECK: ld2r.4s	{ v3, v4 }, [x2], #8   ; encoding: [0x43,0xc8,0xff,0x4d]
+; CHECK: ld2r.1d	{ v3, v4 }, [x2], #16   ; encoding: [0x43,0xcc,0xff,0x0d]
+; CHECK: ld2r.2d	{ v3, v4 }, [x2], #16   ; encoding: [0x43,0xcc,0xff,0x4d]
+; CHECK: ld3r.8b	{ v2, v3, v4 }, [x2]    ; encoding: [0x42,0xe0,0x40,0x0d]
+; CHECK: ld3r.8b	{ v2, v3, v4 }, [x2], x3 ; encoding: [0x42,0xe0,0xc3,0x0d]
+; CHECK: ld3r.16b	{ v2, v3, v4 }, [x2] ; encoding: [0x42,0xe0,0x40,0x4d]
+; CHECK: ld3r.16b	{ v2, v3, v4 }, [x2], x3 ; encoding: [0x42,0xe0,0xc3,0x4d]
+; CHECK: ld3r.4h	{ v2, v3, v4 }, [x2]    ; encoding: [0x42,0xe4,0x40,0x0d]
+; CHECK: ld3r.4h	{ v2, v3, v4 }, [x2], x3 ; encoding: [0x42,0xe4,0xc3,0x0d]
+; CHECK: ld3r.8h	{ v2, v3, v4 }, [x2]    ; encoding: [0x42,0xe4,0x40,0x4d]
+; CHECK: ld3r.8h	{ v2, v3, v4 }, [x2], x3 ; encoding: [0x42,0xe4,0xc3,0x4d]
+; CHECK: ld3r.2s	{ v2, v3, v4 }, [x2]    ; encoding: [0x42,0xe8,0x40,0x0d]
+; CHECK: ld3r.2s	{ v2, v3, v4 }, [x2], x3 ; encoding: [0x42,0xe8,0xc3,0x0d]
+; CHECK: ld3r.4s	{ v2, v3, v4 }, [x2]    ; encoding: [0x42,0xe8,0x40,0x4d]
+; CHECK: ld3r.4s	{ v2, v3, v4 }, [x2], x3 ; encoding: [0x42,0xe8,0xc3,0x4d]
+; CHECK: ld3r.1d	{ v2, v3, v4 }, [x2]    ; encoding: [0x42,0xec,0x40,0x0d]
+; CHECK: ld3r.1d	{ v2, v3, v4 }, [x2], x3 ; encoding: [0x42,0xec,0xc3,0x0d]
+; CHECK: ld3r.2d	{ v2, v3, v4 }, [x2]    ; encoding: [0x42,0xec,0x40,0x4d]
+; CHECK: ld3r.2d	{ v2, v3, v4 }, [x2], x3 ; encoding: [0x42,0xec,0xc3,0x4d]
+; CHECK: ld3r.8b	{ v2, v3, v4 }, [x2], #3 ; encoding: [0x42,0xe0,0xdf,0x0d]
+; CHECK: ld3r.16b	{ v2, v3, v4 }, [x2], #3 ; encoding: [0x42,0xe0,0xdf,0x4d]
+; CHECK: ld3r.4h	{ v2, v3, v4 }, [x2], #6 ; encoding: [0x42,0xe4,0xdf,0x0d]
+; CHECK: ld3r.8h	{ v2, v3, v4 }, [x2], #6 ; encoding: [0x42,0xe4,0xdf,0x4d]
+; CHECK: ld3r.2s	{ v2, v3, v4 }, [x2], #12 ; encoding: [0x42,0xe8,0xdf,0x0d]
+; CHECK: ld3r.4s	{ v2, v3, v4 }, [x2], #12 ; encoding: [0x42,0xe8,0xdf,0x4d]
+; CHECK: ld3r.1d	{ v2, v3, v4 }, [x2], #24 ; encoding: [0x42,0xec,0xdf,0x0d]
+; CHECK: ld3r.2d	{ v2, v3, v4 }, [x2], #24 ; encoding: [0x42,0xec,0xdf,0x4d]
+; CHECK: ld4r.8b	{ v2, v3, v4, v5 }, [x2] ; encoding: [0x42,0xe0,0x60,0x0d]
+; CHECK: ld4r.8b	{ v2, v3, v4, v5 }, [x2], x3 ; encoding: [0x42,0xe0,0xe3,0x0d]
+; CHECK: ld4r.16b	{ v2, v3, v4, v5 }, [x2] ; encoding: [0x42,0xe0,0x60,0x4d]
+; CHECK: ld4r.16b	{ v2, v3, v4, v5 }, [x2], x3 ; encoding: [0x42,0xe0,0xe3,0x4d]
+; CHECK: ld4r.4h	{ v2, v3, v4, v5 }, [x2] ; encoding: [0x42,0xe4,0x60,0x0d]
+; CHECK: ld4r.4h	{ v2, v3, v4, v5 }, [x2], x3 ; encoding: [0x42,0xe4,0xe3,0x0d]
+; CHECK: ld4r.8h	{ v2, v3, v4, v5 }, [x2] ; encoding: [0x42,0xe4,0x60,0x4d]
+; CHECK: ld4r.8h	{ v2, v3, v4, v5 }, [x2], x3 ; encoding: [0x42,0xe4,0xe3,0x4d]
+; CHECK: ld4r.2s	{ v2, v3, v4, v5 }, [x2] ; encoding: [0x42,0xe8,0x60,0x0d]
+; CHECK: ld4r.2s	{ v2, v3, v4, v5 }, [x2], x3 ; encoding: [0x42,0xe8,0xe3,0x0d]
+; CHECK: ld4r.4s	{ v2, v3, v4, v5 }, [x2] ; encoding: [0x42,0xe8,0x60,0x4d]
+; CHECK: ld4r.4s	{ v2, v3, v4, v5 }, [x2], x3 ; encoding: [0x42,0xe8,0xe3,0x4d]
+; CHECK: ld4r.1d	{ v2, v3, v4, v5 }, [x2] ; encoding: [0x42,0xec,0x60,0x0d]
+; CHECK: ld4r.1d	{ v2, v3, v4, v5 }, [x2], x3 ; encoding: [0x42,0xec,0xe3,0x0d]
+; CHECK: ld4r.2d	{ v2, v3, v4, v5 }, [x2] ; encoding: [0x42,0xec,0x60,0x4d]
+; CHECK: ld4r.2d	{ v2, v3, v4, v5 }, [x2], x3 ; encoding: [0x42,0xec,0xe3,0x4d]
+; CHECK: ld4r.8b	{ v2, v3, v4, v5 }, [x2], #4 ; encoding: [0x42,0xe0,0xff,0x0d]
+; CHECK: ld4r.16b	{ v2, v3, v4, v5 }, [x2], #4 ; encoding: [0x42,0xe0,0xff,0x4d]
+; CHECK: ld4r.4h	{ v2, v3, v4, v5 }, [x2], #8 ; encoding: [0x42,0xe4,0xff,0x0d]
+; CHECK: ld4r.8h	{ v2, v3, v4, v5 }, [x2], #8 ; encoding: [0x42,0xe4,0xff,0x4d]
+; CHECK: ld4r.2s	{ v2, v3, v4, v5 }, [x2], #16 ; encoding: [0x42,0xe8,0xff,0x0d]
+; CHECK: ld4r.4s	{ v2, v3, v4, v5 }, [x2], #16 ; encoding: [0x42,0xe8,0xff,0x4d]
+; CHECK: ld4r.1d	{ v2, v3, v4, v5 }, [x2], #32 ; encoding: [0x42,0xec,0xff,0x0d]
+; CHECK: ld4r.2d	{ v2, v3, v4, v5 }, [x2], #32 ; encoding: [0x42,0xec,0xff,0x4d]
+; CHECK: ld1.b	{ v6 }[13], [x3]        ; encoding: [0x66,0x14,0x40,0x4d]
+; CHECK: ld1.h	{ v6 }[2], [x3]         ; encoding: [0x66,0x50,0x40,0x0d]
+; CHECK: ld1.s	{ v6 }[2], [x3]         ; encoding: [0x66,0x80,0x40,0x4d]
+; CHECK: ld1.d	{ v6 }[1], [x3]         ; encoding: [0x66,0x84,0x40,0x4d]
+; CHECK: ld1.b	{ v6 }[13], [x3], x5    ; encoding: [0x66,0x14,0xc5,0x4d]
+; CHECK: ld1.h	{ v6 }[2], [x3], x5     ; encoding: [0x66,0x50,0xc5,0x0d]
+; CHECK: ld1.s	{ v6 }[2], [x3], x5     ; encoding: [0x66,0x80,0xc5,0x4d]
+; CHECK: ld1.d	{ v6 }[1], [x3], x5     ; encoding: [0x66,0x84,0xc5,0x4d]
+; CHECK: ld1.b	{ v6 }[13], [x3], #1   ; encoding: [0x66,0x14,0xdf,0x4d]
+; CHECK: ld1.h	{ v6 }[2], [x3], #2    ; encoding: [0x66,0x50,0xdf,0x0d]
+; CHECK: ld1.s	{ v6 }[2], [x3], #4    ; encoding: [0x66,0x80,0xdf,0x4d]
+; CHECK: ld1.d	{ v6 }[1], [x3], #8    ; encoding: [0x66,0x84,0xdf,0x4d]
+; CHECK: ld2.b	{ v5, v6 }[13], [x3]    ; encoding: [0x65,0x14,0x60,0x4d]
+; CHECK: ld2.h	{ v5, v6 }[2], [x3]     ; encoding: [0x65,0x50,0x60,0x0d]
+; CHECK: ld2.s	{ v5, v6 }[2], [x3]     ; encoding: [0x65,0x80,0x60,0x4d]
+; CHECK: ld2.d	{ v5, v6 }[1], [x3]     ; encoding: [0x65,0x84,0x60,0x4d]
+; CHECK: ld2.b	{ v5, v6 }[13], [x3], x5 ; encoding: [0x65,0x14,0xe5,0x4d]
+; CHECK: ld2.h	{ v5, v6 }[2], [x3], x5 ; encoding: [0x65,0x50,0xe5,0x0d]
+; CHECK: ld2.s	{ v5, v6 }[2], [x3], x5 ; encoding: [0x65,0x80,0xe5,0x4d]
+; CHECK: ld2.d	{ v5, v6 }[1], [x3], x5 ; encoding: [0x65,0x84,0xe5,0x4d]
+; CHECK: ld2.b	{ v5, v6 }[13], [x3], #2 ; encoding: [0x65,0x14,0xff,0x4d]
+; CHECK: ld2.h	{ v5, v6 }[2], [x3], #4 ; encoding: [0x65,0x50,0xff,0x0d]
+; CHECK: ld2.s	{ v5, v6 }[2], [x3], #8 ; encoding: [0x65,0x80,0xff,0x4d]
+; CHECK: ld2.d	{ v5, v6 }[1], [x3], #16 ; encoding: [0x65,0x84,0xff,0x4d]
+; CHECK: ld3.b	{ v7, v8, v9 }[13], [x3] ; encoding: [0x67,0x34,0x40,0x4d]
+; CHECK: ld3.h	{ v7, v8, v9 }[2], [x3] ; encoding: [0x67,0x70,0x40,0x0d]
+; CHECK: ld3.s	{ v7, v8, v9 }[2], [x3] ; encoding: [0x67,0xa0,0x40,0x4d]
+; CHECK: ld3.d	{ v7, v8, v9 }[1], [x3] ; encoding: [0x67,0xa4,0x40,0x4d]
+; CHECK: ld3.b	{ v7, v8, v9 }[13], [x3], x5 ; encoding: [0x67,0x34,0xc5,0x4d]
+; CHECK: ld3.h	{ v7, v8, v9 }[2], [x3], x5 ; encoding: [0x67,0x70,0xc5,0x0d]
+; CHECK: ld3.s	{ v7, v8, v9 }[2], [x3], x5 ; encoding: [0x67,0xa0,0xc5,0x4d]
+; CHECK: ld3.d	{ v7, v8, v9 }[1], [x3], x5 ; encoding: [0x67,0xa4,0xc5,0x4d]
+; CHECK: ld3.b	{ v7, v8, v9 }[13], [x3], #3 ; encoding: [0x67,0x34,0xdf,0x4d]
+; CHECK: ld3.h	{ v7, v8, v9 }[2], [x3], #6 ; encoding: [0x67,0x70,0xdf,0x0d]
+; CHECK: ld3.s	{ v7, v8, v9 }[2], [x3], #12 ; encoding: [0x67,0xa0,0xdf,0x4d]
+; CHECK: ld3.d	{ v7, v8, v9 }[1], [x3], #24 ; encoding: [0x67,0xa4,0xdf,0x4d]
+; CHECK: ld4.b	{ v7, v8, v9, v10 }[13], [x3] ; encoding: [0x67,0x34,0x60,0x4d]
+; CHECK: ld4.h	{ v7, v8, v9, v10 }[2], [x3] ; encoding: [0x67,0x70,0x60,0x0d]
+; CHECK: ld4.s	{ v7, v8, v9, v10 }[2], [x3] ; encoding: [0x67,0xa0,0x60,0x4d]
+; CHECK: ld4.d	{ v7, v8, v9, v10 }[1], [x3] ; encoding: [0x67,0xa4,0x60,0x4d]
+; CHECK: ld4.b	{ v7, v8, v9, v10 }[13], [x3], x5 ; encoding: [0x67,0x34,0xe5,0x4d]
+; CHECK: ld4.h	{ v7, v8, v9, v10 }[2], [x3], x5 ; encoding: [0x67,0x70,0xe5,0x0d]
+; CHECK: ld4.s	{ v7, v8, v9, v10 }[2], [x3], x5 ; encoding: [0x67,0xa0,0xe5,0x4d]
+; CHECK: ld4.d	{ v7, v8, v9, v10 }[1], [x3], x5 ; encoding: [0x67,0xa4,0xe5,0x4d]
+; CHECK: ld4.b	{ v7, v8, v9, v10 }[13], [x3], #4 ; encoding: [0x67,0x34,0xff,0x4d]
+; CHECK: ld4.h	{ v7, v8, v9, v10 }[2], [x3], #8 ; encoding: [0x67,0x70,0xff,0x0d]
+; CHECK: ld4.s	{ v7, v8, v9, v10 }[2], [x3], #16 ; encoding: [0x67,0xa0,0xff,0x4d]
+; CHECK: ld4.d	{ v7, v8, v9, v10 }[1], [x3], #32 ; encoding: [0x67,0xa4,0xff,0x4d]
+; CHECK: st1.b	{ v6 }[13], [x3]        ; encoding: [0x66,0x14,0x00,0x4d]
+; CHECK: st1.h	{ v6 }[2], [x3]         ; encoding: [0x66,0x50,0x00,0x0d]
+; CHECK: st1.s	{ v6 }[2], [x3]         ; encoding: [0x66,0x80,0x00,0x4d]
+; CHECK: st1.d	{ v6 }[1], [x3]         ; encoding: [0x66,0x84,0x00,0x4d]
+; CHECK: st1.b	{ v6 }[13], [x3], x5    ; encoding: [0x66,0x14,0x85,0x4d]
+; CHECK: st1.h	{ v6 }[2], [x3], x5     ; encoding: [0x66,0x50,0x85,0x0d]
+; CHECK: st1.s	{ v6 }[2], [x3], x5     ; encoding: [0x66,0x80,0x85,0x4d]
+; CHECK: st1.d	{ v6 }[1], [x3], x5     ; encoding: [0x66,0x84,0x85,0x4d]
+; CHECK: st1.b	{ v6 }[13], [x3], #1   ; encoding: [0x66,0x14,0x9f,0x4d]
+; CHECK: st1.h	{ v6 }[2], [x3], #2    ; encoding: [0x66,0x50,0x9f,0x0d]
+; CHECK: st1.s	{ v6 }[2], [x3], #4    ; encoding: [0x66,0x80,0x9f,0x4d]
+; CHECK: st1.d	{ v6 }[1], [x3], #8    ; encoding: [0x66,0x84,0x9f,0x4d]
+; CHECK: st2.b	{ v5, v6 }[13], [x3]    ; encoding: [0x65,0x14,0x20,0x4d]
+; CHECK: st2.h	{ v5, v6 }[2], [x3]     ; encoding: [0x65,0x50,0x20,0x0d]
+; CHECK: st2.s	{ v5, v6 }[2], [x3]     ; encoding: [0x65,0x80,0x20,0x4d]
+; CHECK: st2.d	{ v5, v6 }[1], [x3]     ; encoding: [0x65,0x84,0x20,0x4d]
+; CHECK: st2.b	{ v5, v6 }[13], [x3], x5 ; encoding: [0x65,0x14,0xa5,0x4d]
+; CHECK: st2.h	{ v5, v6 }[2], [x3], x5 ; encoding: [0x65,0x50,0xa5,0x0d]
+; CHECK: st2.s	{ v5, v6 }[2], [x3], x5 ; encoding: [0x65,0x80,0xa5,0x4d]
+; CHECK: st2.d	{ v5, v6 }[1], [x3], x5 ; encoding: [0x65,0x84,0xa5,0x4d]
+; CHECK: st2.b	{ v5, v6 }[13], [x3], #2 ; encoding: [0x65,0x14,0xbf,0x4d]
+; CHECK: st2.h	{ v5, v6 }[2], [x3], #4 ; encoding: [0x65,0x50,0xbf,0x0d]
+; CHECK: st2.s	{ v5, v6 }[2], [x3], #8 ; encoding: [0x65,0x80,0xbf,0x4d]
+; CHECK: st2.d	{ v5, v6 }[1], [x3], #16 ; encoding: [0x65,0x84,0xbf,0x4d]
+; CHECK: st3.b	{ v7, v8, v9 }[13], [x3] ; encoding: [0x67,0x34,0x00,0x4d]
+; CHECK: st3.h	{ v7, v8, v9 }[2], [x3] ; encoding: [0x67,0x70,0x00,0x0d]
+; CHECK: st3.s	{ v7, v8, v9 }[2], [x3] ; encoding: [0x67,0xa0,0x00,0x4d]
+; CHECK: st3.d	{ v7, v8, v9 }[1], [x3] ; encoding: [0x67,0xa4,0x00,0x4d]
+; CHECK: st3.b	{ v7, v8, v9 }[13], [x3], x5 ; encoding: [0x67,0x34,0x85,0x4d]
+; CHECK: st3.h	{ v7, v8, v9 }[2], [x3], x5 ; encoding: [0x67,0x70,0x85,0x0d]
+; CHECK: st3.s	{ v7, v8, v9 }[2], [x3], x5 ; encoding: [0x67,0xa0,0x85,0x4d]
+; CHECK: st3.d	{ v7, v8, v9 }[1], [x3], x5 ; encoding: [0x67,0xa4,0x85,0x4d]
+; CHECK: st3.b	{ v7, v8, v9 }[13], [x3], #3 ; encoding: [0x67,0x34,0x9f,0x4d]
+; CHECK: st3.h	{ v7, v8, v9 }[2], [x3], #6 ; encoding: [0x67,0x70,0x9f,0x0d]
+; CHECK: st3.s	{ v7, v8, v9 }[2], [x3], #12 ; encoding: [0x67,0xa0,0x9f,0x4d]
+; CHECK: st3.d	{ v7, v8, v9 }[1], [x3], #24 ; encoding: [0x67,0xa4,0x9f,0x4d]
+; CHECK: st4.b	{ v7, v8, v9, v10 }[13], [x3] ; encoding: [0x67,0x34,0x20,0x4d]
+; CHECK: st4.h	{ v7, v8, v9, v10 }[2], [x3] ; encoding: [0x67,0x70,0x20,0x0d]
+; CHECK: st4.s	{ v7, v8, v9, v10 }[2], [x3] ; encoding: [0x67,0xa0,0x20,0x4d]
+; CHECK: st4.d	{ v7, v8, v9, v10 }[1], [x3] ; encoding: [0x67,0xa4,0x20,0x4d]
+; CHECK: st4.b	{ v7, v8, v9, v10 }[13], [x3], x5 ; encoding: [0x67,0x34,0xa5,0x4d]
+; CHECK: st4.h	{ v7, v8, v9, v10 }[2], [x3], x5 ; encoding: [0x67,0x70,0xa5,0x0d]
+; CHECK: st4.s	{ v7, v8, v9, v10 }[2], [x3], x5 ; encoding: [0x67,0xa0,0xa5,0x4d]
+; CHECK: st4.d	{ v7, v8, v9, v10 }[1], [x3], x5 ; encoding: [0x67,0xa4,0xa5,0x4d]
+; CHECK: st4.b	{ v7, v8, v9, v10 }[13], [x3], #4 ; encoding: [0x67,0x34,0xbf,0x4d]
+; CHECK: st4.h	{ v7, v8, v9, v10 }[2], [x3], #8 ; encoding: [0x67,0x70,0xbf,0x0d]
+; CHECK: st4.s	{ v7, v8, v9, v10 }[2], [x3], #16 ; encoding: [0x67,0xa0,0xbf,0x4d]
+; CHECK: st4.d	{ v7, v8, v9, v10 }[1], [x3], #32 ; encoding: [0x67,0xa4,0xbf,0x4d]
diff --git a/test/MC/ARM64/small-data-fixups.s b/test/MC/ARM64/small-data-fixups.s
new file mode 100644
index 0000000..3fe7c75
--- /dev/null
+++ b/test/MC/ARM64/small-data-fixups.s
@@ -0,0 +1,24 @@
+; RUN: llvm-mc -triple arm64-apple-darwin -filetype=obj -o - %s | macho-dump | FileCheck %s
+
+foo:
+  .long 0
+bar:
+  .long 1
+
+baz:
+  .byte foo - bar
+  .short foo - bar
+
+; CHECK: # Relocation 0
+; CHECK: (('word-0', 0x9),
+; CHECK:  ('word-1', 0x1a000002)),
+; CHECK: # Relocation 1
+; CHECK: (('word-0', 0x9),
+; CHECK:  ('word-1', 0xa000001)),
+; CHECK: # Relocation 2
+; CHECK: (('word-0', 0x8),
+; CHECK:  ('word-1', 0x18000002)),
+; CHECK: # Relocation 3
+; CHECK: (('word-0', 0x8),
+; CHECK:  ('word-1', 0x8000001)),
+
diff --git a/test/MC/ARM64/system-encoding.s b/test/MC/ARM64/system-encoding.s
new file mode 100644
index 0000000..9f0d3c4
--- /dev/null
+++ b/test/MC/ARM64/system-encoding.s
@@ -0,0 +1,679 @@
+; RUN: not llvm-mc -triple arm64-apple-darwin -show-encoding < %s 2> %t | FileCheck %s
+; RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s
+
+foo:
+
+;-----------------------------------------------------------------------------
+; Simple encodings (instuctions w/ no operands)
+;-----------------------------------------------------------------------------
+
+  nop
+  sev
+  sevl
+  wfe
+  wfi
+  yield
+
+; CHECK: nop                             ; encoding: [0x1f,0x20,0x03,0xd5]
+; CHECK: sev                             ; encoding: [0x9f,0x20,0x03,0xd5]
+; CHECK: sevl                            ; encoding: [0xbf,0x20,0x03,0xd5]
+; CHECK: wfe                             ; encoding: [0x5f,0x20,0x03,0xd5]
+; CHECK: wfi                             ; encoding: [0x7f,0x20,0x03,0xd5]
+; CHECK: yield                           ; encoding: [0x3f,0x20,0x03,0xd5]
+
+;-----------------------------------------------------------------------------
+; Single-immediate operand instructions
+;-----------------------------------------------------------------------------
+
+  clrex #10
+; CHECK: clrex #10  ; encoding: [0x5f,0x3a,0x03,0xd5]
+  isb #15
+  isb sy
+; CHECK: isb     ; encoding: [0xdf,0x3f,0x03,0xd5]
+; CHECK: isb     ; encoding: [0xdf,0x3f,0x03,0xd5]
+  dmb #3
+  dmb osh
+; CHECK: dmb osh    ; encoding: [0xbf,0x33,0x03,0xd5]
+; CHECK: dmb osh    ; encoding: [0xbf,0x33,0x03,0xd5]
+  dsb #7
+  dsb nsh
+; CHECK: dsb nsh    ; encoding: [0x9f,0x37,0x03,0xd5]
+; CHECK: dsb nsh    ; encoding: [0x9f,0x37,0x03,0xd5]
+
+;-----------------------------------------------------------------------------
+; Generic system instructions
+;-----------------------------------------------------------------------------
+  sys #2, c0, c5, #7
+; CHECK: encoding: [0xff,0x05,0x0a,0xd5]
+  sys #7, C6, c10, #7, x7
+; CHECK: encoding: [0xe7,0x6a,0x0f,0xd5]
+  sysl  x20, #6, c3, C15, #7
+; CHECK: encoding: [0xf4,0x3f,0x2e,0xd5]
+
+; Check for error on invalid 'C' operand value.
+  sys #2, c16, c5, #7
+; CHECK-ERRORS: invalid operand for instruction
+
+;-----------------------------------------------------------------------------
+; MSR/MRS instructions
+;-----------------------------------------------------------------------------
+  msr ACTLR_EL1, x3
+  msr ACTLR_EL2, x3
+  msr ACTLR_EL3, x3
+  msr ADFSR_EL1, x3
+  msr ADFSR_EL2, x3
+  msr ADFSR_EL3, x3
+  msr AIDR_EL1, x3
+  msr AIFSR_EL1, x3
+  msr AIFSR_EL2, x3
+  msr AIFSR_EL3, x3
+  msr AMAIR_EL1, x3
+  msr AMAIR_EL2, x3
+  msr AMAIR_EL3, x3
+  msr CCSIDR_EL1, x3
+  msr CLIDR_EL1, x3
+  msr CNTFRQ_EL0, x3
+  msr CNTHCTL_EL2, x3
+  msr CNTHP_CTL_EL2, x3
+  msr CNTHP_CVAL_EL2, x3
+  msr CNTHP_TVAL_EL2, x3
+  msr CNTKCTL_EL1, x3
+  msr CNTPCT_EL0, x3
+  msr CNTP_CTL_EL0, x3
+  msr CNTP_CVAL_EL0, x3
+  msr CNTP_TVAL_EL0, x3
+  msr CNTVCT_EL0, x3
+  msr CNTVOFF_EL2, x3
+  msr CNTV_CTL_EL0, x3
+  msr CNTV_CVAL_EL0, x3
+  msr CNTV_TVAL_EL0, x3
+  msr CONTEXTIDR_EL1, x3
+  msr CPACR_EL1, x3
+  msr CPTR_EL2, x3
+  msr CPTR_EL3, x3
+  msr CSSELR_EL1, x3
+  msr CTR_EL0, x3
+  msr CURRENT_EL, x3
+  msr DACR32_EL2, x3
+  msr DCZID_EL0, x3
+  msr ECOIDR_EL1, x3
+  msr ESR_EL1, x3
+  msr ESR_EL2, x3
+  msr ESR_EL3, x3
+  msr FAR_EL1, x3
+  msr FAR_EL2, x3
+  msr FAR_EL3, x3
+  msr FPEXC32_EL2, x3
+  msr HACR_EL2, x3
+  msr HCR_EL2, x3
+  msr HPFAR_EL2, x3
+  msr HSTR_EL2, x3
+  msr ID_AA64DFR0_EL1, x3
+  msr ID_AA64DFR1_EL1, x3
+  msr ID_AA64ISAR0_EL1, x3
+  msr ID_AA64ISAR1_EL1, x3
+  msr ID_AA64MMFR0_EL1, x3
+  msr ID_AA64MMFR1_EL1, x3
+  msr ID_AA64PFR0_EL1, x3
+  msr ID_AA64PFR1_EL1, x3
+  msr IFSR32_EL2, x3
+  msr ISR_EL1, x3
+  msr MAIR_EL1, x3
+  msr MAIR_EL2, x3
+  msr MAIR_EL3, x3
+  msr MDCR_EL2, x3
+  msr MDCR_EL3, x3
+  msr MIDR_EL1, x3
+  msr MPIDR_EL1, x3
+  msr MVFR0_EL1, x3
+  msr MVFR1_EL1, x3
+  msr PAR_EL1, x3
+  msr RVBAR_EL1, x3
+  msr RVBAR_EL2, x3
+  msr RVBAR_EL3, x3
+  msr SCR_EL3, x3
+  msr SCTLR_EL1, x3
+  msr SCTLR_EL2, x3
+  msr SCTLR_EL3, x3
+  msr SDER32_EL3, x3
+  msr TCR_EL1, x3
+  msr TCR_EL2, x3
+  msr TCR_EL3, x3
+  msr TEECR32_EL1, x3
+  msr TEEHBR32_EL1, x3
+  msr TPIDRRO_EL0, x3
+  msr TPIDR_EL0, x3
+  msr TPIDR_EL1, x3
+  msr TPIDR_EL2, x3
+  msr TPIDR_EL3, x3
+  msr TTBR0_EL1, x3
+  msr TTBR0_EL2, x3
+  msr TTBR0_EL3, x3
+  msr TTBR1_EL1, x3
+  msr VBAR_EL1, x3
+  msr VBAR_EL2, x3
+  msr VBAR_EL3, x3
+  msr VMPIDR_EL2, x3
+  msr VPIDR_EL2, x3
+  msr VTCR_EL2, x3
+  msr VTTBR_EL2, x3
+  msr SPSel, x3
+  msr S2_2_C4_C6_4, x1
+; CHECK: msr ACTLR_EL1, x3              ; encoding: [0x23,0x10,0x18,0xd5]
+; CHECK: msr ACTLR_EL2, x3              ; encoding: [0x23,0x10,0x1c,0xd5]
+; CHECK: msr ACTLR_EL3, x3              ; encoding: [0x23,0x10,0x1e,0xd5]
+; CHECK: msr AFSR0_EL1, x3              ; encoding: [0x03,0x51,0x18,0xd5]
+; CHECK: msr ADFSR_EL2, x3              ; encoding: [0x03,0x51,0x1c,0xd5]
+; CHECK: msr ADFSR_EL3, x3              ; encoding: [0x03,0x51,0x1e,0xd5]
+; CHECK: msr AIDR_EL1, x3               ; encoding: [0xe3,0x00,0x19,0xd5]
+; CHECK: msr AFSR1_EL1, x3              ; encoding: [0x23,0x51,0x18,0xd5]
+; CHECK: msr AIFSR_EL2, x3              ; encoding: [0x23,0x51,0x1c,0xd5]
+; CHECK: msr AIFSR_EL3, x3              ; encoding: [0x23,0x51,0x1e,0xd5]
+; CHECK: msr AMAIR_EL1, x3              ; encoding: [0x03,0xa3,0x18,0xd5]
+; CHECK: msr AMAIR_EL2, x3              ; encoding: [0x03,0xa3,0x1c,0xd5]
+; CHECK: msr AMAIR_EL3, x3              ; encoding: [0x03,0xa3,0x1e,0xd5]
+; CHECK: msr CCSIDR_EL1, x3             ; encoding: [0x03,0x00,0x19,0xd5]
+; CHECK: msr CLIDR_EL1, x3              ; encoding: [0x23,0x00,0x19,0xd5]
+; CHECK: msr CNTFRQ_EL0, x3             ; encoding: [0x03,0xe0,0x1b,0xd5]
+; CHECK: msr CNTHCTL_EL2, x3            ; encoding: [0x03,0xe1,0x1c,0xd5]
+; CHECK: msr CNTHP_CTL_EL2, x3          ; encoding: [0x23,0xe2,0x1c,0xd5]
+; CHECK: msr CNTHP_CVAL_EL2, x3         ; encoding: [0x43,0xe2,0x1c,0xd5]
+; CHECK: msr CNTHP_TVAL_EL2, x3         ; encoding: [0x03,0xe2,0x1c,0xd5]
+; CHECK: msr CNTKCTL_EL1, x3            ; encoding: [0x03,0xe1,0x18,0xd5]
+; CHECK: msr CNTPCT_EL0, x3             ; encoding: [0x23,0xe0,0x1b,0xd5]
+; CHECK: msr CNTP_CTL_EL0, x3           ; encoding: [0x23,0xe2,0x1b,0xd5]
+; CHECK: msr CNTP_CVAL_EL0, x3          ; encoding: [0x43,0xe2,0x1b,0xd5]
+; CHECK: msr CNTP_TVAL_EL0, x3          ; encoding: [0x03,0xe2,0x1b,0xd5]
+; CHECK: msr CNTVCT_EL0, x3             ; encoding: [0x43,0xe0,0x1b,0xd5]
+; CHECK: msr CNTVOFF_EL2, x3            ; encoding: [0x63,0xe0,0x1c,0xd5]
+; CHECK: msr CNTV_CTL_EL0, x3           ; encoding: [0x23,0xe3,0x1b,0xd5]
+; CHECK: msr CNTV_CVAL_EL0, x3          ; encoding: [0x43,0xe3,0x1b,0xd5]
+; CHECK: msr CNTV_TVAL_EL0, x3          ; encoding: [0x03,0xe3,0x1b,0xd5]
+; CHECK: msr CONTEXTIDR_EL1, x3         ; encoding: [0x23,0xd0,0x18,0xd5]
+; CHECK: msr CPACR_EL1, x3              ; encoding: [0x43,0x10,0x18,0xd5]
+; CHECK: msr CPTR_EL2, x3               ; encoding: [0x43,0x11,0x1c,0xd5]
+; CHECK: msr CPTR_EL3, x3               ; encoding: [0x43,0x11,0x1e,0xd5]
+; CHECK: msr CSSELR_EL1, x3             ; encoding: [0x03,0x00,0x1a,0xd5]
+; CHECK: msr CTR_EL0, x3                ; encoding: [0x23,0x00,0x1b,0xd5]
+; CHECK: msr CurrentEL, x3              ; encoding: [0x43,0x42,0x18,0xd5]
+; CHECK: msr DACR32_EL2, x3             ; encoding: [0x03,0x30,0x1c,0xd5]
+; CHECK: msr DCZID_EL0, x3              ; encoding: [0xe3,0x00,0x1b,0xd5]
+; CHECK: msr REVIDR_EL1, x3             ; encoding: [0xc3,0x00,0x18,0xd5]
+; CHECK: msr ESR_EL1, x3                ; encoding: [0x03,0x52,0x18,0xd5]
+; CHECK: msr ESR_EL2, x3                ; encoding: [0x03,0x52,0x1c,0xd5]
+; CHECK: msr ESR_EL3, x3                ; encoding: [0x03,0x52,0x1e,0xd5]
+; CHECK: msr FAR_EL1, x3                ; encoding: [0x03,0x60,0x18,0xd5]
+; CHECK: msr FAR_EL2, x3                ; encoding: [0x03,0x60,0x1c,0xd5]
+; CHECK: msr FAR_EL3, x3                ; encoding: [0x03,0x60,0x1e,0xd5]
+; CHECK: msr FPEXC32_EL2, x3            ; encoding: [0x03,0x53,0x1c,0xd5]
+; CHECK: msr HACR_EL2, x3               ; encoding: [0xe3,0x11,0x1c,0xd5]
+; CHECK: msr HCR_EL2, x3                ; encoding: [0x03,0x11,0x1c,0xd5]
+; CHECK: msr HPFAR_EL2, x3              ; encoding: [0x83,0x60,0x1c,0xd5]
+; CHECK: msr HSTR_EL2, x3               ; encoding: [0x63,0x11,0x1c,0xd5]
+; CHECK: msr ID_AA64DFR0_EL1, x3        ; encoding: [0x03,0x05,0x18,0xd5]
+; CHECK: msr ID_AA64DFR1_EL1, x3        ; encoding: [0x23,0x05,0x18,0xd5]
+; CHECK: msr ID_AA64ISAR0_EL1, x3       ; encoding: [0x03,0x06,0x18,0xd5]
+; CHECK: msr ID_AA64ISAR1_EL1, x3       ; encoding: [0x23,0x06,0x18,0xd5]
+; CHECK: msr ID_AA64MMFR0_EL1, x3       ; encoding: [0x03,0x07,0x18,0xd5]
+; CHECK: msr ID_AA64MMFR1_EL1, x3       ; encoding: [0x23,0x07,0x18,0xd5]
+; CHECK: msr ID_AA64PFR0_EL1, x3        ; encoding: [0x03,0x04,0x18,0xd5]
+; CHECK: msr ID_AA64PFR1_EL1, x3        ; encoding: [0x23,0x04,0x18,0xd5]
+; CHECK: msr IFSR32_EL2, x3             ; encoding: [0x23,0x50,0x1c,0xd5]
+; CHECK: msr ISR_EL1, x3                ; encoding: [0x03,0xc1,0x18,0xd5]
+; CHECK: msr MAIR_EL1, x3               ; encoding: [0x03,0xa2,0x18,0xd5]
+; CHECK: msr MAIR_EL2, x3               ; encoding: [0x03,0xa2,0x1c,0xd5]
+; CHECK: msr MAIR_EL3, x3               ; encoding: [0x03,0xa2,0x1e,0xd5]
+; CHECK: msr MDCR_EL2, x3               ; encoding: [0x23,0x11,0x1c,0xd5]
+; CHECK: msr MDCR_EL3, x3               ; encoding: [0x23,0x13,0x1e,0xd5]
+; CHECK: msr MIDR_EL1, x3               ; encoding: [0x03,0x00,0x18,0xd5]
+; CHECK: msr MPIDR_EL1, x3              ; encoding: [0xa3,0x00,0x18,0xd5]
+; CHECK: msr MVFR0_EL1, x3              ; encoding: [0x03,0x03,0x18,0xd5]
+; CHECK: msr MVFR1_EL1, x3              ; encoding: [0x23,0x03,0x18,0xd5]
+; CHECK: msr PAR_EL1, x3                ; encoding: [0x03,0x74,0x18,0xd5]
+; CHECK: msr RVBAR_EL1, x3              ; encoding: [0x23,0xc0,0x18,0xd5]
+; CHECK: msr RVBAR_EL2, x3              ; encoding: [0x23,0xc0,0x1c,0xd5]
+; CHECK: msr RVBAR_EL3, x3              ; encoding: [0x23,0xc0,0x1e,0xd5]
+; CHECK: msr SCR_EL3, x3                ; encoding: [0x03,0x11,0x1e,0xd5]
+; CHECK: msr SCTLR_EL1, x3              ; encoding: [0x03,0x10,0x18,0xd5]
+; CHECK: msr SCTLR_EL2, x3              ; encoding: [0x03,0x10,0x1c,0xd5]
+; CHECK: msr SCTLR_EL3, x3              ; encoding: [0x03,0x10,0x1e,0xd5]
+; CHECK: msr SDER32_EL3, x3             ; encoding: [0x23,0x11,0x1e,0xd5]
+; CHECK: msr TCR_EL1, x3                ; encoding: [0x43,0x20,0x18,0xd5]
+; CHECK: msr TCR_EL2, x3                ; encoding: [0x43,0x20,0x1c,0xd5]
+; CHECK: msr TCR_EL3, x3                ; encoding: [0x43,0x20,0x1e,0xd5]
+; CHECK: msr TEECR32_EL1, x3            ; encoding: [0x03,0x00,0x12,0xd5]
+; CHECK: msr TEEHBR32_EL1, x3           ; encoding: [0x03,0x10,0x12,0xd5]
+; CHECK: msr TPIDRRO_EL0, x3            ; encoding: [0x63,0xd0,0x1b,0xd5]
+; CHECK: msr TPIDR_EL0, x3              ; encoding: [0x43,0xd0,0x1b,0xd5]
+; CHECK: msr TPIDR_EL1, x3              ; encoding: [0x83,0xd0,0x18,0xd5]
+; CHECK: msr TPIDR_EL2, x3              ; encoding: [0x43,0xd0,0x1c,0xd5]
+; CHECK: msr TPIDR_EL3, x3              ; encoding: [0x43,0xd0,0x1e,0xd5]
+; CHECK: msr TTBR0_EL1, x3              ; encoding: [0x03,0x20,0x18,0xd5]
+; CHECK: msr TTBR0_EL2, x3              ; encoding: [0x03,0x20,0x1c,0xd5]
+; CHECK: msr TTBR0_EL3, x3              ; encoding: [0x03,0x20,0x1e,0xd5]
+; CHECK: msr TTBR1_EL1, x3              ; encoding: [0x23,0x20,0x18,0xd5]
+; CHECK: msr VBAR_EL1, x3               ; encoding: [0x03,0xc0,0x18,0xd5]
+; CHECK: msr VBAR_EL2, x3               ; encoding: [0x03,0xc0,0x1c,0xd5]
+; CHECK: msr VBAR_EL3, x3               ; encoding: [0x03,0xc0,0x1e,0xd5]
+; CHECK: msr VMPIDR_EL2, x3             ; encoding: [0xa3,0x00,0x1c,0xd5]
+; CHECK: msr VPIDR_EL2, x3              ; encoding: [0x03,0x00,0x1c,0xd5]
+; CHECK: msr VTCR_EL2, x3               ; encoding: [0x43,0x21,0x1c,0xd5]
+; CHECK: msr VTTBR_EL2, x3              ; encoding: [0x03,0x21,0x1c,0xd5]
+; CHECK: msr  SPSel, x3                 ; encoding: [0x03,0x42,0x18,0xd5]
+; CHECK: msr  S2_2_C4_C6_4, x1          ; encoding: [0x81,0x46,0x12,0xd5]
+
+  mrs x3, ACTLR_EL1
+  mrs x3, ACTLR_EL2
+  mrs x3, ACTLR_EL3
+  mrs x3, ADFSR_EL1
+  mrs x3, ADFSR_EL2
+  mrs x3, ADFSR_EL3
+  mrs x3, AIDR_EL1
+  mrs x3, AIFSR_EL1
+  mrs x3, AIFSR_EL2
+  mrs x3, AIFSR_EL3
+  mrs x3, AMAIR_EL1
+  mrs x3, AMAIR_EL2
+  mrs x3, AMAIR_EL3
+  mrs x3, CCSIDR_EL1
+  mrs x3, CLIDR_EL1
+  mrs x3, CNTFRQ_EL0
+  mrs x3, CNTHCTL_EL2
+  mrs x3, CNTHP_CTL_EL2
+  mrs x3, CNTHP_CVAL_EL2
+  mrs x3, CNTHP_TVAL_EL2
+  mrs x3, CNTKCTL_EL1
+  mrs x3, CNTPCT_EL0
+  mrs x3, CNTP_CTL_EL0
+  mrs x3, CNTP_CVAL_EL0
+  mrs x3, CNTP_TVAL_EL0
+  mrs x3, CNTVCT_EL0
+  mrs x3, CNTVOFF_EL2
+  mrs x3, CNTV_CTL_EL0
+  mrs x3, CNTV_CVAL_EL0
+  mrs x3, CNTV_TVAL_EL0
+  mrs x3, CONTEXTIDR_EL1
+  mrs x3, CPACR_EL1
+  mrs x3, CPTR_EL2
+  mrs x3, CPTR_EL3
+  mrs x3, CSSELR_EL1
+  mrs x3, CTR_EL0
+  mrs x3, CURRENT_EL
+  mrs x3, DACR32_EL2
+  mrs x3, DCZID_EL0
+  mrs x3, ECOIDR_EL1
+  mrs x3, ESR_EL1
+  mrs x3, ESR_EL2
+  mrs x3, ESR_EL3
+  mrs x3, FAR_EL1
+  mrs x3, FAR_EL2
+  mrs x3, FAR_EL3
+  mrs x3, FPEXC32_EL2
+  mrs x3, HACR_EL2
+  mrs x3, HCR_EL2
+  mrs x3, HPFAR_EL2
+  mrs x3, HSTR_EL2
+  mrs x3, ID_AA64DFR0_EL1
+  mrs x3, ID_AA64DFR1_EL1
+  mrs x3, ID_AA64ISAR0_EL1
+  mrs x3, ID_AA64ISAR1_EL1
+  mrs x3, ID_AA64MMFR0_EL1
+  mrs x3, ID_AA64MMFR1_EL1
+  mrs x3, ID_AA64PFR0_EL1
+  mrs x3, ID_AA64PFR1_EL1
+  mrs x3, IFSR32_EL2
+  mrs x3, ISR_EL1
+  mrs x3, MAIR_EL1
+  mrs x3, MAIR_EL2
+  mrs x3, MAIR_EL3
+  mrs x3, MDCR_EL2
+  mrs x3, MDCR_EL3
+  mrs x3, MIDR_EL1
+  mrs x3, MPIDR_EL1
+  mrs x3, MVFR0_EL1
+  mrs x3, MVFR1_EL1
+  mrs x3, PAR_EL1
+  mrs x3, RVBAR_EL1
+  mrs x3, RVBAR_EL2
+  mrs x3, RVBAR_EL3
+  mrs x3, SCR_EL3
+  mrs x3, SCTLR_EL1
+  mrs x3, SCTLR_EL2
+  mrs x3, SCTLR_EL3
+  mrs x3, SDER32_EL3
+  mrs x3, TCR_EL1
+  mrs x3, TCR_EL2
+  mrs x3, TCR_EL3
+  mrs x3, TEECR32_EL1
+  mrs x3, TEEHBR32_EL1
+  mrs x3, TPIDRRO_EL0
+  mrs x3, TPIDR_EL0
+  mrs x3, TPIDR_EL1
+  mrs x3, TPIDR_EL2
+  mrs x3, TPIDR_EL3
+  mrs x3, TTBR0_EL1
+  mrs x3, TTBR0_EL2
+  mrs x3, TTBR0_EL3
+  mrs x3, TTBR1_EL1
+  mrs x3, VBAR_EL1
+  mrs x3, VBAR_EL2
+  mrs x3, VBAR_EL3
+  mrs x3, VMPIDR_EL2
+  mrs x3, VPIDR_EL2
+  mrs x3, VTCR_EL2
+  mrs x3, VTTBR_EL2
+
+  mrs x3, MDCCSR_EL0
+  mrs x3, MDCCINT_EL1
+  mrs x3, DBGDTR_EL0
+  mrs x3, DBGDTRRX_EL0
+  mrs x3, DBGDTRTX_EL0
+  mrs x3, DBGVCR32_EL2
+  mrs x3, OSDTRRX_EL1
+  mrs x3, MDSCR_EL1
+  mrs x3, OSDTRTX_EL1
+  mrs x3, OSECCR_EL11
+  mrs x3, DBGBVR0_EL1
+  mrs x3, DBGBVR1_EL1
+  mrs x3, DBGBVR2_EL1
+  mrs x3, DBGBVR3_EL1
+  mrs x3, DBGBVR4_EL1
+  mrs x3, DBGBVR5_EL1
+  mrs x3, DBGBVR6_EL1
+  mrs x3, DBGBVR7_EL1
+  mrs x3, DBGBVR8_EL1
+  mrs x3, DBGBVR9_EL1
+  mrs x3, DBGBVR10_EL1
+  mrs x3, DBGBVR11_EL1
+  mrs x3, DBGBVR12_EL1
+  mrs x3, DBGBVR13_EL1
+  mrs x3, DBGBVR14_EL1
+  mrs x3, DBGBVR15_EL1
+  mrs x3, DBGBCR0_EL1
+  mrs x3, DBGBCR1_EL1
+  mrs x3, DBGBCR2_EL1
+  mrs x3, DBGBCR3_EL1
+  mrs x3, DBGBCR4_EL1
+  mrs x3, DBGBCR5_EL1
+  mrs x3, DBGBCR6_EL1
+  mrs x3, DBGBCR7_EL1
+  mrs x3, DBGBCR8_EL1
+  mrs x3, DBGBCR9_EL1
+  mrs x3, DBGBCR10_EL1
+  mrs x3, DBGBCR11_EL1
+  mrs x3, DBGBCR12_EL1
+  mrs x3, DBGBCR13_EL1
+  mrs x3, DBGBCR14_EL1
+  mrs x3, DBGBCR15_EL1
+  mrs x3, DBGWVR0_EL1
+  mrs x3, DBGWVR1_EL1
+  mrs x3, DBGWVR2_EL1
+  mrs x3, DBGWVR3_EL1
+  mrs x3, DBGWVR4_EL1
+  mrs x3, DBGWVR5_EL1
+  mrs x3, DBGWVR6_EL1
+  mrs x3, DBGWVR7_EL1
+  mrs x3, DBGWVR8_EL1
+  mrs x3, DBGWVR9_EL1
+  mrs x3, DBGWVR10_EL1
+  mrs x3, DBGWVR11_EL1
+  mrs x3, DBGWVR12_EL1
+  mrs x3, DBGWVR13_EL1
+  mrs x3, DBGWVR14_EL1
+  mrs x3, DBGWVR15_EL1
+  mrs x3, DBGWCR0_EL1
+  mrs x3, DBGWCR1_EL1
+  mrs x3, DBGWCR2_EL1
+  mrs x3, DBGWCR3_EL1
+  mrs x3, DBGWCR4_EL1
+  mrs x3, DBGWCR5_EL1
+  mrs x3, DBGWCR6_EL1
+  mrs x3, DBGWCR7_EL1
+  mrs x3, DBGWCR8_EL1
+  mrs x3, DBGWCR9_EL1
+  mrs x3, DBGWCR10_EL1
+  mrs x3, DBGWCR11_EL1
+  mrs x3, DBGWCR12_EL1
+  mrs x3, DBGWCR13_EL1
+  mrs x3, DBGWCR14_EL1
+  mrs x3, DBGWCR15_EL1
+  mrs x3, MDRAR_EL1
+  mrs x3, OSLAR_EL1
+  mrs x3, OSLSR_EL1
+  mrs x3, OSDLR_EL1
+  mrs x3, DBGPRCR_EL1
+  mrs x3, DBGCLAIMSET_EL1
+  mrs x3, DBGCLAIMCLR_EL1
+  mrs x3, DBGAUTHSTATUS_EL1
+  mrs x3, DBGDEVID2
+  mrs x3, DBGDEVID1
+  mrs x3, DBGDEVID0
+  mrs x1, S2_2_C4_C6_4
+  mrs x3, s2_3_c2_c1_4
+  mrs x3, S2_3_c2_c1_4
+
+; CHECK: mrs x3, ACTLR_EL1              ; encoding: [0x23,0x10,0x38,0xd5]
+; CHECK: mrs x3, ACTLR_EL2              ; encoding: [0x23,0x10,0x3c,0xd5]
+; CHECK: mrs x3, ACTLR_EL3              ; encoding: [0x23,0x10,0x3e,0xd5]
+; CHECK: mrs x3, AFSR0_EL1              ; encoding: [0x03,0x51,0x38,0xd5]
+; CHECK: mrs x3, ADFSR_EL2              ; encoding: [0x03,0x51,0x3c,0xd5]
+; CHECK: mrs x3, ADFSR_EL3              ; encoding: [0x03,0x51,0x3e,0xd5]
+; CHECK: mrs x3, AIDR_EL1               ; encoding: [0xe3,0x00,0x39,0xd5]
+; CHECK: mrs x3, AFSR1_EL1              ; encoding: [0x23,0x51,0x38,0xd5]
+; CHECK: mrs x3, AIFSR_EL2              ; encoding: [0x23,0x51,0x3c,0xd5]
+; CHECK: mrs x3, AIFSR_EL3              ; encoding: [0x23,0x51,0x3e,0xd5]
+; CHECK: mrs x3, AMAIR_EL1              ; encoding: [0x03,0xa3,0x38,0xd5]
+; CHECK: mrs x3, AMAIR_EL2              ; encoding: [0x03,0xa3,0x3c,0xd5]
+; CHECK: mrs x3, AMAIR_EL3              ; encoding: [0x03,0xa3,0x3e,0xd5]
+; CHECK: mrs x3, CCSIDR_EL1             ; encoding: [0x03,0x00,0x39,0xd5]
+; CHECK: mrs x3, CLIDR_EL1              ; encoding: [0x23,0x00,0x39,0xd5]
+; CHECK: mrs x3, CNTFRQ_EL0             ; encoding: [0x03,0xe0,0x3b,0xd5]
+; CHECK: mrs x3, CNTHCTL_EL2            ; encoding: [0x03,0xe1,0x3c,0xd5]
+; CHECK: mrs x3, CNTHP_CTL_EL2          ; encoding: [0x23,0xe2,0x3c,0xd5]
+; CHECK: mrs x3, CNTHP_CVAL_EL2         ; encoding: [0x43,0xe2,0x3c,0xd5]
+; CHECK: mrs x3, CNTHP_TVAL_EL2         ; encoding: [0x03,0xe2,0x3c,0xd5]
+; CHECK: mrs x3, CNTKCTL_EL1            ; encoding: [0x03,0xe1,0x38,0xd5]
+; CHECK: mrs x3, CNTPCT_EL0             ; encoding: [0x23,0xe0,0x3b,0xd5]
+; CHECK: mrs x3, CNTP_CTL_EL0           ; encoding: [0x23,0xe2,0x3b,0xd5]
+; CHECK: mrs x3, CNTP_CVAL_EL0          ; encoding: [0x43,0xe2,0x3b,0xd5]
+; CHECK: mrs x3, CNTP_TVAL_EL0          ; encoding: [0x03,0xe2,0x3b,0xd5]
+; CHECK: mrs x3, CNTVCT_EL0             ; encoding: [0x43,0xe0,0x3b,0xd5]
+; CHECK: mrs x3, CNTVOFF_EL2            ; encoding: [0x63,0xe0,0x3c,0xd5]
+; CHECK: mrs x3, CNTV_CTL_EL0           ; encoding: [0x23,0xe3,0x3b,0xd5]
+; CHECK: mrs x3, CNTV_CVAL_EL0          ; encoding: [0x43,0xe3,0x3b,0xd5]
+; CHECK: mrs x3, CNTV_TVAL_EL0          ; encoding: [0x03,0xe3,0x3b,0xd5]
+; CHECK: mrs x3, CONTEXTIDR_EL1         ; encoding: [0x23,0xd0,0x38,0xd5]
+; CHECK: mrs x3, CPACR_EL1              ; encoding: [0x43,0x10,0x38,0xd5]
+; CHECK: mrs x3, CPTR_EL2               ; encoding: [0x43,0x11,0x3c,0xd5]
+; CHECK: mrs x3, CPTR_EL3               ; encoding: [0x43,0x11,0x3e,0xd5]
+; CHECK: mrs x3, CSSELR_EL1             ; encoding: [0x03,0x00,0x3a,0xd5]
+; CHECK: mrs x3, CTR_EL0                ; encoding: [0x23,0x00,0x3b,0xd5]
+; CHECK: mrs x3, CurrentEL              ; encoding: [0x43,0x42,0x38,0xd5]
+; CHECK: mrs x3, DACR32_EL2             ; encoding: [0x03,0x30,0x3c,0xd5]
+; CHECK: mrs x3, DCZID_EL0              ; encoding: [0xe3,0x00,0x3b,0xd5]
+; CHECK: mrs x3, REVIDR_EL1             ; encoding: [0xc3,0x00,0x38,0xd5]
+; CHECK: mrs x3, ESR_EL1                ; encoding: [0x03,0x52,0x38,0xd5]
+; CHECK: mrs x3, ESR_EL2                ; encoding: [0x03,0x52,0x3c,0xd5]
+; CHECK: mrs x3, ESR_EL3                ; encoding: [0x03,0x52,0x3e,0xd5]
+; CHECK: mrs x3, FAR_EL1                ; encoding: [0x03,0x60,0x38,0xd5]
+; CHECK: mrs x3, FAR_EL2                ; encoding: [0x03,0x60,0x3c,0xd5]
+; CHECK: mrs x3, FAR_EL3                ; encoding: [0x03,0x60,0x3e,0xd5]
+; CHECK: mrs x3, FPEXC32_EL2            ; encoding: [0x03,0x53,0x3c,0xd5]
+; CHECK: mrs x3, HACR_EL2               ; encoding: [0xe3,0x11,0x3c,0xd5]
+; CHECK: mrs x3, HCR_EL2                ; encoding: [0x03,0x11,0x3c,0xd5]
+; CHECK: mrs x3, HPFAR_EL2              ; encoding: [0x83,0x60,0x3c,0xd5]
+; CHECK: mrs x3, HSTR_EL2               ; encoding: [0x63,0x11,0x3c,0xd5]
+; CHECK: mrs x3, ID_AA64DFR0_EL1        ; encoding: [0x03,0x05,0x38,0xd5]
+; CHECK: mrs x3, ID_AA64DFR1_EL1        ; encoding: [0x23,0x05,0x38,0xd5]
+; CHECK: mrs x3, ID_AA64ISAR0_EL1       ; encoding: [0x03,0x06,0x38,0xd5]
+; CHECK: mrs x3, ID_AA64ISAR1_EL1       ; encoding: [0x23,0x06,0x38,0xd5]
+; CHECK: mrs x3, ID_AA64MMFR0_EL1       ; encoding: [0x03,0x07,0x38,0xd5]
+; CHECK: mrs x3, ID_AA64MMFR1_EL1       ; encoding: [0x23,0x07,0x38,0xd5]
+; CHECK: mrs x3, ID_AA64PFR0_EL1        ; encoding: [0x03,0x04,0x38,0xd5]
+; CHECK: mrs x3, ID_AA64PFR1_EL1        ; encoding: [0x23,0x04,0x38,0xd5]
+; CHECK: mrs x3, IFSR32_EL2             ; encoding: [0x23,0x50,0x3c,0xd5]
+; CHECK: mrs x3, ISR_EL1                ; encoding: [0x03,0xc1,0x38,0xd5]
+; CHECK: mrs x3, MAIR_EL1               ; encoding: [0x03,0xa2,0x38,0xd5]
+; CHECK: mrs x3, MAIR_EL2               ; encoding: [0x03,0xa2,0x3c,0xd5]
+; CHECK: mrs x3, MAIR_EL3               ; encoding: [0x03,0xa2,0x3e,0xd5]
+; CHECK: mrs x3, MDCR_EL2               ; encoding: [0x23,0x11,0x3c,0xd5]
+; CHECK: mrs x3, MDCR_EL3               ; encoding: [0x23,0x13,0x3e,0xd5]
+; CHECK: mrs x3, MIDR_EL1               ; encoding: [0x03,0x00,0x38,0xd5]
+; CHECK: mrs x3, MPIDR_EL1              ; encoding: [0xa3,0x00,0x38,0xd5]
+; CHECK: mrs x3, MVFR0_EL1              ; encoding: [0x03,0x03,0x38,0xd5]
+; CHECK: mrs x3, MVFR1_EL1              ; encoding: [0x23,0x03,0x38,0xd5]
+; CHECK: mrs x3, PAR_EL1                ; encoding: [0x03,0x74,0x38,0xd5]
+; CHECK: mrs x3, RVBAR_EL1              ; encoding: [0x23,0xc0,0x38,0xd5]
+; CHECK: mrs x3, RVBAR_EL2              ; encoding: [0x23,0xc0,0x3c,0xd5]
+; CHECK: mrs x3, RVBAR_EL3              ; encoding: [0x23,0xc0,0x3e,0xd5]
+; CHECK: mrs x3, SCR_EL3                ; encoding: [0x03,0x11,0x3e,0xd5]
+; CHECK: mrs x3, SCTLR_EL1              ; encoding: [0x03,0x10,0x38,0xd5]
+; CHECK: mrs x3, SCTLR_EL2              ; encoding: [0x03,0x10,0x3c,0xd5]
+; CHECK: mrs x3, SCTLR_EL3              ; encoding: [0x03,0x10,0x3e,0xd5]
+; CHECK: mrs x3, SDER32_EL3             ; encoding: [0x23,0x11,0x3e,0xd5]
+; CHECK: mrs x3, TCR_EL1                ; encoding: [0x43,0x20,0x38,0xd5]
+; CHECK: mrs x3, TCR_EL2                ; encoding: [0x43,0x20,0x3c,0xd5]
+; CHECK: mrs x3, TCR_EL3                ; encoding: [0x43,0x20,0x3e,0xd5]
+; CHECK: mrs x3, TEECR32_EL1            ; encoding: [0x03,0x00,0x32,0xd5]
+; CHECK: mrs x3, TEEHBR32_EL1           ; encoding: [0x03,0x10,0x32,0xd5]
+; CHECK: mrs x3, TPIDRRO_EL0            ; encoding: [0x63,0xd0,0x3b,0xd5]
+; CHECK: mrs x3, TPIDR_EL0              ; encoding: [0x43,0xd0,0x3b,0xd5]
+; CHECK: mrs x3, TPIDR_EL1              ; encoding: [0x83,0xd0,0x38,0xd5]
+; CHECK: mrs x3, TPIDR_EL2              ; encoding: [0x43,0xd0,0x3c,0xd5]
+; CHECK: mrs x3, TPIDR_EL3              ; encoding: [0x43,0xd0,0x3e,0xd5]
+; CHECK: mrs x3, TTBR0_EL1              ; encoding: [0x03,0x20,0x38,0xd5]
+; CHECK: mrs x3, TTBR0_EL2              ; encoding: [0x03,0x20,0x3c,0xd5]
+; CHECK: mrs x3, TTBR0_EL3              ; encoding: [0x03,0x20,0x3e,0xd5]
+; CHECK: mrs x3, TTBR1_EL1              ; encoding: [0x23,0x20,0x38,0xd5]
+; CHECK: mrs x3, VBAR_EL1               ; encoding: [0x03,0xc0,0x38,0xd5]
+; CHECK: mrs x3, VBAR_EL2               ; encoding: [0x03,0xc0,0x3c,0xd5]
+; CHECK: mrs x3, VBAR_EL3               ; encoding: [0x03,0xc0,0x3e,0xd5]
+; CHECK: mrs x3, VMPIDR_EL2             ; encoding: [0xa3,0x00,0x3c,0xd5]
+; CHECK: mrs x3, VPIDR_EL2              ; encoding: [0x03,0x00,0x3c,0xd5]
+; CHECK: mrs x3, VTCR_EL2               ; encoding: [0x43,0x21,0x3c,0xd5]
+; CHECK: mrs x3, VTTBR_EL2              ; encoding: [0x03,0x21,0x3c,0xd5]
+; CHECK: mrs	x3, MDCCSR_EL0          ; encoding: [0x03,0x01,0x33,0xd5]
+; CHECK: mrs	x3, MDCCINT_EL1         ; encoding: [0x03,0x02,0x30,0xd5]
+; CHECK: mrs	x3, DBGDTR_EL0          ; encoding: [0x03,0x04,0x33,0xd5]
+; CHECK: mrs	x3, DBGDTRRX_EL0        ; encoding: [0x03,0x05,0x33,0xd5]
+; CHECK: mrs	x3, DBGDTRRX_EL0        ; encoding: [0x03,0x05,0x33,0xd5]
+; CHECK: mrs	x3, DBGVCR32_EL2        ; encoding: [0x03,0x07,0x34,0xd5]
+; CHECK: mrs	x3, OSDTRRX_EL1         ; encoding: [0x43,0x00,0x30,0xd5]
+; CHECK: mrs	x3, MDSCR_EL1           ; encoding: [0x43,0x02,0x30,0xd5]
+; CHECK: mrs	x3, OSDTRTX_EL1         ; encoding: [0x43,0x03,0x30,0xd5]
+; CHECK: mrs	x3, OSECCR_EL11         ; encoding: [0x43,0x06,0x30,0xd5]
+; CHECK: mrs	x3, DBGBVR0_EL1         ; encoding: [0x83,0x00,0x30,0xd5]
+; CHECK: mrs	x3, DBGBVR1_EL1         ; encoding: [0x83,0x01,0x30,0xd5]
+; CHECK: mrs	x3, DBGBVR2_EL1         ; encoding: [0x83,0x02,0x30,0xd5]
+; CHECK: mrs	x3, DBGBVR3_EL1         ; encoding: [0x83,0x03,0x30,0xd5]
+; CHECK: mrs	x3, DBGBVR4_EL1         ; encoding: [0x83,0x04,0x30,0xd5]
+; CHECK: mrs	x3, DBGBVR5_EL1         ; encoding: [0x83,0x05,0x30,0xd5]
+; CHECK: mrs	x3, DBGBVR6_EL1         ; encoding: [0x83,0x06,0x30,0xd5]
+; CHECK: mrs	x3, DBGBVR7_EL1         ; encoding: [0x83,0x07,0x30,0xd5]
+; CHECK: mrs	x3, DBGBVR8_EL1         ; encoding: [0x83,0x08,0x30,0xd5]
+; CHECK: mrs	x3, DBGBVR9_EL1         ; encoding: [0x83,0x09,0x30,0xd5]
+; CHECK: mrs	x3, DBGBVR10_EL1        ; encoding: [0x83,0x0a,0x30,0xd5]
+; CHECK: mrs	x3, DBGBVR11_EL1        ; encoding: [0x83,0x0b,0x30,0xd5]
+; CHECK: mrs	x3, DBGBVR12_EL1        ; encoding: [0x83,0x0c,0x30,0xd5]
+; CHECK: mrs	x3, DBGBVR13_EL1        ; encoding: [0x83,0x0d,0x30,0xd5]
+; CHECK: mrs	x3, DBGBVR14_EL1        ; encoding: [0x83,0x0e,0x30,0xd5]
+; CHECK: mrs	x3, DBGBVR15_EL1        ; encoding: [0x83,0x0f,0x30,0xd5]
+; CHECK: mrs	x3, DBGBCR0_EL1         ; encoding: [0xa3,0x00,0x30,0xd5]
+; CHECK: mrs	x3, DBGBCR1_EL1         ; encoding: [0xa3,0x01,0x30,0xd5]
+; CHECK: mrs	x3, DBGBCR2_EL1         ; encoding: [0xa3,0x02,0x30,0xd5]
+; CHECK: mrs	x3, DBGBCR3_EL1         ; encoding: [0xa3,0x03,0x30,0xd5]
+; CHECK: mrs	x3, DBGBCR4_EL1         ; encoding: [0xa3,0x04,0x30,0xd5]
+; CHECK: mrs	x3, DBGBCR5_EL1         ; encoding: [0xa3,0x05,0x30,0xd5]
+; CHECK: mrs	x3, DBGBCR6_EL1         ; encoding: [0xa3,0x06,0x30,0xd5]
+; CHECK: mrs	x3, DBGBCR7_EL1         ; encoding: [0xa3,0x07,0x30,0xd5]
+; CHECK: mrs	x3, DBGBCR8_EL1         ; encoding: [0xa3,0x08,0x30,0xd5]
+; CHECK: mrs	x3, DBGBCR9_EL1         ; encoding: [0xa3,0x09,0x30,0xd5]
+; CHECK: mrs	x3, DBGBCR10_EL1        ; encoding: [0xa3,0x0a,0x30,0xd5]
+; CHECK: mrs	x3, DBGBCR11_EL1        ; encoding: [0xa3,0x0b,0x30,0xd5]
+; CHECK: mrs	x3, DBGBCR12_EL1        ; encoding: [0xa3,0x0c,0x30,0xd5]
+; CHECK: mrs	x3, DBGBCR13_EL1        ; encoding: [0xa3,0x0d,0x30,0xd5]
+; CHECK: mrs	x3, DBGBCR14_EL1        ; encoding: [0xa3,0x0e,0x30,0xd5]
+; CHECK: mrs	x3, DBGBCR15_EL1        ; encoding: [0xa3,0x0f,0x30,0xd5]
+; CHECK: mrs	x3, DBGWVR0_EL1         ; encoding: [0xc3,0x00,0x30,0xd5]
+; CHECK: mrs	x3, DBGWVR1_EL1         ; encoding: [0xc3,0x01,0x30,0xd5]
+; CHECK: mrs	x3, DBGWVR2_EL1         ; encoding: [0xc3,0x02,0x30,0xd5]
+; CHECK: mrs	x3, DBGWVR3_EL1         ; encoding: [0xc3,0x03,0x30,0xd5]
+; CHECK: mrs	x3, DBGWVR4_EL1         ; encoding: [0xc3,0x04,0x30,0xd5]
+; CHECK: mrs	x3, DBGWVR5_EL1         ; encoding: [0xc3,0x05,0x30,0xd5]
+; CHECK: mrs	x3, DBGWVR6_EL1         ; encoding: [0xc3,0x06,0x30,0xd5]
+; CHECK: mrs	x3, DBGWVR7_EL1         ; encoding: [0xc3,0x07,0x30,0xd5]
+; CHECK: mrs	x3, DBGWVR8_EL1         ; encoding: [0xc3,0x08,0x30,0xd5]
+; CHECK: mrs	x3, DBGWVR9_EL1         ; encoding: [0xc3,0x09,0x30,0xd5]
+; CHECK: mrs	x3, DBGWVR10_EL1        ; encoding: [0xc3,0x0a,0x30,0xd5]
+; CHECK: mrs	x3, DBGWVR11_EL1        ; encoding: [0xc3,0x0b,0x30,0xd5]
+; CHECK: mrs	x3, DBGWVR12_EL1        ; encoding: [0xc3,0x0c,0x30,0xd5]
+; CHECK: mrs	x3, DBGWVR13_EL1        ; encoding: [0xc3,0x0d,0x30,0xd5]
+; CHECK: mrs	x3, DBGWVR14_EL1        ; encoding: [0xc3,0x0e,0x30,0xd5]
+; CHECK: mrs	x3, DBGWVR15_EL1        ; encoding: [0xc3,0x0f,0x30,0xd5]
+; CHECK: mrs	x3, DBGWCR0_EL1         ; encoding: [0xe3,0x00,0x30,0xd5]
+; CHECK: mrs	x3, DBGWCR1_EL1         ; encoding: [0xe3,0x01,0x30,0xd5]
+; CHECK: mrs	x3, DBGWCR2_EL1         ; encoding: [0xe3,0x02,0x30,0xd5]
+; CHECK: mrs	x3, DBGWCR3_EL1         ; encoding: [0xe3,0x03,0x30,0xd5]
+; CHECK: mrs	x3, DBGWCR4_EL1         ; encoding: [0xe3,0x04,0x30,0xd5]
+; CHECK: mrs	x3, DBGWCR5_EL1         ; encoding: [0xe3,0x05,0x30,0xd5]
+; CHECK: mrs	x3, DBGWCR6_EL1         ; encoding: [0xe3,0x06,0x30,0xd5]
+; CHECK: mrs	x3, DBGWCR7_EL1         ; encoding: [0xe3,0x07,0x30,0xd5]
+; CHECK: mrs	x3, DBGWCR8_EL1         ; encoding: [0xe3,0x08,0x30,0xd5]
+; CHECK: mrs	x3, DBGWCR9_EL1         ; encoding: [0xe3,0x09,0x30,0xd5]
+; CHECK: mrs	x3, DBGWCR10_EL1        ; encoding: [0xe3,0x0a,0x30,0xd5]
+; CHECK: mrs	x3, DBGWCR11_EL1        ; encoding: [0xe3,0x0b,0x30,0xd5]
+; CHECK: mrs	x3, DBGWCR12_EL1        ; encoding: [0xe3,0x0c,0x30,0xd5]
+; CHECK: mrs	x3, DBGWCR13_EL1        ; encoding: [0xe3,0x0d,0x30,0xd5]
+; CHECK: mrs	x3, DBGWCR14_EL1        ; encoding: [0xe3,0x0e,0x30,0xd5]
+; CHECK: mrs	x3, DBGWCR15_EL1        ; encoding: [0xe3,0x0f,0x30,0xd5]
+; CHECK: mrs	x3, MDRAR_EL1           ; encoding: [0x03,0x10,0x30,0xd5]
+; CHECK: mrs	x3, OSLAR_EL1           ; encoding: [0x83,0x10,0x30,0xd5]
+; CHECK: mrs	x3, OSLSR_EL1           ; encoding: [0x83,0x11,0x30,0xd5]
+; CHECK: mrs	x3, OSDLR_EL1           ; encoding: [0x83,0x13,0x30,0xd5]
+; CHECK: mrs	x3, DBGPRCR_EL1         ; encoding: [0x83,0x14,0x30,0xd5]
+; CHECK: mrs	x3, DBGCLAIMSET_EL1     ; encoding: [0xc3,0x78,0x30,0xd5]
+; CHECK: mrs	x3, DBGCLAIMCLR_EL1     ; encoding: [0xc3,0x79,0x30,0xd5]
+; CHECK: mrs	x3, DBGAUTHSTATUS_EL1   ; encoding: [0xc3,0x7e,0x30,0xd5]
+; CHECK: mrs	x3, DBGDEVID2           ; encoding: [0xe3,0x70,0x30,0xd5]
+; CHECK: mrs	x3, DBGDEVID1           ; encoding: [0xe3,0x71,0x30,0xd5]
+; CHECK: mrs	x3, DBGDEVID0           ; encoding: [0xe3,0x72,0x30,0xd5]
+; CHECK: mrs    x1, S2_2_C4_C6_4        ; encoding: [0x81,0x46,0x32,0xd5]
+; CHECK: mrs	x3, S2_3_C2_C1_4        ; encoding: [0x83,0x21,0x33,0xd5]
+; CHECK: mrs	x3, S2_3_C2_C1_4        ; encoding: [0x83,0x21,0x33,0xd5]
+
+  msr RMR_EL3, x0
+  msr RMR_EL2, x0
+  msr RMR_EL1, x0
+  msr CPM_IOACC_CTL_EL3, x0
+
+; CHECK: msr	RMR_EL3, x0             ; encoding: [0x40,0xc0,0x1e,0xd5]
+; CHECK: msr	RMR_EL2, x0             ; encoding: [0x40,0xc0,0x1a,0xd5]
+; CHECK: msr	RMR_EL1, x0             ; encoding: [0x40,0xc0,0x19,0xd5]
+; CHECK: msr	CPM_IOACC_CTL_EL3, x0   ; encoding: [0x00,0xf2,0x1f,0xd5]
+
+ mrs x0, ID_PFR0_EL1
+ mrs x0, ID_PFR1_EL1
+ mrs x0, ID_DFR0_EL1
+ mrs x0, ID_AFR0_EL1
+ mrs x0, ID_ISAR0_EL1
+ mrs x0, ID_ISAR1_EL1
+ mrs x0, ID_ISAR2_EL1
+ mrs x0, ID_ISAR3_EL1
+ mrs x0, ID_ISAR4_EL1
+ mrs x0, ID_ISAR5_EL1
+ mrs x0, AFSR1_EL1
+ mrs x0, AFSR0_EL1
+ mrs x0, REVIDR_EL1
+; CHECK: mrs	x0, ID_PFR0_EL1         ; encoding: [0x00,0x01,0x38,0xd5]
+; CHECK: mrs	x0, ID_PFR1_EL1         ; encoding: [0x20,0x01,0x38,0xd5]
+; CHECK: mrs	x0, ID_DFR0_EL1         ; encoding: [0x40,0x01,0x38,0xd5]
+; CHECK: mrs	x0, ID_AFR0_EL1         ; encoding: [0x60,0x01,0x38,0xd5]
+; CHECK: mrs	x0, ID_ISAR0_EL1        ; encoding: [0x00,0x02,0x38,0xd5]
+; CHECK: mrs	x0, ID_ISAR1_EL1        ; encoding: [0x20,0x02,0x38,0xd5]
+; CHECK: mrs	x0, ID_ISAR2_EL1        ; encoding: [0x40,0x02,0x38,0xd5]
+; CHECK: mrs	x0, ID_ISAR3_EL1        ; encoding: [0x60,0x02,0x38,0xd5]
+; CHECK: mrs	x0, ID_ISAR4_EL1        ; encoding: [0x80,0x02,0x38,0xd5]
+; CHECK: mrs	x0, ID_ISAR5_EL1        ; encoding: [0xa0,0x02,0x38,0xd5]
+; CHECK: mrs	x0, AFSR1_EL1           ; encoding: [0x20,0x51,0x38,0xd5]
+; CHECK: mrs	x0, AFSR0_EL1           ; encoding: [0x00,0x51,0x38,0xd5]
+; CHECK: mrs	x0, REVIDR_EL1          ; encoding: [0xc0,0x00,0x38,0xd5]
diff --git a/test/MC/ARM64/tls-modifiers-darwin.s b/test/MC/ARM64/tls-modifiers-darwin.s
new file mode 100644
index 0000000..6478d26
--- /dev/null
+++ b/test/MC/ARM64/tls-modifiers-darwin.s
@@ -0,0 +1,13 @@
+; RUN: llvm-mc -triple=arm64-apple-ios7.0 %s -o - | FileCheck %s
+; RUN: llvm-mc -triple=arm64-apple-ios7.0 -filetype=obj %s -o - | llvm-objdump -r - | FileCheck %s --check-prefix=CHECK-OBJ
+
+        adrp x2, _var@TLVPPAGE
+        ldr x0, [x15, _var@TLVPPAGEOFF]
+        add lr, x0, _var@TLVPPAGEOFF
+; CHECK: adrp x2, _var@TLVPPAG
+; CHECK: ldr x0, [x15, _var@TLVPPAGEOFF]
+; CHECK: add lr, x0, _var@TLVPPAGEOFF
+
+; CHECK-OBJ: 8 ARM64_RELOC_TLVP_LOAD_PAGEOFF12 _var
+; CHECK-OBJ: 4 ARM64_RELOC_TLVP_LOAD_PAGEOFF12 _var
+; CHECK-OBJ: 0 ARM64_RELOC_TLVP_LOAD_PAGE21 _var
diff --git a/test/MC/ARM64/tls-relocs.s b/test/MC/ARM64/tls-relocs.s
new file mode 100644
index 0000000..7e8b754
--- /dev/null
+++ b/test/MC/ARM64/tls-relocs.s
@@ -0,0 +1,320 @@
+// RUN: llvm-mc -triple=arm64-none-linux-gnu -show-encoding < %s | FileCheck %s
+// RUN: llvm-mc -triple=arm64-none-linux-gnu -filetype=obj < %s -o - | \
+// RUN:   llvm-readobj -r -t | FileCheck --check-prefix=CHECK-ELF %s
+
+
+////////////////////////////////////////////////////////////////////////////////
+// TLS initial-exec forms
+////////////////////////////////////////////////////////////////////////////////
+
+        movz x15, #:gottprel_g1:var
+// CHECK: movz    x15, #:gottprel_g1:var  // encoding: [0bAAA01111,A,0b101AAAAA,0x92]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :gottprel_g1:var, kind: fixup_arm64_movw
+
+// CHECK-ELF:     {{0x[0-9A-F]+}} R_AARCH64_TLSIE_MOVW_GOTTPREL_G1 [[VARSYM:[^ ]+]]
+
+
+        movk x13, #:gottprel_g0_nc:var
+// CHECK: movk    x13, #:gottprel_g0_nc:var // encoding: [0bAAA01101,A,0b100AAAAA,0xf2]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :gottprel_g0_nc:var, kind: fixup_arm64_movw
+
+
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC [[VARSYM]]
+
+        adrp x11, :gottprel:var
+        ldr x10, [x0, #:gottprel_lo12:var]
+        ldr x9, :gottprel:var
+// CHECK: adrp    x11, :gottprel:var      // encoding: [0x0b'A',A,A,0x90'A']
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :gottprel:var, kind: fixup_arm64_pcrel_adrp_imm21
+// CHECK: ldr     x10, [x0, :gottprel_lo12:var] // encoding: [0x0a,0bAAAAAA00,0b01AAAAAA,0xf9]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :gottprel_lo12:var, kind: fixup_arm64_ldst_imm12_scale8
+// CHECK: ldr     x9, :gottprel:var       // encoding: [0bAAA01001,A,A,0x58]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :gottprel:var, kind: fixup_arm64_pcrel_imm19
+
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 [[VARSYM]]
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC [[VARSYM]]
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSIE_LD_GOTTPREL_PREL19 [[VARSYM]]
+
+
+////////////////////////////////////////////////////////////////////////////////
+// TLS local-exec forms
+////////////////////////////////////////////////////////////////////////////////
+
+        movz x3, #:tprel_g2:var
+        movn x4, #:tprel_g2:var
+// CHECK: movz    x3, #:tprel_g2:var      // encoding: [0bAAA00011,A,0b110AAAAA,0x92]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :tprel_g2:var, kind: fixup_arm64_movw
+// CHECK: movn    x4, #:tprel_g2:var      // encoding: [0bAAA00100,A,0b110AAAAA,0x92]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :tprel_g2:var, kind: fixup_arm64_movw
+
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSLE_MOVW_TPREL_G2 [[VARSYM]]
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSLE_MOVW_TPREL_G2 [[VARSYM]]
+
+
+        movz x5, #:tprel_g1:var
+        movn x6, #:tprel_g1:var
+        movz w7, #:tprel_g1:var
+// CHECK: movz    x5, #:tprel_g1:var      // encoding: [0bAAA00101,A,0b101AAAAA,0x92]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :tprel_g1:var, kind: fixup_arm64_movw
+// CHECK: movn    x6, #:tprel_g1:var      // encoding: [0bAAA00110,A,0b101AAAAA,0x92]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :tprel_g1:var, kind: fixup_arm64_movw
+// CHECK: movz    w7, #:tprel_g1:var      // encoding: [0bAAA00111,A,0b101AAAAA,0x12]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :tprel_g1:var, kind: fixup_arm64_movw
+
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSLE_MOVW_TPREL_G1 [[VARSYM]]
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSLE_MOVW_TPREL_G1 [[VARSYM]]
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSLE_MOVW_TPREL_G1 [[VARSYM]]
+
+
+        movk x9, #:tprel_g1_nc:var
+        movk w10, #:tprel_g1_nc:var
+// CHECK: movk    x9, #:tprel_g1_nc:var   // encoding: [0bAAA01001,A,0b101AAAAA,0xf2]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :tprel_g1_nc:var, kind: fixup_arm64_movw
+// CHECK: movk    w10, #:tprel_g1_nc:var  // encoding: [0bAAA01010,A,0b101AAAAA,0x72]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :tprel_g1_nc:var, kind: fixup_arm64_movw
+
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSLE_MOVW_TPREL_G1_NC [[VARSYM]]
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSLE_MOVW_TPREL_G1_NC [[VARSYM]]
+
+
+        movz x11, #:tprel_g0:var
+        movn x12, #:tprel_g0:var
+        movz w13, #:tprel_g0:var
+// CHECK: movz    x11, #:tprel_g0:var     // encoding: [0bAAA01011,A,0b100AAAAA,0x92]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :tprel_g0:var, kind: fixup_arm64_movw
+// CHECK: movn    x12, #:tprel_g0:var     // encoding: [0bAAA01100,A,0b100AAAAA,0x92]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :tprel_g0:var, kind: fixup_arm64_movw
+// CHECK: movz    w13, #:tprel_g0:var     // encoding: [0bAAA01101,A,0b100AAAAA,0x12]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :tprel_g0:var, kind: fixup_arm64_movw
+
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSLE_MOVW_TPREL_G0 [[VARSYM]]
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSLE_MOVW_TPREL_G0 [[VARSYM]]
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSLE_MOVW_TPREL_G0 [[VARSYM]]
+
+
+        movk x15, #:tprel_g0_nc:var
+        movk w16, #:tprel_g0_nc:var
+// CHECK: movk    x15, #:tprel_g0_nc:var  // encoding: [0bAAA01111,A,0b100AAAAA,0xf2]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :tprel_g0_nc:var, kind: fixup_arm64_movw
+// CHECK: movk    w16, #:tprel_g0_nc:var  // encoding: [0bAAA10000,A,0b100AAAAA,0x72]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :tprel_g0_nc:var, kind: fixup_arm64_movw
+
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSLE_MOVW_TPREL_G0_NC [[VARSYM]]
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSLE_MOVW_TPREL_G0_NC [[VARSYM]]
+
+
+        add x21, x22, #:tprel_lo12:var
+// CHECK: add     x21, x22, :tprel_lo12:var // encoding: [0xd5,0bAAAAAA10,0b00AAAAAA,0x91]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :tprel_lo12:var, kind: fixup_arm64_add_imm12
+
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSLE_ADD_TPREL_LO12 [[VARSYM]]
+
+
+        add x25, x26, #:tprel_lo12_nc:var
+// CHECK: add     x25, x26, :tprel_lo12_nc:var // encoding: [0x59,0bAAAAAA11,0b00AAAAAA,0x91]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :tprel_lo12_nc:var, kind: fixup_arm64_add_imm12
+
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSLE_ADD_TPREL_LO12_NC [[VARSYM]]
+
+
+        ldrb w29, [x30, #:tprel_lo12:var]
+        ldrsb x29, [x28, #:tprel_lo12_nc:var]
+// CHECK: ldrb    w29, [lr, :tprel_lo12:var] // encoding: [0xdd,0bAAAAAA11,0b01AAAAAA,0x39]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :tprel_lo12:var, kind: fixup_arm64_ldst_imm12_scale1
+// CHECK: ldrsb   fp, [x28, :tprel_lo12_nc:var] // encoding: [0x9d,0bAAAAAA11,0b10AAAAAA,0x39]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :tprel_lo12_nc:var, kind: fixup_arm64_ldst_imm12_scale1
+
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSLE_LDST8_TPREL_LO12 [[VARSYM]]
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC [[VARSYM]]
+
+
+        strh w27, [x26, #:tprel_lo12:var]
+        ldrsh x25, [x24, #:tprel_lo12_nc:var]
+// CHECK: strh    w27, [x26, :tprel_lo12:var] // encoding: [0x5b,0bAAAAAA11,0b00AAAAAA,0x79]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :tprel_lo12:var, kind: fixup_arm64_ldst_imm12_scale2
+// CHECK: ldrsh   x25, [x24, :tprel_lo12_nc:var] // encoding: [0x19,0bAAAAAA11,0b10AAAAAA,0x79]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :tprel_lo12_nc:var, kind: fixup_arm64_ldst_imm12_scale2
+
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSLE_LDST16_TPREL_LO12 [[VARSYM]]
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC [[VARSYM]]
+
+
+        ldr w23, [x22, #:tprel_lo12:var]
+        ldrsw x21, [x20, #:tprel_lo12_nc:var]
+// CHECK: ldr     w23, [x22, :tprel_lo12:var] // encoding: [0xd7,0bAAAAAA10,0b01AAAAAA,0xb9]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :tprel_lo12:var, kind: fixup_arm64_ldst_imm12_scale4
+// CHECK: ldrsw   x21, [x20, :tprel_lo12_nc:var] // encoding: [0x95,0bAAAAAA10,0b10AAAAAA,0xb9]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :tprel_lo12_nc:var, kind: fixup_arm64_ldst_imm12_scale4
+
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSLE_LDST32_TPREL_LO12 [[VARSYM]]
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC [[VARSYM]]
+
+        ldr x19, [x18, #:tprel_lo12:var]
+        str x17, [x16, #:tprel_lo12_nc:var]
+// CHECK: ldr     x19, [x18, :tprel_lo12:var] // encoding: [0x53,0bAAAAAA10,0b01AAAAAA,0xf9]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :tprel_lo12:var, kind: fixup_arm64_ldst_imm12_scale8
+// CHECK: str     x17, [x16, :tprel_lo12_nc:var] // encoding: [0x11,0bAAAAAA10,0b00AAAAAA,0xf9]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :tprel_lo12_nc:var, kind: fixup_arm64_ldst_imm12_scale8
+
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSLE_LDST64_TPREL_LO12 [[VARSYM]]
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC [[VARSYM]]
+
+
+////////////////////////////////////////////////////////////////////////////////
+// TLS local-dynamic forms
+////////////////////////////////////////////////////////////////////////////////
+
+        movz x3, #:dtprel_g2:var
+        movn x4, #:dtprel_g2:var
+// CHECK: movz    x3, #:dtprel_g2:var      // encoding: [0bAAA00011,A,0b110AAAAA,0x92]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :dtprel_g2:var, kind: fixup_arm64_movw
+// CHECK: movn    x4, #:dtprel_g2:var      // encoding: [0bAAA00100,A,0b110AAAAA,0x92]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :dtprel_g2:var, kind: fixup_arm64_movw
+
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSLD_MOVW_DTPREL_G2 [[VARSYM]]
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSLD_MOVW_DTPREL_G2 [[VARSYM]]
+
+
+        movz x5, #:dtprel_g1:var
+        movn x6, #:dtprel_g1:var
+        movz w7, #:dtprel_g1:var
+// CHECK: movz    x5, #:dtprel_g1:var      // encoding: [0bAAA00101,A,0b101AAAAA,0x92]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :dtprel_g1:var, kind: fixup_arm64_movw
+// CHECK: movn    x6, #:dtprel_g1:var      // encoding: [0bAAA00110,A,0b101AAAAA,0x92]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :dtprel_g1:var, kind: fixup_arm64_movw
+// CHECK: movz    w7, #:dtprel_g1:var      // encoding: [0bAAA00111,A,0b101AAAAA,0x12]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :dtprel_g1:var, kind: fixup_arm64_movw
+
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSLD_MOVW_DTPREL_G1 [[VARSYM]]
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSLD_MOVW_DTPREL_G1 [[VARSYM]]
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSLD_MOVW_DTPREL_G1 [[VARSYM]]
+
+
+        movk x9, #:dtprel_g1_nc:var
+        movk w10, #:dtprel_g1_nc:var
+// CHECK: movk    x9, #:dtprel_g1_nc:var   // encoding: [0bAAA01001,A,0b101AAAAA,0xf2]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :dtprel_g1_nc:var, kind: fixup_arm64_movw
+// CHECK: movk    w10, #:dtprel_g1_nc:var  // encoding: [0bAAA01010,A,0b101AAAAA,0x72]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :dtprel_g1_nc:var, kind: fixup_arm64_movw
+
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC [[VARSYM]]
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC [[VARSYM]]
+
+
+        movz x11, #:dtprel_g0:var
+        movn x12, #:dtprel_g0:var
+        movz w13, #:dtprel_g0:var
+// CHECK: movz    x11, #:dtprel_g0:var     // encoding: [0bAAA01011,A,0b100AAAAA,0x92]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :dtprel_g0:var, kind: fixup_arm64_movw
+// CHECK: movn    x12, #:dtprel_g0:var     // encoding: [0bAAA01100,A,0b100AAAAA,0x92]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :dtprel_g0:var, kind: fixup_arm64_movw
+// CHECK: movz    w13, #:dtprel_g0:var     // encoding: [0bAAA01101,A,0b100AAAAA,0x12]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :dtprel_g0:var, kind: fixup_arm64_movw
+
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSLD_MOVW_DTPREL_G0 [[VARSYM]]
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSLD_MOVW_DTPREL_G0 [[VARSYM]]
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSLD_MOVW_DTPREL_G0 [[VARSYM]]
+
+
+        movk x15, #:dtprel_g0_nc:var
+        movk w16, #:dtprel_g0_nc:var
+// CHECK: movk    x15, #:dtprel_g0_nc:var  // encoding: [0bAAA01111,A,0b100AAAAA,0xf2]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :dtprel_g0_nc:var, kind: fixup_arm64_movw
+// CHECK: movk    w16, #:dtprel_g0_nc:var  // encoding: [0bAAA10000,A,0b100AAAAA,0x72]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :dtprel_g0_nc:var, kind: fixup_arm64_movw
+
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSLD_MOVW_DTPREL_G0_NC [[VARSYM]]
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSLD_MOVW_DTPREL_G0_NC [[VARSYM]]
+
+
+        add x21, x22, #:dtprel_lo12:var
+// CHECK: add     x21, x22, :dtprel_lo12:var // encoding: [0xd5,0bAAAAAA10,0b00AAAAAA,0x91]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :dtprel_lo12:var, kind: fixup_arm64_add_imm12
+
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSLD_ADD_DTPREL_LO12 [[VARSYM]]
+
+
+        add x25, x26, #:dtprel_lo12_nc:var
+// CHECK: add     x25, x26, :dtprel_lo12_nc:var // encoding: [0x59,0bAAAAAA11,0b00AAAAAA,0x91]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :dtprel_lo12_nc:var, kind: fixup_arm64_add_imm12
+
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC [[VARSYM]]
+
+
+        ldrb w29, [x30, #:dtprel_lo12:var]
+        ldrsb x29, [x28, #:dtprel_lo12_nc:var]
+// CHECK: ldrb    w29, [lr, :dtprel_lo12:var] // encoding: [0xdd,0bAAAAAA11,0b01AAAAAA,0x39]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :dtprel_lo12:var, kind: fixup_arm64_ldst_imm12_scale1
+// CHECK: ldrsb   fp, [x28, :dtprel_lo12_nc:var] // encoding: [0x9d,0bAAAAAA11,0b10AAAAAA,0x39]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :dtprel_lo12_nc:var, kind: fixup_arm64_ldst_imm12_scale1
+
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSLD_LDST8_DTPREL_LO12 [[VARSYM]]
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC [[VARSYM]]
+
+
+        strh w27, [x26, #:dtprel_lo12:var]
+        ldrsh x25, [x24, #:dtprel_lo12_nc:var]
+// CHECK: strh    w27, [x26, :dtprel_lo12:var] // encoding: [0x5b,0bAAAAAA11,0b00AAAAAA,0x79]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :dtprel_lo12:var, kind: fixup_arm64_ldst_imm12_scale2
+// CHECK: ldrsh   x25, [x24, :dtprel_lo12_nc:var] // encoding: [0x19,0bAAAAAA11,0b10AAAAAA,0x79]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :dtprel_lo12_nc:var, kind: fixup_arm64_ldst_imm12_scale2
+
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSLD_LDST16_DTPREL_LO12 [[VARSYM]]
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC [[VARSYM]]
+
+
+        ldr w23, [x22, #:dtprel_lo12:var]
+        ldrsw x21, [x20, #:dtprel_lo12_nc:var]
+// CHECK: ldr     w23, [x22, :dtprel_lo12:var] // encoding: [0xd7,0bAAAAAA10,0b01AAAAAA,0xb9]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :dtprel_lo12:var, kind: fixup_arm64_ldst_imm12_scale4
+// CHECK: ldrsw   x21, [x20, :dtprel_lo12_nc:var] // encoding: [0x95,0bAAAAAA10,0b10AAAAAA,0xb9]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :dtprel_lo12_nc:var, kind: fixup_arm64_ldst_imm12_scale4
+
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSLD_LDST32_DTPREL_LO12 [[VARSYM]]
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC [[VARSYM]]
+
+        ldr x19, [x18, #:dtprel_lo12:var]
+        str x17, [x16, #:dtprel_lo12_nc:var]
+// CHECK: ldr     x19, [x18, :dtprel_lo12:var] // encoding: [0x53,0bAAAAAA10,0b01AAAAAA,0xf9]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :dtprel_lo12:var, kind: fixup_arm64_ldst_imm12_scale8
+// CHECK: str     x17, [x16, :dtprel_lo12_nc:var] // encoding: [0x11,0bAAAAAA10,0b00AAAAAA,0xf9]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :dtprel_lo12_nc:var, kind: fixup_arm64_ldst_imm12_scale8
+
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSLD_LDST64_DTPREL_LO12 [[VARSYM]]
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC [[VARSYM]]
+
+////////////////////////////////////////////////////////////////////////////////
+// TLS descriptor forms
+////////////////////////////////////////////////////////////////////////////////
+
+        adrp x8, :tlsdesc:var
+        ldr x7, [x6, #:tlsdesc_lo12:var]
+        add x5, x4, #:tlsdesc_lo12:var
+        .tlsdesccall var
+        blr x3
+
+// CHECK: adrp    x8, :tlsdesc:var        // encoding: [0x08'A',A,A,0x90'A']
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :tlsdesc:var, kind: fixup_arm64_pcrel_adrp_imm21
+// CHECK: ldr     x7, [x6, :tlsdesc_lo12:var] // encoding: [0xc7,0bAAAAAA00,0b01AAAAAA,0xf9]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :tlsdesc_lo12:var, kind: fixup_arm64_ldst_imm12_scale8
+// CHECK: add     x5, x4, :tlsdesc_lo12:var // encoding: [0x85,0bAAAAAA00,0b00AAAAAA,0x91]
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: :tlsdesc_lo12:var, kind: fixup_arm64_add_imm12
+// CHECK: .tlsdesccall var                // encoding: []
+// CHECK-NEXT:                                 //   fixup A - offset: 0, value: var, kind: fixup_arm64_tlsdesc_call
+// CHECK: blr     x3                      // encoding: [0x60,0x00,0x3f,0xd6]
+
+
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSDESC_ADR_PAGE [[VARSYM]]
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSDESC_LD64_LO12_NC [[VARSYM]]
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSDESC_ADD_LO12_NC [[VARSYM]]
+// CHECK-ELF-NEXT:     {{0x[0-9A-F]+}} R_AARCH64_TLSDESC_CALL [[VARSYM]]
+
+        // Make sure symbol 5 has type STT_TLS:
+
+// CHECK-ELF:      Symbols [
+// CHECK-ELF:        Symbol {
+// CHECK-ELF:          Name: var (6)
+// CHECK-ELF-NEXT:     Value:
+// CHECK-ELF-NEXT:     Size:
+// CHECK-ELF-NEXT:     Binding: Global
+// CHECK-ELF-NEXT:     Type: TLS
diff --git a/test/MC/ARM64/variable-exprs.s b/test/MC/ARM64/variable-exprs.s
new file mode 100644
index 0000000..0120442
--- /dev/null
+++ b/test/MC/ARM64/variable-exprs.s
@@ -0,0 +1,40 @@
+// RUN: llvm-mc -triple arm64-apple-darwin10 %s -filetype=obj -o %t.o
+
+.data
+
+        .long 0
+a:
+        .long 0
+b = a
+
+c:      .long b
+
+d2 = d
+.globl d2
+d3 = d + 4
+.globl d3
+
+e = a + 4
+
+g:
+f = g
+        .long 0
+
+        .long b
+        .long e
+        .long a + 4
+        .long d
+        .long d2
+        .long d3
+        .long f
+        .long g
+
+///
+        .text
+t0:
+Lt0_a:
+        .long 0
+
+	.section	__DWARF,__debug_frame,regular,debug
+Lt1 = Lt0_a
+	.long	Lt1
diff --git a/test/MC/AsmParser/conditional_asm.s b/test/MC/AsmParser/conditional_asm.s
index f619ef9..b9bee33 100644
--- a/test/MC/AsmParser/conditional_asm.s
+++ b/test/MC/AsmParser/conditional_asm.s
@@ -10,3 +10,12 @@
         .byte 0
     .endif
 .endif
+
+# CHECK: .byte 1
+# CHECK-NOT: .byte 0
+.ifne 32 - 32
+	.byte 0
+.else
+	.byte 1
+.endif
+
diff --git a/test/MC/AsmParser/directive-err-diagnostics.s b/test/MC/AsmParser/directive-err-diagnostics.s
new file mode 100644
index 0000000..ccc5450
--- /dev/null
+++ b/test/MC/AsmParser/directive-err-diagnostics.s
@@ -0,0 +1,17 @@
+// RUN: not llvm-mc -triple i386 %s 2>&1 | FileCheck %s
+
+	.error 0
+// CHECK: error: .error argument must be a string
+// CHECK:	.error 0
+// CHECK:              ^
+
+	.ifeqs "0", "1"
+		.ifeqs "", ""
+			.error "message"
+		.endif
+	.endif
+// CHECK-NOT: error: message
+// CHECK-NOT: error: invalid instruction mnemonic 'message'
+// CHECK-NOT:	.error "message"
+// CHECK-NOT:          ^
+
diff --git a/test/MC/AsmParser/directive-err.s b/test/MC/AsmParser/directive-err.s
new file mode 100644
index 0000000..63b8939
--- /dev/null
+++ b/test/MC/AsmParser/directive-err.s
@@ -0,0 +1,30 @@
+// RUN: not llvm-mc -triple i386 %s 2>&1 | FileCheck %s
+
+	.err
+// CHECK: error: .err encountered
+// CHECK-NEXT: 	.err
+// CHECK-NEXT:  ^
+
+	.ifc a,a
+		.err
+	.endif
+// CHECK: error: .err encountered
+// CHECK-NEXT:		.err
+// CHECK-NEXT:          ^
+
+	.ifnc a,a
+		.err
+	.endif
+// CHECK-NOT: error: .err encountered
+
+	.error "This is my error.  There are many like it, but this one is mine."
+// CHECK: error: This is my error.  There are many like it, but this one is mine.
+
+	.ifc one, two
+		.error "My error is my best friend."
+	.endif
+// CHECK-NOT: error: My error is my best friend.
+
+	.error
+// CHECK: error: .error directive invoked in source file
+
diff --git a/test/MC/AsmParser/directive_end-2.s b/test/MC/AsmParser/directive_end-2.s
new file mode 100644
index 0000000..96188da
--- /dev/null
+++ b/test/MC/AsmParser/directive_end-2.s
@@ -0,0 +1,14 @@
+# RUN: llvm-mc -triple i386-unknown-unknown %s -I %p -filetype obj -o - \
+# RUN:   | llvm-readobj -t | FileCheck %s
+
+rock:
+    movl $42, %eax
+
+.include "directive_end.s"
+
+hard_place:
+    movl $42, %ebx
+
+# CHECK: Symbol {
+# CHECK:   Name: rock
+# CHECK-NOT:   Name: hard_place
diff --git a/test/MC/AsmParser/directive_end.s b/test/MC/AsmParser/directive_end.s
new file mode 100644
index 0000000..ec43cad
--- /dev/null
+++ b/test/MC/AsmParser/directive_end.s
@@ -0,0 +1,11 @@
+# RUN: llvm-mc -triple i386-unknown-unknown %s -filetype obj -o - \
+# RUN:   | llvm-readobj -t | FileCheck %s
+
+	.end
+
+its_a_tarp:
+	int $0x3
+
+# CHECK: Symbol {
+# CHECK-NOT:   Name: its_a_tarp
+
diff --git a/test/MC/AsmParser/directive_fill.s b/test/MC/AsmParser/directive_fill.s
index bb3ced0..28d7fa2 100644
--- a/test/MC/AsmParser/directive_fill.s
+++ b/test/MC/AsmParser/directive_fill.s
@@ -1,4 +1,5 @@
-# RUN: llvm-mc -triple i386-unknown-unknown %s | FileCheck %s
+# RUN: llvm-mc -triple i386-unknown-unknown %s 2> %t.err | FileCheck %s
+# RUN: FileCheck --check-prefix=CHECK-WARNINGS %s < %t.err
 
 # CHECK: TEST0:
 # CHECK: .byte 10
@@ -12,7 +13,8 @@ TEST1:
         .fill 2, 2, 3
 
 # CHECK: TEST2:
-# CHECK: .quad 4
+# CHECK: .long 4
+# CHECK: .long 0
 TEST2:  
         .fill 1, 8, 4
 
@@ -31,3 +33,43 @@ TEST3:
 # CHECK: .short 0
 TEST4:
 	.fill 4, 2
+
+# CHECK: TEST5
+# CHECK: .short  2
+# CHECK: .byte   0
+# CHECK: .short  2
+# CHECK: .byte   0
+# CHECK: .short  2
+# CHECK: .byte   0
+# CHECK: .short  2
+# CHECK: .byte   0
+TEST5:
+	.fill 4, 3, 2
+
+# CHECK: TEST6
+# CHECK: .long 2
+# CHECK: .long 0
+# CHECK-WARNINGS: '.fill' directive with size greater than 8 has been truncated to 8
+TEST6:
+	.fill 1, 9, 2
+
+# CHECK: TEST7
+# CHECK: .long 0
+# CHECK: .long 0
+# CHECK-WARNINGS: '.fill' directive pattern has been truncated to 32-bits
+TEST7:
+	.fill 1, 8, 1<<32
+
+# CHECK-WARNINGS: '.fill' directive with negative repeat count has no effect
+TEST8:
+	.fill -1, 8, 1
+
+# CHECK-WARNINGS: '.fill' directive with negative size has no effect
+TEST9:
+	.fill 1, -1, 1
+
+# CHECK: TEST10
+# CHECK: .short  22136
+# CHECK: .byte   52
+TEST10:
+	.fill 1, 3, 0x12345678
diff --git a/test/MC/AsmParser/directive_loc.s b/test/MC/AsmParser/directive_loc.s
index 700a32c..cda9579 100644
--- a/test/MC/AsmParser/directive_loc.s
+++ b/test/MC/AsmParser/directive_loc.s
@@ -1,9 +1,14 @@
-# RUN: llvm-mc -triple i386-unknown-unknown %s
-# FIXME: Actually test the output.
+# RUN: llvm-mc -triple i386-unknown-unknown %s | FileCheck %s
 
         .file 1 "hello"
+# CHECK: .file 1 "hello"
         .loc 1
         .loc 1 2
+# CHECK: .loc 1 2 0
         .loc 1 2 3
+# CHECK: .loc 1 2 3
         .loc 1 2 discriminator 1
+# CHECK: 1 2 0 discriminator 1
+        .loc 1 2 0 isa 3
+# CHECK: 1 2 0 isa 3
         .loc 1 0
diff --git a/test/MC/AsmParser/directive_rept-diagnostics.s b/test/MC/AsmParser/directive_rept-diagnostics.s
new file mode 100644
index 0000000..cbef158
--- /dev/null
+++ b/test/MC/AsmParser/directive_rept-diagnostics.s
@@ -0,0 +1,41 @@
+# RUN: not llvm-mc -triple i686-elf -filetype asm -o /dev/null %s 2>&1 \
+# RUN:   | FileCheck %s
+
+	.data
+
+	.global invalid_expression
+	.type invalid_expression,@object
+invalid_expression:
+	.rept *
+
+# CHECK: error: unknown token in expression
+# CHECK: 	.rept *
+# CHECK:              ^
+
+	.global bad_token
+	.type bad_token,@object
+bad_token:
+	.rept bad_token
+
+# CHECK: error: unexpected token in '.rept' directive
+# CHECK: 	.rept bad_token
+# CHECK:              ^
+
+	.global negative
+	.type negative,@object
+negative:
+	.rept -32
+
+# CHECK: error: Count is negative
+# CHECK: 	.rept -32
+# CHECK:              ^
+
+	.global trailer
+	.type trailer,@object
+trailer:
+	.rep 0 trailer
+
+# CHECK: error: unexpected token in '.rep' directive
+# CHECK: 	.rep 0 trailer
+# CHECK:               ^
+
diff --git a/test/MC/AsmParser/directive_rept.s b/test/MC/AsmParser/directive_rept.s
new file mode 100644
index 0000000..4f8ed7c
--- /dev/null
+++ b/test/MC/AsmParser/directive_rept.s
@@ -0,0 +1,30 @@
+# RUN: llvm-mc -triple i686-elf -filetype asm -o - %s | FileCheck %s
+
+	.data
+
+	.global two_bad_calls
+	.type two_bad_calls,@function
+two_bad_calls:
+	.rept 2
+	.long 0xbadca11
+	.endr
+
+# CHECK-LABEL: two_bad_calls
+# CHECK: .long	195938833
+# CHECK: .long	195938833
+
+	.global half_a_dozen_daffodils
+	.type half_a_dozen_daffodils,@function
+half_a_dozen_daffodils:
+	.rep 6
+	.long 0xdaff0d11
+	.endr
+
+# CHECK-LABEL: half_a_dozen_daffodils
+# CHECK: .long	3674148113
+# CHECK: .long	3674148113
+# CHECK: .long	3674148113
+# CHECK: .long	3674148113
+# CHECK: .long	3674148113
+# CHECK: .long	3674148113
+
diff --git a/test/MC/AsmParser/directive_values.s b/test/MC/AsmParser/directive_values.s
index ed932b2..6941a1a 100644
--- a/test/MC/AsmParser/directive_values.s
+++ b/test/MC/AsmParser/directive_values.s
@@ -69,3 +69,15 @@ TEST8:
         .long 0x200000L+1
 # CHECK: .long 2097153
 # CHECK: .long 2097153
+
+TEST9:
+	.octa 0x1234567812345678abcdef, 340282366920938463463374607431768211455
+	.octa 0b00111010010110100101101001011010010110100101101001011010010110100101101001011010010110100101101001011010010110100101101001011010
+# CHECK: TEST9
+# CHECK: .quad 8652035380128501231
+# CHECK: .quad 1193046
+# CHECK: .quad -1
+# CHECK: .quad -1
+# CHECK: .quad 6510615555426900570
+# CHECK: .quad 4204772546213206618
+
diff --git a/test/MC/AsmParser/dot-symbol-assignment-backwards.s b/test/MC/AsmParser/dot-symbol-assignment-backwards.s
new file mode 100644
index 0000000..2619788
--- /dev/null
+++ b/test/MC/AsmParser/dot-symbol-assignment-backwards.s
@@ -0,0 +1,12 @@
+# RUN: not llvm-mc -filetype=obj -triple i386-unknown-unknown %s 2> %t
+# RUN: FileCheck -input-file %t %s
+
+. = 0x10
+	.byte 1
+
+. = . + 10
+	.byte 2
+
+# CHECK: LLVM ERROR: invalid .org offset '24' (at offset '28')
+. = 0x18
+	.byte 3
diff --git a/test/MC/AsmParser/dot-symbol-assignment.s b/test/MC/AsmParser/dot-symbol-assignment.s
new file mode 100644
index 0000000..65651d7
--- /dev/null
+++ b/test/MC/AsmParser/dot-symbol-assignment.s
@@ -0,0 +1,31 @@
+# RUN: llvm-mc -triple i386-unknown-unknown %s | FileCheck %s
+
+	.extern	start
+
+# CHECK: .org 1024, 0
+. = 0x400
+	lgdt	0x400 + 0x100
+
+	ljmpl	$0x08, $(0x400 + 0x150)
+
+
+# CHECK: .org 1280, 0
+. = 0x400 + 0x100
+	.word	(3*8)-1
+	.quad	(0x400 + 0x110)
+
+# CHECK: .org 1296, 0
+. = 0x400 + 0x110
+	.quad	0x0
+	.quad	0x0020980000000000
+	.quad	0x0000900000000000
+
+	.code64
+
+# CHECK: .org 1360, 0
+. = 0x400 + 0x150
+	movabsq	$start, %rcx
+	jmp	*%rcx
+
+
+. = 0x300
diff --git a/test/MC/AsmParser/dot-symbol-non-absolute.s b/test/MC/AsmParser/dot-symbol-non-absolute.s
new file mode 100644
index 0000000..7342365
--- /dev/null
+++ b/test/MC/AsmParser/dot-symbol-non-absolute.s
@@ -0,0 +1,9 @@
+# RUN: not llvm-mc -filetype=obj -triple i386-unknown-unknown %s 2> %t
+# RUN: FileCheck -input-file %t %s
+
+
+	.extern foo
+
+# CHECK: error: expected absolute expression
+. = foo + 10
+	.byte 1
diff --git a/test/MC/AsmParser/dot-symbol.s b/test/MC/AsmParser/dot-symbol.s
index 4a38a40..4bae323 100644
--- a/test/MC/AsmParser/dot-symbol.s
+++ b/test/MC/AsmParser/dot-symbol.s
@@ -1,12 +1,9 @@
 # Historically 'as' treats '.' as a reference to the current location in
-# arbitrary contects. We don't support this in general.
+# arbitrary contexts. We don't support this in general.
 
 # RUN: not llvm-mc -triple i386-unknown-unknown %s 2> %t
 # RUN: FileCheck -input-file %t %s
 
-# CHECK: assignment to pseudo-symbol '.' is unsupported (use '.space' or '.org').
-. = . + 8
-
 # CHECK: invalid use of pseudo-symbol '.' as a label
 .:
         .long 0
diff --git a/test/MC/AsmParser/exprs.s b/test/MC/AsmParser/exprs.s
index a7e1002..c5fc9b5 100644
--- a/test/MC/AsmParser/exprs.s
+++ b/test/MC/AsmParser/exprs.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -triple i386-unknown-unknown %s > %t
+// RUN: llvm-mc -triple i386-apple-darwin %s
 
 .macro check_expr
   .if ($0) != ($1)
diff --git a/test/MC/AsmParser/ifc.s b/test/MC/AsmParser/ifc.s
index 20e55c0..24944a2 100644
--- a/test/MC/AsmParser/ifc.s
+++ b/test/MC/AsmParser/ifc.s
@@ -63,3 +63,8 @@
 .else
 	.byte 0
 .endif
+
+# CHECK-NOT: .byte 0
+# CHECK: .byte 1
+.ifnc equal, equal ; .byte 0 ; .else ; .byte 1 ; .endif
+
diff --git a/test/MC/AsmParser/ifeqs-diagnostics.s b/test/MC/AsmParser/ifeqs-diagnostics.s
new file mode 100644
index 0000000..1e5e8c3
--- /dev/null
+++ b/test/MC/AsmParser/ifeqs-diagnostics.s
@@ -0,0 +1,22 @@
+// RUN: not llvm-mc -triple i386 %s -o /dev/null 2>&1 | FileCheck %s
+
+.ifeqs
+
+// CHECK: error: expected string parameter for '.ifeqs' directive
+// CHECK: .ifeqs
+// CHECK:       ^
+
+.ifeqs "string1"
+
+// CHECK: error: expected comma after first string for '.ifeqs' directive
+// CHECK: .ifeqs "string1"
+// CHECK:                 ^
+
+.ifeqs "string1",
+
+// CHECK: error: expected string parameter for '.ifeqs' directive
+// CHECK: .ifeqs "string1",
+// CHECK:                  ^
+
+// CHECK-NOT: error: unmatched .ifs or .elses
+
diff --git a/test/MC/AsmParser/ifeqs.s b/test/MC/AsmParser/ifeqs.s
new file mode 100644
index 0000000..05a26a2
--- /dev/null
+++ b/test/MC/AsmParser/ifeqs.s
@@ -0,0 +1,20 @@
+// RUN: llvm-mc -triple i386 %s | FileCheck %s
+
+.ifeqs "alpha", "alpha"
+	.byte 1
+.else
+	.byte 0
+.endif
+
+// CHECK-NOT: .byte 0
+// CHECK: .byte 1
+
+.ifeqs "alpha", "alpha "
+	.byte 0
+.else
+	.byte 1
+.endif
+
+// CHECK-NOT: .byte 0
+// CHECK: .byte 1
+
diff --git a/test/MC/AsmParser/macro-def-in-instantiation.s b/test/MC/AsmParser/macro-def-in-instantiation.s
index b6483b3..773df70 100644
--- a/test/MC/AsmParser/macro-def-in-instantiation.s
+++ b/test/MC/AsmParser/macro-def-in-instantiation.s
@@ -11,3 +11,23 @@ $4
 .data
 // CHECK: .byte 10
 .mybyte 10
+
+// PR18599
+.macro macro_a
+
+.macro macro_b
+.byte 10
+.macro macro_c
+.endm
+
+macro_c
+.purgem macro_c
+.endm
+
+macro_b
+.endm
+
+macro_a
+macro_b
+// CHECK: .byte 10
+// CHECK: .byte 10
diff --git a/test/MC/AsmParser/macro-err1.s b/test/MC/AsmParser/macro-err1.s
index 924deb0..bd9c837 100644
--- a/test/MC/AsmParser/macro-err1.s
+++ b/test/MC/AsmParser/macro-err1.s
@@ -7,4 +7,4 @@
 
 foo 42,  42
 
-// CHECK: Too many arguments
+// CHECK: too many positional arguments
diff --git a/test/MC/AsmParser/macro-irp.s b/test/MC/AsmParser/macro-irp.s
index a368b74..2f26eab 100644
--- a/test/MC/AsmParser/macro-irp.s
+++ b/test/MC/AsmParser/macro-irp.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -triple x86_64-unknown-unknown %s | FileCheck %s
+// RUN: llvm-mc -triple i386-unknown-unknown %s | FileCheck %s
 
 .irp reg,%eax,%ebx
         pushl \reg
diff --git a/test/MC/AsmParser/macro-qualifier-diagnostics.s b/test/MC/AsmParser/macro-qualifier-diagnostics.s
new file mode 100644
index 0000000..4ebad2b
--- /dev/null
+++ b/test/MC/AsmParser/macro-qualifier-diagnostics.s
@@ -0,0 +1,64 @@
+# RUN: not llvm-mc -triple i386 -o /dev/null %s 2>&1 | FileCheck %s
+
+	.macro missing_qualifier parameter:
+
+# CHECK: error: missing parameter qualifier for 'parameter' in macro 'missing_qualifier'
+# CHECK: 	.macro missing_qualifier parameter:
+# CHECK:                                           ^
+
+	.macro non_identifier_qualifier parameter:0
+
+# CHECK: error: missing parameter qualifier for 'parameter' in macro 'non_identifier_qualifier'
+# CHECK: 	.macro non_identifier_qualifier parameter:0
+# CHECK:                                                  ^
+
+	.macro invalid_qualifier parameter:invalid_qualifier
+
+# CHECK: error: invalid_qualifier is not a valid parameter qualifier for 'parameter' in macro 'invalid_qualifier'
+# CHECK: 	.macro invalid_qualifier parameter:invalid_qualifier
+# CHECK:                                           ^
+
+	.macro pointless_default parameter:req=default
+	.endm
+
+# CHECK: warning: pointless default value for required parameter 'parameter' in macro 'pointless_default'
+# CHECK: 	.macro pointless_default parameter:req=default
+# CHECK:                                               ^
+
+	.macro missing_required_parameter parameter:req
+	.endm
+
+	missing_required_parameter
+
+# CHECK: error: missing value for required parameter 'parameter' in macro 'missing_required_parameter'
+# CHECK: 	missing_required_parameter
+# CHECK:                                  ^
+
+	.macro missing_second_required_argument first=0 second:req
+	.endm
+
+	missing_second_required_argument
+
+# CHECK: error: missing value for required parameter 'second' in macro 'missing_second_required_argument'
+# CHECK: 	missing_second_required_argument
+# CHECK:                                        ^
+
+	.macro second_third_required first=0 second:req third:req
+	.endm
+
+	second_third_required 0
+
+# CHECK: error: missing value for required parameter 'second' in macro 'second_third_required'
+# CHECK: 	second_third_required 0
+# CHECK:                               ^
+
+# CHECK: error: missing value for required parameter 'third' in macro 'second_third_required'
+# CHECK: 	second_third_required 0
+# CHECK:                               ^
+
+	second_third_required third=3 first=1
+
+# CHECK: error: missing value for required parameter 'second' in macro 'second_third_required'
+# CHECK: 	second_third_required third=3 first=1
+# CHECK:                                             ^
+
diff --git a/test/MC/AsmParser/macro-qualifier.s b/test/MC/AsmParser/macro-qualifier.s
new file mode 100644
index 0000000..7714e5c
--- /dev/null
+++ b/test/MC/AsmParser/macro-qualifier.s
@@ -0,0 +1,16 @@
+# RUN: llvm-mc -triple i386 -o - %s | FileCheck %s
+
+	.macro required parameter:req
+		.long \parameter
+	.endm
+
+	required 0
+# CHECK: .long 0
+
+	.macro required_with_default parameter:req=0
+		.long \parameter
+	.endm
+
+	required 1
+# CHECK: .long 1
+
diff --git a/test/MC/AsmParser/macros-argument-parsing-diagnostics.s b/test/MC/AsmParser/macros-argument-parsing-diagnostics.s
new file mode 100644
index 0000000..a1970e0
--- /dev/null
+++ b/test/MC/AsmParser/macros-argument-parsing-diagnostics.s
@@ -0,0 +1,24 @@
+# RUN: not llvm-mc -triple i386 -filetype asm -o /dev/null %s 2>&1 | FileCheck %s
+
+	.macro double first = -1, second = -1
+		# begin entry
+		.long \first
+		.long \second
+		# end entry
+	.endm
+
+	double 0, 1, 2
+# CHECK: error: too many positional arguments
+# CHECK: 	double 0, 1, 2
+# CHECK:                     ^
+
+	double second = 1, 2
+# CHECK: error: cannot mix positional and keyword arguments
+# CHECK: 	double second = 1, 2
+# CHECK:                           ^
+
+	double third = 0
+# CHECK: error: parameter named 'third' does not exist for macro 'double'
+# CHECK: 	double third = 0
+# CHECK:               ^
+
diff --git a/test/MC/AsmParser/macros-argument-parsing.s b/test/MC/AsmParser/macros-argument-parsing.s
new file mode 100644
index 0000000..39242cf
--- /dev/null
+++ b/test/MC/AsmParser/macros-argument-parsing.s
@@ -0,0 +1,91 @@
+# RUN: llvm-mc -triple i386 -filetype asm -o - %s | FileCheck %s
+
+	.macro	it, cond
+	.endm
+
+	it ne
+	.long 1
+
+# CHECK: .long 1
+
+	.macro double first = -1, second = -1
+		# begin entry
+		.long \first
+		.long \second
+		# end entry
+	.endm
+
+	double
+# CHECK: .long -1
+# CHECK: .long -1
+
+	double 1
+# CHECK: .long 1
+# CHECK: .long -1
+
+	double 2, 3
+# CHECK: .long 2
+# CHECK: .long 3
+
+	double , 4
+# CHECK: .long -1
+# CHECK: .long 4
+
+	double 5, second = 6
+# CHECK: .long 5
+# CHECK: .long 6
+
+	double first = 7
+# CHECK: .long 7
+# CHECK: .long -1
+
+	double second = 8
+# CHECK: .long -1
+# CHECK: .long 8
+
+	double second = 9, first = 10
+# CHECK: .long 10
+# CHECK: .long 9
+
+	double second + 11
+# CHECK: .long second+11
+# CHECK: .long -1
+
+	double , second + 12
+# CHECK: .long -1
+# CHECK: .long second+12
+
+	double second
+# CHECK: .long second
+# CHECK: .long -1
+
+	.macro mixed arg0 = 0, arg1 = 1 arg2 = 2, arg3 = 3
+		# begin entry
+		.long \arg0
+		.long \arg1
+		.long \arg2
+		.long \arg3
+		# end entry
+	.endm
+
+mixed 1, 2 3
+
+# CHECK: .long 1
+# CHECK: .long 2
+# CHECK: .long 3
+# CHECK: .long 3
+
+mixed 1 2, 3
+
+# CHECK: .long 1
+# CHECK: .long 2
+# CHECK: .long 3
+# CHECK: .long 3
+
+mixed 1 2, 3 4
+
+# CHECK: .long 1
+# CHECK: .long 2
+# CHECK: .long 3
+# CHECK: .long 4
+
diff --git a/test/MC/AsmParser/macros-darwin.s b/test/MC/AsmParser/macros-darwin.s
index 95965d3..e22038e 100644
--- a/test/MC/AsmParser/macros-darwin.s
+++ b/test/MC/AsmParser/macros-darwin.s
@@ -1,9 +1,93 @@
-// RUN: llvm-mc -triple i386-apple-darwin10 %s | FileCheck %s
+// RUN: not llvm-mc -triple i386-apple-darwin10 %s 2> %t.err | FileCheck %s
+// RUN: FileCheck --check-prefix=CHECK-ERRORS %s < %t.err
 
-.macro test1
+.macro .test0
+.macrobody0
+.endmacro
+.macro .test1
+.test0
+.endmacro
+
+.test1
+// CHECK-ERRORS: <instantiation>:1:1: error: unknown directive
+// CHECK-ERRORS-NEXT: macrobody0
+// CHECK-ERRORS-NEXT: ^
+// CHECK-ERRORS: <instantiation>:1:1: note: while in macro instantiation
+// CHECK-ERRORS-NEXT: .test0
+// CHECK-ERRORS-NEXT: ^
+// CHECK-ERRORS: 11:1: note: while in macro instantiation
+// CHECK-ERRORS-NEXT: .test1
+// CHECK-ERRORS-NEXT: ^
+
+.macro test2
+.byte $0
+.endmacro
+// CHECK: .byte 10
+test2 10
+
+.macro test3
 .globl "$0 $1 $2 $$3 $n"
 .endmacro
 
 // CHECK: .globl "1 23  $3 2"
-test1 1, 2 3
+test3 1, 2 3
+
+// CHECK: .globl	"1 (23)  $3 2"
+test3 1, (2 3)
+
+// CHECK: .globl "12  $3 1"
+test3 1 2
+
+.macro test4
+.globl "$0 -- $1"
+.endmacro
+
+// CHECK: .globl  "(ab)(,)) -- (cd)"
+test4 (a b)(,)),(cd)
+
+// CHECK: .globl  "(ab)(,)) -- (cd)"
+test4 (a b)(,)),(cd)
+
+.macro test5 _a
+.globl "\_a"
+.endm
+
+// CHECK: .globl zed1
+test5 zed1
+
+.macro test6 $a
+.globl "\$a"
+.endm
+
+// CHECK: .globl zed2
+test6 zed2
+
+.macro test7 .a
+.globl "\.a"
+.endm
+
+// CHECK: .globl zed3
+test7 zed3
+
+.macro test8 _a, _b, _c
+.globl "\_a,\_b,\_c"
+.endmacro
+
+.macro test9 _a _b _c
+.globl "\_a \_b \_c"
+.endmacro
+
+// CHECK: .globl  "a,b,c"
+test8 a, b, c
+// CHECK: .globl  "%1,%2,%3"
+test8 %1, %2, %3 #a comment
+// CHECK: .globl "x-y,z,1"
+test8 x - y, z, 1
+// CHECK: .globl  "1 2 3"
+test9 1, 2,3
+
+// CHECK: .globl "1,23,"
+test8 1,2 3
 
+// CHECK: .globl "12,3,"
+test8 1 2, 3
diff --git a/test/MC/AsmParser/macros-gas.s b/test/MC/AsmParser/macros-gas.s
new file mode 100644
index 0000000..d907a25
--- /dev/null
+++ b/test/MC/AsmParser/macros-gas.s
@@ -0,0 +1,105 @@
+// RUN: not llvm-mc -triple i386-linux-gnu %s 2> %t.err | FileCheck %s
+// RUN: FileCheck --check-prefix=CHECK-ERRORS %s < %t.err
+
+.macro .test0
+.macrobody0
+.endm
+.macro .test1
+.test0
+.endm
+
+.test1
+// CHECK-ERRORS: <instantiation>:1:1: error: unknown directive
+// CHECK-ERRORS-NEXT: macrobody0
+// CHECK-ERRORS-NEXT: ^
+// CHECK-ERRORS: <instantiation>:1:1: note: while in macro instantiation
+// CHECK-ERRORS-NEXT: .test0
+// CHECK-ERRORS-NEXT: ^
+// CHECK-ERRORS: 11:1: note: while in macro instantiation
+// CHECK-ERRORS-NEXT: .test1
+// CHECK-ERRORS-NEXT: ^
+
+.macro test2 _a
+.byte \_a
+.endm
+// CHECK: .byte 10
+test2 10
+
+.macro test3 _a _b _c
+.ascii "\_a \_b \_c \\_c"
+.endm
+
+// CHECK: .ascii "1 2 3 \003"
+test3 1, 2, 3
+
+// CHECK: .ascii "1 2 3 \003"
+test3 1, 2 3
+
+.macro test3_prime _a _b _c
+.ascii "\_a \_b \_c"
+.endm
+
+// CHECK: .ascii "1 (23) "
+test3_prime 1, (2 3)
+
+// CHECK: .ascii "1 (23) "
+test3_prime 1 (2 3)
+
+// CHECK: .ascii "1 2 "
+test3_prime 1 2
+
+.macro test5 _a
+.globl \_a
+.endm
+
+// CHECK: .globl zed1
+test5 zed1
+
+.macro test6 $a
+.globl \$a
+.endm
+
+// CHECK: .globl zed2
+test6 zed2
+
+.macro test7 .a
+.globl \.a
+.endm
+
+// CHECK: .globl zed3
+test7 zed3
+
+.macro test8 _a, _b, _c
+.ascii "\_a,\_b,\_c"
+.endm
+
+.macro test9 _a _b _c
+.ascii "\_a \_b \_c"
+.endm
+
+// CHECK: .ascii "a,b,c"
+test8 a, b, c
+// CHECK: .ascii "%1,%2,%3"
+test8 %1 %2 %3 #a comment
+// CHECK: .ascii "x-y,z,1"
+test8 x - y z 1
+// CHECK: .ascii "1 2 3"
+test9 1, 2,3
+
+// CHECK: .ascii "1,2,3"
+test8 1,2 3
+
+// CHECK: .ascii "1,2,3"
+test8 1 2, 3
+
+.macro test10
+.ascii "$20"
+.endm
+
+test10
+// CHECK: .ascii "$20"
+
+test10 42
+// CHECK-ERRORS: 102:10: error: Wrong number of arguments
+// CHECK-ERRORS-NEXT: test10 42
+// CHECK-ERRORS-NEXT: ^
diff --git a/test/MC/AsmParser/macros.s b/test/MC/AsmParser/macros.s
deleted file mode 100644
index b1cb851..0000000
--- a/test/MC/AsmParser/macros.s
+++ /dev/null
@@ -1,93 +0,0 @@
-// RUN: not llvm-mc -triple i386-unknown-unknown %s 2> %t.err | FileCheck %s
-// RUN: FileCheck --check-prefix=CHECK-ERRORS %s < %t.err
-
-.macro .test0
-.macrobody0
-.endmacro
-.macro .test1
-.test0
-.endmacro
-
-.test1
-// CHECK-ERRORS: <instantiation>:1:1: error: unknown directive
-// CHECK-ERRORS-NEXT: macrobody0
-// CHECK-ERRORS-NEXT: ^
-// CHECK-ERRORS: <instantiation>:1:1: note: while in macro instantiation
-// CHECK-ERRORS-NEXT: .test0
-// CHECK-ERRORS-NEXT: ^
-// CHECK-ERRORS: 11:1: note: while in macro instantiation
-// CHECK-ERRORS-NEXT: .test1
-// CHECK-ERRORS-NEXT: ^
-
-.macro test2
-.byte $0
-.endmacro
-test2 10
-
-.macro test3
-.globl "$0 $1 $2 $$3 $n"
-.endmacro
-
-// CHECK: .globl	"1 (23)  $3 2"
-test3 1, (2 3)
-
-// CHECK: .globl "1 2  $3 2"
-test3 1 2
-
-.macro test4
-.globl "$0 -- $1"
-.endmacro
-
-// CHECK: .globl  "(ab)(,)) -- (cd)"
-test4 (a b)(,)),(cd)
-
-// CHECK: .globl  "(ab)(,)) -- (cd)"
-test4 (a b)(,)),(cd)
-
-.macro test5 _a
-.globl "\_a"
-.endm
-
-// CHECK: .globl zed1
-test5 zed1
-
-.macro test6 $a
-.globl "\$a"
-.endm
-
-// CHECK: .globl zed2
-test6 zed2
-
-.macro test7 .a
-.globl "\.a"
-.endm
-
-// CHECK: .globl zed3
-test7 zed3
-
-.macro test8 _a, _b, _c
-.globl "\_a,\_b,\_c"
-.endmacro
-
-.macro test9 _a _b _c
-.globl "\_a \_b \_c"
-.endmacro
-
-// CHECK: .globl  "a,b,c"
-test8 a, b, c
-// CHECK: .globl  "%1,%2,%3"
-test8 %1 %2 %3 #a comment
-// CHECK: .globl "x-y,z,1"
-test8 x - y z 1
-// CHECK: .globl  "1 2 3"
-test9 1, 2,3
-
-test8 1,2 3
-// CHECK-ERRORS: error: macro argument '_c' is missing
-// CHECK-ERRORS-NEXT: test8 1,2 3
-// CHECK-ERRORS-NEXT:           ^
-
-test8 1 2, 3
-// CHECK-ERRORS: error: expected ' ' for macro argument separator
-// CHECK-ERRORS-NEXT:test8 1 2, 3
-// CHECK-ERRORS-NEXT:         ^
diff --git a/test/MC/COFF/bad-expr.s b/test/MC/COFF/bad-expr.s
new file mode 100644
index 0000000..ecbdd41
--- /dev/null
+++ b/test/MC/COFF/bad-expr.s
@@ -0,0 +1,7 @@
+// RUN: not llvm-mc -filetype=obj -triple i386-pc-win32 %s 2>&1 | FileCheck %s
+
+// CHECK: symbol '__ImageBase' can not be undefined in a subtraction expression
+
+        .data
+_x:
+        .long   _x-__ImageBase
diff --git a/test/MC/COFF/bss.s b/test/MC/COFF/bss.s
index 86294c1..17ae0da 100644
--- a/test/MC/COFF/bss.s
+++ b/test/MC/COFF/bss.s
@@ -1,4 +1,4 @@
-// The purpose of this test is to verify that bss sections are emited correctly.
+// The purpose of this test is to verify that bss sections are emitted correctly.
 
 // RUN: llvm-mc -filetype=obj -triple i686-pc-win32 %s | llvm-readobj -s | FileCheck %s
 // RUN: llvm-mc -filetype=obj -triple x86_64-pc-win32 %s | llvm-readobj -s | FileCheck %s
diff --git a/test/MC/COFF/bss_section.ll b/test/MC/COFF/bss_section.ll
index 60924f1..477b3df 100644
--- a/test/MC/COFF/bss_section.ll
+++ b/test/MC/COFF/bss_section.ll
@@ -4,3 +4,6 @@
 
 @"\01?thingy@@3Ufoo@@B" = global %struct.foo zeroinitializer, align 4
 ; CHECK: .bss
+
+@thingy_linkonce = linkonce_odr global %struct.foo zeroinitializer, align 4
+; CHECK: .section .bss,"bw",discard,_thingy_linkonce
diff --git a/test/MC/COFF/comm.s b/test/MC/COFF/comm.s
new file mode 100644
index 0000000..21ae5d2
--- /dev/null
+++ b/test/MC/COFF/comm.s
@@ -0,0 +1,25 @@
+// RUN: llvm-mc -filetype=obj -triple i686-pc-win32 %s | llvm-readobj -t | FileCheck %s
+
+.lcomm _a,4,4
+.comm	_b, 4, 2
+
+
+// CHECK:       Symbol {
+// CHECK:         Name: _a
+// CHECK-NEXT:    Value:
+// CHECK-NEXT:    Section: .bss
+// CHECK-NEXT:    BaseType: Null
+// CHECK-NEXT:    ComplexType: Null
+// CHECK-NEXT:    StorageClass: Static
+// CHECK-NEXT:    AuxSymbolCount: 0
+// CHECK-NEXT:  }
+
+// CHECK:       Symbol {
+// CHECK:         Name: _b
+// CHECK-NEXT:    Value: 4
+// CHECK-NEXT:    Section: .bss
+// CHECK-NEXT:    BaseType: Null
+// CHECK-NEXT:    ComplexType: Null
+// CHECK-NEXT:    StorageClass: External
+// CHECK-NEXT:    AuxSymbolCount: 0
+// CHECK-NEXT:  }
diff --git a/test/MC/COFF/feat00.s b/test/MC/COFF/feat00.s
index d08f407..bfd47ad 100644
--- a/test/MC/COFF/feat00.s
+++ b/test/MC/COFF/feat00.s
@@ -6,7 +6,7 @@
 // CHECK: Symbol {
 // CHECK:   Name: @feat.00
 // CHECK:   Value: 123
-// CHECK:   Section: (-1)
+// CHECK:   Section: (65535)
 // CHECK:   BaseType: Null (0x0)
 // CHECK:   ComplexType: Null (0x0)
 // CHECK:   StorageClass: External (0x2)
diff --git a/test/MC/COFF/ir-to-imgrel.ll b/test/MC/COFF/ir-to-imgrel.ll
new file mode 100644
index 0000000..39884d2
--- /dev/null
+++ b/test/MC/COFF/ir-to-imgrel.ll
@@ -0,0 +1,6 @@
+; RUN: llc -mtriple=x86_64-pc-win32 %s -o - | FileCheck %s --check-prefix=X64
+
+@__ImageBase = external global i8
+
+; X64: .quad   "?x@@3HA"@IMGREL32
+@"\01?x@@3HA" = global i64 sub nsw (i64 ptrtoint (i64* @"\01?x@@3HA" to i64), i64 ptrtoint (i8* @__ImageBase to i64)), align 8
diff --git a/test/MC/COFF/secidx-diagnostic.s b/test/MC/COFF/secidx-diagnostic.s
new file mode 100644
index 0000000..3e496c3
--- /dev/null
+++ b/test/MC/COFF/secidx-diagnostic.s
@@ -0,0 +1,8 @@
+// RUN: not llvm-mc -filetype=obj -triple i686-pc-win32 %s 2>%t
+// RUN: FileCheck %s < %t
+
+// CHECK: symbol 'bar' can not be undefined
+
+.data
+foo:
+        .secidx bar
diff --git a/test/MC/COFF/secidx.s b/test/MC/COFF/secidx.s
new file mode 100644
index 0000000..619d777
--- /dev/null
+++ b/test/MC/COFF/secidx.s
@@ -0,0 +1,16 @@
+// RUN: llvm-mc -filetype=obj -triple i686-pc-win32 %s | llvm-readobj -s -sr | FileCheck %s
+
+// check that we produce the correct relocation for .secidx
+
+Lfoo:
+	.secidx	Lfoo
+	.secidx	Lbar
+
+.section spam
+Lbar:
+	ret
+
+// CHECK:       Relocations [
+// CHECK-NEXT:    0x0 IMAGE_REL_I386_SECTION .text
+// CHECK-NEXT:    0x4 IMAGE_REL_I386_SECTION spam
+// CHECK-NEXT:  ]
diff --git a/test/MC/COFF/section-name-encoding.s b/test/MC/COFF/section-name-encoding.s
index 0f531f3..74cd490 100644
--- a/test/MC/COFF/section-name-encoding.s
+++ b/test/MC/COFF/section-name-encoding.s
@@ -3,6 +3,7 @@
 // Encodings for different lengths:
 //   [0, 8]:               raw name
 //   (8, 999999]:          base 10 string table index (/9999999)
+//   (999999, 0xFFFFFFFF]: base 64 string table index (//AAAAAA)
 //
 // RUN: llvm-mc -triple x86_64-pc-win32 -filetype=obj %s | llvm-readobj -s | FileCheck %s
 
@@ -52,7 +53,7 @@ pad_sections aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
 
 // /1000029 == 4 + 10 + (5 * (2 + (20 * 10 * 1000) + 1))
 //             v   |     |    v    ~~~~~~~~~~~~~~    v
-//    table size   v     v   "p0"        pad         NUL seperator
+//    table size   v     v   "p0"        pad         NUL separator
 //     "s12345678\0"     # of pad sections
 //
 // CHECK:   Section {
@@ -60,3 +61,28 @@ pad_sections aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
 // CHECK:     Name: seven_digit (2F 31 30 30 30 30 32 39)
 // CHECK:   }
 .section seven_digit; .long 1
+
+
+// Generate padding sections to increase the string table size to at least
+// 10,000,000 bytes.
+.macro pad_sections_ex pad
+  // 9x \pad
+  pad_sections \pad\pad\pad\pad\pad\pad\pad\pad\pad
+.endm
+
+// 1000x 'a'
+pad_sections_ex aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
+
+
+// //AAmJa4 == 1000029 + 12 + (5 * (2 + (9 * 20 * 10 * 1000) + 1)) == 38*64^3 + 9*64^2 + 26*64 + 56
+//             v         |     |    v    ~~~~~~~~~~~~~~~~~~    v
+// seven_digit offset    v     v   "p0"         pad            NUL separator
+//         "seven_digit\0"     # of pad sections
+//
+// "2F 2F 41 41 6D 4A 61 34" is "//AAmJa4", which decodes to "0 0 38 9 26 56".
+//
+// CHECK:   Section {
+// CHECK:     Number: 15
+// CHECK:     Name: double_slash (2F 2F 41 41 6D 4A 61 34)
+// CHECK:   }
+.section double_slash; .long 1
diff --git a/test/MC/COFF/timestamp.s b/test/MC/COFF/timestamp.s
new file mode 100644
index 0000000..18736a2
--- /dev/null
+++ b/test/MC/COFF/timestamp.s
@@ -0,0 +1,4 @@
+// RUN: llvm-mc -filetype=obj -triple i686-pc-win32 %s -o - | llvm-readobj -h | FileCheck %s
+
+// CHECK: ImageFileHeader {
+// CHECK:   TimeDateStamp: {{.*}} (0x0)
diff --git a/test/MC/COFF/tricky-names.ll b/test/MC/COFF/tricky-names.ll
index 6e041d3..458aa41 100644
--- a/test/MC/COFF/tricky-names.ll
+++ b/test/MC/COFF/tricky-names.ll
@@ -25,11 +25,11 @@ define weak i32 @"\01??_B?$num_put@_WV?$back_insert_iterator@V?$basic_string@_WU
 ; ASM-NOT: .globl "@foo.bar"
 
 ; READOBJ: Symbol
-; READOBJ: Name: .text$??_B?$num_put@_WV?$back_insert_iterator@V?$basic_string@_WU?$char_traits@_W@std@@V?$allocator@_W@2@@std@@@std@@@std@@51
-; READOBJ: Section: .text$??_B?$num_put@_WV?$back_insert_iterator@V?$basic_string@_WU?$char_traits@_W@std@@V?$allocator@_W@2@@std@@@std@@@std@@51
+; READOBJ: Name: .text
+; READOBJ: Section: .text
 ; READOBJ: Symbol
 ; READOBJ: Name: ??_B?$num_put@_WV?$back_insert_iterator@V?$basic_string@_WU?$char_traits@_W@std@@V?$allocator@_W@2@@std@@@std@@@std@@51
-; READOBJ: Section: .text$??_B?$num_put@_WV?$back_insert_iterator@V?$basic_string@_WU?$char_traits@_W@std@@V?$allocator@_W@2@@std@@@std@@@std@@51
+; READOBJ: Section: .text
 ; READOBJ: Symbol
 ; READOBJ: Name: ??__E_Generic_object@?$_Error_objects@H@std@@YAXXZ
 ; READOBJ: Symbol
diff --git a/test/MC/COFF/weak-symbol.ll b/test/MC/COFF/weak-symbol.ll
index 7f2e87c..c06692e 100644
--- a/test/MC/COFF/weak-symbol.ll
+++ b/test/MC/COFF/weak-symbol.ll
@@ -8,37 +8,41 @@
 ; RUN: llc -mtriple=x86_64-pc-mingw32 %s -o - | FileCheck %s --check-prefix=X64

 

 ; Mangled function

-; X86: .section .text$_Z3foo

-; X86: .linkonce discard

+; X86: .section .text,"xr",discard,__Z3foo

 ; X86: .globl __Z3foo

 ;

-; X64: .section .text$_Z3foo

-; X64: .linkonce discard

+; X64: .section .text,"xr",discard,_Z3foo

 ; X64: .globl _Z3foo

 define weak void @_Z3foo() {

   ret void

 }

 

 ; Unmangled function

-; X86: .section .sect$f

-; X86: .linkonce discard

+; X86: .section .sect,"xr",discard,_f

 ; X86: .globl _f

 ;

-; X64: .section .sect$f

-; X64: .linkonce discard

+; X64: .section .sect,"xr",discard,f

 ; X64: .globl f

 define weak void @f() section ".sect" {

   ret void

 }

 

 ; Weak global

-; X86: .section .data$a

-; X86: .linkonce discard

+; X86: .section .data,"r",discard,_a

 ; X86: .globl _a

 ; X86: .zero 12

 ;

-; X64: .section .data$a

-; X64: .linkonce discard

+; X64: .section .data,"r",discard,a

 ; X64: .globl a

 ; X64: .zero 12

 @a = weak unnamed_addr constant { i32, i32, i32 } { i32 0, i32 0, i32 0}, section ".data"

+

+; X86:  .section        .tls$,"w",discard,_b

+; X86:  .globl  _b

+; X86:  .long   0

+;

+; X64:  .section        .tls$,"w",discard,b

+; X64:  .globl  b

+; X64:  .long   0

+

+@b = weak_odr thread_local global i32 0, align 4

diff --git a/test/MC/COFF/weak.s b/test/MC/COFF/weak.s
index b9df0f1..accd3f4 100644
--- a/test/MC/COFF/weak.s
+++ b/test/MC/COFF/weak.s
@@ -52,7 +52,7 @@ LBB0_2:                                 # %return
 // CHECK:      Symbol {
 // CHECK:        Name:                .weak._test_weak.default
 // CHECK-NEXT:   Value:               0
-// CHECK-NEXT:   Section:             (-1)
+// CHECK-NEXT:   Section:             (65535)
 // CHECK-NEXT:   BaseType:            Null
 // CHECK-NEXT:   ComplexType:         Null
 // CHECK-NEXT:   StorageClass:        External
diff --git a/test/MC/Disassembler/ARM/addrmode2-reencoding.txt b/test/MC/Disassembler/ARM/addrmode2-reencoding.txt
new file mode 100644
index 0000000..08d2de6
--- /dev/null
+++ b/test/MC/Disassembler/ARM/addrmode2-reencoding.txt
@@ -0,0 +1,12 @@
+# RUN: llvm-mc -triple armv7 -show-encoding -disassemble < %s | FileCheck %s
+
+0x00 0x10 0xb0 0xe4
+0x00 0x10 0xf0 0xe4
+0x00 0x10 0xa0 0xe4
+0x00 0x10 0xe0 0xe4
+
+# CHECK: ldrt r1, [r0], #0    @ encoding: [0x00,0x10,0xb0,0xe4]
+# CHECK: ldrbt r1, [r0], #0   @ encoding: [0x00,0x10,0xf0,0xe4]
+# CHECK: strt r1, [r0], #0    @ encoding: [0x00,0x10,0xa0,0xe4]
+# CHECK: strbt r1, [r0], #0   @ encoding: [0x00,0x10,0xe0,0xe4]
+
diff --git a/test/MC/Disassembler/ARM64/advsimd.txt b/test/MC/Disassembler/ARM64/advsimd.txt
new file mode 100644
index 0000000..486dd16
--- /dev/null
+++ b/test/MC/Disassembler/ARM64/advsimd.txt
@@ -0,0 +1,2282 @@
+# RUN: llvm-mc -triple arm64-apple-darwin -output-asm-variant=1 --disassemble < %s | FileCheck %s
+
+0x00 0xb8 0x20 0x0e
+0x00 0xb8 0x20 0x4e
+0x00 0xb8 0x60 0x0e
+0x00 0xb8 0x60 0x4e
+0x00 0xb8 0xa0 0x0e
+0x00 0xb8 0xa0 0x4e
+
+# CHECK: abs.8b  v0, v0
+# CHECK: abs.16b v0, v0
+# CHECK: abs.4h  v0, v0
+# CHECK: abs.8h  v0, v0
+# CHECK: abs.2s  v0, v0
+# CHECK: abs.4s  v0, v0
+
+0x00 0x84 0x20 0x0e
+0x00 0x84 0x20 0x4e
+0x00 0x84 0x60 0x0e
+0x00 0x84 0x60 0x4e
+0x00 0x84 0xa0 0x0e
+0x00 0x84 0xa0 0x4e
+0x00 0x84 0xe0 0x4e
+
+# CHECK: add.8b  v0, v0, v0
+# CHECK: add.16b v0, v0, v0
+# CHECK: add.4h  v0, v0, v0
+# CHECK: add.8h  v0, v0, v0
+# CHECK: add.2s  v0, v0, v0
+# CHECK: add.4s  v0, v0, v0
+# CHECK: add.2d  v0, v0, v0
+
+0x41 0x84 0xe3 0x5e
+
+# CHECK: add d1, d2, d3
+
+0x00 0x40 0x20 0x0e
+0x00 0x40 0x20 0x4e
+0x00 0x40 0x60 0x0e
+0x00 0x40 0x60 0x4e
+0x00 0x40 0xa0 0x0e
+0x00 0x40 0xa0 0x4e
+
+# CHECK: addhn.8b   v0, v0, v0
+# CHECK: addhn2.16b v0, v0, v0
+# CHECK: addhn.4h   v0, v0, v0
+# CHECK: addhn2.8h  v0, v0, v0
+# CHECK: addhn.2s   v0, v0, v0
+# CHECK: addhn2.4s  v0, v0, v0
+
+0x00 0xbc 0x20 0x0e
+0x00 0xbc 0x20 0x4e
+0x00 0xbc 0x60 0x0e
+0x00 0xbc 0x60 0x4e
+0x00 0xbc 0xa0 0x0e
+0x00 0xbc 0xa0 0x4e
+0x00 0xbc 0xe0 0x4e
+
+# CHECK: addp.8b   v0, v0, v0
+# CHECK: addp.16b  v0, v0, v0
+# CHECK: addp.4h   v0, v0, v0
+# CHECK: addp.8h   v0, v0, v0
+# CHECK: addp.2s   v0, v0, v0
+# CHECK: addp.4s   v0, v0, v0
+# CHECK: addp.2d   v0, v0, v0
+
+0x00 0xb8 0xf1 0x5e
+
+# CHECK: addp.2d d0, v0
+
+0x00 0xb8 0x31 0x0e
+0x00 0xb8 0x31 0x4e
+0x00 0xb8 0x71 0x0e
+0x00 0xb8 0x71 0x4e
+0x00 0xb8 0xb1 0x4e
+
+# CHECK: addv.8b  b0, v0
+# CHECK: addv.16b b0, v0
+# CHECK: addv.4h  h0, v0
+# CHECK: addv.8h  h0, v0
+# CHECK: addv.4s  s0, v0
+
+
+# INS/DUP
+0x60 0x0c 0x08 0x4e
+0x60 0x0c 0x04 0x4e
+0x60 0x0c 0x04 0x0e
+0x60 0x0c 0x02 0x4e
+0x60 0x0c 0x02 0x0e
+0x60 0x0c 0x01 0x4e
+0x60 0x0c 0x01 0x0e
+
+# CHECK: dup.2d  v0, x3
+# CHECK: dup.4s  v0, w3
+# CHECK: dup.2s  v0, w3
+# CHECK: dup.8h  v0, w3
+# CHECK: dup.4h  v0, w3
+# CHECK: dup.16b v0, w3
+# CHECK: dup.8b  v0, w3
+
+0x60 0x04 0x18 0x4e
+0x60 0x04 0x0c 0x0e
+0x60 0x04 0x0c 0x4e
+0x60 0x04 0x06 0x0e
+0x60 0x04 0x06 0x4e
+0x60 0x04 0x03 0x0e
+0x60 0x04 0x03 0x4e
+
+# CHECK: dup.2d  v0, v3[1]
+# CHECK: dup.2s  v0, v3[1]
+# CHECK: dup.4s  v0, v3[1]
+# CHECK: dup.4h  v0, v3[1]
+# CHECK: dup.8h  v0, v3[1]
+# CHECK: dup.8b  v0, v3[1]
+# CHECK: dup.16b v0, v3[1]
+
+
+0x43 0x2c 0x14 0x4e
+0x43 0x2c 0x14 0x4e
+0x43 0x3c 0x14 0x0e
+0x43 0x3c 0x14 0x0e
+0x43 0x3c 0x18 0x4e
+0x43 0x3c 0x18 0x4e
+
+# CHECK: smov.s  x3, v2[2]
+# CHECK: smov.s  x3, v2[2]
+# CHECK: umov.s  w3, v2[2]
+# CHECK: umov.s  w3, v2[2]
+# CHECK: umov.d  x3, v2[1]
+# CHECK: umov.d  x3, v2[1]
+
+0xa2 0x1c 0x18 0x4e
+0xa2 0x1c 0x0c 0x4e
+0xa2 0x1c 0x06 0x4e
+0xa2 0x1c 0x03 0x4e
+
+0xa2 0x1c 0x18 0x4e
+0xa2 0x1c 0x0c 0x4e
+0xa2 0x1c 0x06 0x4e
+0xa2 0x1c 0x03 0x4e
+
+# CHECK: ins.d v2[1], x5
+# CHECK: ins.s v2[1], w5
+# CHECK: ins.h v2[1], w5
+# CHECK: ins.b v2[1], w5
+
+# CHECK: ins.d v2[1], x5
+# CHECK: ins.s v2[1], w5
+# CHECK: ins.h v2[1], w5
+# CHECK: ins.b v2[1], w5
+
+0xe2 0x45 0x18 0x6e
+0xe2 0x25 0x0c 0x6e
+0xe2 0x15 0x06 0x6e
+0xe2 0x0d 0x03 0x6e
+
+0xe2 0x05 0x18 0x6e
+0xe2 0x45 0x1c 0x6e
+0xe2 0x35 0x1e 0x6e
+0xe2 0x2d 0x15 0x6e
+
+# CHECK: ins.d v2[1], v15[1]
+# CHECK: ins.s v2[1], v15[1]
+# CHECK: ins.h v2[1], v15[1]
+# CHECK: ins.b v2[1], v15[1]
+
+# CHECK: ins.d v2[1], v15[0]
+# CHECK: ins.s v2[3], v15[2]
+# CHECK: ins.h v2[7], v15[3]
+# CHECK: ins.b v2[10], v15[5]
+
+0x00 0x1c 0x20 0x0e
+0x00 0x1c 0x20 0x4e
+
+# CHECK: and.8b  v0, v0, v0
+# CHECK: and.16b v0, v0, v0
+
+0x00 0x1c 0x60 0x0e
+
+# CHECK: bic.8b  v0, v0, v0
+
+0x00 0x8c 0x20 0x2e
+0x00 0x3c 0x20 0x0e
+0x00 0x34 0x20 0x0e
+0x00 0x34 0x20 0x2e
+0x00 0x3c 0x20 0x2e
+0x00 0x8c 0x20 0x0e
+0x00 0xd4 0xa0 0x2e
+0x00 0xec 0x20 0x2e
+0x00 0xec 0xa0 0x2e
+0x00 0xd4 0x20 0x2e
+0x00 0xd4 0x20 0x0e
+0x00 0xe4 0x20 0x0e
+0x00 0xe4 0x20 0x2e
+0x00 0xe4 0xa0 0x2e
+0x00 0xfc 0x20 0x2e
+0x00 0xc4 0x20 0x2e
+0x00 0xc4 0x20 0x0e
+0x00 0xf4 0x20 0x2e
+0x00 0xf4 0x20 0x0e
+0x00 0xc4 0xa0 0x2e
+0x00 0xc4 0xa0 0x0e
+0x00 0xf4 0xa0 0x2e
+0x00 0xf4 0xa0 0x0e
+0x00 0xcc 0x20 0x0e
+0x00 0xcc 0xa0 0x0e
+0x00 0xdc 0x20 0x0e
+0x00 0xdc 0x20 0x2e
+0x00 0xfc 0x20 0x0e
+0x00 0xfc 0xa0 0x0e
+0x00 0xd4 0xa0 0x0e
+0x00 0x94 0x20 0x0e
+0x00 0x94 0x20 0x2e
+0x00 0x9c 0x20 0x0e
+0x00 0x9c 0x20 0x2e
+0x00 0x7c 0x20 0x0e
+0x00 0x74 0x20 0x0e
+0x00 0x04 0x20 0x0e
+0x00 0x24 0x20 0x0e
+0x00 0xa4 0x20 0x0e
+0x00 0x64 0x20 0x0e
+0x00 0xac 0x20 0x0e
+0x00 0x6c 0x20 0x0e
+0x00 0x0c 0x20 0x0e
+0x00 0xb4 0x60 0x0e
+0x00 0xb4 0x60 0x2e
+0x00 0x5c 0x20 0x0e
+0x00 0x4c 0x20 0x0e
+0x00 0x2c 0x20 0x0e
+0x00 0x14 0x20 0x0e
+0x00 0x54 0x20 0x0e
+0x00 0x44 0x20 0x0e
+0x00 0x84 0x20 0x2e
+0x00 0x7c 0x20 0x2e
+0x00 0x74 0x20 0x2e
+0x00 0x04 0x20 0x2e
+0x00 0x24 0x20 0x2e
+0x00 0xa4 0x20 0x2e
+0x00 0x64 0x20 0x2e
+0x00 0xac 0x20 0x2e
+0x00 0x6c 0x20 0x2e
+0x00 0x0c 0x20 0x2e
+0x00 0x5c 0x20 0x2e
+0x00 0x4c 0x20 0x2e
+0x00 0x2c 0x20 0x2e
+0x00 0x14 0x20 0x2e
+0x00 0x54 0x20 0x2e
+0x00 0x44 0x20 0x2e
+
+# CHECK: cmeq.8b	v0, v0, v0
+# CHECK: cmge.8b	v0, v0, v0
+# CHECK: cmgt.8b	v0, v0, v0
+# CHECK: cmhi.8b	v0, v0, v0
+# CHECK: cmhs.8b	v0, v0, v0
+# CHECK: cmtst.8b	v0, v0, v0
+# CHECK: fabd.2s	v0, v0, v0
+# CHECK: facge.2s	v0, v0, v0
+# CHECK: facgt.2s	v0, v0, v0
+# CHECK: faddp.2s	v0, v0, v0
+# CHECK: fadd.2s	v0, v0, v0
+# CHECK: fcmeq.2s	v0, v0, v0
+# CHECK: fcmge.2s	v0, v0, v0
+# CHECK: fcmgt.2s	v0, v0, v0
+# CHECK: fdiv.2s	v0, v0, v0
+# CHECK: fmaxnmp.2s	v0, v0, v0
+# CHECK: fmaxnm.2s	v0, v0, v0
+# CHECK: fmaxp.2s	v0, v0, v0
+# CHECK: fmax.2s	v0, v0, v0
+# CHECK: fminnmp.2s	v0, v0, v0
+# CHECK: fminnm.2s	v0, v0, v0
+# CHECK: fminp.2s	v0, v0, v0
+# CHECK: fmin.2s	v0, v0, v0
+# CHECK: fmla.2s	v0, v0, v0
+# CHECK: fmls.2s	v0, v0, v0
+# CHECK: fmulx.2s	v0, v0, v0
+# CHECK: fmul.2s	v0, v0, v0
+# CHECK: frecps.2s	v0, v0, v0
+# CHECK: frsqrts.2s	v0, v0, v0
+# CHECK: fsub.2s	v0, v0, v0
+# CHECK: mla.8b	v0, v0, v0
+# CHECK: mls.8b	v0, v0, v0
+# CHECK: mul.8b	v0, v0, v0
+# CHECK: pmul.8b	v0, v0, v0
+# CHECK: saba.8b	v0, v0, v0
+# CHECK: sabd.8b	v0, v0, v0
+# CHECK: shadd.8b	v0, v0, v0
+# CHECK: shsub.8b	v0, v0, v0
+# CHECK: smaxp.8b	v0, v0, v0
+# CHECK: smax.8b	v0, v0, v0
+# CHECK: sminp.8b	v0, v0, v0
+# CHECK: smin.8b	v0, v0, v0
+# CHECK: sqadd.8b	v0, v0, v0
+# CHECK: sqdmulh.4h v0, v0, v0
+# CHECK: sqrdmulh.4h v0, v0, v0
+# CHECK: sqrshl.8b	v0, v0, v0
+# CHECK: sqshl.8b	v0, v0, v0
+# CHECK: sqsub.8b	v0, v0, v0
+# CHECK: srhadd.8b	v0, v0, v0
+# CHECK: srshl.8b	v0, v0, v0
+# CHECK: sshl.8b	v0, v0, v0
+# CHECK: sub.8b	v0, v0, v0
+# CHECK: uaba.8b	v0, v0, v0
+# CHECK: uabd.8b	v0, v0, v0
+# CHECK: uhadd.8b	v0, v0, v0
+# CHECK: uhsub.8b	v0, v0, v0
+# CHECK: umaxp.8b	v0, v0, v0
+# CHECK: umax.8b	v0, v0, v0
+# CHECK: uminp.8b	v0, v0, v0
+# CHECK: umin.8b	v0, v0, v0
+# CHECK: uqadd.8b	v0, v0, v0
+# CHECK: uqrshl.8b	v0, v0, v0
+# CHECK: uqshl.8b	v0, v0, v0
+# CHECK: uqsub.8b	v0, v0, v0
+# CHECK: urhadd.8b	v0, v0, v0
+# CHECK: urshl.8b	v0, v0, v0
+# CHECK: ushl.8b	v0, v0, v0
+
+0x00 0x1c 0xe0 0x2e
+0x00 0x1c 0xa0 0x2e
+0x00 0x1c 0x60 0x2e
+0x00 0x1c 0x20 0x2e
+0x00 0x1c 0xe0 0x0e
+0x00 0x1c 0xa0 0x0e
+
+# CHECK: bif.8b	v0, v0, v0
+# CHECK: bit.8b	v0, v0, v0
+# CHECK: bsl.8b	v0, v0, v0
+# CHECK: eor.8b	v0, v0, v0
+# CHECK: orn.8b	v0, v0, v0
+# CHECK: orr.8b	v0, v0, v0
+
+0x00 0x68 0x20 0x0e
+0x00 0x68 0x20 0x4e
+0x00 0x68 0x60 0x0e
+0x00 0x68 0x60 0x4e
+0x00 0x68 0xa0 0x0e
+0x00 0x68 0xa0 0x4e
+
+# CHECK: sadalp.4h	v0, v0
+# CHECK: sadalp.8h	v0, v0
+# CHECK: sadalp.2s	v0, v0
+# CHECK: sadalp.4s	v0, v0
+# CHECK: sadalp.1d	v0, v0
+# CHECK: sadalp.2d	v0, v0
+
+0x00 0x48 0x20 0x0e
+0x00 0x48 0x20 0x2e
+0x00 0x58 0x20 0x0e
+0x00 0xf8 0xa0 0x0e
+0x00 0xc8 0x21 0x0e
+0x00 0xc8 0x21 0x2e
+0x00 0xb8 0x21 0x0e
+0x00 0xb8 0x21 0x2e
+0x00 0xa8 0x21 0x0e
+0x00 0xa8 0x21 0x2e
+0x00 0xa8 0xa1 0x0e
+0x00 0xa8 0xa1 0x2e
+0x00 0xb8 0xa1 0x0e
+0x00 0xb8 0xa1 0x2e
+0x00 0xf8 0xa0 0x2e
+0x00 0xd8 0xa1 0x0e
+0x00 0xd8 0xa1 0x2e
+0x00 0xf8 0xa1 0x2e
+0x00 0xb8 0x20 0x2e
+0x00 0x58 0x20 0x2e
+0x00 0x58 0x60 0x2e
+0x00 0x18 0x20 0x0e
+0x00 0x08 0x20 0x2e
+0x00 0x08 0x20 0x0e
+0x00 0x68 0x20 0x0e
+0x00 0x28 0x20 0x0e
+0x00 0xd8 0x21 0x0e
+0x00 0x38 0x21 0x2e
+0x00 0x78 0x20 0x0e
+0x00 0x78 0x20 0x2e
+0x00 0x48 0x21 0x0e
+0x00 0x28 0x21 0x2e
+0x00 0x38 0x20 0x0e
+0x00 0x68 0x20 0x2e
+0x00 0x28 0x20 0x2e
+0x00 0xd8 0x21 0x2e
+0x00 0x48 0x21 0x2e
+0x00 0xc8 0xa1 0x0e
+0x00 0xc8 0xa1 0x2e
+0x00 0x38 0x20 0x2e
+0x00 0x28 0x21 0x0e
+0x00 0x48 0x20 0x0e
+0x00 0x48 0x20 0x2e
+0x00 0x58 0x20 0x0e
+0x00 0xf8 0xa0 0x0e
+0x00 0xc8 0x21 0x0e
+0x00 0xc8 0x21 0x2e
+0x00 0xb8 0x21 0x0e
+0x00 0xb8 0x21 0x2e
+0x00 0xa8 0x21 0x0e
+0x00 0xa8 0x21 0x2e
+0x00 0xa8 0xa1 0x0e
+0x00 0xa8 0xa1 0x2e
+0x00 0xb8 0xa1 0x0e
+0x00 0xb8 0xa1 0x2e
+0x00 0xf8 0xa0 0x2e
+0x00 0xd8 0xa1 0x0e
+0x00 0xd8 0xa1 0x2e
+0x00 0xf8 0xa1 0x2e
+0x00 0xb8 0x20 0x2e
+0x00 0x58 0x20 0x2e
+0x00 0x58 0x60 0x2e
+0x00 0x18 0x20 0x0e
+0x00 0x08 0x20 0x2e
+0x00 0x08 0x20 0x0e
+0x00 0x68 0x20 0x0e
+0x00 0x28 0x20 0x0e
+0x00 0xd8 0x21 0x0e
+0x00 0x38 0x21 0x2e
+0x00 0x78 0x20 0x0e
+0x00 0x78 0x20 0x2e
+0x00 0x48 0x21 0x0e
+0x00 0x28 0x21 0x2e
+0x00 0x38 0x20 0x0e
+0x00 0x68 0x20 0x2e
+0x00 0x28 0x20 0x2e
+0x00 0xd8 0x21 0x2e
+0x00 0x48 0x21 0x2e
+0x00 0xc8 0xa1 0x0e
+0x00 0xc8 0xa1 0x2e
+0x00 0x38 0x20 0x2e
+0x00 0x28 0x21 0x0e
+
+# CHECK: cls.8b	v0, v0
+# CHECK: clz.8b	v0, v0
+# CHECK: cnt.8b	v0, v0
+# CHECK: fabs.2s	v0, v0
+# CHECK: fcvtas.2s	v0, v0
+# CHECK: fcvtau.2s	v0, v0
+# CHECK: fcvtms.2s	v0, v0
+# CHECK: fcvtmu.2s	v0, v0
+# CHECK: fcvtns.2s	v0, v0
+# CHECK: fcvtnu.2s	v0, v0
+# CHECK: fcvtps.2s	v0, v0
+# CHECK: fcvtpu.2s	v0, v0
+# CHECK: fcvtzs.2s	v0, v0
+# CHECK: fcvtzu.2s	v0, v0
+# CHECK: fneg.2s	v0, v0
+# CHECK: frecpe.2s	v0, v0
+# CHECK: frsqrte.2s	v0, v0
+# CHECK: fsqrt.2s	v0, v0
+# CHECK: neg.8b	v0, v0
+# CHECK: not.8b	v0, v0
+# CHECK: rbit.8b	v0, v0
+# CHECK: rev16.8b	v0, v0
+# CHECK: rev32.8b	v0, v0
+# CHECK: rev64.8b	v0, v0
+# CHECK: sadalp.4h	v0, v0
+# CHECK: saddlp.4h	v0, v0
+# CHECK: scvtf.2s	v0, v0
+# CHECK: shll.8h	v0, v0, #8
+# CHECK: sqabs.8b	v0, v0
+# CHECK: sqneg.8b	v0, v0
+# CHECK: sqxtn.8b	v0, v0
+# CHECK: sqxtun.8b	v0, v0
+# CHECK: suqadd.8b	v0, v0
+# CHECK: uadalp.4h	v0, v0
+# CHECK: uaddlp.4h	v0, v0
+# CHECK: ucvtf.2s	v0, v0
+# CHECK: uqxtn.8b	v0, v0
+# CHECK: urecpe.2s	v0, v0
+# CHECK: ursqrte.2s	v0, v0
+# CHECK: usqadd.8b	v0, v0
+# CHECK: xtn.8b	v0, v0
+
+0x00 0x98 0x20 0x0e
+0x00 0x98 0x20 0x4e
+0x00 0x98 0x60 0x0e
+0x00 0x98 0x60 0x4e
+0x00 0x98 0xa0 0x0e
+0x00 0x98 0xa0 0x4e
+0x00 0x98 0xe0 0x4e
+
+# CHECK: cmeq.8b	v0, v0, #0
+# CHECK: cmeq.16b	v0, v0, #0
+# CHECK: cmeq.4h	v0, v0, #0
+# CHECK: cmeq.8h	v0, v0, #0
+# CHECK: cmeq.2s	v0, v0, #0
+# CHECK: cmeq.4s	v0, v0, #0
+# CHECK: cmeq.2d	v0, v0, #0
+
+0x00 0x88 0x20 0x2e
+0x00 0x88 0x20 0x0e
+0x00 0x98 0x20 0x2e
+0x00 0xa8 0x20 0x0e
+0x00 0xd8 0xa0 0x0e
+0x00 0xc8 0xa0 0x2e
+0x00 0xc8 0xa0 0x0e
+0x00 0xd8 0xa0 0x2e
+0x00 0xe8 0xa0 0x0e
+
+# CHECK: cmge.8b	v0, v0, #0
+# CHECK: cmgt.8b	v0, v0, #0
+# CHECK: cmle.8b	v0, v0, #0
+# CHECK: cmlt.8b	v0, v0, #0
+# CHECK: fcmeq.2s	v0, v0, #0
+# CHECK: fcmge.2s	v0, v0, #0
+# CHECK: fcmgt.2s	v0, v0, #0
+# CHECK: fcmle.2s	v0, v0, #0
+# CHECK: fcmlt.2s	v0, v0, #0
+
+0x00 0x78 0x21 0x0e
+0x00 0x78 0x21 0x4e
+0x00 0x78 0x61 0x0e
+0x00 0x78 0x61 0x4e
+0x00 0x68 0x21 0x0e
+0x00 0x68 0x21 0x4e
+0x00 0x68 0x61 0x0e
+0x00 0x68 0x61 0x4e
+0x00 0x68 0x61 0x2e
+0x00 0x68 0x61 0x6e
+
+# CHECK: fcvtl	v0.4s, v0.4h
+# CHECK: fcvtl2	v0.4s, v0.8h
+# CHECK: fcvtl	v0.2d, v0.2s
+# CHECK: fcvtl2	v0.2d, v0.4s
+# CHECK: fcvtn	v0.4h, v0.4s
+# CHECK: fcvtn2	v0.8h, v0.4s
+# CHECK: fcvtn	v0.2s, v0.2d
+# CHECK: fcvtn2	v0.4s, v0.2d
+# CHECK: fcvtxn	v0.2s, v0.2d
+# CHECK: fcvtxn2	v0.4s, v0.2d
+
+#===-------------------------------------------------------------------------===
+# AdvSIMD modified immediate instructions
+#===-------------------------------------------------------------------------===
+
+0x20 0x14 0x00 0x2f
+0x20 0x34 0x00 0x2f
+0x20 0x54 0x00 0x2f
+0x20 0x74 0x00 0x2f
+
+# CHECK: bic.2s v0, #1
+# CHECK: bic.2s v0, #1, lsl #8
+# CHECK: bic.2s v0, #1, lsl #16
+# CHECK: bic.2s v0, #1, lsl #24
+
+0x20 0x94 0x00 0x2f
+0x20 0x94 0x00 0x2f
+0x20 0xb4 0x00 0x2f
+
+# CHECK: bic.4h v0, #1
+# CHECK: bic.4h v0, #1
+# FIXME: bic.4h v0, #1, lsl #8
+#    'bic.4h' should be selected over "fcvtnu.2s v0, v1, #0"
+
+0x20 0x14 0x00 0x6f
+0x20 0x34 0x00 0x6f
+0x20 0x54 0x00 0x6f
+0x20 0x74 0x00 0x6f
+
+# CHECK: bic.4s v0, #1
+# CHECK: bic.4s v0, #1, lsl #8
+# CHECK: bic.4s v0, #1, lsl #16
+# CHECK: bic.4s v0, #1, lsl #24
+
+0x20 0x94 0x00 0x6f
+0x20 0xb4 0x00 0x6f
+
+# CHECK: bic.8h v0, #1
+# FIXME: bic.8h v0, #1, lsl #8
+#    "bic.8h" should be selected over "fcvtnu.4s v0, v1, #0"
+
+0x00 0xf4 0x02 0x6f
+
+# CHECK: fmov.2d v0, #1.250000e-01
+
+0x00 0xf4 0x02 0x0f
+0x00 0xf4 0x02 0x4f
+
+# CHECK: fmov.2s v0, #1.250000e-01
+# CHECK: fmov.4s v0, #1.250000e-01
+
+0x20 0x14 0x00 0x0f
+0x20 0x34 0x00 0x0f
+0x20 0x54 0x00 0x0f
+0x20 0x74 0x00 0x0f
+
+# CHECK: orr.2s v0, #1
+# CHECK: orr.2s v0, #1, lsl #8
+# CHECK: orr.2s v0, #1, lsl #16
+# CHECK: orr.2s v0, #1, lsl #24
+
+0x20 0x94 0x00 0x0f
+0x20 0xb4 0x00 0x0f
+
+# CHECK: orr.4h v0, #1
+# FIXME: orr.4h v0, #1, lsl #8
+#    'orr.4h' should be selected over "fcvtns.2s v0, v1, #0"
+
+0x20 0x14 0x00 0x4f
+0x20 0x34 0x00 0x4f
+0x20 0x54 0x00 0x4f
+0x20 0x74 0x00 0x4f
+
+# CHECK: orr.4s v0, #1
+# CHECK: orr.4s v0, #1, lsl #8
+# CHECK: orr.4s v0, #1, lsl #16
+# CHECK: orr.4s v0, #1, lsl #24
+
+0x20 0x94 0x00 0x4f
+0x20 0xb4 0x00 0x4f
+
+# CHECK: orr.8h v0, #1
+# FIXME: orr.8h v0, #1, lsl #8
+#    "orr.8h" should be selected over "fcvtns.4s v0, v1, #0"
+
+0x21 0x70 0x40 0x0c
+0x42 0xa0 0x40 0x4c
+0x64 0x64 0x40 0x0c
+0x87 0x24 0x40 0x4c
+0x0c 0xa8 0x40 0x0c
+0x0a 0x68 0x40 0x4c
+0x2d 0xac 0x40 0x0c
+0x4f 0x7c 0x40 0x4c
+
+# CHECK: ld1.8b { v1 }, [x1]
+# CHECK: ld1.16b { v2, v3 }, [x2]
+# CHECK: ld1.4h { v4, v5, v6 }, [x3]
+# CHECK: ld1.8h { v7, v8, v9, v10 }, [x4]
+# CHECK: ld1.2s { v12, v13 }, [x0]
+# CHECK: ld1.4s { v10, v11, v12 }, [x0]
+# CHECK: ld1.1d { v13, v14 }, [x1]
+# CHECK: ld1.2d	{ v15 }, [x2]
+
+0x41 0x70 0xdf 0x0c
+0x41 0xa0 0xdf 0x0c
+0x41 0x60 0xdf 0x0c
+0x41 0x20 0xdf 0x0c
+0x42 0x70 0xdf 0x4c
+0x42 0xa0 0xdf 0x4c
+0x42 0x60 0xdf 0x4c
+0x42 0x20 0xdf 0x4c
+0x64 0x74 0xdf 0x0c
+0x64 0xa4 0xdf 0x0c
+0x64 0x64 0xdf 0x0c
+0x64 0x24 0xdf 0x0c
+0x87 0x74 0xdf 0x4c
+0x87 0xa4 0xdf 0x4c
+0x87 0x64 0xdf 0x4c
+0x87 0x24 0xdf 0x4c
+0x0c 0x78 0xdf 0x0c
+0x0c 0xa8 0xdf 0x0c
+0x0c 0x68 0xdf 0x0c
+0x0c 0x28 0xdf 0x0c
+0x0a 0x78 0xdf 0x4c
+0x0a 0xa8 0xdf 0x4c
+0x0a 0x68 0xdf 0x4c
+0x0a 0x28 0xdf 0x4c
+0x2d 0x7c 0xdf 0x0c
+0x2d 0xac 0xdf 0x0c
+0x2d 0x6c 0xdf 0x0c
+0x2d 0x2c 0xdf 0x0c
+0x4f 0x7c 0xdf 0x4c
+0x4f 0xac 0xdf 0x4c
+0x4f 0x6c 0xdf 0x4c
+0x4f 0x2c 0xdf 0x4c
+
+# CHECK: ld1.8b { v1 }, [x2], #8
+# CHECK: ld1.8b { v1, v2 }, [x2], #16
+# CHECK: ld1.8b { v1, v2, v3 }, [x2], #24
+# CHECK: ld1.8b { v1, v2, v3, v4 }, [x2], #32
+# CHECK: ld1.16b { v2 }, [x2], #16
+# CHECK: ld1.16b { v2, v3 }, [x2], #32
+# CHECK: ld1.16b { v2, v3, v4 }, [x2], #48
+# CHECK: ld1.16b { v2, v3, v4, v5 }, [x2], #64
+# CHECK: ld1.4h { v4 }, [x3], #8
+# CHECK: ld1.4h { v4, v5 }, [x3], #16
+# CHECK: ld1.4h { v4, v5, v6 }, [x3], #24
+# CHECK: ld1.4h { v4, v5, v6, v7 }, [x3], #32
+# CHECK: ld1.8h { v7 }, [x4], #16
+# CHECK: ld1.8h { v7, v8 }, [x4], #32
+# CHECK: ld1.8h { v7, v8, v9 }, [x4], #48
+# CHECK: ld1.8h { v7, v8, v9, v10 }, [x4], #64
+# CHECK: ld1.2s { v12 }, [x0], #8
+# CHECK: ld1.2s { v12, v13 }, [x0], #16
+# CHECK: ld1.2s { v12, v13, v14 }, [x0], #24
+# CHECK: ld1.2s { v12, v13, v14, v15 }, [x0], #32
+# CHECK: ld1.4s { v10 }, [x0], #16
+# CHECK: ld1.4s { v10, v11 }, [x0], #32
+# CHECK: ld1.4s { v10, v11, v12 }, [x0], #48
+# CHECK: ld1.4s { v10, v11, v12, v13 }, [x0], #64
+# CHECK: ld1.1d { v13 }, [x1], #8
+# CHECK: ld1.1d { v13, v14 }, [x1], #16
+# CHECK: ld1.1d { v13, v14, v15 }, [x1], #24
+# CHECK: ld1.1d { v13, v14, v15, v16 }, [x1], #32
+# CHECK: ld1.2d { v15 }, [x2], #16
+# CHECK: ld1.2d { v15, v16 }, [x2], #32
+# CHECK: ld1.2d { v15, v16, v17 }, [x2], #48
+# CHECK: ld1.2d { v15, v16, v17, v18 }, [x2], #64
+
+0x21 0x70 0x00 0x0c
+0x42 0xa0 0x00 0x4c
+0x64 0x64 0x00 0x0c
+0x87 0x24 0x00 0x4c
+0x0c 0xa8 0x00 0x0c
+0x0a 0x68 0x00 0x4c
+0x2d 0xac 0x00 0x0c
+0x4f 0x7c 0x00 0x4c
+
+# CHECK: st1.8b { v1 }, [x1]
+# CHECK: st1.16b { v2, v3 }, [x2]
+# CHECK: st1.4h { v4, v5, v6 }, [x3]
+# CHECK: st1.8h { v7, v8, v9, v10 }, [x4]
+# CHECK: st1.2s { v12, v13 }, [x0]
+# CHECK: st1.4s { v10, v11, v12 }, [x0]
+# CHECK: st1.1d { v13, v14 }, [x1]
+# CHECK: st1.2d	{ v15 }, [x2]
+
+0x61 0x08 0x40 0x0d
+0x82 0x84 0x40 0x4d
+0xa3 0x58 0x40 0x0d
+0xc4 0x80 0x40 0x4d
+
+# CHECK: ld1.b { v1 }[2], [x3]
+# CHECK: ld1.d { v2 }[1], [x4]
+# CHECK: ld1.h { v3 }[3], [x5]
+# CHECK: ld1.s { v4 }[2], [x6]
+
+0x61 0x08 0xdf 0x0d
+0x82 0x84 0xdf 0x4d
+0xa3 0x58 0xdf 0x0d
+0xc4 0x80 0xdf 0x4d
+
+# CHECK: ld1.b { v1 }[2], [x3], #1
+# CHECK: ld1.d { v2 }[1], [x4], #8
+# CHECK: ld1.h { v3 }[3], [x5], #2
+# CHECK: ld1.s { v4 }[2], [x6], #4
+
+0x61 0x08 0x00 0x0d
+0x82 0x84 0x00 0x4d
+0xa3 0x58 0x00 0x0d
+0xc4 0x80 0x00 0x4d
+
+# CHECK: st1.b { v1 }[2], [x3]
+# CHECK: st1.d { v2 }[1], [x4]
+# CHECK: st1.h { v3 }[3], [x5]
+# CHECK: st1.s { v4 }[2], [x6]
+
+0x61 0x08 0x9f 0x0d
+0x82 0x84 0x9f 0x4d
+0xa3 0x58 0x9f 0x0d
+0xc4 0x80 0x9f 0x4d
+
+# CHECK: st1.b { v1 }[2], [x3], #1
+# CHECK: st1.d { v2 }[1], [x4], #8
+# CHECK: st1.h { v3 }[3], [x5], #2
+# CHECK: st1.s { v4 }[2], [x6], #4
+
+0x61 0x08 0xc4 0x0d
+0x82 0x84 0xc5 0x4d
+0xa3 0x58 0xc6 0x0d
+0xc4 0x80 0xc7 0x4d
+
+# CHECK: ld1.b { v1 }[2], [x3], x4
+# CHECK: ld1.d { v2 }[1], [x4], x5
+# CHECK: ld1.h { v3 }[3], [x5], x6
+# CHECK: ld1.s { v4 }[2], [x6], x7
+
+0x61 0x08 0x84 0x0d
+0x82 0x84 0x85 0x4d
+0xa3 0x58 0x86 0x0d
+0xc4 0x80 0x87 0x4d
+
+# CHECK: st1.b { v1 }[2], [x3], x4
+# CHECK: st1.d { v2 }[1], [x4], x5
+# CHECK: st1.h { v3 }[3], [x5], x6
+# CHECK: st1.s { v4 }[2], [x6], x7
+
+0x41 0x70 0xc3 0x0c
+0x42 0xa0 0xc4 0x4c
+0x64 0x64 0xc5 0x0c
+0x87 0x24 0xc6 0x4c
+0x0c 0xa8 0xc7 0x0c
+0x0a 0x68 0xc8 0x4c
+0x2d 0xac 0xc9 0x0c
+0x4f 0x7c 0xca 0x4c
+
+# CHECK: ld1.8b { v1 }, [x2], x3
+# CHECK: ld1.16b { v2, v3 }, [x2], x4
+# CHECK: ld1.4h { v4, v5, v6 }, [x3], x5
+# CHECK: ld1.8h { v7, v8, v9, v10 }, [x4], x6
+# CHECK: ld1.2s { v12, v13 }, [x0], x7
+# CHECK: ld1.4s { v10, v11, v12 }, [x0], x8
+# CHECK: ld1.1d { v13, v14 }, [x1], x9
+# CHECK: ld1.2d { v15 }, [x2], x10
+
+0x41 0x70 0x83 0x0c
+0x42 0xa0 0x84 0x4c
+0x64 0x64 0x85 0x0c
+0x87 0x24 0x86 0x4c
+0x0c 0xa8 0x87 0x0c
+0x0a 0x68 0x88 0x4c
+0x2d 0xac 0x89 0x0c
+0x4f 0x7c 0x8a 0x4c
+
+# CHECK: st1.8b { v1 }, [x2], x3
+# CHECK: st1.16b { v2, v3 }, [x2], x4
+# CHECK: st1.4h { v4, v5, v6 }, [x3], x5
+# CHECK: st1.8h { v7, v8, v9, v10 }, [x4], x6
+# CHECK: st1.2s { v12, v13 }, [x0], x7
+# CHECK: st1.4s { v10, v11, v12 }, [x0], x8
+# CHECK: st1.1d { v13, v14 }, [x1], x9
+# CHECK: st1.2d { v15 }, [x2], x10
+
+0x41 0x70 0x9f 0x0c
+0x41 0xa0 0x9f 0x0c
+0x41 0x60 0x9f 0x0c
+0x41 0x20 0x9f 0x0c
+0x42 0x70 0x9f 0x4c
+0x42 0xa0 0x9f 0x4c
+0x42 0x60 0x9f 0x4c
+0x42 0x20 0x9f 0x4c
+0x64 0x74 0x9f 0x0c
+0x64 0xa4 0x9f 0x0c
+0x64 0x64 0x9f 0x0c
+0x64 0x24 0x9f 0x0c
+0x87 0x74 0x9f 0x4c
+0x87 0xa4 0x9f 0x4c
+0x87 0x64 0x9f 0x4c
+0x87 0x24 0x9f 0x4c
+0x0c 0x78 0x9f 0x0c
+0x0c 0xa8 0x9f 0x0c
+0x0c 0x68 0x9f 0x0c
+0x0c 0x28 0x9f 0x0c
+0x0a 0x78 0x9f 0x4c
+0x0a 0xa8 0x9f 0x4c
+0x0a 0x68 0x9f 0x4c
+0x0a 0x28 0x9f 0x4c
+0x2d 0x7c 0x9f 0x0c
+0x2d 0xac 0x9f 0x0c
+0x2d 0x6c 0x9f 0x0c
+0x2d 0x2c 0x9f 0x0c
+0x4f 0x7c 0x9f 0x4c
+0x4f 0xac 0x9f 0x4c
+0x4f 0x6c 0x9f 0x4c
+0x4f 0x2c 0x9f 0x4c
+
+# CHECK: st1.8b { v1 }, [x2], #8
+# CHECK: st1.8b { v1, v2 }, [x2], #16
+# CHECK: st1.8b { v1, v2, v3 }, [x2], #24
+# CHECK: st1.8b { v1, v2, v3, v4 }, [x2], #32
+# CHECK: st1.16b { v2 }, [x2], #16
+# CHECK: st1.16b { v2, v3 }, [x2], #32
+# CHECK: st1.16b { v2, v3, v4 }, [x2], #48
+# CHECK: st1.16b { v2, v3, v4, v5 }, [x2], #64
+# CHECK: st1.4h { v4 }, [x3], #8
+# CHECK: st1.4h { v4, v5 }, [x3], #16
+# CHECK: st1.4h { v4, v5, v6 }, [x3], #24
+# CHECK: st1.4h { v4, v5, v6, v7 }, [x3], #32
+# CHECK: st1.8h { v7 }, [x4], #16
+# CHECK: st1.8h { v7, v8 }, [x4], #32
+# CHECK: st1.8h { v7, v8, v9 }, [x4], #48
+# CHECK: st1.8h { v7, v8, v9, v10 }, [x4], #64
+# CHECK: st1.2s { v12 }, [x0], #8
+# CHECK: st1.2s { v12, v13 }, [x0], #16
+# CHECK: st1.2s { v12, v13, v14 }, [x0], #24
+# CHECK: st1.2s { v12, v13, v14, v15 }, [x0], #32
+# CHECK: st1.4s { v10 }, [x0], #16
+# CHECK: st1.4s { v10, v11 }, [x0], #32
+# CHECK: st1.4s { v10, v11, v12 }, [x0], #48
+# CHECK: st1.4s { v10, v11, v12, v13 }, [x0], #64
+# CHECK: st1.1d { v13 }, [x1], #8
+# CHECK: st1.1d { v13, v14 }, [x1], #16
+# CHECK: st1.1d { v13, v14, v15 }, [x1], #24
+# CHECK: st1.1d { v13, v14, v15, v16 }, [x1], #32
+# CHECK: st1.2d { v15 }, [x2], #16
+# CHECK: st1.2d { v15, v16 }, [x2], #32
+# CHECK: st1.2d { v15, v16, v17 }, [x2], #48
+# CHECK: st1.2d { v15, v16, v17, v18 }, [x2], #64
+
+0x21 0xc0 0x40 0x0d
+0x21 0xc0 0xc2 0x0d
+0x64 0xc4 0x40 0x0d
+0x64 0xc4 0xc5 0x0d
+0xa9 0xc8 0x40 0x0d
+0xa9 0xc8 0xc6 0x0d
+0xec 0xcc 0x40 0x0d
+0xec 0xcc 0xc8 0x0d
+
+# CHECK: ld1r.8b { v1 }, [x1]
+# CHECK: ld1r.8b { v1 }, [x1], x2
+# CHECK: ld1r.4h { v4 }, [x3]
+# CHECK: ld1r.4h { v4 }, [x3], x5
+# CHECK: ld1r.2s { v9 }, [x5]
+# CHECK: ld1r.2s { v9 }, [x5], x6
+# CHECK: ld1r.1d { v12 }, [x7]
+# CHECK: ld1r.1d { v12 }, [x7], x8
+
+0x21 0xc0 0xdf 0x0d
+0x21 0xc4 0xdf 0x0d
+0x21 0xc8 0xdf 0x0d
+0x21 0xcc 0xdf 0x0d
+
+# CHECK: ld1r.8b { v1 }, [x1], #1
+# CHECK: ld1r.4h { v1 }, [x1], #2
+# CHECK: ld1r.2s { v1 }, [x1], #4
+# CHECK: ld1r.1d { v1 }, [x1], #8
+
+0x45 0x80 0x40 0x4c
+0x0a 0x88 0x40 0x0c
+
+# CHECK: ld2.16b { v5, v6 }, [x2]
+# CHECK: ld2.2s { v10, v11 }, [x0]
+
+0x45 0x80 0x00 0x4c
+0x0a 0x88 0x00 0x0c
+
+# CHECK: st2.16b { v5, v6 }, [x2]
+# CHECK: st2.2s { v10, v11 }, [x0]
+
+0x61 0x08 0x20 0x0d
+0x82 0x84 0x20 0x4d
+0xc3 0x50 0x20 0x0d
+0xe4 0x90 0x20 0x4d
+
+# CHECK: st2.b { v1, v2 }[2], [x3]
+# CHECK: st2.d { v2, v3 }[1], [x4]
+# CHECK: st2.h { v3, v4 }[2], [x6]
+# CHECK: st2.s { v4, v5 }[3], [x7]
+
+0x61 0x08 0xbf 0x0d
+0x82 0x84 0xbf 0x4d
+0xa3 0x58 0xbf 0x0d
+0xc4 0x80 0xbf 0x4d
+
+# CHECK: st2.b { v1, v2 }[2], [x3], #2
+# CHECK: st2.d { v2, v3 }[1], [x4], #16
+# CHECK: st2.h { v3, v4 }[3], [x5], #4
+# CHECK: st2.s { v4, v5 }[2], [x6], #8
+
+0x61 0x08 0x60 0x0d
+0x82 0x84 0x60 0x4d
+0xc3 0x50 0x60 0x0d
+0xe4 0x90 0x60 0x4d
+
+# CHECK: ld2.b { v1, v2 }[2], [x3]
+# CHECK: ld2.d { v2, v3 }[1], [x4]
+# CHECK: ld2.h { v3, v4 }[2], [x6]
+# CHECK: ld2.s { v4, v5 }[3], [x7]
+
+0x61 0x08 0xff 0x0d
+0x82 0x84 0xff 0x4d
+0xa3 0x58 0xff 0x0d
+0xc4 0x80 0xff 0x4d
+
+# CHECK: ld2.b { v1, v2 }[2], [x3], #2
+# CHECK: ld2.d { v2, v3 }[1], [x4], #16
+# CHECK: ld2.h { v3, v4 }[3], [x5], #4
+# CHECK: ld2.s { v4, v5 }[2], [x6], #8
+
+0x61 0x08 0xe4 0x0d
+0x82 0x84 0xe6 0x4d
+0xa3 0x58 0xe8 0x0d
+0xc4 0x80 0xea 0x4d
+
+# CHECK: ld2.b { v1, v2 }[2], [x3], x4
+# CHECK: ld2.d { v2, v3 }[1], [x4], x6
+# CHECK: ld2.h { v3, v4 }[3], [x5], x8
+# CHECK: ld2.s { v4, v5 }[2], [x6], x10
+
+0x61 0x08 0xa4 0x0d
+0x82 0x84 0xa6 0x4d
+0xa3 0x58 0xa8 0x0d
+0xc4 0x80 0xaa 0x4d
+
+# CHECK: st2.b { v1, v2 }[2], [x3], x4
+# CHECK: st2.d { v2, v3 }[1], [x4], x6
+# CHECK: st2.h { v3, v4 }[3], [x5], x8
+# CHECK: st2.s { v4, v5 }[2], [x6], x10
+
+0x64 0x84 0xc5 0x0c
+0x0c 0x88 0xc7 0x0c
+
+# CHECK: ld2.4h { v4, v5 }, [x3], x5
+# CHECK: ld2.2s { v12, v13 }, [x0], x7
+
+0x00 0x80 0xdf 0x0c
+0x00 0x80 0xdf 0x4c
+0x00 0x84 0xdf 0x0c
+0x00 0x84 0xdf 0x4c
+0x00 0x88 0xdf 0x0c
+0x00 0x88 0xdf 0x4c
+0x00 0x8c 0xdf 0x4c
+
+# CHECK: ld2.8b { v0, v1 }, [x0], #16
+# CHECK: ld2.16b { v0, v1 }, [x0], #32
+# CHECK: ld2.4h { v0, v1 }, [x0], #16
+# CHECK: ld2.8h { v0, v1 }, [x0], #32
+# CHECK: ld2.2s { v0, v1 }, [x0], #16
+# CHECK: ld2.4s { v0, v1 }, [x0], #32
+# CHECK: ld2.2d { v0, v1 }, [x0], #32
+
+0x64 0x84 0x85 0x0c
+0x0c 0x88 0x87 0x0c
+
+# CHECK: st2.4h { v4, v5 }, [x3], x5
+# CHECK: st2.2s { v12, v13 }, [x0], x7
+
+0x00 0x80 0x9f 0x0c
+0x00 0x80 0x9f 0x4c
+0x00 0x84 0x9f 0x0c
+0x00 0x84 0x9f 0x4c
+0x00 0x88 0x9f 0x0c
+0x00 0x88 0x9f 0x4c
+0x00 0x8c 0x9f 0x4c
+
+# CHECK: st2.8b { v0, v1 }, [x0], #16
+# CHECK: st2.16b { v0, v1 }, [x0], #32
+# CHECK: st2.4h { v0, v1 }, [x0], #16
+# CHECK: st2.8h { v0, v1 }, [x0], #32
+# CHECK: st2.2s { v0, v1 }, [x0], #16
+# CHECK: st2.4s { v0, v1 }, [x0], #32
+# CHECK: st2.2d { v0, v1 }, [x0], #32
+
+0x21 0xc0 0x60 0x0d
+0x21 0xc0 0xe2 0x0d
+0x21 0xc0 0x60 0x4d
+0x21 0xc0 0xe2 0x4d
+0x21 0xc4 0x60 0x0d
+0x21 0xc4 0xe2 0x0d
+0x21 0xc4 0x60 0x4d
+0x21 0xc4 0xe2 0x4d
+0x21 0xc8 0x60 0x0d
+0x21 0xc8 0xe2 0x0d
+0x21 0xcc 0x60 0x4d
+0x21 0xcc 0xe2 0x4d
+0x21 0xcc 0x60 0x0d
+0x21 0xcc 0xe2 0x0d
+
+# CHECK: ld2r.8b { v1, v2 }, [x1]
+# CHECK: ld2r.8b { v1, v2 }, [x1], x2
+# CHECK: ld2r.16b { v1, v2 }, [x1]
+# CHECK: ld2r.16b { v1, v2 }, [x1], x2
+# CHECK: ld2r.4h { v1, v2 }, [x1]
+# CHECK: ld2r.4h { v1, v2 }, [x1], x2
+# CHECK: ld2r.8h { v1, v2 }, [x1]
+# CHECK: ld2r.8h { v1, v2 }, [x1], x2
+# CHECK: ld2r.2s { v1, v2 }, [x1]
+# CHECK: ld2r.2s { v1, v2 }, [x1], x2
+# CHECK: ld2r.2d { v1, v2 }, [x1]
+# CHECK: ld2r.2d { v1, v2 }, [x1], x2
+# CHECK: ld2r.1d { v1, v2 }, [x1]
+# CHECK: ld2r.1d { v1, v2 }, [x1], x2
+
+0x21 0xc0 0xff 0x0d
+0x21 0xc0 0xff 0x4d
+0x21 0xc4 0xff 0x0d
+0x21 0xc4 0xff 0x4d
+0x21 0xc8 0xff 0x0d
+0x21 0xcc 0xff 0x4d
+0x21 0xcc 0xff 0x0d
+
+# CHECK: ld2r.8b { v1, v2 }, [x1], #2
+# CHECK: ld2r.16b { v1, v2 }, [x1], #2
+# CHECK: ld2r.4h { v1, v2 }, [x1], #4
+# CHECK: ld2r.8h { v1, v2 }, [x1], #4
+# CHECK: ld2r.2s { v1, v2 }, [x1], #8
+# CHECK: ld2r.2d { v1, v2 }, [x1], #16
+# CHECK: ld2r.1d { v1, v2 }, [x1], #16
+
+0x21 0x40 0x40 0x0c
+0x45 0x40 0x40 0x4c
+0x0a 0x48 0x40 0x0c
+
+# CHECK: ld3.8b { v1, v2, v3 }, [x1]
+# CHECK: ld3.16b { v5, v6, v7 }, [x2]
+# CHECK: ld3.2s { v10, v11, v12 }, [x0]
+
+0x21 0x40 0x00 0x0c
+0x45 0x40 0x00 0x4c
+0x0a 0x48 0x00 0x0c
+
+# CHECK: st3.8b { v1, v2, v3 }, [x1]
+# CHECK: st3.16b { v5, v6, v7 }, [x2]
+# CHECK: st3.2s { v10, v11, v12 }, [x0]
+
+0x61 0x28 0xc4 0x0d
+0x82 0xa4 0xc5 0x4d
+0xa3 0x78 0xc6 0x0d
+0xc4 0xa0 0xc7 0x4d
+
+# CHECK: ld3.b { v1, v2, v3 }[2], [x3], x4
+# CHECK: ld3.d { v2, v3, v4 }[1], [x4], x5
+# CHECK: ld3.h { v3, v4, v5 }[3], [x5], x6
+# CHECK: ld3.s { v4, v5, v6 }[2], [x6], x7
+
+0x61 0x28 0x84 0x0d
+0x82 0xa4 0x85 0x4d
+0xa3 0x78 0x86 0x0d
+0xc4 0xa0 0x87 0x4d
+
+# CHECK: st3.b { v1, v2, v3 }[2], [x3], x4
+# CHECK: st3.d { v2, v3, v4 }[1], [x4], x5
+# CHECK: st3.h { v3, v4, v5 }[3], [x5], x6
+# CHECK: st3.s { v4, v5, v6 }[2], [x6], x7
+
+0x61 0x28 0x9f 0x0d
+0x82 0xa4 0x9f 0x4d
+0xa3 0x78 0x9f 0x0d
+0xc4 0xa0 0x9f 0x4d
+
+# CHECK: st3.b { v1, v2, v3 }[2], [x3], #3
+# CHECK: st3.d { v2, v3, v4 }[1], [x4], #24
+# CHECK: st3.h { v3, v4, v5 }[3], [x5], #6
+# CHECK: st3.s { v4, v5, v6 }[2], [x6], #12
+
+0x41 0x40 0xc3 0x0c
+0x42 0x40 0xc4 0x4c
+0x64 0x44 0xc5 0x0c
+0x87 0x44 0xc6 0x4c
+0x0c 0x48 0xc7 0x0c
+0x0a 0x48 0xc8 0x4c
+0x4f 0x4c 0xca 0x4c
+
+# CHECK: ld3.8b { v1, v2, v3 }, [x2], x3
+# CHECK: ld3.16b { v2, v3, v4 }, [x2], x4
+# CHECK: ld3.4h { v4, v5, v6 }, [x3], x5
+# CHECK: ld3.8h { v7, v8, v9 }, [x4], x6
+# CHECK: ld3.2s { v12, v13, v14 }, [x0], x7
+# CHECK: ld3.4s { v10, v11, v12 }, [x0], x8
+# CHECK: ld3.2d { v15, v16, v17 }, [x2], x10
+
+0x00 0x40 0xdf 0x0c
+0x00 0x40 0xdf 0x4c
+0x00 0x44 0xdf 0x0c
+0x00 0x44 0xdf 0x4c
+0x00 0x48 0xdf 0x0c
+0x00 0x48 0xdf 0x4c
+0x00 0x4c 0xdf 0x4c
+
+# CHECK: ld3.8b { v0, v1, v2 }, [x0], #24
+# CHECK: ld3.16b { v0, v1, v2 }, [x0], #48
+# CHECK: ld3.4h { v0, v1, v2 }, [x0], #24
+# CHECK: ld3.8h { v0, v1, v2 }, [x0], #48
+# CHECK: ld3.2s { v0, v1, v2 }, [x0], #24
+# CHECK: ld3.4s { v0, v1, v2 }, [x0], #48
+# CHECK: ld3.2d { v0, v1, v2 }, [x0], #48
+
+0x41 0x40 0x83 0x0c
+0x42 0x40 0x84 0x4c
+0x64 0x44 0x85 0x0c
+0x87 0x44 0x86 0x4c
+0x0c 0x48 0x87 0x0c
+0x0a 0x48 0x88 0x4c
+0x4f 0x4c 0x8a 0x4c
+
+# CHECK: st3.8b { v1, v2, v3 }, [x2], x3
+# CHECK: st3.16b { v2, v3, v4 }, [x2], x4
+# CHECK: st3.4h { v4, v5, v6 }, [x3], x5
+# CHECK: st3.8h { v7, v8, v9 }, [x4], x6
+# CHECK: st3.2s { v12, v13, v14 }, [x0], x7
+# CHECK: st3.4s { v10, v11, v12 }, [x0], x8
+# CHECK: st3.2d { v15, v16, v17 }, [x2], x10
+
+0x00 0x40 0x9f 0x0c
+0x00 0x40 0x9f 0x4c
+0x00 0x44 0x9f 0x0c
+0x00 0x44 0x9f 0x4c
+0x00 0x48 0x9f 0x0c
+0x00 0x48 0x9f 0x4c
+0x00 0x4c 0x9f 0x4c
+
+# CHECK: st3.8b { v0, v1, v2 }, [x0], #24
+# CHECK: st3.16b { v0, v1, v2 }, [x0], #48
+# CHECK: st3.4h { v0, v1, v2 }, [x0], #24
+# CHECK: st3.8h { v0, v1, v2 }, [x0], #48
+# CHECK: st3.2s { v0, v1, v2 }, [x0], #24
+# CHECK: st3.4s { v0, v1, v2 }, [x0], #48
+# CHECK: st3.2d { v0, v1, v2 }, [x0], #48
+
+0x61 0x28 0x40 0x0d
+0x82 0xa4 0x40 0x4d
+0xc3 0x70 0x40 0x0d
+0xe4 0xb0 0x40 0x4d
+
+# CHECK: ld3.b { v1, v2, v3 }[2], [x3]
+# CHECK: ld3.d { v2, v3, v4 }[1], [x4]
+# CHECK: ld3.h { v3, v4, v5 }[2], [x6]
+# CHECK: ld3.s { v4, v5, v6 }[3], [x7]
+
+0x61 0x28 0xdf 0x0d
+0x82 0xa4 0xdf 0x4d
+0xa3 0x78 0xdf 0x0d
+0xc4 0xa0 0xdf 0x4d
+
+# CHECK: ld3.b { v1, v2, v3 }[2], [x3], #3
+# CHECK: ld3.d { v2, v3, v4 }[1], [x4], #24
+# CHECK: ld3.h { v3, v4, v5 }[3], [x5], #6
+# CHECK: ld3.s { v4, v5, v6 }[2], [x6], #12
+
+0x61 0x28 0x00 0x0d
+0x82 0xa4 0x00 0x4d
+0xc3 0x70 0x00 0x0d
+0xe4 0xb0 0x00 0x4d
+
+# CHECK: st3.b { v1, v2, v3 }[2], [x3]
+# CHECK: st3.d { v2, v3, v4 }[1], [x4]
+# CHECK: st3.h { v3, v4, v5 }[2], [x6]
+# CHECK: st3.s { v4, v5, v6 }[3], [x7]
+
+0x21 0xe0 0x40 0x0d
+0x21 0xe0 0xc2 0x0d
+0x21 0xe0 0x40 0x4d
+0x21 0xe0 0xc2 0x4d
+0x21 0xe4 0x40 0x0d
+0x21 0xe4 0xc2 0x0d
+0x21 0xe4 0x40 0x4d
+0x21 0xe4 0xc2 0x4d
+0x21 0xe8 0x40 0x0d
+0x21 0xe8 0xc2 0x0d
+0x21 0xec 0x40 0x4d
+0x21 0xec 0xc2 0x4d
+0x21 0xec 0x40 0x0d
+0x21 0xec 0xc2 0x0d
+
+# CHECK: ld3r.8b { v1, v2, v3 }, [x1]
+# CHECK: ld3r.8b { v1, v2, v3 }, [x1], x2
+# CHECK: ld3r.16b { v1, v2, v3 }, [x1]
+# CHECK: ld3r.16b { v1, v2, v3 }, [x1], x2
+# CHECK: ld3r.4h { v1, v2, v3 }, [x1]
+# CHECK: ld3r.4h { v1, v2, v3 }, [x1], x2
+# CHECK: ld3r.8h { v1, v2, v3 }, [x1]
+# CHECK: ld3r.8h { v1, v2, v3 }, [x1], x2
+# CHECK: ld3r.2s { v1, v2, v3 }, [x1]
+# CHECK: ld3r.2s { v1, v2, v3 }, [x1], x2
+# CHECK: ld3r.2d { v1, v2, v3 }, [x1]
+# CHECK: ld3r.2d { v1, v2, v3 }, [x1], x2
+# CHECK: ld3r.1d { v1, v2, v3 }, [x1]
+# CHECK: ld3r.1d { v1, v2, v3 }, [x1], x2
+
+0x21 0xe0 0xdf 0x0d
+0x21 0xe0 0xdf 0x4d
+0x21 0xe4 0xdf 0x0d
+0x21 0xe4 0xdf 0x4d
+0x21 0xe8 0xdf 0x0d
+0x21 0xec 0xdf 0x4d
+0x21 0xec 0xdf 0x0d
+
+# CHECK: ld3r.8b	{ v1, v2, v3 }, [x1], #3
+# CHECK: ld3r.16b	{ v1, v2, v3 }, [x1], #3
+# CHECK: ld3r.4h	{ v1, v2, v3 }, [x1], #6
+# CHECK: ld3r.8h	{ v1, v2, v3 }, [x1], #6
+# CHECK: ld3r.2s	{ v1, v2, v3 }, [x1], #12
+# CHECK: ld3r.2d	{ v1, v2, v3 }, [x1], #24
+# CHECK: ld3r.1d	{ v1, v2, v3 }, [x1], #24
+
+0x21 0x00 0x40 0x0c
+0x45 0x00 0x40 0x4c
+0x0a 0x08 0x40 0x0c
+
+# CHECK: ld4.8b { v1, v2, v3, v4 }, [x1]
+# CHECK: ld4.16b { v5, v6, v7, v8 }, [x2]
+# CHECK: ld4.2s { v10, v11, v12, v13 }, [x0]
+
+0x21 0x00 0x00 0x0c
+0x45 0x00 0x00 0x4c
+0x0a 0x08 0x00 0x0c
+
+# CHECK: st4.8b { v1, v2, v3, v4 }, [x1]
+# CHECK: st4.16b { v5, v6, v7, v8 }, [x2]
+# CHECK: st4.2s { v10, v11, v12, v13 }, [x0]
+
+0x61 0x28 0xe4 0x0d
+0x82 0xa4 0xe5 0x4d
+0xa3 0x78 0xe6 0x0d
+0xc4 0xa0 0xe7 0x4d
+
+# CHECK: ld4.b { v1, v2, v3, v4 }[2], [x3], x4
+# CHECK: ld4.d { v2, v3, v4, v5 }[1], [x4], x5
+# CHECK: ld4.h { v3, v4, v5, v6 }[3], [x5], x6
+# CHECK: ld4.s { v4, v5, v6, v7 }[2], [x6], x7
+
+0x61 0x28 0xff 0x0d
+0x82 0xa4 0xff 0x4d
+0xa3 0x78 0xff 0x0d
+0xc4 0xa0 0xff 0x4d
+
+# CHECK: ld4.b { v1, v2, v3, v4 }[2], [x3], #4
+# CHECK: ld4.d { v2, v3, v4, v5 }[1], [x4], #32
+# CHECK: ld4.h { v3, v4, v5, v6 }[3], [x5], #8
+# CHECK: ld4.s { v4, v5, v6, v7 }[2], [x6], #16
+
+0x61 0x28 0xa4 0x0d
+0x82 0xa4 0xa5 0x4d
+0xa3 0x78 0xa6 0x0d
+0xc4 0xa0 0xa7 0x4d
+
+# CHECK: st4.b { v1, v2, v3, v4 }[2], [x3], x4
+# CHECK: st4.d { v2, v3, v4, v5 }[1], [x4], x5
+# CHECK: st4.h { v3, v4, v5, v6 }[3], [x5], x6
+# CHECK: st4.s { v4, v5, v6, v7 }[2], [x6], x7
+
+0x61 0x28 0xbf 0x0d
+0x82 0xa4 0xbf 0x4d
+0xa3 0x78 0xbf 0x0d
+0xc4 0xa0 0xbf 0x4d
+
+# CHECK: st4.b { v1, v2, v3, v4 }[2], [x3], #4
+# CHECK: st4.d { v2, v3, v4, v5 }[1], [x4], #32
+# CHECK: st4.h { v3, v4, v5, v6 }[3], [x5], #8
+# CHECK: st4.s { v4, v5, v6, v7 }[2], [x6], #16
+
+0x41 0x00 0xc3 0x0c
+0x42 0x00 0xc4 0x4c
+0x64 0x04 0xc5 0x0c
+0x87 0x04 0xc6 0x4c
+0x0c 0x08 0xc7 0x0c
+0x0a 0x08 0xc8 0x4c
+0x4f 0x0c 0xca 0x4c
+
+# CHECK: ld4.8b { v1, v2, v3, v4 }, [x2], x3
+# CHECK: ld4.16b { v2, v3, v4, v5 }, [x2], x4
+# CHECK: ld4.4h { v4, v5, v6, v7 }, [x3], x5
+# CHECK: ld4.8h { v7, v8, v9, v10 }, [x4], x6
+# CHECK: ld4.2s { v12, v13, v14, v15 }, [x0], x7
+# CHECK: ld4.4s { v10, v11, v12, v13 }, [x0], x8
+# CHECK: ld4.2d { v15, v16, v17, v18 }, [x2], x10
+
+0x00 0x00 0xdf 0x0c
+0x00 0x00 0xdf 0x4c
+0x00 0x04 0xdf 0x0c
+0x00 0x04 0xdf 0x4c
+0x00 0x08 0xdf 0x0c
+0x00 0x08 0xdf 0x4c
+0x00 0x0c 0xdf 0x4c
+
+# CHECK: ld4.8b { v0, v1, v2, v3 }, [x0], #32
+# CHECK: ld4.16b { v0, v1, v2, v3 }, [x0], #64
+# CHECK: ld4.4h { v0, v1, v2, v3 }, [x0], #32
+# CHECK: ld4.8h { v0, v1, v2, v3 }, [x0], #64
+# CHECK: ld4.2s { v0, v1, v2, v3 }, [x0], #32
+# CHECK: ld4.4s { v0, v1, v2, v3 }, [x0], #64
+# CHECK: ld4.2d { v0, v1, v2, v3 }, [x0], #64
+
+0x00 0x00 0x9f 0x0c
+0x00 0x00 0x9f 0x4c
+0x00 0x04 0x9f 0x0c
+0x00 0x04 0x9f 0x4c
+0x00 0x08 0x9f 0x0c
+0x00 0x08 0x9f 0x4c
+0x00 0x0c 0x9f 0x4c
+
+# CHECK: st4.8b { v0, v1, v2, v3 }, [x0], #32
+# CHECK: st4.16b { v0, v1, v2, v3 }, [x0], #64
+# CHECK: st4.4h { v0, v1, v2, v3 }, [x0], #32
+# CHECK: st4.8h { v0, v1, v2, v3 }, [x0], #64
+# CHECK: st4.2s { v0, v1, v2, v3 }, [x0], #32
+# CHECK: st4.4s { v0, v1, v2, v3 }, [x0], #64
+# CHECK: st4.2d { v0, v1, v2, v3 }, [x0], #64
+
+0x41 0x00 0x83 0x0c
+0x42 0x00 0x84 0x4c
+0x64 0x04 0x85 0x0c
+0x87 0x04 0x86 0x4c
+0x0c 0x08 0x87 0x0c
+0x0a 0x08 0x88 0x4c
+0x4f 0x0c 0x8a 0x4c
+
+# CHECK: st4.8b { v1, v2, v3, v4 }, [x2], x3
+# CHECK: st4.16b { v2, v3, v4, v5 }, [x2], x4
+# CHECK: st4.4h { v4, v5, v6, v7 }, [x3], x5
+# CHECK: st4.8h { v7, v8, v9, v10 }, [x4], x6
+# CHECK: st4.2s { v12, v13, v14, v15 }, [x0], x7
+# CHECK: st4.4s { v10, v11, v12, v13 }, [x0], x8
+# CHECK: st4.2d { v15, v16, v17, v18 }, [x2], x10
+
+0x61 0x28 0x60 0x0d
+0x82 0xa4 0x60 0x4d
+0xc3 0x70 0x60 0x0d
+0xe4 0xb0 0x60 0x4d
+
+# CHECK: ld4.b { v1, v2, v3, v4 }[2], [x3]
+# CHECK: ld4.d { v2, v3, v4, v5 }[1], [x4]
+# CHECK: ld4.h { v3, v4, v5, v6 }[2], [x6]
+# CHECK: ld4.s { v4, v5, v6, v7 }[3], [x7]
+
+0x61 0x28 0x20 0x0d
+0x82 0xa4 0x20 0x4d
+0xc3 0x70 0x20 0x0d
+0xe4 0xb0 0x20 0x4d
+
+# CHECK: st4.b { v1, v2, v3, v4 }[2], [x3]
+# CHECK: st4.d { v2, v3, v4, v5 }[1], [x4]
+# CHECK: st4.h { v3, v4, v5, v6 }[2], [x6]
+# CHECK: st4.s { v4, v5, v6, v7 }[3], [x7]
+
+0x21 0xe0 0x60 0x0d
+0x21 0xe0 0xe2 0x0d
+0x21 0xe0 0x60 0x4d
+0x21 0xe0 0xe2 0x4d
+0x21 0xe4 0x60 0x0d
+0x21 0xe4 0xe2 0x0d
+0x21 0xe4 0x60 0x4d
+0x21 0xe4 0xe2 0x4d
+0x21 0xe8 0x60 0x0d
+0x21 0xe8 0xe2 0x0d
+0x21 0xec 0x60 0x4d
+0x21 0xec 0xe2 0x4d
+0x21 0xec 0x60 0x0d
+0x21 0xec 0xe2 0x0d
+
+# CHECK: ld4r.8b { v1, v2, v3, v4 }, [x1]
+# CHECK: ld4r.8b { v1, v2, v3, v4 }, [x1], x2
+# CHECK: ld4r.16b { v1, v2, v3, v4 }, [x1]
+# CHECK: ld4r.16b { v1, v2, v3, v4 }, [x1], x2
+# CHECK: ld4r.4h { v1, v2, v3, v4 }, [x1]
+# CHECK: ld4r.4h { v1, v2, v3, v4 }, [x1], x2
+# CHECK: ld4r.8h { v1, v2, v3, v4 }, [x1]
+# CHECK: ld4r.8h { v1, v2, v3, v4 }, [x1], x2
+# CHECK: ld4r.2s { v1, v2, v3, v4 }, [x1]
+# CHECK: ld4r.2s { v1, v2, v3, v4 }, [x1], x2
+# CHECK: ld4r.2d { v1, v2, v3, v4 }, [x1]
+# CHECK: ld4r.2d { v1, v2, v3, v4 }, [x1], x2
+# CHECK: ld4r.1d { v1, v2, v3, v4 }, [x1]
+# CHECK: ld4r.1d { v1, v2, v3, v4 }, [x1], x2
+
+0x21 0xe0 0xff 0x0d
+0x21 0xe0 0xff 0x4d
+0x21 0xe4 0xff 0x0d
+0x21 0xe4 0xff 0x4d
+0x21 0xe8 0xff 0x0d
+0x21 0xec 0xff 0x4d
+0x21 0xec 0xff 0x0d
+
+# CHECK: ld4r.8b	{ v1, v2, v3, v4 }, [x1], #4
+# CHECK: ld4r.16b	{ v1, v2, v3, v4 }, [x1], #4
+# CHECK: ld4r.4h	{ v1, v2, v3, v4 }, [x1], #8
+# CHECK: ld4r.8h	{ v1, v2, v3, v4 }, [x1], #8
+# CHECK: ld4r.2s	{ v1, v2, v3, v4 }, [x1], #16
+# CHECK: ld4r.2d	{ v1, v2, v3, v4 }, [x1], #32
+# CHECK: ld4r.1d	{ v1, v2, v3, v4 }, [x1], #32
+
+0x20 0xe4 0x00 0x2f
+0x20 0xe4 0x00 0x6f
+0x20 0xe4 0x00 0x0f
+0x20 0xe4 0x00 0x4f
+
+# CHECK: movi     d0, #0x000000000000ff
+# CHECK: movi.2d  v0, #0x000000000000ff
+# CHECK: movi.8b  v0, #1
+# CHECK: movi.16b v0, #1
+
+0x20 0x04 0x00 0x0f
+0x20 0x24 0x00 0x0f
+0x20 0x44 0x00 0x0f
+0x20 0x64 0x00 0x0f
+
+# CHECK: movi.2s v0, #1
+# CHECK: movi.2s v0, #1, lsl #8
+# CHECK: movi.2s v0, #1, lsl #16
+# CHECK: movi.2s v0, #1, lsl #24
+
+0x20 0x04 0x00 0x4f
+0x20 0x24 0x00 0x4f
+0x20 0x44 0x00 0x4f
+0x20 0x64 0x00 0x4f
+
+# CHECK: movi.4s v0, #1
+# CHECK: movi.4s v0, #1, lsl #8
+# CHECK: movi.4s v0, #1, lsl #16
+# CHECK: movi.4s v0, #1, lsl #24
+
+0x20 0x84 0x00 0x0f
+0x20 0xa4 0x00 0x0f
+
+# CHECK: movi.4h v0, #1
+# CHECK: movi.4h v0, #1, lsl #8
+
+0x20 0x84 0x00 0x4f
+0x20 0xa4 0x00 0x4f
+
+# CHECK: movi.8h v0, #1
+# CHECK: movi.8h v0, #1, lsl #8
+
+0x20 0x04 0x00 0x2f
+0x20 0x24 0x00 0x2f
+0x20 0x44 0x00 0x2f
+0x20 0x64 0x00 0x2f
+
+# CHECK: mvni.2s v0, #1
+# CHECK: mvni.2s v0, #1, lsl #8
+# CHECK: mvni.2s v0, #1, lsl #16
+# CHECK: mvni.2s v0, #1, lsl #24
+
+0x20 0x04 0x00 0x6f
+0x20 0x24 0x00 0x6f
+0x20 0x44 0x00 0x6f
+0x20 0x64 0x00 0x6f
+
+# CHECK: mvni.4s v0, #1
+# CHECK: mvni.4s v0, #1, lsl #8
+# CHECK: mvni.4s v0, #1, lsl #16
+# CHECK: mvni.4s v0, #1, lsl #24
+
+0x20 0x84 0x00 0x2f
+0x20 0xa4 0x00 0x2f
+
+# CHECK: mvni.4h v0, #1
+# CHECK: mvni.4h v0, #1, lsl #8
+
+0x20 0x84 0x00 0x6f
+0x20 0xa4 0x00 0x6f
+
+# CHECK: mvni.8h v0, #1
+# CHECK: mvni.8h v0, #1, lsl #8
+
+0x20 0xc4 0x00 0x2f
+0x20 0xd4 0x00 0x2f
+0x20 0xc4 0x00 0x6f
+0x20 0xd4 0x00 0x6f
+
+# CHECK: mvni.2s v0, #1, msl #8
+# CHECK: mvni.2s v0, #1, msl #16
+# CHECK: mvni.4s v0, #1, msl #8
+# CHECK: mvni.4s v0, #1, msl #16
+
+0x00 0x88 0x21 0x2e
+0x00 0x98 0x21 0x2e
+0x00 0x98 0xa1 0x2e
+0x00 0x98 0x21 0x0e
+0x00 0x88 0x21 0x0e
+0x00 0x88 0xa1 0x0e
+0x00 0x98 0xa1 0x0e
+
+# CHECK: frinta.2s	v0, v0
+# CHECK: frintx.2s	v0, v0
+# CHECK: frinti.2s	v0, v0
+# CHECK: frintm.2s	v0, v0
+# CHECK: frintn.2s	v0, v0
+# CHECK: frintp.2s	v0, v0
+# CHECK: frintz.2s	v0, v0
+
+#===-------------------------------------------------------------------------===
+# AdvSIMD scalar x index instructions
+#===-------------------------------------------------------------------------===
+
+0x00 0x18 0xa0 0x5f
+0x00 0x18 0xc0 0x5f
+0x00 0x58 0xa0 0x5f
+0x00 0x58 0xc0 0x5f
+0x00 0x98 0xa0 0x7f
+0x00 0x98 0xc0 0x7f
+0x00 0x98 0xa0 0x5f
+0x00 0x98 0xc0 0x5f
+0x00 0x38 0x70 0x5f
+0x00 0x38 0xa0 0x5f
+0x00 0x78 0x70 0x5f
+0x00 0xc8 0x70 0x5f
+0x00 0xc8 0xa0 0x5f
+0x00 0xb8 0x70 0x5f
+0x00 0xb8 0xa0 0x5f
+0x00 0xd8 0x70 0x5f
+0x00 0xd8 0xa0 0x5f
+
+# CHECK: fmla.s	s0, s0, v0[3]
+# CHECK: fmla.d	d0, d0, v0[1]
+# CHECK: fmls.s	s0, s0, v0[3]
+# CHECK: fmls.d	d0, d0, v0[1]
+# CHECK: fmulx.s	s0, s0, v0[3]
+# CHECK: fmulx.d	d0, d0, v0[1]
+# CHECK: fmul.s	s0, s0, v0[3]
+# CHECK: fmul.d	d0, d0, v0[1]
+# CHECK: sqdmlal.h	s0, h0, v0[7]
+# CHECK: sqdmlal.s	d0, s0, v0[3]
+# CHECK: sqdmlsl.h	s0, h0, v0[7]
+# CHECK: sqdmulh.h	h0, h0, v0[7]
+# CHECK: sqdmulh.s	s0, s0, v0[3]
+# CHECK: sqdmull.h	s0, h0, v0[7]
+# CHECK: sqdmull.s	d0, s0, v0[3]
+# CHECK: sqrdmulh.h	h0, h0, v0[7]
+# CHECK: sqrdmulh.s	s0, s0, v0[3]
+
+#===-------------------------------------------------------------------------===
+# AdvSIMD vector x index instructions
+#===-------------------------------------------------------------------------===
+
+  0x00 0x10 0x80 0x0f
+  0x00 0x10 0xa0 0x4f
+  0x00 0x18 0xc0 0x4f
+  0x00 0x50 0x80 0x0f
+  0x00 0x50 0xa0 0x4f
+  0x00 0x58 0xc0 0x4f
+  0x00 0x90 0x80 0x2f
+  0x00 0x90 0xa0 0x6f
+  0x00 0x98 0xc0 0x6f
+  0x00 0x90 0x80 0x0f
+  0x00 0x90 0xa0 0x4f
+  0x00 0x98 0xc0 0x4f
+  0x00 0x00 0x40 0x2f
+  0x00 0x00 0x50 0x6f
+  0x00 0x08 0x80 0x2f
+  0x00 0x08 0xa0 0x6f
+  0x00 0x40 0x40 0x2f
+  0x00 0x40 0x50 0x6f
+  0x00 0x48 0x80 0x2f
+  0x00 0x48 0xa0 0x6f
+  0x00 0x80 0x40 0x0f
+  0x00 0x80 0x50 0x4f
+  0x00 0x88 0x80 0x0f
+  0x00 0x88 0xa0 0x4f
+  0x00 0x20 0x40 0x0f
+  0x00 0x20 0x50 0x4f
+  0x00 0x28 0x80 0x0f
+  0x00 0x28 0xa0 0x4f
+  0x00 0x60 0x40 0x0f
+  0x00 0x60 0x50 0x4f
+  0x00 0x68 0x80 0x0f
+  0x00 0x68 0xa0 0x4f
+  0x00 0xa0 0x40 0x0f
+  0x00 0xa0 0x50 0x4f
+  0x00 0xa8 0x80 0x0f
+  0x00 0xa8 0xa0 0x4f
+  0x00 0x30 0x40 0x0f
+  0x00 0x30 0x50 0x4f
+  0x00 0x38 0x80 0x0f
+  0x00 0x38 0xa0 0x4f
+  0x00 0x70 0x40 0x0f
+  0x00 0x70 0x50 0x4f
+  0x00 0x78 0x80 0x0f
+  0x00 0x78 0xa0 0x4f
+  0x00 0xc0 0x40 0x0f
+  0x00 0xc0 0x50 0x4f
+  0x00 0xc8 0x80 0x0f
+  0x00 0xc8 0xa0 0x4f
+  0x00 0xb0 0x40 0x0f
+  0x00 0xb0 0x50 0x4f
+  0x00 0xb8 0x80 0x0f
+  0x00 0xb8 0xa0 0x4f
+  0x00 0xd0 0x40 0x0f
+  0x00 0xd0 0x50 0x4f
+  0x00 0xd8 0x80 0x0f
+  0x00 0xd8 0xa0 0x4f
+  0x00 0x20 0x40 0x2f
+  0x00 0x20 0x50 0x6f
+  0x00 0x28 0x80 0x2f
+  0x00 0x28 0xa0 0x6f
+  0x00 0x60 0x40 0x2f
+  0x00 0x60 0x50 0x6f
+  0x00 0x68 0x80 0x2f
+  0x00 0x68 0xa0 0x6f
+  0x00 0xa0 0x40 0x2f
+  0x00 0xa0 0x50 0x6f
+  0x00 0xa8 0x80 0x2f
+  0x00 0xa8 0xa0 0x6f
+
+# CHECK: fmla.2s	v0, v0, v0[0]
+# CHECK: fmla.4s	v0, v0, v0[1]
+# CHECK: fmla.2d	v0, v0, v0[1]
+# CHECK: fmls.2s	v0, v0, v0[0]
+# CHECK: fmls.4s	v0, v0, v0[1]
+# CHECK: fmls.2d	v0, v0, v0[1]
+# CHECK: fmulx.2s	v0, v0, v0[0]
+# CHECK: fmulx.4s	v0, v0, v0[1]
+# CHECK: fmulx.2d	v0, v0, v0[1]
+# CHECK: fmul.2s	v0, v0, v0[0]
+# CHECK: fmul.4s	v0, v0, v0[1]
+# CHECK: fmul.2d	v0, v0, v0[1]
+# CHECK: mla.4h	v0, v0, v0[0]
+# CHECK: mla.8h	v0, v0, v0[1]
+# CHECK: mla.2s	v0, v0, v0[2]
+# CHECK: mla.4s	v0, v0, v0[3]
+# CHECK: mls.4h	v0, v0, v0[0]
+# CHECK: mls.8h	v0, v0, v0[1]
+# CHECK: mls.2s	v0, v0, v0[2]
+# CHECK: mls.4s	v0, v0, v0[3]
+# CHECK: mul.4h	v0, v0, v0[0]
+# CHECK: mul.8h	v0, v0, v0[1]
+# CHECK: mul.2s	v0, v0, v0[2]
+# CHECK: mul.4s	v0, v0, v0[3]
+# CHECK: smlal.4s	v0, v0, v0[0]
+# CHECK: smlal2.4s	v0, v0, v0[1]
+# CHECK: smlal.2d	v0, v0, v0[2]
+# CHECK: smlal2.2d	v0, v0, v0[3]
+# CHECK: smlsl.4s	v0, v0, v0[0]
+# CHECK: smlsl2.4s	v0, v0, v0[1]
+# CHECK: smlsl.2d	v0, v0, v0[2]
+# CHECK: smlsl2.2d	v0, v0, v0[3]
+# CHECK: smull.4s	v0, v0, v0[0]
+# CHECK: smull2.4s	v0, v0, v0[1]
+# CHECK: smull.2d	v0, v0, v0[2]
+# CHECK: smull2.2d	v0, v0, v0[3]
+# CHECK: sqdmlal.4s	v0, v0, v0[0]
+# CHECK: sqdmlal2.4s	v0, v0, v0[1]
+# CHECK: sqdmlal.2d	v0, v0, v0[2]
+# CHECK: sqdmlal2.2d	v0, v0, v0[3]
+# CHECK: sqdmlsl.4s	v0, v0, v0[0]
+# CHECK: sqdmlsl2.4s	v0, v0, v0[1]
+# CHECK: sqdmlsl.2d	v0, v0, v0[2]
+# CHECK: sqdmlsl2.2d	v0, v0, v0[3]
+# CHECK: sqdmulh.4h	v0, v0, v0[0]
+# CHECK: sqdmulh.8h	v0, v0, v0[1]
+# CHECK: sqdmulh.2s	v0, v0, v0[2]
+# CHECK: sqdmulh.4s	v0, v0, v0[3]
+# CHECK: sqdmull.4s	v0, v0, v0[0]
+# CHECK: sqdmull2.4s	v0, v0, v0[1]
+# CHECK: sqdmull.2d	v0, v0, v0[2]
+# CHECK: sqdmull2.2d	v0, v0, v0[3]
+# CHECK: sqrdmulh.4h	v0, v0, v0[0]
+# CHECK: sqrdmulh.8h	v0, v0, v0[1]
+# CHECK: sqrdmulh.2s	v0, v0, v0[2]
+# CHECK: sqrdmulh.4s	v0, v0, v0[3]
+# CHECK: umlal.4s	v0, v0, v0[0]
+# CHECK: umlal2.4s	v0, v0, v0[1]
+# CHECK: umlal.2d	v0, v0, v0[2]
+# CHECK: umlal2.2d	v0, v0, v0[3]
+# CHECK: umlsl.4s	v0, v0, v0[0]
+# CHECK: umlsl2.4s	v0, v0, v0[1]
+# CHECK: umlsl.2d	v0, v0, v0[2]
+# CHECK: umlsl2.2d	v0, v0, v0[3]
+# CHECK: umull.4s	v0, v0, v0[0]
+# CHECK: umull2.4s	v0, v0, v0[1]
+# CHECK: umull.2d	v0, v0, v0[2]
+# CHECK: umull2.2d	v0, v0, v0[3]
+
+
+#===-------------------------------------------------------------------------===
+# AdvSIMD scalar + shift instructions
+#===-------------------------------------------------------------------------===
+
+  0x00 0x54 0x41 0x5f
+  0x00 0x54 0x41 0x7f
+  0x00 0x9c 0x09 0x5f
+  0x00 0x9c 0x12 0x5f
+  0x00 0x9c 0x23 0x5f
+  0x00 0x8c 0x09 0x7f
+  0x00 0x8c 0x12 0x7f
+  0x00 0x8c 0x23 0x7f
+  0x00 0x64 0x09 0x7f
+  0x00 0x64 0x12 0x7f
+  0x00 0x64 0x23 0x7f
+  0x00 0x64 0x44 0x7f
+  0x00 0x74 0x09 0x5f
+  0x00 0x74 0x12 0x5f
+  0x00 0x74 0x23 0x5f
+  0x00 0x74 0x44 0x5f
+  0x00 0x94 0x09 0x5f
+  0x00 0x94 0x12 0x5f
+  0x00 0x94 0x23 0x5f
+  0x00 0x84 0x09 0x7f
+  0x00 0x84 0x12 0x7f
+  0x00 0x84 0x23 0x7f
+  0x00 0x44 0x41 0x7f
+  0x00 0x24 0x41 0x5f
+  0x00 0x34 0x41 0x5f
+  0x00 0x04 0x41 0x5f
+  0x00 0xe4 0x21 0x7f
+  0x00 0xe4 0x42 0x7f
+  0x00 0x9c 0x09 0x7f
+  0x00 0x9c 0x12 0x7f
+  0x00 0x9c 0x23 0x7f
+  0x00 0x74 0x09 0x7f
+  0x00 0x74 0x12 0x7f
+  0x00 0x74 0x23 0x7f
+  0x00 0x74 0x44 0x7f
+  0x00 0x94 0x09 0x7f
+  0x00 0x94 0x12 0x7f
+  0x00 0x94 0x23 0x7f
+  0x00 0x24 0x41 0x7f
+  0x00 0x34 0x41 0x7f
+  0x00 0x04 0x41 0x7f
+  0x00 0x14 0x41 0x7f
+
+# CHECK: shl	d0, d0, #1
+# CHECK: sli	d0, d0, #1
+# CHECK: sqrshrn	b0, h0, #7
+# CHECK: sqrshrn	h0, s0, #14
+# CHECK: sqrshrn	s0, d0, #29
+# CHECK: sqrshrun	b0, h0, #7
+# CHECK: sqrshrun	h0, s0, #14
+# CHECK: sqrshrun	s0, d0, #29
+# CHECK: sqshlu	b0, b0, #1
+# CHECK: sqshlu	h0, h0, #2
+# CHECK: sqshlu	s0, s0, #3
+# CHECK: sqshlu	d0, d0, #4
+# CHECK: sqshl	b0, b0, #1
+# CHECK: sqshl	h0, h0, #2
+# CHECK: sqshl	s0, s0, #3
+# CHECK: sqshl	d0, d0, #4
+# CHECK: sqshrn	b0, h0, #7
+# CHECK: sqshrn	h0, s0, #14
+# CHECK: sqshrn	s0, d0, #29
+# CHECK: sqshrun	b0, h0, #7
+# CHECK: sqshrun	h0, s0, #14
+# CHECK: sqshrun	s0, d0, #29
+# CHECK: sri	d0, d0, #63
+# CHECK: srshr	d0, d0, #63
+# CHECK: srsra	d0, d0, #63
+# CHECK: sshr	d0, d0, #63
+# CHECK: ucvtf	s0, s0, #31
+# CHECK: ucvtf	d0, d0, #62
+# CHECK: uqrshrn	b0, h0, #7
+# CHECK: uqrshrn	h0, s0, #14
+# CHECK: uqrshrn	s0, d0, #29
+# CHECK: uqshl	b0, b0, #1
+# CHECK: uqshl	h0, h0, #2
+# CHECK: uqshl	s0, s0, #3
+# CHECK: uqshl	d0, d0, #4
+# CHECK: uqshrn	b0, h0, #7
+# CHECK: uqshrn	h0, s0, #14
+# CHECK: uqshrn	s0, d0, #29
+# CHECK: urshr	d0, d0, #63
+# CHECK: ursra	d0, d0, #63
+# CHECK: ushr	d0, d0, #63
+# CHECK: usra	d0, d0, #63
+
+#===-------------------------------------------------------------------------===
+# AdvSIMD vector + shift instructions
+#===-------------------------------------------------------------------------===
+
+  0x00 0xfc 0x21 0x0f
+  0x00 0xfc 0x22 0x4f
+  0x00 0xfc 0x43 0x4f
+  0x00 0xfc 0x21 0x2f
+  0x00 0xfc 0x22 0x6f
+  0x00 0xfc 0x43 0x6f
+  0x00 0x8c 0x09 0x0f
+  0x00 0x8c 0x0a 0x4f
+  0x00 0x8c 0x13 0x0f
+  0x00 0x8c 0x14 0x4f
+  0x00 0x8c 0x25 0x0f
+  0x00 0x8c 0x26 0x4f
+  0x00 0xe4 0x21 0x0f
+  0x00 0xe4 0x22 0x4f
+  0x00 0xe4 0x43 0x4f
+  0x00 0x54 0x09 0x0f
+  0x00 0x54 0x0a 0x4f
+  0x00 0x54 0x13 0x0f
+  0x00 0x54 0x14 0x4f
+  0x00 0x54 0x25 0x0f
+  0x00 0x54 0x26 0x4f
+  0x00 0x54 0x47 0x4f
+  0x00 0x84 0x09 0x0f
+  0x00 0x84 0x0a 0x4f
+  0x00 0x84 0x13 0x0f
+  0x00 0x84 0x14 0x4f
+  0x00 0x84 0x25 0x0f
+  0x00 0x84 0x26 0x4f
+  0x00 0x54 0x09 0x2f
+  0x00 0x54 0x0a 0x6f
+  0x00 0x54 0x13 0x2f
+  0x00 0x54 0x14 0x6f
+  0x00 0x54 0x25 0x2f
+  0x00 0x54 0x26 0x6f
+  0x00 0x54 0x47 0x6f
+  0x00 0x9c 0x09 0x0f
+  0x00 0x9c 0x0a 0x4f
+  0x00 0x9c 0x13 0x0f
+  0x00 0x9c 0x14 0x4f
+  0x00 0x9c 0x25 0x0f
+  0x00 0x9c 0x26 0x4f
+  0x00 0x8c 0x09 0x2f
+  0x00 0x8c 0x0a 0x6f
+  0x00 0x8c 0x13 0x2f
+  0x00 0x8c 0x14 0x6f
+  0x00 0x8c 0x25 0x2f
+  0x00 0x8c 0x26 0x6f
+  0x00 0x64 0x09 0x2f
+  0x00 0x64 0x0a 0x6f
+  0x00 0x64 0x13 0x2f
+  0x00 0x64 0x14 0x6f
+  0x00 0x64 0x25 0x2f
+  0x00 0x64 0x26 0x6f
+  0x00 0x64 0x47 0x6f
+  0x00 0x74 0x09 0x0f
+  0x00 0x74 0x0a 0x4f
+  0x00 0x74 0x13 0x0f
+  0x00 0x74 0x14 0x4f
+  0x00 0x74 0x25 0x0f
+  0x00 0x74 0x26 0x4f
+  0x00 0x74 0x47 0x4f
+  0x00 0x94 0x09 0x0f
+  0x00 0x94 0x0a 0x4f
+  0x00 0x94 0x13 0x0f
+  0x00 0x94 0x14 0x4f
+  0x00 0x94 0x25 0x0f
+  0x00 0x94 0x26 0x4f
+  0x00 0x84 0x09 0x2f
+  0x00 0x84 0x0a 0x6f
+  0x00 0x84 0x13 0x2f
+  0x00 0x84 0x14 0x6f
+  0x00 0x84 0x25 0x2f
+  0x00 0x84 0x26 0x6f
+  0x00 0x44 0x09 0x2f
+  0x00 0x44 0x0a 0x6f
+  0x00 0x44 0x13 0x2f
+  0x00 0x44 0x14 0x6f
+  0x00 0x44 0x25 0x2f
+  0x00 0x44 0x26 0x6f
+  0x00 0x44 0x47 0x6f
+  0x00 0x24 0x09 0x0f
+  0x00 0x24 0x0a 0x4f
+  0x00 0x24 0x13 0x0f
+  0x00 0x24 0x14 0x4f
+  0x00 0x24 0x25 0x0f
+  0x00 0x24 0x26 0x4f
+  0x00 0x24 0x47 0x4f
+  0x00 0x34 0x09 0x0f
+  0x00 0x34 0x0a 0x4f
+  0x00 0x34 0x13 0x0f
+  0x00 0x34 0x14 0x4f
+  0x00 0x34 0x25 0x0f
+  0x00 0x34 0x26 0x4f
+  0x00 0x34 0x47 0x4f
+  0x00 0xa4 0x09 0x0f
+  0x00 0xa4 0x0a 0x4f
+  0x00 0xa4 0x13 0x0f
+  0x00 0xa4 0x14 0x4f
+  0x00 0xa4 0x25 0x0f
+  0x00 0xa4 0x26 0x4f
+  0x00 0x04 0x09 0x0f
+  0x00 0x04 0x0a 0x4f
+  0x00 0x04 0x13 0x0f
+  0x00 0x04 0x14 0x4f
+  0x00 0x04 0x25 0x0f
+  0x00 0x04 0x26 0x4f
+  0x00 0x04 0x47 0x4f
+  0x00 0x04 0x09 0x0f
+  0x00 0x14 0x0a 0x4f
+  0x00 0x14 0x13 0x0f
+  0x00 0x14 0x14 0x4f
+  0x00 0x14 0x25 0x0f
+  0x00 0x14 0x26 0x4f
+  0x00 0x14 0x47 0x4f
+  0x00 0x14 0x40 0x5f
+  0x00 0xe4 0x21 0x2f
+  0x00 0xe4 0x22 0x6f
+  0x00 0xe4 0x43 0x6f
+  0x00 0x9c 0x09 0x2f
+  0x00 0x9c 0x0a 0x6f
+  0x00 0x9c 0x13 0x2f
+  0x00 0x9c 0x14 0x6f
+  0x00 0x9c 0x25 0x2f
+  0x00 0x9c 0x26 0x6f
+  0x00 0x74 0x09 0x2f
+  0x00 0x74 0x0a 0x6f
+  0x00 0x74 0x13 0x2f
+  0x00 0x74 0x14 0x6f
+  0x00 0x74 0x25 0x2f
+  0x00 0x74 0x26 0x6f
+  0x00 0x74 0x47 0x6f
+  0x00 0x94 0x09 0x2f
+  0x00 0x94 0x0a 0x6f
+  0x00 0x94 0x13 0x2f
+  0x00 0x94 0x14 0x6f
+  0x00 0x94 0x25 0x2f
+  0x00 0x94 0x26 0x6f
+  0x00 0x24 0x09 0x2f
+  0x00 0x24 0x0a 0x6f
+  0x00 0x24 0x13 0x2f
+  0x00 0x24 0x14 0x6f
+  0x00 0x24 0x25 0x2f
+  0x00 0x24 0x26 0x6f
+  0x00 0x24 0x47 0x6f
+  0x00 0x34 0x09 0x2f
+  0x00 0x34 0x0a 0x6f
+  0x00 0x34 0x13 0x2f
+  0x00 0x34 0x14 0x6f
+  0x00 0x34 0x25 0x2f
+  0x00 0x34 0x26 0x6f
+  0x00 0x34 0x47 0x6f
+  0x00 0xa4 0x09 0x2f
+  0x00 0xa4 0x0a 0x6f
+  0x00 0xa4 0x13 0x2f
+  0x00 0xa4 0x14 0x6f
+  0x00 0xa4 0x25 0x2f
+  0x00 0xa4 0x26 0x6f
+  0x00 0x04 0x09 0x2f
+  0x00 0x04 0x0a 0x6f
+  0x00 0x04 0x13 0x2f
+  0x00 0x04 0x14 0x6f
+  0x00 0x04 0x25 0x2f
+  0x00 0x04 0x26 0x6f
+  0x00 0x04 0x47 0x6f
+  0x00 0x14 0x09 0x2f
+  0x00 0x14 0x0a 0x6f
+  0x00 0x14 0x13 0x2f
+  0x00 0x14 0x14 0x6f
+  0x00 0x14 0x25 0x2f
+  0x00 0x14 0x26 0x6f
+  0x00 0x14 0x47 0x6f
+
+# CHECK: fcvtzs.2s	v0, v0, #31
+# CHECK: fcvtzs.4s	v0, v0, #30
+# CHECK: fcvtzs.2d	v0, v0, #61
+# CHECK: fcvtzu.2s	v0, v0, #31
+# CHECK: fcvtzu.4s	v0, v0, #30
+# CHECK: fcvtzu.2d	v0, v0, #61
+# CHECK: rshrn.8b	v0, v0, #7
+# CHECK: rshrn2.16b	v0, v0, #6
+# CHECK: rshrn.4h	v0, v0, #13
+# CHECK: rshrn2.8h	v0, v0, #12
+# CHECK: rshrn.2s	v0, v0, #27
+# CHECK: rshrn2.4s	v0, v0, #26
+# CHECK: scvtf.2s	v0, v0, #31
+# CHECK: scvtf.4s	v0, v0, #30
+# CHECK: scvtf.2d	v0, v0, #61
+# CHECK: shl.8b	v0, v0, #1
+# CHECK: shl.16b	v0, v0, #2
+# CHECK: shl.4h	v0, v0, #3
+# CHECK: shl.8h	v0, v0, #4
+# CHECK: shl.2s	v0, v0, #5
+# CHECK: shl.4s	v0, v0, #6
+# CHECK: shl.2d	v0, v0, #7
+# CHECK: shrn.8b	v0, v0, #7
+# CHECK: shrn2.16b	v0, v0, #6
+# CHECK: shrn.4h	v0, v0, #13
+# CHECK: shrn2.8h	v0, v0, #12
+# CHECK: shrn.2s	v0, v0, #27
+# CHECK: shrn2.4s	v0, v0, #26
+# CHECK: sli.8b	v0, v0, #1
+# CHECK: sli.16b	v0, v0, #2
+# CHECK: sli.4h	v0, v0, #3
+# CHECK: sli.8h	v0, v0, #4
+# CHECK: sli.2s	v0, v0, #5
+# CHECK: sli.4s	v0, v0, #6
+# CHECK: sli.2d	v0, v0, #7
+# CHECK: sqrshrn.8b	v0, v0, #7
+# CHECK: sqrshrn2.16b	v0, v0, #6
+# CHECK: sqrshrn.4h	v0, v0, #13
+# CHECK: sqrshrn2.8h	v0, v0, #12
+# CHECK: sqrshrn.2s	v0, v0, #27
+# CHECK: sqrshrn2.4s	v0, v0, #26
+# CHECK: sqrshrun.8b	v0, v0, #7
+# CHECK: sqrshrun2.16b	v0, v0, #6
+# CHECK: sqrshrun.4h	v0, v0, #13
+# CHECK: sqrshrun2.8h	v0, v0, #12
+# CHECK: sqrshrun.2s	v0, v0, #27
+# CHECK: sqrshrun2.4s	v0, v0, #26
+# CHECK: sqshlu.8b	v0, v0, #1
+# CHECK: sqshlu.16b	v0, v0, #2
+# CHECK: sqshlu.4h	v0, v0, #3
+# CHECK: sqshlu.8h	v0, v0, #4
+# CHECK: sqshlu.2s	v0, v0, #5
+# CHECK: sqshlu.4s	v0, v0, #6
+# CHECK: sqshlu.2d	v0, v0, #7
+# CHECK: sqshl.8b	v0, v0, #1
+# CHECK: sqshl.16b	v0, v0, #2
+# CHECK: sqshl.4h	v0, v0, #3
+# CHECK: sqshl.8h	v0, v0, #4
+# CHECK: sqshl.2s	v0, v0, #5
+# CHECK: sqshl.4s	v0, v0, #6
+# CHECK: sqshl.2d	v0, v0, #7
+# CHECK: sqshrn.8b	v0, v0, #7
+# CHECK: sqshrn2.16b	v0, v0, #6
+# CHECK: sqshrn.4h	v0, v0, #13
+# CHECK: sqshrn2.8h	v0, v0, #12
+# CHECK: sqshrn.2s	v0, v0, #27
+# CHECK: sqshrn2.4s	v0, v0, #26
+# CHECK: sqshrun.8b	v0, v0, #7
+# CHECK: sqshrun2.16b	v0, v0, #6
+# CHECK: sqshrun.4h	v0, v0, #13
+# CHECK: sqshrun2.8h	v0, v0, #12
+# CHECK: sqshrun.2s	v0, v0, #27
+# CHECK: sqshrun2.4s	v0, v0, #26
+# CHECK: sri.8b	v0, v0, #7
+# CHECK: sri.16b	v0, v0, #6
+# CHECK: sri.4h	v0, v0, #13
+# CHECK: sri.8h	v0, v0, #12
+# CHECK: sri.2s	v0, v0, #27
+# CHECK: sri.4s	v0, v0, #26
+# CHECK: sri.2d	v0, v0, #57
+# CHECK: srshr.8b	v0, v0, #7
+# CHECK: srshr.16b	v0, v0, #6
+# CHECK: srshr.4h	v0, v0, #13
+# CHECK: srshr.8h	v0, v0, #12
+# CHECK: srshr.2s	v0, v0, #27
+# CHECK: srshr.4s	v0, v0, #26
+# CHECK: srshr.2d	v0, v0, #57
+# CHECK: srsra.8b	v0, v0, #7
+# CHECK: srsra.16b	v0, v0, #6
+# CHECK: srsra.4h	v0, v0, #13
+# CHECK: srsra.8h	v0, v0, #12
+# CHECK: srsra.2s	v0, v0, #27
+# CHECK: srsra.4s	v0, v0, #26
+# CHECK: srsra.2d	v0, v0, #57
+# CHECK: sshll.8h	v0, v0, #1
+# CHECK: sshll2.8h	v0, v0, #2
+# CHECK: sshll.4s	v0, v0, #3
+# CHECK: sshll2.4s	v0, v0, #4
+# CHECK: sshll.2d	v0, v0, #5
+# CHECK: sshll2.2d	v0, v0, #6
+# CHECK: sshr.8b	v0, v0, #7
+# CHECK: sshr.16b	v0, v0, #6
+# CHECK: sshr.4h	v0, v0, #13
+# CHECK: sshr.8h	v0, v0, #12
+# CHECK: sshr.2s	v0, v0, #27
+# CHECK: sshr.4s	v0, v0, #26
+# CHECK: sshr.2d	v0, v0, #57
+# CHECK: sshr.8b	v0, v0, #7
+# CHECK: ssra.16b	v0, v0, #6
+# CHECK: ssra.4h	v0, v0, #13
+# CHECK: ssra.8h	v0, v0, #12
+# CHECK: ssra.2s	v0, v0, #27
+# CHECK: ssra.4s	v0, v0, #26
+# CHECK: ssra.2d	v0, v0, #57
+# CHECK: ssra		d0, d0, #64
+# CHECK: ucvtf.2s	v0, v0, #31
+# CHECK: ucvtf.4s	v0, v0, #30
+# CHECK: ucvtf.2d	v0, v0, #61
+# CHECK: uqrshrn.8b	v0, v0, #7
+# CHECK: uqrshrn2.16b	v0, v0, #6
+# CHECK: uqrshrn.4h	v0, v0, #13
+# CHECK: uqrshrn2.8h	v0, v0, #12
+# CHECK: uqrshrn.2s	v0, v0, #27
+# CHECK: uqrshrn2.4s	v0, v0, #26
+# CHECK: uqshl.8b	v0, v0, #1
+# CHECK: uqshl.16b	v0, v0, #2
+# CHECK: uqshl.4h	v0, v0, #3
+# CHECK: uqshl.8h	v0, v0, #4
+# CHECK: uqshl.2s	v0, v0, #5
+# CHECK: uqshl.4s	v0, v0, #6
+# CHECK: uqshl.2d	v0, v0, #7
+# CHECK: uqshrn.8b	v0, v0, #7
+# CHECK: uqshrn2.16b	v0, v0, #6
+# CHECK: uqshrn.4h	v0, v0, #13
+# CHECK: uqshrn2.8h	v0, v0, #12
+# CHECK: uqshrn.2s	v0, v0, #27
+# CHECK: uqshrn2.4s	v0, v0, #26
+# CHECK: urshr.8b	v0, v0, #7
+# CHECK: urshr.16b	v0, v0, #6
+# CHECK: urshr.4h	v0, v0, #13
+# CHECK: urshr.8h	v0, v0, #12
+# CHECK: urshr.2s	v0, v0, #27
+# CHECK: urshr.4s	v0, v0, #26
+# CHECK: urshr.2d	v0, v0, #57
+# CHECK: ursra.8b	v0, v0, #7
+# CHECK: ursra.16b	v0, v0, #6
+# CHECK: ursra.4h	v0, v0, #13
+# CHECK: ursra.8h	v0, v0, #12
+# CHECK: ursra.2s	v0, v0, #27
+# CHECK: ursra.4s	v0, v0, #26
+# CHECK: ursra.2d	v0, v0, #57
+# CHECK: ushll.8h	v0, v0, #1
+# CHECK: ushll2.8h	v0, v0, #2
+# CHECK: ushll.4s	v0, v0, #3
+# CHECK: ushll2.4s	v0, v0, #4
+# CHECK: ushll.2d	v0, v0, #5
+# CHECK: ushll2.2d	v0, v0, #6
+# CHECK: ushr.8b	v0, v0, #7
+# CHECK: ushr.16b	v0, v0, #6
+# CHECK: ushr.4h	v0, v0, #13
+# CHECK: ushr.8h	v0, v0, #12
+# CHECK: ushr.2s	v0, v0, #27
+# CHECK: ushr.4s	v0, v0, #26
+# CHECK: ushr.2d	v0, v0, #57
+# CHECK: usra.8b	v0, v0, #7
+# CHECK: usra.16b	v0, v0, #6
+# CHECK: usra.4h	v0, v0, #13
+# CHECK: usra.8h	v0, v0, #12
+# CHECK: usra.2s	v0, v0, #27
+# CHECK: usra.4s	v0, v0, #26
+# CHECK: usra.2d	v0, v0, #57
+
+
+  0x00 0xe0 0x20 0x0e
+  0x00 0xe0 0x20 0x4e
+  0x00 0xe0 0xe0 0x0e
+  0x00 0xe0 0xe0 0x4e
+
+# CHECK: pmull.8h v0, v0, v0
+# CHECK: pmull2.8h v0, v0, v0
+# CHECK: pmull.1q v0, v0, v0
+# CHECK: pmull2.1q v0, v0, v0
+
+  0x41 0xd8 0x70 0x7e
+  0x83 0xd8 0x30 0x7e
+# CHECK: faddp.2d	d1, v2
+# CHECK: faddp.2s	s3, v4
+
+  0x82 0x60 0x01 0x4e
+  0x80 0x60 0x01 0x0e
+  0xa2 0x00 0x01 0x4e
+  0xa0 0x00 0x01 0x0e
+  0xa2 0x40 0x01 0x4e
+  0xa0 0x40 0x01 0x0e
+  0xc2 0x20 0x01 0x4e
+  0xc0 0x20 0x01 0x0e
+
+# CHECK: tbl.16b	v2, { v4, v5, v6, v7 }, v1
+# CHECK: tbl.8b	v0, { v4, v5, v6, v7 }, v1
+# CHECK: tbl.16b	v2, { v5 }, v1
+# CHECK: tbl.8b	v0, { v5 }, v1
+# CHECK: tbl.16b	v2, { v5, v6, v7 }, v1
+# CHECK: tbl.8b	v0, { v5, v6, v7 }, v1
+# CHECK: tbl.16b	v2, { v6, v7 }, v1
+# CHECK: tbl.8b	v0, { v6, v7 }, v1
+#
+  0x82 0x70 0x01 0x4e
+  0x80 0x70 0x01 0x0e
+  0xa2 0x10 0x01 0x4e
+  0xa0 0x10 0x01 0x0e
+  0xa2 0x50 0x01 0x4e
+  0xa0 0x50 0x01 0x0e
+  0xc2 0x30 0x01 0x4e
+  0xc0 0x30 0x01 0x0e
+
+# CHECK: tbx.16b	v2, { v4, v5, v6, v7 }, v1
+# CHECK: tbx.8b	v0, { v4, v5, v6, v7 }, v1
+# CHECK: tbx.16b	v2, { v5 }, v1
+# CHECK: tbx.8b	v0, { v5 }, v1
+# CHECK: tbx.16b	v2, { v5, v6, v7 }, v1
+# CHECK: tbx.8b	v0, { v5, v6, v7 }, v1
+# CHECK: tbx.16b	v2, { v6, v7 }, v1
+# CHECK: tbx.8b	v0, { v6, v7 }, v1
+#
+
+0x00 0x80 0x20 0x0e
+0x00 0x80 0x20 0x4e
+0x00 0x80 0xa0 0x0e
+0x00 0x80 0xa0 0x4e
+
+# CHECK: smlal.8h v0, v0, v0
+# CHECK: smlal2.8h v0, v0, v0
+# CHECK: smlal.2d v0, v0, v0
+# CHECK: smlal2.2d v0, v0, v0
+
+0x00 0x80 0x20 0x2e
+0x00 0x80 0x20 0x6e
+0x00 0x80 0xa0 0x2e
+0x00 0x80 0xa0 0x6e
+
+# CHECK: umlal.8h v0, v0, v0
+# CHECK: umlal2.8h v0, v0, v0
+# CHECK: umlal.2d v0, v0, v0
+# CHECK: umlal2.2d v0, v0, v0
+
+0x00 0x90 0x60 0x5e
+0x00 0x90 0xa0 0x5e
+0x00 0xb0 0x60 0x5e
+0x00 0xb0 0xa0 0x5e
+
+# CHECK: sqdmlal s0, h0, h0
+# CHECK: sqdmlal d0, s0, s0
+# CHECK: sqdmlsl s0, h0, h0
+# CHECK: sqdmlsl d0, s0, s0
+
+0xaa 0xc5 0xc7 0x4d
+0xaa 0xc9 0xc7 0x4d
+0xaa 0xc1 0xc7 0x4d
+
+# CHECK: ld1r.8h { v10 }, [x13], x7
+# CHECK: ld1r.4s { v10 }, [x13], x7
+# CHECK: ld1r.16b { v10 }, [x13], x7
+
+0x00 0xd0 0x60 0x5e
+0x00 0xd0 0xa0 0x5e
+# CHECK: sqdmull	s0, h0, h0
+# CHECK: sqdmull	d0, s0, s0
+
+0x00 0xd8 0xa1 0x7e
+0x00 0xd8 0xe1 0x7e
+
+# CHECK: frsqrte s0, s0
+# CHECK: frsqrte d0, d0
+
+0xca 0xcd 0xc7 0x4d
+0xea 0xc9 0xe7 0x4d
+0xea 0xe9 0xc7 0x4d
+0xea 0xe9 0xe7 0x4d
+# CHECK: ld1r.2d	{ v10 }, [x14], x7
+# CHECK: ld2r.4s	{ v10, v11 }, [x15], x7
+# CHECK: ld3r.4s	{ v10, v11, v12 }, [x15], x7
+# CHECK: ld4r.4s	{ v10, v11, v12, v13 }, [x15], x7
+
+#===-------------------------------------------------------------------------===
+# AdvSIMD scalar three same
+#===-------------------------------------------------------------------------===
+0x62 0xdc 0x21 0x5e
+# CHECK: fmulx	s2, s3, s1
+0x62 0xdc 0x61 0x5e
+# CHECK: fmulx	d2, d3, d1
+
+
+# rdar://12511369
+0xe8 0x6b 0xdf 0x4c
+# CHECK: ld1.4s	{ v8, v9, v10 }, [sp], #48
diff --git a/test/MC/Disassembler/ARM64/arithmetic.txt b/test/MC/Disassembler/ARM64/arithmetic.txt
new file mode 100644
index 0000000..3981219
--- /dev/null
+++ b/test/MC/Disassembler/ARM64/arithmetic.txt
@@ -0,0 +1,522 @@
+# RUN: llvm-mc -triple arm64-apple-darwin --disassemble < %s | FileCheck %s
+
+#==---------------------------------------------------------------------------==
+# Add/Subtract with carry/borrow
+#==---------------------------------------------------------------------------==
+
+0x41 0x00 0x03 0x1a
+0x41 0x00 0x03 0x9a
+0x85 0x00 0x03 0x3a
+0x85 0x00 0x03 0xba
+
+# CHECK: adc  w1, w2, w3
+# CHECK: adc  x1, x2, x3
+# CHECK: adcs w5, w4, w3
+# CHECK: adcs x5, x4, x3
+
+0x41 0x00 0x03 0x5a
+0x41 0x00 0x03 0xda
+0x41 0x00 0x03 0x7a
+0x41 0x00 0x03 0xfa
+
+# CHECK: sbc  w1, w2, w3
+# CHECK: sbc  x1, x2, x3
+# CHECK: sbcs w1, w2, w3
+# CHECK: sbcs x1, x2, x3
+
+#==---------------------------------------------------------------------------==
+# Add/Subtract with (optionally shifted) immediate
+#==---------------------------------------------------------------------------==
+
+0x83 0x00 0x10 0x11
+0x83 0x00 0x10 0x91
+
+# CHECK: add w3, w4, #1024
+# CHECK: add x3, x4, #1024
+
+0x83 0x00 0x50 0x11
+0x83 0x00 0x40 0x11
+0x83 0x00 0x50 0x91
+0x83 0x00 0x40 0x91
+0xff 0x83 0x00 0x91
+
+# CHECK: add w3, w4, #4194304
+# CHECK: add x3, x4, #4194304
+# CHECK: add x3, x4, #0, lsl #12
+# CHECK: add sp, sp, #32
+
+0x83 0x00 0x10 0x31
+0x83 0x00 0x50 0x31
+0x83 0x00 0x10 0xb1
+0x83 0x00 0x50 0xb1
+
+# CHECK: adds w3, w4, #1024
+# CHECK: adds w3, w4, #4194304
+# CHECK: adds x3, x4, #1024
+# CHECK: adds x3, x4, #4194304
+
+0x83 0x00 0x10 0x51
+0x83 0x00 0x50 0x51
+0x83 0x00 0x10 0xd1
+0x83 0x00 0x50 0xd1
+0xff 0x83 0x00 0xd1
+
+# CHECK: sub w3, w4, #1024
+# CHECK: sub w3, w4, #4194304
+# CHECK: sub x3, x4, #1024
+# CHECK: sub x3, x4, #4194304
+# CHECK: sub sp, sp, #32
+
+0x83 0x00 0x10 0x71
+0x83 0x00 0x50 0x71
+0x83 0x00 0x10 0xf1
+0x83 0x00 0x50 0xf1
+
+# CHECK: subs w3, w4, #1024
+# CHECK: subs w3, w4, #4194304
+# CHECK: subs x3, x4, #1024
+# CHECK: subs x3, x4, #4194304
+
+#==---------------------------------------------------------------------------==
+# Add/Subtract register with (optional) shift
+#==---------------------------------------------------------------------------==
+
+0xac 0x01 0x0e 0x0b
+0xac 0x01 0x0e 0x8b
+0xac 0x31 0x0e 0x0b
+0xac 0x31 0x0e 0x8b
+0xac 0xa9 0x4e 0x0b
+0xac 0xa9 0x4e 0x8b
+0xac 0x9d 0x8e 0x0b
+0xac 0x9d 0x8e 0x8b
+
+# CHECK: add w12, w13, w14
+# CHECK: add x12, x13, x14
+# CHECK: add w12, w13, w14, lsl #12
+# CHECK: add x12, x13, x14, lsl #12
+# CHECK: add w12, w13, w14, lsr #42
+# CHECK: add x12, x13, x14, lsr #42
+# CHECK: add w12, w13, w14, asr #39
+# CHECK: add x12, x13, x14, asr #39
+
+0xac 0x01 0x0e 0x4b
+0xac 0x01 0x0e 0xcb
+0xac 0x31 0x0e 0x4b
+0xac 0x31 0x0e 0xcb
+0xac 0xa9 0x4e 0x4b
+0xac 0xa9 0x4e 0xcb
+0xac 0x9d 0x8e 0x4b
+0xac 0x9d 0x8e 0xcb
+
+# CHECK: sub w12, w13, w14
+# CHECK: sub x12, x13, x14
+# CHECK: sub w12, w13, w14, lsl #12
+# CHECK: sub x12, x13, x14, lsl #12
+# CHECK: sub w12, w13, w14, lsr #42
+# CHECK: sub x12, x13, x14, lsr #42
+# CHECK: sub w12, w13, w14, asr #39
+# CHECK: sub x12, x13, x14, asr #39
+
+0xac 0x01 0x0e 0x2b
+0xac 0x01 0x0e 0xab
+0xac 0x31 0x0e 0x2b
+0xac 0x31 0x0e 0xab
+0xac 0xa9 0x4e 0x2b
+0xac 0xa9 0x4e 0xab
+0xac 0x9d 0x8e 0x2b
+0xac 0x9d 0x8e 0xab
+
+# CHECK: adds w12, w13, w14
+# CHECK: adds x12, x13, x14
+# CHECK: adds w12, w13, w14, lsl #12
+# CHECK: adds x12, x13, x14, lsl #12
+# CHECK: adds w12, w13, w14, lsr #42
+# CHECK: adds x12, x13, x14, lsr #42
+# CHECK: adds w12, w13, w14, asr #39
+# CHECK: adds x12, x13, x14, asr #39
+
+0xac 0x01 0x0e 0x6b
+0xac 0x01 0x0e 0xeb
+0xac 0x31 0x0e 0x6b
+0xac 0x31 0x0e 0xeb
+0xac 0xa9 0x4e 0x6b
+0xac 0xa9 0x4e 0xeb
+0xac 0x9d 0x8e 0x6b
+0xac 0x9d 0x8e 0xeb
+
+# CHECK: subs w12, w13, w14
+# CHECK: subs x12, x13, x14
+# CHECK: subs w12, w13, w14, lsl #12
+# CHECK: subs x12, x13, x14, lsl #12
+# CHECK: subs w12, w13, w14, lsr #42
+# CHECK: subs x12, x13, x14, lsr #42
+# CHECK: subs w12, w13, w14, asr #39
+# CHECK: subs x12, x13, x14, asr #39
+
+#==---------------------------------------------------------------------------==
+# Add/Subtract with (optional) extend
+#==---------------------------------------------------------------------------==
+
+0x41 0x00 0x23 0x0b
+0x41 0x20 0x23 0x0b
+0x41 0x40 0x23 0x0b
+0x41 0x60 0x23 0x0b
+0x41 0x80 0x23 0x0b
+0x41 0xa0 0x23 0x0b
+0x41 0xc0 0x23 0x0b
+0x41 0xe0 0x23 0x0b
+
+# CHECK: add w1, w2, w3, uxtb
+# CHECK: add w1, w2, w3, uxth
+# CHECK: add w1, w2, w3, uxtw
+# CHECK: add w1, w2, w3, uxtx
+# CHECK: add w1, w2, w3, sxtb
+# CHECK: add w1, w2, w3, sxth
+# CHECK: add w1, w2, w3, sxtw
+# CHECK: add w1, w2, w3, sxtx
+
+0x41 0x00 0x23 0x8b
+0x41 0x20 0x23 0x8b
+0x41 0x40 0x23 0x8b
+0x41 0x80 0x23 0x8b
+0x41 0xa0 0x23 0x8b
+0x41 0xc0 0x23 0x8b
+
+# CHECK: add x1, x2, w3, uxtb
+# CHECK: add x1, x2, w3, uxth
+# CHECK: add x1, x2, w3, uxtw
+# CHECK: add x1, x2, w3, sxtb
+# CHECK: add x1, x2, w3, sxth
+# CHECK: add x1, x2, w3, sxtw
+
+0xe1 0x43 0x23 0x0b
+0xe1 0x43 0x23 0x0b
+0x5f 0x60 0x23 0x8b
+0x5f 0x60 0x23 0x8b
+
+# CHECK: add w1, wsp, w3
+# CHECK: add w1, wsp, w3
+# CHECK: add sp, x2, x3
+# CHECK: add sp, x2, x3
+
+0x41 0x00 0x23 0x4b
+0x41 0x20 0x23 0x4b
+0x41 0x40 0x23 0x4b
+0x41 0x60 0x23 0x4b
+0x41 0x80 0x23 0x4b
+0x41 0xa0 0x23 0x4b
+0x41 0xc0 0x23 0x4b
+0x41 0xe0 0x23 0x4b
+
+# CHECK: sub w1, w2, w3, uxtb
+# CHECK: sub w1, w2, w3, uxth
+# CHECK: sub w1, w2, w3, uxtw
+# CHECK: sub w1, w2, w3, uxtx
+# CHECK: sub w1, w2, w3, sxtb
+# CHECK: sub w1, w2, w3, sxth
+# CHECK: sub w1, w2, w3, sxtw
+# CHECK: sub w1, w2, w3, sxtx
+
+0x41 0x00 0x23 0xcb
+0x41 0x20 0x23 0xcb
+0x41 0x40 0x23 0xcb
+0x41 0x80 0x23 0xcb
+0x41 0xa0 0x23 0xcb
+0x41 0xc0 0x23 0xcb
+
+# CHECK: sub x1, x2, w3, uxtb
+# CHECK: sub x1, x2, w3, uxth
+# CHECK: sub x1, x2, w3, uxtw
+# CHECK: sub x1, x2, w3, sxtb
+# CHECK: sub x1, x2, w3, sxth
+# CHECK: sub x1, x2, w3, sxtw
+
+0xe1 0x43 0x23 0x4b
+0xe1 0x43 0x23 0x4b
+0x5f 0x60 0x23 0xcb
+0x5f 0x60 0x23 0xcb
+
+# CHECK: sub w1, wsp, w3
+# CHECK: sub w1, wsp, w3
+# CHECK: sub sp, x2, x3
+# CHECK: sub sp, x2, x3
+
+0x41 0x00 0x23 0x2b
+0x41 0x20 0x23 0x2b
+0x41 0x40 0x23 0x2b
+0x41 0x60 0x23 0x2b
+0x41 0x80 0x23 0x2b
+0x41 0xa0 0x23 0x2b
+0x41 0xc0 0x23 0x2b
+0x41 0xe0 0x23 0x2b
+
+# CHECK: adds w1, w2, w3, uxtb
+# CHECK: adds w1, w2, w3, uxth
+# CHECK: adds w1, w2, w3, uxtw
+# CHECK: adds w1, w2, w3, uxtx
+# CHECK: adds w1, w2, w3, sxtb
+# CHECK: adds w1, w2, w3, sxth
+# CHECK: adds w1, w2, w3, sxtw
+# CHECK: adds w1, w2, w3, sxtx
+
+0x41 0x00 0x23 0xab
+0x41 0x20 0x23 0xab
+0x41 0x40 0x23 0xab
+0x41 0x80 0x23 0xab
+0x41 0xa0 0x23 0xab
+0x41 0xc0 0x23 0xab
+
+# CHECK: adds x1, x2, w3, uxtb
+# CHECK: adds x1, x2, w3, uxth
+# CHECK: adds x1, x2, w3, uxtw
+# CHECK: adds x1, x2, w3, sxtb
+# CHECK: adds x1, x2, w3, sxth
+# CHECK: adds x1, x2, w3, sxtw
+
+0xe1 0x43 0x23 0x2b
+0xe1 0x43 0x23 0x2b
+
+# CHECK: adds w1, wsp, w3
+# CHECK: adds w1, wsp, w3
+
+0x41 0x00 0x23 0x6b
+0x41 0x20 0x23 0x6b
+0x41 0x40 0x23 0x6b
+0x41 0x60 0x23 0x6b
+0x41 0x80 0x23 0x6b
+0x41 0xa0 0x23 0x6b
+0x41 0xc0 0x23 0x6b
+0x41 0xe0 0x23 0x6b
+
+# CHECK: subs w1, w2, w3, uxtb
+# CHECK: subs w1, w2, w3, uxth
+# CHECK: subs w1, w2, w3, uxtw
+# CHECK: subs w1, w2, w3, uxtx
+# CHECK: subs w1, w2, w3, sxtb
+# CHECK: subs w1, w2, w3, sxth
+# CHECK: subs w1, w2, w3, sxtw
+# CHECK: subs w1, w2, w3, sxtx
+
+0x41 0x00 0x23 0xeb
+0x41 0x20 0x23 0xeb
+0x41 0x40 0x23 0xeb
+0x41 0x80 0x23 0xeb
+0x41 0xa0 0x23 0xeb
+0x41 0xc0 0x23 0xeb
+
+# CHECK: subs x1, x2, w3, uxtb
+# CHECK: subs x1, x2, w3, uxth
+# CHECK: subs x1, x2, w3, uxtw
+# CHECK: subs x1, x2, w3, sxtb
+# CHECK: subs x1, x2, w3, sxth
+# CHECK: subs x1, x2, w3, sxtw
+
+0xe1 0x43 0x23 0x6b
+0xe1 0x43 0x23 0x6b
+
+# CHECK: subs w1, wsp, w3
+# CHECK: subs w1, wsp, w3
+
+0x1f 0x41 0x28 0xeb
+0x3f 0x41 0x28 0x6b
+0xff 0x43 0x28 0x6b
+0xff 0x43 0x28 0xeb
+
+# CHECK: cmp x8, w8, uxtw
+# CHECK: cmp w9, w8, uxtw
+# CHECK: cmp wsp, w8
+# CHECK: cmp sp, w8
+
+0x3f 0x41 0x28 0x4b
+0xe1 0x43 0x28 0x4b
+0xff 0x43 0x28 0x4b
+0x3f 0x41 0x28 0xcb
+0xe1 0x43 0x28 0xcb
+0xff 0x43 0x28 0xcb
+0xe1 0x43 0x28 0x6b
+0xe1 0x43 0x28 0xeb
+
+# CHECK: sub wsp, w9, w8
+# CHECK: sub w1, wsp, w8
+# CHECK: sub wsp, wsp, w8
+# CHECK: sub sp, x9, w8
+# CHECK: sub x1, sp, w8
+# CHECK: sub sp, sp, w8
+# CHECK: subs w1, wsp, w8
+# CHECK: subs x1, sp, w8
+
+#==---------------------------------------------------------------------------==
+# Signed/Unsigned divide
+#==---------------------------------------------------------------------------==
+
+0x41 0x0c 0xc3 0x1a
+0x41 0x0c 0xc3 0x9a
+0x41 0x08 0xc3 0x1a
+0x41 0x08 0xc3 0x9a
+
+# CHECK: sdiv w1, w2, w3
+# CHECK: sdiv x1, x2, x3
+# CHECK: udiv w1, w2, w3
+# CHECK: udiv x1, x2, x3
+
+#==---------------------------------------------------------------------------==
+# Variable shifts
+#==---------------------------------------------------------------------------==
+
+  0x41 0x28 0xc3 0x1a
+# CHECK: asrv w1, w2, w3
+  0x41 0x28 0xc3 0x9a
+# CHECK: asrv x1, x2, x3
+  0x41 0x20 0xc3 0x1a
+# CHECK: lslv w1, w2, w3
+  0x41 0x20 0xc3 0x9a
+# CHECK: lslv x1, x2, x3
+  0x41 0x24 0xc3 0x1a
+# CHECK: lsrv w1, w2, w3
+  0x41 0x24 0xc3 0x9a
+# CHECK: lsrv x1, x2, x3
+  0x41 0x2c 0xc3 0x1a
+# CHECK: rorv w1, w2, w3
+  0x41 0x2c 0xc3 0x9a
+# CHECK: rorv x1, x2, x3
+
+#==---------------------------------------------------------------------------==
+# One operand instructions
+#==---------------------------------------------------------------------------==
+
+  0x41 0x14 0xc0 0x5a
+# CHECK: cls w1, w2
+  0x41 0x14 0xc0 0xda
+# CHECK: cls x1, x2
+  0x41 0x10 0xc0 0x5a
+# CHECK: clz w1, w2
+  0x41 0x10 0xc0 0xda
+# CHECK: clz x1, x2
+  0x41 0x00 0xc0 0x5a
+# CHECK: rbit w1, w2
+  0x41 0x00 0xc0 0xda
+# CHECK: rbit x1, x2
+  0x41 0x08 0xc0 0x5a
+# CHECK: rev w1, w2
+  0x41 0x0c 0xc0 0xda
+# CHECK: rev x1, x2
+  0x41 0x04 0xc0 0x5a
+# CHECK: rev16 w1, w2
+  0x41 0x04 0xc0 0xda
+# CHECK: rev16 x1, x2
+  0x41 0x08 0xc0 0xda
+# CHECK: rev32 x1, x2
+
+#==---------------------------------------------------------------------------==
+# 6.6.1 Multiply-add instructions
+#==---------------------------------------------------------------------------==
+
+0x41 0x10 0x03 0x1b
+0x41 0x10 0x03 0x9b
+0x41 0x90 0x03 0x1b
+0x41 0x90 0x03 0x9b
+0x41 0x10 0x23 0x9b
+0x41 0x90 0x23 0x9b
+0x41 0x10 0xa3 0x9b
+0x41 0x90 0xa3 0x9b
+
+# CHECK: madd   w1, w2, w3, w4
+# CHECK: madd   x1, x2, x3, x4
+# CHECK: msub   w1, w2, w3, w4
+# CHECK: msub   x1, x2, x3, x4
+# CHECK: smaddl x1, w2, w3, x4
+# CHECK: smsubl x1, w2, w3, x4
+# CHECK: umaddl x1, w2, w3, x4
+# CHECK: umsubl x1, w2, w3, x4
+
+#==---------------------------------------------------------------------------==
+# Multiply-high instructions
+#==---------------------------------------------------------------------------==
+
+0x41 0x7c 0x43 0x9b
+0x41 0x7c 0xc3 0x9b
+
+# CHECK: smulh x1, x2, x3
+# CHECK: umulh x1, x2, x3
+
+#==---------------------------------------------------------------------------==
+# Move immediate instructions
+#==---------------------------------------------------------------------------==
+
+0x20 0x00 0x80 0x52
+0x20 0x00 0x80 0xd2
+0x20 0x00 0xa0 0x52
+0x20 0x00 0xa0 0xd2
+
+# CHECK: movz w0, #1
+# CHECK: movz x0, #1
+# CHECK: movz w0, #1, lsl #16
+# CHECK: movz x0, #1, lsl #16
+
+0x40 0x00 0x80 0x12
+0x40 0x00 0x80 0x92
+0x40 0x00 0xa0 0x12
+0x40 0x00 0xa0 0x92
+
+# CHECK: movn w0, #2
+# CHECK: movn x0, #2
+# CHECK: movn w0, #2, lsl #16
+# CHECK: movn x0, #2, lsl #16
+
+0x20 0x00 0x80 0x72
+0x20 0x00 0x80 0xf2
+0x20 0x00 0xa0 0x72
+0x20 0x00 0xa0 0xf2
+
+# CHECK: movk w0, #1
+# CHECK: movk x0, #1
+# CHECK: movk w0, #1, lsl #16
+# CHECK: movk x0, #1, lsl #16
+
+#==---------------------------------------------------------------------------==
+# Conditionally set flags instructions
+#==---------------------------------------------------------------------------==
+
+  0x1f 0x00 0x00 0x31
+# CHECK: cmn w0, #0
+  0x1f 0xfc 0x03 0xb1
+# CHECK: x0, #255
+
+  0x23 0x08 0x42 0x3a
+# CHECK: ccmn w1, #2, #3, eq
+  0x23 0x08 0x42 0xba
+# CHECK: ccmn x1, #2, #3, eq
+  0x23 0x08 0x42 0x7a
+# CHECK: ccmp w1, #2, #3, eq
+  0x23 0x08 0x42 0xfa
+# CHECK: ccmp x1, #2, #3, eq
+
+  0x23 0x00 0x42 0x3a
+# CHECK: ccmn w1, w2, #3, eq
+  0x23 0x00 0x42 0xba
+# CHECK: ccmn x1, x2, #3, eq
+  0x23 0x00 0x42 0x7a
+# CHECK: ccmp w1, w2, #3, eq
+  0x23 0x00 0x42 0xfa
+# CHECK: ccmp x1, x2, #3, eq
+
+#==---------------------------------------------------------------------------==
+# Conditional select instructions
+#==---------------------------------------------------------------------------==
+
+  0x41 0x00 0x83 0x1a
+# CHECK: csel w1, w2, w3, eq
+  0x41 0x00 0x83 0x9a
+# CHECK: csel x1, x2, x3, eq
+  0x41 0x04 0x83 0x1a
+# CHECK: csinc w1, w2, w3, eq
+  0x41 0x04 0x83 0x9a
+# CHECK: csinc x1, x2, x3, eq
+  0x41 0x00 0x83 0x5a
+# CHECK: csinv w1, w2, w3, eq
+  0x41 0x00 0x83 0xda
+# CHECK: csinv x1, x2, x3, eq
+  0x41 0x04 0x83 0x5a
+# CHECK: csneg w1, w2, w3, eq
+  0x41 0x04 0x83 0xda
+# CHECK: csneg x1, x2, x3, eq
diff --git a/test/MC/Disassembler/ARM64/bitfield.txt b/test/MC/Disassembler/ARM64/bitfield.txt
new file mode 100644
index 0000000..99e7af1
--- /dev/null
+++ b/test/MC/Disassembler/ARM64/bitfield.txt
@@ -0,0 +1,29 @@
+# RUN: llvm-mc -triple arm64-apple-darwin --disassemble < %s | FileCheck %s
+
+#==---------------------------------------------------------------------------==
+# 5.4.4 Bitfield Operations
+#==---------------------------------------------------------------------------==
+
+0x41 0x3c 0x01 0x33
+0x41 0x3c 0x41 0xb3
+0x41 0x3c 0x01 0x13
+0x41 0x3c 0x41 0x93
+0x41 0x3c 0x01 0x53
+0x41 0x3c 0x41 0xd3
+
+# CHECK: bfm  w1, w2, #1, #15
+# CHECK: bfm  x1, x2, #1, #15
+# CHECK: sbfm w1, w2, #1, #15
+# CHECK: sbfm x1, x2, #1, #15
+# CHECK: ubfm w1, w2, #1, #15
+# CHECK: ubfm x1, x2, #1, #15
+
+#==---------------------------------------------------------------------------==
+# 5.4.5 Extract (immediate)
+#==---------------------------------------------------------------------------==
+
+0x41 0x3c 0x83 0x13
+0x62 0x04 0xc4 0x93
+
+# CHECK: extr w1, w2, w3, #15
+# CHECK: extr x2, x3, x4, #1
diff --git a/test/MC/Disassembler/ARM64/branch.txt b/test/MC/Disassembler/ARM64/branch.txt
new file mode 100644
index 0000000..c5b254b
--- /dev/null
+++ b/test/MC/Disassembler/ARM64/branch.txt
@@ -0,0 +1,75 @@
+# RUN: llvm-mc -triple arm64-apple-darwin --disassemble < %s | FileCheck %s
+
+#-----------------------------------------------------------------------------
+# Unconditional branch (register) instructions.
+#-----------------------------------------------------------------------------
+
+  0xc0 0x03 0x5f 0xd6
+# CHECK: ret
+  0x20 0x00 0x5f 0xd6
+# CHECK: ret x1
+  0xe0 0x03 0xbf 0xd6
+# CHECK: drps
+  0xe0 0x03 0x9f 0xd6
+# CHECK: eret
+  0xa0 0x00 0x1f 0xd6
+# CHECK: br  x5
+  0x20 0x01 0x3f 0xd6
+# CHECK: blr x9
+  0x0B 0x00 0x18 0x37
+# CHECK: tbnz	w11, #3, #0
+
+#-----------------------------------------------------------------------------
+# Exception generation instructions.
+#-----------------------------------------------------------------------------
+
+  0x20 0x00 0x20 0xd4
+# CHECK: brk   #1
+  0x41 0x00 0xa0 0xd4
+# CHECK: dcps1 #2
+  0x62 0x00 0xa0 0xd4
+# CHECK: dcps2 #3
+  0x83 0x00 0xa0 0xd4
+# CHECK: dcps3 #4
+  0xa0 0x00 0x40 0xd4
+# CHECK: hlt   #5
+  0xc2 0x00 0x00 0xd4
+# CHECK: hvc   #6
+  0xe3 0x00 0x00 0xd4
+# CHECK: smc   #7
+  0x01 0x01 0x00 0xd4
+# CHECK: svc   #8
+
+#-----------------------------------------------------------------------------
+# PC-relative branches (both positive and negative displacement)
+#-----------------------------------------------------------------------------
+
+  0x07 0x00 0x00 0x14
+# CHECK: b #28
+  0x06 0x00 0x00 0x94
+# CHECK: bl #24
+  0xa1 0x00 0x00 0x54
+# CHECK: b.ne #20
+  0x80 0x00 0x08 0x36
+# CHECK: tbz w0, #1, #16
+  0xe1 0xff 0xf7 0x36
+# CHECK: tbz w1, #30, #-4
+  0x60 0x00 0x08 0x37
+# CHECK: tbnz w0, #1, #12
+  0x40 0x00 0x00 0xb4
+# CHECK: cbz x0, #8
+  0x20 0x00 0x00 0xb5
+# CHECK: cbnz x0, #4
+  0x1f 0x20 0x03 0xd5
+# CHECK: nop
+  0xff 0xff 0xff 0x17
+# CHECK: b #-4
+  0xc1 0xff 0xff 0x54
+# CHECK: b.ne #-8
+  0xa0 0xff 0x0f 0x36
+# CHECK: tbz w0, #1, #-12
+  0x80 0xff 0xff 0xb4
+# CHECK: cbz x0, #-16
+  0x1f 0x20 0x03 0xd5
+# CHECK: nop
+
diff --git a/test/MC/Disassembler/ARM64/crc32.txt b/test/MC/Disassembler/ARM64/crc32.txt
new file mode 100644
index 0000000..ef0a26e
--- /dev/null
+++ b/test/MC/Disassembler/ARM64/crc32.txt
@@ -0,0 +1,18 @@
+# RUN: llvm-mc -triple=arm64 -disassemble < %s | FileCheck %s
+
+# CHECK: crc32b  w5, w7, w20
+# CHECK: crc32h  w28, wzr, w30
+# CHECK: crc32w  w0, w1, w2
+# CHECK: crc32x  w7, w9, x20
+# CHECK: crc32cb w9, w5, w4
+# CHECK: crc32ch w13, w17, w25
+# CHECK: crc32cw wzr, w3, w5
+# CHECK: crc32cx w18, w16, xzr
+0xe5 0x40 0xd4 0x1a
+0xfc 0x47 0xde 0x1a
+0x20 0x48 0xc2 0x1a
+0x27 0x4d 0xd4 0x9a
+0xa9 0x50 0xc4 0x1a
+0x2d 0x56 0xd9 0x1a
+0x7f 0x58 0xc5 0x1a
+0x12 0x5e 0xdf 0x9a
diff --git a/test/MC/Disassembler/ARM64/crypto.txt b/test/MC/Disassembler/ARM64/crypto.txt
new file mode 100644
index 0000000..e163b2c
--- /dev/null
+++ b/test/MC/Disassembler/ARM64/crypto.txt
@@ -0,0 +1,47 @@
+# RUN: llvm-mc -triple arm64-apple-darwin --disassemble < %s | FileCheck %s
+# RUN: llvm-mc -triple arm64-apple-darwin -output-asm-variant=1 --disassemble < %s | FileCheck %s --check-prefix=CHECK-APPLE
+
+  0x20 0x48 0x28 0x4e
+  0x20 0x58 0x28 0x4e
+  0x20 0x68 0x28 0x4e
+  0x20 0x78 0x28 0x4e
+  0x20 0x00 0x02 0x5e
+  0x20 0x10 0x02 0x5e
+  0x20 0x20 0x02 0x5e
+  0x20 0x30 0x02 0x5e
+  0x20 0x40 0x02 0x5e
+  0x20 0x50 0x02 0x5e
+  0x20 0x60 0x02 0x5e
+  0x20 0x08 0x28 0x5e
+  0x20 0x18 0x28 0x5e
+  0x20 0x28 0x28 0x5e
+
+# CHECK: aese v0.16b, v1.16b
+# CHECK: aesd v0.16b, v1.16b
+# CHECK: aesmc v0.16b, v1.16b
+# CHECK: aesimc v0.16b, v1.16b
+# CHECK: sha1c q0, s1, v2.4s
+# CHECK: sha1p q0, s1, v2.4s
+# CHECK: sha1m q0, s1, v2.4s
+# CHECK: sha1su0 v0.4s, v1.4s, v2
+# CHECK: sha256h q0, q1, v2.4s
+# CHECK: sha256h2 q0, q1, v2.4s
+# CHECK: sha256su1 v0.4s, v1.4s, v2.4s
+# CHECK: sha1h s0, s1
+# CHECK: sha1su1 v0.4s, v1.4s
+# CHECK: sha256su0 v0.4s, v1.4s
+
+# CHECK-APPLE: aese.16b v0, v1
+# CHECK-APPLE: aesd.16b v0, v1
+# CHECK-APPLE: aesmc.16b v0, v1
+# CHECK-APPLE: aesimc.16b v0, v1
+# CHECK-APPLE: sha1c.4s q0, s1, v2
+# CHECK-APPLE: sha1p.4s q0, s1, v2
+# CHECK-APPLE: sha1m.4s q0, s1, v2
+# CHECK-APPLE: sha1su0.4s v0, v1, v2
+# CHECK-APPLE: sha256h.4s q0, q1, v2
+# CHECK-APPLE: sha256h2.4s q0, q1, v2
+# CHECK-APPLE: sha256su1.4s v0, v1, v2
+# CHECK-APPLE: sha1h s0, s1
+# CHECK-APPLE: sha1su1.4s v0, v1
+# CHECK-APPLE: sha256su0.4s v0, v1
diff --git a/test/MC/Disassembler/ARM64/invalid-logical.txt b/test/MC/Disassembler/ARM64/invalid-logical.txt
new file mode 100644
index 0000000..8a4ecb6
--- /dev/null
+++ b/test/MC/Disassembler/ARM64/invalid-logical.txt
@@ -0,0 +1,6 @@
+# RUN: llvm-mc -triple arm64-apple-darwin -disassemble < %s 2>&1 | FileCheck %s
+
+# rdar://15226511
+0x7b 0xbf 0x25 0x72
+# CHECK: invalid instruction encoding
+# CHECK-NEXT: 0x7b 0xbf 0x25 0x72
diff --git a/test/MC/Disassembler/ARM64/lit.local.cfg b/test/MC/Disassembler/ARM64/lit.local.cfg
new file mode 100644
index 0000000..46a9468
--- /dev/null
+++ b/test/MC/Disassembler/ARM64/lit.local.cfg
@@ -0,0 +1,5 @@
+config.suffixes = ['.txt']
+
+targets = set(config.root.targets_to_build.split())
+if not 'ARM64' in targets:
+    config.unsupported = True
diff --git a/test/MC/Disassembler/ARM64/logical.txt b/test/MC/Disassembler/ARM64/logical.txt
new file mode 100644
index 0000000..29db8cb
--- /dev/null
+++ b/test/MC/Disassembler/ARM64/logical.txt
@@ -0,0 +1,217 @@
+# RUN: llvm-mc -triple arm64-apple-darwin --disassemble < %s | FileCheck %s
+
+#==---------------------------------------------------------------------------==
+# 5.4.2 Logical (immediate)
+#==---------------------------------------------------------------------------==
+
+0x00 0x00 0x00 0x12
+0x00 0x00 0x40 0x92
+0x41 0x0c 0x00 0x12
+0x41 0x0c 0x40 0x92
+0xbf 0xec 0x7c 0x92
+0x00 0x00 0x00 0x72
+0x00 0x00 0x40 0xf2
+0x41 0x0c 0x00 0x72
+0x41 0x0c 0x40 0xf2
+
+# CHECK: and  w0, w0, #0x1
+# CHECK: and  x0, x0, #0x1
+# CHECK: and  w1, w2, #0xf
+# CHECK: and  x1, x2, #0xf
+# CHECK: and  sp, x5, #0xfffffffffffffff0
+# CHECK: ands w0, w0, #0x1
+# CHECK: ands x0, x0, #0x1
+# CHECK: ands w1, w2, #0xf
+# CHECK: ands x1, x2, #0xf
+
+0x41 0x00 0x12 0x52
+0x41 0x00 0x71 0xd2
+
+# CHECK: eor w1, w2, #0x4000
+# CHECK: eor x1, x2, #0x8000
+
+0x41 0x00 0x12 0x32
+0x41 0x00 0x71 0xb2
+
+# CHECK: orr w1, w2, #0x4000
+# CHECK: orr x1, x2, #0x8000
+
+#==---------------------------------------------------------------------------==
+# 5.5.3 Logical (shifted register)
+#==---------------------------------------------------------------------------==
+
+0x41 0x00 0x03 0x0a
+0x41 0x00 0x03 0x8a
+0x41 0x08 0x03 0x0a
+0x41 0x08 0x03 0x8a
+0x41 0x08 0x43 0x0a
+0x41 0x08 0x43 0x8a
+0x41 0x08 0x83 0x0a
+0x41 0x08 0x83 0x8a
+0x41 0x08 0xc3 0x0a
+0x41 0x08 0xc3 0x8a
+
+# CHECK: and  w1, w2, w3
+# CHECK: and  x1, x2, x3
+# CHECK: and  w1, w2, w3, lsl #2
+# CHECK: and  x1, x2, x3, lsl #2
+# CHECK: and  w1, w2, w3, lsr #2
+# CHECK: and  x1, x2, x3, lsr #2
+# CHECK: and  w1, w2, w3, asr #2
+# CHECK: and  x1, x2, x3, asr #2
+# CHECK: and  w1, w2, w3, ror #2
+# CHECK: and  x1, x2, x3, ror #2
+
+0x41 0x00 0x03 0x6a
+0x41 0x00 0x03 0xea
+0x41 0x08 0x03 0x6a
+0x41 0x08 0x03 0xea
+0x41 0x08 0x43 0x6a
+0x41 0x08 0x43 0xea
+0x41 0x08 0x83 0x6a
+0x41 0x08 0x83 0xea
+0x41 0x08 0xc3 0x6a
+0x41 0x08 0xc3 0xea
+
+# CHECK: ands w1, w2, w3
+# CHECK: ands x1, x2, x3
+# CHECK: ands w1, w2, w3, lsl #2
+# CHECK: ands x1, x2, x3, lsl #2
+# CHECK: ands w1, w2, w3, lsr #2
+# CHECK: ands x1, x2, x3, lsr #2
+# CHECK: ands w1, w2, w3, asr #2
+# CHECK: ands x1, x2, x3, asr #2
+# CHECK: ands w1, w2, w3, ror #2
+# CHECK: ands x1, x2, x3, ror #2
+
+0x41 0x00 0x23 0x0a
+0x41 0x00 0x23 0x8a
+0x41 0x0c 0x23 0x0a
+0x41 0x0c 0x23 0x8a
+0x41 0x0c 0x63 0x0a
+0x41 0x0c 0x63 0x8a
+0x41 0x0c 0xa3 0x0a
+0x41 0x0c 0xa3 0x8a
+0x41 0x0c 0xe3 0x0a
+0x41 0x0c 0xe3 0x8a
+
+# CHECK: bic w1, w2, w3
+# CHECK: bic x1, x2, x3
+# CHECK: bic w1, w2, w3, lsl #3
+# CHECK: bic x1, x2, x3, lsl #3
+# CHECK: bic w1, w2, w3, lsr #3
+# CHECK: bic x1, x2, x3, lsr #3
+# CHECK: bic w1, w2, w3, asr #3
+# CHECK: bic x1, x2, x3, asr #3
+# CHECK: bic w1, w2, w3, ror #3
+# CHECK: bic x1, x2, x3, ror #3
+
+0x41 0x00 0x23 0x6a
+0x41 0x00 0x23 0xea
+0x41 0x0c 0x23 0x6a
+0x41 0x0c 0x23 0xea
+0x41 0x0c 0x63 0x6a
+0x41 0x0c 0x63 0xea
+0x41 0x0c 0xa3 0x6a
+0x41 0x0c 0xa3 0xea
+0x41 0x0c 0xe3 0x6a
+0x41 0x0c 0xe3 0xea
+
+# CHECK: bics w1, w2, w3
+# CHECK: bics x1, x2, x3
+# CHECK: bics w1, w2, w3, lsl #3
+# CHECK: bics x1, x2, x3, lsl #3
+# CHECK: bics w1, w2, w3, lsr #3
+# CHECK: bics x1, x2, x3, lsr #3
+# CHECK: bics w1, w2, w3, asr #3
+# CHECK: bics x1, x2, x3, asr #3
+# CHECK: bics w1, w2, w3, ror #3
+# CHECK: bics x1, x2, x3, ror #3
+
+0x41 0x00 0x23 0x4a
+0x41 0x00 0x23 0xca
+0x41 0x10 0x23 0x4a
+0x41 0x10 0x23 0xca
+0x41 0x10 0x63 0x4a
+0x41 0x10 0x63 0xca
+0x41 0x10 0xa3 0x4a
+0x41 0x10 0xa3 0xca
+0x41 0x10 0xe3 0x4a
+0x41 0x10 0xe3 0xca
+
+# CHECK: eon w1, w2, w3
+# CHECK: eon x1, x2, x3
+# CHECK: eon w1, w2, w3, lsl #4
+# CHECK: eon x1, x2, x3, lsl #4
+# CHECK: eon w1, w2, w3, lsr #4
+# CHECK: eon x1, x2, x3, lsr #4
+# CHECK: eon w1, w2, w3, asr #4
+# CHECK: eon x1, x2, x3, asr #4
+# CHECK: eon w1, w2, w3, ror #4
+# CHECK: eon x1, x2, x3, ror #4
+
+0x41 0x00 0x03 0x4a
+0x41 0x00 0x03 0xca
+0x41 0x14 0x03 0x4a
+0x41 0x14 0x03 0xca
+0x41 0x14 0x43 0x4a
+0x41 0x14 0x43 0xca
+0x41 0x14 0x83 0x4a
+0x41 0x14 0x83 0xca
+0x41 0x14 0xc3 0x4a
+0x41 0x14 0xc3 0xca
+
+# CHECK: eor w1, w2, w3
+# CHECK: eor x1, x2, x3
+# CHECK: eor w1, w2, w3, lsl #5
+# CHECK: eor x1, x2, x3, lsl #5
+# CHECK: eor w1, w2, w3, lsr #5
+# CHECK: eor x1, x2, x3, lsr #5
+# CHECK: eor w1, w2, w3, asr #5
+# CHECK: eor x1, x2, x3, asr #5
+# CHECK: eor w1, w2, w3, ror #5
+# CHECK: eor x1, x2, x3, ror #5
+
+0x41 0x00 0x03 0x2a
+0x41 0x00 0x03 0xaa
+0x41 0x18 0x03 0x2a
+0x41 0x18 0x03 0xaa
+0x41 0x18 0x43 0x2a
+0x41 0x18 0x43 0xaa
+0x41 0x18 0x83 0x2a
+0x41 0x18 0x83 0xaa
+0x41 0x18 0xc3 0x2a
+0x41 0x18 0xc3 0xaa
+
+# CHECK: orr w1, w2, w3
+# CHECK: orr x1, x2, x3
+# CHECK: orr w1, w2, w3, lsl #6
+# CHECK: orr x1, x2, x3, lsl #6
+# CHECK: orr w1, w2, w3, lsr #6
+# CHECK: orr x1, x2, x3, lsr #6
+# CHECK: orr w1, w2, w3, asr #6
+# CHECK: orr x1, x2, x3, asr #6
+# CHECK: orr w1, w2, w3, ror #6
+# CHECK: orr x1, x2, x3, ror #6
+
+0x41 0x00 0x23 0x2a
+0x41 0x00 0x23 0xaa
+0x41 0x1c 0x23 0x2a
+0x41 0x1c 0x23 0xaa
+0x41 0x1c 0x63 0x2a
+0x41 0x1c 0x63 0xaa
+0x41 0x1c 0xa3 0x2a
+0x41 0x1c 0xa3 0xaa
+0x41 0x1c 0xe3 0x2a
+0x41 0x1c 0xe3 0xaa
+
+# CHECK: orn w1, w2, w3
+# CHECK: orn x1, x2, x3
+# CHECK: orn w1, w2, w3, lsl #7
+# CHECK: orn x1, x2, x3, lsl #7
+# CHECK: orn w1, w2, w3, lsr #7
+# CHECK: orn x1, x2, x3, lsr #7
+# CHECK: orn w1, w2, w3, asr #7
+# CHECK: orn x1, x2, x3, asr #7
+# CHECK: orn w1, w2, w3, ror #7
+# CHECK: orn x1, x2, x3, ror #7
diff --git a/test/MC/Disassembler/ARM64/memory.txt b/test/MC/Disassembler/ARM64/memory.txt
new file mode 100644
index 0000000..031bfa6
--- /dev/null
+++ b/test/MC/Disassembler/ARM64/memory.txt
@@ -0,0 +1,558 @@
+# RUN: llvm-mc --disassemble -triple arm64-apple-darwin < %s | FileCheck %s
+
+#-----------------------------------------------------------------------------
+# Indexed loads
+#-----------------------------------------------------------------------------
+
+  0x85 0x14 0x40 0xb9
+  0x64 0x00 0x40 0xf9
+  0xe2 0x13 0x40 0xf9
+  0xe5 0x07 0x40 0x3d
+  0xe6 0x07 0x40 0x7d
+  0xe7 0x07 0x40 0xbd
+  0xe8 0x07 0x40 0xfd
+  0xe9 0x07 0xc0 0x3d
+  0x64 0x00 0x40 0x39
+  0x20 0x78 0xa0 0xb8
+  0x85 0x50 0x40 0x39
+
+# CHECK: ldr	w5, [x4, #20]
+# CHECK: ldr	x4, [x3]
+# CHECK: ldr	x2, [sp, #32]
+# CHECK: ldr	b5, [sp, #1]
+# CHECK: ldr	h6, [sp, #2]
+# CHECK: ldr	s7, [sp, #4]
+# CHECK: ldr	d8, [sp, #8]
+# CHECK: ldr	q9, [sp, #16]
+# CHECK: ldrb	w4, [x3]
+# CHECK: ldrsw	x0, [x1, x0, lsl #2]
+# CHECK: ldrb	w5, [x4, #20]
+# CHECK: ldrsb	w9, [x3]
+# CHECK: ldrsb	x2, [sp, #128]
+# CHECK: ldrh	w2, [sp, #32]
+# CHECK: ldrsh	w3, [sp, #32]
+# CHECK: ldrsh	x5, [x9, #24]
+# CHECK: ldrsw	x9, [sp, #512]
+# CHECK: prfm	pldl3strm, [sp, #32]
+
+  0x69 0x00 0xc0 0x39
+  0xe2 0x03 0x82 0x39
+  0xe2 0x43 0x40 0x79
+  0xe3 0x43 0xc0 0x79
+  0x25 0x31 0x80 0x79
+  0xe9 0x03 0x82 0xb9
+  0xe5 0x13 0x80 0xf9
+  0x40 0x00 0x80 0xf9
+  0x41 0x00 0x80 0xf9
+  0x42 0x00 0x80 0xf9
+  0x43 0x00 0x80 0xf9
+  0x44 0x00 0x80 0xf9
+  0x45 0x00 0x80 0xf9
+  0x50 0x00 0x80 0xf9
+  0x51 0x00 0x80 0xf9
+  0x52 0x00 0x80 0xf9
+  0x53 0x00 0x80 0xf9
+  0x54 0x00 0x80 0xf9
+  0x55 0x00 0x80 0xf9
+
+# CHECK: prfm	pldl1keep, [x2]
+# CHECK: prfm	pldl1strm, [x2]
+# CHECK: prfm	pldl2keep, [x2]
+# CHECK: prfm	pldl2strm, [x2]
+# CHECK: prfm	pldl3keep, [x2]
+# CHECK: prfm	pldl3strm, [x2]
+# CHECK: prfm	pstl1keep, [x2]
+# CHECK: prfm	pstl1strm, [x2]
+# CHECK: prfm	pstl2keep, [x2]
+# CHECK: prfm	pstl2strm, [x2]
+# CHECK: prfm	pstl3keep, [x2]
+# CHECK: prfm	pstl3strm, [x2]
+
+#-----------------------------------------------------------------------------
+# Indexed stores
+#-----------------------------------------------------------------------------
+
+  0x64 0x00 0x00 0xf9
+  0xe2 0x13 0x00 0xf9
+  0x85 0x14 0x00 0xb9
+  0xe5 0x07 0x00 0x3d
+  0xe6 0x07 0x00 0x7d
+  0xe7 0x07 0x00 0xbd
+  0xe8 0x07 0x00 0xfd
+  0xe9 0x07 0x80 0x3d
+  0x64 0x00 0x00 0x39
+  0x85 0x50 0x00 0x39
+  0xe2 0x43 0x00 0x79
+
+# CHECK: str	x4, [x3]
+# CHECK: str	x2, [sp, #32]
+# CHECK: str	w5, [x4, #20]
+# CHECK: str	b5, [sp, #1]
+# CHECK: str	h6, [sp, #2]
+# CHECK: str	s7, [sp, #4]
+# CHECK: str	d8, [sp, #8]
+# CHECK: str	q9, [sp, #16]
+# CHECK: strb	w4, [x3]
+# CHECK: strb	w5, [x4, #20]
+# CHECK: strh	w2, [sp, #32]
+
+#-----------------------------------------------------------------------------
+# Unscaled immediate loads and stores
+#-----------------------------------------------------------------------------
+
+  0x62 0x00 0x40 0xb8
+  0xe2 0x83 0x41 0xb8
+  0x62 0x00 0x40 0xf8
+  0xe2 0x83 0x41 0xf8
+  0xe5 0x13 0x40 0x3c
+  0xe6 0x23 0x40 0x7c
+  0xe7 0x43 0x40 0xbc
+  0xe8 0x83 0x40 0xfc
+  0xe9 0x03 0xc1 0x3c
+  0x69 0x00 0xc0 0x38
+  0xe2 0x03 0x88 0x38
+  0xe3 0x03 0xc2 0x78
+  0x25 0x81 0x81 0x78
+  0xe9 0x03 0x98 0xb8
+
+# CHECK: ldur	w2, [x3]
+# CHECK: ldur	w2, [sp, #24]
+# CHECK: ldur	x2, [x3]
+# CHECK: ldur	x2, [sp, #24]
+# CHECK: ldur	b5, [sp, #1]
+# CHECK: ldur	h6, [sp, #2]
+# CHECK: ldur	s7, [sp, #4]
+# CHECK: ldur	d8, [sp, #8]
+# CHECK: ldur	q9, [sp, #16]
+# CHECK: ldursb	w9, [x3]
+# CHECK: ldursb	x2, [sp, #128]
+# CHECK: ldursh	w3, [sp, #32]
+# CHECK: ldursh	x5, [x9, #24]
+# CHECK: ldursw	x9, [sp, #-128]
+
+  0x64 0x00 0x00 0xb8
+  0xe2 0x03 0x02 0xb8
+  0x64 0x00 0x00 0xf8
+  0xe2 0x03 0x02 0xf8
+  0x85 0x40 0x01 0xb8
+  0xe5 0x13 0x00 0x3c
+  0xe6 0x23 0x00 0x7c
+  0xe7 0x43 0x00 0xbc
+  0xe8 0x83 0x00 0xfc
+  0xe9 0x03 0x81 0x3c
+  0x64 0x00 0x00 0x38
+  0x85 0x40 0x01 0x38
+  0xe2 0x03 0x02 0x78
+  0xe5 0x03 0x82 0xf8
+
+# CHECK: stur	w4, [x3]
+# CHECK: stur	w2, [sp, #32]
+# CHECK: stur	x4, [x3]
+# CHECK: stur	x2, [sp, #32]
+# CHECK: stur	w5, [x4, #20]
+# CHECK: stur	b5, [sp, #1]
+# CHECK: stur	h6, [sp, #2]
+# CHECK: stur	s7, [sp, #4]
+# CHECK: stur	d8, [sp, #8]
+# CHECK: stur	q9, [sp, #16]
+# CHECK: sturb	w4, [x3]
+# CHECK: sturb	w5, [x4, #20]
+# CHECK: sturh	w2, [sp, #32]
+# CHECK: prfum	pldl3strm, [sp, #32]
+
+#-----------------------------------------------------------------------------
+# Unprivileged loads and stores
+#-----------------------------------------------------------------------------
+
+  0x83 0x08 0x41 0xb8
+  0x83 0x08 0x41 0xf8
+  0x83 0x08 0x41 0x38
+  0x69 0x08 0xc0 0x38
+  0xe2 0x0b 0x88 0x38
+  0x83 0x08 0x41 0x78
+  0xe3 0x0b 0xc2 0x78
+  0x25 0x89 0x81 0x78
+  0xe9 0x0b 0x98 0xb8
+
+# CHECK: ldtr	w3, [x4, #16]
+# CHECK: ldtr	x3, [x4, #16]
+# CHECK: ldtrb	w3, [x4, #16]
+# CHECK: ldtrsb	w9, [x3]
+# CHECK: ldtrsb	x2, [sp, #128]
+# CHECK: ldtrh	w3, [x4, #16]
+# CHECK: ldtrsh	w3, [sp, #32]
+# CHECK: ldtrsh	x5, [x9, #24]
+# CHECK: ldtrsw	x9, [sp, #-128]
+
+  0x85 0x48 0x01 0xb8
+  0x64 0x08 0x00 0xf8
+  0xe2 0x0b 0x02 0xf8
+  0x64 0x08 0x00 0x38
+  0x85 0x48 0x01 0x38
+  0xe2 0x0b 0x02 0x78
+
+# CHECK: sttr	w5, [x4, #20]
+# CHECK: sttr	x4, [x3]
+# CHECK: sttr	x2, [sp, #32]
+# CHECK: sttrb	w4, [x3]
+# CHECK: sttrb	w5, [x4, #20]
+# CHECK: sttrh	w2, [sp, #32]
+
+#-----------------------------------------------------------------------------
+# Pre-indexed loads and stores
+#-----------------------------------------------------------------------------
+
+  0xfd 0x8c 0x40 0xf8
+  0xfe 0x8c 0x40 0xf8
+  0x05 0x1c 0x40 0x3c
+  0x06 0x2c 0x40 0x7c
+  0x07 0x4c 0x40 0xbc
+  0x08 0x8c 0x40 0xfc
+  0x09 0x0c 0xc1 0x3c
+
+# CHECK: ldr	fp, [x7, #8]!
+# CHECK: ldr	lr, [x7, #8]!
+# CHECK: ldr	b5, [x0, #1]!
+# CHECK: ldr	h6, [x0, #2]!
+# CHECK: ldr	s7, [x0, #4]!
+# CHECK: ldr	d8, [x0, #8]!
+# CHECK: ldr	q9, [x0, #16]!
+
+  0xfe 0x8c 0x1f 0xf8
+  0xfd 0x8c 0x1f 0xf8
+  0x05 0xfc 0x1f 0x3c
+  0x06 0xec 0x1f 0x7c
+  0x07 0xcc 0x1f 0xbc
+  0x08 0x8c 0x1f 0xfc
+  0x09 0x0c 0x9f 0x3c
+
+# CHECK: str	lr, [x7, #-8]!
+# CHECK: str	fp, [x7, #-8]!
+# CHECK: str	b5, [x0, #-1]!
+# CHECK: str	h6, [x0, #-2]!
+# CHECK: str	s7, [x0, #-4]!
+# CHECK: str	d8, [x0, #-8]!
+# CHECK: str	q9, [x0, #-16]!
+
+#-----------------------------------------------------------------------------
+# post-indexed loads and stores
+#-----------------------------------------------------------------------------
+
+  0xfe 0x84 0x1f 0xf8
+  0xfd 0x84 0x1f 0xf8
+  0x05 0xf4 0x1f 0x3c
+  0x06 0xe4 0x1f 0x7c
+  0x07 0xc4 0x1f 0xbc
+  0x08 0x84 0x1f 0xfc
+  0x09 0x04 0x9f 0x3c
+
+# CHECK: str	lr, [x7], #-8
+# CHECK: str	fp, [x7], #-8
+# CHECK: str	b5, [x0], #-1
+# CHECK: str	h6, [x0], #-2
+# CHECK: str	s7, [x0], #-4
+# CHECK: str	d8, [x0], #-8
+# CHECK: str	q9, [x0], #-16
+
+  0xfd 0x84 0x40 0xf8
+  0xfe 0x84 0x40 0xf8
+  0x05 0x14 0x40 0x3c
+  0x06 0x24 0x40 0x7c
+  0x07 0x44 0x40 0xbc
+  0x08 0x84 0x40 0xfc
+  0x09 0x04 0xc1 0x3c
+
+# CHECK: ldr	fp, [x7], #8
+# CHECK: ldr	lr, [x7], #8
+# CHECK: ldr	b5, [x0], #1
+# CHECK: ldr	h6, [x0], #2
+# CHECK: ldr	s7, [x0], #4
+# CHECK: ldr	d8, [x0], #8
+# CHECK: ldr	q9, [x0], #16
+
+#-----------------------------------------------------------------------------
+# Load/Store pair (indexed  offset)
+#-----------------------------------------------------------------------------
+
+  0xe3 0x09 0x42 0x29
+  0xe4 0x27 0x7f 0xa9
+  0xc2 0x0d 0x42 0x69
+  0xe2 0x0f 0x7e 0x69
+  0x4a 0x04 0x48 0x2d
+  0x4a 0x04 0x40 0x6d
+
+# CHECK: ldp	w3, w2, [x15, #16]
+# CHECK: ldp	x4, x9, [sp, #-16]
+# CHECK: ldpsw	x2, x3, [x14, #16]
+# CHECK: ldpsw	x2, x3, [sp, #-16]
+# CHECK: ldp	s10, s1, [x2, #64]
+# CHECK: ldp	d10, d1, [x2]
+
+  0xe3 0x09 0x02 0x29
+  0xe4 0x27 0x3f 0xa9
+  0x4a 0x04 0x08 0x2d
+  0x4a 0x04 0x00 0x6d
+
+# CHECK: stp	w3, w2, [x15, #16]
+# CHECK: stp	x4, x9, [sp, #-16]
+# CHECK: stp	s10, s1, [x2, #64]
+# CHECK: stp	d10, d1, [x2]
+
+#-----------------------------------------------------------------------------
+# Load/Store pair (pre-indexed)
+#-----------------------------------------------------------------------------
+
+  0xe3 0x09 0xc2 0x29
+  0xe4 0x27 0xff 0xa9
+  0xc2 0x0d 0xc2 0x69
+  0xe2 0x0f 0xfe 0x69
+  0x4a 0x04 0xc8 0x2d
+  0x4a 0x04 0xc1 0x6d
+
+# CHECK: ldp	w3, w2, [x15, #16]!
+# CHECK: ldp	x4, x9, [sp, #-16]!
+# CHECK: ldpsw	x2, x3, [x14, #16]!
+# CHECK: ldpsw	x2, x3, [sp, #-16]!
+# CHECK: ldp	s10, s1, [x2, #64]!
+# CHECK: ldp	d10, d1, [x2, #16]!
+
+  0xe3 0x09 0x82 0x29
+  0xe4 0x27 0xbf 0xa9
+  0x4a 0x04 0x88 0x2d
+  0x4a 0x04 0x81 0x6d
+
+# CHECK: stp	w3, w2, [x15, #16]!
+# CHECK: stp	x4, x9, [sp, #-16]!
+# CHECK: stp	s10, s1, [x2, #64]!
+# CHECK: stp	d10, d1, [x2, #16]!
+
+#-----------------------------------------------------------------------------
+# Load/Store pair (post-indexed)
+#-----------------------------------------------------------------------------
+
+  0xe3 0x09 0xc2 0x28
+  0xe4 0x27 0xff 0xa8
+  0xc2 0x0d 0xc2 0x68
+  0xe2 0x0f 0xfe 0x68
+  0x4a 0x04 0xc8 0x2c
+  0x4a 0x04 0xc1 0x6c
+
+# CHECK: ldp	w3, w2, [x15], #16
+# CHECK: ldp	x4, x9, [sp], #-16
+# CHECK: ldpsw	x2, x3, [x14], #16
+# CHECK: ldpsw	x2, x3, [sp], #-16
+# CHECK: ldp	s10, s1, [x2], #64
+# CHECK: ldp	d10, d1, [x2], #16
+
+  0xe3 0x09 0x82 0x28
+  0xe4 0x27 0xbf 0xa8
+  0x4a 0x04 0x88 0x2c
+  0x4a 0x04 0x81 0x6c
+
+# CHECK: stp	w3, w2, [x15], #16
+# CHECK: stp	x4, x9, [sp], #-16
+# CHECK: stp	s10, s1, [x2], #64
+# CHECK: stp	d10, d1, [x2], #16
+
+#-----------------------------------------------------------------------------
+# Load/Store pair (no-allocate)
+#-----------------------------------------------------------------------------
+
+  0xe3 0x09 0x42 0x28
+  0xe4 0x27 0x7f 0xa8
+  0x4a 0x04 0x48 0x2c
+  0x4a 0x04 0x40 0x6c
+
+# CHECK: ldnp	w3, w2, [x15, #16]
+# CHECK: ldnp	x4, x9, [sp, #-16]
+# CHECK: ldnp	s10, s1, [x2, #64]
+# CHECK: ldnp	d10, d1, [x2]
+
+  0xe3 0x09 0x02 0x28
+  0xe4 0x27 0x3f 0xa8
+  0x4a 0x04 0x08 0x2c
+  0x4a 0x04 0x00 0x6c
+
+# CHECK: stnp	w3, w2, [x15, #16]
+# CHECK: stnp	x4, x9, [sp, #-16]
+# CHECK: stnp	s10, s1, [x2, #64]
+# CHECK: stnp	d10, d1, [x2]
+
+#-----------------------------------------------------------------------------
+# Load/Store register offset
+#-----------------------------------------------------------------------------
+
+  0x00 0x68 0x60 0xb8
+  0x00 0x78 0x60 0xb8
+  0x00 0x68 0x60 0xf8
+  0x00 0x78 0x60 0xf8
+  0x00 0xe8 0x60 0xf8
+
+# CHECK: ldr	w0, [x0, x0]
+# CHECK: ldr	w0, [x0, x0, lsl #2]
+# CHECK: ldr	x0, [x0, x0]
+# CHECK: ldr	x0, [x0, x0, lsl #3]
+# CHECK: ldr	x0, [x0, x0, sxtx]
+
+  0x21 0x68 0x62 0x3c
+  0x21 0x78 0x62 0x3c
+  0x21 0x68 0x62 0x7c
+  0x21 0x78 0x62 0x7c
+  0x21 0x68 0x62 0xbc
+  0x21 0x78 0x62 0xbc
+  0x21 0x68 0x62 0xfc
+  0x21 0x78 0x62 0xfc
+  0x21 0x68 0xe2 0x3c
+  0x21 0x78 0xe2 0x3c
+
+# CHECK: ldr	b1, [x1, x2]
+# CHECK: ldr	b1, [x1, x2, lsl #0]
+# CHECK: ldr	h1, [x1, x2]
+# CHECK: ldr	h1, [x1, x2, lsl #1]
+# CHECK: ldr	s1, [x1, x2]
+# CHECK: ldr	s1, [x1, x2, lsl #2]
+# CHECK: ldr	d1, [x1, x2]
+# CHECK: ldr	d1, [x1, x2, lsl #3]
+# CHECK: ldr	q1, [x1, x2]
+# CHECK: ldr	q1, [x1, x2, lsl #4]
+
+  0xe1 0x6b 0x23 0xfc
+  0xe1 0x5b 0x23 0xfc
+  0xe1 0x6b 0xa3 0x3c
+  0xe1 0x5b 0xa3 0x3c
+
+# CHECK: str	d1, [sp, x3]
+# CHECK: str	d1, [sp, x3, uxtw #3]
+# CHECK: str	q1, [sp, x3]
+# CHECK: str	q1, [sp, x3, uxtw #4]
+
+#-----------------------------------------------------------------------------
+# Load/Store exclusive
+#-----------------------------------------------------------------------------
+
+  0x26 0x7c 0x5f 0x08
+  0x26 0x7c 0x5f 0x48
+  0x27 0x0d 0x7f 0x88
+  0x27 0x0d 0x7f 0xc8
+
+# CHECK: ldxrb	w6, [x1]
+# CHECK: ldxrh	w6, [x1]
+# CHECK: ldxp	w7, w3, [x9]
+# CHECK: ldxp	x7, x3, [x9]
+
+  0x64 0x7c 0x01 0xc8
+  0x64 0x7c 0x01 0x88
+  0x64 0x7c 0x01 0x08
+  0x64 0x7c 0x01 0x48
+  0x22 0x18 0x21 0xc8
+  0x22 0x18 0x21 0x88
+
+# CHECK: stxr	w1, x4, [x3]
+# CHECK: stxr	w1, w4, [x3]
+# CHECK: stxrb	w1, w4, [x3]
+# CHECK: stxrh	w1, w4, [x3]
+# CHECK: stxp	w1, x2, x6, [x1]
+# CHECK: stxp	w1, w2, w6, [x1]
+
+#-----------------------------------------------------------------------------
+# Load-acquire/Store-release non-exclusive
+#-----------------------------------------------------------------------------
+
+  0xe4 0xff 0xdf 0x88
+  0xe4 0xff 0xdf 0xc8
+  0xe4 0xff 0xdf 0x08
+  0xe4 0xff 0xdf 0x48
+
+# CHECK: ldar	w4, [sp]
+# CHECK: ldar	x4, [sp]
+# CHECK: ldarb	w4, [sp]
+# CHECK: ldarh	w4, [sp]
+
+  0xc3 0xfc 0x9f 0x88
+  0xc3 0xfc 0x9f 0xc8
+  0xc3 0xfc 0x9f 0x08
+  0xc3 0xfc 0x9f 0x48
+
+# CHECK: stlr	w3, [x6]
+# CHECK: stlr	x3, [x6]
+# CHECK: stlrb	w3, [x6]
+# CHECK: stlrh	w3, [x6]
+
+#-----------------------------------------------------------------------------
+# Load-acquire/Store-release exclusive
+#-----------------------------------------------------------------------------
+
+  0x82 0xfc 0x5f 0x88
+  0x82 0xfc 0x5f 0xc8
+  0x82 0xfc 0x5f 0x08
+  0x82 0xfc 0x5f 0x48
+  0x22 0x98 0x7f 0x88
+  0x22 0x98 0x7f 0xc8
+
+# CHECK: ldaxr	w2, [x4]
+# CHECK: ldaxr	x2, [x4]
+# CHECK: ldaxrb	w2, [x4]
+# CHECK: ldaxrh	w2, [x4]
+# CHECK: ldaxp	w2, w6, [x1]
+# CHECK: ldaxp	x2, x6, [x1]
+
+  0x27 0xfc 0x08 0xc8
+  0x27 0xfc 0x08 0x88
+  0x27 0xfc 0x08 0x08
+  0x27 0xfc 0x08 0x48
+  0x22 0x98 0x21 0xc8
+  0x22 0x98 0x21 0x88
+
+# CHECK: stlxr	w8, x7, [x1]
+# CHECK: stlxr	w8, w7, [x1]
+# CHECK: stlxrb	w8, w7, [x1]
+# CHECK: stlxrh	w8, w7, [x1]
+# CHECK: stlxp	w1, x2, x6, [x1]
+# CHECK: stlxp	w1, w2, w6, [x1]
+
+#-----------------------------------------------------------------------------
+# Load/Store with explicit LSL values
+#-----------------------------------------------------------------------------
+  0x20 0x78 0xa0 0xb8
+  0x20 0x78 0x60 0xf8
+  0x20 0x78 0x20 0xf8
+  0x20 0x78 0x60 0xb8
+  0x20 0x78 0x20 0xb8
+  0x20 0x78 0xe0 0x3c
+  0x20 0x78 0xa0 0x3c
+  0x20 0x78 0x60 0xfc
+  0x20 0x78 0x20 0xfc
+  0x20 0x78 0x60 0xbc
+  0x20 0x78 0x20 0xbc
+  0x20 0x78 0x60 0x7c
+  0x20 0x78 0x60 0x3c
+  0x20 0x78 0x60 0x38
+  0x20 0x78 0x20 0x38
+  0x20 0x78 0xe0 0x38
+  0x20 0x78 0x60 0x78
+  0x20 0x78 0x20 0x78
+  0x20 0x78 0xe0 0x78
+  0x20 0x78 0xa0 0x38
+  0x20 0x78 0xa0 0x78
+
+# CHECK: ldrsw	x0, [x1, x0, lsl #2]
+# CHECK: ldr	x0, [x1, x0, lsl #3]
+# CHECK: str	x0, [x1, x0, lsl #3]
+# CHECK: ldr	w0, [x1, x0, lsl #2]
+# CHECK: str	w0, [x1, x0, lsl #2]
+# CHECK: ldr	q0, [x1, x0, lsl #4]
+# CHECK: str	q0, [x1, x0, lsl #4]
+# CHECK: ldr	d0, [x1, x0, lsl #3]
+# CHECK: str	d0, [x1, x0, lsl #3]
+# CHECK: ldr	s0, [x1, x0, lsl #2]
+# CHECK: str	s0, [x1, x0, lsl #2]
+# CHECK: ldr	h0, [x1, x0, lsl #1]
+# CHECK: ldr	b0, [x1, x0, lsl #0]
+# CHECK: ldrb	w0, [x1, x0, lsl #0]
+# CHECK: strb	w0, [x1, x0, lsl #0]
+# CHECK: ldrsb	w0, [x1, x0, lsl #0]
+# CHECK: ldrh	w0, [x1, x0, lsl #1]
+# CHECK: strh	w0, [x1, x0, lsl #1]
+# CHECK: ldrsh	w0, [x1, x0, lsl #1]
+# CHECK: ldrsb	x0, [x1, x0, lsl #0]
+# CHECK: ldrsh	x0, [x1, x0, lsl #1]
diff --git a/test/MC/Disassembler/ARM64/scalar-fp.txt b/test/MC/Disassembler/ARM64/scalar-fp.txt
new file mode 100644
index 0000000..b242df5
--- /dev/null
+++ b/test/MC/Disassembler/ARM64/scalar-fp.txt
@@ -0,0 +1,255 @@
+# RUN: llvm-mc -triple arm64-apple-darwin --disassemble < %s | FileCheck %s
+
+#-----------------------------------------------------------------------------
+# Floating-point arithmetic
+#-----------------------------------------------------------------------------
+
+0x41 0xc0 0x20 0x1e
+0x41 0xc0 0x60 0x1e
+
+# CHECK: fabs s1, s2
+# CHECK: fabs d1, d2
+
+0x41 0x28 0x23 0x1e
+0x41 0x28 0x63 0x1e
+
+# CHECK: fadd s1, s2, s3
+# CHECK: fadd d1, d2, d3
+
+0x41 0x18 0x23 0x1e
+0x41 0x18 0x63 0x1e
+
+# CHECK: fdiv s1, s2, s3
+# CHECK: fdiv d1, d2, d3
+
+0x41 0x10 0x03 0x1f
+0x41 0x10 0x43 0x1f
+
+# CHECK: fmadd s1, s2, s3, s4
+# CHECK: fmadd d1, d2, d3, d4
+
+0x41 0x48 0x23 0x1e
+0x41 0x48 0x63 0x1e
+0x41 0x68 0x23 0x1e
+0x41 0x68 0x63 0x1e
+
+# CHECK: fmax   s1, s2, s3
+# CHECK: fmax   d1, d2, d3
+# CHECK: fmaxnm s1, s2, s3
+# CHECK: fmaxnm d1, d2, d3
+
+0x41 0x58 0x23 0x1e
+0x41 0x58 0x63 0x1e
+0x41 0x78 0x23 0x1e
+0x41 0x78 0x63 0x1e
+
+# CHECK: fmin   s1, s2, s3
+# CHECK: fmin   d1, d2, d3
+# CHECK: fminnm s1, s2, s3
+# CHECK: fminnm d1, d2, d3
+
+0x41 0x90 0x03 0x1f
+0x41 0x90 0x43 0x1f
+
+# CHECK: fmsub s1, s2, s3, s4
+# CHECK: fmsub d1, d2, d3, d4
+
+0x41 0x08 0x23 0x1e
+0x41 0x08 0x63 0x1e
+
+# CHECK: fmul s1, s2, s3
+# CHECK: fmul d1, d2, d3
+
+0x41 0x40 0x21 0x1e
+0x41 0x40 0x61 0x1e
+
+# CHECK: fneg s1, s2
+# CHECK: fneg d1, d2
+
+0x41 0x10 0x23 0x1f
+0x41 0x10 0x63 0x1f
+
+# CHECK: fnmadd s1, s2, s3, s4
+# CHECK: fnmadd d1, d2, d3, d4
+
+0x41 0x90 0x23 0x1f
+0x41 0x90 0x63 0x1f
+
+# CHECK: fnmsub s1, s2, s3, s4
+# CHECK: fnmsub d1, d2, d3, d4
+
+0x41 0x88 0x23 0x1e
+0x41 0x88 0x63 0x1e
+
+# CHECK: fnmul s1, s2, s3
+# CHECK: fnmul d1, d2, d3
+
+0x41 0xc0 0x21 0x1e
+0x41 0xc0 0x61 0x1e
+
+# CHECK: fsqrt s1, s2
+# CHECK: fsqrt d1, d2
+
+0x41 0x38 0x23 0x1e
+0x41 0x38 0x63 0x1e
+
+# CHECK: fsub s1, s2, s3
+# CHECK: fsub d1, d2, d3
+
+#-----------------------------------------------------------------------------
+# Floating-point comparison
+#-----------------------------------------------------------------------------
+
+0x20 0x04 0x22 0x1e
+0x20 0x04 0x62 0x1e
+0x30 0x04 0x22 0x1e
+0x30 0x04 0x62 0x1e
+
+# CHECK: fccmp  s1, s2, #0, eq
+# CHECK: fccmp  d1, d2, #0, eq
+# CHECK: fccmpe s1, s2, #0, eq
+# CHECK: fccmpe d1, d2, #0, eq
+
+0x20 0x20 0x22 0x1e
+0x20 0x20 0x62 0x1e
+0x28 0x20 0x20 0x1e
+0x28 0x20 0x60 0x1e
+0x30 0x20 0x22 0x1e
+0x30 0x20 0x62 0x1e
+0x38 0x20 0x20 0x1e
+0x38 0x20 0x60 0x1e
+
+# CHECK: fcmp  s1, s2
+# CHECK: fcmp  d1, d2
+# CHECK: fcmp  s1, #0.0
+# CHECK: fcmp  d1, #0.0
+# CHECK: fcmpe s1, s2
+# CHECK: fcmpe d1, d2
+# CHECK: fcmpe s1, #0.0
+# CHECK: fcmpe d1, #0.0
+
+#-----------------------------------------------------------------------------
+# Floating-point conditional select
+#-----------------------------------------------------------------------------
+
+0x41 0x0c 0x23 0x1e
+0x41 0x0c 0x63 0x1e
+
+# CHECK: fcsel s1, s2, s3, eq
+# CHECK: fcsel d1, d2, d3, eq
+
+#-----------------------------------------------------------------------------
+# Floating-point convert
+#-----------------------------------------------------------------------------
+
+0x41 0xc0 0x63 0x1e
+0x41 0x40 0x62 0x1e
+0x41 0xc0 0xe2 0x1e
+0x41 0x40 0xe2 0x1e
+0x41 0xc0 0x22 0x1e
+0x41 0xc0 0x23 0x1e
+
+# CHECK: fcvt h1, d2
+# CHECK: fcvt s1, d2
+# CHECK: fcvt d1, h2
+# CHECK: fcvt s1, h2
+# CHECK: fcvt d1, s2
+# CHECK: fcvt h1, s2
+
+0x41 0x00 0x44 0x1e
+0x41 0x04 0x44 0x1e
+0x41 0x00 0x44 0x9e
+0x41 0x04 0x44 0x9e
+0x41 0x00 0x04 0x1e
+0x41 0x04 0x04 0x1e
+0x41 0x00 0x04 0x9e
+0x41 0x04 0x04 0x9e
+
+#-----------------------------------------------------------------------------
+# Floating-point move
+#-----------------------------------------------------------------------------
+
+0x41 0x00 0x27 0x1e
+0x41 0x00 0x26 0x1e
+0x41 0x00 0x67 0x9e
+0x41 0x00 0x66 0x9e
+
+# CHECK: fmov s1, w2
+# CHECK: fmov w1, s2
+# CHECK: fmov d1, x2
+# CHECK: fmov x1, d2
+
+0x01 0x10 0x28 0x1e
+0x01 0x10 0x68 0x1e
+0x01 0xf0 0x7b 0x1e
+0x01 0xf0 0x6b 0x1e
+
+# CHECK: fmov s1, #1.250000e-01
+# CHECK: fmov d1, #1.250000e-01
+# CHECK: fmov d1, #-4.843750e-01
+# CHECK: fmov d1, #4.843750e-01
+
+0x41 0x40 0x20 0x1e
+0x41 0x40 0x60 0x1e
+
+# CHECK: fmov s1, s2
+# CHECK: fmov d1, d2
+
+#-----------------------------------------------------------------------------
+# Floating-point round to integral
+#-----------------------------------------------------------------------------
+
+0x41 0x40 0x26 0x1e
+0x41 0x40 0x66 0x1e
+
+# CHECK: frinta s1, s2
+# CHECK: frinta d1, d2
+
+0x41 0xc0 0x27 0x1e
+0x41 0xc0 0x67 0x1e
+
+# CHECK: frinti s1, s2
+# CHECK: frinti d1, d2
+
+0x41 0x40 0x25 0x1e
+0x41 0x40 0x65 0x1e
+
+# CHECK: frintm s1, s2
+# CHECK: frintm d1, d2
+
+0x41 0x40 0x24 0x1e
+0x41 0x40 0x64 0x1e
+
+# CHECK: frintn s1, s2
+# CHECK: frintn d1, d2
+
+0x41 0xc0 0x24 0x1e
+0x41 0xc0 0x64 0x1e
+
+# CHECK: frintp s1, s2
+# CHECK: frintp d1, d2
+
+0x41 0x40 0x27 0x1e
+0x41 0x40 0x67 0x1e
+
+# CHECK: frintx s1, s2
+# CHECK: frintx d1, d2
+
+0x41 0xc0 0x25 0x1e
+0x41 0xc0 0x65 0x1e
+
+# CHECK: frintz s1, s2
+# CHECK: frintz d1, d2
+
+  0x00 0x3c 0xe0 0x7e
+  0x00 0x8c 0xe0 0x5e
+
+# CHECK: cmhs d0, d0, d0
+# CHECK: cmtst d0, d0, d0
+
+0x00 0x00 0xaf 0x9e
+0x00 0x00 0xae 0x9e
+
+# CHECK: fmov.d v0[1], x0
+# CHECK: fmov.d x0, v0[1]
+
diff --git a/test/MC/Disassembler/ARM64/system.txt b/test/MC/Disassembler/ARM64/system.txt
new file mode 100644
index 0000000..cefa635
--- /dev/null
+++ b/test/MC/Disassembler/ARM64/system.txt
@@ -0,0 +1,58 @@
+# RUN: llvm-mc -triple arm64-apple-darwin --disassemble < %s | FileCheck %s
+
+
+#-----------------------------------------------------------------------------
+# Hint encodings
+#-----------------------------------------------------------------------------
+
+  0x1f 0x20 0x03 0xd5
+# CHECK: nop
+  0x9f 0x20 0x03 0xd5
+# CHECK: sev
+  0xbf 0x20 0x03 0xd5
+# CHECK: sevl
+  0x5f 0x20 0x03 0xd5
+# CHECK: wfe
+  0x7f 0x20 0x03 0xd5
+# CHECK: wfi
+  0x3f 0x20 0x03 0xd5
+# CHECK: yield
+
+#-----------------------------------------------------------------------------
+# Single-immediate operand instructions
+#-----------------------------------------------------------------------------
+
+  0x5f 0x3a 0x03 0xd5
+# CHECK: clrex #10
+  0xdf 0x3f 0x03 0xd5
+# CHECK: isb{{$}}
+  0xbf 0x33 0x03 0xd5
+# CHECK: dmb osh
+  0x9f 0x37 0x03 0xd5
+# CHECK: dsb nsh
+
+#-----------------------------------------------------------------------------
+# Generic system instructions
+#-----------------------------------------------------------------------------
+  0xff 0x05 0x0a 0xd5
+  0xe7 0x6a 0x0f 0xd5
+  0xf4 0x3f 0x2e 0xd5
+  0xbf 0x40 0x00 0xd5
+  0x00 0x00 0x10 0xd5
+  0x00 0x00 0x30 0xd5
+
+# CHECK: sys #2, c0, c5, #7
+# CHECK: sys #7, c6, c10, #7, x7
+# CHECK: sysl  x20, #6, c3, c15, #7
+# CHECK: msr  SPSel, #0
+# CHECK: msr S2_0_C0_C0_0, x0
+# CHECK: mrs x0, S2_0_C0_C0_0
+
+  0x40 0xc0 0x1e 0xd5
+  0x40 0xc0 0x1a 0xd5
+  0x40 0xc0 0x19 0xd5
+
+# CHECK: msr RMR_EL3, x0
+# CHECK: msr RMR_EL2, x0
+# CHECK: msr RMR_EL1, x0
+
diff --git a/test/MC/Disassembler/Mips/micromips.txt b/test/MC/Disassembler/Mips/micromips.txt
index b2d0cc0..1458ce2 100644
--- a/test/MC/Disassembler/Mips/micromips.txt
+++ b/test/MC/Disassembler/Mips/micromips.txt
@@ -145,6 +145,9 @@
 # CHECK: sw  $5, 4($6)
 0xf8 0xa6 0x00 0x04
 
+# CHECK: lwu $2, 8($4)
+0x60 0x44 0xe0 0x08
+
 # CHECK: lwl $4, 16($5)
 0x60 0x85 0x00 0x10
 
@@ -285,3 +288,9 @@
 
 # CHECK: tnei $9, 17767
 0x41 0x89 0x45 0x67
+
+# CHECK: ll $2, 8($4)
+0x60 0x44 0x30 0x08
+
+# CHECK: sc $2, 8($4)
+0x60 0x44 0xb0 0x08
diff --git a/test/MC/Disassembler/Mips/micromips_le.txt b/test/MC/Disassembler/Mips/micromips_le.txt
index 5b2fe30..bdfe88e 100644
--- a/test/MC/Disassembler/Mips/micromips_le.txt
+++ b/test/MC/Disassembler/Mips/micromips_le.txt
@@ -145,6 +145,9 @@
 # CHECK: sw $5, 4($6)
 0xa6 0xf8 0x04 0x00
 
+# CHECK: lwu $2, 8($4)
+0x44 0x60 0x08 0xe0
+
 # CHECK: lwl $4, 16($5)
 0x85 0x60 0x10 0x00
 
@@ -285,3 +288,9 @@
 
 # CHECK: tnei $9, 17767
 0x89 0x41 0x67 0x45
+
+# CHECK: ll $2, 8($4)
+0x44 0x60 0x08 0x30
+
+# CHECK: sc $2, 8($4)
+0x44 0x60 0x08 0xb0
diff --git a/test/MC/Disassembler/Mips/mips32.txt b/test/MC/Disassembler/Mips/mips32.txt
index 6d02925..bfb145e 100644
--- a/test/MC/Disassembler/Mips/mips32.txt
+++ b/test/MC/Disassembler/Mips/mips32.txt
@@ -206,6 +206,9 @@
 # CHECK: jal 1328
 0x0c 0x00 0x01 0x4c
 
+# CHECK: jalx 1328
+0x74 0x00 0x01 0x4c
+
 # CHECK: jalr  $7
 0x00 0xe0 0xf8 0x09
 
diff --git a/test/MC/Disassembler/Mips/mips32_le.txt b/test/MC/Disassembler/Mips/mips32_le.txt
index 61e6fc8..533fc69 100644
--- a/test/MC/Disassembler/Mips/mips32_le.txt
+++ b/test/MC/Disassembler/Mips/mips32_le.txt
@@ -206,6 +206,9 @@
 # CHECK: jal 1328
 0x4c 0x01 0x00 0x0c
 
+# CHECK: jalx 1328
+0x4c 0x01 0x00 0x74
+
 # CHECK: jalr  $7
 0x09 0xf8 0xe0 0x00
 
diff --git a/test/MC/Disassembler/Mips/mips32r2.txt b/test/MC/Disassembler/Mips/mips32r2.txt
index 11d9058..299f6f0 100644
--- a/test/MC/Disassembler/Mips/mips32r2.txt
+++ b/test/MC/Disassembler/Mips/mips32r2.txt
@@ -215,6 +215,9 @@
 # CHECK: jal 1328
 0x0c 0x00 0x01 0x4c
 
+# CHECK: jalx 1328
+0x74 0x00 0x01 0x4c
+
 # CHECK: jalr  $7
 0x00 0xe0 0xf8 0x09
 
diff --git a/test/MC/Disassembler/Mips/mips32r2_le.txt b/test/MC/Disassembler/Mips/mips32r2_le.txt
index adafcf1..0362ca6 100644
--- a/test/MC/Disassembler/Mips/mips32r2_le.txt
+++ b/test/MC/Disassembler/Mips/mips32r2_le.txt
@@ -215,6 +215,9 @@
 # CHECK: jal 1328
 0x4c 0x01 0x00 0x0c
 
+# CHECK: jalx 1328
+0x4c 0x01 0x00 0x74
+
 # CHECK: jalr  $7
 0x09 0xf8 0xe0 0x00
 
diff --git a/test/MC/Disassembler/PowerPC/lit.local.cfg b/test/MC/Disassembler/PowerPC/lit.local.cfg
new file mode 100644
index 0000000..2e46300
--- /dev/null
+++ b/test/MC/Disassembler/PowerPC/lit.local.cfg
@@ -0,0 +1,4 @@
+targets = set(config.root.targets_to_build.split())
+if not 'PowerPC' in targets:
+    config.unsupported = True
+
diff --git a/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt b/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt
new file mode 100644
index 0000000..5e6033d
--- /dev/null
+++ b/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt
@@ -0,0 +1,74 @@
+# RUN: llvm-mc --disassemble %s -triple powerpc64-unknown-unknown -mcpu=pwr7 | FileCheck %s
+
+# CHECK: icbi 2, 3                       
+0x7c 0x02 0x1f 0xac
+
+# CHECK: dcbt 2, 3                       
+0x7c 0x02 0x1a 0x2c
+
+# CHECK: dcbtst 2, 3                     
+0x7c 0x02 0x19 0xec
+
+# CHECK: dcbz 2, 3                       
+0x7c 0x02 0x1f 0xec
+
+# CHECK: dcbst 2, 3                      
+0x7c 0x02 0x18 0x6c
+
+# CHECK: isync                           
+0x4c 0x00 0x01 0x2c
+
+# CHECK: stwcx. 2, 3, 4                  
+0x7c 0x43 0x21 0x2d
+
+# CHECK: stdcx. 2, 3, 4                  
+0x7c 0x43 0x21 0xad
+
+# CHECK: sync 2                          
+0x7c 0x40 0x04 0xac
+
+# CHECK: eieio                           
+0x7c 0x00 0x06 0xac
+
+# CHECK: wait 2                          
+0x7c 0x40 0x00 0x7c
+
+# CHECK: dcbf 2, 3                       
+0x7c 0x02 0x18 0xac
+
+# CHECK: lwarx 2, 3, 4                   
+0x7c 0x43 0x20 0x28
+
+# CHECK: ldarx 2, 3, 4                   
+0x7c 0x43 0x20 0xa8
+
+# CHECK: sync 0                          
+0x7c 0x00 0x04 0xac
+
+# CHECK: sync 0                          
+0x7c 0x00 0x04 0xac
+
+# CHECK: sync 1                          
+0x7c 0x20 0x04 0xac
+
+# CHECK: sync 2                          
+0x7c 0x40 0x04 0xac
+
+# CHECK: wait 0                          
+0x7c 0x00 0x00 0x7c
+
+# CHECK: wait 1                          
+0x7c 0x20 0x00 0x7c
+
+# CHECK: wait 2                          
+0x7c 0x40 0x00 0x7c
+
+# CHECK: mftb 2, 123                     
+0x7c 0x5b 0x1a 0xe6
+
+# CHECK: mftb 2, 268                     
+0x7c 0x4c 0x42 0xe6
+
+# CHECK: mftb 2, 269                     
+0x7c 0x4d 0x42 0xe6
+
diff --git a/test/MC/Disassembler/PowerPC/ppc64-encoding-bookIII.txt b/test/MC/Disassembler/PowerPC/ppc64-encoding-bookIII.txt
new file mode 100644
index 0000000..c5d6155
--- /dev/null
+++ b/test/MC/Disassembler/PowerPC/ppc64-encoding-bookIII.txt
@@ -0,0 +1,107 @@
+# RUN: llvm-mc --disassemble %s -triple powerpc64-unknown-unknown -mcpu=pwr7 | FileCheck %s
+
+# CHECK: mtmsr 4, 0                       
+0x7c 0x80 0x01 0x24
+
+# CHECK: mtmsr 4, 1                       
+0x7c 0x81 0x01 0x24
+
+# CHECK: mfmsr 4                         
+0x7c 0x80 0x00 0xa6
+
+# CHECK: mtmsrd 4, 0                     
+0x7c 0x80 0x01 0x64
+
+# CHECK: mtmsrd 4, 1                     
+0x7c 0x81 0x01 0x64
+
+# CHECK: mfspr 4, 272                    
+0x7c 0x90 0x42 0xa6
+
+# CHECK: mfspr 4, 273                    
+0x7c 0x91 0x42 0xa6
+
+# CHECK: mfspr 4, 274                    
+0x7c 0x92 0x42 0xa6
+
+# CHECK: mfspr 4, 275                    
+0x7c 0x93 0x42 0xa6
+
+# CHECK: mtspr 272, 4                    
+0x7c 0x90 0x43 0xa6
+
+# CHECK: mtspr 273, 4                    
+0x7c 0x91 0x43 0xa6
+
+# CHECK: mtspr 274, 4                    
+0x7c 0x92 0x43 0xa6
+
+# CHECK: mtspr 275, 4                    
+0x7c 0x93 0x43 0xa6
+
+# CHECK: mtspr 272, 4                    
+0x7c 0x90 0x43 0xa6
+
+# CHECK: mtspr 273, 4                    
+0x7c 0x91 0x43 0xa6
+
+# CHECK: mtspr 274, 4                    
+0x7c 0x92 0x43 0xa6
+
+# CHECK: mtspr 275, 4                    
+0x7c 0x93 0x43 0xa6
+
+# CHECK: mtspr 280, 4                    
+0x7c 0x98 0x43 0xa6
+
+# CHECK: mfspr 4, 22                     
+0x7c 0x96 0x02 0xa6
+
+# CHECK: mtspr 22, 4                     
+0x7c 0x96 0x03 0xa6
+
+# CHECK: mfspr 4, 287                    
+0x7c 0x9f 0x42 0xa6
+
+# CHECK: mfspr 4, 25                     
+0x7c 0x99 0x02 0xa6
+
+# CHECK: mtspr 25, 4                     
+0x7c 0x99 0x03 0xa6
+
+# CHECK: mfspr 4, 26                     
+0x7c 0x9a 0x02 0xa6
+
+# CHECK: mtspr 26, 4                     
+0x7c 0x9a 0x03 0xa6
+
+# CHECK: mfspr 4, 27                     
+0x7c 0x9b 0x02 0xa6
+
+# CHECK: mtspr 27, 4                     
+0x7c 0x9b 0x03 0xa6
+
+# CHECK: slbie 4                         
+0x7c 0x00 0x23 0x64
+
+# CHECK: slbmte 4, 5                     
+0x7c 0x80 0x2b 0x24
+
+# CHECK: slbmfee 4, 5                    
+0x7c 0x80 0x2f 0x26
+
+# CHECK: slbia                           
+0x7c 0x00 0x03 0xe4
+
+# CHECK: tlbsync                         
+0x7c 0x00 0x04 0x6c
+
+# CHECK: tlbiel 4                        
+0x7c 0x00 0x22 0x24
+
+# CHECK: tlbie 4,0                       
+0x7c 0x00 0x22 0x64
+
+# CHECK: tlbie 4,0                       
+0x7c 0x00 0x22 0x64
+
diff --git a/test/MC/Disassembler/PowerPC/ppc64-encoding-ext.txt b/test/MC/Disassembler/PowerPC/ppc64-encoding-ext.txt
new file mode 100644
index 0000000..108df30
--- /dev/null
+++ b/test/MC/Disassembler/PowerPC/ppc64-encoding-ext.txt
@@ -0,0 +1,2253 @@
+# RUN: llvm-mc --disassemble %s -triple powerpc64-unknown-unknown -mcpu=pwr7 | FileCheck %s
+
+# FIXME: decode as beqlr 0
+# CHECK: bclr 12, 2, 0
+0x4d 0x82 0x00 0x20
+
+# FIXME: decode as beqlr 1
+# CHECK: bclr 12, 6, 0
+0x4d 0x86 0x00 0x20
+
+# FIXME: decode as beqlr 2
+# CHECK: bclr 12, 10, 0
+0x4d 0x8a 0x00 0x20
+
+# FIXME: decode as beqlr 3
+# CHECK: bclr 12, 14, 0
+0x4d 0x8e 0x00 0x20
+
+# FIXME: decode as beqlr 4
+# CHECK: bclr 12, 18, 0
+0x4d 0x92 0x00 0x20
+
+# FIXME: decode as beqlr 5
+# CHECK: bclr 12, 22, 0
+0x4d 0x96 0x00 0x20
+
+# FIXME: decode as beqlr 6
+# CHECK: bclr 12, 26, 0
+0x4d 0x9a 0x00 0x20
+
+# FIXME: decode as beqlr 7
+# CHECK: bclr 12, 30, 0
+0x4d 0x9e 0x00 0x20
+
+# CHECK: bclr 12, 0, 0
+0x4d 0x80 0x00 0x20
+
+# CHECK: bclr 12, 1, 0
+0x4d 0x81 0x00 0x20
+
+# CHECK: bclr 12, 2, 0
+0x4d 0x82 0x00 0x20
+
+# CHECK: bclr 12, 3, 0
+0x4d 0x83 0x00 0x20
+
+# CHECK: bclr 12, 3, 0
+0x4d 0x83 0x00 0x20
+
+# CHECK: bclr 12, 4, 0
+0x4d 0x84 0x00 0x20
+
+# CHECK: bclr 12, 5, 0
+0x4d 0x85 0x00 0x20
+
+# CHECK: bclr 12, 6, 0
+0x4d 0x86 0x00 0x20
+
+# CHECK: bclr 12, 7, 0
+0x4d 0x87 0x00 0x20
+
+# CHECK: bclr 12, 7, 0
+0x4d 0x87 0x00 0x20
+
+# CHECK: bclr 12, 8, 0
+0x4d 0x88 0x00 0x20
+
+# CHECK: bclr 12, 9, 0
+0x4d 0x89 0x00 0x20
+
+# CHECK: bclr 12, 10, 0
+0x4d 0x8a 0x00 0x20
+
+# CHECK: bclr 12, 11, 0
+0x4d 0x8b 0x00 0x20
+
+# CHECK: bclr 12, 11, 0
+0x4d 0x8b 0x00 0x20
+
+# CHECK: bclr 12, 12, 0
+0x4d 0x8c 0x00 0x20
+
+# CHECK: bclr 12, 13, 0
+0x4d 0x8d 0x00 0x20
+
+# CHECK: bclr 12, 14, 0
+0x4d 0x8e 0x00 0x20
+
+# CHECK: bclr 12, 15, 0
+0x4d 0x8f 0x00 0x20
+
+# CHECK: bclr 12, 15, 0
+0x4d 0x8f 0x00 0x20
+
+# CHECK: bclr 12, 16, 0
+0x4d 0x90 0x00 0x20
+
+# CHECK: bclr 12, 17, 0
+0x4d 0x91 0x00 0x20
+
+# CHECK: bclr 12, 18, 0
+0x4d 0x92 0x00 0x20
+
+# CHECK: bclr 12, 19, 0
+0x4d 0x93 0x00 0x20
+
+# CHECK: bclr 12, 19, 0
+0x4d 0x93 0x00 0x20
+
+# CHECK: bclr 12, 20, 0
+0x4d 0x94 0x00 0x20
+
+# CHECK: bclr 12, 21, 0
+0x4d 0x95 0x00 0x20
+
+# CHECK: bclr 12, 22, 0
+0x4d 0x96 0x00 0x20
+
+# CHECK: bclr 12, 23, 0
+0x4d 0x97 0x00 0x20
+
+# CHECK: bclr 12, 23, 0
+0x4d 0x97 0x00 0x20
+
+# CHECK: bclr 12, 24, 0
+0x4d 0x98 0x00 0x20
+
+# CHECK: bclr 12, 25, 0
+0x4d 0x99 0x00 0x20
+
+# CHECK: bclr 12, 26, 0
+0x4d 0x9a 0x00 0x20
+
+# CHECK: bclr 12, 27, 0
+0x4d 0x9b 0x00 0x20
+
+# CHECK: bclr 12, 27, 0
+0x4d 0x9b 0x00 0x20
+
+# CHECK: bclr 12, 28, 0
+0x4d 0x9c 0x00 0x20
+
+# CHECK: bclr 12, 29, 0
+0x4d 0x9d 0x00 0x20
+
+# CHECK: bclr 12, 30, 0
+0x4d 0x9e 0x00 0x20
+
+# CHECK: bclr 12, 31, 0
+0x4d 0x9f 0x00 0x20
+
+# CHECK: bclr 12, 31, 0
+0x4d 0x9f 0x00 0x20
+
+# CHECK: blr
+0x4e 0x80 0x00 0x20
+
+# CHECK: bctr
+0x4e 0x80 0x04 0x20
+
+# CHECK: blrl
+0x4e 0x80 0x00 0x21
+
+# CHECK: bctrl
+0x4e 0x80 0x04 0x21
+
+# CHECK: bclr 12, 2, 0
+0x4d 0x82 0x00 0x20
+
+# CHECK: bcctr 12, 2, 0
+0x4d 0x82 0x04 0x20
+
+# CHECK: bclrl 12, 2, 0
+0x4d 0x82 0x00 0x21
+
+# CHECK: bcctrl 12, 2, 0
+0x4d 0x82 0x04 0x21
+
+# CHECK: bclr 15, 2, 0
+0x4d 0xe2 0x00 0x20
+
+# CHECK: bcctr 15, 2, 0
+0x4d 0xe2 0x04 0x20
+
+# CHECK: bclrl 15, 2, 0
+0x4d 0xe2 0x00 0x21
+
+# CHECK: bcctrl 15, 2, 0
+0x4d 0xe2 0x04 0x21
+
+# CHECK: bclr 14, 2, 0
+0x4d 0xc2 0x00 0x20
+
+# CHECK: bcctr 14, 2, 0
+0x4d 0xc2 0x04 0x20
+
+# CHECK: bclrl 14, 2, 0
+0x4d 0xc2 0x00 0x21
+
+# CHECK: bcctrl 14, 2, 0
+0x4d 0xc2 0x04 0x21
+
+# CHECK: bclr 4, 2, 0
+0x4c 0x82 0x00 0x20
+
+# CHECK: bcctr 4, 2, 0
+0x4c 0x82 0x04 0x20
+
+# CHECK: bclrl 4, 2, 0
+0x4c 0x82 0x00 0x21
+
+# CHECK: bcctrl 4, 2, 0
+0x4c 0x82 0x04 0x21
+
+# CHECK: bclr 7, 2, 0
+0x4c 0xe2 0x00 0x20
+
+# CHECK: bcctr 7, 2, 0
+0x4c 0xe2 0x04 0x20
+
+# CHECK: bclrl 7, 2, 0
+0x4c 0xe2 0x00 0x21
+
+# CHECK: bcctrl 7, 2, 0
+0x4c 0xe2 0x04 0x21
+
+# CHECK: bclr 6, 2, 0
+0x4c 0xc2 0x00 0x20
+
+# CHECK: bcctr 6, 2, 0
+0x4c 0xc2 0x04 0x20
+
+# CHECK: bclrl 6, 2, 0
+0x4c 0xc2 0x00 0x21
+
+# CHECK: bcctrl 6, 2, 0
+0x4c 0xc2 0x04 0x21
+
+# CHECK: bdnzlr
+0x4e 0x00 0x00 0x20
+
+# CHECK: bdnzlrl
+0x4e 0x00 0x00 0x21
+
+# CHECK: bdnzlr+
+0x4f 0x20 0x00 0x20
+
+# CHECK: bdnzlrl+
+0x4f 0x20 0x00 0x21
+
+# CHECK: bdnzlr-
+0x4f 0x00 0x00 0x20
+
+# CHECK: bdnzlrl-
+0x4f 0x00 0x00 0x21
+
+# CHECK: bclr 8, 2, 0
+0x4d 0x02 0x00 0x20
+
+# CHECK: bclrl 8, 2, 0
+0x4d 0x02 0x00 0x21
+
+# CHECK: bclr 0, 2, 0
+0x4c 0x02 0x00 0x20
+
+# CHECK: bclrl 0, 2, 0
+0x4c 0x02 0x00 0x21
+
+# CHECK: bdzlr
+0x4e 0x40 0x00 0x20
+
+# CHECK: bdzlrl
+0x4e 0x40 0x00 0x21
+
+# CHECK: bdzlr+
+0x4f 0x60 0x00 0x20
+
+# CHECK: bdzlrl+
+0x4f 0x60 0x00 0x21
+
+# CHECK: bdzlr-
+0x4f 0x40 0x00 0x20
+
+# CHECK: bdzlrl-
+0x4f 0x40 0x00 0x21
+
+# CHECK: bclr 10, 2, 0
+0x4d 0x42 0x00 0x20
+
+# CHECK: bclrl 10, 2, 0
+0x4d 0x42 0x00 0x21
+
+# CHECK: bclr 2, 2, 0
+0x4c 0x42 0x00 0x20
+
+# CHECK: bclrl 2, 2, 0
+0x4c 0x42 0x00 0x21
+
+# FIXME: decode as bltlr 2
+# CHECK: bclr 12, 8, 0
+0x4d 0x88 0x00 0x20
+
+# FIXME: decode as bltlr 0
+# CHECK: bclr 12, 0, 0
+0x4d 0x80 0x00 0x20
+
+# FIXME: decode as bltctr 2
+# CHECK: bcctr 12, 8, 0
+0x4d 0x88 0x04 0x20
+
+# FIXME: decode as bltctr 0
+# CHECK: bcctr 12, 0, 0
+0x4d 0x80 0x04 0x20
+
+# FIXME: decode as bltlrl 2
+# CHECK: bclrl 12, 8, 0
+0x4d 0x88 0x00 0x21
+
+# FIXME: decode as bltlrl 0
+# CHECK: bclrl 12, 0, 0
+0x4d 0x80 0x00 0x21
+
+# FIXME: decode as bltctrl 2
+# CHECK: bcctrl 12, 8, 0
+0x4d 0x88 0x04 0x21
+
+# FIXME: decode as bltctrl 0
+# CHECK: bcctrl 12, 0, 0
+0x4d 0x80 0x04 0x21
+
+# FIXME: decode as bltlr+ 2
+# CHECK: bclr 15, 8, 0
+0x4d 0xe8 0x00 0x20
+
+# FIXME: decode as bltlr+ 0
+# CHECK: bclr 15, 0, 0
+0x4d 0xe0 0x00 0x20
+
+# FIXME: decode as bltctr+ 2
+# CHECK: bcctr 15, 8, 0
+0x4d 0xe8 0x04 0x20
+
+# FIXME: decode as bltctr+ 0
+# CHECK: bcctr 15, 0, 0
+0x4d 0xe0 0x04 0x20
+
+# FIXME: decode as bltlrl+ 2
+# CHECK: bclrl 15, 8, 0
+0x4d 0xe8 0x00 0x21
+
+# FIXME: decode as bltlrl+ 0
+# CHECK: bclrl 15, 0, 0
+0x4d 0xe0 0x00 0x21
+
+# FIXME: decode as bltctrl+ 2
+# CHECK: bcctrl 15, 8, 0
+0x4d 0xe8 0x04 0x21
+
+# FIXME: decode as bltctrl+ 0
+# CHECK: bcctrl 15, 0, 0
+0x4d 0xe0 0x04 0x21
+
+# FIXME: decode as bltlr- 2
+# CHECK: bclr 14, 8, 0
+0x4d 0xc8 0x00 0x20
+
+# FIXME: decode as bltlr- 0
+# CHECK: bclr 14, 0, 0
+0x4d 0xc0 0x00 0x20
+
+# FIXME: decode as bltctr- 2
+# CHECK: bcctr 14, 8, 0
+0x4d 0xc8 0x04 0x20
+
+# FIXME: decode as bltctr- 0
+# CHECK: bcctr 14, 0, 0
+0x4d 0xc0 0x04 0x20
+
+# FIXME: decode as bltlrl- 2
+# CHECK: bclrl 14, 8, 0
+0x4d 0xc8 0x00 0x21
+
+# FIXME: decode as bltlrl- 0
+# CHECK: bclrl 14, 0, 0
+0x4d 0xc0 0x00 0x21
+
+# FIXME: decode as bltctrl- 2
+# CHECK: bcctrl 14, 8, 0
+0x4d 0xc8 0x04 0x21
+
+# FIXME: decode as bltctrl- 0
+# CHECK: bcctrl 14, 0, 0
+0x4d 0xc0 0x04 0x21
+
+# FIXME: decode as blelr 2
+# CHECK: bclr 4, 9, 0
+0x4c 0x89 0x00 0x20
+
+# FIXME: decode as blelr 0
+# CHECK: bclr 4, 1, 0
+0x4c 0x81 0x00 0x20
+
+# FIXME: decode as blectr 2
+# CHECK: bcctr 4, 9, 0
+0x4c 0x89 0x04 0x20
+
+# FIXME: decode as blectr 0
+# CHECK: bcctr 4, 1, 0
+0x4c 0x81 0x04 0x20
+
+# FIXME: decode as blelrl 2
+# CHECK: bclrl 4, 9, 0
+0x4c 0x89 0x00 0x21
+
+# FIXME: decode as blelrl 0
+# CHECK: bclrl 4, 1, 0
+0x4c 0x81 0x00 0x21
+
+# FIXME: decode as blectrl 2
+# CHECK: bcctrl 4, 9, 0
+0x4c 0x89 0x04 0x21
+
+# FIXME: decode as blectrl 0
+# CHECK: bcctrl 4, 1, 0
+0x4c 0x81 0x04 0x21
+
+# FIXME: decode as blelr+ 2
+# CHECK: bclr 7, 9, 0
+0x4c 0xe9 0x00 0x20
+
+# FIXME: decode as blelr+ 0
+# CHECK: bclr 7, 1, 0
+0x4c 0xe1 0x00 0x20
+
+# FIXME: decode as blectr+ 2
+# CHECK: bcctr 7, 9, 0
+0x4c 0xe9 0x04 0x20
+
+# FIXME: decode as blectr+ 0
+# CHECK: bcctr 7, 1, 0
+0x4c 0xe1 0x04 0x20
+
+# FIXME: decode as blelrl+ 2
+# CHECK: bclrl 7, 9, 0
+0x4c 0xe9 0x00 0x21
+
+# FIXME: decode as blelrl+ 0
+# CHECK: bclrl 7, 1, 0
+0x4c 0xe1 0x00 0x21
+
+# FIXME: decode as blectrl+ 2
+# CHECK: bcctrl 7, 9, 0
+0x4c 0xe9 0x04 0x21
+
+# FIXME: decode as blectrl+ 0
+# CHECK: bcctrl 7, 1, 0
+0x4c 0xe1 0x04 0x21
+
+# FIXME: decode as blelr- 2
+# CHECK: bclr 6, 9, 0
+0x4c 0xc9 0x00 0x20
+
+# FIXME: decode as blelr- 0
+# CHECK: bclr 6, 1, 0
+0x4c 0xc1 0x00 0x20
+
+# FIXME: decode as blectr- 2
+# CHECK: bcctr 6, 9, 0
+0x4c 0xc9 0x04 0x20
+
+# FIXME: decode as blectr- 0
+# CHECK: bcctr 6, 1, 0
+0x4c 0xc1 0x04 0x20
+
+# FIXME: decode as blelrl- 2
+# CHECK: bclrl 6, 9, 0
+0x4c 0xc9 0x00 0x21
+
+# FIXME: decode as blelrl- 0
+# CHECK: bclrl 6, 1, 0
+0x4c 0xc1 0x00 0x21
+
+# FIXME: decode as blectrl- 2
+# CHECK: bcctrl 6, 9, 0
+0x4c 0xc9 0x04 0x21
+
+# FIXME: decode as blectrl- 0
+# CHECK: bcctrl 6, 1, 0
+0x4c 0xc1 0x04 0x21
+
+# FIXME: decode as beqlr 2
+# CHECK: bclr 12, 10, 0
+0x4d 0x8a 0x00 0x20
+
+# FIXME: decode as beqlr 0
+# CHECK: bclr 12, 2, 0
+0x4d 0x82 0x00 0x20
+
+# FIXME: decode as beqctr 2
+# CHECK: bcctr 12, 10, 0
+0x4d 0x8a 0x04 0x20
+
+# FIXME: decode as beqctr 0
+# CHECK: bcctr 12, 2, 0
+0x4d 0x82 0x04 0x20
+
+# FIXME: decode as beqlrl 2
+# CHECK: bclrl 12, 10, 0
+0x4d 0x8a 0x00 0x21
+
+# FIXME: decode as beqlrl 0
+# CHECK: bclrl 12, 2, 0
+0x4d 0x82 0x00 0x21
+
+# FIXME: decode as beqctrl 2
+# CHECK: bcctrl 12, 10, 0
+0x4d 0x8a 0x04 0x21
+
+# FIXME: decode as beqctrl 0
+# CHECK: bcctrl 12, 2, 0
+0x4d 0x82 0x04 0x21
+
+# FIXME: decode as beqlr+ 2
+# CHECK: bclr 15, 10, 0
+0x4d 0xea 0x00 0x20
+
+# FIXME: decode as beqlr+ 0
+# CHECK: bclr 15, 2, 0
+0x4d 0xe2 0x00 0x20
+
+# FIXME: decode as beqctr+ 2
+# CHECK: bcctr 15, 10, 0
+0x4d 0xea 0x04 0x20
+
+# FIXME: decode as beqctr+ 0
+# CHECK: bcctr 15, 2, 0
+0x4d 0xe2 0x04 0x20
+
+# FIXME: decode as beqlrl+ 2
+# CHECK: bclrl 15, 10, 0
+0x4d 0xea 0x00 0x21
+
+# FIXME: decode as beqlrl+ 0
+# CHECK: bclrl 15, 2, 0
+0x4d 0xe2 0x00 0x21
+
+# FIXME: decode as beqctrl+ 2
+# CHECK: bcctrl 15, 10, 0
+0x4d 0xea 0x04 0x21
+
+# FIXME: decode as beqctrl+ 0
+# CHECK: bcctrl 15, 2, 0
+0x4d 0xe2 0x04 0x21
+
+# FIXME: decode as beqlr- 2
+# CHECK: bclr 14, 10, 0
+0x4d 0xca 0x00 0x20
+
+# FIXME: decode as beqlr- 0
+# CHECK: bclr 14, 2, 0
+0x4d 0xc2 0x00 0x20
+
+# FIXME: decode as beqctr- 2
+# CHECK: bcctr 14, 10, 0
+0x4d 0xca 0x04 0x20
+
+# FIXME: decode as beqctr- 0
+# CHECK: bcctr 14, 2, 0
+0x4d 0xc2 0x04 0x20
+
+# FIXME: decode as beqlrl- 2
+# CHECK: bclrl 14, 10, 0
+0x4d 0xca 0x00 0x21
+
+# FIXME: decode as beqlrl- 0
+# CHECK: bclrl 14, 2, 0
+0x4d 0xc2 0x00 0x21
+
+# FIXME: decode as beqctrl- 2
+# CHECK: bcctrl 14, 10, 0
+0x4d 0xca 0x04 0x21
+
+# FIXME: decode as beqctrl- 0
+# CHECK: bcctrl 14, 2, 0
+0x4d 0xc2 0x04 0x21
+
+# FIXME: decode as bgelr 2
+# CHECK: bclr 4, 8, 0
+0x4c 0x88 0x00 0x20
+
+# FIXME: decode as bgelr 0
+# CHECK: bclr 4, 0, 0
+0x4c 0x80 0x00 0x20
+
+# FIXME: decode as bgectr 2
+# CHECK: bcctr 4, 8, 0
+0x4c 0x88 0x04 0x20
+
+# FIXME: decode as bgectr 0
+# CHECK: bcctr 4, 0, 0
+0x4c 0x80 0x04 0x20
+
+# FIXME: decode as bgelrl 2
+# CHECK: bclrl 4, 8, 0
+0x4c 0x88 0x00 0x21
+
+# FIXME: decode as bgelrl 0
+# CHECK: bclrl 4, 0, 0
+0x4c 0x80 0x00 0x21
+
+# FIXME: decode as bgectrl 2
+# CHECK: bcctrl 4, 8, 0
+0x4c 0x88 0x04 0x21
+
+# FIXME: decode as bgectrl 0
+# CHECK: bcctrl 4, 0, 0
+0x4c 0x80 0x04 0x21
+
+# FIXME: decode as bgelr+ 2
+# CHECK: bclr 7, 8, 0
+0x4c 0xe8 0x00 0x20
+
+# FIXME: decode as bgelr+ 0
+# CHECK: bclr 7, 0, 0
+0x4c 0xe0 0x00 0x20
+
+# FIXME: decode as bgectr+ 2
+# CHECK: bcctr 7, 8, 0
+0x4c 0xe8 0x04 0x20
+
+# FIXME: decode as bgectr+ 0
+# CHECK: bcctr 7, 0, 0
+0x4c 0xe0 0x04 0x20
+
+# FIXME: decode as bgelrl+ 2
+# CHECK: bclrl 7, 8, 0
+0x4c 0xe8 0x00 0x21
+
+# FIXME: decode as bgelrl+ 0
+# CHECK: bclrl 7, 0, 0
+0x4c 0xe0 0x00 0x21
+
+# FIXME: decode as bgectrl+ 2
+# CHECK: bcctrl 7, 8, 0
+0x4c 0xe8 0x04 0x21
+
+# FIXME: decode as bgectrl+ 0
+# CHECK: bcctrl 7, 0, 0
+0x4c 0xe0 0x04 0x21
+
+# FIXME: decode as bgelr- 2
+# CHECK: bclr 6, 8, 0
+0x4c 0xc8 0x00 0x20
+
+# FIXME: decode as bgelr- 0
+# CHECK: bclr 6, 0, 0
+0x4c 0xc0 0x00 0x20
+
+# FIXME: decode as bgectr- 2
+# CHECK: bcctr 6, 8, 0
+0x4c 0xc8 0x04 0x20
+
+# FIXME: decode as bgectr- 0
+# CHECK: bcctr 6, 0, 0
+0x4c 0xc0 0x04 0x20
+
+# FIXME: decode as bgelrl- 2
+# CHECK: bclrl 6, 8, 0
+0x4c 0xc8 0x00 0x21
+
+# FIXME: decode as bgelrl- 0
+# CHECK: bclrl 6, 0, 0
+0x4c 0xc0 0x00 0x21
+
+# FIXME: decode as bgectrl- 2
+# CHECK: bcctrl 6, 8, 0
+0x4c 0xc8 0x04 0x21
+
+# FIXME: decode as bgectrl- 0
+# CHECK: bcctrl 6, 0, 0
+0x4c 0xc0 0x04 0x21
+
+# FIXME: decode as bgtlr 2
+# CHECK: bclr 12, 9, 0
+0x4d 0x89 0x00 0x20
+
+# FIXME: decode as bgtlr 0
+# CHECK: bclr 12, 1, 0
+0x4d 0x81 0x00 0x20
+
+# FIXME: decode as bgtctr 2
+# CHECK: bcctr 12, 9, 0
+0x4d 0x89 0x04 0x20
+
+# FIXME: decode as bgtctr 0
+# CHECK: bcctr 12, 1, 0
+0x4d 0x81 0x04 0x20
+
+# FIXME: decode as bgtlrl 2
+# CHECK: bclrl 12, 9, 0
+0x4d 0x89 0x00 0x21
+
+# FIXME: decode as bgtlrl 0
+# CHECK: bclrl 12, 1, 0
+0x4d 0x81 0x00 0x21
+
+# FIXME: decode as bgtctrl 2
+# CHECK: bcctrl 12, 9, 0
+0x4d 0x89 0x04 0x21
+
+# FIXME: decode as bgtctrl 0
+# CHECK: bcctrl 12, 1, 0
+0x4d 0x81 0x04 0x21
+
+# FIXME: decode as bgtlr+ 2
+# CHECK: bclr 15, 9, 0
+0x4d 0xe9 0x00 0x20
+
+# FIXME: decode as bgtlr+ 0
+# CHECK: bclr 15, 1, 0
+0x4d 0xe1 0x00 0x20
+
+# FIXME: decode as bgtctr+ 2
+# CHECK: bcctr 15, 9, 0
+0x4d 0xe9 0x04 0x20
+
+# FIXME: decode as bgtctr+ 0
+# CHECK: bcctr 15, 1, 0
+0x4d 0xe1 0x04 0x20
+
+# FIXME: decode as bgtlrl+ 2
+# CHECK: bclrl 15, 9, 0
+0x4d 0xe9 0x00 0x21
+
+# FIXME: decode as bgtlrl+ 0
+# CHECK: bclrl 15, 1, 0
+0x4d 0xe1 0x00 0x21
+
+# FIXME: decode as bgtctrl+ 2
+# CHECK: bcctrl 15, 9, 0
+0x4d 0xe9 0x04 0x21
+
+# FIXME: decode as bgtctrl+ 0
+# CHECK: bcctrl 15, 1, 0
+0x4d 0xe1 0x04 0x21
+
+# FIXME: decode as bgtlr- 2
+# CHECK: bclr 14, 9, 0
+0x4d 0xc9 0x00 0x20
+
+# FIXME: decode as bgtlr- 0
+# CHECK: bclr 14, 1, 0
+0x4d 0xc1 0x00 0x20
+
+# FIXME: decode as bgtctr- 2
+# CHECK: bcctr 14, 9, 0
+0x4d 0xc9 0x04 0x20
+
+# FIXME: decode as bgtctr- 0
+# CHECK: bcctr 14, 1, 0
+0x4d 0xc1 0x04 0x20
+
+# FIXME: decode as bgtlrl- 2
+# CHECK: bclrl 14, 9, 0
+0x4d 0xc9 0x00 0x21
+
+# FIXME: decode as bgtlrl- 0
+# CHECK: bclrl 14, 1, 0
+0x4d 0xc1 0x00 0x21
+
+# FIXME: decode as bgtctrl- 2
+# CHECK: bcctrl 14, 9, 0
+0x4d 0xc9 0x04 0x21
+
+# FIXME: decode as bgtctrl- 0
+# CHECK: bcctrl 14, 1, 0
+0x4d 0xc1 0x04 0x21
+
+# FIXME: decode as bgelr 2
+# CHECK: bclr 4, 8, 0
+0x4c 0x88 0x00 0x20
+
+# FIXME: decode as bgelr 0
+# CHECK: bclr 4, 0, 0
+0x4c 0x80 0x00 0x20
+
+# FIXME: decode as bgectr 2
+# CHECK: bcctr 4, 8, 0
+0x4c 0x88 0x04 0x20
+
+# FIXME: decode as bgectr 0
+# CHECK: bcctr 4, 0, 0
+0x4c 0x80 0x04 0x20
+
+# FIXME: decode as bgelrl 2
+# CHECK: bclrl 4, 8, 0
+0x4c 0x88 0x00 0x21
+
+# FIXME: decode as bgelrl 0
+# CHECK: bclrl 4, 0, 0
+0x4c 0x80 0x00 0x21
+
+# FIXME: decode as bgectrl 2
+# CHECK: bcctrl 4, 8, 0
+0x4c 0x88 0x04 0x21
+
+# FIXME: decode as bgectrl 0
+# CHECK: bcctrl 4, 0, 0
+0x4c 0x80 0x04 0x21
+
+# FIXME: decode as bgelr+ 2
+# CHECK: bclr 7, 8, 0
+0x4c 0xe8 0x00 0x20
+
+# FIXME: decode as bgelr+ 0
+# CHECK: bclr 7, 0, 0
+0x4c 0xe0 0x00 0x20
+
+# FIXME: decode as bgectr+ 2
+# CHECK: bcctr 7, 8, 0
+0x4c 0xe8 0x04 0x20
+
+# FIXME: decode as bgectr+ 0
+# CHECK: bcctr 7, 0, 0
+0x4c 0xe0 0x04 0x20
+
+# FIXME: decode as bgelrl+ 2
+# CHECK: bclrl 7, 8, 0
+0x4c 0xe8 0x00 0x21
+
+# FIXME: decode as bgelrl+ 0
+# CHECK: bclrl 7, 0, 0
+0x4c 0xe0 0x00 0x21
+
+# FIXME: decode as bgectrl+ 2
+# CHECK: bcctrl 7, 8, 0
+0x4c 0xe8 0x04 0x21
+
+# FIXME: decode as bgectrl+ 0
+# CHECK: bcctrl 7, 0, 0
+0x4c 0xe0 0x04 0x21
+
+# FIXME: decode as bgelr- 2
+# CHECK: bclr 6, 8, 0
+0x4c 0xc8 0x00 0x20
+
+# FIXME: decode as bgelr- 0
+# CHECK: bclr 6, 0, 0
+0x4c 0xc0 0x00 0x20
+
+# FIXME: decode as bgectr- 2
+# CHECK: bcctr 6, 8, 0
+0x4c 0xc8 0x04 0x20
+
+# FIXME: decode as bgectr- 0
+# CHECK: bcctr 6, 0, 0
+0x4c 0xc0 0x04 0x20
+
+# FIXME: decode as bgelrl- 2
+# CHECK: bclrl 6, 8, 0
+0x4c 0xc8 0x00 0x21
+
+# FIXME: decode as bgelrl- 0
+# CHECK: bclrl 6, 0, 0
+0x4c 0xc0 0x00 0x21
+
+# FIXME: decode as bgectrl- 2
+# CHECK: bcctrl 6, 8, 0
+0x4c 0xc8 0x04 0x21
+
+# FIXME: decode as bgectrl- 0
+# CHECK: bcctrl 6, 0, 0
+0x4c 0xc0 0x04 0x21
+
+# FIXME: decode as bnelr 2
+# CHECK: bclr 4, 10, 0
+0x4c 0x8a 0x00 0x20
+
+# FIXME: decode as bnelr 0
+# CHECK: bclr 4, 2, 0
+0x4c 0x82 0x00 0x20
+
+# FIXME: decode as bnectr 2
+# CHECK: bcctr 4, 10, 0
+0x4c 0x8a 0x04 0x20
+
+# FIXME: decode as bnectr 0
+# CHECK: bcctr 4, 2, 0
+0x4c 0x82 0x04 0x20
+
+# FIXME: decode as bnelrl 2
+# CHECK: bclrl 4, 10, 0
+0x4c 0x8a 0x00 0x21
+
+# FIXME: decode as bnelrl 0
+# CHECK: bclrl 4, 2, 0
+0x4c 0x82 0x00 0x21
+
+# FIXME: decode as bnectrl 2
+# CHECK: bcctrl 4, 10, 0
+0x4c 0x8a 0x04 0x21
+
+# FIXME: decode as bnectrl 0
+# CHECK: bcctrl 4, 2, 0
+0x4c 0x82 0x04 0x21
+
+# FIXME: decode as bnelr+ 2
+# CHECK: bclr 7, 10, 0
+0x4c 0xea 0x00 0x20
+
+# FIXME: decode as bnelr+ 0
+# CHECK: bclr 7, 2, 0
+0x4c 0xe2 0x00 0x20
+
+# FIXME: decode as bnectr+ 2
+# CHECK: bcctr 7, 10, 0
+0x4c 0xea 0x04 0x20
+
+# FIXME: decode as bnectr+ 0
+# CHECK: bcctr 7, 2, 0
+0x4c 0xe2 0x04 0x20
+
+# FIXME: decode as bnelrl+ 2
+# CHECK: bclrl 7, 10, 0
+0x4c 0xea 0x00 0x21
+
+# FIXME: decode as bnelrl+ 0
+# CHECK: bclrl 7, 2, 0
+0x4c 0xe2 0x00 0x21
+
+# FIXME: decode as bnectrl+ 2
+# CHECK: bcctrl 7, 10, 0
+0x4c 0xea 0x04 0x21
+
+# FIXME: decode as bnectrl+ 0
+# CHECK: bcctrl 7, 2, 0
+0x4c 0xe2 0x04 0x21
+
+# FIXME: decode as bnelr- 2
+# CHECK: bclr 6, 10, 0
+0x4c 0xca 0x00 0x20
+
+# FIXME: decode as bnelr- 0
+# CHECK: bclr 6, 2, 0
+0x4c 0xc2 0x00 0x20
+
+# FIXME: decode as bnectr- 2
+# CHECK: bcctr 6, 10, 0
+0x4c 0xca 0x04 0x20
+
+# FIXME: decode as bnectr- 0
+# CHECK: bcctr 6, 2, 0
+0x4c 0xc2 0x04 0x20
+
+# FIXME: decode as bnelrl- 2
+# CHECK: bclrl 6, 10, 0
+0x4c 0xca 0x00 0x21
+
+# FIXME: decode as bnelrl- 0
+# CHECK: bclrl 6, 2, 0
+0x4c 0xc2 0x00 0x21
+
+# FIXME: decode as bnectrl- 2
+# CHECK: bcctrl 6, 10, 0
+0x4c 0xca 0x04 0x21
+
+# FIXME: decode as bnectrl- 0
+# CHECK: bcctrl 6, 2, 0
+0x4c 0xc2 0x04 0x21
+
+# FIXME: decode as blelr 2
+# CHECK: bclr 4, 9, 0
+0x4c 0x89 0x00 0x20
+
+# FIXME: decode as blelr 0
+# CHECK: bclr 4, 1, 0
+0x4c 0x81 0x00 0x20
+
+# FIXME: decode as blectr 2
+# CHECK: bcctr 4, 9, 0
+0x4c 0x89 0x04 0x20
+
+# FIXME: decode as blectr 0
+# CHECK: bcctr 4, 1, 0
+0x4c 0x81 0x04 0x20
+
+# FIXME: decode as blelrl 2
+# CHECK: bclrl 4, 9, 0
+0x4c 0x89 0x00 0x21
+
+# FIXME: decode as blelrl 0
+# CHECK: bclrl 4, 1, 0
+0x4c 0x81 0x00 0x21
+
+# FIXME: decode as blectrl 2
+# CHECK: bcctrl 4, 9, 0
+0x4c 0x89 0x04 0x21
+
+# FIXME: decode as blectrl 0
+# CHECK: bcctrl 4, 1, 0
+0x4c 0x81 0x04 0x21
+
+# FIXME: decode as blelr+ 2
+# CHECK: bclr 7, 9, 0
+0x4c 0xe9 0x00 0x20
+
+# FIXME: decode as blelr+ 0
+# CHECK: bclr 7, 1, 0
+0x4c 0xe1 0x00 0x20
+
+# FIXME: decode as blectr+ 2
+# CHECK: bcctr 7, 9, 0
+0x4c 0xe9 0x04 0x20
+
+# FIXME: decode as blectr+ 0
+# CHECK: bcctr 7, 1, 0
+0x4c 0xe1 0x04 0x20
+
+# FIXME: decode as blelrl+ 2
+# CHECK: bclrl 7, 9, 0
+0x4c 0xe9 0x00 0x21
+
+# FIXME: decode as blelrl+ 0
+# CHECK: bclrl 7, 1, 0
+0x4c 0xe1 0x00 0x21
+
+# FIXME: decode as blectrl+ 2
+# CHECK: bcctrl 7, 9, 0
+0x4c 0xe9 0x04 0x21
+
+# FIXME: decode as blectrl+ 0
+# CHECK: bcctrl 7, 1, 0
+0x4c 0xe1 0x04 0x21
+
+# FIXME: decode as blelr- 2
+# CHECK: bclr 6, 9, 0
+0x4c 0xc9 0x00 0x20
+
+# FIXME: decode as blelr- 0
+# CHECK: bclr 6, 1, 0
+0x4c 0xc1 0x00 0x20
+
+# FIXME: decode as blectr- 2
+# CHECK: bcctr 6, 9, 0
+0x4c 0xc9 0x04 0x20
+
+# FIXME: decode as blectr- 0
+# CHECK: bcctr 6, 1, 0
+0x4c 0xc1 0x04 0x20
+
+# FIXME: decode as blelrl- 2
+# CHECK: bclrl 6, 9, 0
+0x4c 0xc9 0x00 0x21
+
+# FIXME: decode as blelrl- 0
+# CHECK: bclrl 6, 1, 0
+0x4c 0xc1 0x00 0x21
+
+# FIXME: decode as blectrl- 2
+# CHECK: bcctrl 6, 9, 0
+0x4c 0xc9 0x04 0x21
+
+# FIXME: decode as blectrl- 0
+# CHECK: bcctrl 6, 1, 0
+0x4c 0xc1 0x04 0x21
+
+# FIXME: decode as bunlr 2
+# CHECK: bclr 12, 11, 0
+0x4d 0x8b 0x00 0x20
+
+# FIXME: decode as bunlr 0
+# CHECK: bclr 12, 3, 0
+0x4d 0x83 0x00 0x20
+
+# FIXME: decode as bunctr 2
+# CHECK: bcctr 12, 11, 0
+0x4d 0x8b 0x04 0x20
+
+# FIXME: decode as bunctr 0
+# CHECK: bcctr 12, 3, 0
+0x4d 0x83 0x04 0x20
+
+# FIXME: decode as bunlrl 2
+# CHECK: bclrl 12, 11, 0
+0x4d 0x8b 0x00 0x21
+
+# FIXME: decode as bunlrl 0
+# CHECK: bclrl 12, 3, 0
+0x4d 0x83 0x00 0x21
+
+# FIXME: decode as bunctrl 2
+# CHECK: bcctrl 12, 11, 0
+0x4d 0x8b 0x04 0x21
+
+# FIXME: decode as bunctrl 0
+# CHECK: bcctrl 12, 3, 0
+0x4d 0x83 0x04 0x21
+
+# FIXME: decode as bunlr+ 2
+# CHECK: bclr 15, 11, 0
+0x4d 0xeb 0x00 0x20
+
+# FIXME: decode as bunlr+ 0
+# CHECK: bclr 15, 3, 0
+0x4d 0xe3 0x00 0x20
+
+# FIXME: decode as bunctr+ 2
+# CHECK: bcctr 15, 11, 0
+0x4d 0xeb 0x04 0x20
+
+# FIXME: decode as bunctr+ 0
+# CHECK: bcctr 15, 3, 0
+0x4d 0xe3 0x04 0x20
+
+# FIXME: decode as bunlrl+ 2
+# CHECK: bclrl 15, 11, 0
+0x4d 0xeb 0x00 0x21
+
+# FIXME: decode as bunlrl+ 0
+# CHECK: bclrl 15, 3, 0
+0x4d 0xe3 0x00 0x21
+
+# FIXME: decode as bunctrl+ 2
+# CHECK: bcctrl 15, 11, 0
+0x4d 0xeb 0x04 0x21
+
+# FIXME: decode as bunctrl+ 0
+# CHECK: bcctrl 15, 3, 0
+0x4d 0xe3 0x04 0x21
+
+# FIXME: decode as bunlr- 2
+# CHECK: bclr 14, 11, 0
+0x4d 0xcb 0x00 0x20
+
+# FIXME: decode as bunlr- 0
+# CHECK: bclr 14, 3, 0
+0x4d 0xc3 0x00 0x20
+
+# FIXME: decode as bunctr- 2
+# CHECK: bcctr 14, 11, 0
+0x4d 0xcb 0x04 0x20
+
+# FIXME: decode as bunctr- 0
+# CHECK: bcctr 14, 3, 0
+0x4d 0xc3 0x04 0x20
+
+# FIXME: decode as bunlrl- 2
+# CHECK: bclrl 14, 11, 0
+0x4d 0xcb 0x00 0x21
+
+# FIXME: decode as bunlrl- 0
+# CHECK: bclrl 14, 3, 0
+0x4d 0xc3 0x00 0x21
+
+# FIXME: decode as bunctrl- 2
+# CHECK: bcctrl 14, 11, 0
+0x4d 0xcb 0x04 0x21
+
+# FIXME: decode as bunctrl- 0
+# CHECK: bcctrl 14, 3, 0
+0x4d 0xc3 0x04 0x21
+
+# FIXME: decode as bnulr 2
+# CHECK: bclr 4, 11, 0
+0x4c 0x8b 0x00 0x20
+
+# FIXME: decode as bnulr 0
+# CHECK: bclr 4, 3, 0
+0x4c 0x83 0x00 0x20
+
+# FIXME: decode as bnuctr 2
+# CHECK: bcctr 4, 11, 0
+0x4c 0x8b 0x04 0x20
+
+# FIXME: decode as bnuctr 0
+# CHECK: bcctr 4, 3, 0
+0x4c 0x83 0x04 0x20
+
+# FIXME: decode as bnulrl 2
+# CHECK: bclrl 4, 11, 0
+0x4c 0x8b 0x00 0x21
+
+# FIXME: decode as bnulrl 0
+# CHECK: bclrl 4, 3, 0
+0x4c 0x83 0x00 0x21
+
+# FIXME: decode as bnuctrl 2
+# CHECK: bcctrl 4, 11, 0
+0x4c 0x8b 0x04 0x21
+
+# FIXME: decode as bnuctrl 0
+# CHECK: bcctrl 4, 3, 0
+0x4c 0x83 0x04 0x21
+
+# FIXME: decode as bnulr+ 2
+# CHECK: bclr 7, 11, 0
+0x4c 0xeb 0x00 0x20
+
+# FIXME: decode as bnulr+ 0
+# CHECK: bclr 7, 3, 0
+0x4c 0xe3 0x00 0x20
+
+# FIXME: decode as bnuctr+ 2
+# CHECK: bcctr 7, 11, 0
+0x4c 0xeb 0x04 0x20
+
+# FIXME: decode as bnuctr+ 0
+# CHECK: bcctr 7, 3, 0
+0x4c 0xe3 0x04 0x20
+
+# FIXME: decode as bnulrl+ 2
+# CHECK: bclrl 7, 11, 0
+0x4c 0xeb 0x00 0x21
+
+# FIXME: decode as bnulrl+ 0
+# CHECK: bclrl 7, 3, 0
+0x4c 0xe3 0x00 0x21
+
+# FIXME: decode as bnuctrl+ 2
+# CHECK: bcctrl 7, 11, 0
+0x4c 0xeb 0x04 0x21
+
+# FIXME: decode as bnuctrl+ 0
+# CHECK: bcctrl 7, 3, 0
+0x4c 0xe3 0x04 0x21
+
+# FIXME: decode as bnulr- 2
+# CHECK: bclr 6, 11, 0
+0x4c 0xcb 0x00 0x20
+
+# FIXME: decode as bnulr- 0
+# CHECK: bclr 6, 3, 0
+0x4c 0xc3 0x00 0x20
+
+# FIXME: decode as bnuctr- 2
+# CHECK: bcctr 6, 11, 0
+0x4c 0xcb 0x04 0x20
+
+# FIXME: decode as bnuctr- 0
+# CHECK: bcctr 6, 3, 0
+0x4c 0xc3 0x04 0x20
+
+# FIXME: decode as bnulrl- 2
+# CHECK: bclrl 6, 11, 0
+0x4c 0xcb 0x00 0x21
+
+# FIXME: decode as bnulrl- 0
+# CHECK: bclrl 6, 3, 0
+0x4c 0xc3 0x00 0x21
+
+# FIXME: decode as bnuctrl- 2
+# CHECK: bcctrl 6, 11, 0
+0x4c 0xcb 0x04 0x21
+
+# FIXME: decode as bnuctrl- 0
+# CHECK: bcctrl 6, 3, 0
+0x4c 0xc3 0x04 0x21
+
+# FIXME: decode as bunlr 2
+# CHECK: bclr 12, 11, 0
+0x4d 0x8b 0x00 0x20
+
+# FIXME: decode as bunlr 0
+# CHECK: bclr 12, 3, 0
+0x4d 0x83 0x00 0x20
+
+# FIXME: decode as bunctr 2
+# CHECK: bcctr 12, 11, 0
+0x4d 0x8b 0x04 0x20
+
+# FIXME: decode as bunctr 0
+# CHECK: bcctr 12, 3, 0
+0x4d 0x83 0x04 0x20
+
+# FIXME: decode as bunlrl 2
+# CHECK: bclrl 12, 11, 0
+0x4d 0x8b 0x00 0x21
+
+# FIXME: decode as bunlrl 0
+# CHECK: bclrl 12, 3, 0
+0x4d 0x83 0x00 0x21
+
+# FIXME: decode as bunctrl 2
+# CHECK: bcctrl 12, 11, 0
+0x4d 0x8b 0x04 0x21
+
+# FIXME: decode as bunctrl 0
+# CHECK: bcctrl 12, 3, 0
+0x4d 0x83 0x04 0x21
+
+# FIXME: decode as bunlr+ 2
+# CHECK: bclr 15, 11, 0
+0x4d 0xeb 0x00 0x20
+
+# FIXME: decode as bunlr+ 0
+# CHECK: bclr 15, 3, 0
+0x4d 0xe3 0x00 0x20
+
+# FIXME: decode as bunctr+ 2
+# CHECK: bcctr 15, 11, 0
+0x4d 0xeb 0x04 0x20
+
+# FIXME: decode as bunctr+ 0
+# CHECK: bcctr 15, 3, 0
+0x4d 0xe3 0x04 0x20
+
+# FIXME: decode as bunlrl+ 2
+# CHECK: bclrl 15, 11, 0
+0x4d 0xeb 0x00 0x21
+
+# FIXME: decode as bunlrl+ 0
+# CHECK: bclrl 15, 3, 0
+0x4d 0xe3 0x00 0x21
+
+# FIXME: decode as bunctrl+ 2
+# CHECK: bcctrl 15, 11, 0
+0x4d 0xeb 0x04 0x21
+
+# FIXME: decode as bunctrl+ 0
+# CHECK: bcctrl 15, 3, 0
+0x4d 0xe3 0x04 0x21
+
+# FIXME: decode as bunlr- 2
+# CHECK: bclr 14, 11, 0
+0x4d 0xcb 0x00 0x20
+
+# FIXME: decode as bunlr- 0
+# CHECK: bclr 14, 3, 0
+0x4d 0xc3 0x00 0x20
+
+# FIXME: decode as bunctr- 2
+# CHECK: bcctr 14, 11, 0
+0x4d 0xcb 0x04 0x20
+
+# FIXME: decode as bunctr- 0
+# CHECK: bcctr 14, 3, 0
+0x4d 0xc3 0x04 0x20
+
+# FIXME: decode as bunlrl- 2
+# CHECK: bclrl 14, 11, 0
+0x4d 0xcb 0x00 0x21
+
+# FIXME: decode as bunlrl- 0
+# CHECK: bclrl 14, 3, 0
+0x4d 0xc3 0x00 0x21
+
+# FIXME: decode as bunctrl- 2
+# CHECK: bcctrl 14, 11, 0
+0x4d 0xcb 0x04 0x21
+
+# FIXME: decode as bunctrl- 0
+# CHECK: bcctrl 14, 3, 0
+0x4d 0xc3 0x04 0x21
+
+# FIXME: decode as bnulr 2
+# CHECK: bclr 4, 11, 0
+0x4c 0x8b 0x00 0x20
+
+# FIXME: decode as bnulr 0
+# CHECK: bclr 4, 3, 0
+0x4c 0x83 0x00 0x20
+
+# FIXME: decode as bnuctr 2
+# CHECK: bcctr 4, 11, 0
+0x4c 0x8b 0x04 0x20
+
+# FIXME: decode as bnuctr 0
+# CHECK: bcctr 4, 3, 0
+0x4c 0x83 0x04 0x20
+
+# FIXME: decode as bnulrl 2
+# CHECK: bclrl 4, 11, 0
+0x4c 0x8b 0x00 0x21
+
+# FIXME: decode as bnulrl 0
+# CHECK: bclrl 4, 3, 0
+0x4c 0x83 0x00 0x21
+
+# FIXME: decode as bnuctrl 2
+# CHECK: bcctrl 4, 11, 0
+0x4c 0x8b 0x04 0x21
+
+# FIXME: decode as bnuctrl 0
+# CHECK: bcctrl 4, 3, 0
+0x4c 0x83 0x04 0x21
+
+# FIXME: decode as bnulr+ 2
+# CHECK: bclr 7, 11, 0
+0x4c 0xeb 0x00 0x20
+
+# FIXME: decode as bnulr+ 0
+# CHECK: bclr 7, 3, 0
+0x4c 0xe3 0x00 0x20
+
+# FIXME: decode as bnuctr+ 2
+# CHECK: bcctr 7, 11, 0
+0x4c 0xeb 0x04 0x20
+
+# FIXME: decode as bnuctr+ 0
+# CHECK: bcctr 7, 3, 0
+0x4c 0xe3 0x04 0x20
+
+# FIXME: decode as bnulrl+ 2
+# CHECK: bclrl 7, 11, 0
+0x4c 0xeb 0x00 0x21
+
+# FIXME: decode as bnulrl+ 0
+# CHECK: bclrl 7, 3, 0
+0x4c 0xe3 0x00 0x21
+
+# FIXME: decode as bnuctrl+ 2
+# CHECK: bcctrl 7, 11, 0
+0x4c 0xeb 0x04 0x21
+
+# FIXME: decode as bnuctrl+ 0
+# CHECK: bcctrl 7, 3, 0
+0x4c 0xe3 0x04 0x21
+
+# FIXME: decode as bnulr- 2
+# CHECK: bclr 6, 11, 0
+0x4c 0xcb 0x00 0x20
+
+# FIXME: decode as bnulr- 0
+# CHECK: bclr 6, 3, 0
+0x4c 0xc3 0x00 0x20
+
+# FIXME: decode as bnuctr- 2
+# CHECK: bcctr 6, 11, 0
+0x4c 0xcb 0x04 0x20
+
+# FIXME: decode as bnuctr- 0
+# CHECK: bcctr 6, 3, 0
+0x4c 0xc3 0x04 0x20
+
+# FIXME: decode as bnulrl- 2
+# CHECK: bclrl 6, 11, 0
+0x4c 0xcb 0x00 0x21
+
+# FIXME: decode as bnulrl- 0
+# CHECK: bclrl 6, 3, 0
+0x4c 0xc3 0x00 0x21
+
+# FIXME: decode as bnuctrl- 2
+# CHECK: bcctrl 6, 11, 0
+0x4c 0xcb 0x04 0x21
+
+# FIXME: decode as bnuctrl- 0
+# CHECK: bcctrl 6, 3, 0
+0x4c 0xc3 0x04 0x21
+
+# FIXME: test bc 12, 2, target
+# FIXME: test bca 12, 2, target
+# FIXME: test bcl 12, 2, target
+# FIXME: test bcla 12, 2, target
+# FIXME: test bc 15, 2, target
+# FIXME: test bca 15, 2, target
+# FIXME: test bcl 15, 2, target
+# FIXME: test bcla 15, 2, target
+# FIXME: test bc 14, 2, target
+# FIXME: test bca 14, 2, target
+# FIXME: test bcl 14, 2, target
+# FIXME: test bcla 14, 2, target
+# FIXME: test bc 4, 2, target
+# FIXME: test bca 4, 2, target
+# FIXME: test bcl 4, 2, target
+# FIXME: test bcla 4, 2, target
+# FIXME: test bc 7, 2, target
+# FIXME: test bca 7, 2, target
+# FIXME: test bcl 7, 2, target
+# FIXME: test bcla 7, 2, target
+# FIXME: test bc 6, 2, target
+# FIXME: test bca 6, 2, target
+# FIXME: test bcl 6, 2, target
+# FIXME: test bcla 6, 2, target
+# FIXME: test bdnz target
+# FIXME: test bdnza target
+# FIXME: test bdnzl target
+# FIXME: test bdnzla target
+# FIXME: test bdnz+ target
+# FIXME: test bdnza+ target
+# FIXME: test bdnzl+ target
+# FIXME: test bdnzla+ target
+# FIXME: test bdnz- target
+# FIXME: test bdnza- target
+# FIXME: test bdnzl- target
+# FIXME: test bdnzla- target
+# FIXME: test bc 8, 2, target
+# FIXME: test bca 8, 2, target
+# FIXME: test bcl 8, 2, target
+# FIXME: test bcla 8, 2, target
+# FIXME: test bc 0, 2, target
+# FIXME: test bca 0, 2, target
+# FIXME: test bcl 0, 2, target
+# FIXME: test bcla 0, 2, target
+# FIXME: test bdz target
+# FIXME: test bdza target
+# FIXME: test bdzl target
+# FIXME: test bdzla target
+# FIXME: test bdz+ target
+# FIXME: test bdza+ target
+# FIXME: test bdzl+ target
+# FIXME: test bdzla+ target
+# FIXME: test bdz- target
+# FIXME: test bdza- target
+# FIXME: test bdzl- target
+# FIXME: test bdzla- target
+# FIXME: test bc 10, 2, target
+# FIXME: test bca 10, 2, target
+# FIXME: test bcl 10, 2, target
+# FIXME: test bcla 10, 2, target
+# FIXME: test bc 2, 2, target
+# FIXME: test bca 2, 2, target
+# FIXME: test bcl 2, 2, target
+# FIXME: test bcla 2, 2, target
+# FIXME: test blt 2, target
+# FIXME: test blt 0, target
+# FIXME: test blta 2, target
+# FIXME: test blta 0, target
+# FIXME: test bltl 2, target
+# FIXME: test bltl 0, target
+# FIXME: test bltla 2, target
+# FIXME: test bltla 0, target
+# FIXME: test blt+ 2, target
+# FIXME: test blt+ 0, target
+# FIXME: test blta+ 2, target
+# FIXME: test blta+ 0, target
+# FIXME: test bltl+ 2, target
+# FIXME: test bltl+ 0, target
+# FIXME: test bltla+ 2, target
+# FIXME: test bltla+ 0, target
+# FIXME: test blt- 2, target
+# FIXME: test blt- 0, target
+# FIXME: test blta- 2, target
+# FIXME: test blta- 0, target
+# FIXME: test bltl- 2, target
+# FIXME: test bltl- 0, target
+# FIXME: test bltla- 2, target
+# FIXME: test bltla- 0, target
+# FIXME: test ble 2, target
+# FIXME: test ble 0, target
+# FIXME: test blea 2, target
+# FIXME: test blea 0, target
+# FIXME: test blel 2, target
+# FIXME: test blel 0, target
+# FIXME: test blela 2, target
+# FIXME: test blela 0, target
+# FIXME: test ble+ 2, target
+# FIXME: test ble+ 0, target
+# FIXME: test blea+ 2, target
+# FIXME: test blea+ 0, target
+# FIXME: test blel+ 2, target
+# FIXME: test blel+ 0, target
+# FIXME: test blela+ 2, target
+# FIXME: test blela+ 0, target
+# FIXME: test ble- 2, target
+# FIXME: test ble- 0, target
+# FIXME: test blea- 2, target
+# FIXME: test blea- 0, target
+# FIXME: test blel- 2, target
+# FIXME: test blel- 0, target
+# FIXME: test blela- 2, target
+# FIXME: test blela- 0, target
+# FIXME: test beq 2, target
+# FIXME: test beq 0, target
+# FIXME: test beqa 2, target
+# FIXME: test beqa 0, target
+# FIXME: test beql 2, target
+# FIXME: test beql 0, target
+# FIXME: test beqla 2, target
+# FIXME: test beqla 0, target
+# FIXME: test beq+ 2, target
+# FIXME: test beq+ 0, target
+# FIXME: test beqa+ 2, target
+# FIXME: test beqa+ 0, target
+# FIXME: test beql+ 2, target
+# FIXME: test beql+ 0, target
+# FIXME: test beqla+ 2, target
+# FIXME: test beqla+ 0, target
+# FIXME: test beq- 2, target
+# FIXME: test beq- 0, target
+# FIXME: test beqa- 2, target
+# FIXME: test beqa- 0, target
+# FIXME: test beql- 2, target
+# FIXME: test beql- 0, target
+# FIXME: test beqla- 2, target
+# FIXME: test beqla- 0, target
+# FIXME: test bge 2, target
+# FIXME: test bge 0, target
+# FIXME: test bgea 2, target
+# FIXME: test bgea 0, target
+# FIXME: test bgel 2, target
+# FIXME: test bgel 0, target
+# FIXME: test bgela 2, target
+# FIXME: test bgela 0, target
+# FIXME: test bge+ 2, target
+# FIXME: test bge+ 0, target
+# FIXME: test bgea+ 2, target
+# FIXME: test bgea+ 0, target
+# FIXME: test bgel+ 2, target
+# FIXME: test bgel+ 0, target
+# FIXME: test bgela+ 2, target
+# FIXME: test bgela+ 0, target
+# FIXME: test bge- 2, target
+# FIXME: test bge- 0, target
+# FIXME: test bgea- 2, target
+# FIXME: test bgea- 0, target
+# FIXME: test bgel- 2, target
+# FIXME: test bgel- 0, target
+# FIXME: test bgela- 2, target
+# FIXME: test bgela- 0, target
+# FIXME: test bgt 2, target
+# FIXME: test bgt 0, target
+# FIXME: test bgta 2, target
+# FIXME: test bgta 0, target
+# FIXME: test bgtl 2, target
+# FIXME: test bgtl 0, target
+# FIXME: test bgtla 2, target
+# FIXME: test bgtla 0, target
+# FIXME: test bgt+ 2, target
+# FIXME: test bgt+ 0, target
+# FIXME: test bgta+ 2, target
+# FIXME: test bgta+ 0, target
+# FIXME: test bgtl+ 2, target
+# FIXME: test bgtl+ 0, target
+# FIXME: test bgtla+ 2, target
+# FIXME: test bgtla+ 0, target
+# FIXME: test bgt- 2, target
+# FIXME: test bgt- 0, target
+# FIXME: test bgta- 2, target
+# FIXME: test bgta- 0, target
+# FIXME: test bgtl- 2, target
+# FIXME: test bgtl- 0, target
+# FIXME: test bgtla- 2, target
+# FIXME: test bgtla- 0, target
+# FIXME: test bge 2, target
+# FIXME: test bge 0, target
+# FIXME: test bgea 2, target
+# FIXME: test bgea 0, target
+# FIXME: test bgel 2, target
+# FIXME: test bgel 0, target
+# FIXME: test bgela 2, target
+# FIXME: test bgela 0, target
+# FIXME: test bge+ 2, target
+# FIXME: test bge+ 0, target
+# FIXME: test bgea+ 2, target
+# FIXME: test bgea+ 0, target
+# FIXME: test bgel+ 2, target
+# FIXME: test bgel+ 0, target
+# FIXME: test bgela+ 2, target
+# FIXME: test bgela+ 0, target
+# FIXME: test bge- 2, target
+# FIXME: test bge- 0, target
+# FIXME: test bgea- 2, target
+# FIXME: test bgea- 0, target
+# FIXME: test bgel- 2, target
+# FIXME: test bgel- 0, target
+# FIXME: test bgela- 2, target
+# FIXME: test bgela- 0, target
+# FIXME: test bne 2, target
+# FIXME: test bne 0, target
+# FIXME: test bnea 2, target
+# FIXME: test bnea 0, target
+# FIXME: test bnel 2, target
+# FIXME: test bnel 0, target
+# FIXME: test bnela 2, target
+# FIXME: test bnela 0, target
+# FIXME: test bne+ 2, target
+# FIXME: test bne+ 0, target
+# FIXME: test bnea+ 2, target
+# FIXME: test bnea+ 0, target
+# FIXME: test bnel+ 2, target
+# FIXME: test bnel+ 0, target
+# FIXME: test bnela+ 2, target
+# FIXME: test bnela+ 0, target
+# FIXME: test bne- 2, target
+# FIXME: test bne- 0, target
+# FIXME: test bnea- 2, target
+# FIXME: test bnea- 0, target
+# FIXME: test bnel- 2, target
+# FIXME: test bnel- 0, target
+# FIXME: test bnela- 2, target
+# FIXME: test bnela- 0, target
+# FIXME: test ble 2, target
+# FIXME: test ble 0, target
+# FIXME: test blea 2, target
+# FIXME: test blea 0, target
+# FIXME: test blel 2, target
+# FIXME: test blel 0, target
+# FIXME: test blela 2, target
+# FIXME: test blela 0, target
+# FIXME: test ble+ 2, target
+# FIXME: test ble+ 0, target
+# FIXME: test blea+ 2, target
+# FIXME: test blea+ 0, target
+# FIXME: test blel+ 2, target
+# FIXME: test blel+ 0, target
+# FIXME: test blela+ 2, target
+# FIXME: test blela+ 0, target
+# FIXME: test ble- 2, target
+# FIXME: test ble- 0, target
+# FIXME: test blea- 2, target
+# FIXME: test blea- 0, target
+# FIXME: test blel- 2, target
+# FIXME: test blel- 0, target
+# FIXME: test blela- 2, target
+# FIXME: test blela- 0, target
+# FIXME: test bun 2, target
+# FIXME: test bun 0, target
+# FIXME: test buna 2, target
+# FIXME: test buna 0, target
+# FIXME: test bunl 2, target
+# FIXME: test bunl 0, target
+# FIXME: test bunla 2, target
+# FIXME: test bunla 0, target
+# FIXME: test bun+ 2, target
+# FIXME: test bun+ 0, target
+# FIXME: test buna+ 2, target
+# FIXME: test buna+ 0, target
+# FIXME: test bunl+ 2, target
+# FIXME: test bunl+ 0, target
+# FIXME: test bunla+ 2, target
+# FIXME: test bunla+ 0, target
+# FIXME: test bun- 2, target
+# FIXME: test bun- 0, target
+# FIXME: test buna- 2, target
+# FIXME: test buna- 0, target
+# FIXME: test bunl- 2, target
+# FIXME: test bunl- 0, target
+# FIXME: test bunla- 2, target
+# FIXME: test bunla- 0, target
+# FIXME: test bnu 2, target
+# FIXME: test bnu 0, target
+# FIXME: test bnua 2, target
+# FIXME: test bnua 0, target
+# FIXME: test bnul 2, target
+# FIXME: test bnul 0, target
+# FIXME: test bnula 2, target
+# FIXME: test bnula 0, target
+# FIXME: test bnu+ 2, target
+# FIXME: test bnu+ 0, target
+# FIXME: test bnua+ 2, target
+# FIXME: test bnua+ 0, target
+# FIXME: test bnul+ 2, target
+# FIXME: test bnul+ 0, target
+# FIXME: test bnula+ 2, target
+# FIXME: test bnula+ 0, target
+# FIXME: test bnu- 2, target
+# FIXME: test bnu- 0, target
+# FIXME: test bnua- 2, target
+# FIXME: test bnua- 0, target
+# FIXME: test bnul- 2, target
+# FIXME: test bnul- 0, target
+# FIXME: test bnula- 2, target
+# FIXME: test bnula- 0, target
+# FIXME: test bun 2, target
+# FIXME: test bun 0, target
+# FIXME: test buna 2, target
+# FIXME: test buna 0, target
+# FIXME: test bunl 2, target
+# FIXME: test bunl 0, target
+# FIXME: test bunla 2, target
+# FIXME: test bunla 0, target
+# FIXME: test bun+ 2, target
+# FIXME: test bun+ 0, target
+# FIXME: test buna+ 2, target
+# FIXME: test buna+ 0, target
+# FIXME: test bunl+ 2, target
+# FIXME: test bunl+ 0, target
+# FIXME: test bunla+ 2, target
+# FIXME: test bunla+ 0, target
+# FIXME: test bun- 2, target
+# FIXME: test bun- 0, target
+# FIXME: test buna- 2, target
+# FIXME: test buna- 0, target
+# FIXME: test bunl- 2, target
+# FIXME: test bunl- 0, target
+# FIXME: test bunla- 2, target
+# FIXME: test bunla- 0, target
+# FIXME: test bnu 2, target
+# FIXME: test bnu 0, target
+# FIXME: test bnua 2, target
+# FIXME: test bnua 0, target
+# FIXME: test bnul 2, target
+# FIXME: test bnul 0, target
+# FIXME: test bnula 2, target
+# FIXME: test bnula 0, target
+# FIXME: test bnu+ 2, target
+# FIXME: test bnu+ 0, target
+# FIXME: test bnua+ 2, target
+# FIXME: test bnua+ 0, target
+# FIXME: test bnul+ 2, target
+# FIXME: test bnul+ 0, target
+# FIXME: test bnula+ 2, target
+# FIXME: test bnula+ 0, target
+# FIXME: test bnu- 2, target
+# FIXME: test bnu- 0, target
+# FIXME: test bnua- 2, target
+# FIXME: test bnua- 0, target
+# FIXME: test bnul- 2, target
+# FIXME: test bnul- 0, target
+# FIXME: test bnula- 2, target
+# FIXME: test bnula- 0, target
+
+# CHECK: creqv 2, 2, 2
+0x4c 0x42 0x12 0x42
+
+# CHECK: crxor 2, 2, 2
+0x4c 0x42 0x11 0x82
+
+# CHECK: cror 2, 3, 3
+0x4c 0x43 0x1b 0x82
+
+# CHECK: crnor 2, 3, 3
+0x4c 0x43 0x18 0x42
+
+# CHECK: addi 2, 3, -128
+0x38 0x43 0xff 0x80
+
+# CHECK: addis 2, 3, -128
+0x3c 0x43 0xff 0x80
+
+# CHECK: addic 2, 3, -128
+0x30 0x43 0xff 0x80
+
+# CHECK: addic. 2, 3, -128
+0x34 0x43 0xff 0x80
+
+# CHECK: subf 2, 4, 3
+0x7c 0x44 0x18 0x50
+
+# CHECK: subf. 2, 4, 3
+0x7c 0x44 0x18 0x51
+
+# CHECK: subfc 2, 4, 3
+0x7c 0x44 0x18 0x10
+
+# CHECK: subfc. 2, 4, 3
+0x7c 0x44 0x18 0x11
+
+# CHECK: cmpdi 2, 3, 128
+0x2d 0x23 0x00 0x80
+
+# CHECK: cmpdi 0, 3, 128
+0x2c 0x23 0x00 0x80
+
+# CHECK: cmpd 2, 3, 4
+0x7d 0x23 0x20 0x00
+
+# CHECK: cmpd 0, 3, 4
+0x7c 0x23 0x20 0x00
+
+# CHECK: cmpldi 2, 3, 128
+0x29 0x23 0x00 0x80
+
+# CHECK: cmpldi 0, 3, 128
+0x28 0x23 0x00 0x80
+
+# CHECK: cmpld 2, 3, 4
+0x7d 0x23 0x20 0x40
+
+# CHECK: cmpld 0, 3, 4
+0x7c 0x23 0x20 0x40
+
+# CHECK: cmpwi 2, 3, 128
+0x2d 0x03 0x00 0x80
+
+# CHECK: cmpwi 0, 3, 128
+0x2c 0x03 0x00 0x80
+
+# CHECK: cmpw 2, 3, 4
+0x7d 0x03 0x20 0x00
+
+# CHECK: cmpw 0, 3, 4
+0x7c 0x03 0x20 0x00
+
+# CHECK: cmplwi 2, 3, 128
+0x29 0x03 0x00 0x80
+
+# CHECK: cmplwi 0, 3, 128
+0x28 0x03 0x00 0x80
+
+# CHECK: cmplw 2, 3, 4
+0x7d 0x03 0x20 0x40
+
+# CHECK: cmplw 0, 3, 4
+0x7c 0x03 0x20 0x40
+
+# CHECK: twi 16, 3, 4
+0x0e 0x03 0x00 0x04
+
+# CHECK: tw 16, 3, 4
+0x7e 0x03 0x20 0x08
+
+# CHECK: tdi 16, 3, 4
+0x0a 0x03 0x00 0x04
+
+# CHECK: td 16, 3, 4
+0x7e 0x03 0x20 0x88
+
+# CHECK: twi 20, 3, 4
+0x0e 0x83 0x00 0x04
+
+# CHECK: tw 20, 3, 4
+0x7e 0x83 0x20 0x08
+
+# CHECK: tdi 20, 3, 4
+0x0a 0x83 0x00 0x04
+
+# CHECK: td 20, 3, 4
+0x7e 0x83 0x20 0x88
+
+# CHECK: twi 4, 3, 4
+0x0c 0x83 0x00 0x04
+
+# CHECK: tw 4, 3, 4
+0x7c 0x83 0x20 0x08
+
+# CHECK: tdi 4, 3, 4
+0x08 0x83 0x00 0x04
+
+# CHECK: td 4, 3, 4
+0x7c 0x83 0x20 0x88
+
+# CHECK: twi 12, 3, 4
+0x0d 0x83 0x00 0x04
+
+# CHECK: tw 12, 3, 4
+0x7d 0x83 0x20 0x08
+
+# CHECK: tdi 12, 3, 4
+0x09 0x83 0x00 0x04
+
+# CHECK: td 12, 3, 4
+0x7d 0x83 0x20 0x88
+
+# CHECK: twi 8, 3, 4
+0x0d 0x03 0x00 0x04
+
+# CHECK: tw 8, 3, 4
+0x7d 0x03 0x20 0x08
+
+# CHECK: tdi 8, 3, 4
+0x09 0x03 0x00 0x04
+
+# CHECK: td 8, 3, 4
+0x7d 0x03 0x20 0x88
+
+# CHECK: twi 12, 3, 4
+0x0d 0x83 0x00 0x04
+
+# CHECK: tw 12, 3, 4
+0x7d 0x83 0x20 0x08
+
+# CHECK: tdi 12, 3, 4
+0x09 0x83 0x00 0x04
+
+# CHECK: td 12, 3, 4
+0x7d 0x83 0x20 0x88
+
+# CHECK: twi 24, 3, 4
+0x0f 0x03 0x00 0x04
+
+# CHECK: tw 24, 3, 4
+0x7f 0x03 0x20 0x08
+
+# CHECK: tdi 24, 3, 4
+0x0b 0x03 0x00 0x04
+
+# CHECK: td 24, 3, 4
+0x7f 0x03 0x20 0x88
+
+# CHECK: twi 20, 3, 4
+0x0e 0x83 0x00 0x04
+
+# CHECK: tw 20, 3, 4
+0x7e 0x83 0x20 0x08
+
+# CHECK: tdi 20, 3, 4
+0x0a 0x83 0x00 0x04
+
+# CHECK: td 20, 3, 4
+0x7e 0x83 0x20 0x88
+
+# CHECK: twi 2, 3, 4
+0x0c 0x43 0x00 0x04
+
+# CHECK: tw 2, 3, 4
+0x7c 0x43 0x20 0x08
+
+# CHECK: tdi 2, 3, 4
+0x08 0x43 0x00 0x04
+
+# CHECK: td 2, 3, 4
+0x7c 0x43 0x20 0x88
+
+# CHECK: twi 6, 3, 4
+0x0c 0xc3 0x00 0x04
+
+# CHECK: tw 6, 3, 4
+0x7c 0xc3 0x20 0x08
+
+# CHECK: tdi 6, 3, 4
+0x08 0xc3 0x00 0x04
+
+# CHECK: td 6, 3, 4
+0x7c 0xc3 0x20 0x88
+
+# CHECK: twi 5, 3, 4
+0x0c 0xa3 0x00 0x04
+
+# CHECK: tw 5, 3, 4
+0x7c 0xa3 0x20 0x08
+
+# CHECK: tdi 5, 3, 4
+0x08 0xa3 0x00 0x04
+
+# CHECK: td 5, 3, 4
+0x7c 0xa3 0x20 0x88
+
+# CHECK: twi 1, 3, 4
+0x0c 0x23 0x00 0x04
+
+# CHECK: tw 1, 3, 4
+0x7c 0x23 0x20 0x08
+
+# CHECK: tdi 1, 3, 4
+0x08 0x23 0x00 0x04
+
+# CHECK: td 1, 3, 4
+0x7c 0x23 0x20 0x88
+
+# CHECK: twi 5, 3, 4
+0x0c 0xa3 0x00 0x04
+
+# CHECK: tw 5, 3, 4
+0x7c 0xa3 0x20 0x08
+
+# CHECK: tdi 5, 3, 4
+0x08 0xa3 0x00 0x04
+
+# CHECK: td 5, 3, 4
+0x7c 0xa3 0x20 0x88
+
+# CHECK: twi 6, 3, 4
+0x0c 0xc3 0x00 0x04
+
+# CHECK: tw 6, 3, 4
+0x7c 0xc3 0x20 0x08
+
+# CHECK: tdi 6, 3, 4
+0x08 0xc3 0x00 0x04
+
+# CHECK: td 6, 3, 4
+0x7c 0xc3 0x20 0x88
+
+# CHECK: twi 31, 3, 4
+0x0f 0xe3 0x00 0x04
+
+# CHECK: tw 31, 3, 4
+0x7f 0xe3 0x20 0x08
+
+# CHECK: tdi 31, 3, 4
+0x0b 0xe3 0x00 0x04
+
+# CHECK: td 31, 3, 4
+0x7f 0xe3 0x20 0x88
+
+# CHECK: trap
+0x7f 0xe0 0x00 0x08
+
+# CHECK: rldicr 2, 3, 5, 3
+0x78 0x62 0x28 0xc4
+
+# CHECK: rldicr. 2, 3, 5, 3
+0x78 0x62 0x28 0xc5
+
+# CHECK: rldicl 2, 3, 9, 60
+0x78 0x62 0x4f 0x20
+
+# CHECK: rldicl. 2, 3, 9, 60
+0x78 0x62 0x4f 0x21
+
+# CHECK: rldimi 2, 3, 55, 5
+0x78 0x62 0xb9 0x4e
+
+# CHECK: rldimi. 2, 3, 55, 5
+0x78 0x62 0xb9 0x4f
+
+# CHECK: rldicl 2, 3, 4, 0
+0x78 0x62 0x20 0x00
+
+# CHECK: rldicl. 2, 3, 4, 0
+0x78 0x62 0x20 0x01
+
+# CHECK: rldicl 2, 3, 60, 0
+0x78 0x62 0xe0 0x02
+
+# CHECK: rldicl. 2, 3, 60, 0
+0x78 0x62 0xe0 0x03
+
+# CHECK: rldcl 2, 3, 4, 0
+0x78 0x62 0x20 0x10
+
+# CHECK: rldcl. 2, 3, 4, 0
+0x78 0x62 0x20 0x11
+
+# CHECK: sldi 2, 3, 4
+0x78 0x62 0x26 0xe4
+
+# CHECK: rldicr. 2, 3, 4, 59
+0x78 0x62 0x26 0xe5
+
+# CHECK: rldicl 2, 3, 60, 4
+0x78 0x62 0xe1 0x02
+
+# CHECK: rldicl. 2, 3, 60, 4
+0x78 0x62 0xe1 0x03
+
+# CHECK: rldicl 2, 3, 0, 4
+0x78 0x62 0x01 0x00
+
+# CHECK: rldicl. 2, 3, 0, 4
+0x78 0x62 0x01 0x01
+
+# CHECK: rldicr 2, 3, 0, 59
+0x78 0x62 0x06 0xe4
+
+# CHECK: rldicr. 2, 3, 0, 59
+0x78 0x62 0x06 0xe5
+
+# CHECK: rldic 2, 3, 4, 1
+0x78 0x62 0x20 0x48
+
+# CHECK: rldic. 2, 3, 4, 1
+0x78 0x62 0x20 0x49
+
+# CHECK: rlwinm 2, 3, 5, 0, 3
+0x54 0x62 0x28 0x06
+
+# CHECK: rlwinm. 2, 3, 5, 0, 3
+0x54 0x62 0x28 0x07
+
+# CHECK: rlwinm 2, 3, 9, 28, 31
+0x54 0x62 0x4f 0x3e
+
+# CHECK: rlwinm. 2, 3, 9, 28, 31
+0x54 0x62 0x4f 0x3f
+
+# CHECK: rlwimi 2, 3, 27, 5, 8
+0x50 0x62 0xd9 0x50
+
+# CHECK: rlwimi. 2, 3, 27, 5, 8
+0x50 0x62 0xd9 0x51
+
+# CHECK: rlwimi 2, 3, 23, 5, 8
+0x50 0x62 0xb9 0x50
+
+# CHECK: rlwimi. 2, 3, 23, 5, 8
+0x50 0x62 0xb9 0x51
+
+# CHECK: rlwinm 2, 3, 4, 0, 31
+0x54 0x62 0x20 0x3e
+
+# CHECK: rlwinm. 2, 3, 4, 0, 31
+0x54 0x62 0x20 0x3f
+
+# CHECK: rlwinm 2, 3, 28, 0, 31
+0x54 0x62 0xe0 0x3e
+
+# CHECK: rlwinm. 2, 3, 28, 0, 31
+0x54 0x62 0xe0 0x3f
+
+# CHECK: rlwnm 2, 3, 4, 0, 31
+0x5c 0x62 0x20 0x3e
+
+# CHECK: rlwnm. 2, 3, 4, 0, 31
+0x5c 0x62 0x20 0x3f
+
+# CHECK: slwi 2, 3, 4
+0x54 0x62 0x20 0x36
+
+# CHECK: rlwinm. 2, 3, 4, 0, 27
+0x54 0x62 0x20 0x37
+
+# CHECK: srwi 2, 3, 4
+0x54 0x62 0xe1 0x3e
+
+# CHECK: rlwinm. 2, 3, 28, 4, 31
+0x54 0x62 0xe1 0x3f
+
+# CHECK: rlwinm 2, 3, 0, 4, 31
+0x54 0x62 0x01 0x3e
+
+# CHECK: rlwinm. 2, 3, 0, 4, 31
+0x54 0x62 0x01 0x3f
+
+# CHECK: rlwinm 2, 3, 0, 0, 27
+0x54 0x62 0x00 0x36
+
+# CHECK: rlwinm. 2, 3, 0, 0, 27
+0x54 0x62 0x00 0x37
+
+# CHECK: rlwinm 2, 3, 4, 1, 27
+0x54 0x62 0x20 0x76
+
+# CHECK: rlwinm. 2, 3, 4, 1, 27
+0x54 0x62 0x20 0x77
+
+# CHECK: mtspr 1, 2
+0x7c 0x41 0x03 0xa6
+
+# CHECK: mfspr 2, 1
+0x7c 0x41 0x02 0xa6
+
+# CHECK: mtlr 2
+0x7c 0x48 0x03 0xa6
+
+# CHECK: mflr 2
+0x7c 0x48 0x02 0xa6
+
+# CHECK: mtctr 2
+0x7c 0x49 0x03 0xa6
+
+# CHECK: mfctr 2
+0x7c 0x49 0x02 0xa6
+
+# CHECK: nop
+0x60 0x00 0x00 0x00
+
+# CHECK: xori 0, 0, 0
+0x68 0x00 0x00 0x00
+
+# CHECK: li 2, 128
+0x38 0x40 0x00 0x80
+
+# CHECK: lis 2, 128
+0x3c 0x40 0x00 0x80
+
+# CHECK: mr 2, 3
+0x7c 0x62 0x1b 0x78
+
+# CHECK: or. 2, 3, 3
+0x7c 0x62 0x1b 0x79
+
+# CHECK: nor 2, 3, 3
+0x7c 0x62 0x18 0xf8
+
+# CHECK: nor. 2, 3, 3
+0x7c 0x62 0x18 0xf9
+
+# CHECK: mtcrf 255, 2
+0x7c 0x4f 0xf1 0x20
+
diff --git a/test/MC/Disassembler/PowerPC/ppc64-encoding-fp.txt b/test/MC/Disassembler/PowerPC/ppc64-encoding-fp.txt
new file mode 100644
index 0000000..1c01c9d
--- /dev/null
+++ b/test/MC/Disassembler/PowerPC/ppc64-encoding-fp.txt
@@ -0,0 +1,329 @@
+# RUN: llvm-mc --disassemble %s -triple powerpc64-unknown-unknown -mcpu=pwr7 | FileCheck %s
+
+# CHECK: lfs 2, 128(4)                   
+0xc0 0x44 0x00 0x80
+
+# CHECK: lfsx 2, 3, 4                    
+0x7c 0x43 0x24 0x2e
+
+# CHECK: lfsu 2, 128(4)                  
+0xc4 0x44 0x00 0x80
+
+# CHECK: lfsux 2, 3, 4                   
+0x7c 0x43 0x24 0x6e
+
+# CHECK: lfd 2, 128(4)                   
+0xc8 0x44 0x00 0x80
+
+# CHECK: lfdx 2, 3, 4                    
+0x7c 0x43 0x24 0xae
+
+# CHECK: lfdu 2, 128(4)                  
+0xcc 0x44 0x00 0x80
+
+# CHECK: lfdux 2, 3, 4                   
+0x7c 0x43 0x24 0xee
+
+# CHECK: lfiwax 2, 3, 4                  
+0x7c 0x43 0x26 0xae
+
+# CHECK: lfiwzx 2, 3, 4                  
+0x7c 0x43 0x26 0xee
+
+# CHECK: stfs 2, 128(4)                  
+0xd0 0x44 0x00 0x80
+
+# CHECK: stfsx 2, 3, 4                   
+0x7c 0x43 0x25 0x2e
+
+# CHECK: stfsu 2, 128(4)                 
+0xd4 0x44 0x00 0x80
+
+# CHECK: stfsux 2, 3, 4                  
+0x7c 0x43 0x25 0x6e
+
+# CHECK: stfd 2, 128(4)                  
+0xd8 0x44 0x00 0x80
+
+# CHECK: stfdx 2, 3, 4                   
+0x7c 0x43 0x25 0xae
+
+# CHECK: stfdu 2, 128(4)                 
+0xdc 0x44 0x00 0x80
+
+# CHECK: stfdux 2, 3, 4                  
+0x7c 0x43 0x25 0xee
+
+# CHECK: stfiwx 2, 3, 4                  
+0x7c 0x43 0x27 0xae
+
+# CHECK: fmr 2, 3                        
+0xfc 0x40 0x18 0x90
+
+# CHECK: fmr. 2, 3                       
+0xfc 0x40 0x18 0x91
+
+# CHECK: fneg 2, 3                       
+0xfc 0x40 0x18 0x50
+
+# CHECK: fneg. 2, 3                      
+0xfc 0x40 0x18 0x51
+
+# CHECK: fabs 2, 3                       
+0xfc 0x40 0x1a 0x10
+
+# CHECK: fabs. 2, 3                      
+0xfc 0x40 0x1a 0x11
+
+# CHECK: fnabs 2, 3                      
+0xfc 0x40 0x19 0x10
+
+# CHECK: fnabs. 2, 3                     
+0xfc 0x40 0x19 0x11
+
+# CHECK: fcpsgn 2, 3, 4                  
+0xfc 0x43 0x20 0x10
+
+# CHECK: fcpsgn. 2, 3, 4                 
+0xfc 0x43 0x20 0x11
+
+# CHECK: fadd 2, 3, 4                    
+0xfc 0x43 0x20 0x2a
+
+# CHECK: fadd. 2, 3, 4                   
+0xfc 0x43 0x20 0x2b
+
+# CHECK: fadds 2, 3, 4                   
+0xec 0x43 0x20 0x2a
+
+# CHECK: fadds. 2, 3, 4                  
+0xec 0x43 0x20 0x2b
+
+# CHECK: fsub 2, 3, 4                    
+0xfc 0x43 0x20 0x28
+
+# CHECK: fsub. 2, 3, 4                   
+0xfc 0x43 0x20 0x29
+
+# CHECK: fsubs 2, 3, 4                   
+0xec 0x43 0x20 0x28
+
+# CHECK: fsubs. 2, 3, 4                  
+0xec 0x43 0x20 0x29
+
+# CHECK: fmul 2, 3, 4                    
+0xfc 0x43 0x01 0x32
+
+# CHECK: fmul. 2, 3, 4                   
+0xfc 0x43 0x01 0x33
+
+# CHECK: fmuls 2, 3, 4                   
+0xec 0x43 0x01 0x32
+
+# CHECK: fmuls. 2, 3, 4                  
+0xec 0x43 0x01 0x33
+
+# CHECK: fdiv 2, 3, 4                    
+0xfc 0x43 0x20 0x24
+
+# CHECK: fdiv. 2, 3, 4                   
+0xfc 0x43 0x20 0x25
+
+# CHECK: fdivs 2, 3, 4                   
+0xec 0x43 0x20 0x24
+
+# CHECK: fdivs. 2, 3, 4                  
+0xec 0x43 0x20 0x25
+
+# CHECK: fsqrt 2, 3                      
+0xfc 0x40 0x18 0x2c
+
+# CHECK: fsqrt. 2, 3                     
+0xfc 0x40 0x18 0x2d
+
+# CHECK: fsqrts 2, 3                     
+0xec 0x40 0x18 0x2c
+
+# CHECK: fsqrts. 2, 3                    
+0xec 0x40 0x18 0x2d
+
+# CHECK: fre 2, 3                        
+0xfc 0x40 0x18 0x30
+
+# CHECK: fre. 2, 3                       
+0xfc 0x40 0x18 0x31
+
+# CHECK: fres 2, 3                       
+0xec 0x40 0x18 0x30
+
+# CHECK: fres. 2, 3                      
+0xec 0x40 0x18 0x31
+
+# CHECK: frsqrte 2, 3                    
+0xfc 0x40 0x18 0x34
+
+# CHECK: frsqrte. 2, 3                   
+0xfc 0x40 0x18 0x35
+
+# CHECK: frsqrtes 2, 3                   
+0xec 0x40 0x18 0x34
+
+# CHECK: frsqrtes. 2, 3                  
+0xec 0x40 0x18 0x35
+
+# CHECK: fmadd 2, 3, 4, 5                
+0xfc 0x43 0x29 0x3a
+
+# CHECK: fmadd. 2, 3, 4, 5               
+0xfc 0x43 0x29 0x3b
+
+# CHECK: fmadds 2, 3, 4, 5               
+0xec 0x43 0x29 0x3a
+
+# CHECK: fmadds. 2, 3, 4, 5              
+0xec 0x43 0x29 0x3b
+
+# CHECK: fmsub 2, 3, 4, 5                
+0xfc 0x43 0x29 0x38
+
+# CHECK: fmsub. 2, 3, 4, 5               
+0xfc 0x43 0x29 0x39
+
+# CHECK: fmsubs 2, 3, 4, 5               
+0xec 0x43 0x29 0x38
+
+# CHECK: fmsubs. 2, 3, 4, 5              
+0xec 0x43 0x29 0x39
+
+# CHECK: fnmadd 2, 3, 4, 5               
+0xfc 0x43 0x29 0x3e
+
+# CHECK: fnmadd. 2, 3, 4, 5              
+0xfc 0x43 0x29 0x3f
+
+# CHECK: fnmadds 2, 3, 4, 5              
+0xec 0x43 0x29 0x3e
+
+# CHECK: fnmadds. 2, 3, 4, 5             
+0xec 0x43 0x29 0x3f
+
+# CHECK: fnmsub 2, 3, 4, 5               
+0xfc 0x43 0x29 0x3c
+
+# CHECK: fnmsub. 2, 3, 4, 5              
+0xfc 0x43 0x29 0x3d
+
+# CHECK: fnmsubs 2, 3, 4, 5              
+0xec 0x43 0x29 0x3c
+
+# CHECK: fnmsubs. 2, 3, 4, 5             
+0xec 0x43 0x29 0x3d
+
+# CHECK: frsp 2, 3                       
+0xfc 0x40 0x18 0x18
+
+# CHECK: frsp. 2, 3                      
+0xfc 0x40 0x18 0x19
+
+# CHECK: fctid 2, 3                      
+0xfc 0x40 0x1e 0x5c
+
+# CHECK: fctid. 2, 3                     
+0xfc 0x40 0x1e 0x5d
+
+# CHECK: fctidz 2, 3                     
+0xfc 0x40 0x1e 0x5e
+
+# CHECK: fctidz. 2, 3                    
+0xfc 0x40 0x1e 0x5f
+
+# CHECK: fctiduz 2, 3                    
+0xfc 0x40 0x1f 0x5e
+
+# CHECK: fctiduz. 2, 3                   
+0xfc 0x40 0x1f 0x5f
+
+# CHECK: fctiw 2, 3                      
+0xfc 0x40 0x18 0x1c
+
+# CHECK: fctiw. 2, 3                     
+0xfc 0x40 0x18 0x1d
+
+# CHECK: fctiwz 2, 3                     
+0xfc 0x40 0x18 0x1e
+
+# CHECK: fctiwz. 2, 3                    
+0xfc 0x40 0x18 0x1f
+
+# CHECK: fctiwuz 2, 3                    
+0xfc 0x40 0x19 0x1e
+
+# CHECK: fctiwuz. 2, 3                   
+0xfc 0x40 0x19 0x1f
+
+# CHECK: fcfid 2, 3                      
+0xfc 0x40 0x1e 0x9c
+
+# CHECK: fcfid. 2, 3                     
+0xfc 0x40 0x1e 0x9d
+
+# CHECK: fcfidu 2, 3                     
+0xfc 0x40 0x1f 0x9c
+
+# CHECK: fcfidu. 2, 3                    
+0xfc 0x40 0x1f 0x9d
+
+# CHECK: fcfids 2, 3                     
+0xec 0x40 0x1e 0x9c
+
+# CHECK: fcfids. 2, 3                    
+0xec 0x40 0x1e 0x9d
+
+# CHECK: fcfidus 2, 3                    
+0xec 0x40 0x1f 0x9c
+
+# CHECK: fcfidus. 2, 3                   
+0xec 0x40 0x1f 0x9d
+
+# CHECK: frin 2, 3                       
+0xfc 0x40 0x1b 0x10
+
+# CHECK: frin. 2, 3                      
+0xfc 0x40 0x1b 0x11
+
+# CHECK: frip 2, 3                       
+0xfc 0x40 0x1b 0x90
+
+# CHECK: frip. 2, 3                      
+0xfc 0x40 0x1b 0x91
+
+# CHECK: friz 2, 3                       
+0xfc 0x40 0x1b 0x50
+
+# CHECK: friz. 2, 3                      
+0xfc 0x40 0x1b 0x51
+
+# CHECK: frim 2, 3                       
+0xfc 0x40 0x1b 0xd0
+
+# CHECK: frim. 2, 3                      
+0xfc 0x40 0x1b 0xd1
+
+# CHECK: fcmpu 2, 3, 4                   
+0xfd 0x03 0x20 0x00
+
+# CHECK: fsel 2, 3, 4, 5                 
+0xfc 0x43 0x29 0x2e
+
+# CHECK: fsel. 2, 3, 4, 5                
+0xfc 0x43 0x29 0x2f
+
+# CHECK: mffs 2                          
+0xfc 0x40 0x04 0x8e
+
+# CHECK: mtfsb0 31                       
+0xff 0xe0 0x00 0x8c
+
+# CHECK: mtfsb1 31                       
+0xff 0xe0 0x00 0x4c
+
diff --git a/test/MC/Disassembler/PowerPC/ppc64-encoding-vmx.txt b/test/MC/Disassembler/PowerPC/ppc64-encoding-vmx.txt
new file mode 100644
index 0000000..3896bf7
--- /dev/null
+++ b/test/MC/Disassembler/PowerPC/ppc64-encoding-vmx.txt
@@ -0,0 +1,509 @@
+# RUN: llvm-mc --disassemble %s -triple powerpc64-unknown-unknown -mcpu=pwr7 | FileCheck %s
+
+# CHECK: lvebx 2, 3, 4                   
+0x7c 0x43 0x20 0x0e
+
+# CHECK: lvehx 2, 3, 4                   
+0x7c 0x43 0x20 0x4e
+
+# CHECK: lvewx 2, 3, 4                   
+0x7c 0x43 0x20 0x8e
+
+# CHECK: lvx 2, 3, 4                     
+0x7c 0x43 0x20 0xce
+
+# CHECK: lvxl 2, 3, 4                    
+0x7c 0x43 0x22 0xce
+
+# CHECK: stvebx 2, 3, 4                  
+0x7c 0x43 0x21 0x0e
+
+# CHECK: stvehx 2, 3, 4                  
+0x7c 0x43 0x21 0x4e
+
+# CHECK: stvewx 2, 3, 4                  
+0x7c 0x43 0x21 0x8e
+
+# CHECK: stvx 2, 3, 4                    
+0x7c 0x43 0x21 0xce
+
+# CHECK: stvxl 2, 3, 4                   
+0x7c 0x43 0x23 0xce
+
+# CHECK: lvsl 2, 3, 4                    
+0x7c 0x43 0x20 0x0c
+
+# CHECK: lvsr 2, 3, 4                    
+0x7c 0x43 0x20 0x4c
+
+# CHECK: vpkpx 2, 3, 4                   
+0x10 0x43 0x23 0x0e
+
+# CHECK: vpkshss 2, 3, 4                 
+0x10 0x43 0x21 0x8e
+
+# CHECK: vpkshus 2, 3, 4                 
+0x10 0x43 0x21 0x0e
+
+# CHECK: vpkswss 2, 3, 4                 
+0x10 0x43 0x21 0xce
+
+# CHECK: vpkswus 2, 3, 4                 
+0x10 0x43 0x21 0x4e
+
+# CHECK: vpkuhum 2, 3, 4                 
+0x10 0x43 0x20 0x0e
+
+# CHECK: vpkuhus 2, 3, 4                 
+0x10 0x43 0x20 0x8e
+
+# CHECK: vpkuwum 2, 3, 4                 
+0x10 0x43 0x20 0x4e
+
+# CHECK: vpkuwus 2, 3, 4                 
+0x10 0x43 0x20 0xce
+
+# CHECK: vupkhpx 2, 3                    
+0x10 0x40 0x1b 0x4e
+
+# CHECK: vupkhsb 2, 3                    
+0x10 0x40 0x1a 0x0e
+
+# CHECK: vupkhsh 2, 3                    
+0x10 0x40 0x1a 0x4e
+
+# CHECK: vupklpx 2, 3                    
+0x10 0x40 0x1b 0xce
+
+# CHECK: vupklsb 2, 3                    
+0x10 0x40 0x1a 0x8e
+
+# CHECK: vupklsh 2, 3                    
+0x10 0x40 0x1a 0xce
+
+# CHECK: vmrghb 2, 3, 4                  
+0x10 0x43 0x20 0x0c
+
+# CHECK: vmrghh 2, 3, 4                  
+0x10 0x43 0x20 0x4c
+
+# CHECK: vmrghw 2, 3, 4                  
+0x10 0x43 0x20 0x8c
+
+# CHECK: vmrglb 2, 3, 4                  
+0x10 0x43 0x21 0x0c
+
+# CHECK: vmrglh 2, 3, 4                  
+0x10 0x43 0x21 0x4c
+
+# CHECK: vmrglw 2, 3, 4                  
+0x10 0x43 0x21 0x8c
+
+# CHECK: vspltb 2, 3, 1                  
+0x10 0x41 0x1a 0x0c
+
+# CHECK: vsplth 2, 3, 1                  
+0x10 0x41 0x1a 0x4c
+
+# CHECK: vspltw 2, 3, 1                  
+0x10 0x41 0x1a 0x8c
+
+# CHECK: vspltisb 2, 3                   
+0x10 0x43 0x03 0x0c
+
+# CHECK: vspltish 2, 3                   
+0x10 0x43 0x03 0x4c
+
+# CHECK: vspltisw 2, 3                   
+0x10 0x43 0x03 0x8c
+
+# CHECK: vperm 2, 3, 4, 5                
+0x10 0x43 0x21 0x6b
+
+# CHECK: vsel 2, 3, 4, 5                 
+0x10 0x43 0x21 0x6a
+
+# CHECK: vsl 2, 3, 4                     
+0x10 0x43 0x21 0xc4
+
+# CHECK: vsldoi 2, 3, 4, 5               
+0x10 0x43 0x21 0x6c
+
+# CHECK: vslo 2, 3, 4                    
+0x10 0x43 0x24 0x0c
+
+# CHECK: vsr 2, 3, 4                     
+0x10 0x43 0x22 0xc4
+
+# CHECK: vsro 2, 3, 4                    
+0x10 0x43 0x24 0x4c
+
+# CHECK: vaddcuw 2, 3, 4                 
+0x10 0x43 0x21 0x80
+
+# CHECK: vaddsbs 2, 3, 4                 
+0x10 0x43 0x23 0x00
+
+# CHECK: vaddshs 2, 3, 4                 
+0x10 0x43 0x23 0x40
+
+# CHECK: vaddsws 2, 3, 4                 
+0x10 0x43 0x23 0x80
+
+# CHECK: vaddubm 2, 3, 4                 
+0x10 0x43 0x20 0x00
+
+# CHECK: vadduhm 2, 3, 4                 
+0x10 0x43 0x20 0x40
+
+# CHECK: vadduwm 2, 3, 4                 
+0x10 0x43 0x20 0x80
+
+# CHECK: vaddubs 2, 3, 4                 
+0x10 0x43 0x22 0x00
+
+# CHECK: vadduhs 2, 3, 4                 
+0x10 0x43 0x22 0x40
+
+# CHECK: vadduws 2, 3, 4                 
+0x10 0x43 0x22 0x80
+
+# CHECK: vsubcuw 2, 3, 4                 
+0x10 0x43 0x25 0x80
+
+# CHECK: vsubsbs 2, 3, 4                 
+0x10 0x43 0x27 0x00
+
+# CHECK: vsubshs 2, 3, 4                 
+0x10 0x43 0x27 0x40
+
+# CHECK: vsubsws 2, 3, 4                 
+0x10 0x43 0x27 0x80
+
+# CHECK: vsububm 2, 3, 4                 
+0x10 0x43 0x24 0x00
+
+# CHECK: vsubuhm 2, 3, 4                 
+0x10 0x43 0x24 0x40
+
+# CHECK: vsubuwm 2, 3, 4                 
+0x10 0x43 0x24 0x80
+
+# CHECK: vsububs 2, 3, 4                 
+0x10 0x43 0x26 0x00
+
+# CHECK: vsubuhs 2, 3, 4                 
+0x10 0x43 0x26 0x40
+
+# CHECK: vsubuws 2, 3, 4                 
+0x10 0x43 0x26 0x80
+
+# CHECK: vmulesb 2, 3, 4                 
+0x10 0x43 0x23 0x08
+
+# CHECK: vmulesh 2, 3, 4                 
+0x10 0x43 0x23 0x48
+
+# CHECK: vmuleub 2, 3, 4                 
+0x10 0x43 0x22 0x08
+
+# CHECK: vmuleuh 2, 3, 4                 
+0x10 0x43 0x22 0x48
+
+# CHECK: vmulosb 2, 3, 4                 
+0x10 0x43 0x21 0x08
+
+# CHECK: vmulosh 2, 3, 4                 
+0x10 0x43 0x21 0x48
+
+# CHECK: vmuloub 2, 3, 4                 
+0x10 0x43 0x20 0x08
+
+# CHECK: vmulouh 2, 3, 4                 
+0x10 0x43 0x20 0x48
+
+# CHECK: vmhaddshs 2, 3, 4, 5            
+0x10 0x43 0x21 0x60
+
+# CHECK: vmhraddshs 2, 3, 4, 5           
+0x10 0x43 0x21 0x61
+
+# CHECK: vmladduhm 2, 3, 4, 5            
+0x10 0x43 0x21 0x62
+
+# CHECK: vmsumubm 2, 3, 4, 5             
+0x10 0x43 0x21 0x64
+
+# CHECK: vmsummbm 2, 3, 4, 5             
+0x10 0x43 0x21 0x65
+
+# CHECK: vmsumshm 2, 3, 4, 5             
+0x10 0x43 0x21 0x68
+
+# CHECK: vmsumshs 2, 3, 4, 5             
+0x10 0x43 0x21 0x69
+
+# CHECK: vmsumuhm 2, 3, 4, 5             
+0x10 0x43 0x21 0x66
+
+# CHECK: vmsumuhs 2, 3, 4, 5             
+0x10 0x43 0x21 0x67
+
+# CHECK: vsumsws 2, 3, 4                 
+0x10 0x43 0x27 0x88
+
+# CHECK: vsum2sws 2, 3, 4                
+0x10 0x43 0x26 0x88
+
+# CHECK: vsum4sbs 2, 3, 4                
+0x10 0x43 0x27 0x08
+
+# CHECK: vsum4shs 2, 3, 4                
+0x10 0x43 0x26 0x48
+
+# CHECK: vsum4ubs 2, 3, 4                
+0x10 0x43 0x26 0x08
+
+# CHECK: vavgsb 2, 3, 4                  
+0x10 0x43 0x25 0x02
+
+# CHECK: vavgsh 2, 3, 4                  
+0x10 0x43 0x25 0x42
+
+# CHECK: vavgsw 2, 3, 4                  
+0x10 0x43 0x25 0x82
+
+# CHECK: vavgub 2, 3, 4                  
+0x10 0x43 0x24 0x02
+
+# CHECK: vavguh 2, 3, 4                  
+0x10 0x43 0x24 0x42
+
+# CHECK: vavguw 2, 3, 4                  
+0x10 0x43 0x24 0x82
+
+# CHECK: vmaxsb 2, 3, 4                  
+0x10 0x43 0x21 0x02
+
+# CHECK: vmaxsh 2, 3, 4                  
+0x10 0x43 0x21 0x42
+
+# CHECK: vmaxsw 2, 3, 4                  
+0x10 0x43 0x21 0x82
+
+# CHECK: vmaxub 2, 3, 4                  
+0x10 0x43 0x20 0x02
+
+# CHECK: vmaxuh 2, 3, 4                  
+0x10 0x43 0x20 0x42
+
+# CHECK: vmaxuw 2, 3, 4                  
+0x10 0x43 0x20 0x82
+
+# CHECK: vminsb 2, 3, 4                  
+0x10 0x43 0x23 0x02
+
+# CHECK: vminsh 2, 3, 4                  
+0x10 0x43 0x23 0x42
+
+# CHECK: vminsw 2, 3, 4                  
+0x10 0x43 0x23 0x82
+
+# CHECK: vminub 2, 3, 4                  
+0x10 0x43 0x22 0x02
+
+# CHECK: vminuh 2, 3, 4                  
+0x10 0x43 0x22 0x42
+
+# CHECK: vminuw 2, 3, 4                  
+0x10 0x43 0x22 0x82
+
+# CHECK: vcmpequb 2, 3, 4                
+0x10 0x43 0x20 0x06
+
+# CHECK: vcmpequb. 2, 3, 4               
+0x10 0x43 0x24 0x06
+
+# CHECK: vcmpequh 2, 3, 4                
+0x10 0x43 0x20 0x46
+
+# CHECK: vcmpequh. 2, 3, 4               
+0x10 0x43 0x24 0x46
+
+# CHECK: vcmpequw 2, 3, 4                
+0x10 0x43 0x20 0x86
+
+# CHECK: vcmpequw. 2, 3, 4               
+0x10 0x43 0x24 0x86
+
+# CHECK: vcmpgtsb 2, 3, 4                
+0x10 0x43 0x23 0x06
+
+# CHECK: vcmpgtsb. 2, 3, 4               
+0x10 0x43 0x27 0x06
+
+# CHECK: vcmpgtsh 2, 3, 4                
+0x10 0x43 0x23 0x46
+
+# CHECK: vcmpgtsh. 2, 3, 4               
+0x10 0x43 0x27 0x46
+
+# CHECK: vcmpgtsw 2, 3, 4                
+0x10 0x43 0x23 0x86
+
+# CHECK: vcmpgtsw. 2, 3, 4               
+0x10 0x43 0x27 0x86
+
+# CHECK: vcmpgtub 2, 3, 4                
+0x10 0x43 0x22 0x06
+
+# CHECK: vcmpgtub. 2, 3, 4               
+0x10 0x43 0x26 0x06
+
+# CHECK: vcmpgtuh 2, 3, 4                
+0x10 0x43 0x22 0x46
+
+# CHECK: vcmpgtuh. 2, 3, 4               
+0x10 0x43 0x26 0x46
+
+# CHECK: vcmpgtuw 2, 3, 4                
+0x10 0x43 0x22 0x86
+
+# CHECK: vcmpgtuw. 2, 3, 4               
+0x10 0x43 0x26 0x86
+
+# CHECK: vand 2, 3, 4                    
+0x10 0x43 0x24 0x04
+
+# CHECK: vandc 2, 3, 4                   
+0x10 0x43 0x24 0x44
+
+# CHECK: vnor 2, 3, 4                    
+0x10 0x43 0x25 0x04
+
+# CHECK: vor 2, 3, 4                     
+0x10 0x43 0x24 0x84
+
+# CHECK: vxor 2, 3, 4                    
+0x10 0x43 0x24 0xc4
+
+# CHECK: vrlb 2, 3, 4                    
+0x10 0x43 0x20 0x04
+
+# CHECK: vrlh 2, 3, 4                    
+0x10 0x43 0x20 0x44
+
+# CHECK: vrlw 2, 3, 4                    
+0x10 0x43 0x20 0x84
+
+# CHECK: vslb 2, 3, 4                    
+0x10 0x43 0x21 0x04
+
+# CHECK: vslh 2, 3, 4                    
+0x10 0x43 0x21 0x44
+
+# CHECK: vslw 2, 3, 4                    
+0x10 0x43 0x21 0x84
+
+# CHECK: vsrb 2, 3, 4                    
+0x10 0x43 0x22 0x04
+
+# CHECK: vsrh 2, 3, 4                    
+0x10 0x43 0x22 0x44
+
+# CHECK: vsrw 2, 3, 4                    
+0x10 0x43 0x22 0x84
+
+# CHECK: vsrab 2, 3, 4                   
+0x10 0x43 0x23 0x04
+
+# CHECK: vsrah 2, 3, 4                   
+0x10 0x43 0x23 0x44
+
+# CHECK: vsraw 2, 3, 4                   
+0x10 0x43 0x23 0x84
+
+# CHECK: vaddfp 2, 3, 4                  
+0x10 0x43 0x20 0x0a
+
+# CHECK: vsubfp 2, 3, 4                  
+0x10 0x43 0x20 0x4a
+
+# CHECK: vmaddfp 2, 3, 4, 5              
+0x10 0x43 0x29 0x2e
+
+# CHECK: vnmsubfp 2, 3, 4, 5             
+0x10 0x43 0x29 0x2f
+
+# CHECK: vmaxfp 2, 3, 4                  
+0x10 0x43 0x24 0x0a
+
+# CHECK: vminfp 2, 3, 4                  
+0x10 0x43 0x24 0x4a
+
+# CHECK: vctsxs 2, 3, 4                  
+0x10 0x44 0x1b 0xca
+
+# CHECK: vctuxs 2, 3, 4                  
+0x10 0x44 0x1b 0x8a
+
+# CHECK: vcfsx 2, 3, 4                   
+0x10 0x44 0x1b 0x4a
+
+# CHECK: vcfux 2, 3, 4                   
+0x10 0x44 0x1b 0x0a
+
+# CHECK: vrfim 2, 3                      
+0x10 0x40 0x1a 0xca
+
+# CHECK: vrfin 2, 3                      
+0x10 0x40 0x1a 0x0a
+
+# CHECK: vrfip 2, 3                      
+0x10 0x40 0x1a 0x8a
+
+# CHECK: vrfiz 2, 3                      
+0x10 0x40 0x1a 0x4a
+
+# CHECK: vcmpbfp 2, 3, 4                 
+0x10 0x43 0x23 0xc6
+
+# CHECK: vcmpbfp. 2, 3, 4                
+0x10 0x43 0x27 0xc6
+
+# CHECK: vcmpeqfp 2, 3, 4                
+0x10 0x43 0x20 0xc6
+
+# CHECK: vcmpeqfp. 2, 3, 4               
+0x10 0x43 0x24 0xc6
+
+# CHECK: vcmpgefp 2, 3, 4                
+0x10 0x43 0x21 0xc6
+
+# CHECK: vcmpgefp. 2, 3, 4               
+0x10 0x43 0x25 0xc6
+
+# CHECK: vcmpgtfp 2, 3, 4                
+0x10 0x43 0x22 0xc6
+
+# CHECK: vcmpgtfp. 2, 3, 4               
+0x10 0x43 0x26 0xc6
+
+# CHECK: vexptefp 2, 3                   
+0x10 0x40 0x19 0x8a
+
+# CHECK: vlogefp 2, 3                    
+0x10 0x40 0x19 0xca
+
+# CHECK: vrefp 2, 3                      
+0x10 0x40 0x19 0x0a
+
+# CHECK: vrsqrtefp 2, 3                  
+0x10 0x40 0x19 0x4a
+
+# CHECK: mtvscr 2                        
+0x10 0x00 0x16 0x44
+
+# CHECK: mfvscr 2                        
+0x10 0x40 0x06 0x04
+
diff --git a/test/MC/Disassembler/PowerPC/ppc64-encoding.txt b/test/MC/Disassembler/PowerPC/ppc64-encoding.txt
new file mode 100644
index 0000000..33a8c0e
--- /dev/null
+++ b/test/MC/Disassembler/PowerPC/ppc64-encoding.txt
@@ -0,0 +1,621 @@
+# RUN: llvm-mc --disassemble %s -triple powerpc64-unknown-unknown -mcpu=pwr7 | FileCheck %s
+
+# FIXME: test b target                        
+
+# FIXME: test ba target                       
+
+# FIXME: test bl target                       
+
+# FIXME: test bla target                      
+
+# FIXME: test bc 4, 10, target                
+
+# FIXME: test bca 4, 10, target               
+
+# FIXME: test bcl 4, 10, target               
+
+# FIXME: test bcla 4, 10, target              
+
+# CHECK: bclr 4, 10, 3                   
+0x4c 0x8a 0x18 0x20
+
+# CHECK: bclr 4, 10, 0                   
+0x4c 0x8a 0x00 0x20
+
+# CHECK: bclrl 4, 10, 3                  
+0x4c 0x8a 0x18 0x21
+
+# CHECK: bclrl 4, 10, 0                  
+0x4c 0x8a 0x00 0x21
+
+# CHECK: bcctr 4, 10, 3                  
+0x4c 0x8a 0x1c 0x20
+
+# CHECK: bcctr 4, 10, 0                  
+0x4c 0x8a 0x04 0x20
+
+# CHECK: bcctrl 4, 10, 3                 
+0x4c 0x8a 0x1c 0x21
+
+# CHECK: bcctrl 4, 10, 0                 
+0x4c 0x8a 0x04 0x21
+
+# CHECK: crand 2, 3, 4                   
+0x4c 0x43 0x22 0x02
+
+# CHECK: crnand 2, 3, 4                  
+0x4c 0x43 0x21 0xc2
+
+# CHECK: cror 2, 3, 4                    
+0x4c 0x43 0x23 0x82
+
+# CHECK: crxor 2, 3, 4                   
+0x4c 0x43 0x21 0x82
+
+# CHECK: crnor 2, 3, 4                   
+0x4c 0x43 0x20 0x42
+
+# CHECK: creqv 2, 3, 4                   
+0x4c 0x43 0x22 0x42
+
+# CHECK: crandc 2, 3, 4                  
+0x4c 0x43 0x21 0x02
+
+# CHECK: crorc 2, 3, 4                   
+0x4c 0x43 0x23 0x42
+
+# CHECK: mcrf 2, 3                       
+0x4d 0x0c 0x00 0x00
+
+# CHECK: sc 1                            
+0x44 0x00 0x00 0x22
+
+# CHECK: sc 0                            
+0x44 0x00 0x00 0x02
+
+# CHECK: lbz 2, 128(4)                   
+0x88 0x44 0x00 0x80
+
+# CHECK: lbzx 2, 3, 4                    
+0x7c 0x43 0x20 0xae
+
+# CHECK: lbzu 2, 128(4)                  
+0x8c 0x44 0x00 0x80
+
+# CHECK: lbzux 2, 3, 4                   
+0x7c 0x43 0x20 0xee
+
+# CHECK: lhz 2, 128(4)                   
+0xa0 0x44 0x00 0x80
+
+# CHECK: lhzx 2, 3, 4                    
+0x7c 0x43 0x22 0x2e
+
+# CHECK: lhzu 2, 128(4)                  
+0xa4 0x44 0x00 0x80
+
+# CHECK: lhzux 2, 3, 4                   
+0x7c 0x43 0x22 0x6e
+
+# CHECK: lha 2, 128(4)                   
+0xa8 0x44 0x00 0x80
+
+# CHECK: lhax 2, 3, 4                    
+0x7c 0x43 0x22 0xae
+
+# CHECK: lhau 2, 128(4)                  
+0xac 0x44 0x00 0x80
+
+# CHECK: lhaux 2, 3, 4                   
+0x7c 0x43 0x22 0xee
+
+# CHECK: lwz 2, 128(4)                   
+0x80 0x44 0x00 0x80
+
+# CHECK: lwzx 2, 3, 4                    
+0x7c 0x43 0x20 0x2e
+
+# CHECK: lwzu 2, 128(4)                  
+0x84 0x44 0x00 0x80
+
+# CHECK: lwzux 2, 3, 4                   
+0x7c 0x43 0x20 0x6e
+
+# CHECK: lwa 2, 128(4)                   
+0xe8 0x44 0x00 0x82
+
+# CHECK: lwax 2, 3, 4                    
+0x7c 0x43 0x22 0xaa
+
+# CHECK: lwaux 2, 3, 4                   
+0x7c 0x43 0x22 0xea
+
+# CHECK: ld 2, 128(4)                    
+0xe8 0x44 0x00 0x80
+
+# CHECK: ldx 2, 3, 4                     
+0x7c 0x43 0x20 0x2a
+
+# CHECK: ldu 2, 128(4)                   
+0xe8 0x44 0x00 0x81
+
+# CHECK: ldux 2, 3, 4                    
+0x7c 0x43 0x20 0x6a
+
+# CHECK: stb 2, 128(4)                   
+0x98 0x44 0x00 0x80
+
+# CHECK: stbx 2, 3, 4                    
+0x7c 0x43 0x21 0xae
+
+# CHECK: stbu 2, 128(4)                  
+0x9c 0x44 0x00 0x80
+
+# CHECK: stbux 2, 3, 4                   
+0x7c 0x43 0x21 0xee
+
+# CHECK: sth 2, 128(4)                   
+0xb0 0x44 0x00 0x80
+
+# CHECK: sthx 2, 3, 4                    
+0x7c 0x43 0x23 0x2e
+
+# CHECK: sthu 2, 128(4)                  
+0xb4 0x44 0x00 0x80
+
+# CHECK: sthux 2, 3, 4                   
+0x7c 0x43 0x23 0x6e
+
+# CHECK: stw 2, 128(4)                   
+0x90 0x44 0x00 0x80
+
+# CHECK: stwx 2, 3, 4                    
+0x7c 0x43 0x21 0x2e
+
+# CHECK: stwu 2, 128(4)                  
+0x94 0x44 0x00 0x80
+
+# CHECK: stwux 2, 3, 4                   
+0x7c 0x43 0x21 0x6e
+
+# CHECK: std 2, 128(4)                   
+0xf8 0x44 0x00 0x80
+
+# CHECK: stdx 2, 3, 4                    
+0x7c 0x43 0x21 0x2a
+
+# CHECK: stdu 2, 128(4)                  
+0xf8 0x44 0x00 0x81
+
+# CHECK: stdux 2, 3, 4                   
+0x7c 0x43 0x21 0x6a
+
+# CHECK: lhbrx 2, 3, 4                   
+0x7c 0x43 0x26 0x2c
+
+# CHECK: sthbrx 2, 3, 4                  
+0x7c 0x43 0x27 0x2c
+
+# CHECK: lwbrx 2, 3, 4                   
+0x7c 0x43 0x24 0x2c
+
+# CHECK: stwbrx 2, 3, 4                  
+0x7c 0x43 0x25 0x2c
+
+# CHECK: ldbrx 2, 3, 4                   
+0x7c 0x43 0x24 0x28
+
+# CHECK: stdbrx 2, 3, 4                  
+0x7c 0x43 0x25 0x28
+
+# CHECK: lmw 2, 128(1)                   
+0xb8 0x41 0x00 0x80
+
+# CHECK: stmw 2, 128(1)                  
+0xbc 0x41 0x00 0x80
+
+# CHECK: addi 2, 3, 128                  
+0x38 0x43 0x00 0x80
+
+# CHECK: addis 2, 3, 128                 
+0x3c 0x43 0x00 0x80
+
+# CHECK: add 2, 3, 4                     
+0x7c 0x43 0x22 0x14
+
+# CHECK: add. 2, 3, 4                    
+0x7c 0x43 0x22 0x15
+
+# CHECK: subf 2, 3, 4                    
+0x7c 0x43 0x20 0x50
+
+# CHECK: subf. 2, 3, 4                   
+0x7c 0x43 0x20 0x51
+
+# CHECK: addic 2, 3, 128                 
+0x30 0x43 0x00 0x80
+
+# CHECK: addic. 2, 3, 128                
+0x34 0x43 0x00 0x80
+
+# CHECK: subfic 2, 3, 4                  
+0x20 0x43 0x00 0x04
+
+# CHECK: addc 2, 3, 4                    
+0x7c 0x43 0x20 0x14
+
+# CHECK: addc. 2, 3, 4                   
+0x7c 0x43 0x20 0x15
+
+# CHECK: subfc 2, 3, 4                   
+0x7c 0x43 0x20 0x10
+
+# CHECK: subfc 2, 3, 4                   
+0x7c 0x43 0x20 0x10
+
+# CHECK: adde 2, 3, 4                    
+0x7c 0x43 0x21 0x14
+
+# CHECK: adde. 2, 3, 4                   
+0x7c 0x43 0x21 0x15
+
+# CHECK: subfe 2, 3, 4                   
+0x7c 0x43 0x21 0x10
+
+# CHECK: subfe. 2, 3, 4                  
+0x7c 0x43 0x21 0x11
+
+# CHECK: addme 2, 3                      
+0x7c 0x43 0x01 0xd4
+
+# CHECK: addme. 2, 3                     
+0x7c 0x43 0x01 0xd5
+
+# CHECK: subfme 2, 3                     
+0x7c 0x43 0x01 0xd0
+
+# CHECK: subfme. 2, 3                    
+0x7c 0x43 0x01 0xd1
+
+# CHECK: addze 2, 3                      
+0x7c 0x43 0x01 0x94
+
+# CHECK: addze. 2, 3                     
+0x7c 0x43 0x01 0x95
+
+# CHECK: subfze 2, 3                     
+0x7c 0x43 0x01 0x90
+
+# CHECK: subfze. 2, 3                    
+0x7c 0x43 0x01 0x91
+
+# CHECK: neg 2, 3                        
+0x7c 0x43 0x00 0xd0
+
+# CHECK: neg. 2, 3                       
+0x7c 0x43 0x00 0xd1
+
+# CHECK: mulli 2, 3, 128                 
+0x1c 0x43 0x00 0x80
+
+# CHECK: mulhw 2, 3, 4                   
+0x7c 0x43 0x20 0x96
+
+# CHECK: mulhw. 2, 3, 4                  
+0x7c 0x43 0x20 0x97
+
+# CHECK: mullw 2, 3, 4                   
+0x7c 0x43 0x21 0xd6
+
+# CHECK: mullw. 2, 3, 4                  
+0x7c 0x43 0x21 0xd7
+
+# CHECK: mulhwu 2, 3, 4                  
+0x7c 0x43 0x20 0x16
+
+# CHECK: mulhwu. 2, 3, 4                 
+0x7c 0x43 0x20 0x17
+
+# CHECK: divw 2, 3, 4                    
+0x7c 0x43 0x23 0xd6
+
+# CHECK: divw. 2, 3, 4                   
+0x7c 0x43 0x23 0xd7
+
+# CHECK: divwu 2, 3, 4                   
+0x7c 0x43 0x23 0x96
+
+# CHECK: divwu. 2, 3, 4                  
+0x7c 0x43 0x23 0x97
+
+# CHECK: mulld 2, 3, 4                   
+0x7c 0x43 0x21 0xd2
+
+# CHECK: mulld. 2, 3, 4                  
+0x7c 0x43 0x21 0xd3
+
+# CHECK: mulhd 2, 3, 4                   
+0x7c 0x43 0x20 0x92
+
+# CHECK: mulhd. 2, 3, 4                  
+0x7c 0x43 0x20 0x93
+
+# CHECK: mulhdu 2, 3, 4                  
+0x7c 0x43 0x20 0x12
+
+# CHECK: mulhdu. 2, 3, 4                 
+0x7c 0x43 0x20 0x13
+
+# CHECK: divd 2, 3, 4                    
+0x7c 0x43 0x23 0xd2
+
+# CHECK: divd. 2, 3, 4                   
+0x7c 0x43 0x23 0xd3
+
+# CHECK: divdu 2, 3, 4                   
+0x7c 0x43 0x23 0x92
+
+# CHECK: divdu. 2, 3, 4                  
+0x7c 0x43 0x23 0x93
+
+# CHECK: cmpdi 2, 3, 128                 
+0x2d 0x23 0x00 0x80
+
+# CHECK: cmpd 2, 3, 4                    
+0x7d 0x23 0x20 0x00
+
+# CHECK: cmpldi 2, 3, 128                
+0x29 0x23 0x00 0x80
+
+# CHECK: cmpld 2, 3, 4                   
+0x7d 0x23 0x20 0x40
+
+# CHECK: cmpwi 2, 3, 128                 
+0x2d 0x03 0x00 0x80
+
+# CHECK: cmpw 2, 3, 4                    
+0x7d 0x03 0x20 0x00
+
+# CHECK: cmplwi 2, 3, 128                
+0x29 0x03 0x00 0x80
+
+# CHECK: cmplw 2, 3, 4                   
+0x7d 0x03 0x20 0x40
+
+# CHECK: twi 2, 3, 4                     
+0x0c 0x43 0x00 0x04
+
+# CHECK: tw 2, 3, 4                      
+0x7c 0x43 0x20 0x08
+
+# CHECK: tdi 2, 3, 4                     
+0x08 0x43 0x00 0x04
+
+# CHECK: td 2, 3, 4                      
+0x7c 0x43 0x20 0x88
+
+# CHECK: isel 2, 3, 4, 5                 
+0x7c 0x43 0x21 0x5e
+
+# CHECK: andi. 2, 3, 128                 
+0x70 0x62 0x00 0x80
+
+# CHECK: andis. 2, 3, 128                
+0x74 0x62 0x00 0x80
+
+# CHECK: ori 2, 3, 128                   
+0x60 0x62 0x00 0x80
+
+# CHECK: oris 2, 3, 128                  
+0x64 0x62 0x00 0x80
+
+# CHECK: xori 2, 3, 128                  
+0x68 0x62 0x00 0x80
+
+# CHECK: xoris 2, 3, 128                 
+0x6c 0x62 0x00 0x80
+
+# CHECK: and 2, 3, 4                     
+0x7c 0x62 0x20 0x38
+
+# CHECK: and. 2, 3, 4                    
+0x7c 0x62 0x20 0x39
+
+# CHECK: xor 2, 3, 4                     
+0x7c 0x62 0x22 0x78
+
+# CHECK: xor. 2, 3, 4                    
+0x7c 0x62 0x22 0x79
+
+# CHECK: nand 2, 3, 4                    
+0x7c 0x62 0x23 0xb8
+
+# CHECK: nand. 2, 3, 4                   
+0x7c 0x62 0x23 0xb9
+
+# CHECK: or 2, 3, 4                      
+0x7c 0x62 0x23 0x78
+
+# CHECK: or. 2, 3, 4                     
+0x7c 0x62 0x23 0x79
+
+# CHECK: nor 2, 3, 4                     
+0x7c 0x62 0x20 0xf8
+
+# CHECK: nor. 2, 3, 4                    
+0x7c 0x62 0x20 0xf9
+
+# CHECK: eqv 2, 3, 4                     
+0x7c 0x62 0x22 0x38
+
+# CHECK: eqv. 2, 3, 4                    
+0x7c 0x62 0x22 0x39
+
+# CHECK: andc 2, 3, 4                    
+0x7c 0x62 0x20 0x78
+
+# CHECK: andc. 2, 3, 4                   
+0x7c 0x62 0x20 0x79
+
+# CHECK: orc 2, 3, 4                     
+0x7c 0x62 0x23 0x38
+
+# CHECK: orc. 2, 3, 4                    
+0x7c 0x62 0x23 0x39
+
+# CHECK: extsb 2, 3                      
+0x7c 0x62 0x07 0x74
+
+# CHECK: extsb. 2, 3                     
+0x7c 0x62 0x07 0x75
+
+# CHECK: extsh 2, 3                      
+0x7c 0x62 0x07 0x34
+
+# CHECK: extsh. 2, 3                     
+0x7c 0x62 0x07 0x35
+
+# CHECK: cntlzw 2, 3                     
+0x7c 0x62 0x00 0x34
+
+# CHECK: cntlzw. 2, 3                    
+0x7c 0x62 0x00 0x35
+
+# CHECK: popcntw 2, 3                    
+0x7c 0x62 0x02 0xf4
+
+# CHECK: extsw 2, 3                      
+0x7c 0x62 0x07 0xb4
+
+# CHECK: extsw. 2, 3                     
+0x7c 0x62 0x07 0xb5
+
+# CHECK: cntlzd 2, 3                     
+0x7c 0x62 0x00 0x74
+
+# CHECK: cntlzd. 2, 3                    
+0x7c 0x62 0x00 0x75
+
+# CHECK: popcntd 2, 3                    
+0x7c 0x62 0x03 0xf4
+
+# CHECK: rlwinm 2, 3, 4, 5, 6            
+0x54 0x62 0x21 0x4c
+
+# CHECK: rlwinm. 2, 3, 4, 5, 6           
+0x54 0x62 0x21 0x4d
+
+# CHECK: rlwnm 2, 3, 4, 5, 6             
+0x5c 0x62 0x21 0x4c
+
+# CHECK: rlwnm. 2, 3, 4, 5, 6            
+0x5c 0x62 0x21 0x4d
+
+# CHECK: rlwimi 2, 3, 4, 5, 6            
+0x50 0x62 0x21 0x4c
+
+# CHECK: rlwimi. 2, 3, 4, 5, 6           
+0x50 0x62 0x21 0x4d
+
+# CHECK: rldicl 2, 3, 4, 5               
+0x78 0x62 0x21 0x40
+
+# CHECK: rldicl. 2, 3, 4, 5              
+0x78 0x62 0x21 0x41
+
+# CHECK: rldicr 2, 3, 4, 5               
+0x78 0x62 0x21 0x44
+
+# CHECK: rldicr. 2, 3, 4, 5              
+0x78 0x62 0x21 0x45
+
+# CHECK: rldic 2, 3, 4, 5                
+0x78 0x62 0x21 0x48
+
+# CHECK: rldic. 2, 3, 4, 5               
+0x78 0x62 0x21 0x49
+
+# CHECK: rldcl 2, 3, 4, 5                
+0x78 0x62 0x21 0x50
+
+# CHECK: rldcl. 2, 3, 4, 5               
+0x78 0x62 0x21 0x51
+
+# CHECK: rldcr 2, 3, 4, 5                
+0x78 0x62 0x21 0x52
+
+# CHECK: rldcr. 2, 3, 4, 5               
+0x78 0x62 0x21 0x53
+
+# CHECK: rldimi 2, 3, 4, 5               
+0x78 0x62 0x21 0x4c
+
+# CHECK: rldimi. 2, 3, 4, 5              
+0x78 0x62 0x21 0x4d
+
+# CHECK: slw 2, 3, 4                     
+0x7c 0x62 0x20 0x30
+
+# CHECK: slw. 2, 3, 4                    
+0x7c 0x62 0x20 0x31
+
+# CHECK: srw 2, 3, 4                     
+0x7c 0x62 0x24 0x30
+
+# CHECK: srw. 2, 3, 4                    
+0x7c 0x62 0x24 0x31
+
+# CHECK: srawi 2, 3, 4                   
+0x7c 0x62 0x26 0x70
+
+# CHECK: srawi. 2, 3, 4                  
+0x7c 0x62 0x26 0x71
+
+# CHECK: sraw 2, 3, 4                    
+0x7c 0x62 0x26 0x30
+
+# CHECK: sraw. 2, 3, 4                   
+0x7c 0x62 0x26 0x31
+
+# CHECK: sld 2, 3, 4                     
+0x7c 0x62 0x20 0x36
+
+# CHECK: sld. 2, 3, 4                    
+0x7c 0x62 0x20 0x37
+
+# CHECK: srd 2, 3, 4                     
+0x7c 0x62 0x24 0x36
+
+# CHECK: srd. 2, 3, 4                    
+0x7c 0x62 0x24 0x37
+
+# CHECK: sradi 2, 3, 4                   
+0x7c 0x62 0x26 0x74
+
+# CHECK: sradi. 2, 3, 4                  
+0x7c 0x62 0x26 0x75
+
+# CHECK: srad 2, 3, 4                    
+0x7c 0x62 0x26 0x34
+
+# CHECK: srad. 2, 3, 4                   
+0x7c 0x62 0x26 0x35
+
+# CHECK: mtspr 600, 2                    
+0x7c 0x58 0x93 0xa6
+
+# CHECK: mfspr 2, 600                    
+0x7c 0x58 0x92 0xa6
+
+# CHECK: mtcrf 123, 2                    
+0x7c 0x47 0xb1 0x20
+
+# CHECK: mfcr 2                          
+0x7c 0x40 0x00 0x26
+
+# CHECK: mtocrf 16, 2                    
+0x7c 0x51 0x01 0x20
+
+# CHECK: mfocrf 16, 8                    
+0x7e 0x10 0x80 0x26
+
diff --git a/test/MC/Disassembler/PowerPC/ppc64-operands.txt b/test/MC/Disassembler/PowerPC/ppc64-operands.txt
new file mode 100644
index 0000000..a2da322
--- /dev/null
+++ b/test/MC/Disassembler/PowerPC/ppc64-operands.txt
@@ -0,0 +1,94 @@
+# RUN: llvm-mc --disassemble %s -triple powerpc64-unknown-unknown -mcpu=pwr7 | FileCheck %s
+
+# CHECK: add 1, 2, 3                     
+0x7c 0x22 0x1a 0x14
+
+# CHECK: add 1, 2, 3                     
+0x7c 0x22 0x1a 0x14
+
+# CHECK: add 0, 0, 0                     
+0x7c 0x00 0x02 0x14
+
+# CHECK: add 31, 31, 31                  
+0x7f 0xff 0xfa 0x14
+
+# CHECK: li 1, 0                    
+0x38 0x20 0x00 0x00
+
+# CHECK: addi 1, 2, 0                    
+0x38 0x22 0x00 0x00
+
+# CHECK: li 1, -32768               
+0x38 0x20 0x80 0x00
+
+# CHECK: li 1, 32767                
+0x38 0x20 0x7f 0xff
+
+# CHECK: ori 1, 2, 0                     
+0x60 0x41 0x00 0x00
+
+# CHECK: ori 1, 2, 65535                 
+0x60 0x41 0xff 0xff
+
+# CHECK: lis 1, 0                   
+0x3c 0x20 0x00 0x00
+
+# CHECK: lis 1, -1                  
+0x3c 0x20 0xff 0xff
+
+# CHECK: lwz 1, 0(0)                     
+0x80 0x20 0x00 0x00
+
+# CHECK: lwz 1, 0(0)                     
+0x80 0x20 0x00 0x00
+
+# CHECK: lwz 1, 0(31)                    
+0x80 0x3f 0x00 0x00
+
+# CHECK: lwz 1, 0(31)                    
+0x80 0x3f 0x00 0x00
+
+# CHECK: lwz 1, -32768(2)                
+0x80 0x22 0x80 0x00
+
+# CHECK: lwz 1, 32767(2)                 
+0x80 0x22 0x7f 0xff
+
+# CHECK: ld 1, 0(0)                      
+0xe8 0x20 0x00 0x00
+
+# CHECK: ld 1, 0(0)                      
+0xe8 0x20 0x00 0x00
+
+# CHECK: ld 1, 0(31)                     
+0xe8 0x3f 0x00 0x00
+
+# CHECK: ld 1, 0(31)                     
+0xe8 0x3f 0x00 0x00
+
+# CHECK: ld 1, -32768(2)                 
+0xe8 0x22 0x80 0x00
+
+# CHECK: ld 1, 32764(2)                  
+0xe8 0x22 0x7f 0xfc
+
+# CHECK: ld 1, 4(2)                      
+0xe8 0x22 0x00 0x04
+
+# CHECK: ld 1, -4(2)                     
+0xe8 0x22 0xff 0xfc
+
+# CHECK: b .+1024                        
+0x48 0x00 0x04 0x00
+
+# CHECK: ba 1024                         
+0x48 0x00 0x04 0x02
+
+# FIXME: decode as beq 0, .+1024
+# CHECK: bc 12, 2, .+1024
+0x41 0x82 0x04 0x00
+
+# FIXME: decode as beqa 0, 1024
+# CHECK: bca 12, 2, 1024
+0x41 0x82 0x04 0x02
+
diff --git a/test/MC/Disassembler/PowerPC/vsx.txt b/test/MC/Disassembler/PowerPC/vsx.txt
new file mode 100644
index 0000000..b5e2751
--- /dev/null
+++ b/test/MC/Disassembler/PowerPC/vsx.txt
@@ -0,0 +1,452 @@
+# RUN: llvm-mc --disassemble %s -triple powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s
+
+# CHECK: lxsdx 7, 5, 31
+0x7c 0xe5 0xfc 0x98
+
+# CHECK: lxvd2x 7, 5, 31
+0x7c 0xe5 0xfe 0x98
+
+# CHECK: lxvdsx 7, 5, 31
+0x7c 0xe5 0xfa 0x98
+
+# CHECK: lxvw4x 7, 5, 31
+0x7c 0xe5 0xfe 0x18
+
+# CHECK: stxsdx 8, 5, 31
+0x7d 0x05 0xfd 0x98
+
+# CHECK: stxvd2x 8, 5, 31
+0x7d 0x05 0xff 0x98
+
+# CHECK: stxvw4x 8, 5, 31
+0x7d 0x05 0xff 0x18
+
+# CHECK: xsabsdp 7, 27
+0xf0 0xe0 0xdd 0x64
+
+# CHECK: xsadddp 7, 63, 27
+0xf0 0xff 0xd9 0x04
+
+# CHECK: xscmpodp 6, 63, 27
+0xf3 0x1f 0xd9 0x5c
+
+# CHECK: xscmpudp 6, 63, 27
+0xf3 0x1f 0xd9 0x1c
+
+# CHECK: xscpsgndp 7, 63, 27
+0xf0 0xff 0xdd 0x84
+
+# CHECK: xscvdpsp 7, 27
+0xf0 0xe0 0xdc 0x24
+
+# CHECK: xscvdpsxds 7, 27
+0xf0 0xe0 0xdd 0x60
+
+# CHECK: xscvdpsxws 7, 27
+0xf0 0xe0 0xd9 0x60
+
+# CHECK: xscvdpuxds 7, 27
+0xf0 0xe0 0xdd 0x20
+
+# CHECK: xscvdpuxws 7, 27
+0xf0 0xe0 0xd9 0x20
+
+# CHECK: xscvspdp 7, 27
+0xf0 0xe0 0xdd 0x24
+
+# CHECK: xscvsxddp 7, 27
+0xf0 0xe0 0xdd 0xe0
+
+# CHECK: xscvuxddp 7, 27
+0xf0 0xe0 0xdd 0xa0
+
+# CHECK: xsdivdp 7, 63, 27
+0xf0 0xff 0xd9 0xc4
+
+# CHECK: xsmaddadp 7, 63, 27
+0xf0 0xff 0xd9 0x0c
+
+# CHECK: xsmaddmdp 7, 63, 27
+0xf0 0xff 0xd9 0x4c
+
+# CHECK: xsmaxdp 7, 63, 27
+0xf0 0xff 0xdd 0x04
+
+# CHECK: xsmindp 7, 63, 27
+0xf0 0xff 0xdd 0x44
+
+# CHECK: xsmsubadp 7, 63, 27
+0xf0 0xff 0xd9 0x8c
+
+# CHECK: xsmsubmdp 7, 63, 27
+0xf0 0xff 0xd9 0xcc
+
+# CHECK: xsmuldp 7, 63, 27
+0xf0 0xff 0xd9 0x84
+
+# CHECK: xsnabsdp 7, 27
+0xf0 0xe0 0xdd 0xa4
+
+# CHECK: xsnegdp 7, 27
+0xf0 0xe0 0xdd 0xe4
+
+# CHECK: xsnmaddadp 7, 63, 27
+0xf0 0xff 0xdd 0x0c
+
+# CHECK: xsnmaddmdp 7, 63, 27
+0xf0 0xff 0xdd 0x4c
+
+# CHECK: xsnmsubadp 7, 63, 27
+0xf0 0xff 0xdd 0x8c
+
+# CHECK: xsnmsubmdp 7, 63, 27
+0xf0 0xff 0xdd 0xcc
+
+# CHECK: xsrdpi 7, 27
+0xf0 0xe0 0xd9 0x24
+
+# CHECK: xsrdpic 7, 27
+0xf0 0xe0 0xd9 0xac
+
+# CHECK: xsrdpim 7, 27
+0xf0 0xe0 0xd9 0xe4
+
+# CHECK: xsrdpip 7, 27
+0xf0 0xe0 0xd9 0xa4
+
+# CHECK: xsrdpiz 7, 27
+0xf0 0xe0 0xd9 0x64
+
+# CHECK: xsredp 7, 27
+0xf0 0xe0 0xd9 0x68
+
+# CHECK: xsrsqrtedp 7, 27
+0xf0 0xe0 0xd9 0x28
+
+# CHECK: xssqrtdp 7, 27
+0xf0 0xe0 0xd9 0x2c
+
+# CHECK: xssubdp 7, 63, 27
+0xf0 0xff 0xd9 0x44
+
+# CHECK: xstdivdp 6, 63, 27
+0xf3 0x1f 0xd9 0xec
+
+# CHECK: xstsqrtdp 6, 27
+0xf3 0x00 0xd9 0xa8
+
+# CHECK: xvabsdp 7, 27
+0xf0 0xe0 0xdf 0x64
+
+# CHECK: xvabssp 7, 27
+0xf0 0xe0 0xde 0x64
+
+# CHECK: xvadddp 7, 63, 27
+0xf0 0xff 0xdb 0x04
+
+# CHECK: xvaddsp 7, 63, 27
+0xf0 0xff 0xda 0x04
+
+# CHECK: xvcmpeqdp 7, 63, 27
+0xf0 0xff 0xdb 0x1c
+
+# CHECK: xvcmpeqdp. 7, 63, 27
+0xf0 0xff 0xdf 0x1c
+
+# CHECK: xvcmpeqsp 7, 63, 27
+0xf0 0xff 0xda 0x1c
+
+# CHECK: xvcmpeqsp. 7, 63, 27
+0xf0 0xff 0xde 0x1c
+
+# CHECK: xvcmpgedp 7, 63, 27
+0xf0 0xff 0xdb 0x9c
+
+# CHECK: xvcmpgedp. 7, 63, 27
+0xf0 0xff 0xdf 0x9c
+
+# CHECK: xvcmpgesp 7, 63, 27
+0xf0 0xff 0xda 0x9c
+
+# CHECK: xvcmpgesp. 7, 63, 27
+0xf0 0xff 0xde 0x9c
+
+# CHECK: xvcmpgtdp 7, 63, 27
+0xf0 0xff 0xdb 0x5c
+
+# CHECK: xvcmpgtdp. 7, 63, 27
+0xf0 0xff 0xdf 0x5c
+
+# CHECK: xvcmpgtsp 7, 63, 27
+0xf0 0xff 0xda 0x5c
+
+# CHECK: xvcmpgtsp. 7, 63, 27
+0xf0 0xff 0xde 0x5c
+
+# CHECK: xvcpsgndp 7, 63, 27
+0xf0 0xff 0xdf 0x84
+
+# CHECK: xvcpsgnsp 7, 63, 27
+0xf0 0xff 0xde 0x84
+
+# CHECK: xvcvdpsp 7, 27
+0xf0 0xe0 0xde 0x24
+
+# CHECK: xvcvdpsxds 7, 27
+0xf0 0xe0 0xdf 0x60
+
+# CHECK: xvcvdpsxws 7, 27
+0xf0 0xe0 0xdb 0x60
+
+# CHECK: xvcvdpuxds 7, 27
+0xf0 0xe0 0xdf 0x20
+
+# CHECK: xvcvdpuxws 7, 27
+0xf0 0xe0 0xdb 0x20
+
+# CHECK: xvcvspdp 7, 27
+0xf0 0xe0 0xdf 0x24
+
+# CHECK: xvcvspsxds 7, 27
+0xf0 0xe0 0xde 0x60
+
+# CHECK: xvcvspsxws 7, 27
+0xf0 0xe0 0xda 0x60
+
+# CHECK: xvcvspuxds 7, 27
+0xf0 0xe0 0xde 0x20
+
+# CHECK: xvcvspuxws 7, 27
+0xf0 0xe0 0xda 0x20
+
+# CHECK: xvcvsxddp 7, 27
+0xf0 0xe0 0xdf 0xe0
+
+# CHECK: xvcvsxdsp 7, 27
+0xf0 0xe0 0xde 0xe0
+
+# CHECK: xvcvsxwdp 7, 27
+0xf0 0xe0 0xdb 0xe0
+
+# CHECK: xvcvsxwsp 7, 27
+0xf0 0xe0 0xda 0xe0
+
+# CHECK: xvcvuxddp 7, 27
+0xf0 0xe0 0xdf 0xa0
+
+# CHECK: xvcvuxdsp 7, 27
+0xf0 0xe0 0xde 0xa0
+
+# CHECK: xvcvuxwdp 7, 27
+0xf0 0xe0 0xdb 0xa0
+
+# CHECK: xvcvuxwsp 7, 27
+0xf0 0xe0 0xda 0xa0
+
+# CHECK: xvdivdp 7, 63, 27
+0xf0 0xff 0xdb 0xc4
+
+# CHECK: xvdivsp 7, 63, 27
+0xf0 0xff 0xda 0xc4
+
+# CHECK: xvmaddadp 7, 63, 27
+0xf0 0xff 0xdb 0x0c
+
+# CHECK: xvmaddasp 7, 63, 27
+0xf0 0xff 0xda 0x0c
+
+# CHECK: xvmaddmdp 7, 63, 27
+0xf0 0xff 0xdb 0x4c
+
+# CHECK: xvmaddmsp 7, 63, 27
+0xf0 0xff 0xda 0x4c
+
+# CHECK: xvmaxdp 7, 63, 27
+0xf0 0xff 0xdf 0x04
+
+# CHECK: xvmaxsp 7, 63, 27
+0xf0 0xff 0xde 0x04
+
+# CHECK: xvmindp 7, 63, 27
+0xf0 0xff 0xdf 0x44
+
+# CHECK: xvminsp 7, 63, 27
+0xf0 0xff 0xde 0x44
+
+# FIXME: decode as xvmovdp 7, 63
+# CHECK:  xvcpsgndp 7, 63, 63
+0xf0 0xff 0xff 0x86
+
+# FIXME: decode as xvmovsp 7, 63
+# CHECK:  xvcpsgnsp 7, 63, 63
+0xf0 0xff 0xfe 0x86
+
+# CHECK: xvmsubadp 7, 63, 27
+0xf0 0xff 0xdb 0x8c
+
+# CHECK: xvmsubasp 7, 63, 27
+0xf0 0xff 0xda 0x8c
+
+# CHECK: xvmsubmdp 7, 63, 27
+0xf0 0xff 0xdb 0xcc
+
+# CHECK: xvmsubmsp 7, 63, 27
+0xf0 0xff 0xda 0xcc
+
+# CHECK: xvmuldp 7, 63, 27
+0xf0 0xff 0xdb 0x84
+
+# CHECK: xvmulsp 7, 63, 27
+0xf0 0xff 0xda 0x84
+
+# CHECK: xvnabsdp 7, 27
+0xf0 0xe0 0xdf 0xa4
+
+# CHECK: xvnabssp 7, 27
+0xf0 0xe0 0xde 0xa4
+
+# CHECK: xvnegdp 7, 27
+0xf0 0xe0 0xdf 0xe4
+
+# CHECK: xvnegsp 7, 27
+0xf0 0xe0 0xde 0xe4
+
+# CHECK: xvnmaddadp 7, 63, 27
+0xf0 0xff 0xdf 0x0c
+
+# CHECK: xvnmaddasp 7, 63, 27
+0xf0 0xff 0xde 0x0c
+
+# CHECK: xvnmaddmdp 7, 63, 27
+0xf0 0xff 0xdf 0x4c
+
+# CHECK: xvnmaddmsp 7, 63, 27
+0xf0 0xff 0xde 0x4c
+
+# CHECK: xvnmsubadp 7, 63, 27
+0xf0 0xff 0xdf 0x8c
+
+# CHECK: xvnmsubasp 7, 63, 27
+0xf0 0xff 0xde 0x8c
+
+# CHECK: xvnmsubmdp 7, 63, 27
+0xf0 0xff 0xdf 0xcc
+
+# CHECK: xvnmsubmsp 7, 63, 27
+0xf0 0xff 0xde 0xcc
+
+# CHECK: xvrdpi 7, 27
+0xf0 0xe0 0xdb 0x24
+
+# CHECK: xvrdpic 7, 27
+0xf0 0xe0 0xdb 0xac
+
+# CHECK: xvrdpim 7, 27
+0xf0 0xe0 0xdb 0xe4
+
+# CHECK: xvrdpip 7, 27
+0xf0 0xe0 0xdb 0xa4
+
+# CHECK: xvrdpiz 7, 27
+0xf0 0xe0 0xdb 0x64
+
+# CHECK: xvredp 7, 27
+0xf0 0xe0 0xdb 0x68
+
+# CHECK: xvresp 7, 27
+0xf0 0xe0 0xda 0x68
+
+# CHECK: xvrspi 7, 27
+0xf0 0xe0 0xda 0x24
+
+# CHECK: xvrspic 7, 27
+0xf0 0xe0 0xda 0xac
+
+# CHECK: xvrspim 7, 27
+0xf0 0xe0 0xda 0xe4
+
+# CHECK: xvrspip 7, 27
+0xf0 0xe0 0xda 0xa4
+
+# CHECK: xvrspiz 7, 27
+0xf0 0xe0 0xda 0x64
+
+# CHECK: xvrsqrtedp 7, 27
+0xf0 0xe0 0xdb 0x28
+
+# CHECK: xvrsqrtesp 7, 27
+0xf0 0xe0 0xda 0x28
+
+# CHECK: xvsqrtdp 7, 27
+0xf0 0xe0 0xdb 0x2c
+
+# CHECK: xvsqrtsp 7, 27
+0xf0 0xe0 0xda 0x2c
+
+# CHECK: xvsubdp 7, 63, 27
+0xf0 0xff 0xdb 0x44
+
+# CHECK: xvsubsp 7, 63, 27
+0xf0 0xff 0xda 0x44
+
+# CHECK: xvtdivdp 6, 63, 27
+0xf3 0x1f 0xdb 0xec
+
+# CHECK: xvtdivsp 6, 63, 27
+0xf3 0x1f 0xda 0xec
+
+# CHECK: xvtsqrtdp 6, 27
+0xf3 0x00 0xdb 0xa8
+
+# CHECK: xvtsqrtsp 6, 27
+0xf3 0x00 0xda 0xa8
+
+# CHECK: xxland 7, 63, 27
+0xf0 0xff 0xdc 0x14
+
+# CHECK: xxlandc 7, 63, 27
+0xf0 0xff 0xdc 0x54
+
+# CHECK: xxlnor 7, 63, 27
+0xf0 0xff 0xdd 0x14
+
+# CHECK: xxlor 7, 63, 27
+0xf0 0xff 0xdc 0x94
+
+# CHECK: xxlxor 7, 63, 27
+0xf0 0xff 0xdc 0xd4
+
+# FIXME: decode as xxmrghd 7, 63, 27
+# CHECK: xxpermdi 7, 63, 27, 0
+0xf0 0xff 0xd8 0x54
+
+# CHECK: xxmrghw 7, 63, 27
+0xf0 0xff 0xd8 0x94
+
+# FIXME: decode as xxmrgld 7, 63, 27
+# CHECK:  xxpermdi 7, 63, 27, 3
+0xf0 0xff 0xdb 0x54
+
+# CHECK: xxmrglw 7, 63, 27
+0xf0 0xff 0xd9 0x94
+
+# CHECK: xxpermdi 7, 63, 27, 2
+0xf0 0xff 0xda 0x54
+
+# CHECK: xxsel 7, 63, 27, 14
+0xf0 0xff 0xdb 0xb4
+
+# CHECK: xxsldwi 7, 63, 27, 1
+0xf0 0xff 0xd9 0x14
+
+# FIXME: decode as xxspltd 7, 63, 1
+# CHECK: xxpermdi 7, 63, 63, 3
+0xf0 0xff 0xfb 0x56
+
+# CHECK: xxspltw 7, 27, 3
+0xf0 0xe3 0xda 0x90
+
+# FIXME: decode as xxswapd 7, 63
+# CHECK: xxpermdi 7, 63, 63, 2
+0xf0 0xff 0xfa 0x56
+
diff --git a/test/MC/Disassembler/Sparc/lit.local.cfg b/test/MC/Disassembler/Sparc/lit.local.cfg
new file mode 100644
index 0000000..4d344fa
--- /dev/null
+++ b/test/MC/Disassembler/Sparc/lit.local.cfg
@@ -0,0 +1,4 @@
+targets = set(config.root.targets_to_build.split())
+if not 'Sparc' in targets:
+    config.unsupported = True
+
diff --git a/test/MC/Disassembler/Sparc/sparc-fp.txt b/test/MC/Disassembler/Sparc/sparc-fp.txt
new file mode 100644
index 0000000..b279da8
--- /dev/null
+++ b/test/MC/Disassembler/Sparc/sparc-fp.txt
@@ -0,0 +1,148 @@
+# RUN: llvm-mc --disassemble %s -triple=sparc64-linux-gnu | FileCheck %s
+
+
+# CHECK: fitos %f0, %f4
+0x89 0xa0 0x18 0x80
+
+# CHECK: fitod %f0, %f4
+0x89 0xa0 0x19 0x00
+
+# CHECK: fitoq %f0, %f4
+0x89 0xa0 0x19 0x80
+
+# CHECK: fstoi %f0, %f4
+0x89 0xa0 0x1a 0x20
+
+# CHECK: fdtoi %f0, %f4
+0x89 0xa0 0x1a 0x40
+
+# CHECK: fqtoi %f0, %f4
+0x89 0xa0 0x1a 0x60
+
+# CHECK: fstod %f0, %f4
+0x89 0xa0 0x19 0x20
+# CHECK: fstoq %f0, %f4
+0x89 0xa0 0x19 0xa0
+
+# CHECK: fdtos %f0, %f4
+0x89 0xa0 0x18 0xc0
+
+# CHECK: fdtoq %f0, %f4
+0x89 0xa0 0x19 0xc0
+
+# CHECK: fqtos %f0, %f4
+0x89 0xa0 0x18 0xe0
+
+# CHECK: fqtod %f0, %f4
+0x89 0xa0 0x19 0x60
+
+# CHECK: fmovs %f0, %f4
+0x89 0xa0 0x00 0x20
+
+# CHECK: fmovd %f0, %f4
+0x89 0xa0 0x00 0x40
+
+# CHECK: fmovq %f0, %f4
+0x89 0xa0 0x00 0x60
+
+# CHECK: fnegs %f0, %f4
+0x89 0xa0 0x00 0xa0
+
+# CHECK: fnegd %f0, %f4
+0x89 0xa0 0x00 0xc0
+
+# CHECK: fnegq %f0, %f4
+0x89 0xa0 0x00 0xe0
+
+# CHECK: fabss %f0, %f4
+0x89 0xa0 0x01 0x20
+
+# CHECK: fabsd %f0, %f4
+0x89 0xa0 0x01 0x40
+
+# CHECK: fabsq %f0, %f4
+0x89 0xa0 0x01 0x60
+
+# CHECK: fsqrts %f0, %f4
+0x89 0xa0 0x05 0x20
+
+# CHECK: fsqrtd %f0, %f4
+0x89 0xa0 0x05 0x40
+
+# CHECK: fsqrtq %f0, %f4
+0x89 0xa0 0x05 0x60
+
+# CHECK: fadds %f0, %f4, %f8
+0x91 0xa0 0x08 0x24
+
+# CHECK: faddd %f0, %f4, %f8
+0x91 0xa0 0x08 0x44
+
+# CHECK: faddq %f0, %f4, %f8
+0x91 0xa0 0x08 0x64
+
+# CHECK: faddd %f32, %f34, %f62
+0xbf 0xa0 0x48 0x43
+
+# CHECK: faddq %f32, %f36, %f60
+0xbb 0xa0 0x48 0x65
+
+# CHECK: fsubs %f0, %f4, %f8
+0x91 0xa0 0x08 0xa4
+
+# CHECK: fsubd %f0, %f4, %f8
+0x91 0xa0 0x08 0xc4
+
+# CHECK: fsubq %f0, %f4, %f8
+0x91 0xa0 0x08 0xe4
+
+# CHECK: fmuls %f0, %f4, %f8
+0x91 0xa0 0x09 0x24
+
+# CHECK: fmuld %f0, %f4, %f8
+0x91 0xa0 0x09 0x44
+
+# CHECK: fmulq %f0, %f4, %f8
+0x91 0xa0 0x09 0x64
+
+# CHECK: fsmuld %f0, %f4, %f8
+0x91 0xa0 0x0d 0x24
+
+# CHECK: fdmulq %f0, %f4, %f8
+0x91 0xa0 0x0d 0xc4
+
+# CHECK: fdivs %f0, %f4, %f8
+0x91 0xa0 0x09 0xa4
+
+# CHECK: fdivd %f0, %f4, %f8
+0x91 0xa0 0x09 0xc4
+
+# CHECK: fdivq %f0, %f4, %f8
+0x91 0xa0 0x09 0xe4
+
+# CHECK: fcmps %fcc0, %f0, %f4
+0x81 0xa8 0x0a 0x24
+
+# CHECK: fcmpd %fcc0, %f0, %f4
+0x81 0xa8 0x0a 0x44
+
+# CHECK: fcmpq %fcc0, %f0, %f4
+0x81 0xa8 0x0a 0x64
+
+# CHECK: fxtos %f0, %f4
+0x89 0xa0 0x10 0x80
+
+# CHECK: fxtod %f0, %f4
+0x89 0xa0 0x11 0x00
+
+# CHECK: fxtoq %f0, %f4
+0x89 0xa0 0x11 0x80
+
+# CHECK: fstox %f0, %f4
+0x89 0xa0 0x10 0x20
+
+# CHECK: fdtox %f0, %f4
+0x89 0xa0 0x10 0x40
+
+# CHECK: fqtox %f0, %f4
+0x89 0xa0 0x10 0x60
diff --git a/test/MC/Disassembler/Sparc/sparc-mem.txt b/test/MC/Disassembler/Sparc/sparc-mem.txt
new file mode 100644
index 0000000..6ad4be1
--- /dev/null
+++ b/test/MC/Disassembler/Sparc/sparc-mem.txt
@@ -0,0 +1,163 @@
+# RUN: llvm-mc --disassemble %s -triple=sparcv9-unknown-linux | FileCheck %s
+
+# CHECK:      ldsb [%i0+%l6], %o2
+0xd4 0x4e 0x00 0x16
+
+# CHECK:      ldsb [%i0+32], %o2
+0xd4 0x4e 0x20 0x20
+
+# CHECK:      ldsb [%g1], %o4
+0xd8 0x48 0x60 0x00
+
+# CHECK:      ldsh [%i0+%l6], %o2
+0xd4 0x56 0x00 0x16
+
+# CHECK:      ldsh [%i0+32], %o2
+0xd4 0x56 0x20 0x20
+
+# CHECK:      ldsh [%g1], %o4
+0xd8 0x50 0x60 0x00
+
+# CHECK:      ldub [%i0+%l6], %o2
+0xd4 0x0e 0x00 0x16
+
+# CHECK:      ldub [%i0+32], %o2
+0xd4 0x0e 0x20 0x20
+
+# CHECK:      ldub [%g1], %o2
+0xd4 0x08 0x60 0x00
+
+# CHECK:      lduh [%i0+%l6], %o2
+0xd4 0x16 0x00 0x16
+
+# CHECK:      lduh [%i0+32], %o2
+0xd4 0x16 0x20 0x20
+
+# CHECK:      lduh [%g1], %o2
+0xd4 0x10 0x60 0x00
+
+# CHECK:      ld [%i0+%l6], %o2
+0xd4 0x06 0x00 0x16
+
+# CHECK:      ld [%i0+32], %o2
+0xd4 0x06 0x20 0x20
+
+# CHECK:      ld [%g1], %o2
+0xd4 0x00 0x60 0x00
+
+# CHECK:     ld [%i0+%l6], %f2
+0xc5 0x06 0x00 0x16
+
+# CHECK:     ld [%i0+32], %f2
+0xc5 0x06 0x20 0x20
+
+# CHECK:     ld [%g1], %f2
+0xc5 0x00 0x60 0x00
+
+# CHECK:     ldd [%i0+%l6], %f2
+0xc5 0x1e 0x00 0x16
+
+# CHECK:     ldd [%i0+32], %f2
+0xc5 0x1e 0x20 0x20
+
+# CHECK:     ldd [%g1], %f2
+0xc5 0x18 0x60 0x00
+
+# CHECK:     ldq [%i0+%l6], %f4
+0xc9 0x16 0x00 0x16
+
+# CHECK:     ldq [%i0+32], %f4
+0xc9 0x16 0x20 0x20
+
+# CHECK:     ldq [%g1], %f4
+0xc9 0x10 0x60 0x00
+
+# CHECK:     ldx [%i0+%l6], %o2
+0xd4 0x5e 0x00 0x16
+
+# CHECK:     ldx [%i0+32], %o2
+0xd4 0x5e 0x20 0x20
+
+# CHECK:     ldx [%g1], %o2
+0xd4 0x58 0x60 0x00
+
+# CHECK:     ldsw [%i0+%l6], %o2
+0xd4 0x46 0x00 0x16
+
+# CHECK:     ldsw [%i0+32], %o2
+0xd4 0x46 0x20 0x20
+
+# CHECK:     ldsw [%g1], %o2
+0xd4 0x40 0x60 0x00
+
+# CHECK:      stb %o2, [%i0+%l6]
+0xd4 0x2e 0x00 0x16
+
+# CHECK:      stb %o2, [%i0+32]
+0xd4 0x2e 0x20 0x20
+
+# CHECK:      stb %o2, [%g1]
+0xd4 0x28 0x60 0x00
+
+# CHECK:      sth %o2, [%i0+%l6]
+0xd4 0x36 0x00 0x16
+
+# CHECK:      sth %o2, [%i0+32]
+0xd4 0x36 0x20 0x20
+
+# CHECK:      sth %o2, [%g1]
+0xd4 0x30 0x60 0x00
+
+# CHECK:      st %o2, [%i0+%l6]
+0xd4 0x26 0x00 0x16
+
+# CHECK:      st %o2, [%i0+32]
+0xd4 0x26 0x20 0x20
+
+# CHECK:      st %o2, [%g1]
+0xd4 0x20 0x60 0x00
+
+# CHECK:      st %f2, [%i0+%l6]
+0xc5 0x26 0x00 0x16
+
+# CHECK:      st %f2, [%i0+32]
+0xc5 0x26 0x20 0x20
+
+# CHECK:      st %f2, [%g1]
+0xc5 0x20 0x60 0x00
+
+# CHECK:      std %f2, [%i0+%l6]
+0xc5 0x3e 0x00 0x16
+
+# CHECK:      std %f2, [%i0+32]
+0xc5 0x3e 0x20 0x20
+
+# CHECK:      std %f2, [%g1]
+0xc5 0x38 0x60 0x00
+
+# CHECK:      stq %f4, [%i0+%l6]
+0xc9 0x36 0x00 0x16
+
+# CHECK:      stq %f4, [%i0+32]
+0xc9 0x36 0x20 0x20
+
+# CHECK:      stq %f4, [%g1]
+0xc9 0x30 0x60 0x00
+
+# CHECK:      stx %o2, [%i0+%l6]
+0xd4 0x76 0x00 0x16
+
+# CHECK:      stx %o2, [%i0+32]
+0xd4 0x76 0x20 0x20
+
+# CHECK:      stx %o2, [%g1]
+0xd4 0x70 0x60 0x00
+
+# CHECK:     swap [%i0+%l6], %o2
+0xd4 0x7e 0x00 0x16
+
+# CHECK:     swap [%i0+32], %o2
+0xd4 0x7e 0x20 0x20
+
+# CHECK:     swap [%g1], %o2
+0xd4 0x78 0x60 0x00
diff --git a/test/MC/Disassembler/Sparc/sparc.txt b/test/MC/Disassembler/Sparc/sparc.txt
new file mode 100644
index 0000000..a942024
--- /dev/null
+++ b/test/MC/Disassembler/Sparc/sparc.txt
@@ -0,0 +1,202 @@
+# RUN: llvm-mc --disassemble %s -triple=sparc-unknown-linux | FileCheck %s
+
+# CHECK: add %g0, %g0, %g0
+0x80 0x00 0x00 0x00
+
+# CHECK: add %g1, %g2, %g3
+0x86 0x00 0x40 0x02
+
+# CHECK: add %o0, %o1, %l0
+0xa0 0x02 0x00 0x09
+
+# CHECK: add %o0, 10,  %l0
+0xa0 0x02 0x20 0x0a
+
+# CHECK: addcc %g1, %g2, %g3
+0x86 0x80 0x40 0x02
+
+# CHECK: addxcc %g1, %g2, %g3
+0x86 0xc0 0x40 0x02
+
+# CHECK: udiv %g1, %g2, %g3
+0x86 0x70 0x40 0x02
+
+# CHECK: sdiv %g1, %g2, %g3
+0x86 0x78 0x40 0x02
+
+# CHECK: and %g1, %g2, %g3
+0x86 0x08 0x40 0x02
+
+# CHECK: andn %g1, %g2, %g3
+0x86 0x28 0x40 0x02
+
+# CHECK: or %g1, %g2, %g3
+0x86 0x10 0x40 0x02
+
+# CHECK: orn %g1, %g2, %g3
+0x86 0x30 0x40 0x02
+
+# CHECK: xor %g1, %g2, %g3
+0x86 0x18 0x40 0x02
+
+# CHECK: xnor %g1, %g2, %g3
+0x86 0x38 0x40 0x02
+
+# CHECK: umul %g1, %g2, %g3
+0x86 0x50 0x40 0x02
+
+# CHECK: smul %g1, %g2, %g3
+0x86 0x58 0x40 0x02
+
+# CHECK: nop
+0x01 0x00 0x00 0x00
+
+# CHECK: sethi 10, %l0
+0x21 0x00 0x00 0x0a
+
+# CHECK: sll %g1, %g2, %g3
+0x87 0x28 0x40 0x02
+
+# CHECK: sll %g1, 31, %g3
+0x87 0x28 0x60 0x1f
+
+# CHECK: srl %g1, %g2, %g3
+0x87 0x30 0x40 0x02
+
+# CHECK: srl %g1, 31, %g3
+0x87 0x30 0x60 0x1f
+
+# CHECK: sra %g1, %g2, %g3
+0x87 0x38 0x40 0x02
+
+# CHECK: sra %g1, 31, %g3
+0x87 0x38 0x60 0x1f
+
+# CHECK: sub %g1, %g2, %g3
+0x86 0x20 0x40 0x02
+
+# CHECK: subcc %g1, %g2, %g3
+0x86 0xa0 0x40 0x02
+
+# CHECK: subxcc %g1, %g2, %g3
+0x86 0xe0 0x40 0x02
+
+# CHECK: ba 4194303
+0x10 0xbf 0xff 0xff
+
+# CHECK: bne 4194303
+0x12 0xbf 0xff 0xff
+
+# CHECK: be 4194303
+0x02 0xbf 0xff 0xff
+
+# CHECK: bg 4194303
+0x14 0xbf 0xff 0xff
+
+# CHECK: ble 4194303
+0x04 0xbf 0xff 0xff
+
+# CHECK: bge 4194303
+0x16 0xbf 0xff 0xff
+
+# CHECK: bl 4194303
+0x06 0xbf 0xff 0xff
+
+# CHECK: bgu 4194303
+0x18 0xbf 0xff 0xff
+
+# CHECK: bleu 4194303
+0x08 0xbf 0xff 0xff
+
+# CHECK: bcc 4194303
+0x1a 0xbf 0xff 0xff
+
+# CHECK: bcs 4194303
+0x0a 0xbf 0xff 0xff
+
+# CHECK: bpos 4194303
+0x1c 0xbf 0xff 0xff
+
+# CHECK: bneg 4194303
+0x0c 0xbf 0xff 0xff
+
+# CHECK: bvc 4194303
+0x1e 0xbf 0xff 0xff
+
+# CHECK: bvs 4194303
+0x0e 0xbf 0xff 0xff
+
+# CHECK: fbu 4194303
+0x0f 0xbf 0xff 0xff
+
+# CHECK: fbg 4194303
+0x0d 0xbf 0xff 0xff
+
+# CHECK: fbug 4194303
+0x0b 0xbf 0xff 0xff
+
+# CHECK: fbl 4194303
+0x09 0xbf 0xff 0xff
+
+# CHECK: fbul 4194303
+0x07 0xbf 0xff 0xff
+
+# CHECK: fblg 4194303
+0x05 0xbf 0xff 0xff
+
+# CHECK: fbne 4194303
+0x03 0xbf 0xff 0xff
+
+# CHECK: fbe 4194303
+0x13 0xbf 0xff 0xff
+
+# CHECK: fbue 4194303
+0x15 0xbf 0xff 0xff
+
+# CHECK: fbge 4194303
+0x17 0xbf 0xff 0xff
+
+# CHECK: fbuge 4194303
+0x19 0xbf 0xff 0xff
+
+# CHECK: fble 4194303
+0x1b 0xbf 0xff 0xff
+
+# CHECK: fbule 4194303
+0x1d 0xbf 0xff 0xff
+
+# CHECK: fbo 4194303
+0x1f 0xbf 0xff 0xff
+
+# CHECK: restore
+0x81 0xe8 0x00 0x00
+
+# CHECK: call 16
+0x40 0x00 0x00 0x04
+
+# CHECK: add %g1, -10, %g2
+0x84 0x00 0x7f 0xf6
+
+# CHECK: save %sp, -196, %sp
+0x9d 0xe3 0xbf 0x3c
+
+# CHECK: cmp %g1, -2
+0x80 0xa0 0x7f 0xfe
+
+# CHECK: wr %g1, -2, %y
+0x81 0x80 0x7f 0xfe
+
+# CHECK: unimp 12
+0x00 0x00 0x00 0x0c
+
+# CHECK: jmp %g1+12
+0x81,0xc0,0x60,0x0c
+
+# CHECK: retl
+0x81 0xc3 0xe0 0x08
+
+# CHECK: ret
+0x81,0xc7,0xe0,0x08
+
+# CHECK:  rett %i7+8
+0x81 0xcf 0xe0 0x08
diff --git a/test/MC/Disassembler/SystemZ/insns.txt b/test/MC/Disassembler/SystemZ/insns.txt
index 78d348d..1a5634d 100644
--- a/test/MC/Disassembler/SystemZ/insns.txt
+++ b/test/MC/Disassembler/SystemZ/insns.txt
@@ -907,6 +907,42 @@
 # CHECK: cdgbr %f15, %r15
 0xb3 0xa5 0x00 0xff
 
+# CHECK: cdlfbr	%f0, 0, %r0, 1
+0xb3 0x91 0x01 0x00
+
+# CHECK: cdlfbr	%f0, 0, %r0, 15
+0xb3 0x91 0x0f 0x00
+
+# CHECK: cdlfbr	%f0, 0, %r15, 1
+0xb3 0x91 0x01 0x0f
+
+# CHECK: cdlfbr	%f0, 15, %r0, 1
+0xb3 0x91 0xf1 0x00
+
+# CHECK: cdlfbr	%f4, 5, %r6, 7
+0xb3 0x91 0x57 0x46
+
+# CHECK: cdlfbr	%f15, 0, %r0, 1
+0xb3 0x91 0x01 0xf0
+
+# CHECK: cdlgbr	%f0, 0, %r0, 1
+0xb3 0xa1 0x01 0x00
+
+# CHECK: cdlgbr	%f0, 0, %r0, 15
+0xb3 0xa1 0x0f 0x00
+
+# CHECK: cdlgbr	%f0, 0, %r15, 1
+0xb3 0xa1 0x01 0x0f
+
+# CHECK: cdlgbr	%f0, 15, %r0, 1
+0xb3 0xa1 0xf1 0x00
+
+# CHECK: cdlgbr	%f4, 5, %r6, 7
+0xb3 0xa1 0x57 0x46
+
+# CHECK: cdlgbr	%f15, 0, %r0, 1
+0xb3 0xa1 0x01 0xf0
+
 # CHECK: cebr %f0, %f0
 0xb3 0x09 0x00 0x00
 
@@ -970,6 +1006,42 @@
 # CHECK: cegbr %f15, %r15
 0xb3 0xa4 0x00 0xff
 
+# CHECK: celfbr	%f0, 0, %r0, 1
+0xb3 0x90 0x01 0x00
+
+# CHECK: celfbr	%f0, 0, %r0, 15
+0xb3 0x90 0x0f 0x00
+
+# CHECK: celfbr	%f0, 0, %r15, 1
+0xb3 0x90 0x01 0x0f
+
+# CHECK: celfbr	%f0, 15, %r0, 1
+0xb3 0x90 0xf1 0x00
+
+# CHECK: celfbr	%f4, 5, %r6, 7
+0xb3 0x90 0x57 0x46
+
+# CHECK: celfbr	%f15, 0, %r0, 1
+0xb3 0x90 0x01 0xf0
+
+# CHECK: celgbr	%f0, 0, %r0, 1
+0xb3 0xa0 0x01 0x00
+
+# CHECK: celgbr	%f0, 0, %r0, 15
+0xb3 0xa0 0x0f 0x00
+
+# CHECK: celgbr	%f0, 0, %r15, 1
+0xb3 0xa0 0x01 0x0f
+
+# CHECK: celgbr	%f0, 15, %r0, 1
+0xb3 0xa0 0xf1 0x00
+
+# CHECK: celgbr	%f4, 5, %r6, 7
+0xb3 0xa0 0x57 0x46
+
+# CHECK: celgbr	%f15, 0, %r0, 1
+0xb3 0xa0 0x01 0xf0
+
 # CHECK: cfdbr %r0, 0, %f0
 0xb3 0x99 0x00 0x00
 
@@ -1480,6 +1552,114 @@
 # CHECK: clc 0(256,%r15), 0
 0xd5 0xff 0xf0 0x00 0x00 0x00
 
+# CHECK: clfdbr	%r0, 0, %f0, 1
+0xb3 0x9d 0x01 0x00
+
+# CHECK: clfdbr	%r0, 0, %f0, 15
+0xb3 0x9d 0x0f 0x00
+
+# CHECK: clfdbr	%r0, 0, %f15, 1
+0xb3 0x9d 0x01 0x0f
+
+# CHECK: clfdbr	%r0, 15, %f0, 1
+0xb3 0x9d 0xf1 0x00
+
+# CHECK: clfdbr	%r4, 5, %f6, 7
+0xb3 0x9d 0x57 0x46
+
+# CHECK: clfdbr	%r15, 0, %f0, 1
+0xb3 0x9d 0x01 0xf0
+
+# CHECK: clfebr	%r0, 0, %f0, 1
+0xb3 0x9c 0x01 0x00
+
+# CHECK: clfebr	%r0, 0, %f0, 15
+0xb3 0x9c 0x0f 0x00
+
+# CHECK: clfebr	%r0, 0, %f15, 1
+0xb3 0x9c 0x01 0x0f
+
+# CHECK: clfebr	%r0, 15, %f0, 1
+0xb3 0x9c 0xf1 0x00
+
+# CHECK: clfebr	%r4, 5, %f6, 7
+0xb3 0x9c 0x57 0x46
+
+# CHECK: clfebr	%r15, 0, %f0, 1
+0xb3 0x9c 0x01 0xf0
+
+# CHECK: clfxbr	%r0, 0, %f0, 1
+0xb3 0x9e 0x01 0x00
+
+# CHECK: clfxbr	%r0, 0, %f0, 15
+0xb3 0x9e 0x0f 0x00
+
+# CHECK: clfxbr	%r0, 0, %f13, 1
+0xb3 0x9e 0x01 0x0d
+
+# CHECK: clfxbr	%r0, 15, %f0, 1
+0xb3 0x9e 0xf1 0x00
+
+# CHECK: clfxbr	%r4, 5, %f8, 9
+0xb3 0x9e 0x59 0x48
+
+# CHECK: clfxbr	%r15, 0, %f0, 1
+0xb3 0x9e 0x01 0xf0
+
+# CHECK: clgdbr	%r0, 0, %f0, 1
+0xb3 0xad 0x01 0x00
+
+# CHECK: clgdbr	%r0, 0, %f0, 15
+0xb3 0xad 0x0f 0x00
+
+# CHECK: clgdbr	%r0, 0, %f15, 1
+0xb3 0xad 0x01 0x0f
+
+# CHECK: clgdbr	%r0, 15, %f0, 1
+0xb3 0xad 0xf1 0x00
+
+# CHECK: clgdbr	%r4, 5, %f6, 7
+0xb3 0xad 0x57 0x46
+
+# CHECK: clgdbr	%r15, 0, %f0, 1
+0xb3 0xad 0x01 0xf0
+
+# CHECK: clgebr	%r0, 0, %f0, 1
+0xb3 0xac 0x01 0x00
+
+# CHECK: clgebr	%r0, 0, %f0, 15
+0xb3 0xac 0x0f 0x00
+
+# CHECK: clgebr	%r0, 0, %f15, 1
+0xb3 0xac 0x01 0x0f
+
+# CHECK: clgebr	%r0, 15, %f0, 1
+0xb3 0xac 0xf1 0x00
+
+# CHECK: clgebr	%r4, 5, %f6, 7
+0xb3 0xac 0x57 0x46
+
+# CHECK: clgebr	%r15, 0, %f0, 1
+0xb3 0xac 0x01 0xf0
+
+# CHECK: clgxbr	%r0, 0, %f0, 1
+0xb3 0xae 0x01 0x00
+
+# CHECK: clgxbr	%r0, 0, %f0, 15
+0xb3 0xae 0x0f 0x00
+
+# CHECK: clgxbr	%r0, 0, %f13, 1
+0xb3 0xae 0x01 0x0d
+
+# CHECK: clgxbr	%r0, 15, %f0, 1
+0xb3 0xae 0xf1 0x00
+
+# CHECK: clgxbr	%r4, 5, %f8, 9
+0xb3 0xae 0x59 0x48
+
+# CHECK: clgxbr	%r15, 0, %f0, 1
+0xb3 0xae 0x01 0xf0
+
 # CHECK: clfhsi 0, 0
 0xe5 0x5d 0x00 0x00 0x00 0x00
 
@@ -1996,6 +2176,42 @@
 # CHECK: cxgbr %f13, %r15
 0xb3 0xa6 0x00 0xdf
 
+# CHECK: cxlfbr	%f0, 0, %r0, 1
+0xb3 0x92 0x01 0x00
+
+# CHECK: cxlfbr	%f0, 0, %r0, 15
+0xb3 0x92 0x0f 0x00
+
+# CHECK: cxlfbr	%f0, 0, %r15, 1
+0xb3 0x92 0x01 0x0f
+
+# CHECK: cxlfbr	%f0, 15, %r0, 1
+0xb3 0x92 0xf1 0x00
+
+# CHECK: cxlfbr	%f4, 5, %r6, 7
+0xb3 0x92 0x57 0x46
+
+# CHECK: cxlfbr	%f13, 0, %r0, 1
+0xb3 0x92 0x01 0xd0
+
+# CHECK: cxlgbr	%f0, 0, %r0, 1
+0xb3 0xa2 0x01 0x00
+
+# CHECK: cxlgbr	%f0, 0, %r0, 15
+0xb3 0xa2 0x0f 0x00
+
+# CHECK: cxlgbr	%f0, 0, %r15, 1
+0xb3 0xa2 0x01 0x0f
+
+# CHECK: cxlgbr	%f0, 15, %r0, 1
+0xb3 0xa2 0xf1 0x00
+
+# CHECK: cxlgbr	%f4, 5, %r6, 7
+0xb3 0xa2 0x57 0x46
+
+# CHECK: cxlgbr	%f13, 0, %r0, 1
+0xb3 0xa2 0x01 0xd0
+
 # CHECK: cy %r0, -524288
 0xe3 0x00 0x00 0x00 0x80 0x59
 
@@ -2545,6 +2761,336 @@
 # CHECK: la %r15, 0
 0x41 0xf0 0x00 0x00
 
+# CHECK: laa %r0, %r0, -524288
+0xeb 0x00 0x00 0x00 0x80 0xf8
+
+# CHECK: laa %r0, %r0, -1
+0xeb 0x00 0x0f 0xff 0xff 0xf8
+
+# CHECK: laa %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0xf8
+
+# CHECK: laa %r0, %r0, 1
+0xeb 0x00 0x00 0x01 0x00 0xf8
+
+# CHECK: laa %r0, %r0, 524287
+0xeb 0x00 0x0f 0xff 0x7f 0xf8
+
+# CHECK: laa %r0, %r0, 0(%r1)
+0xeb 0x00 0x10 0x00 0x00 0xf8
+
+# CHECK: laa %r0, %r0, 0(%r15)
+0xeb 0x00 0xf0 0x00 0x00 0xf8
+
+# CHECK: laa %r0, %r0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0xf8
+
+# CHECK: laa %r0, %r0, 524287(%r15)
+0xeb 0x00 0xff 0xff 0x7f 0xf8
+
+# CHECK: laa %r0, %r15, 0
+0xeb 0x0f 0x00 0x00 0x00 0xf8
+
+# CHECK: laa %r15, %r0, 0
+0xeb 0xf0 0x00 0x00 0x00 0xf8
+
+# CHECK: laag %r0, %r0, -524288
+0xeb 0x00 0x00 0x00 0x80 0xe8
+
+# CHECK: laag %r0, %r0, -1
+0xeb 0x00 0x0f 0xff 0xff 0xe8
+
+# CHECK: laag %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0xe8
+
+# CHECK: laag %r0, %r0, 1
+0xeb 0x00 0x00 0x01 0x00 0xe8
+
+# CHECK: laag %r0, %r0, 524287
+0xeb 0x00 0x0f 0xff 0x7f 0xe8
+
+# CHECK: laag %r0, %r0, 0(%r1)
+0xeb 0x00 0x10 0x00 0x00 0xe8
+
+# CHECK: laag %r0, %r0, 0(%r15)
+0xeb 0x00 0xf0 0x00 0x00 0xe8
+
+# CHECK: laag %r0, %r0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0xe8
+
+# CHECK: laag %r0, %r0, 524287(%r15)
+0xeb 0x00 0xff 0xff 0x7f 0xe8
+
+# CHECK: laag %r0, %r15, 0
+0xeb 0x0f 0x00 0x00 0x00 0xe8
+
+# CHECK: laag %r15, %r0, 0
+0xeb 0xf0 0x00 0x00 0x00 0xe8
+
+# CHECK: laal %r0, %r0, -524288
+0xeb 0x00 0x00 0x00 0x80 0xfa
+
+# CHECK: laal %r0, %r0, -1
+0xeb 0x00 0x0f 0xff 0xff 0xfa
+
+# CHECK: laal %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0xfa
+
+# CHECK: laal %r0, %r0, 1
+0xeb 0x00 0x00 0x01 0x00 0xfa
+
+# CHECK: laal %r0, %r0, 524287
+0xeb 0x00 0x0f 0xff 0x7f 0xfa
+
+# CHECK: laal %r0, %r0, 0(%r1)
+0xeb 0x00 0x10 0x00 0x00 0xfa
+
+# CHECK: laal %r0, %r0, 0(%r15)
+0xeb 0x00 0xf0 0x00 0x00 0xfa
+
+# CHECK: laal %r0, %r0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0xfa
+
+# CHECK: laal %r0, %r0, 524287(%r15)
+0xeb 0x00 0xff 0xff 0x7f 0xfa
+
+# CHECK: laal %r0, %r15, 0
+0xeb 0x0f 0x00 0x00 0x00 0xfa
+
+# CHECK: laal %r15, %r0, 0
+0xeb 0xf0 0x00 0x00 0x00 0xfa
+
+# CHECK: laalg %r0, %r0, -524288
+0xeb 0x00 0x00 0x00 0x80 0xea
+
+# CHECK: laalg %r0, %r0, -1
+0xeb 0x00 0x0f 0xff 0xff 0xea
+
+# CHECK: laalg %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0xea
+
+# CHECK: laalg %r0, %r0, 1
+0xeb 0x00 0x00 0x01 0x00 0xea
+
+# CHECK: laalg %r0, %r0, 524287
+0xeb 0x00 0x0f 0xff 0x7f 0xea
+
+# CHECK: laalg %r0, %r0, 0(%r1)
+0xeb 0x00 0x10 0x00 0x00 0xea
+
+# CHECK: laalg %r0, %r0, 0(%r15)
+0xeb 0x00 0xf0 0x00 0x00 0xea
+
+# CHECK: laalg %r0, %r0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0xea
+
+# CHECK: laalg %r0, %r0, 524287(%r15)
+0xeb 0x00 0xff 0xff 0x7f 0xea
+
+# CHECK: laalg %r0, %r15, 0
+0xeb 0x0f 0x00 0x00 0x00 0xea
+
+# CHECK: laalg %r15, %r0, 0
+0xeb 0xf0 0x00 0x00 0x00 0xea
+
+# CHECK: lan %r0, %r0, -524288
+0xeb 0x00 0x00 0x00 0x80 0xf4
+
+# CHECK: lan %r0, %r0, -1
+0xeb 0x00 0x0f 0xff 0xff 0xf4
+
+# CHECK: lan %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0xf4
+
+# CHECK: lan %r0, %r0, 1
+0xeb 0x00 0x00 0x01 0x00 0xf4
+
+# CHECK: lan %r0, %r0, 524287
+0xeb 0x00 0x0f 0xff 0x7f 0xf4
+
+# CHECK: lan %r0, %r0, 0(%r1)
+0xeb 0x00 0x10 0x00 0x00 0xf4
+
+# CHECK: lan %r0, %r0, 0(%r15)
+0xeb 0x00 0xf0 0x00 0x00 0xf4
+
+# CHECK: lan %r0, %r0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0xf4
+
+# CHECK: lan %r0, %r0, 524287(%r15)
+0xeb 0x00 0xff 0xff 0x7f 0xf4
+
+# CHECK: lan %r0, %r15, 0
+0xeb 0x0f 0x00 0x00 0x00 0xf4
+
+# CHECK: lan %r15, %r0, 0
+0xeb 0xf0 0x00 0x00 0x00 0xf4
+
+# CHECK: csy %r0, %r0, -524288
+0xeb 0x00 0x00 0x00 0x80 0x14
+
+# CHECK: lang %r0, %r0, -1
+0xeb 0x00 0x0f 0xff 0xff 0xe4
+
+# CHECK: lang %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0xe4
+
+# CHECK: lang %r0, %r0, 1
+0xeb 0x00 0x00 0x01 0x00 0xe4
+
+# CHECK: lang %r0, %r0, 524287
+0xeb 0x00 0x0f 0xff 0x7f 0xe4
+
+# CHECK: lang %r0, %r0, 0(%r1)
+0xeb 0x00 0x10 0x00 0x00 0xe4
+
+# CHECK: lang %r0, %r0, 0(%r15)
+0xeb 0x00 0xf0 0x00 0x00 0xe4
+
+# CHECK: lang %r0, %r0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0xe4
+
+# CHECK: lang %r0, %r0, 524287(%r15)
+0xeb 0x00 0xff 0xff 0x7f 0xe4
+
+# CHECK: lang %r0, %r15, 0
+0xeb 0x0f 0x00 0x00 0x00 0xe4
+
+# CHECK: lang %r15, %r0, 0
+0xeb 0xf0 0x00 0x00 0x00 0xe4
+
+# CHECK: lao %r0, %r0, -524288
+0xeb 0x00 0x00 0x00 0x80 0xf6
+
+# CHECK: lao %r0, %r0, -1
+0xeb 0x00 0x0f 0xff 0xff 0xf6
+
+# CHECK: lao %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0xf6
+
+# CHECK: lao %r0, %r0, 1
+0xeb 0x00 0x00 0x01 0x00 0xf6
+
+# CHECK: lao %r0, %r0, 524287
+0xeb 0x00 0x0f 0xff 0x7f 0xf6
+
+# CHECK: lao %r0, %r0, 0(%r1)
+0xeb 0x00 0x10 0x00 0x00 0xf6
+
+# CHECK: lao %r0, %r0, 0(%r15)
+0xeb 0x00 0xf0 0x00 0x00 0xf6
+
+# CHECK: lao %r0, %r0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0xf6
+
+# CHECK: lao %r0, %r0, 524287(%r15)
+0xeb 0x00 0xff 0xff 0x7f 0xf6
+
+# CHECK: lao %r0, %r15, 0
+0xeb 0x0f 0x00 0x00 0x00 0xf6
+
+# CHECK: lao %r15, %r0, 0
+0xeb 0xf0 0x00 0x00 0x00 0xf6
+
+# CHECK: laog %r0, %r0, -524288
+0xeb 0x00 0x00 0x00 0x80 0xe6
+
+# CHECK: laog %r0, %r0, -1
+0xeb 0x00 0x0f 0xff 0xff 0xe6
+
+# CHECK: laog %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0xe6
+
+# CHECK: laog %r0, %r0, 1
+0xeb 0x00 0x00 0x01 0x00 0xe6
+
+# CHECK: laog %r0, %r0, 524287
+0xeb 0x00 0x0f 0xff 0x7f 0xe6
+
+# CHECK: laog %r0, %r0, 0(%r1)
+0xeb 0x00 0x10 0x00 0x00 0xe6
+
+# CHECK: laog %r0, %r0, 0(%r15)
+0xeb 0x00 0xf0 0x00 0x00 0xe6
+
+# CHECK: laog %r0, %r0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0xe6
+
+# CHECK: laog %r0, %r0, 524287(%r15)
+0xeb 0x00 0xff 0xff 0x7f 0xe6
+
+# CHECK: laog %r0, %r15, 0
+0xeb 0x0f 0x00 0x00 0x00 0xe6
+
+# CHECK: laog %r15, %r0, 0
+0xeb 0xf0 0x00 0x00 0x00 0xe6
+
+# CHECK: lax %r0, %r0, -524288
+0xeb 0x00 0x00 0x00 0x80 0xf7
+
+# CHECK: lax %r0, %r0, -1
+0xeb 0x00 0x0f 0xff 0xff 0xf7
+
+# CHECK: lax %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0xf7
+
+# CHECK: lax %r0, %r0, 1
+0xeb 0x00 0x00 0x01 0x00 0xf7
+
+# CHECK: lax %r0, %r0, 524287
+0xeb 0x00 0x0f 0xff 0x7f 0xf7
+
+# CHECK: lax %r0, %r0, 0(%r1)
+0xeb 0x00 0x10 0x00 0x00 0xf7
+
+# CHECK: lax %r0, %r0, 0(%r15)
+0xeb 0x00 0xf0 0x00 0x00 0xf7
+
+# CHECK: lax %r0, %r0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0xf7
+
+# CHECK: lax %r0, %r0, 524287(%r15)
+0xeb 0x00 0xff 0xff 0x7f 0xf7
+
+# CHECK: lax %r0, %r15, 0
+0xeb 0x0f 0x00 0x00 0x00 0xf7
+
+# CHECK: lax %r15, %r0, 0
+0xeb 0xf0 0x00 0x00 0x00 0xf7
+
+# CHECK: laxg %r0, %r0, -524288
+0xeb 0x00 0x00 0x00 0x80 0xe7
+
+# CHECK: laxg %r0, %r0, -1
+0xeb 0x00 0x0f 0xff 0xff 0xe7
+
+# CHECK: laxg %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0xe7
+
+# CHECK: laxg %r0, %r0, 1
+0xeb 0x00 0x00 0x01 0x00 0xe7
+
+# CHECK: laxg %r0, %r0, 524287
+0xeb 0x00 0x0f 0xff 0x7f 0xe7
+
+# CHECK: laxg %r0, %r0, 0(%r1)
+0xeb 0x00 0x10 0x00 0x00 0xe7
+
+# CHECK: laxg %r0, %r0, 0(%r15)
+0xeb 0x00 0xf0 0x00 0x00 0xe7
+
+# CHECK: laxg %r0, %r0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0xe7
+
+# CHECK: laxg %r0, %r0, 524287(%r15)
+0xeb 0x00 0xff 0xff 0x7f 0xe7
+
+# CHECK: laxg %r0, %r15, 0
+0xeb 0x0f 0x00 0x00 0x00 0xe7
+
+# CHECK: laxg %r15, %r0, 0
+0xeb 0xf0 0x00 0x00 0x00 0xe7
+
 # CHECK: lay %r0, -524288
 0xe3 0x00 0x00 0x00 0x80 0x71
 
diff --git a/test/MC/Disassembler/X86/avx-512.txt b/test/MC/Disassembler/X86/avx-512.txt
new file mode 100644
index 0000000..e5ad2a9
--- /dev/null
+++ b/test/MC/Disassembler/X86/avx-512.txt
@@ -0,0 +1,59 @@
+# RUN: llvm-mc --disassemble %s -triple=x86_64-apple-darwin9 -mcpu=knl | FileCheck %s
+
+# CHECK: vpbroadcastd    %xmm18, %zmm28 {%k7} {z}
+0x62 0x22 0x7d 0xcf 0x58 0xe2
+
+# CHECK: vbroadcastss    (%rsp), %zmm28
+0x62 0x62 0x7d 0x48 0x18 0x24 0x24
+
+# CHECK: vblendmpd       (%rsi), %zmm2, %zmm8 {%k7}
+0x62 0x72 0xed 0x4f 0x65 0x06
+
+# CHECK: vpermpd (%rsi,%r10,4), %zmm2, %zmm8
+0x62 0x32 0xed 0x48 0x16 0x04 0x96
+
+# CHECK: vpbroadcastmw2d %k2, %zmm8
+0x62 0xd2 0x7e 0x48 0x3a 0xd0
+
+# CHECK: vpbroadcastq    (%r9,%rax), %zmm28
+0x62 0x42 0xfd 0x48 0x59 0x24 0x01
+
+# CHECK: vbroadcastss    %xmm0, %zmm1
+0x62 0xf2 0x7d 0x48 0x18 0xc8
+
+# CHECK: vextracti32x4   $4, %zmm0, (%r10)
+0x62 0xd3 0x7d 0x48 0x39 0x02 0x04
+
+# CHECK: vextracti32x4   $4, %zmm0, %xmm1
+0x62 0xf3 0x7d 0x48 0x39 0xc1 0x04
+
+# CHECK: vinserti32x4    $1, %xmm21, %zmm5, %zmm17
+0x62 0xa3 0x55 0x48 0x38 0xcd 0x01
+
+# CHECK: vmovaps %zmm21, %zmm5 {%k3}
+0x62 0xb1 0x7c 0x4b 0x28 0xed
+
+# CHECK: vgatherdps      (%rsi,%zmm0,4), %zmm1 {%k2}
+0x62 0xf2 0x7d 0x4a 0x92 0x0c 0x86
+
+# CHECK: vgatherdpd      (%rsi,%ymm0,4), %zmm1 {%k2}
+0x62 0xf2 0xfd 0x4a 0x92 0x0c 0x86
+
+#####################################################
+#                MASK INSTRUCTIONS                  #
+#####################################################
+
+# CHECK: kshiftlw        $3, %k1, %k2
+0xc4 0xe3 0xf9 0x32 0xd1 0x03
+
+# CHECK: kmovw   (%rdi), %k1
+0xc5 0xf8 0x90 0x0f
+
+# CHECK: kmovw   %k1, %eax
+0xc5 0xf8 0x93 0xc1
+
+# CHECK: kandw   %k1, %k2, %k3
+0xc5 0xec 0x41 0xd9
+
+# CHECK: kmovw   %k5, %k1
+0xc5 0xf8 0x90 0xcd
diff --git a/test/MC/Disassembler/X86/fp-stack.txt b/test/MC/Disassembler/X86/fp-stack.txt
new file mode 100644
index 0000000..f9aa402
--- /dev/null
+++ b/test/MC/Disassembler/X86/fp-stack.txt
@@ -0,0 +1,1037 @@
+# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s
+# RUN: llvm-mc --disassemble %s -triple=i686-apple-darwin9 | FileCheck %s
+
+# CHECK: fadd %st(0)
+0xd8,0xc0
+
+# CHECK: fadd %st(1)
+0xd8,0xc1
+
+# CHECK: fadd %st(2)
+0xd8,0xc2
+
+# CHECK: fadd %st(3)
+0xd8,0xc3
+
+# CHECK: fadd %st(4)
+0xd8,0xc4
+
+# CHECK: fadd %st(5)
+0xd8,0xc5
+
+# CHECK: fadd %st(6)
+0xd8,0xc6
+
+# CHECK: fadd %st(7)
+0xd8,0xc7
+
+# CHECK: fmul %st(0)
+0xd8,0xc8
+
+# CHECK: fmul %st(1)
+0xd8,0xc9
+
+# CHECK: fmul %st(2)
+0xd8,0xca
+
+# CHECK: fmul %st(3)
+0xd8,0xcb
+
+# CHECK: fmul %st(4)
+0xd8,0xcc
+
+# CHECK: fmul %st(5)
+0xd8,0xcd
+
+# CHECK: fmul %st(6)
+0xd8,0xce
+
+# CHECK: fmul %st(7)
+0xd8,0xcf
+
+# CHECK: fcom %st(0)
+0xd8,0xd0
+
+# CHECK: fcom %st(1)
+0xd8,0xd1
+
+# CHECK: fcom %st(2)
+0xd8,0xd2
+
+# CHECK: fcom %st(3)
+0xd8,0xd3
+
+# CHECK: fcom %st(4)
+0xd8,0xd4
+
+# CHECK: fcom %st(5)
+0xd8,0xd5
+
+# CHECK: fcom %st(6)
+0xd8,0xd6
+
+# CHECK: fcom %st(7)
+0xd8,0xd7
+
+# CHECK: fcomp %st(0)
+0xd8,0xd8
+
+# CHECK: fcomp %st(1)
+0xd8,0xd9
+
+# CHECK: fcomp %st(2)
+0xd8,0xda
+
+# CHECK: fcomp %st(3)
+0xd8,0xdb
+
+# CHECK: fcomp %st(4)
+0xd8,0xdc
+
+# CHECK: fcomp %st(5)
+0xd8,0xdd
+
+# CHECK: fcomp %st(6)
+0xd8,0xde
+
+# CHECK: fcomp %st(7)
+0xd8,0xdf
+
+# CHECK: fsub %st(0)
+0xd8,0xe0
+
+# CHECK: fsub %st(1)
+0xd8,0xe1
+
+# CHECK: fsub %st(2)
+0xd8,0xe2
+
+# CHECK: fsub %st(3)
+0xd8,0xe3
+
+# CHECK: fsub %st(4)
+0xd8,0xe4
+
+# CHECK: fsub %st(5)
+0xd8,0xe5
+
+# CHECK: fsub %st(6)
+0xd8,0xe6
+
+# CHECK: fsub %st(7)
+0xd8,0xe7
+
+# CHECK: fsubr %st(0)
+0xd8,0xe8
+
+# CHECK: fsubr %st(1)
+0xd8,0xe9
+
+# CHECK: fsubr %st(2)
+0xd8,0xea
+
+# CHECK: fsubr %st(3)
+0xd8,0xeb
+
+# CHECK: fsubr %st(4)
+0xd8,0xec
+
+# CHECK: fsubr %st(5)
+0xd8,0xed
+
+# CHECK: fsubr %st(6)
+0xd8,0xee
+
+# CHECK: fsubr %st(7)
+0xd8,0xef
+
+# CHECK: fdiv %st(0)
+0xd8,0xf0
+
+# CHECK: fdiv %st(1)
+0xd8,0xf1
+
+# CHECK: fdiv %st(2)
+0xd8,0xf2
+
+# CHECK: fdiv %st(3)
+0xd8,0xf3
+
+# CHECK: fdiv %st(4)
+0xd8,0xf4
+
+# CHECK: fdiv %st(5)
+0xd8,0xf5
+
+# CHECK: fdiv %st(6)
+0xd8,0xf6
+
+# CHECK: fdiv %st(7)
+0xd8,0xf7
+
+# CHECK: fdivr %st(0)
+0xd8,0xf8
+
+# CHECK: fdivr %st(1)
+0xd8,0xf9
+
+# CHECK: fdivr %st(2)
+0xd8,0xfa
+
+# CHECK: fdivr %st(3)
+0xd8,0xfb
+
+# CHECK: fdivr %st(4)
+0xd8,0xfc
+
+# CHECK: fdivr %st(5)
+0xd8,0xfd
+
+# CHECK: fdivr %st(6)
+0xd8,0xfe
+
+# CHECK: fdivr %st(7)
+0xd8,0xff
+
+# CHECK: fld %st(0)
+0xd9,0xc0
+
+# CHECK: fld %st(1)
+0xd9,0xc1
+
+# CHECK: fld %st(2)
+0xd9,0xc2
+
+# CHECK: fld %st(3)
+0xd9,0xc3
+
+# CHECK: fld %st(4)
+0xd9,0xc4
+
+# CHECK: fld %st(5)
+0xd9,0xc5
+
+# CHECK: fld %st(6)
+0xd9,0xc6
+
+# CHECK: fld %st(7)
+0xd9,0xc7
+
+# CHECK: fxch %st(0)
+0xd9,0xc8
+
+# CHECK: fxch %st(1)
+0xd9,0xc9
+
+# CHECK: fxch %st(2)
+0xd9,0xca
+
+# CHECK: fxch %st(3)
+0xd9,0xcb
+
+# CHECK: fxch %st(4)
+0xd9,0xcc
+
+# CHECK: fxch %st(5)
+0xd9,0xcd
+
+# CHECK: fxch %st(6)
+0xd9,0xce
+
+# CHECK: fxch %st(7)
+0xd9,0xcf
+
+# CHECK: fnop
+0xd9,0xd0
+
+# CHECK: fchs
+0xd9,0xe0
+
+# CHECK: fabs
+0xd9,0xe1
+
+# CHECK: ftst
+0xd9,0xe4
+
+# CHECK: fxam
+0xd9,0xe5
+
+# CHECK: fld1
+0xd9,0xe8
+
+# CHECK: fldl2t
+0xd9,0xe9
+
+# CHECK: fldl2e
+0xd9,0xea
+
+# CHECK: fldpi
+0xd9,0xeb
+
+# CHECK: fldlg2
+0xd9,0xec
+
+# CHECK: fldln2
+0xd9,0xed
+
+# CHECK: fldz
+0xd9,0xee
+
+# CHECK: f2xm1
+0xd9,0xf0
+
+# CHECK: fyl2x
+0xd9,0xf1
+
+# CHECK: fptan
+0xd9,0xf2
+
+# CHECK: fpatan
+0xd9,0xf3
+
+# CHECK: fxtract
+0xd9,0xf4
+
+# CHECK: fprem1
+0xd9,0xf5
+
+# CHECK: fdecstp
+0xd9,0xf6
+
+# CHECK: fincstp
+0xd9,0xf7
+
+# CHECK: fprem
+0xd9,0xf8
+
+# CHECK: fyl2xp1
+0xd9,0xf9
+
+# CHECK: fsqrt
+0xd9,0xfa
+
+# CHECK: fsincos
+0xd9,0xfb
+
+# CHECK: frndint
+0xd9,0xfc
+
+# CHECK: fscale
+0xd9,0xfd
+
+# CHECK: fsin
+0xd9,0xfe
+
+# CHECK: fcos
+0xd9,0xff
+
+# CHECK: fcmovb %st(0), %st(0)
+0xda,0xc0
+
+# CHECK: fcmovb %st(1), %st(0)
+0xda,0xc1
+
+# CHECK: fcmovb %st(2), %st(0)
+0xda,0xc2
+
+# CHECK: fcmovb %st(3), %st(0)
+0xda,0xc3
+
+# CHECK: fcmovb %st(4), %st(0)
+0xda,0xc4
+
+# CHECK: fcmovb %st(5), %st(0)
+0xda,0xc5
+
+# CHECK: fcmovb %st(6), %st(0)
+0xda,0xc6
+
+# CHECK: fcmovb %st(7), %st(0)
+0xda,0xc7
+
+# CHECK: fcmove %st(0), %st(0)
+0xda,0xc8
+
+# CHECK: fcmove %st(1), %st(0)
+0xda,0xc9
+
+# CHECK: fcmove %st(2), %st(0)
+0xda,0xca
+
+# CHECK: fcmove %st(3), %st(0)
+0xda,0xcb
+
+# CHECK: fcmove %st(4), %st(0)
+0xda,0xcc
+
+# CHECK: fcmove %st(5), %st(0)
+0xda,0xcd
+
+# CHECK: fcmove %st(6), %st(0)
+0xda,0xce
+
+# CHECK: fcmove %st(7), %st(0)
+0xda,0xcf
+
+# CHECK: fcmovbe %st(0), %st(0)
+0xda,0xd0
+
+# CHECK: fcmovbe %st(1), %st(0)
+0xda,0xd1
+
+# CHECK: fcmovbe %st(2), %st(0)
+0xda,0xd2
+
+# CHECK: fcmovbe %st(3), %st(0)
+0xda,0xd3
+
+# CHECK: fcmovbe %st(4), %st(0)
+0xda,0xd4
+
+# CHECK: fcmovbe %st(5), %st(0)
+0xda,0xd5
+
+# CHECK: fcmovbe %st(6), %st(0)
+0xda,0xd6
+
+# CHECK: fcmovbe %st(7), %st(0)
+0xda,0xd7
+
+# CHECK: fcmovu %st(0), %st(0)
+0xda,0xd8
+
+# CHECK: fcmovu %st(1), %st(0)
+0xda,0xd9
+
+# CHECK: fcmovu %st(2), %st(0)
+0xda,0xda
+
+# CHECK: fcmovu %st(3), %st(0)
+0xda,0xdb
+
+# CHECK: fcmovu %st(4), %st(0)
+0xda,0xdc
+
+# CHECK: fcmovu %st(5), %st(0)
+0xda,0xdd
+
+# CHECK: fcmovu %st(6), %st(0)
+0xda,0xde
+
+# CHECK: fcmovu %st(7), %st(0)
+0xda,0xdf
+
+# CHECK: fucompp
+0xda,0xe9
+
+# CHECK: fcmovnb %st(0), %st(0)
+0xdb,0xc0
+
+# CHECK: fcmovnb %st(1), %st(0)
+0xdb,0xc1
+
+# CHECK: fcmovnb %st(2), %st(0)
+0xdb,0xc2
+
+# CHECK: fcmovnb %st(3), %st(0)
+0xdb,0xc3
+
+# CHECK: fcmovnb %st(4), %st(0)
+0xdb,0xc4
+
+# CHECK: fcmovnb %st(5), %st(0)
+0xdb,0xc5
+
+# CHECK: fcmovnb %st(6), %st(0)
+0xdb,0xc6
+
+# CHECK: fcmovnb %st(7), %st(0)
+0xdb,0xc7
+
+# CHECK: fcmovne %st(0), %st(0)
+0xdb,0xc8
+
+# CHECK: fcmovne %st(1), %st(0)
+0xdb,0xc9
+
+# CHECK: fcmovne %st(2), %st(0)
+0xdb,0xca
+
+# CHECK: fcmovne %st(3), %st(0)
+0xdb,0xcb
+
+# CHECK: fcmovne %st(4), %st(0)
+0xdb,0xcc
+
+# CHECK: fcmovne %st(5), %st(0)
+0xdb,0xcd
+
+# CHECK: fcmovne %st(6), %st(0)
+0xdb,0xce
+
+# CHECK: fcmovne %st(7), %st(0)
+0xdb,0xcf
+
+# CHECK: fcmovnbe %st(0), %st(0)
+0xdb,0xd0
+
+# CHECK: fcmovnbe %st(1), %st(0)
+0xdb,0xd1
+
+# CHECK: fcmovnbe %st(2), %st(0)
+0xdb,0xd2
+
+# CHECK: fcmovnbe %st(3), %st(0)
+0xdb,0xd3
+
+# CHECK: fcmovnbe %st(4), %st(0)
+0xdb,0xd4
+
+# CHECK: fcmovnbe %st(5), %st(0)
+0xdb,0xd5
+
+# CHECK: fcmovnbe %st(6), %st(0)
+0xdb,0xd6
+
+# CHECK: fcmovnbe %st(7), %st(0)
+0xdb,0xd7
+
+# CHECK: fcmovnu %st(0), %st(0)
+0xdb,0xd8
+
+# CHECK: fcmovnu %st(1), %st(0)
+0xdb,0xd9
+
+# CHECK: fcmovnu %st(2), %st(0)
+0xdb,0xda
+
+# CHECK: fcmovnu %st(3), %st(0)
+0xdb,0xdb
+
+# CHECK: fcmovnu %st(4), %st(0)
+0xdb,0xdc
+
+# CHECK: fcmovnu %st(5), %st(0)
+0xdb,0xdd
+
+# CHECK: fcmovnu %st(6), %st(0)
+0xdb,0xde
+
+# CHECK: fcmovnu %st(7), %st(0)
+0xdb,0xdf
+
+# CHECK: fnclex
+0xdb,0xe2
+
+# CHECK: fninit
+0xdb,0xe3
+
+# CHECK: fucomi %st(0)
+0xdb,0xe8
+
+# CHECK: fucomi %st(1)
+0xdb,0xe9
+
+# CHECK: fucomi %st(2)
+0xdb,0xea
+
+# CHECK: fucomi %st(3)
+0xdb,0xeb
+
+# CHECK: fucomi %st(4)
+0xdb,0xec
+
+# CHECK: fucomi %st(5)
+0xdb,0xed
+
+# CHECK: fucomi %st(6)
+0xdb,0xee
+
+# CHECK: fucomi %st(7)
+0xdb,0xef
+
+# CHECK: fcomi %st(0)
+0xdb,0xf0
+
+# CHECK: fcomi %st(1)
+0xdb,0xf1
+
+# CHECK: fcomi %st(2)
+0xdb,0xf2
+
+# CHECK: fcomi %st(3)
+0xdb,0xf3
+
+# CHECK: fcomi %st(4)
+0xdb,0xf4
+
+# CHECK: fcomi %st(5)
+0xdb,0xf5
+
+# CHECK: fcomi %st(6)
+0xdb,0xf6
+
+# CHECK: fcomi %st(7)
+0xdb,0xf7
+
+# CHECK: fadd %st(0), %st(0)
+0xdc,0xc0
+
+# CHECK: fadd %st(0), %st(1)
+0xdc,0xc1
+
+# CHECK: fadd %st(0), %st(2)
+0xdc,0xc2
+
+# CHECK: fadd %st(0), %st(3)
+0xdc,0xc3
+
+# CHECK: fadd %st(0), %st(4)
+0xdc,0xc4
+
+# CHECK: fadd %st(0), %st(5)
+0xdc,0xc5
+
+# CHECK: fadd %st(0), %st(6)
+0xdc,0xc6
+
+# CHECK: fadd %st(0), %st(7)
+0xdc,0xc7
+
+# CHECK: fmul %st(0), %st(0)
+0xdc,0xc8
+
+# CHECK: fmul %st(0), %st(1)
+0xdc,0xc9
+
+# CHECK: fmul %st(0), %st(2)
+0xdc,0xca
+
+# CHECK: fmul %st(0), %st(3)
+0xdc,0xcb
+
+# CHECK: fmul %st(0), %st(4)
+0xdc,0xcc
+
+# CHECK: fmul %st(0), %st(5)
+0xdc,0xcd
+
+# CHECK: fmul %st(0), %st(6)
+0xdc,0xce
+
+# CHECK: fmul %st(0), %st(7)
+0xdc,0xcf
+
+# CHECK: fsub %st(0), %st(0)
+0xdc,0xe0
+
+# CHECK: fsub %st(0), %st(1)
+0xdc,0xe1
+
+# CHECK: fsub %st(0), %st(2)
+0xdc,0xe2
+
+# CHECK: fsub %st(0), %st(3)
+0xdc,0xe3
+
+# CHECK: fsub %st(0), %st(4)
+0xdc,0xe4
+
+# CHECK: fsub %st(0), %st(5)
+0xdc,0xe5
+
+# CHECK: fsub %st(0), %st(6)
+0xdc,0xe6
+
+# CHECK: fsub %st(0), %st(7)
+0xdc,0xe7
+
+# CHECK: fsubr %st(0), %st(0)
+0xdc,0xe8
+
+# CHECK: fsubr %st(0), %st(1)
+0xdc,0xe9
+
+# CHECK: fsubr %st(0), %st(2)
+0xdc,0xea
+
+# CHECK: fsubr %st(0), %st(3)
+0xdc,0xeb
+
+# CHECK: fsubr %st(0), %st(4)
+0xdc,0xec
+
+# CHECK: fsubr %st(0), %st(5)
+0xdc,0xed
+
+# CHECK: fsubr %st(0), %st(6)
+0xdc,0xee
+
+# CHECK: fsubr %st(0), %st(7)
+0xdc,0xef
+
+# CHECK: fdiv %st(0), %st(0)
+0xdc,0xf0
+
+# CHECK: fdiv %st(0), %st(1)
+0xdc,0xf1
+
+# CHECK: fdiv %st(0), %st(2)
+0xdc,0xf2
+
+# CHECK: fdiv %st(0), %st(3)
+0xdc,0xf3
+
+# CHECK: fdiv %st(0), %st(4)
+0xdc,0xf4
+
+# CHECK: fdiv %st(0), %st(5)
+0xdc,0xf5
+
+# CHECK: fdiv %st(0), %st(6)
+0xdc,0xf6
+
+# CHECK: fdiv %st(0), %st(7)
+0xdc,0xf7
+
+# CHECK: fdivr %st(0), %st(0)
+0xdc,0xf8
+
+# CHECK: fdivr %st(0), %st(1)
+0xdc,0xf9
+
+# CHECK: fdivr %st(0), %st(2)
+0xdc,0xfa
+
+# CHECK: fdivr %st(0), %st(3)
+0xdc,0xfb
+
+# CHECK: fdivr %st(0), %st(4)
+0xdc,0xfc
+
+# CHECK: fdivr %st(0), %st(5)
+0xdc,0xfd
+
+# CHECK: fdivr %st(0), %st(6)
+0xdc,0xfe
+
+# CHECK: fdivr %st(0), %st(7)
+0xdc,0xff
+
+# CHECK: ffree %st(0)
+0xdd,0xc0
+
+# CHECK: ffree %st(1)
+0xdd,0xc1
+
+# CHECK: ffree %st(2)
+0xdd,0xc2
+
+# CHECK: ffree %st(3)
+0xdd,0xc3
+
+# CHECK: ffree %st(4)
+0xdd,0xc4
+
+# CHECK: ffree %st(5)
+0xdd,0xc5
+
+# CHECK: ffree %st(6)
+0xdd,0xc6
+
+# CHECK: ffree %st(7)
+0xdd,0xc7
+
+# CHECK: fst %st(0)
+0xdd,0xd0
+
+# CHECK: fst %st(1)
+0xdd,0xd1
+
+# CHECK: fst %st(2)
+0xdd,0xd2
+
+# CHECK: fst %st(3)
+0xdd,0xd3
+
+# CHECK: fst %st(4)
+0xdd,0xd4
+
+# CHECK: fst %st(5)
+0xdd,0xd5
+
+# CHECK: fst %st(6)
+0xdd,0xd6
+
+# CHECK: fst %st(7)
+0xdd,0xd7
+
+# CHECK: fstp %st(0)
+0xdd,0xd8
+
+# CHECK: fstp %st(1)
+0xdd,0xd9
+
+# CHECK: fstp %st(2)
+0xdd,0xda
+
+# CHECK: fstp %st(3)
+0xdd,0xdb
+
+# CHECK: fstp %st(4)
+0xdd,0xdc
+
+# CHECK: fstp %st(5)
+0xdd,0xdd
+
+# CHECK: fstp %st(6)
+0xdd,0xde
+
+# CHECK: fstp %st(7)
+0xdd,0xdf
+
+# CHECK: fucom %st(0)
+0xdd,0xe0
+
+# CHECK: fucom %st(1)
+0xdd,0xe1
+
+# CHECK: fucom %st(2)
+0xdd,0xe2
+
+# CHECK: fucom %st(3)
+0xdd,0xe3
+
+# CHECK: fucom %st(4)
+0xdd,0xe4
+
+# CHECK: fucom %st(5)
+0xdd,0xe5
+
+# CHECK: fucom %st(6)
+0xdd,0xe6
+
+# CHECK: fucom %st(7)
+0xdd,0xe7
+
+# CHECK: fucomp %st(0)
+0xdd,0xe8
+
+# CHECK: fucomp %st(1)
+0xdd,0xe9
+
+# CHECK: fucomp %st(2)
+0xdd,0xea
+
+# CHECK: fucomp %st(3)
+0xdd,0xeb
+
+# CHECK: fucomp %st(4)
+0xdd,0xec
+
+# CHECK: fucomp %st(5)
+0xdd,0xed
+
+# CHECK: fucomp %st(6)
+0xdd,0xee
+
+# CHECK: fucomp %st(7)
+0xdd,0xef
+
+# CHECK: faddp %st(0)
+0xde,0xc0
+
+# CHECK: faddp %st(1)
+0xde,0xc1
+
+# CHECK: faddp %st(2)
+0xde,0xc2
+
+# CHECK: faddp %st(3)
+0xde,0xc3
+
+# CHECK: faddp %st(4)
+0xde,0xc4
+
+# CHECK: faddp %st(5)
+0xde,0xc5
+
+# CHECK: faddp %st(6)
+0xde,0xc6
+
+# CHECK: faddp %st(7)
+0xde,0xc7
+
+# CHECK: fmulp %st(0)
+0xde,0xc8
+
+# CHECK: fmulp %st(1)
+0xde,0xc9
+
+# CHECK: fmulp %st(2)
+0xde,0xca
+
+# CHECK: fmulp %st(3)
+0xde,0xcb
+
+# CHECK: fmulp %st(4)
+0xde,0xcc
+
+# CHECK: fmulp %st(5)
+0xde,0xcd
+
+# CHECK: fmulp %st(6)
+0xde,0xce
+
+# CHECK: fmulp %st(7)
+0xde,0xcf
+
+# CHECK: fcompp
+0xde,0xd9
+
+# CHECK: fsubp %st(0)
+0xde,0xe0
+
+# CHECK: fsubp %st(1)
+0xde,0xe1
+
+# CHECK: fsubp %st(2)
+0xde,0xe2
+
+# CHECK: fsubp %st(3)
+0xde,0xe3
+
+# CHECK: fsubp %st(4)
+0xde,0xe4
+
+# CHECK: fsubp %st(5)
+0xde,0xe5
+
+# CHECK: fsubp %st(6)
+0xde,0xe6
+
+# CHECK: fsubp %st(7)
+0xde,0xe7
+
+# CHECK: fsubrp %st(0)
+0xde,0xe8
+
+# CHECK: fsubrp %st(1)
+0xde,0xe9
+
+# CHECK: fsubrp %st(2)
+0xde,0xea
+
+# CHECK: fsubrp %st(3)
+0xde,0xeb
+
+# CHECK: fsubrp %st(4)
+0xde,0xec
+
+# CHECK: fsubrp %st(5)
+0xde,0xed
+
+# CHECK: fsubrp %st(6)
+0xde,0xee
+
+# CHECK: fsubrp %st(7)
+0xde,0xef
+
+# CHECK: fdivp %st(0)
+0xde,0xf0
+
+# CHECK: fdivp %st(1)
+0xde,0xf1
+
+# CHECK: fdivp %st(2)
+0xde,0xf2
+
+# CHECK: fdivp %st(3)
+0xde,0xf3
+
+# CHECK: fdivp %st(4)
+0xde,0xf4
+
+# CHECK: fdivp %st(5)
+0xde,0xf5
+
+# CHECK: fdivp %st(6)
+0xde,0xf6
+
+# CHECK: fdivp %st(7)
+0xde,0xf7
+
+# CHECK: fdivrp %st(0)
+0xde,0xf8
+
+# CHECK: fdivrp %st(1)
+0xde,0xf9
+
+# CHECK: fdivrp %st(2)
+0xde,0xfa
+
+# CHECK: fdivrp %st(3)
+0xde,0xfb
+
+# CHECK: fdivrp %st(4)
+0xde,0xfc
+
+# CHECK: fdivrp %st(5)
+0xde,0xfd
+
+# CHECK: fdivrp %st(6)
+0xde,0xfe
+
+# CHECK: fdivrp %st(7)
+0xde,0xff
+
+# CHECK: fnstsw %ax
+0xdf,0xe0
+
+# CHECK: fucompi %st(0)
+0xdf,0xe8
+
+# CHECK: fucompi %st(1)
+0xdf,0xe9
+
+# CHECK: fucompi %st(2)
+0xdf,0xea
+
+# CHECK: fucompi %st(3)
+0xdf,0xeb
+
+# CHECK: fucompi %st(4)
+0xdf,0xec
+
+# CHECK: fucompi %st(5)
+0xdf,0xed
+
+# CHECK: fucompi %st(6)
+0xdf,0xee
+
+# CHECK: fucompi %st(7)
+0xdf,0xef
+
+# CHECK: fcompi %st(0)
+0xdf,0xf0
+
+# CHECK: fcompi %st(1)
+0xdf,0xf1
+
+# CHECK: fcompi %st(2)
+0xdf,0xf2
+
+# CHECK: fcompi %st(3)
+0xdf,0xf3
+
+# CHECK: fcompi %st(4)
+0xdf,0xf4
+
+# CHECK: fcompi %st(5)
+0xdf,0xf5
+
+# CHECK: fcompi %st(6)
+0xdf,0xf6
+
+# CHECK: fcompi %st(7)
+0xdf,0xf7
diff --git a/test/MC/Disassembler/X86/missing-sib.txt b/test/MC/Disassembler/X86/missing-sib.txt
new file mode 100644
index 0000000..814f684
--- /dev/null
+++ b/test/MC/Disassembler/X86/missing-sib.txt
@@ -0,0 +1,4 @@
+# RUN: llvm-mc --disassemble %s -triple=x86_64-apple-darwin9 2>&1 | grep "invalid instruction encoding"
+
+# This instruction would decode as jmp32m if it didn't run out of bytes
+0xff 0x24
diff --git a/test/MC/Disassembler/X86/moffs.txt b/test/MC/Disassembler/X86/moffs.txt
new file mode 100644
index 0000000..67d64e8
--- /dev/null
+++ b/test/MC/Disassembler/X86/moffs.txt
@@ -0,0 +1,86 @@
+# RUN: llvm-mc --hdis %s -triple=i686-linux-gnu-code16 | FileCheck --check-prefix=16 %s
+# RUN: llvm-mc --hdis %s -triple=i686-linux-gnu | FileCheck --check-prefix=32 %s
+# RUN: llvm-mc --hdis %s -triple=x86_64-linux-gnu | FileCheck --check-prefix=64 %s
+
+# 16: movb 0x5a5a, %al
+# 32: movb 0x5a5a5a5a, %al
+# 64: movabsb 0x5a5a5a5a5a5a5a5a, %al
+0xa0 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
+
+# 16: movb 0x5a5a5a5a, %al
+# 32: movb 0x5a5a, %al
+# 64: movabsb 0x5a5a5a5a, %al
+0x67 0xa0 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
+
+# 16: movw 0x5a5a, %ax
+# 32: movl 0x5a5a5a5a, %eax
+# 64: movabsl 0x5a5a5a5a5a5a5a5a, %eax
+0xa1 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
+
+# 16: movw 0x5a5a5a5a, %ax
+# 32: movl 0x5a5a, %eax
+# 64: movabsl 0x5a5a5a5a, %eax
+0x67 0xa1 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
+
+# 16: movl 0x5a5a, %eax
+# 32: movw 0x5a5a5a5a, %ax
+# 64: movabsw 0x5a5a5a5a5a5a5a5a, %ax
+0x66 0xa1 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
+
+# 16: movl 0x5a5a5a5a, %eax
+# 32: movw 0x5a5a, %ax
+# 64: movabsw 0x5a5a5a5a, %ax
+0x66 0x67 0xa1 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
+
+# 16: movl 0x5a5a5a5a, %eax
+# 32: movw 0x5a5a, %ax
+# 64: movabsw 0x5a5a5a5a, %ax
+0x67 0x66 0xa1 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
+
+# 16: movl %es:0x5a5a5a5a, %eax
+# 32: movw %es:0x5a5a, %ax
+# 64: movabsw %es:0x5a5a5a5a, %ax
+0x67 0x26 0x66 0xa1 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
+
+
+
+# 16: movb %al, 0x5a5a
+# 32: movb %al, 0x5a5a5a5a
+# 64: movabsb %al, 0x5a5a5a5a5a5a5a5a
+0xa2 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
+
+# 16: movb %al, 0x5a5a5a5a
+# 32: movb %al, 0x5a5a
+# 64: movabsb %al, 0x5a5a5a5a
+0x67 0xa2 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
+
+# 16: movw %ax, 0x5a5a
+# 32: movl %eax, 0x5a5a5a5a
+# 64: movabsl %eax, 0x5a5a5a5a5a5a5a5a
+0xa3 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
+
+# 16: movw %ax, %gs:0x5a5a5a5a
+# 32: movl %eax, %gs:0x5a5a
+# 64: movabsl %eax, %gs:0x5a5a5a5a
+0x65 0x67 0xa3 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
+
+# 16: movl %eax, 0x5a5a
+# 32: movw %ax, 0x5a5a5a5a
+# 64: movabsw %ax, 0x5a5a5a5a5a5a5a5a
+0x66 0xa3 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
+
+# 16: movl %eax, 0x5a5a5a5a
+# 32: movw %ax, 0x5a5a
+# 64: movabsw %ax, 0x5a5a5a5a
+0x66 0x67 0xa3 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
+
+# 16: movl %eax, 0x5a5a5a5a
+# 32: movw %ax, 0x5a5a
+# 64: movabsw %ax, 0x5a5a5a5a
+0x67 0x66 0xa3 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
+
+# 16: movl %eax, %es:0x5a5a5a5a
+# 32: movw %ax, %es:0x5a5a
+# 64: movabsw %ax, %es:0x5a5a5a5a
+0x67 0x26 0x66 0xa3 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
+
diff --git a/test/MC/Disassembler/X86/padlock.txt b/test/MC/Disassembler/X86/padlock.txt
new file mode 100644
index 0000000..2060a33
--- /dev/null
+++ b/test/MC/Disassembler/X86/padlock.txt
@@ -0,0 +1,56 @@
+# RUN: llvm-mc --disassemble %s -triple=x86_64-apple-darwin9 | FileCheck %s
+
+# CHECK: xstore
+0x0f 0xa7 0xc0
+
+# CHECK: xcryptecb
+0x0f 0xa7 0xc8
+
+# CHECK: xcryptcbc
+0x0f 0xa7 0xd0
+
+# CHECK: xcryptctr
+0x0f 0xa7 0xd8
+
+# CHECK: xcryptcfb
+0x0f 0xa7 0xe0
+
+# CHECK: xcryptofb
+0x0f 0xa7 0xe8
+
+# CHECK: xsha1
+0x0f 0xa6 0xc8
+
+# CHECK: xsha256
+0x0f 0xa6 0xd0
+
+# CHECK: montmul
+0x0f 0xa6 0xc0
+# RUN: llvm-mc --disassemble %s -triple=x86_64-apple-darwin9 | FileCheck %s
+
+# CHECK: xstore
+0x0f 0xa7 0xc0
+
+# CHECK: xcryptecb
+0x0f 0xa7 0xc8
+
+# CHECK: xcryptcbc
+0x0f 0xa7 0xd0
+
+# CHECK: xcryptctr
+0x0f 0xa7 0xd8
+
+# CHECK: xcryptcfb
+0x0f 0xa7 0xe0
+
+# CHECK: xcryptofb
+0x0f 0xa7 0xe8
+
+# CHECK: xsha1
+0x0f 0xa6 0xc8
+
+# CHECK: xsha256
+0x0f 0xa6 0xd0
+
+# CHECK: montmul
+0x0f 0xa6 0xc0
diff --git a/test/MC/Disassembler/X86/simple-tests.txt b/test/MC/Disassembler/X86/simple-tests.txt
index 7ca0874..e6e9c7b 100644
--- a/test/MC/Disassembler/X86/simple-tests.txt
+++ b/test/MC/Disassembler/X86/simple-tests.txt
@@ -359,6 +359,18 @@
 # CHECK: xchgq %r8, %rax
 0x49 0x90
 
+# CHECK: xchgl %r9d, %eax
+0x41 0x91
+
+# CHECK: xchgq %r9, %rax
+0x49 0x91
+
+# CHECK: xchgl %ecx, %eax
+0x91
+
+# CHECK: xchgq %rcx, %rax
+0x48 0x91
+
 # CHECK: addb $0, %al
 0x04 0x00
 
diff --git a/test/MC/Disassembler/X86/x86-16.txt b/test/MC/Disassembler/X86/x86-16.txt
new file mode 100644
index 0000000..93974d4
--- /dev/null
+++ b/test/MC/Disassembler/X86/x86-16.txt
@@ -0,0 +1,788 @@
+# RUN: llvm-mc --disassemble %s -triple=i686-linux-gnu-code16 | FileCheck %s
+
+# CHECK: movl $305419896, %ebx
+0x66 0xbb 0x78 0x56 0x34 0x12
+
+# CHECK: pause
+0xf3 0x90
+
+# CHECK: sfence
+0x0f 0xae 0xf8
+
+# CHECK: lfence
+0x0f 0xae 0xe8
+
+# CHECK: mfence
+0x0f 0xae 0xf0
+
+# CHECK: stgi
+0x0f 0x01 0xdc
+
+# CHECK: clgi
+0x0f 0x01 0xdd
+
+# CHECK: rdtscp
+0x0f 0x01 0xf9
+
+# CHECK: movl %eax, 16(%ebp)
+0x67 0x66 0x89 0x45 0x10
+
+# CHECK: movl %eax, -16(%ebp)
+0x67 0x66 0x89 0x45 0xf0
+
+# CHECK: testb %bl, %cl
+0x84 0xcb
+
+# CHECK: cmpl %eax, %ebx
+0x66 0x39 0xc3
+
+# CHECK: addw %ax, %ax
+0x01 0xc0
+
+# CHECK: shrl %eax
+0x66 0xd1 0xe8
+
+# CHECK: shll %eax
+0x66 0xd1 0xe0
+
+# CHECK: shll %eax
+0x66 0xd1 0xe0
+
+# CHECK: movb 0, %al
+0xa0 0x00 0x00
+
+# CHECK: movw 0, %ax
+0xa1 0x00 0x00
+
+# CHECK: movl 0, %eax
+0x66 0xa1 0x00 0x00
+
+# CHECK: into
+0xce
+
+# CHECK: int3
+0xcc
+
+# CHECK: int $4
+0xcd 0x04
+
+# CHECK: int $127
+0xcd 0x7f
+
+# CHECK: pushfw
+0x9c
+
+# CHECK: pushfl
+0x66 0x9c
+
+# CHECK: popfw
+0x9d
+
+# CHECK: popfl
+0x66 0x9d
+
+# CHECK: retl
+0x66 0xc3
+
+# CHECK: cmoval %eax, %edx
+0x66 0x0f 0x47 0xd0
+
+# CHECK: cmovael %eax, %edx
+0x66 0x0f 0x43 0xd0
+
+# CHECK: cmovbel %eax, %edx
+0x66 0x0f 0x46 0xd0
+
+# CHECK: cmovbl %eax, %edx
+0x66 0x0f 0x42 0xd0
+
+# CHECK: cmovbw %bx, %bx
+0x0f 0x42 0xdb
+
+# CHECK: cmovbel %eax, %edx
+0x66 0x0f 0x46 0xd0
+
+# CHECK: cmovbl %eax, %edx
+0x66 0x0f 0x42 0xd0
+
+# CHECK: cmovel %eax, %edx
+0x66 0x0f 0x44 0xd0
+
+# CHECK: cmovgl %eax, %edx
+0x66 0x0f 0x4f 0xd0
+
+# CHECK: cmovgel %eax, %edx
+0x66 0x0f 0x4d 0xd0
+
+# CHECK: cmovll %eax, %edx
+0x66 0x0f 0x4c 0xd0
+
+# CHECK: cmovlel %eax, %edx
+0x66 0x0f 0x4e 0xd0
+
+# CHECK: cmovbel %eax, %edx
+0x66 0x0f 0x46 0xd0
+
+# CHECK: cmovnel %eax, %edx
+0x66 0x0f 0x45 0xd0
+
+# CHECK: cmovael %eax, %edx
+0x66 0x0f 0x43 0xd0
+
+# CHECK: cmoval %eax, %edx
+0x66 0x0f 0x47 0xd0
+
+# CHECK: cmovael %eax, %edx
+0x66 0x0f 0x43 0xd0
+
+# CHECK: cmovnel %eax, %edx
+0x66 0x0f 0x45 0xd0
+
+# CHECK: cmovlel %eax, %edx
+0x66 0x0f 0x4e 0xd0
+
+# CHECK: cmovgel %eax, %edx
+0x66 0x0f 0x4d 0xd0
+
+# CHECK: cmovnel %eax, %edx
+0x66 0x0f 0x45 0xd0
+
+# CHECK: cmovlel %eax, %edx
+0x66 0x0f 0x4e 0xd0
+
+# CHECK: cmovll %eax, %edx
+0x66 0x0f 0x4c 0xd0
+
+# CHECK: cmovgel %eax, %edx
+0x66 0x0f 0x4d 0xd0
+
+# CHECK: cmovgl %eax, %edx
+0x66 0x0f 0x4f 0xd0
+
+# CHECK: cmovnol %eax, %edx
+0x66 0x0f 0x41 0xd0
+
+# CHECK: cmovnpl %eax, %edx
+0x66 0x0f 0x4b 0xd0
+
+# CHECK: cmovnsl %eax, %edx
+0x66 0x0f 0x49 0xd0
+
+# CHECK: cmovnel %eax, %edx
+0x66 0x0f 0x45 0xd0
+
+# CHECK: cmovol %eax, %edx
+0x66 0x0f 0x40 0xd0
+
+# CHECK: cmovpl %eax, %edx
+0x66 0x0f 0x4a 0xd0
+
+# CHECK: cmovsl %eax, %edx
+0x66 0x0f 0x48 0xd0
+
+# CHECK: cmovel %eax, %edx
+0x66 0x0f 0x44 0xd0
+
+# CHECK: fmul %st(0)
+0xd8 0xc8
+
+# CHECK: fadd %st(0)
+0xd8 0xc0
+
+# CHECK: fsub %st(0)
+0xd8 0xe0
+
+# CHECK: fsubr %st(0)
+0xd8 0xe8
+
+# CHECK: fdivr %st(0)
+0xd8 0xf8
+
+# CHECK: fdiv %st(0)
+0xd8 0xf0
+
+# CHECK: movl %cs, %eax
+0x66 0x8c 0xc8
+
+# CHECK: movw %cs, %ax
+0x8c 0xc8
+
+# CHECK: movl %cs, (%eax)
+0x67 0x66 0x8c 0x08
+
+# CHECK: movw %cs, (%eax)
+0x67 0x8c 0x08
+
+# CHECK: movl %eax, %cs
+0x66 0x8e 0xc8
+
+# CHECK: movl (%eax), %cs
+0x67 0x66 0x8e 0x08
+
+# CHECK: movw (%eax), %cs
+0x67 0x8e 0x08
+
+# CHECKX: movl %cr0, %eax
+0x0f 0x20 0xc0
+
+# CHECKX: movl %cr1, %eax
+0x0f 0x20 0xc8
+
+# CHECKX: movl %cr2, %eax
+0x0f 0x20 0xd0
+
+# CHECKX: movl %cr3, %eax
+0x0f 0x20 0xd8
+
+# CHECKX: movl %cr4, %eax
+0x0f 0x20 0xe0
+
+# CHECKX: movl %dr0, %eax
+0x0f 0x21 0xc0
+
+# CHECKX: movl %dr1, %eax
+0x0f 0x21 0xc8
+
+# CHECKX: movl %dr1, %eax
+0x0f 0x21 0xc8
+
+# CHECKX: movl %dr2, %eax
+0x0f 0x21 0xd0
+
+# CHECKX: movl %dr3, %eax
+0x0f 0x21 0xd8
+
+# CHECKX: movl %dr4, %eax
+0x0f 0x21 0xe0
+
+# CHECKX: movl %dr5, %eax
+0x0f 0x21 0xe8
+
+# CHECKX: movl %dr6, %eax
+0x0f 0x21 0xf0
+
+# CHECKX: movl %dr7, %eax
+0x0f 0x21 0xf8
+
+# CHECK: wait
+0x9b
+
+# CHECK: movl %gs:124, %eax
+0x65 0x66 0x8b 0x06 0x7c 0x00
+
+# CHECK: pushaw
+0x60
+
+# CHECK: popaw
+0x61
+
+# CHECK: pushaw
+0x60
+
+# CHECK: popaw
+0x61
+
+# CHECK: pushal
+0x66 0x60
+
+# CHECK: popal
+0x66 0x61
+
+# CHECK: jmpw *8(%eax)
+0x67 0xff 0x60 0x08
+
+# CHECK: jmpl *8(%eax)
+0x67 0x66 0xff 0x60 0x08
+
+# CHECK: lcalll $2, $4660
+0x66 0x9a 0x34 0x12 0x00 0x00 0x02 0x00
+
+# CHECK: jcxz
+0xe3 0x00
+
+# CHECK: jecxz
+0x67 0xe3 0x00
+
+# CHECK: iretw
+0xcf
+
+# CHECK: iretw
+0xcf
+
+# CHECK: iretl
+0x66 0xcf
+
+# CHECK: sysretl
+0x0f 0x07
+
+# CHECK: sysretl
+0x0f 0x07
+
+# CHECK: testl -24(%ebp), %ecx
+0x67 0x66 0x85 0x4d 0xe8
+
+# CHECK: testl -24(%ebp), %ecx
+0x67 0x66 0x85 0x4d 0xe8
+
+# CHECK: pushw %cs
+0x0e
+
+# CHECK: pushw %ds
+0x1e
+
+# CHECK: pushw %ss
+0x16
+
+# CHECK: pushw %es
+0x06
+
+# CHECK: pushw %fs
+0x0f 0xa0
+
+# CHECK: pushw %gs
+0x0f 0xa8
+
+# CHECK: pushw %cs
+0x0e
+
+# CHECK: pushw %ds
+0x1e
+
+# CHECK: pushw %ss
+0x16
+
+# CHECK: pushw %es
+0x06
+
+# CHECK: pushw %fs
+0x0f 0xa0
+
+# CHECK: pushw %gs
+0x0f 0xa8
+
+# CHECK: pushl %cs
+0x66 0x0e
+
+# CHECK: pushl %ds
+0x66 0x1e
+
+# CHECK: pushl %ss
+0x66 0x16
+
+# CHECK: pushl %es
+0x66 0x06
+
+# CHECK: pushl %fs
+0x66 0x0f 0xa0
+
+# CHECK: pushl %gs
+0x66 0x0f 0xa8
+
+# CHECK: popw %ss
+0x17
+
+# CHECK: popw %ds
+0x1f
+
+# CHECK: popw %es
+0x07
+
+# CHECK: popl %ss
+0x66 0x17
+
+# CHECK: popl %ds
+0x66 0x1f
+
+# CHECK: popl %es
+0x66 0x07
+
+# CHECK: pushfl
+0x66 0x9c
+
+# CHECK: popfl
+0x66 0x9d
+
+# CHECK: pushfl
+0x66 0x9c
+
+# CHECK: popfl
+0x66 0x9d
+
+# CHECK: setb %bl
+0x0f 0x92 0xc3
+
+# CHECK: setb %bl
+0x0f 0x92 0xc3
+
+# CHECK: setae %bl
+0x0f 0x93 0xc3
+
+# CHECK: setae %bl
+0x0f 0x93 0xc3
+
+# CHECK: setbe %bl
+0x0f 0x96 0xc3
+
+# CHECK: seta %bl
+0x0f 0x97 0xc3
+
+# CHECK: setp %bl
+0x0f 0x9a 0xc3
+
+# CHECK: setnp %bl
+0x0f 0x9b 0xc3
+
+# CHECK: setl %bl
+0x0f 0x9c 0xc3
+
+# CHECK: setge %bl
+0x0f 0x9d 0xc3
+
+# CHECK: setle %bl
+0x0f 0x9e 0xc3
+
+# CHECK: setg %bl
+0x0f 0x9f 0xc3
+
+# CHECK: setne %cl
+0x0f 0x95 0xc1
+
+# CHECK: setb %bl
+0x0f 0x92 0xc3
+
+# CHECK: setb %bl
+0x0f 0x92 0xc3
+
+# CHECK: lcalll $31438, $31438
+0x66 0x9a 0xce 0x7a 0x00 0x00 0xce 0x7a
+
+# CHECK: lcalll $31438, $31438
+0x66 0x9a 0xce 0x7a 0x00 0x00 0xce 0x7a
+
+# CHECK: ljmpl $31438, $31438
+0x66 0xea 0xce 0x7a 0x00 0x00 0xce 0x7a
+
+# CHECK: ljmpl $31438, $31438
+0x66 0xea 0xce 0x7a 0x00 0x00 0xce 0x7a
+
+# CHECK: lcallw $31438, $31438
+0x9a 0xce 0x7a 0xce 0x7a
+
+# CHECK: lcallw $31438, $31438
+0x9a 0xce 0x7a 0xce 0x7a
+
+# CHECK: ljmpw $31438, $31438
+0xea 0xce 0x7a 0xce 0x7a
+
+# CHECK: ljmpw $31438, $31438
+0xea 0xce 0x7a 0xce 0x7a
+
+# CHECK: lcallw $31438, $31438
+0x9a 0xce 0x7a 0xce 0x7a
+
+# CHECK: lcallw $31438, $31438
+0x9a 0xce 0x7a 0xce 0x7a
+
+# CHECK: ljmpw $31438, $31438
+0xea 0xce 0x7a 0xce 0x7a
+
+# CHECK: ljmpw $31438, $31438
+0xea 0xce 0x7a 0xce 0x7a
+
+# CHECK: calll 
+0x66 0xe8 0x00 0x00 0x00 0x00
+
+# CHECK: callw
+0xe8 0x00 0x00
+
+# CHECK: incb %al
+0xfe 0xc0
+
+# CHECK: incw %ax
+0x40
+
+# CHECK: incl %eax
+0x66 0x40
+
+# CHECK: decb %al
+0xfe 0xc8
+
+# CHECK: decw %ax
+0x48
+
+# CHECK: decl %eax
+0x66 0x48
+
+# CHECK: pshufw $14, %mm4, %mm0
+0x0f 0x70 0xc4 0x0e
+
+# CHECK: pshufw $90, %mm4, %mm0
+0x0f 0x70 0xc4 0x5a
+
+# CHECK: aaa
+0x37
+
+# CHECK: aad $1
+0xd5 0x01
+
+# CHECK: aad
+0xd5 0x0a
+
+# CHECK: aad
+0xd5 0x0a
+
+# CHECK: aam $2
+0xd4 0x02
+
+# CHECK: aam
+0xd4 0x0a
+
+# CHECK: aam
+0xd4 0x0a
+
+# CHECK: aas
+0x3f
+
+# CHECK: daa
+0x27
+
+# CHECK: das
+0x2f
+
+# CHECK: retw $31438
+0xc2 0xce 0x7a
+
+# CHECK: lretw $31438
+0xca 0xce 0x7a
+
+# CHECK: retw $31438
+0xc2 0xce 0x7a
+
+# CHECK: lretw $31438
+0xca 0xce 0x7a
+
+# CHECK: retl $31438
+0x66 0xc2 0xce 0x7a
+
+# CHECK: lretl $31438
+0x66 0xca 0xce 0x7a
+
+# CHECK: bound 2(%eax), %bx
+0x67 0x62 0x58 0x02
+
+# CHECK: bound 4(%ebx), %ecx
+0x67 0x66 0x62 0x4b 0x04
+
+# CHECK: arpl %bx, %bx
+0x63 0xdb
+
+# CHECK: arpl %bx, 6(%ecx)
+0x67 0x63 0x59 0x06
+
+# CHECK: lgdtw 4(%eax)
+0x67 0x0f 0x01 0x50 0x04
+
+# CHECK: lgdtw 4(%eax)
+0x67 0x0f 0x01 0x50 0x04
+
+# CHECK: lgdtl 4(%eax)
+0x67 0x66 0x0f 0x01 0x50 0x04
+
+# CHECK: lidtw 4(%eax)
+0x67 0x0f 0x01 0x58 0x04
+
+# CHECK: lidtw 4(%eax)
+0x67 0x0f 0x01 0x58 0x04
+
+# CHECK: lidtl 4(%eax)
+0x67 0x66 0x0f 0x01 0x58 0x04
+
+# CHECK: sgdtw 4(%eax)
+0x67 0x0f 0x01 0x40 0x04
+
+# CHECK: sgdtw 4(%eax)
+0x67 0x0f 0x01 0x40 0x04
+
+# CHECK: sgdtl 4(%eax)
+0x67 0x66 0x0f 0x01 0x40 0x04
+
+# CHECK: sidtw 4(%eax)
+0x67 0x0f 0x01 0x48 0x04
+
+# CHECK: sidtw 4(%eax)
+0x67 0x0f 0x01 0x48 0x04
+
+# CHECK: sidtl 4(%eax)
+0x67 0x66 0x0f 0x01 0x48 0x04
+
+# CHECK: fcompi %st(2)
+0xdf 0xf2
+
+# CHECK: fcompi %st(2)
+0xdf 0xf2
+
+# CHECK: fcompi %st(1)
+0xdf 0xf1
+
+# CHECK: fucompi %st(2)
+0xdf 0xea
+
+# CHECK: fucompi %st(2)
+0xdf 0xea
+
+# CHECK: fucompi %st(1)
+0xdf 0xe9
+
+# CHECK: fldcw 32493
+0xd9 0x2e 0xed 0x7e
+
+# CHECK: fldcw 32493
+0xd9 0x2e 0xed 0x7e
+
+# CHECK: fnstcw 32493
+0xd9 0x3e 0xed 0x7e
+
+# CHECK: fnstcw 32493
+0xd9 0x3e 0xed 0x7e
+
+# CHECK: wait
+0x9b
+
+# CHECK: fnstcw 32493
+0xd9 0x3e 0xed 0x7e
+
+# CHECK: wait
+0x9b
+
+# CHECK: fnstcw 32493
+0xd9 0x3e 0xed 0x7e
+
+# CHECK: fnstsw 32493
+0xdd 0x3e 0xed 0x7e
+
+# CHECK: fnstsw 32493
+0xdd 0x3e 0xed 0x7e
+
+# CHECK: wait
+0x9b
+
+# CHECK: fnstsw 32493
+0xdd 0x3e 0xed 0x7e
+
+# CHECK: wait
+0x9b
+
+# CHECK: fnstsw 32493
+0xdd 0x3e 0xed 0x7e
+
+# CHECK: verr 32493
+0x0f 0x00 0x26 0xed 0x7e
+
+# CHECK: verr 32493
+0x0f 0x00 0x26 0xed 0x7e
+
+# CHECK: wait
+0x9b
+
+# CHECK: fnclex
+0xdb 0xe2
+
+# CHECK: fnclex
+0xdb 0xe2
+
+# CHECK: ud2
+0x0f 0x0b
+
+# CHECK: ud2
+0x0f 0x0b
+
+# CHECK: ud2b
+0x0f 0xb9
+
+# CHECK: loope
+0xe1 0x00
+
+# CHECK: loopne
+0xe0 0x00
+
+# CHECK: outsb
+0x6e
+
+# CHECK: outsw
+0x6f
+
+# CHECK: outsl
+0x66 0x6f
+
+# CHECK: insb
+0x6c
+
+# CHECK: insw
+0x6d
+
+# CHECK: insl
+0x66 0x6d
+
+# CHECK: movsb
+0xa4
+
+# CHECK: movsw
+0xa5
+
+# CHECK: movsl
+0x66 0xa5
+
+# CHECK: lodsb
+0xac
+
+# CHECK: lodsw
+0xad
+
+# CHECK: lodsl
+0x66 0xad
+
+# CHECK: stosb
+0xaa
+
+# CHECK: stosw
+0xab
+
+# CHECK: stosl
+0x66 0xab
+
+# CHECK: strw %ax
+0x0f 0x00 0xc8
+
+# CHECK: strl %eax
+0x66 0x0f 0x00 0xc8
+
+# CHECK: fsubp %st(1)
+0xde 0xe1
+
+# CHECK: fsubp %st(2)
+0xde 0xe2
+
+# CHECKX: nop
+0x66 0x90
+
+# CHECKX: nop
+0x90
+
+# CHECK: xchgl %ecx, %eax
+0x66 0x91
+
+# CHECK: xchgl %ecx, %eax
+0x66 0x91
+
+# CHECK: retw
+0xc3
+
+# CHECK: retl
+0x66 0xc3
+
+# CHECK: lretw
+0xcb
+
+# CHECK: lretl
+0x66 0xcb
+
diff --git a/test/MC/Disassembler/X86/x86-32.txt b/test/MC/Disassembler/X86/x86-32.txt
index b6a62c4..a4a0b2c 100644
--- a/test/MC/Disassembler/X86/x86-32.txt
+++ b/test/MC/Disassembler/X86/x86-32.txt
@@ -696,3 +696,15 @@
 
 # CHECK: vmovq %xmm0, %xmm0
 0xc5 0xfa 0x7e 0xc0
+
+# CHECK: movl %fs:0, %eax
+0x64 0xa1 0x00 0x00 0x00 0x00
+
+# CHECK: movb $-1, %al
+0xc6 0xc0 0xff
+
+# CHECK: movw $65535, %ax
+0x66 0xc7 0xc0 0xff 0xff
+
+# CHECK: movl $4294967295, %eax
+0xc7 0xc0 0xff 0xff 0xff 0xff
diff --git a/test/MC/Disassembler/X86/x86-64.txt b/test/MC/Disassembler/X86/x86-64.txt
index 8c6bc0e..6f072df 100644
--- a/test/MC/Disassembler/X86/x86-64.txt
+++ b/test/MC/Disassembler/X86/x86-64.txt
@@ -241,3 +241,27 @@
 
 # CHECK: pextrw $3, %xmm3, (%rax)
 0x66 0x0f 0x3a 0x15 0x18 0x03
+
+# CHECK: $0, 305419896(,%r8)
+0x43 0x80 0x04 0x05 0x78 0x56 0x34 0x12 0x00
+
+# CHECK: $0, 305419896(%r13,%r8)
+0x43 0x80 0x84 0x05 0x78 0x56 0x34 0x12 0x00
+
+# CHECK: $0, 305419896(,%r8)
+0x42 0x80 0x04 0x05 0x78 0x56 0x34 0x12 0x00
+
+# CHECK: $0, 305419896(%rbp,%r8)
+0x42 0x80 0x84 0x05 0x78 0x56 0x34 0x12 0x00
+
+# CHECK: $0, 305419896(,%r12)
+0x42 0x80 0x04 0x25 0x78 0x56 0x34 0x12 0x00
+
+# CHECK: $0, 305419896(%rbp,%r12)
+0x42 0x80 0x84 0x25 0x78 0x56 0x34 0x12 0x00
+
+# CHECK: $0, 305419896
+0x80 0x04 0x25 0x78 0x56 0x34 0x12 0x00
+
+# CHECK: $0, 305419896(%rbp)
+0x80 0x84 0x25 0x78 0x56 0x34 0x12 0x00
diff --git a/test/MC/ELF/abs.s b/test/MC/ELF/abs.s
index 1836f40..4adf1cb 100644
--- a/test/MC/ELF/abs.s
+++ b/test/MC/ELF/abs.s
@@ -13,5 +13,5 @@
 // CHECK-NEXT:     Binding: Local
 // CHECK-NEXT:     Type: None
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: (0xFFF1)
+// CHECK-NEXT:     Section: Absolute (0xFFF1)
 // CHECK-NEXT:   }
diff --git a/test/MC/ELF/alias-reloc.s b/test/MC/ELF/alias-reloc.s
index 0ee73e9..74930c6 100644
--- a/test/MC/ELF/alias-reloc.s
+++ b/test/MC/ELF/alias-reloc.s
@@ -32,7 +32,7 @@ foo2:
 // CHECK-NEXT:     Binding: Local (0x0)
 // CHECK-NEXT:     Type: None (0x0)
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section:  (0x0)
+// CHECK-NEXT:     Section: Undefined (0x0)
 // CHECK-NEXT:   }
 // CHECK-NEXT:   Symbol {
 // CHECK-NEXT:     Name: bar
diff --git a/test/MC/ELF/alias.s b/test/MC/ELF/alias.s
index 8da75f7..2e65ace 100644
--- a/test/MC/ELF/alias.s
+++ b/test/MC/ELF/alias.s
@@ -10,10 +10,13 @@ foo3:
 	.globl	bar3
 bar3 = foo3
 
-// Test that bar4 is also a function
-        .type	foo4,@function
+
+// Test that bar4  and bar 5 are also functions and have the same value as foo4.
+	.byte 0
+	.type	foo4,@function
 foo4:
 bar4 = foo4
+bar5 = bar4
 
         .long foo2
 
@@ -25,7 +28,7 @@ bar4 = foo4
 // CHECK-NEXT:     Binding: Local (0x0)
 // CHECK-NEXT:     Type: None (0x0)
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section:  (0x0)
+// CHECK-NEXT:     Section: Undefined (0x0)
 // CHECK-NEXT:   }
 // CHECK-NEXT:   Symbol {
 // CHECK-NEXT:     Name: bar
@@ -38,7 +41,16 @@ bar4 = foo4
 // CHECK-NEXT:   }
 // CHECK-NEXT:   Symbol {
 // CHECK-NEXT:     Name: bar4
-// CHECK-NEXT:     Value: 0x0
+// CHECK-NEXT:     Value: 0x1
+// CHECK-NEXT:     Size: 0
+// CHECK-NEXT:     Binding: Local
+// CHECK-NEXT:     Type: Function
+// CHECK-NEXT:     Other: 0
+// CHECK-NEXT:     Section: .text
+// CHECK-NEXT:   }
+// CHECK-NEXT:   Symbol {
+// CHECK-NEXT:     Name: bar5
+// CHECK-NEXT:     Value: 0x1
 // CHECK-NEXT:     Size: 0
 // CHECK-NEXT:     Binding: Local
 // CHECK-NEXT:     Type: Function
@@ -65,7 +77,7 @@ bar4 = foo4
 // CHECK-NEXT:   }
 // CHECK-NEXT:   Symbol {
 // CHECK-NEXT:     Name: foo4
-// CHECK-NEXT:     Value: 0x0
+// CHECK-NEXT:     Value: 0x1
 // CHECK-NEXT:     Size: 0
 // CHECK-NEXT:     Binding: Local
 // CHECK-NEXT:     Type: Function
@@ -97,6 +109,6 @@ bar4 = foo4
 // CHECK-NEXT:     Binding: Global
 // CHECK-NEXT:     Type: None
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: (0x0)
+// CHECK-NEXT:     Section: Undefined (0x0)
 // CHECK-NEXT:   }
 // CHECK-NEXT: ]
diff --git a/test/MC/ELF/bad-expr.s b/test/MC/ELF/bad-expr.s
new file mode 100644
index 0000000..1cad919
--- /dev/null
+++ b/test/MC/ELF/bad-expr.s
@@ -0,0 +1,8 @@
+// RUN: not llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o /dev/null 2>%t
+// RUN: FileCheck --input-file=%t %s
+
+// CHECK: symbol '__executable_start' can not be undefined in a subtraction expression
+
+        .data
+x:
+        .quad   x-__executable_start
diff --git a/test/MC/ELF/bad-expr2.s b/test/MC/ELF/bad-expr2.s
new file mode 100644
index 0000000..3da916b
--- /dev/null
+++ b/test/MC/ELF/bad-expr2.s
@@ -0,0 +1,12 @@
+// RUN: not llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o /dev/null \
+// RUN: 2>&1 | FileCheck %s
+
+// CHECK: No relocation available to represent this relative expression
+// CHECK: call foo - bar
+
+
+        call foo - bar
+        .section .foo
+foo:
+        .section .bar
+bar:
diff --git a/test/MC/ELF/bad-expr3.s b/test/MC/ELF/bad-expr3.s
new file mode 100644
index 0000000..990167c
--- /dev/null
+++ b/test/MC/ELF/bad-expr3.s
@@ -0,0 +1,10 @@
+// RUN: not llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o /dev/null \
+// RUN: 2>&1 | FileCheck %s
+
+// CHECK: Cannot represent a difference across sections
+
+        .long foo - bar
+        .section .zed
+foo:
+        .section .bah
+bar:
diff --git a/test/MC/ELF/basic-elf-32.s b/test/MC/ELF/basic-elf-32.s
index 1f618e1..e12fc52 100644
--- a/test/MC/ELF/basic-elf-32.s
+++ b/test/MC/ELF/basic-elf-32.s
@@ -46,9 +46,9 @@ main:                                   # @main
 
 // CHECK: Relocations [
 // CHECK:   Section (2) .rel.text {
-// CHECK:     0x6  R_386_32   .rodata.str1.1
+// CHECK:     0x6  R_386_32   .L.str1
 // CHECK:     0xB  R_386_PC32 puts
-// CHECK:     0x12 R_386_32   .rodata.str1.1
+// CHECK:     0x12 R_386_32   .L.str2
 // CHECK:     0x17 R_386_PC32 puts
 // CHECK:   }
 // CHECK: ]
diff --git a/test/MC/ELF/cfi.s b/test/MC/ELF/cfi.s
index b8b6e6b..fd229b6 100644
--- a/test/MC/ELF/cfi.s
+++ b/test/MC/ELF/cfi.s
@@ -212,6 +212,11 @@ f36:
         nop
         .cfi_endproc
 
+f37:
+        .cfi_startproc simple
+        nop
+        .cfi_endproc
+
 // CHECK:        Section {
 // CHECK:          Index: 4
 // CHECK-NEXT:     Name: .eh_frame
@@ -221,7 +226,7 @@ f36:
 // CHECK-NEXT:     ]
 // CHECK-NEXT:     Address: 0x0
 // CHECK-NEXT:     Offset: 0x68
-// CHECK-NEXT:     Size: 1736
+// CHECK-NEXT:     Size: 1776
 // CHECK-NEXT:     Link: 0
 // CHECK-NEXT:     Info: 0
 // CHECK-NEXT:     AddressAlignment: 8
@@ -337,7 +342,9 @@ f36:
 // CHECK-NEXT:       0690: 00000000 1C000000 00000000 017A5052
 // CHECK-NEXT:       06A0: 00017810 0A980000 00000000 00001B0C
 // CHECK-NEXT:       06B0: 07089001 10000000 24000000 00000000
-// CHECK-NEXT:       06C0: 01000000 00000000
+// CHECK-NEXT:       06C0: 01000000 00000000 10000000 00000000
+// CHECK-NEXT:       06D0: 017A5200 01781001 1B000000 10000000
+// CHECK-NEXT:       06E0: 18000000 00000000 01000000 00000000
 // CHECK-NEXT:     )
 // CHECK-NEXT:   }
 
@@ -348,8 +355,8 @@ f36:
 // CHECK-NEXT:     Flags [
 // CHECK-NEXT:     ]
 // CHECK-NEXT:     Address: 0x0
-// CHECK-NEXT:     Offset: 0xE30
-// CHECK-NEXT:     Size: 1728
+// CHECK-NEXT:     Offset: 0xE70
+// CHECK-NEXT:     Size: 1752
 // CHECK-NEXT:     Link: 7
 // CHECK-NEXT:     Info: 4
 // CHECK-NEXT:     AddressAlignment: 8
@@ -427,5 +434,6 @@ f36:
 // CHECK-NEXT:       0x688 R_X86_64_PC32 .text 0x21
 // CHECK-NEXT:       0x6A6 R_X86_64_PC64 foo   0x0
 // CHECK-NEXT:       0x6BC R_X86_64_PC32 .text 0x22
+// CHECK-NEXT:       0x6E4 R_X86_64_PC32 .text 0x23
 // CHECK-NEXT:     ]
 // CHECK:        }
diff --git a/test/MC/ELF/comdat.s b/test/MC/ELF/comdat.s
index 3e4a001..05d08e14 100644
--- a/test/MC/ELF/comdat.s
+++ b/test/MC/ELF/comdat.s
@@ -74,7 +74,7 @@
 // CHECK-NEXT:     Binding: Global
 // CHECK-NEXT:     Type: None
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: (0x0)
+// CHECK-NEXT:     Section: Undefined (0x0)
 // CHECK-NEXT:   }
 
 
diff --git a/test/MC/ELF/common.s b/test/MC/ELF/common.s
index 4fc2154..9cff927 100644
--- a/test/MC/ELF/common.s
+++ b/test/MC/ELF/common.s
@@ -60,7 +60,7 @@
 // CHECK-NEXT:     Binding: Global
 // CHECK-NEXT:     Type: Object
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: (0xFFF2)
+// CHECK-NEXT:     Section: Common (0xFFF2)
 // CHECK-NEXT:   }
 
 
@@ -82,7 +82,7 @@ foo:
 // CHECK-NEXT:     Binding: Global
 // CHECK-NEXT:     Type: Object
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: (0xFFF2)
+// CHECK-NEXT:     Section: Common (0xFFF2)
 // CHECK-NEXT:   }
 
 
@@ -95,5 +95,5 @@ foo:
 // CHECK-NEXT:     Binding: Global
 // CHECK-NEXT:     Type: Object
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: (0xFFF2)
+// CHECK-NEXT:     Section: Common (0xFFF2)
 // CHECK-NEXT:   }
diff --git a/test/MC/ELF/compression.s b/test/MC/ELF/compression.s
new file mode 100644
index 0000000..305a84e
--- /dev/null
+++ b/test/MC/ELF/compression.s
@@ -0,0 +1,28 @@
+// RUN: llvm-mc -filetype=obj -compress-debug-sections -triple x86_64-pc-linux-gnu %s -o - | llvm-objdump -s - | FileCheck %s
+
+// REQUIRES: zlib
+
+// CHECK: Contents of section .debug_line:
+// FIXME: Figure out how to handle debug_line that currently uses multiple section fragments
+// CHECK-NOT: ZLIB
+
+// CHECK: Contents of section .zdebug_abbrev:
+// Check for the 'ZLIB' file magic at the start of the section
+// CHECK-NEXT: ZLIB
+
+// We shouldn't compress the debug_frame section, since it can be relaxed
+// CHECK: Contents of section .debug_frame
+// CHECK-NOT: ZLIB
+
+	.section	.debug_line,"",@progbits
+
+	.section	.debug_abbrev,"",@progbits
+	.byte	1                       # Abbreviation Code
+	.text
+foo:
+	.cfi_startproc
+	.file 1 "Driver.ii"
+	.loc 1 2 0
+        nop
+	.cfi_endproc
+	.cfi_sections .debug_frame
diff --git a/test/MC/ELF/discriminator.s b/test/MC/ELF/discriminator.s
new file mode 100644
index 0000000..8a695b9
--- /dev/null
+++ b/test/MC/ELF/discriminator.s
@@ -0,0 +1,61 @@
+# RUN: llvm-mc -triple i386-unknown-unknown %s -filetype=obj -o %t.o
+# RUN: llvm-readobj -r %t.o | FileCheck %s
+# RUN: llvm-dwarfdump -debug-dump=line %t.o | FileCheck %s -check-prefix=DWARF-DUMP
+
+    .file 1 "foo.c"
+    .text
+    .globl foo
+    .type foo, @function
+    .align 4
+foo:
+    .loc 1 2 discriminator 1
+    ret
+    .size foo, .-foo
+
+        .section        .debug_info,"",@progbits
+.L.debug_info_begin0:
+        .long   34                      # Length of Unit
+        .short  4                       # DWARF version number
+        .long   .L.debug_abbrev_begin   # Offset Into Abbrev. Section
+        .byte   8                       # Address Size (in bytes)
+        .byte   1                       # Abbrev [1] 0xb:0x1b DW_TAG_compile_unit
+        .long   .Linfo_string0          # DW_AT_producer
+        .short  12                      # DW_AT_language
+        .long   .Linfo_string1          # DW_AT_name
+        .quad   0                       # DW_AT_low_pc
+        .long   0                       # DW_AT_stmt_list
+        .long   .Linfo_string2          # DW_AT_comp_dir
+                                        # DW_AT_APPLE_optimized
+        .section        .debug_abbrev,"",@progbits
+.L.debug_abbrev_begin:
+        .byte   1                       # Abbreviation Code
+        .byte   17                      # DW_TAG_compile_unit
+        .byte   0                       # DW_CHILDREN_no
+        .byte   37                      # DW_AT_producer
+        .byte   14                      # DW_FORM_strp
+        .byte   19                      # DW_AT_language
+        .byte   5                       # DW_FORM_data2
+        .byte   3                       # DW_AT_name
+        .byte   14                      # DW_FORM_strp
+        .byte   17                      # DW_AT_low_pc
+        .byte   1                       # DW_FORM_addr
+        .byte   16                      # DW_AT_stmt_list
+        .byte   23                      # DW_FORM_sec_offset
+        .byte   27                      # DW_AT_comp_dir
+        .byte   14                      # DW_FORM_strp
+        .ascii  "\341\177"              # DW_AT_APPLE_optimized
+        .byte   25                      # DW_FORM_flag_present
+        .byte   0                       # EOM(1)
+        .byte   0                       # EOM(2)
+        .byte   0                       # EOM(3)
+.L.debug_abbrev_end:
+
+
+# CHECK:      Relocations [
+# CHECK:        Section ({{[^ ]+}}) .rel.debug_line {
+# CHECK-NEXT:     0x2D R_386_32 .text 0x0
+# CHECK-NEXT:   }
+
+# DWARF-DUMP: Address            Line   Column File   ISA Discriminator Flags
+# DWARF-DUMP: ------------------ ------ ------ ------ --- ------------- -------------
+# DWARF-DUMP: 0x0001021300000000     1      0      1   0             1  is_stmt
diff --git a/test/MC/ELF/dot-symbol-assignment.s b/test/MC/ELF/dot-symbol-assignment.s
new file mode 100644
index 0000000..00fe205
--- /dev/null
+++ b/test/MC/ELF/dot-symbol-assignment.s
@@ -0,0 +1,22 @@
+// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -sections -section-data | FileCheck %s
+
+one:
+	.quad 0xffffffffffffffff
+
+. = . + 16
+two:
+	.quad 0xeeeeeeeeeeeeeeee
+
+. = 0x20
+three:
+	.quad 0xdddddddddddddddd
+
+// CHECK:        Section {
+// CHECK:          Name: .text
+// CHECK-NEXT:     Type:
+// CHECK-NEXT:     Flags [
+// CHECK:          SectionData (
+// CHECK-NEXT:     0000: FFFFFFFF FFFFFFFF 00000000 00000000
+// CHECK-NEXT:     0010: 00000000 00000000 EEEEEEEE EEEEEEEE
+// CHECK-NEXT:     0020: DDDDDDDD DDDDDDDD
+// CHECK-NEXT:     )
diff --git a/test/MC/ELF/file-double.s b/test/MC/ELF/file-double.s
index b0731e6..f9b91ed 100644
--- a/test/MC/ELF/file-double.s
+++ b/test/MC/ELF/file-double.s
@@ -17,7 +17,7 @@ bar.c:
 // CHECK-NEXT:     Binding: Local
 // CHECK-NEXT:     Type: File
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: (0xFFF1)
+// CHECK-NEXT:     Section: Absolute (0xFFF1)
 // CHECK-NEXT:   }
 // CHECK:          Name: bar.c (7)
 // CHECK-NEXT:     Value: 0x0
@@ -25,7 +25,7 @@ bar.c:
 // CHECK-NEXT:     Binding: Local
 // CHECK-NEXT:     Type: File
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: (0xFFF1)
+// CHECK-NEXT:     Section: Absolute (0xFFF1)
 // CHECK-NEXT:   }
 // CHECK:        Symbol {
 // CHECK:        Name: bar.c (7)
diff --git a/test/MC/ELF/file.s b/test/MC/ELF/file.s
index 7e287f7..6b6cb44 100644
--- a/test/MC/ELF/file.s
+++ b/test/MC/ELF/file.s
@@ -12,7 +12,7 @@ foa:
 // CHECK-NEXT:     Binding: Local
 // CHECK-NEXT:     Type: File
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: (0xFFF1)
+// CHECK-NEXT:     Section: Absolute (0xFFF1)
 // CHECK-NEXT:   }
 // CHECK-NEXT:   Symbol {
 // CHECK-NEXT:     Name: foa (5)
diff --git a/test/MC/ELF/gen-dwarf.s b/test/MC/ELF/gen-dwarf.s
index a702bc8..946119b 100644
--- a/test/MC/ELF/gen-dwarf.s
+++ b/test/MC/ELF/gen-dwarf.s
@@ -1,4 +1,5 @@
 // RUN: llvm-mc -g -triple  i686-pc-linux-gnu %s -filetype=obj -o - | llvm-readobj -r | FileCheck %s
+// RUN: llvm-mc -g -triple  i686-pc-linux-gnu %s -filetype=asm -o - | FileCheck --check-prefix=ASM %s
 
 
 // Test that on ELF:
@@ -23,4 +24,23 @@ foo:
 // CHECK-NEXT:     0x6 R_386_32 .debug_info 0x0
 // CHECK-NEXT:     0x10 R_386_32 .text 0x0
 // CHECK-NEXT:   }
-// CHECK-NEXT: ]
+// CHECK:      ]
+
+// First instance of the section is just to give it a label for debug_aranges to refer to
+// ASM: .section .debug_info
+
+// ASM: .section .debug_abbrev
+// ASM-NEXT: [[ABBREV_LABEL:.Ltmp[0-9]+]]
+
+// Second instance of the section has the CU
+// ASM: .section .debug_info
+// Dwarf version
+// ASM: .short 2
+// ASM-NEXT: .long [[ABBREV_LABEL]]
+// First .byte 1 is the abbreviation number for the compile_unit abbrev
+// ASM: .byte 1
+// ASM-NEXT: .long [[LINE_LABEL:.L[a-z0-9]+]]
+
+// ASM: .section .debug_line
+// ASM-NEXT: [[LINE_LABEL]]
+
diff --git a/test/MC/ELF/ifunc-reloc.s b/test/MC/ELF/ifunc-reloc.s
new file mode 100644
index 0000000..0195463
--- /dev/null
+++ b/test/MC/ELF/ifunc-reloc.s
@@ -0,0 +1,16 @@
+// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -r | FileCheck %s
+        .global sym
+        .type sym, @gnu_indirect_function
+alias: 
+        .global alias
+        .type alias, @function
+        .set sym, alias
+
+
+        callq sym
+
+// CHECK: Relocations [
+// CHECK-NEXT:   Section (2) .rela.text {
+// CHECK-NEXT:     0x1 R_X86_64_PC32 sym 0xFFFFFFFFFFFFFFFC
+// CHECK-NEXT:   }
+// CHECK-NEXT: ]
diff --git a/test/MC/ELF/local-reloc.s b/test/MC/ELF/local-reloc.s
index 0c74519..19b9509 100644
--- a/test/MC/ELF/local-reloc.s
+++ b/test/MC/ELF/local-reloc.s
@@ -6,7 +6,7 @@
 	movl	foo, %r14d
 foo:
 
-// CHECKT:     Relocations [
+// CHECK:      Relocations [
 // CHECK:        Section (2) .rela.text {
 // CHECK-NEXT:     0x{{[^ ]+}} R_X86_64_32S .text 0x{{[^ ]+}}
 // CHECK-NEXT:   }
diff --git a/test/MC/ELF/many-section.s b/test/MC/ELF/many-section.s
deleted file mode 100644
index b729e66..0000000
--- a/test/MC/ELF/many-section.s
+++ /dev/null
@@ -1,93319 +0,0 @@
-// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o %t
-// RUN: llvm-nm -a %t | FileCheck %s
-
-// CHECK: s000a
-// CHECK-NOT: U
-// CHECK: szzzb
-
-.section saaaa
-.section saaab
-.section saaba
-.section saabb
-.section saaca
-.section saacb
-.section saada
-.section saadb
-.section saaea
-.section saaeb
-.section saafa
-.section saafb
-.section saaga
-.section saagb
-.section saaha
-.section saahb
-.section saaia
-.section saaib
-.section saaja
-.section saajb
-.section saaka
-.section saakb
-.section saala
-.section saalb
-.section saama
-.section saamb
-.section saana
-.section saanb
-.section saaoa
-.section saaob
-.section saapa
-.section saapb
-.section saaqa
-.section saaqb
-.section saara
-.section saarb
-.section saasa
-.section saasb
-.section saata
-.section saatb
-.section saaua
-.section saaub
-.section saava
-.section saavb
-.section saawa
-.section saawb
-.section saaxa
-.section saaxb
-.section saaya
-.section saayb
-.section saaza
-.section saazb
-.section saa1a
-.section saa1b
-.section saa2a
-.section saa2b
-.section saa3a
-.section saa3b
-.section saa4a
-.section saa4b
-.section saa5a
-.section saa5b
-.section saa6a
-.section saa6b
-.section saa7a
-.section saa7b
-.section saa8a
-.section saa8b
-.section saa9a
-.section saa9b
-.section saa0a
-.section saa0b
-.section sabaa
-.section sabab
-.section sabba
-.section sabbb
-.section sabca
-.section sabcb
-.section sabda
-.section sabdb
-.section sabea
-.section sabeb
-.section sabfa
-.section sabfb
-.section sabga
-.section sabgb
-.section sabha
-.section sabhb
-.section sabia
-.section sabib
-.section sabja
-.section sabjb
-.section sabka
-.section sabkb
-.section sabla
-.section sablb
-.section sabma
-.section sabmb
-.section sabna
-.section sabnb
-.section saboa
-.section sabob
-.section sabpa
-.section sabpb
-.section sabqa
-.section sabqb
-.section sabra
-.section sabrb
-.section sabsa
-.section sabsb
-.section sabta
-.section sabtb
-.section sabua
-.section sabub
-.section sabva
-.section sabvb
-.section sabwa
-.section sabwb
-.section sabxa
-.section sabxb
-.section sabya
-.section sabyb
-.section sabza
-.section sabzb
-.section sab1a
-.section sab1b
-.section sab2a
-.section sab2b
-.section sab3a
-.section sab3b
-.section sab4a
-.section sab4b
-.section sab5a
-.section sab5b
-.section sab6a
-.section sab6b
-.section sab7a
-.section sab7b
-.section sab8a
-.section sab8b
-.section sab9a
-.section sab9b
-.section sab0a
-.section sab0b
-.section sacaa
-.section sacab
-.section sacba
-.section sacbb
-.section sacca
-.section saccb
-.section sacda
-.section sacdb
-.section sacea
-.section saceb
-.section sacfa
-.section sacfb
-.section sacga
-.section sacgb
-.section sacha
-.section sachb
-.section sacia
-.section sacib
-.section sacja
-.section sacjb
-.section sacka
-.section sackb
-.section sacla
-.section saclb
-.section sacma
-.section sacmb
-.section sacna
-.section sacnb
-.section sacoa
-.section sacob
-.section sacpa
-.section sacpb
-.section sacqa
-.section sacqb
-.section sacra
-.section sacrb
-.section sacsa
-.section sacsb
-.section sacta
-.section sactb
-.section sacua
-.section sacub
-.section sacva
-.section sacvb
-.section sacwa
-.section sacwb
-.section sacxa
-.section sacxb
-.section sacya
-.section sacyb
-.section sacza
-.section saczb
-.section sac1a
-.section sac1b
-.section sac2a
-.section sac2b
-.section sac3a
-.section sac3b
-.section sac4a
-.section sac4b
-.section sac5a
-.section sac5b
-.section sac6a
-.section sac6b
-.section sac7a
-.section sac7b
-.section sac8a
-.section sac8b
-.section sac9a
-.section sac9b
-.section sac0a
-.section sac0b
-.section sadaa
-.section sadab
-.section sadba
-.section sadbb
-.section sadca
-.section sadcb
-.section sadda
-.section saddb
-.section sadea
-.section sadeb
-.section sadfa
-.section sadfb
-.section sadga
-.section sadgb
-.section sadha
-.section sadhb
-.section sadia
-.section sadib
-.section sadja
-.section sadjb
-.section sadka
-.section sadkb
-.section sadla
-.section sadlb
-.section sadma
-.section sadmb
-.section sadna
-.section sadnb
-.section sadoa
-.section sadob
-.section sadpa
-.section sadpb
-.section sadqa
-.section sadqb
-.section sadra
-.section sadrb
-.section sadsa
-.section sadsb
-.section sadta
-.section sadtb
-.section sadua
-.section sadub
-.section sadva
-.section sadvb
-.section sadwa
-.section sadwb
-.section sadxa
-.section sadxb
-.section sadya
-.section sadyb
-.section sadza
-.section sadzb
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diff --git a/test/MC/ELF/many-sections-2.s b/test/MC/ELF/many-sections-2.s
index 789ebf3..d1f9d00 100644
--- a/test/MC/ELF/many-sections-2.s
+++ b/test/MC/ELF/many-sections-2.s
@@ -1,65281 +1,133 @@
 // RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o %t
-// RUN: llvm-readobj -s %t | FileCheck %s
+// RUN: llvm-readobj -s %t | FileCheck --check-prefix=SECTIONS %s
+// RUN: llvm-readobj -t %t | FileCheck --check-prefix=SYMBOLS %s
 
-// CHECK: symtab_shndx
+// Test that we create a .symtab_shndx if a symbol points to a section
+// numbered SHN_LORESERVE (0xFF00) or higher.
 
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-.section szfza
-.section szfzb
-.section szf1a
-.section szf1b
-.section szf2a
-.section szf2b
-.section szf3a
-.section szf3b
-.section szf4a
-.section szf4b
-.section szf5a
-.section szf5b
-.section szf6a
-.section szf6b
-.section szf7a
-.section szf7b
-.section szf8a
-.section szf8b
-.section szf9a
-.section szf9b
-.section szf0a
-.section szf0b
-.section szgaa
-.section szgab
-.section szgba
-.section szgbb
-.section szgca
-.section szgcb
-.section szgda
-.section szgdb
-.section szgea
-.section szgeb
-.section szgfa
-.section szgfb
-.section szgga
-.section szggb
-.section szgha
-.section szghb
-.section szgia
-.section szgib
-.section szgja
-.section szgjb
-.section szgka
-.section szgkb
-.section szgla
-.section szglb
-.section szgma
-.section szgmb
-.section szgna
-.section szgnb
-.section szgoa
-.section szgob
-.section szgpa
-.section szgpb
-.section szgqa
-.section szgqb
-.section szgra
-.section szgrb
-.section szgsa
-.section szgsb
-.section szgta
-.section szgtb
-.section szgua
-.section szgub
-.section szgva
-.section szgvb
+// SECTIONS: Name: .symtab_shndx
+
+// Test that we don't create a symbol for the symtab_shndx section.
+// SYMBOLS-NOT: symtab_shndx
+
+
+// Test that both a and b show up in the correct section.
+// SYMBOLS:         Name: a (1)
+// SYMBOLS-NEXT:    Value: 0x0
+// SYMBOLS-NEXT:    Size: 0
+// SYMBOLS-NEXT:    Binding: Local (0x0)
+// SYMBOLS-NEXT:    Type: None (0x0)
+// SYMBOLS-NEXT:    Other: 0
+// SYMBOLS-NEXT:    Section: last (0xFF00)
+// SYMBOLS-NEXT:  }
+// SYMBOLS-NEXT:  Symbol {
+// SYMBOLS-NEXT:    Name: b (3)
+// SYMBOLS-NEXT:    Value: 0x1
+// SYMBOLS-NEXT:    Size: 0
+// SYMBOLS-NEXT:    Binding: Local (0x0)
+// SYMBOLS-NEXT:    Type: None (0x0)
+// SYMBOLS-NEXT:    Other: 0
+// SYMBOLS-NEXT:    Section: last (0xFF00)
+// SYMBOLS-NEXT:  }
+
+
+// Test that this file has one section too many.
+// SYMBOLS:         Name: last (0)
+// SYMBOLS-NEXT:    Value: 0x0
+// SYMBOLS-NEXT:    Size: 0
+// SYMBOLS-NEXT:    Binding: Local (0x0)
+// SYMBOLS-NEXT:    Type: Section (0x3)
+// SYMBOLS-NEXT:    Other: 0
+// SYMBOLS-NEXT:    Section: last (0xFF00)
+// SYMBOLS-NEXT:  }
+// SYMBOLS-NEXT:]
+
+.macro gen_sections4 x
+        .section a\x
+        .section b\x
+        .section c\x
+        .section d\x
+.endm
+
+.macro gen_sections8 x
+        gen_sections4 a\x
+        gen_sections4 b\x
+.endm
+
+.macro gen_sections16 x
+        gen_sections8 a\x
+        gen_sections8 b\x
+.endm
+
+.macro gen_sections32 x
+        gen_sections16 a\x
+        gen_sections16 b\x
+.endm
+
+.macro gen_sections64 x
+        gen_sections32 a\x
+        gen_sections32 b\x
+.endm
+
+.macro gen_sections128 x
+        gen_sections64 a\x
+        gen_sections64 b\x
+.endm
+
+.macro gen_sections256 x
+        gen_sections128 a\x
+        gen_sections128 b\x
+.endm
+
+.macro gen_sections512 x
+        gen_sections256 a\x
+        gen_sections256 b\x
+.endm
+
+.macro gen_sections1024 x
+        gen_sections512 a\x
+        gen_sections512 b\x
+.endm
+
+.macro gen_sections2048 x
+        gen_sections1024 a\x
+        gen_sections1024 b\x
+.endm
+
+.macro gen_sections4096 x
+        gen_sections2048 a\x
+        gen_sections2048 b\x
+.endm
+
+.macro gen_sections8192 x
+        gen_sections4096 a\x
+        gen_sections4096 b\x
+.endm
+
+.macro gen_sections16384 x
+        gen_sections8192 a\x
+        gen_sections8192 b\x
+.endm
+
+.macro gen_sections32768 x
+        gen_sections16384 a\x
+        gen_sections16384 b\x
+.endm
+
+gen_sections32768 a
+gen_sections16384 b
+gen_sections8192 c
+gen_sections4096 d
+gen_sections2048 e
+gen_sections1024 f
+gen_sections512 g
+gen_sections128 h
+gen_sections64 i
+gen_sections32 j
+gen_sections16 k
+gen_sections8 l
+gen_sections4 m
+
+.section last
+a:
+b = a + 1
diff --git a/test/MC/ELF/many-sections.s b/test/MC/ELF/many-sections.s
new file mode 100644
index 0000000..93ea8e7
--- /dev/null
+++ b/test/MC/ELF/many-sections.s
@@ -0,0 +1,106 @@
+// RUN:  llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o %t
+// RUN: llvm-readobj -s %t | FileCheck --check-prefix=SECTIONS %s
+// RUN: llvm-readobj -t %t | FileCheck --check-prefix=SYMBOLS %s
+
+// Test that we don't create a .symtab_shndx since we are one section short of
+// SHN_LORESERVE (0xFF00).
+
+// SECTIONS-NOT: Name: .symtab_shndx
+
+// Check the last referenced section.
+
+// SYMBOLS:         Name: dm (0)
+// SYMBOLS-NEXT:    Value: 0x0
+// SYMBOLS-NEXT:    Size: 0
+// SYMBOLS-NEXT:    Binding: Local (0x0)
+// SYMBOLS-NEXT:    Type: Section (0x3)
+// SYMBOLS-NEXT:    Other: 0
+// SYMBOLS-NEXT:    Section: dm (0xFEFF)
+// SYMBOLS-NEXT:  }
+// SYMBOLS-NEXT:]
+
+.macro gen_sections4 x
+        .section a\x
+        .section b\x
+        .section c\x
+        .section d\x
+.endm
+
+.macro gen_sections8 x
+        gen_sections4 a\x
+        gen_sections4 b\x
+.endm
+
+.macro gen_sections16 x
+        gen_sections8 a\x
+        gen_sections8 b\x
+.endm
+
+.macro gen_sections32 x
+        gen_sections16 a\x
+        gen_sections16 b\x
+.endm
+
+.macro gen_sections64 x
+        gen_sections32 a\x
+        gen_sections32 b\x
+.endm
+
+.macro gen_sections128 x
+        gen_sections64 a\x
+        gen_sections64 b\x
+.endm
+
+.macro gen_sections256 x
+        gen_sections128 a\x
+        gen_sections128 b\x
+.endm
+
+.macro gen_sections512 x
+        gen_sections256 a\x
+        gen_sections256 b\x
+.endm
+
+.macro gen_sections1024 x
+        gen_sections512 a\x
+        gen_sections512 b\x
+.endm
+
+.macro gen_sections2048 x
+        gen_sections1024 a\x
+        gen_sections1024 b\x
+.endm
+
+.macro gen_sections4096 x
+        gen_sections2048 a\x
+        gen_sections2048 b\x
+.endm
+
+.macro gen_sections8192 x
+        gen_sections4096 a\x
+        gen_sections4096 b\x
+.endm
+
+.macro gen_sections16384 x
+        gen_sections8192 a\x
+        gen_sections8192 b\x
+.endm
+
+.macro gen_sections32768 x
+        gen_sections16384 a\x
+        gen_sections16384 b\x
+.endm
+
+gen_sections32768 a
+gen_sections16384 b
+gen_sections8192 c
+gen_sections4096 d
+gen_sections2048 e
+gen_sections1024 f
+gen_sections512 g
+gen_sections128 h
+gen_sections64 i
+gen_sections32 j
+gen_sections16 k
+gen_sections8 l
+gen_sections4 m
diff --git a/test/MC/ELF/merge.s b/test/MC/ELF/merge.s
index 0e92583..d6e0b7c 100644
--- a/test/MC/ELF/merge.s
+++ b/test/MC/ELF/merge.s
@@ -1,10 +1,7 @@
 // RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -r | FileCheck  %s
 
-// Test that PIC relocations with local symbols in a mergeable section are done
-// with a reference to the symbol. Not sure if this is a linker limitation,
-// but this matches the behavior of gas.
-
-// Non-PIC relocations with 0 offset don't use the symbol.
+// Test that relocations with local symbols in a mergeable section are done
+// with a reference to the symbol if the offset is non zero.
 
 
         movsd   .Lfoo(%rip), %xmm1
@@ -13,6 +10,7 @@
         jmp	foo@PLT
         movq 	foo@GOTPCREL, %rax
         movq    zed, %rax
+        movsd   .Lfoo+4(%rip), %xmm1
 
         .section        .sec1,"aM",@progbits,16
 .Lfoo:
@@ -30,5 +28,6 @@ foo:
 // CHECK-NEXT:     0x{{[^ ]+}} R_X86_64_PLT32    foo  0x{{[^ ]+}}
 // CHECK-NEXT:     0x{{[^ ]+}} R_X86_64_GOTPCREL foo  0x{{[^ ]+}}
 // CHECK-NEXT:     0x{{[^ ]+}} R_X86_64_32S      zed  0x{{[^ ]+}}
+// CHECK-NEXT:     0x{{[^ ]+}} R_X86_64_PC32    .sec1 0x{{[^ ]+}}
 // CHECK-NEXT:   }
 // CHECK-NEXT: ]
diff --git a/test/MC/ELF/nocompression.s b/test/MC/ELF/nocompression.s
new file mode 100644
index 0000000..e7b01f7
--- /dev/null
+++ b/test/MC/ELF/nocompression.s
@@ -0,0 +1,5 @@
+// RUN: not llvm-mc -filetype=obj -compress-debug-sections -triple x86_64-pc-linux-gnu %s -o - 2>&1 | FileCheck %s
+
+// REQUIRES: nozlib
+
+// CHECK: llvm-mc{{[^:]*}}: build tools with zlib to enable -compress-debug-sections
diff --git a/test/MC/ELF/offset.s b/test/MC/ELF/offset.s
new file mode 100644
index 0000000..a412619
--- /dev/null
+++ b/test/MC/ELF/offset.s
@@ -0,0 +1,73 @@
+// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -t - | FileCheck %s
+
+// Test that a variable declared with "var = other_var + cst" is in the same
+// section as other_var and its value is the value of other_var + cst.
+
+        .data
+        .globl	sym_a
+        .size sym_a, 42
+        .byte 42
+        .type sym_a, @object
+sym_a:
+
+// CHECK:       Symbol {
+// CHECK:         Name: sym_a
+// CHECK-NEXT:    Value: 0x1
+// CHECK-NEXT:    Size: 42
+// CHECK-NEXT:    Binding: Global
+// CHECK-NEXT:    Type: Object
+// CHECK-NEXT:    Other: 0
+// CHECK-NEXT:    Section: .data
+// CHECK-NEXT:  }
+
+        .long 42
+        .globl sym_b
+sym_b:
+        .globl sym_c
+sym_c = sym_a
+// CHECK:       Symbol {
+// CHECK:         Name: sym_c
+// CHECK-NEXT:    Value: 0x1
+// CHECK-NEXT:    Size: 42
+// CHECK-NEXT:    Binding: Global
+// CHECK-NEXT:    Type: Object
+// CHECK-NEXT:    Other: 0
+// CHECK-NEXT:    Section: .data
+// CHECK-NEXT:  }
+
+        .globl sym_d
+sym_d = sym_a + 1
+// CHECK:       Symbol {
+// CHECK:         Name: sym_d
+// CHECK-NEXT:    Value: 0x2
+// CHECK-NEXT:    Size: 42
+// CHECK-NEXT:    Binding: Global
+// CHECK-NEXT:    Type: Object
+// CHECK-NEXT:    Other: 0
+// CHECK-NEXT:    Section: .data
+// CHECK-NEXT:  }
+
+        .globl sym_e
+sym_e = sym_a + (sym_b - sym_a) * 3
+// CHECK:       Symbol {
+// CHECK:         Name: sym_e
+// CHECK-NEXT:    Value: 0xD
+// CHECK-NEXT:    Size: 42
+// CHECK-NEXT:    Binding: Global
+// CHECK-NEXT:    Type: Object
+// CHECK-NEXT:    Other: 0
+// CHECK-NEXT:    Section: .data
+// CHECK-NEXT:  }
+
+
+        .globl sym_f
+sym_f = sym_a + (1 - 1)
+// CHECK:       Symbol {
+// CHECK:         Name: sym_f
+// CHECK-NEXT:    Value: 0x1
+// CHECK-NEXT:    Size: 42
+// CHECK-NEXT:    Binding: Global
+// CHECK-NEXT:    Type: Object
+// CHECK-NEXT:    Other: 0
+// CHECK-NEXT:    Section: .data
+// CHECK-NEXT:  }
diff --git a/test/MC/ELF/pic-diff.s b/test/MC/ELF/pic-diff.s
index cffa0dd..30c9278 100644
--- a/test/MC/ELF/pic-diff.s
+++ b/test/MC/ELF/pic-diff.s
@@ -13,7 +13,7 @@
 // CHECK-NEXT:     Binding: Global
 // CHECK-NEXT:     Type: None
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: (0x0)
+// CHECK-NEXT:     Section: Undefined (0x0)
 // CHECK-NEXT:   }
 
 .zero 4
diff --git a/test/MC/ELF/pr9292.s b/test/MC/ELF/pr9292.s
index a6e78dc..a433650 100644
--- a/test/MC/ELF/pr9292.s
+++ b/test/MC/ELF/pr9292.s
@@ -14,7 +14,7 @@ mov %eax,bar
 // CHECK-NEXT:     Binding: Global
 // CHECK-NEXT:     Type: None
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: (0x0)
+// CHECK-NEXT:     Section: Undefined (0x0)
 // CHECK-NEXT:   }
 // CHECK-NEXT:   Symbol {
 // CHECK-NEXT:     Name: foo (1)
@@ -23,5 +23,5 @@ mov %eax,bar
 // CHECK-NEXT:     Binding: Global
 // CHECK-NEXT:     Type: None
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: (0x0)
+// CHECK-NEXT:     Section: Undefined (0x0)
 // CHECK-NEXT:   }
diff --git a/test/MC/ELF/relocation-386.s b/test/MC/ELF/relocation-386.s
index 9bc8310..4ddfd00 100644
--- a/test/MC/ELF/relocation-386.s
+++ b/test/MC/ELF/relocation-386.s
@@ -58,12 +58,16 @@
 // CHECK-NEXT:     0x94         R_386_GOTPC      _GLOBAL_OFFSET_TABLE_ 0x0
 // Relocation 26 (und_symbol-bar2) is of type R_386_PC32
 // CHECK-NEXT:     0x9A         R_386_PC32       und_symbol 0x0
+// Relocation 27 (und_symbol-bar2) is of type R_386_PC16
+// CHECK-NEXT:     0x9E         R_386_PC16       und_symbol 0x0
+// Relocation 28 (und_symbol-bar2) is of type R_386_PC8
+// CHECK-NEXT:     0xA0         R_386_PC8        und_symbol 0x0
 // CHECK-NEXT:   }
 // CHECK-NEXT: ]
 
 // Symbol 4 is zed
 // CHECK:        Symbol {
-// CHECK:          Name: zed (53)
+// CHECK:          Name: zed
 // CHECK-NEXT:     Value: 0x0
 // CHECK-NEXT:     Size: 0
 // CHECK-NEXT:     Binding: Local
@@ -120,6 +124,8 @@ bar2:
         addl foo@GOTTPOFF(%edx), %eax
         subl    _GLOBAL_OFFSET_TABLE_-bar2, %ebx
         leal und_symbol-bar2(%edx),%ecx
+        .word und_symbol-bar2
+        .byte und_symbol-bar2
 
         .section        zedsec,"awT",@progbits
 zed:
diff --git a/test/MC/ELF/relocation-pc.s b/test/MC/ELF/relocation-pc.s
index fc7420c..0ce3201 100644
--- a/test/MC/ELF/relocation-pc.s
+++ b/test/MC/ELF/relocation-pc.s
@@ -26,7 +26,7 @@
 // CHECK-NEXT:     AddressAlignment: 8
 // CHECK-NEXT:     EntrySize: 24
 // CHECK-NEXT:     Relocations [
-// CHECK-NEXT:       0x1 R_X86_64_PC8 - 0x0
-// CHECK-NEXT:       0x3 R_X86_64_PC32 - 0x0
+// CHECK-NEXT:       0x1 R_X86_64_PC8 - 0xFFFFFFFFFFFFFFFF
+// CHECK-NEXT:       0x3 R_X86_64_PC32 - 0xFFFFFFFFFFFFFEFC
 // CHECK-NEXT:     ]
 // CHECK-NEXT:   }
diff --git a/test/MC/ELF/relocation.s b/test/MC/ELF/relocation.s
index 6823075..d2ee6af 100644
--- a/test/MC/ELF/relocation.s
+++ b/test/MC/ELF/relocation.s
@@ -22,6 +22,11 @@ bar:
         addq	$bar,%rax         # R_X86_64_32S
 	.quad	foo@DTPOFF
         movabsq	$baz@TPOFF, %rax
+	.word   foo-bar
+	.byte   foo-bar
+
+	zed = foo +2
+	call zed@PLT
 
 // CHECK:        Section {
 // CHECK:          Name: .rela.text
@@ -45,6 +50,9 @@ bar:
 // CHECK-NEXT:       0x77 R_X86_64_32S .text 0x0
 // CHECK-NEXT:       0x7B R_X86_64_DTPOFF64 foo 0x0
 // CHECK-NEXT:       0x85 R_X86_64_TPOFF64 baz 0x0
+// CHECK-NEXT:       0x8D R_X86_64_PC16 foo 0x8D
+// CHECK-NEXT:       0x8F R_X86_64_PC8 foo 0x8F
+// CHECK-NEXT:       0x91 R_X86_64_PLT32 foo 0xFFFFFFFFFFFFFFFE
 // CHECK-NEXT:     ]
 // CHECK-NEXT:   }
 
diff --git a/test/MC/ELF/set.s b/test/MC/ELF/set.s
index f6965a5..80e7e53 100644
--- a/test/MC/ELF/set.s
+++ b/test/MC/ELF/set.s
@@ -11,7 +11,7 @@
 // CHECK-NEXT:     Binding: Local
 // CHECK-NEXT:     Type: None
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: (0xFFF1)
+// CHECK-NEXT:     Section: Absolute (0xFFF1)
 // CHECK-NEXT:   }
 
 // Test that we accept .set of a symbol after it has been used in a statement.
@@ -32,5 +32,5 @@
 // CHECK-NEXT:     Binding: Global
 // CHECK-NEXT:     Type: None
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: (0x0)
+// CHECK-NEXT:     Section: Undefined (0x0)
 // CHECK-NEXT:   }
diff --git a/test/MC/ELF/symref.s b/test/MC/ELF/symref.s
index c8015b9..737683b 100644
--- a/test/MC/ELF/symref.s
+++ b/test/MC/ELF/symref.s
@@ -128,7 +128,7 @@ global1:
 // CHECK-NEXT:     Binding: Global
 // CHECK-NEXT:     Type: None
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: (0x0)
+// CHECK-NEXT:     Section: Undefined (0x0)
 // CHECK-NEXT:   }
 // CHECK-NEXT:   Symbol {
 // CHECK-NEXT:     Name: bar6@zed (57)
@@ -137,6 +137,6 @@ global1:
 // CHECK-NEXT:     Binding: Global
 // CHECK-NEXT:     Type: None
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: (0x0)
+// CHECK-NEXT:     Section: Undefined (0x0)
 // CHECK-NEXT:   }
 // CHECK-NEXT: ]
diff --git a/test/MC/ELF/tls-i386.s b/test/MC/ELF/tls-i386.s
index 267046e..88e96ff 100644
--- a/test/MC/ELF/tls-i386.s
+++ b/test/MC/ELF/tls-i386.s
@@ -24,7 +24,7 @@
 // CHECK-NEXT:     Binding: Global
 // CHECK-NEXT:     Type: TLS
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: (0x0)
+// CHECK-NEXT:     Section: Undefined (0x0)
 // CHECK-NEXT:   }
 // CHECK-NEXT:   Symbol {
 // CHECK-NEXT:     Name: foo2 (6)
@@ -33,7 +33,7 @@
 // CHECK-NEXT:     Binding: Global
 // CHECK-NEXT:     Type: TLS
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: (0x0)
+// CHECK-NEXT:     Section: Undefined (0x0)
 // CHECK-NEXT:   }
 // CHECK-NEXT:   Symbol {
 // CHECK-NEXT:     Name: foo3 (11)
@@ -42,7 +42,7 @@
 // CHECK-NEXT:     Binding: Global
 // CHECK-NEXT:     Type: TLS
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: (0x0)
+// CHECK-NEXT:     Section: Undefined (0x0)
 // CHECK-NEXT:   }
 // CHECK-NEXT:   Symbol {
 // CHECK-NEXT:     Name: foo4 (16)
@@ -51,7 +51,7 @@
 // CHECK-NEXT:     Binding: Global
 // CHECK-NEXT:     Type: TLS
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: (0x0)
+// CHECK-NEXT:     Section: Undefined (0x0)
 // CHECK-NEXT:   }
 // CHECK-NEXT:   Symbol {
 // CHECK-NEXT:     Name: foo5 (21)
@@ -60,7 +60,7 @@
 // CHECK-NEXT:     Binding: Global
 // CHECK-NEXT:     Type: TLS
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: (0x0)
+// CHECK-NEXT:     Section: Undefined (0x0)
 // CHECK-NEXT:   }
 // CHECK-NEXT:   Symbol {
 // CHECK-NEXT:     Name: foo6 (26)
@@ -69,7 +69,7 @@
 // CHECK-NEXT:     Binding: Global
 // CHECK-NEXT:     Type: TLS
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: (0x0)
+// CHECK-NEXT:     Section: Undefined (0x0)
 // CHECK-NEXT:   }
 // CHECK-NEXT:   Symbol {
 // CHECK-NEXT:     Name: foo7 (31)
@@ -78,7 +78,7 @@
 // CHECK-NEXT:     Binding: Global
 // CHECK-NEXT:     Type: TLS
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: (0x0)
+// CHECK-NEXT:     Section: Undefined (0x0)
 // CHECK-NEXT:   }
 // CHECK-NEXT:   Symbol {
 // CHECK-NEXT:     Name: foo8 (36)
@@ -87,7 +87,7 @@
 // CHECK-NEXT:     Binding: Global
 // CHECK-NEXT:     Type: TLS
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: (0x0)
+// CHECK-NEXT:     Section: Undefined (0x0)
 // CHECK-NEXT:   }
 // CHECK-NEXT:   Symbol {
 // CHECK-NEXT:     Name: foo9 (41)
@@ -96,7 +96,7 @@
 // CHECK-NEXT:     Binding: Global
 // CHECK-NEXT:     Type: TLS
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: (0x0)
+// CHECK-NEXT:     Section: Undefined (0x0)
 // CHECK-NEXT:   }
 // CHECK-NEXT:   Symbol {
 // CHECK-NEXT:     Name: fooA (46)
@@ -105,7 +105,7 @@
 // CHECK-NEXT:     Binding: Global
 // CHECK-NEXT:     Type: TLS
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: (0x0)
+// CHECK-NEXT:     Section: Undefined (0x0)
 // CHECK-NEXT:   }
 // CHECK-NEXT:   Symbol {
 // CHECK-NEXT:     Name: fooB (51)
@@ -114,7 +114,7 @@
 // CHECK-NEXT:     Binding: Global
 // CHECK-NEXT:     Type: TLS
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: (0x0)
+// CHECK-NEXT:     Section: Undefined (0x0)
 // CHECK-NEXT:   }
 // CHECK-NEXT:   Symbol {
 // CHECK-NEXT:     Name: fooC (56)
@@ -123,7 +123,7 @@
 // CHECK-NEXT:     Binding: Global
 // CHECK-NEXT:     Type: TLS
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: (0x0)
+// CHECK-NEXT:     Section: Undefined (0x0)
 // CHECK-NEXT:   }
 // CHECK-NEXT:   Symbol {
 // CHECK-NEXT:     Name: fooD (61)
@@ -132,7 +132,7 @@
 // CHECK-NEXT:     Binding: Global
 // CHECK-NEXT:     Type: TLS
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: (0x0)
+// CHECK-NEXT:     Section: Undefined (0x0)
 // CHECK-NEXT:   }
 // CHECK-NEXT:   Symbol {
 // CHECK-NEXT:     Name: fooE (66)
@@ -141,5 +141,5 @@
 // CHECK-NEXT:     Binding: Global
 // CHECK-NEXT:     Type: TLS
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: (0x0)
+// CHECK-NEXT:     Section: Undefined (0x0)
 // CHECK-NEXT:   }
diff --git a/test/MC/ELF/tls.s b/test/MC/ELF/tls.s
index c71e396..6d4b703 100644
--- a/test/MC/ELF/tls.s
+++ b/test/MC/ELF/tls.s
@@ -29,7 +29,7 @@ foobar:
 // CHECK-NEXT:     Binding: Global
 // CHECK-NEXT:     Type: TLS
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: (0x0)
+// CHECK-NEXT:     Section: Undefined (0x0)
 // CHECK-NEXT:   }
 // CHECK-NEXT:   Symbol {
 // CHECK-NEXT:     Name: foo2 (6)
@@ -38,7 +38,7 @@ foobar:
 // CHECK-NEXT:     Binding: Global
 // CHECK-NEXT:     Type: TLS
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: (0x0)
+// CHECK-NEXT:     Section: Undefined (0x0)
 // CHECK-NEXT:   }
 // CHECK-NEXT:   Symbol {
 // CHECK-NEXT:     Name: foo3 (11)
@@ -47,7 +47,7 @@ foobar:
 // CHECK-NEXT:     Binding: Global
 // CHECK-NEXT:     Type: TLS
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: (0x0)
+// CHECK-NEXT:     Section: Undefined (0x0)
 // CHECK-NEXT:   }
 // CHECK-NEXT:   Symbol {
 // CHECK-NEXT:     Name: foo4 (16)
@@ -56,7 +56,7 @@ foobar:
 // CHECK-NEXT:     Binding: Global
 // CHECK-NEXT:     Type: TLS
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: (0x0)
+// CHECK-NEXT:     Section: Undefined (0x0)
 // CHECK-NEXT:   }
 // CHECK-NEXT:   Symbol {
 // CHECK-NEXT:     Name: foo5 (21)
@@ -65,7 +65,7 @@ foobar:
 // CHECK-NEXT:     Binding: Global
 // CHECK-NEXT:     Type: TLS
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: (0x0)
+// CHECK-NEXT:     Section: Undefined (0x0)
 // CHECK-NEXT:   }
 // CHECK-NEXT:   Symbol {
 // CHECK-NEXT:     Name: foo6 (26)
@@ -74,5 +74,5 @@ foobar:
 // CHECK-NEXT:     Binding: Global
 // CHECK-NEXT:     Type: TLS
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: (0x0)
+// CHECK-NEXT:     Section: Undefined (0x0)
 // CHECK-NEXT:   }
diff --git a/test/MC/ELF/type-propagate.s b/test/MC/ELF/type-propagate.s
new file mode 100644
index 0000000..15d05af
--- /dev/null
+++ b/test/MC/ELF/type-propagate.s
@@ -0,0 +1,151 @@
+// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -t - | FileCheck %s
+
+// This tests that types are propagated from symbols to their aliases. Our
+// behavior is a bit different than gas. If the type of a symbol changes,
+// gas will update the type of the aliases only if those aliases were declare
+// at a point in the file where the aliased symbol was already define.
+
+// The lines marked with GAS illustrate this difference.
+
+
+	.type sym01, @object
+sym01:
+	.type sym02, @function
+sym02:
+
+	sym03 = sym01
+	sym04 = sym03
+.type sym03, @function
+	sym05 = sym03
+	sym06 = sym01 - sym02
+	sym07 = sym02 - sym01
+
+	sym08 = sym10
+	sym09 = sym10 + 1
+	.type sym10, @object
+sym10:
+
+	sym11 = sym10
+	sym12 = sym10 + 1
+	.type sym10, @function
+
+// CHECK:       Symbol {
+// CHECK:         Name: sym01
+// CHECK-NEXT:    Value: 0x0
+// CHECK-NEXT:    Size: 0
+// CHECK-NEXT:    Binding: Local (0x0)
+// CHECK-NEXT:    Type: Object (0x1)
+// CHECK-NEXT:    Other: 0
+// CHECK-NEXT:    Section: .text (0x1)
+// CHECK-NEXT:  }
+// CHECK-NEXT:  Symbol {
+// CHECK-NEXT:    Name: sym02
+// CHECK-NEXT:    Value: 0x0
+// CHECK-NEXT:    Size: 0
+// CHECK-NEXT:    Binding: Local (0x0)
+// CHECK-NEXT:    Type: Function (0x2)
+// CHECK-NEXT:    Other: 0
+// CHECK-NEXT:    Section: .text (0x1)
+// CHECK-NEXT:  }
+// CHECK-NEXT:  Symbol {
+// CHECK-NEXT:    Name: sym03
+// CHECK-NEXT:    Value: 0x0
+// CHECK-NEXT:    Size: 0
+// CHECK-NEXT:    Binding: Local (0x0)
+// CHECK-NEXT:    Type: Function (0x2)
+// CHECK-NEXT:    Other: 0
+// CHECK-NEXT:    Section: .text (0x1)
+// CHECK-NEXT:  }
+// CHECK-NEXT:  Symbol {
+// CHECK-NEXT:    Name: sym04
+// CHECK-NEXT:    Value: 0x0
+// CHECK-NEXT:    Size: 0
+// CHECK-NEXT:    Binding: Local (0x0)
+// CHECK-NEXT:    Type: Object (0x1)
+// CHECK-NEXT:    Other: 0
+// CHECK-NEXT:    Section: .text (0x1)
+// CHECK-NEXT:  }
+// CHECK-NEXT:  Symbol {
+// CHECK-NEXT:    Name: sym05
+// CHECK-NEXT:    Value: 0x0
+// CHECK-NEXT:    Size: 0
+// CHECK-NEXT:    Binding: Local (0x0)
+
+// GAS:           Type: Function (0x2)
+// CHECK-NEXT:    Type: Object (0x1)
+
+// CHECK-NEXT:    Other: 0
+// CHECK-NEXT:    Section: .text (0x1)
+// CHECK-NEXT:  }
+// CHECK-NEXT:  Symbol {
+// CHECK-NEXT:    Name: sym06
+// CHECK-NEXT:    Value: 0x0
+// CHECK-NEXT:    Size: 0
+// CHECK-NEXT:    Binding: Local (0x0)
+// CHECK-NEXT:    Type: None (0x0)
+// CHECK-NEXT:    Other: 0
+// CHECK-NEXT:    Section: Absolute (0xFFF1)
+// CHECK-NEXT:  }
+// CHECK-NEXT:  Symbol {
+// CHECK-NEXT:    Name: sym07
+// CHECK-NEXT:    Value: 0x0
+// CHECK-NEXT:    Size: 0
+// CHECK-NEXT:    Binding: Local (0x0)
+// CHECK-NEXT:    Type: None (0x0)
+// CHECK-NEXT:    Other: 0
+// CHECK-NEXT:    Section: Absolute (0xFFF1)
+// CHECK-NEXT:  }
+// CHECK-NEXT:  Symbol {
+// CHECK-NEXT:    Name: sym08
+// CHECK-NEXT:    Value: 0x0
+// CHECK-NEXT:    Size: 0
+// CHECK-NEXT:    Binding: Local (0x0)
+// CHECK-NEXT:    Type: Function (0x2)
+// CHECK-NEXT:    Other: 0
+// CHECK-NEXT:    Section: .text (0x1)
+// CHECK-NEXT:  }
+// CHECK-NEXT:  Symbol {
+// CHECK-NEXT:    Name: sym09
+// CHECK-NEXT:    Value: 0x1
+// CHECK-NEXT:    Size: 0
+// CHECK-NEXT:    Binding: Local (0x0)
+
+// GAS:           Type: None (0x0)
+// CHECK-NEXT:    Type: Function (0x2)
+
+// CHECK-NEXT:    Other: 0
+// CHECK-NEXT:    Section: .text (0x1)
+// CHECK-NEXT:  }
+// CHECK-NEXT:  Symbol {
+// CHECK-NEXT:    Name: sym10
+// CHECK-NEXT:    Value: 0x0
+// CHECK-NEXT:    Size: 0
+// CHECK-NEXT:    Binding: Local (0x0)
+// CHECK-NEXT:    Type: Function (0x2)
+// CHECK-NEXT:    Other: 0
+// CHECK-NEXT:    Section: .text (0x1)
+// CHECK-NEXT:  }
+// CHECK-NEXT:  Symbol {
+// CHECK-NEXT:    Name: sym11
+// CHECK-NEXT:    Value: 0x0
+// CHECK-NEXT:    Size: 0
+// CHECK-NEXT:    Binding: Local (0x0)
+
+// GAS:           Type: Object (0x1)
+// CHECK-NEXT:    Type: Function (0x2)
+
+// CHECK-NEXT:    Other: 0
+// CHECK-NEXT:    Section: .text (0x1)
+// CHECK-NEXT:  }
+// CHECK-NEXT:  Symbol {
+// CHECK-NEXT:    Name: sym12
+// CHECK-NEXT:    Value: 0x1
+// CHECK-NEXT:    Size: 0
+// CHECK-NEXT:    Binding: Local (0x0)
+
+// GAS:           Type: Object (0x1)
+// CHECK-NEXT:    Type: Function (0x2)
+
+// CHECK-NEXT:    Other: 0
+// CHECK-NEXT:    Section: .text (0x1)
+// CHECK-NEXT:  }
diff --git a/test/MC/ELF/type.s b/test/MC/ELF/type.s
index c2f3631..638d828 100644
--- a/test/MC/ELF/type.s
+++ b/test/MC/ELF/type.s
@@ -41,6 +41,95 @@ tls_upper_case:
         .global tls_upper_case
         .type tls_upper_case,STT_TLS
 
+// Test that .set doesnt downgrade the type:
+// IFUNC > FUNC > OBJECT > NOTYPE
+// TLS_OBJECT > OBJECT > NOTYPE
+// also TLS_OBJECT is incompatible with IFUNC and FUNC
+
+        .global sym1
+        .type sym1, @gnu_indirect_function
+alias1:
+        .global alias1
+        .type alias1, @function
+        .set sym1, alias1
+
+        .global sym2
+        .type sym2, @gnu_indirect_function
+alias2:
+        .global alias2
+        .type alias2, @object
+        .set sym2, alias2
+
+        .global sym3
+        .type sym3, @gnu_indirect_function
+alias3:
+        .global alias3
+        .type alias3, @notype
+        .set sym3, alias3
+
+        .global sym4
+        .type sym4, @function
+alias4:
+        .global alias4
+        .type alias4, @object
+        .set sym4, alias4
+
+        .global sym5
+        .type sym5, @function
+alias5:
+        .global alias5
+        .type alias5, @notype
+        .set sym5, alias5
+
+        .global sym6
+        .type sym6, @object
+alias6:
+        .global alias6
+        .type alias6, @notype
+        .set sym6, alias6
+
+        .global sym7
+        .type sym7, @gnu_indirect_function
+alias7:
+        .global alias7
+        .type alias7, @tls_object
+        .set sym7, alias7
+
+        .global sym8
+        .type sym8, @function
+        .global alias8
+alias8:
+        .type alias8, @tls_object
+        .set sym8, alias8
+
+        .global sym9
+        .type sym9, @tls_object
+alias9:
+        .global alias9
+        .type alias9, @object
+        .set sym9, alias9
+
+        .global sym10
+        .type sym10, @tls_object
+alias10:
+        .global alias10
+        .type alias10, @notype
+        .set sym10, alias10
+
+        .global sym11
+        .type sym11, @tls_object
+alias11:
+        .global alias11
+        .type alias11, @gnu_indirect_function
+        .set sym11, alias11
+
+        .global sym12
+        .type sym12, @tls_object
+alias12:        
+        .global alias12
+        .type alias12, @function
+        .set sym12, alias12
+
 // CHECK:        Symbol {
 // CHECK:          Name: bar
 // CHECK-NEXT:     Value: 0x0
@@ -86,6 +175,114 @@ tls_upper_case:
 // CHECK-NEXT:     Other: 0
 // CHECK-NEXT:     Section: .text (0x1)
 // CHECK-NEXT:   }
+// CHECK-NEXT:  Symbol {
+// CHECK-NEXT:    Name: sym1 (54)
+// CHECK-NEXT:    Value: 0x0
+// CHECK-NEXT:    Size: 0
+// CHECK-NEXT:    Binding: Global (0x1)
+// CHECK-NEXT:    Type: GNU_IFunc (0xA)
+// CHECK-NEXT:    Other: 0
+// CHECK-NEXT:    Section: .text (0x1)
+// CHECK-NEXT:  }
+// CHECK-NEXT:  Symbol {
+// CHECK-NEXT:    Name: sym10 (162)
+// CHECK-NEXT:    Value: 0x0
+// CHECK-NEXT:    Size: 0
+// CHECK-NEXT:    Binding: Global (0x1)
+// CHECK-NEXT:    Type: TLS (0x6)
+// CHECK-NEXT:    Other: 0
+// CHECK-NEXT:    Section: .text (0x1)
+// CHECK-NEXT:  }
+// CHECK-NEXT:  Symbol {
+// CHECK-NEXT:    Name: sym11 (176)
+// CHECK-NEXT:    Value: 0x0
+// CHECK-NEXT:    Size: 0
+// CHECK-NEXT:    Binding: Global (0x1)
+// CHECK-NEXT:    Type: TLS (0x6)
+// CHECK-NEXT:    Other: 0
+// CHECK-NEXT:    Section: .text (0x1)
+// CHECK-NEXT:  }
+// CHECK-NEXT:  Symbol {
+// CHECK-NEXT:    Name: sym12 (190)
+// CHECK-NEXT:    Value: 0x0
+// CHECK-NEXT:    Size: 0
+// CHECK-NEXT:    Binding: Global (0x1)
+// CHECK-NEXT:    Type: TLS (0x6)
+// CHECK-NEXT:    Other: 0
+// CHECK-NEXT:    Section: .text (0x1)
+// CHECK-NEXT:  }
+// CHECK-NEXT:  Symbol {
+// CHECK-NEXT:    Name: sym2 (66)
+// CHECK-NEXT:    Value: 0x0
+// CHECK-NEXT:    Size: 0
+// CHECK-NEXT:    Binding: Global (0x1)
+// CHECK-NEXT:    Type: GNU_IFunc (0xA)
+// CHECK-NEXT:    Other: 0
+// CHECK-NEXT:    Section: .text (0x1)
+// CHECK-NEXT:  }
+// CHECK-NEXT:  Symbol {
+// CHECK-NEXT:    Name: sym3 (78)
+// CHECK-NEXT:    Value: 0x0
+// CHECK-NEXT:    Size: 0
+// CHECK-NEXT:    Binding: Global (0x1)
+// CHECK-NEXT:    Type: GNU_IFunc (0xA)
+// CHECK-NEXT:    Other: 0
+// CHECK-NEXT:    Section: .text (0x1)
+// CHECK-NEXT:  }
+// CHECK-NEXT:  Symbol {
+// CHECK-NEXT:    Name: sym4 (90)
+// CHECK-NEXT:    Value: 0x0
+// CHECK-NEXT:    Size: 0
+// CHECK-NEXT:    Binding: Global (0x1)
+// CHECK-NEXT:    Type: Function (0x2)
+// CHECK-NEXT:    Other: 0
+// CHECK-NEXT:    Section: .text (0x1)
+// CHECK-NEXT:  }
+// CHECK-NEXT:  Symbol {
+// CHECK-NEXT:    Name: sym5 (102)
+// CHECK-NEXT:    Value: 0x0
+// CHECK-NEXT:    Size: 0
+// CHECK-NEXT:    Binding: Global (0x1)
+// CHECK-NEXT:    Type: Function (0x2)
+// CHECK-NEXT:    Other: 0
+// CHECK-NEXT:    Section: .text (0x1)
+// CHECK-NEXT:  }
+// CHECK-NEXT:  Symbol {
+// CHECK-NEXT:    Name: sym6 (114)
+// CHECK-NEXT:    Value: 0x0
+// CHECK-NEXT:    Size: 0
+// CHECK-NEXT:    Binding: Global (0x1)
+// CHECK-NEXT:    Type: Object (0x1)
+// CHECK-NEXT:    Other: 0
+// CHECK-NEXT:    Section: .text (0x1)
+// CHECK-NEXT:  }
+// CHECK-NEXT:  Symbol {
+// CHECK-NEXT:    Name: sym7 (126)
+// CHECK-NEXT:    Value: 0x0
+// CHECK-NEXT:    Size: 0
+// CHECK-NEXT:    Binding: Global (0x1)
+// CHECK-NEXT:    Type: GNU_IFunc (0xA)
+// CHECK-NEXT:    Other: 0
+// CHECK-NEXT:    Section: .text (0x1)
+// CHECK-NEXT:  }
+// CHECK-NEXT:  Symbol {
+// CHECK-NEXT:    Name: sym8 (138)
+// CHECK-NEXT:    Value: 0x0
+// CHECK-NEXT:    Size: 0
+// CHECK-NEXT:    Binding: Global (0x1)
+// CHECK-NEXT:    Type: Function (0x2)
+// CHECK-NEXT:    Other: 0
+// CHECK-NEXT:    Section: .text (0x1)
+// CHECK-NEXT:  }
+// CHECK-NEXT:  Symbol {
+// CHECK-NEXT:    Name: sym9 (150)
+// CHECK-NEXT:    Value: 0x0
+// CHECK-NEXT:    Size: 0
+// CHECK-NEXT:    Binding: Global (0x1)
+// CHECK-NEXT:    Type: TLS (0x6)
+// CHECK-NEXT:    Other: 0
+// CHECK-NEXT:    Section: .text (0x1)
+// CHECK-NEXT:  }
 // CHECK-NEXT:   Symbol {
 // CHECK-NEXT:     Name: tls
 // CHECK-NEXT:     Value: 0x0
diff --git a/test/MC/ELF/undef.s b/test/MC/ELF/undef.s
index 0d89fb1..7c2a876 100644
--- a/test/MC/ELF/undef.s
+++ b/test/MC/ELF/undef.s
@@ -34,6 +34,6 @@
 // CHECK-NEXT:     Binding: Global
 // CHECK-NEXT:     Type: Object
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: (0x0)
+// CHECK-NEXT:     Section: Undefined (0x0)
 // CHECK-NEXT:   }
 // CHECK-NEXT: ]
diff --git a/test/MC/ELF/weak.s b/test/MC/ELF/weak.s
index 2ed3eb7..99d4273 100644
--- a/test/MC/ELF/weak.s
+++ b/test/MC/ELF/weak.s
@@ -5,7 +5,7 @@
 	.weak	foo
         .long   foo
 
-// And that bar is after all local symbols and has non zero value.
+// And that bar is after all local symbols and has non-zero value.
         .weak bar
 bar:
 
@@ -25,6 +25,6 @@ bar:
 // CHECK-NEXT:     Binding: Weak
 // CHECK-NEXT:     Type: None
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: (0x0)
+// CHECK-NEXT:     Section: Undefined (0x0)
 // CHECK-NEXT:   }
 // CHECK-NEXT:  ]
diff --git a/test/MC/ELF/weakref-reloc.s b/test/MC/ELF/weakref-reloc.s
index 48bda87..582c694 100644
--- a/test/MC/ELF/weakref-reloc.s
+++ b/test/MC/ELF/weakref-reloc.s
@@ -22,7 +22,7 @@
 // CHECK-NEXT:     Binding: Global
 // CHECK-NEXT:     Type: None
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: (0x0)
+// CHECK-NEXT:     Section: Undefined (0x0)
 // CHECK-NEXT:   }
 // CHECK-NEXT:   Symbol {
 // CHECK-NEXT:     Name: foo (1)
@@ -31,7 +31,7 @@
 // CHECK-NEXT:     Binding: Weak
 // CHECK-NEXT:     Type: None
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: (0x0)
+// CHECK-NEXT:     Section: Undefined (0x0)
 // CHECK-NEXT:   }
 // CHECK-NEXT:   Symbol {
 // CHECK-NEXT:     Name: zed (5)
@@ -40,5 +40,5 @@
 // CHECK-NEXT:     Binding: Global
 // CHECK-NEXT:     Type: None
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: (0x0)
+// CHECK-NEXT:     Section: Undefined (0x0)
 // CHECK-NEXT:   }
diff --git a/test/MC/ELF/weakref.s b/test/MC/ELF/weakref.s
index 6c2d333..cf2228d 100644
--- a/test/MC/ELF/weakref.s
+++ b/test/MC/ELF/weakref.s
@@ -77,7 +77,7 @@ bar15:
 // CHECK-NEXT:     Binding: Local (0x0)
 // CHECK-NEXT:     Type: None (0x0)
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section:  (0x0)
+// CHECK-NEXT:     Section: Undefined (0x0)
 // CHECK-NEXT:   }
 // CHECK-NEXT:   Symbol {
 // CHECK-NEXT:     Name: bar6 (21)
@@ -203,7 +203,7 @@ bar15:
 // CHECK-NEXT:     Binding: Global
 // CHECK-NEXT:     Type: None
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: (0x0)
+// CHECK-NEXT:     Section: Undefined (0x0)
 // CHECK-NEXT:   }
 // CHECK-NEXT:   Symbol {
 // CHECK-NEXT:     Name: bar3 (6)
@@ -212,7 +212,7 @@ bar15:
 // CHECK-NEXT:     Binding: Weak
 // CHECK-NEXT:     Type: None
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: (0x0)
+// CHECK-NEXT:     Section: Undefined (0x0)
 // CHECK-NEXT:   }
 // CHECK-NEXT:   Symbol {
 // CHECK-NEXT:     Name: bar4 (11)
@@ -221,7 +221,7 @@ bar15:
 // CHECK-NEXT:     Binding: Global
 // CHECK-NEXT:     Type: None
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: (0x0)
+// CHECK-NEXT:     Section: Undefined (0x0)
 // CHECK-NEXT:   }
 // CHECK-NEXT:   Symbol {
 // CHECK-NEXT:     Name: bar5 (16)
@@ -230,6 +230,6 @@ bar15:
 // CHECK-NEXT:     Binding: Global
 // CHECK-NEXT:     Type: None
 // CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: (0x0)
+// CHECK-NEXT:     Section: Undefined (0x0)
 // CHECK-NEXT:   }
 // CHECK-NEXT: ]
diff --git a/test/MC/MachO/ARM/bad-darwin-ARM-reloc.s b/test/MC/MachO/ARM/bad-darwin-ARM-reloc.s
new file mode 100644
index 0000000..7ad91df
--- /dev/null
+++ b/test/MC/MachO/ARM/bad-darwin-ARM-reloc.s
@@ -0,0 +1,9 @@
+@ RUN: not llvm-mc -n -triple armv7-apple-darwin10 %s -filetype=obj -o - 2> %t.err > %t
+@ RUN: FileCheck --check-prefix=CHECK-ERROR < %t.err %s
+@ rdar://15586725
+.text
+    ldr r3, L___fcommon
+.section myseg, mysect
+L___fcommon: 
+    .word 0
+@ CHECK-ERROR: unsupported relocation on symbol
diff --git a/test/MC/MachO/ARM/bad-darwin-directives.s b/test/MC/MachO/ARM/bad-darwin-directives.s
new file mode 100644
index 0000000..0499e40
--- /dev/null
+++ b/test/MC/MachO/ARM/bad-darwin-directives.s
@@ -0,0 +1,24 @@
+@ RUN: not llvm-mc -n -triple armv7-apple-darwin10 %s -filetype=obj -o - 2> %t.err > %t
+@ RUN: FileCheck --check-prefix=CHECK-ERROR < %t.err %s
+@ rdar://16335232
+
+.eabi_attribute 8, 1
+@ CHECK-ERROR: error: .eabi_attribute directive not valid for Mach-O
+
+.cpu
+@ CHECK-ERROR: error: .cpu directive not valid for Mach-O
+
+.fpu neon
+@ CHECK-ERROR: error: .fpu directive not valid for Mach-O
+
+.arch armv7
+@ CHECK-ERROR: error: .arch directive not valid for Mach-O
+
+.fnstart
+@ CHECK-ERROR: error: .fnstart directive not valid for Mach-O
+
+.tlsdescseq
+@ CHECK-ERROR: error: .tlsdescseq directive not valid for Mach-O
+
+.object_arch armv7
+@ CHECK-ERROR: error: .object_arch directive not valid for Mach-O
diff --git a/test/MC/MachO/ARM/ios-version-min-load-command.s b/test/MC/MachO/ARM/ios-version-min-load-command.s
new file mode 100644
index 0000000..e065d14
--- /dev/null
+++ b/test/MC/MachO/ARM/ios-version-min-load-command.s
@@ -0,0 +1,10 @@
+// RUN: llvm-mc -triple armv7-apple-ios %s -filetype=obj -o - | macho-dump | FileCheck %s
+
+// Test the formation of the version-min load command in the MachO.
+// use a nonsense but well formed version.
+.ios_version_min 99,8,7
+// CHECK:  (('command', 37)
+// CHECK:   ('size', 16)
+// CHECK:   ('version, 6490119)
+// CHECK:   ('reserved, 0)
+// CHECK:  ),
diff --git a/test/MC/MachO/ARM/version-min-diagnostics.s b/test/MC/MachO/ARM/version-min-diagnostics.s
new file mode 100644
index 0000000..15d44d3
--- /dev/null
+++ b/test/MC/MachO/ARM/version-min-diagnostics.s
@@ -0,0 +1,49 @@
+// RUN: not llvm-mc -triple i386-apple-darwin %s 2> %t
+// RUN: FileCheck %s < %t
+// RUN: not llvm-mc -triple x86_64-apple-darwin %s 2> %t
+// RUN: FileCheck %s < %t
+// RUN: not llvm-mc -triple armv7-apple-ios %s 2> %t
+// RUN: FileCheck %s < %t
+
+.ios_version_min 5,2,257
+.ios_version_min 5,256,1
+.ios_version_min 5,-1,1
+.ios_version_min 0,1,1
+.ios_version_min 70000,1
+.macosx_version_min 99,2,257
+.macosx_version_min 50,256,1
+.macosx_version_min 10,-1,1
+.macosx_version_min 0,1,1
+.macosx_version_min 70000,1
+
+
+// CHECK: error: invalid OS update number
+// CHECK: .ios_version_min 5,2,257
+// CHECK:                      ^
+// CHECK: error: invalid OS minor version number
+// CHECK: .ios_version_min 5,256,1
+// CHECK:                    ^
+// CHECK: error: invalid OS minor version number
+// CHECK: .ios_version_min 5,-1,1
+// CHECK:                    ^
+// CHECK: error: invalid OS major version number
+// CHECK: .ios_version_min 0,1,1
+// CHECK:                  ^
+// CHECK: error: invalid OS major version number
+// CHECK: .ios_version_min 70000,1
+// CHECK:                  ^
+// CHECK: error: invalid OS update number
+// CHECK: .macosx_version_min 99,2,257
+// CHECK:                          ^
+// CHECK: error: invalid OS minor version number
+// CHECK: .macosx_version_min 50,256,1
+// CHECK:                        ^
+// CHECK: error: invalid OS minor version number
+// CHECK: .macosx_version_min 10,-1,1
+// CHECK:                        ^
+// CHECK: error: invalid OS major version number
+// CHECK: .macosx_version_min 0,1,1
+// CHECK:                     ^
+// CHECK: error: invalid OS major version number
+// CHECK: .macosx_version_min 70000,1
+// CHECK:                     ^
diff --git a/test/MC/MachO/ARM/version-min.s b/test/MC/MachO/ARM/version-min.s
new file mode 100644
index 0000000..0a40338
--- /dev/null
+++ b/test/MC/MachO/ARM/version-min.s
@@ -0,0 +1,21 @@
+// RUN: llvm-mc -triple i386-apple-darwin %s | FileCheck %s
+// RUN: llvm-mc -triple x86_64-apple-darwin %s | FileCheck %s
+// RUN: llvm-mc -triple armv7s-apple-ios %s | FileCheck %s
+
+// Test the parsing of well-formed version-min directives.
+
+.ios_version_min 5,2,0
+.ios_version_min 3,2,1
+.ios_version_min 5,0
+
+// CHECK: .ios_version_min 5, 2
+// CHECK: .ios_version_min 3, 2, 1
+// CHECK: .ios_version_min 5, 0
+
+.macosx_version_min 10,2,0
+.macosx_version_min 10,8,1
+.macosx_version_min 2,0
+
+// CHECK: .macosx_version_min 10, 2
+// CHECK: .macosx_version_min 10, 8, 1
+// CHECK: .macosx_version_min 2, 0
diff --git a/test/MC/MachO/ARM64/darwin-ARM64-local-label-diff.s b/test/MC/MachO/ARM64/darwin-ARM64-local-label-diff.s
new file mode 100644
index 0000000..d98c257
--- /dev/null
+++ b/test/MC/MachO/ARM64/darwin-ARM64-local-label-diff.s
@@ -0,0 +1,21 @@
+; RUN: llvm-mc -triple arm64-apple-darwin -filetype=obj -o - < %s | macho-dump -dump-section-data | FileCheck %s
+; rdar://13028719
+
+ .globl context_save0
+ .align 6
+Lcontext_save0:
+context_save0:
+ .fill 2, 8, 5
+Lcontext_save0_end:
+Lcontext_save0_size: .quad (Lcontext_save0_end - Lcontext_save0)
+
+ .align 6
+Lcontext_save1:
+ .fill 2, 8, 0
+Lcontext_save1_end:
+Lcontext_save1_size: .quad (Lcontext_save1_end - Lcontext_save1)
+
+Llockup_release:
+ .quad 0
+
+; CHECK:  ('_section_data', '05000000 00000000 05000000 00000000 10000000 00000000 1f2003d5 1f2003d5 1f2003d5 1f2003d5 1f2003d5 1f2003d5 1f2003d5 1f2003d5 1f2003d5 1f2003d5 00000000 00000000 00000000 00000000 10000000 00000000 00000000 00000000')
diff --git a/test/MC/MachO/ARM64/darwin-ARM64-reloc.s b/test/MC/MachO/ARM64/darwin-ARM64-reloc.s
new file mode 100644
index 0000000..7f586ae
--- /dev/null
+++ b/test/MC/MachO/ARM64/darwin-ARM64-reloc.s
@@ -0,0 +1,157 @@
+; RUN: llvm-mc -n -triple arm64-apple-darwin10 %s -filetype=obj -o - | macho-dump --dump-section-data | FileCheck %s
+
+	.text
+_fred:
+	bl	_func
+	bl	_func + 20
+
+	adrp	x3, _data@page
+        ldr	w2, [x3, _data@pageoff]
+
+        add	x3, x3, _data@pageoff + 4
+
+	adrp	x3, _data@page+1
+        ldr	w2, [x3, _data@pageoff + 4]
+
+	adrp	x3, _data_ext@gotpage
+        ldr	w2, [x3, _data_ext@gotpageoff]
+
+	.data
+_data:
+        .quad _foo
+        .quad _foo + 4
+        .quad _foo - _bar
+        .quad _foo - _bar + 4
+
+        .long _foo - _bar
+
+        .quad _foo@got
+        .long _foo@got - .
+
+
+; CHECK: ('cputype', 16777228)
+; CHECK: ('cpusubtype', 0)
+; CHECK: ('filetype', 1)
+; CHECK: ('num_load_commands', 3)
+; CHECK: ('load_commands_size', 336)
+; CHECK: ('flag', 0)
+; CHECK: ('reserved', 0)
+; CHECK: ('load_commands', [
+; CHECK:   # Load Command 0
+; CHECK:  (('command', 25)
+; CHECK:   ('size', 232)
+; CHECK:   ('segment_name', '\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+; CHECK:   ('vm_addr', 0)
+; CHECK:   ('vm_size', 84)
+; CHECK:   ('file_offset', 368)
+; CHECK:   ('file_size', 84)
+; CHECK:   ('maxprot', 7)
+; CHECK:   ('initprot', 7)
+; CHECK:   ('num_sections', 2)
+; CHECK:   ('flags', 0)
+; CHECK:   ('sections', [
+; CHECK:     # Section 0
+; CHECK:    (('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+; CHECK:     ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+; CHECK:     ('address', 0)
+; CHECK:     ('size', 36)
+; CHECK:     ('offset', 368)
+; CHECK:     ('alignment', 0)
+; CHECK:     ('reloc_offset', 452)
+; CHECK:     ('num_reloc', 13)
+; CHECK:     ('flags', 0x80000400)
+; CHECK:     ('reserved1', 0)
+; CHECK:     ('reserved2', 0)
+; CHECK:     ('reserved3', 0)
+; CHECK:    ),
+; CHECK:   ('_relocations', [
+; CHECK:     # Relocation 0
+; CHECK:     (('word-0', 0x20),
+; CHECK:      ('word-1', 0x6c000005)),
+; CHECK:     # Relocation 1
+; CHECK:     (('word-0', 0x1c),
+; CHECK:      ('word-1', 0x5d000005)),
+; CHECK:     # Relocation 2
+; CHECK:     (('word-0', 0x18),
+; CHECK:      ('word-1', 0xa4000004)),
+; CHECK:     # Relocation 3
+; CHECK:     (('word-0', 0x18),
+; CHECK:      ('word-1', 0x4c000002)),
+; CHECK:     # Relocation 4
+; CHECK:     (('word-0', 0x14),
+; CHECK:      ('word-1', 0xa4000001)),
+; CHECK:     # Relocation 5
+; CHECK:     (('word-0', 0x14),
+; CHECK:      ('word-1', 0x3d000002)),
+; CHECK:     # Relocation 6
+; CHECK:     (('word-0', 0x10),
+; CHECK:      ('word-1', 0xa4000004)),
+; CHECK:     # Relocation 7
+; CHECK:     (('word-0', 0x10),
+; CHECK:      ('word-1', 0x4c000002)),
+; CHECK:     # Relocation 8
+; CHECK:     (('word-0', 0xc),
+; CHECK:      ('word-1', 0x4c000002)),
+; CHECK:     # Relocation 9
+; CHECK:     (('word-0', 0x8),
+; CHECK:      ('word-1', 0x3d000002)),
+; CHECK:     # Relocation 10
+; CHECK:     (('word-0', 0x4),
+; CHECK:      ('word-1', 0xa4000014)),
+; CHECK:     # Relocation 11
+; CHECK:     (('word-0', 0x4),
+; CHECK:      ('word-1', 0x2d000007)),
+; CHECK:     # Relocation 12
+; CHECK:     (('word-0', 0x0),
+; CHECK:      ('word-1', 0x2d000007)),
+; CHECK:   ])
+; CHECK:   ('_section_data', '00000094 00000094 03000090 620040b9 63000091 03000090 620040b9 03000090 620040b9')
+; CHECK:     # Section 1
+; CHECK:    (('section_name', '__data\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+; CHECK:     ('segment_name', '__DATA\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+; CHECK:     ('address', 36)
+; CHECK:     ('size', 48)
+; CHECK:     ('offset', 404)
+; CHECK:     ('alignment', 0)
+; CHECK:     ('reloc_offset', 556)
+; CHECK:     ('num_reloc', 10)
+; CHECK:     ('flags', 0x0)
+; CHECK:     ('reserved1', 0)
+; CHECK:     ('reserved2', 0)
+; CHECK:     ('reserved3', 0)
+; CHECK:    ),
+; CHECK:   ('_relocations', [
+; CHECK:     # Relocation 0
+; CHECK:     (('word-0', 0x2c),
+; CHECK:      ('word-1', 0x7d000006)),
+; CHECK:     # Relocation 1
+; CHECK:     (('word-0', 0x24),
+; CHECK:      ('word-1', 0x7e000006)),
+; CHECK:     # Relocation 2
+; CHECK:     (('word-0', 0x20),
+; CHECK:      ('word-1', 0x1c000004)),
+; CHECK:     # Relocation 3
+; CHECK:     (('word-0', 0x20),
+; CHECK:      ('word-1', 0xc000006)),
+; CHECK:     # Relocation 4
+; CHECK:     (('word-0', 0x18),
+; CHECK:      ('word-1', 0x1e000004)),
+; CHECK:     # Relocation 5
+; CHECK:     (('word-0', 0x18),
+; CHECK:      ('word-1', 0xe000006)),
+; CHECK:     # Relocation 6
+; CHECK:     (('word-0', 0x10),
+; CHECK:      ('word-1', 0x1e000004)),
+; CHECK:     # Relocation 7
+; CHECK:     (('word-0', 0x10),
+; CHECK:      ('word-1', 0xe000006)),
+; CHECK:     # Relocation 8
+; CHECK:     (('word-0', 0x8),
+; CHECK:      ('word-1', 0xe000006)),
+; CHECK:     # Relocation 9
+; CHECK:     (('word-0', 0x0),
+; CHECK:      ('word-1', 0xe000006)),
+; CHECK:   ])
+; CHECK:   ('_section_data', '00000000 00000000 04000000 00000000 00000000 00000000 04000000 00000000 00000000 00000000 00000000 d4ffffff')
+; CHECK:   ])
+; CHECK:  ),
diff --git a/test/MC/MachO/ARM64/lit.local.cfg b/test/MC/MachO/ARM64/lit.local.cfg
new file mode 100644
index 0000000..a75a42b
--- /dev/null
+++ b/test/MC/MachO/ARM64/lit.local.cfg
@@ -0,0 +1,4 @@
+targets = set(config.root.targets_to_build.split())
+if not 'ARM64' in targets:
+    config.unsupported = True
+
diff --git a/test/MC/MachO/bss.s b/test/MC/MachO/bss.s
index 15d490a..c5afe10 100644
--- a/test/MC/MachO/bss.s
+++ b/test/MC/MachO/bss.s
@@ -1,4 +1,4 @@
-// The purpose of this test is to verify that bss sections are emited correctly.
+// The purpose of this test is to verify that bss sections are emitted correctly.
 
 // RUN: llvm-mc -filetype=obj -triple i686-apple-darwin9 %s | llvm-readobj -s | FileCheck %s
 // RUN: llvm-mc -filetype=obj -triple x86_64-apple-darwin9 %s | llvm-readobj -s | FileCheck %s
diff --git a/test/MC/MachO/eh-frame-reloc.s b/test/MC/MachO/eh-frame-reloc.s
new file mode 100644
index 0000000..1b1c674
--- /dev/null
+++ b/test/MC/MachO/eh-frame-reloc.s
@@ -0,0 +1,29 @@
+// RUN: llvm-mc < %s -triple=x86_64-apple-macosx10.7 -filetype=obj | llvm-readobj -r | FileCheck %s
+// RUN: llvm-mc < %s -triple=x86_64-apple-macosx10.6 -filetype=obj | llvm-readobj -r | FileCheck %s
+// RUN: llvm-mc < %s -triple=x86_64-apple-macosx10.5 -filetype=obj | llvm-readobj -r | FileCheck --check-prefix=OLD64 %s
+// RUN: llvm-mc < %s -triple=i686-apple-macosx10.6 -filetype=obj | llvm-readobj -r | FileCheck %s
+// RUN: llvm-mc < %s -triple=i686-apple-macosx10.5 -filetype=obj | llvm-readobj -r | FileCheck --check-prefix=OLD32 %s
+// RUN: llvm-mc < %s -triple=i686-apple-macosx10.4 -filetype=obj | llvm-readobj -r | FileCheck --check-prefix=OLD32 %s
+
+	.globl	_bar
+	.align	4, 0x90
+_bar:
+	.cfi_startproc
+	.cfi_endproc
+
+// CHECK:      Relocations [
+// CHECK-NEXT: ]
+
+// OLD32:      Relocations [
+// OLD32-NEXT:   Section __eh_frame {
+// OLD32-NEXT:     0x20 0 2 n/a GENERIC_RELOC_LOCAL_SECTDIFF 1 -
+// OLD32-NEXT:     0x0 0 2 n/a GENERIC_RELOC_PAIR 1 -
+// OLD32-NEXT:   }
+// OLD32-NEXT: ]
+
+// OLD64:      Relocations [
+// OLD64-NEXT:   Section __eh_frame {
+// OLD64-NEXT:     0x20 0 3 1 X86_64_RELOC_SUBTRACTOR 0 _bar.eh
+// OLD64-NEXT:     0x20 0 3 1 X86_64_RELOC_UNSIGNED 0 _bar
+// OLD64-NEXT:   }
+// OLD64-NEXT: ]
diff --git a/test/MC/MachO/eh-symbols.s b/test/MC/MachO/eh-symbols.s
new file mode 100644
index 0000000..6adca56
--- /dev/null
+++ b/test/MC/MachO/eh-symbols.s
@@ -0,0 +1,25 @@
+// RUN: llvm-mc -filetype=obj -triple i686-apple-darwin %s  -o - | llvm-readobj -t | FileCheck %s
+
+// Make sure that the exception handling data has the same visibility as the
+// function it's generated for.
+
+	.private_extern	_main
+	.globl	_main
+_main:
+	.cfi_startproc
+	retl
+	.cfi_endproc
+
+"_-[NSString(local) isNullOrNil]":
+	.cfi_startproc
+	retl
+	.cfi_endproc
+
+// CHECK: Name: _-[NSString(local) isNullOrNil].eh
+
+// CHECK:       Name: _main
+// CHECK-NEXT:  PrivateExtern
+
+// CHECK:       Name: _main.eh
+// CHECK-NEXT:  PrivateExtern
+
diff --git a/test/MC/MachO/eh_symbol.s b/test/MC/MachO/eh_symbol.s
new file mode 100644
index 0000000..1135196
--- /dev/null
+++ b/test/MC/MachO/eh_symbol.s
@@ -0,0 +1,14 @@
+// RUN: llvm-mc -triple i386-apple-darwin9 %s -filetype=obj -o - | llvm-nm | FileCheck %s
+
+// test that we don't produce foo.eh symbols in a debug_frame section.
+// CHECK-NOT: _f.eh
+// CHECK: T _f
+// CHECK-NOT: _f.eh
+
+	.globl	_f
+_f:
+	.cfi_startproc
+	retl
+	.cfi_endproc
+
+	.cfi_sections .debug_frame
diff --git a/test/MC/MachO/gen-dwarf-cpp.s b/test/MC/MachO/gen-dwarf-cpp.s
index e42a63a..04a9508 100644
--- a/test/MC/MachO/gen-dwarf-cpp.s
+++ b/test/MC/MachO/gen-dwarf-cpp.s
@@ -5,18 +5,25 @@
 .globl _bar
 _bar:
 	movl	$0, %eax
+# 3 "inc/g.s"
+	movl	$0, %eax
 L1:	leave
+# 42 "t.s"
 	ret
 
 // rdar://9275556
 
 // We check that the source name "t.s" is picked up
+// CHECK: include_directories[  1] = '{{.*[/\\]}}test{{[/\\]}}MC{{[/\\]}}MachO'
+// CHECK: include_directories[  2] = 'inc'
 // CHECK:                 Dir  Mod Time   File Len   File Name
 // CHECK:                 ---- ---------- ---------- ---------------------------
 // CHECK: file_names[  1]    1 0x00000000 0x00000000 gen-dwarf-cpp.s
 // CHECK: file_names[  2]    0 0x00000000 0x00000000 t.s
+// CHECK: file_names[  3]    2 0x00000000 0x00000000 g.s
+// CHECK-NOT: file_names
 
 // We check that the source line number 100 is picked up before the "movl"
-// CHECK: Address            Line   Column File   ISA Flags
-// CHECK: ------------------ ------ ------ ------ --- -------------
-// CHECK: 0x0000000000000000    102      0      2   0  is_stmt
+// CHECK: Address            Line   Column File   ISA Discriminator Flags
+// CHECK: ------------------ ------ ------ ------ --- ------------- -------------
+// CHECK: 0x0000000000000000    102      0      2   0             0  is_stmt
diff --git a/test/MC/MachO/gen-dwarf.s b/test/MC/MachO/gen-dwarf.s
index d763dd1..997c834 100644
--- a/test/MC/MachO/gen-dwarf.s
+++ b/test/MC/MachO/gen-dwarf.s
@@ -113,10 +113,10 @@ _x:	.long 1
 // CHECK:                 ---- ---------- ---------- ---------------------------
 // CHECK: file_names[  1]    1 0x00000000 0x00000000 gen-dwarf.s
 
-// CHECK: Address            Line   Column File   ISA Flags
-// CHECK: ------------------ ------ ------ ------ --- -------------
-// CHECK: 0x0000000000000000      6      0      1   0  is_stmt
-// CHECK: 0x0000000000000005      7      0      1   0  is_stmt
-// CHECK: 0x0000000000000006      8      0      1   0  is_stmt
-// CHECK: 0x0000000000000007     11      0      1   0  is_stmt
-// CHECK: 0x0000000000000008     11      0      1   0  is_stmt end_sequence
+// CHECK: Address            Line   Column File   ISA Discriminator Flags
+// CHECK: ------------------ ------ ------ ------ --- ------------- -------------
+// CHECK: 0x0000000000000000      6      0      1   0             0  is_stmt
+// CHECK: 0x0000000000000005      7      0      1   0             0  is_stmt
+// CHECK: 0x0000000000000006      8      0      1   0             0  is_stmt
+// CHECK: 0x0000000000000007     11      0      1   0             0  is_stmt
+// CHECK: 0x0000000000000008     11      0      1   0             0  is_stmt end_sequence
diff --git a/test/MC/MachO/osx-version-min-load-command.s b/test/MC/MachO/osx-version-min-load-command.s
new file mode 100644
index 0000000..2a73609
--- /dev/null
+++ b/test/MC/MachO/osx-version-min-load-command.s
@@ -0,0 +1,10 @@
+// RUN: llvm-mc -triple x86_64-apple-darwin %s -filetype=obj -o - | macho-dump | FileCheck %s
+
+// Test the formation of the version-min load command in the MachO.
+// use a nonsense but well formed version.
+.macosx_version_min 25,3,1
+// CHECK:  (('command', 36)
+// CHECK:   ('size', 16)
+// CHECK:   ('version, 1639169)
+// CHECK:   ('reserved, 0)
+// CHECK:  ),
diff --git a/test/MC/MachO/x86_32-scattered-reloc-fallback.s b/test/MC/MachO/x86_32-scattered-reloc-fallback.s
new file mode 100644
index 0000000..3de52b4
--- /dev/null
+++ b/test/MC/MachO/x86_32-scattered-reloc-fallback.s
@@ -0,0 +1,27 @@
+// RUN: llvm-mc -triple i386-apple-darwin9 %s -filetype=obj -o - | macho-dump --dump-section-data | FileCheck %s
+
+// rdar://15526046
+
+.text
+.globl _main
+_main:
+	.space 0x01020f55, 0x90
+bug:
+	movl  $0, _key64b_9+4
+.section __TEXT, __padding
+	.space 0x515b91, 0
+.data
+	.space 0xa70, 0
+.globl _key64b_9
+_key64b_9:
+	.long 1
+	.long 2
+
+// The movl instruction above should produce this encoding where the address
+// of _key64b_9 is at 0x01537560.  This is testing falling back from using a
+// scattered relocation to a normal relocation because the offset from the
+// start of the section is more than 24-bits.  But need to get the item to
+// be relocated, in this case _key64b_9+4, value correct in the instruction.
+// 01020f55	c7056475530100000000	movl	$0x0, 0x1537564
+
+// CHECK:   90c70564 75530100 000000')
diff --git a/test/MC/Mips/abicalls.ll b/test/MC/Mips/abicalls.ll
deleted file mode 100644
index 7b98b02..0000000
--- a/test/MC/Mips/abicalls.ll
+++ /dev/null
@@ -1,15 +0,0 @@
-; 
-; When the assembler is ready a .s file for it will
-; be created.
-
-; Note that EF_MIPS_CPIC is set by -mabicalls which is the default on Linux
-; TODO need to support -mno-abicalls
-
-; RUN: llc -filetype=asm -mtriple mipsel-unknown-linux -mcpu=mips32 -relocation-model=static %s -o - | FileCheck -check-prefix=CHECK-STATIC %s
-; RUN: llc -filetype=asm -mtriple mipsel-unknown-linux -mcpu=mips32 %s -o - | FileCheck -check-prefix=CHECK-PIC %s
-; RUN: llc -filetype=asm -mtriple mips64el-unknown-linux -mcpu=mips64 -relocation-model=static %s -o - | FileCheck -check-prefix=CHECK-PIC %s
-
-; CHECK-STATIC: .abicalls
-; CHECK-STATIC-NEXT: pic0
-; CHECK-PIC: .abicalls
-; CHECK-PIC-NOT: pic0
diff --git a/test/MC/Mips/cfi.s b/test/MC/Mips/cfi.s
new file mode 100644
index 0000000..a3247b5
--- /dev/null
+++ b/test/MC/Mips/cfi.s
@@ -0,0 +1,13 @@
+# RUN: llvm-mc %s -triple=mips-unknown-unknown -show-encoding -mcpu=mips32 | \
+# RUN:     FileCheck %s
+# RUN: llvm-mc %s -triple=mips64-unknown-unknown -show-encoding -mcpu=mips64 | \
+# RUN:     FileCheck %s
+
+# Check that we can accept register names in CFI directives and that they are
+# canonicalised to their DWARF register numbers.
+
+        .cfi_startproc         # CHECK: .cfi_startproc
+        .cfi_register   $6, $5 # CHECK: .cfi_register 6, 5
+        .cfi_def_cfa    $fp, 8 # CHECK: .cfi_def_cfa 30, 8
+        .cfi_def_cfa    $2, 16 # CHECK: .cfi_def_cfa 2, 16
+        .cfi_endproc           # CHECK: .cfi_endproc
diff --git a/test/MC/Mips/cpsetup.s b/test/MC/Mips/cpsetup.s
new file mode 100644
index 0000000..dbdcaab
--- /dev/null
+++ b/test/MC/Mips/cpsetup.s
@@ -0,0 +1,36 @@
+# RUN: llvm-mc -triple mips64-unknown-unknown -mattr=-n64,+o32 %s | \
+# RUN:     FileCheck -check-prefix=ANY -check-prefix=O32 %s
+# RUN: llvm-mc -triple mips64-unknown-unknown -mattr=-n64,+n32 %s | \
+# RUN:     FileCheck -check-prefix=ANY -check-prefix=NXX -check-prefix=N32 %s
+# RUN: llvm-mc -triple mips64-unknown-unknown %s | \
+# RUN:     FileCheck -check-prefix=ANY -check-prefix=NXX -check-prefix=N64 %s
+
+# TODO: !PIC -> no output
+
+        .text
+        .option pic2
+t1:
+        .cpsetup $25, 8, __cerror
+
+# ANY-LABEL: t1:
+
+# O32-NOT: __cerror
+
+# NXX: sd       $gp, 8($sp)
+# NXX: lui      $gp, %hi(%neg(%gp_rel(__cerror)))
+# NXX: addiu    $gp, $gp, %lo(%neg(%gp_rel(__cerror)))
+# N32: addu     $gp, $gp, $25
+# N64: daddu    $gp, $gp, $25
+
+t2:
+# ANY-LABEL: t2:
+
+        .cpsetup $25, $2, __cerror
+
+# O32-NOT: __cerror
+
+# NXX: move     $2, $gp
+# NXX: lui      $gp, %hi(%neg(%gp_rel(__cerror)))
+# NXX: addiu    $gp, $gp, %lo(%neg(%gp_rel(__cerror)))
+# N32: addu     $gp, $gp, $25
+# N64: daddu    $gp, $gp, $25
diff --git a/test/MC/Mips/do_switch.ll b/test/MC/Mips/do_switch.ll
deleted file mode 100644
index 7eda1b4..0000000
--- a/test/MC/Mips/do_switch.ll
+++ /dev/null
@@ -1,39 +0,0 @@
-; This test case will cause an internal EK_GPRel64BlockAddress to be 
-; produced. This was not handled for direct object and an assertion
-; to occur. This is a variation on test case test/CodeGen/Mips/do_switch.ll
-
-; RUN: llc < %s -filetype=obj -march=mips -relocation-model=static
-
-; RUN: llc < %s -filetype=obj -march=mips -relocation-model=pic
-
-; RUN: llc < %s -filetype=obj -march=mips64 -relocation-model=pic -mcpu=mips64 -mattr=n64 
-
-define i32 @main() nounwind readnone {
-entry:
-  %x = alloca i32, align 4                        ; <i32*> [#uses=2]
-  store volatile i32 2, i32* %x, align 4
-  %0 = load volatile i32* %x, align 4             ; <i32> [#uses=1]
-
-  switch i32 %0, label %bb4 [
-    i32 0, label %bb5
-    i32 1, label %bb1
-    i32 2, label %bb2
-    i32 3, label %bb3
-  ]
-
-bb1:                                              ; preds = %entry
-  ret i32 2
-
-bb2:                                              ; preds = %entry
-  ret i32 0
-
-bb3:                                              ; preds = %entry
-  ret i32 3
-
-bb4:                                              ; preds = %entry
-  ret i32 4
-
-bb5:                                              ; preds = %entry
-  ret i32 1
-}
-
diff --git a/test/MC/Mips/do_switch1.s b/test/MC/Mips/do_switch1.s
new file mode 100644
index 0000000..331a4e2
--- /dev/null
+++ b/test/MC/Mips/do_switch1.s
@@ -0,0 +1,75 @@
+// This test case will cause an internal EK_GPRel64BlockAddress to be
+// produced. This was not handled for direct object and an assertion
+// to occur. This is a variation on test case test/CodeGen/Mips/do_switch.ll
+
+// RUN: llvm-mc < %s -filetype=obj -triple=mips-pc-linux -relocation-model=static
+
+	.text
+	.abicalls
+	.option	pic0
+	.section	.mdebug.abi32,"",@progbits
+	.file	"/home/espindola/llvm/llvm/test/MC/Mips/do_switch.ll"
+	.text
+	.globl	main
+	.align	2
+	.type	main,@function
+	.set	nomips16
+	.ent	main
+main:                                   # @main
+	.frame	$sp,8,$ra
+	.mask 	0x00000000,0
+	.fmask	0x00000000,0
+	.set	noreorder
+	.set	nomacro
+	.set	noat
+# BB#0:                                 # %entry
+	addiu	$sp, $sp, -8
+	addiu	$1, $zero, 2
+	sw	$1, 4($sp)
+	lw	$2, 4($sp)
+	sltiu	$1, $2, 4
+	bnez	$1, $BB0_2
+	nop
+$BB0_1:                                 # %bb4
+	addiu	$2, $zero, 4
+	jr	$ra
+	addiu	$sp, $sp, 8
+$BB0_2:                                 # %entry
+	sll	$1, $2, 2
+	lui	$2, %hi($JTI0_0)
+	addu	$1, $1, $2
+	lw	$1, %lo($JTI0_0)($1)
+	jr	$1
+	nop
+$BB0_3:                                 # %bb5
+	addiu	$2, $zero, 1
+	jr	$ra
+	addiu	$sp, $sp, 8
+$BB0_4:                                 # %bb1
+	addiu	$2, $zero, 2
+	jr	$ra
+	addiu	$sp, $sp, 8
+$BB0_5:                                 # %bb2
+	addiu	$2, $zero, 0
+	jr	$ra
+	addiu	$sp, $sp, 8
+$BB0_6:                                 # %bb3
+	addiu	$2, $zero, 3
+	jr	$ra
+	addiu	$sp, $sp, 8
+	.set	at
+	.set	macro
+	.set	reorder
+	.end	main
+$tmp0:
+	.size	main, ($tmp0)-main
+	.section	.rodata,"a",@progbits
+	.align	2
+$JTI0_0:
+	.4byte	($BB0_3)
+	.4byte	($BB0_4)
+	.4byte	($BB0_5)
+	.4byte	($BB0_6)
+
+
+	.text
diff --git a/test/MC/Mips/do_switch2.s b/test/MC/Mips/do_switch2.s
new file mode 100644
index 0000000..824054f
--- /dev/null
+++ b/test/MC/Mips/do_switch2.s
@@ -0,0 +1,77 @@
+// This test case will cause an internal EK_GPRel64BlockAddress to be
+// produced. This was not handled for direct object and an assertion
+// to occur. This is a variation on test case test/CodeGen/Mips/do_switch.ll
+
+// RUN: llvm-mc < %s -filetype=obj -triple=mips-pc-linux -relocation-model=pic
+
+	.text
+	.abicalls
+	.section	.mdebug.abi32,"",@progbits
+	.file	"/home/espindola/llvm/llvm/test/MC/Mips/do_switch.ll"
+	.text
+	.globl	main
+	.align	2
+	.type	main,@function
+	.set	nomips16
+	.ent	main
+main:                                   # @main
+	.frame	$sp,8,$ra
+	.mask 	0x00000000,0
+	.fmask	0x00000000,0
+	.set	noreorder
+	.set	nomacro
+	.set	noat
+# BB#0:                                 # %entry
+	lui	$2, %hi(_gp_disp)
+	addiu	$2, $2, %lo(_gp_disp)
+	addiu	$sp, $sp, -8
+	addiu	$1, $zero, 2
+	sw	$1, 4($sp)
+	lw	$3, 4($sp)
+	sltiu	$1, $3, 4
+	bnez	$1, $BB0_2
+	addu	$2, $2, $25
+$BB0_1:                                 # %bb4
+	addiu	$2, $zero, 4
+	jr	$ra
+	addiu	$sp, $sp, 8
+$BB0_2:                                 # %entry
+	sll	$1, $3, 2
+	lw	$3, %got($JTI0_0)($2)
+	addu	$1, $1, $3
+	lw	$1, %lo($JTI0_0)($1)
+	addu	$1, $1, $2
+	jr	$1
+	nop
+$BB0_3:                                 # %bb5
+	addiu	$2, $zero, 1
+	jr	$ra
+	addiu	$sp, $sp, 8
+$BB0_4:                                 # %bb1
+	addiu	$2, $zero, 2
+	jr	$ra
+	addiu	$sp, $sp, 8
+$BB0_5:                                 # %bb2
+	addiu	$2, $zero, 0
+	jr	$ra
+	addiu	$sp, $sp, 8
+$BB0_6:                                 # %bb3
+	addiu	$2, $zero, 3
+	jr	$ra
+	addiu	$sp, $sp, 8
+	.set	at
+	.set	macro
+	.set	reorder
+	.end	main
+$tmp0:
+	.size	main, ($tmp0)-main
+	.section	.rodata,"a",@progbits
+	.align	2
+$JTI0_0:
+	.gpword	($BB0_3)
+	.gpword	($BB0_4)
+	.gpword	($BB0_5)
+	.gpword	($BB0_6)
+
+
+	.text
diff --git a/test/MC/Mips/do_switch3.s b/test/MC/Mips/do_switch3.s
new file mode 100644
index 0000000..02ad087
--- /dev/null
+++ b/test/MC/Mips/do_switch3.s
@@ -0,0 +1,82 @@
+// This test case will cause an internal EK_GPRel64BlockAddress to be
+// produced. This was not handled for direct object and an assertion
+// to occur. This is a variation on test case test/CodeGen/Mips/do_switch.ll
+
+// RUN: llvm-mc < %s -filetype=obj -triple=mips64-pc-linux -relocation-model=pic -mcpu=mips64 -mattr=n64
+
+	.text
+	.abicalls
+	.section	.mdebug.abi64,"",@progbits
+	.file	"/home/espindola/llvm/llvm/test/MC/Mips/do_switch.ll"
+	.text
+	.globl	main
+	.align	3
+	.type	main,@function
+	.set	nomips16
+	.ent	main
+main:                                   # @main
+	.frame	$sp,16,$ra
+	.mask 	0x00000000,0
+	.fmask	0x00000000,0
+	.set	noreorder
+	.set	nomacro
+	.set	noat
+# BB#0:                                 # %entry
+	daddiu	$sp, $sp, -16
+	lui	$1, %hi(%neg(%gp_rel(main)))
+	daddu	$2, $1, $25
+	addiu	$1, $zero, 2
+	sw	$1, 12($sp)
+	lw	$1, 12($sp)
+	sltiu	$4, $1, 4
+	dsll	$3, $1, 32
+	bnez	$4, $BB0_2
+	nop
+$BB0_1:                                 # %bb4
+	addiu	$2, $zero, 4
+	jr	$ra
+	daddiu	$sp, $sp, 16
+$BB0_2:                                 # %entry
+	daddiu	$1, $2, %lo(%neg(%gp_rel(main)))
+	dsrl	$2, $3, 32
+	daddiu	$3, $zero, 8
+	dmult	$2, $3
+	mflo	$2
+	ld	$3, %got_page($JTI0_0)($1)
+	daddu	$2, $2, $3
+	ld	$2, %got_ofst($JTI0_0)($2)
+	daddu	$1, $2, $1
+	jr	$1
+	nop
+$BB0_3:                                 # %bb5
+	addiu	$2, $zero, 1
+	jr	$ra
+	daddiu	$sp, $sp, 16
+$BB0_4:                                 # %bb1
+	addiu	$2, $zero, 2
+	jr	$ra
+	daddiu	$sp, $sp, 16
+$BB0_5:                                 # %bb2
+	addiu	$2, $zero, 0
+	jr	$ra
+	daddiu	$sp, $sp, 16
+$BB0_6:                                 # %bb3
+	addiu	$2, $zero, 3
+	jr	$ra
+	daddiu	$sp, $sp, 16
+	.set	at
+	.set	macro
+	.set	reorder
+	.end	main
+$tmp0:
+	.size	main, ($tmp0)-main
+	.section	.rodata,"a",@progbits
+	.align	3
+$JTI0_0:
+	.gpdword	($BB0_3)
+	.gpdword	($BB0_4)
+	.gpdword	($BB0_5)
+	.gpdword	($BB0_6)
+
+
+	.text
diff --git a/test/MC/Mips/elf-N64.ll b/test/MC/Mips/elf-N64.ll
deleted file mode 100644
index a1ea34a..0000000
--- a/test/MC/Mips/elf-N64.ll
+++ /dev/null
@@ -1,26 +0,0 @@
-; RUN: llc -filetype=obj -march=mips64el -mcpu=mips64 -disable-mips-delay-filler %s -o - | llvm-readobj -r | FileCheck %s
-
-; Check for N64 relocation production.
-;
-; ModuleID = '../hello.c'
-target datalayout = "e-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v64:64:64-n32"
-target triple = "mips64el-unknown-linux"
-
-@str = private unnamed_addr constant [12 x i8] c"hello world\00"
-
-define i32 @main() nounwind {
-entry:
-; Check that the appropriate relocations were created.
-
-; CHECK: Relocations [
-; CHECK:   0x{{[0-9,A-F]+}} R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_HI16
-; CHECK:   0x{{[0-9,A-F]+}} R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_LO16
-; CHECK:   0x{{[0-9,A-F]+}} R_MIPS_GOT_PAGE/R_MIPS_NONE/R_MIPS_NONE
-; CHECK:   0x{{[0-9,A-F]+}} R_MIPS_GOT_OFST/R_MIPS_NONE/R_MIPS_NONE
-; CHECK: ]
-
-  %puts = tail call i32 @puts(i8* getelementptr inbounds ([12 x i8]* @str, i64 0, i64 0))
-  ret i32 0
-
-}
-declare i32 @puts(i8* nocapture) nounwind
diff --git a/test/MC/Mips/elf-N64.s b/test/MC/Mips/elf-N64.s
new file mode 100644
index 0000000..3c01803
--- /dev/null
+++ b/test/MC/Mips/elf-N64.s
@@ -0,0 +1,64 @@
+// RUN: llvm-mc -filetype=obj -triple=mips64el-pc-linux -mcpu=mips64  %s -o - | llvm-readobj -r | FileCheck %s
+
+// Check for N64 relocation production.
+// Check that the appropriate relocations were created.
+
+// CHECK: Relocations [
+// CHECK:   0x{{[0-9,A-F]+}} R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_HI16
+// CHECK:   0x{{[0-9,A-F]+}} R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_LO16
+// CHECK:   0x{{[0-9,A-F]+}} R_MIPS_GOT_PAGE/R_MIPS_NONE/R_MIPS_NONE
+// CHECK:   0x{{[0-9,A-F]+}} R_MIPS_GOT_OFST/R_MIPS_NONE/R_MIPS_NONE
+// CHECK: ]
+
+
+	.text
+	.abicalls
+	.section	.mdebug.abi64,"",@progbits
+	.file	"/home/espindola/llvm/llvm/test/MC/Mips/elf-N64.ll"
+	.text
+	.globl	main
+	.align	3
+	.type	main,@function
+	.set	nomips16
+	.ent	main
+main:                                   # @main
+	.frame	$sp,16,$ra
+	.mask 	0x00000000,0
+	.fmask	0x90000000,-4
+	.set	noreorder
+	.set	nomacro
+	.set	noat
+# BB#0:                                 # %entry
+	daddiu	$sp, $sp, -16
+	sd	$ra, 8($sp)             # 8-byte Folded Spill
+	sd	$gp, 0($sp)             # 8-byte Folded Spill
+	lui	$1, %hi(%neg(%gp_rel(main)))
+	daddu	$1, $1, $25
+	daddiu	$gp, $1, %lo(%neg(%gp_rel(main)))
+	ld	$1, %got_page($str)($gp)
+	daddiu	$4, $1, %got_ofst($str)
+	ld	$25, %call16(puts)($gp)
+	jalr	$25
+	nop
+	addiu	$2, $zero, 0
+	ld	$gp, 0($sp)             # 8-byte Folded Reload
+	ld	$ra, 8($sp)             # 8-byte Folded Reload
+	daddiu	$sp, $sp, 16
+	jr	$ra
+	nop
+	.set	at
+	.set	macro
+	.set	reorder
+	.end	main
+$tmp0:
+	.size	main, ($tmp0)-main
+
+	.type	$str,@object            # @str
+	.section	.rodata.str1.4,"aMS",@progbits,1
+	.align	2
+$str:
+	.asciz	"hello world"
+	.size	$str, 12
+
+
+	.text
diff --git a/test/MC/Mips/elf-gprel-32-64.ll b/test/MC/Mips/elf-gprel-32-64.ll
deleted file mode 100644
index 4057eb8..0000000
--- a/test/MC/Mips/elf-gprel-32-64.ll
+++ /dev/null
@@ -1,40 +0,0 @@
-; RUN: llc -filetype=obj -march=mips64el -mcpu=mips64 %s -o - \
-; RUN: | llvm-readobj -r \
-; RUN: | FileCheck %s
-
-define i32 @test(i32 %c) nounwind {
-entry:
-  switch i32 %c, label %sw.default [
-    i32 0, label %sw.bb
-    i32 1, label %sw.bb2
-    i32 2, label %sw.bb5
-    i32 3, label %sw.bb8
-  ]
-
-sw.bb:
-  br label %return
-sw.bb2:
-  br label %return
-sw.bb5:
-  br label %return
-sw.bb8:
-  br label %return
-sw.default:
-  br label %return
-
-return:
-  %retval.0 = phi i32 [ -1, %sw.default ], [ 7, %sw.bb8 ], [ 2, %sw.bb5 ], [ 3, %sw.bb2 ], [ 1, %sw.bb ]
-  ret i32 %retval.0
-}
-
-; Check that the appropriate relocations were created.
-
-; R_MIPS_GPREL32/R_MIPS_64/R_MIPS_NONE
-; CHECK:      Relocations [
-; CHECK:        Section ({{[a-z0-9]+}}) .rela.rodata {
-; CHECK-NEXT:     0x{{[0-9,A-F]+}} R_MIPS_GPREL32/R_MIPS_64/R_MIPS_NONE
-; CHECK-NEXT:     0x{{[0-9,A-F]+}} R_MIPS_GPREL32/R_MIPS_64/R_MIPS_NONE
-; CHECK-NEXT:     0x{{[0-9,A-F]+}} R_MIPS_GPREL32/R_MIPS_64/R_MIPS_NONE
-; CHECK-NEXT:     0x{{[0-9,A-F]+}} R_MIPS_GPREL32/R_MIPS_64/R_MIPS_NONE
-; CHECK-NEXT:   }
-; CHECK-NEXT: ]
diff --git a/test/MC/Mips/elf-gprel-32-64.s b/test/MC/Mips/elf-gprel-32-64.s
new file mode 100644
index 0000000..ae75197
--- /dev/null
+++ b/test/MC/Mips/elf-gprel-32-64.s
@@ -0,0 +1,83 @@
+// RUN: llvm-mc -filetype=obj -triple=mips64el-pc-linux -mcpu=mips64 %s -o - \
+// RUN: | llvm-readobj -r \
+// RUN: | FileCheck %s
+
+// Check that the appropriate relocations were created.
+
+// R_MIPS_GPREL32/R_MIPS_64/R_MIPS_NONE
+// CHECK:      Relocations [
+// CHECK:        Section ({{[a-z0-9]+}}) .rela.rodata {
+// CHECK-NEXT:     0x{{[0-9,A-F]+}} R_MIPS_GPREL32/R_MIPS_64/R_MIPS_NONE
+// CHECK-NEXT:     0x{{[0-9,A-F]+}} R_MIPS_GPREL32/R_MIPS_64/R_MIPS_NONE
+// CHECK-NEXT:     0x{{[0-9,A-F]+}} R_MIPS_GPREL32/R_MIPS_64/R_MIPS_NONE
+// CHECK-NEXT:     0x{{[0-9,A-F]+}} R_MIPS_GPREL32/R_MIPS_64/R_MIPS_NONE
+// CHECK-NEXT:   }
+// CHECK-NEXT: ]
+
+	.text
+	.abicalls
+	.section	.mdebug.abi64,"",@progbits
+	.file	"/home/espindola/llvm/llvm/test/MC/Mips/elf-gprel-32-64.ll"
+	.text
+	.globl	test
+	.align	3
+	.type	test,@function
+	.set	nomips16
+	.ent	test
+test:                                   # @test
+	.frame	$sp,0,$ra
+	.mask 	0x00000000,0
+	.fmask	0x00000000,0
+	.set	noreorder
+	.set	nomacro
+	.set	noat
+# BB#0:                                 # %entry
+	lui	$1, %hi(%neg(%gp_rel(test)))
+	daddu	$2, $1, $25
+	sltiu	$1, $4, 4
+	dsll	$3, $4, 32
+	bnez	$1, $BB0_2
+	nop
+$BB0_1:                                 # %sw.default
+	b	$BB0_3
+	addiu	$2, $zero, -1
+$BB0_2:                                 # %entry
+	daddiu	$1, $2, %lo(%neg(%gp_rel(test)))
+	dsrl	$3, $3, 32
+	daddiu	$4, $zero, 8
+	dmult	$3, $4
+	mflo	$3
+	ld	$4, %got_page($JTI0_0)($1)
+	daddu	$3, $3, $4
+	ld	$3, %got_ofst($JTI0_0)($3)
+	daddu	$1, $3, $1
+	jr	$1
+	addiu	$2, $zero, 1
+$BB0_3:                                 # %return
+	jr	$ra
+	nop
+$BB0_4:                                 # %sw.bb2
+	jr	$ra
+	addiu	$2, $zero, 3
+$BB0_5:                                 # %sw.bb5
+	jr	$ra
+	addiu	$2, $zero, 2
+$BB0_6:                                 # %sw.bb8
+	jr	$ra
+	addiu	$2, $zero, 7
+	.set	at
+	.set	macro
+	.set	reorder
+	.end	test
+$tmp0:
+	.size	test, ($tmp0)-test
+	.section	.rodata,"a",@progbits
+	.align	3
+$JTI0_0:
+	.gpdword	($BB0_3)
+	.gpdword	($BB0_4)
+	.gpdword	($BB0_5)
+	.gpdword	($BB0_6)
+
+
+	.text
diff --git a/test/MC/Mips/elf-reginfo.ll b/test/MC/Mips/elf-reginfo.ll
deleted file mode 100644
index a255af9..0000000
--- a/test/MC/Mips/elf-reginfo.ll
+++ /dev/null
@@ -1,34 +0,0 @@
- ; RUN: llc -filetype=obj -march=mips64el -mcpu=mips64 %s -o - \
- ; RUN: | llvm-readobj -s | FileCheck --check-prefix=CHECK_64 %s
- ; RUN: llc -filetype=obj -march=mipsel -mcpu=mips32 %s -o - \
- ; RUN: | llvm-readobj -s | FileCheck --check-prefix=CHECK_32 %s
-
-; Check for register information sections.
-;
-
-@str = private unnamed_addr constant [12 x i8] c"hello world\00"
-
-define i32 @main() nounwind {
-entry:
-; Check that the appropriate relocations were created.
-
-; check for .MIPS.options
-; CHECK_64:      Sections [
-; CHECK_64:        Section {
-; CHECK_64:          Name: .MIPS.options
-; CHECK_64-NEXT:     Type: SHT_MIPS_OPTIONS
-; CHECK_64-NEXT:     Flags [ (0x8000002)
-
-; check for .reginfo
-; CHECK_32:      Sections [
-; CHECK_32:        Section {
-; CHECK_32:          Name: .reginfo
-; CHECK_32-NEXT:     Type:  SHT_MIPS_REGINFO
-; CHECK_32-NEXT:     Flags [ (0x2)
-
-
-  %puts = tail call i32 @puts(i8* getelementptr inbounds ([12 x i8]* @str, i64 0, i64 0))
-  ret i32 0
-
-}
-declare i32 @puts(i8* nocapture) nounwind
diff --git a/test/MC/Mips/elf-relsym.ll b/test/MC/Mips/elf-relsym.ll
deleted file mode 100644
index 6da9262..0000000
--- a/test/MC/Mips/elf-relsym.ll
+++ /dev/null
@@ -1,39 +0,0 @@
-; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux %s -o - | llvm-readobj -t | FileCheck %s
-
-; Check that the appropriate symbols were created.
-
-; CHECK: Symbols [
-; CHECK:   Symbol {
-; CHECK:     Name: $.str
-; CHECK:   }
-; CHECK:   Symbol {
-; CHECK:     Name: $.str1
-; CHECK:   }
-; CHECK:   Symbol {
-; CHECK:     Name: $CPI0_0
-; CHECK:   }
-; CHECK:   Symbol {
-; CHECK:     Name: $CPI0_1
-; CHECK:   }
-; CHECK: ]
-
-@.str = private unnamed_addr constant [6 x i8] c"abcde\00", align 1
-@gc1 = external global i8*
-@.str1 = private unnamed_addr constant [5 x i8] c"fghi\00", align 1
-@gc2 = external global i8*
-@gd1 = external global double
-@gd2 = external global double
-
-define void @foo1() nounwind {
-entry:
-  store i8* getelementptr inbounds ([6 x i8]* @.str, i32 0, i32 0), i8** @gc1, align 4
-  store i8* getelementptr inbounds ([5 x i8]* @.str1, i32 0, i32 0), i8** @gc2, align 4
-  %0 = load double* @gd1, align 8
-  %add = fadd double %0, 2.500000e+00
-  store double %add, double* @gd1, align 8
-  %1 = load double* @gd2, align 8
-  %add1 = fadd double %1, 4.500000e+00
-  store double %add1, double* @gd2, align 8
-  ret void
-}
-
diff --git a/test/MC/Mips/elf-relsym.s b/test/MC/Mips/elf-relsym.s
new file mode 100644
index 0000000..d19065e
--- /dev/null
+++ b/test/MC/Mips/elf-relsym.s
@@ -0,0 +1,87 @@
+// RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux %s -o - | llvm-readobj -t | FileCheck %s
+
+// Check that the appropriate symbols were created.
+
+// CHECK: Symbols [
+// CHECK:   Symbol {
+// CHECK:     Name: $.str
+// CHECK:   }
+// CHECK:   Symbol {
+// CHECK:     Name: $.str1
+// CHECK:   }
+// CHECK:   Symbol {
+// CHECK:     Name: $CPI0_0
+// CHECK:   }
+// CHECK:   Symbol {
+// CHECK:     Name: $CPI0_1
+// CHECK:   }
+// CHECK: ]
+
+	.text
+	.abicalls
+	.section	.mdebug.abi32,"",@progbits
+	.file	"/home/espindola/llvm/llvm/test/MC/Mips/elf-relsym.ll"
+	.section	.rodata.cst8,"aM",@progbits,8
+	.align	3
+$CPI0_0:
+	.8byte	4612811918334230528     # double 2.5
+$CPI0_1:
+	.8byte	4616752568008179712     # double 4.5
+	.text
+	.globl	foo1
+	.align	2
+	.type	foo1,@function
+	.set	nomips16
+	.ent	foo1
+foo1:                                   # @foo1
+	.frame	$sp,0,$ra
+	.mask 	0x00000000,0
+	.fmask	0x00000000,0
+	.set	noreorder
+	.set	nomacro
+	.set	noat
+# BB#0:                                 # %entry
+	lui	$2, %hi(_gp_disp)
+	addiu	$2, $2, %lo(_gp_disp)
+	addu	$1, $2, $25
+	lw	$2, %got($.str)($1)
+	addiu	$2, $2, %lo($.str)
+	lw	$3, %got(gc1)($1)
+	sw	$2, 0($3)
+	lw	$2, %got($.str1)($1)
+	addiu	$2, $2, %lo($.str1)
+	lw	$3, %got(gc2)($1)
+	sw	$2, 0($3)
+	lw	$2, %got($CPI0_0)($1)
+	ldc1	$f0, %lo($CPI0_0)($2)
+	lw	$2, %got(gd1)($1)
+	ldc1	$f2, 0($2)
+	lw	$3, %got($CPI0_1)($1)
+	ldc1	$f4, %lo($CPI0_1)($3)
+	lw	$1, %got(gd2)($1)
+	add.d	$f0, $f2, $f0
+	sdc1	$f0, 0($2)
+	ldc1	$f0, 0($1)
+	add.d	$f0, $f0, $f4
+	jr	$ra
+	sdc1	$f0, 0($1)
+	.set	at
+	.set	macro
+	.set	reorder
+	.end	foo1
+$tmp0:
+	.size	foo1, ($tmp0)-foo1
+
+	.type	$.str,@object           # @.str
+	.section	.rodata.str1.1,"aMS",@progbits,1
+$.str:
+	.asciz	"abcde"
+	.size	$.str, 6
+
+	.type	$.str1,@object          # @.str1
+$.str1:
+	.asciz	"fghi"
+	.size	$.str1, 5
+
+
+	.text
diff --git a/test/MC/Mips/elf-tls.ll b/test/MC/Mips/elf-tls.ll
deleted file mode 100644
index bcce3d5..0000000
--- a/test/MC/Mips/elf-tls.ll
+++ /dev/null
@@ -1,40 +0,0 @@
-; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux %s -o - | llvm-readobj -r | FileCheck %s
-
-; Check that the appropriate relocations were created.
-
-; CHECK: Relocations [
-; CHECK:   Section (2) .rel.text {
-; CHECK:     R_MIPS_TLS_LDM
-; CHECK:     R_MIPS_TLS_DTPREL_HI16
-; CHECK:     R_MIPS_TLS_DTPREL_LO16
-; CHECK:   }
-; CHECK: ]
-
-@t1 = thread_local global i32 0, align 4
-
-define i32 @f1() nounwind {
-entry:
-  %tmp = load i32* @t1, align 4
-  ret i32 %tmp
-
-}
-
-
-@t2 = external thread_local global i32
-
-define i32 @f2() nounwind {
-entry:
-  %tmp = load i32* @t2, align 4
-  ret i32 %tmp
-
-}
-
-@f3.i = internal thread_local unnamed_addr global i32 1, align 4
-
-define i32 @f3() nounwind {
-entry:
-  %0 = load i32* @f3.i, align 4
-  %inc = add nsw i32 %0, 1
-  store i32 %inc, i32* @f3.i, align 4
-  ret i32 %inc
-}
diff --git a/test/MC/Mips/elf-tls.s b/test/MC/Mips/elf-tls.s
new file mode 100644
index 0000000..d32a699
--- /dev/null
+++ b/test/MC/Mips/elf-tls.s
@@ -0,0 +1,134 @@
+// RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux %s -o - | llvm-readobj -r | FileCheck %s
+
+// Check that the appropriate relocations were created.
+
+// CHECK: Relocations [
+// CHECK:   Section (2) .rel.text {
+// CHECK:     R_MIPS_TLS_LDM
+// CHECK:     R_MIPS_TLS_DTPREL_HI16
+// CHECK:     R_MIPS_TLS_DTPREL_LO16
+// CHECK:   }
+// CHECK: ]
+
+	.text
+	.abicalls
+	.section	.mdebug.abi32,"",@progbits
+	.file	"/home/espindola/llvm/llvm/test/MC/Mips/elf-tls.ll"
+	.text
+	.globl	f1
+	.align	2
+	.type	f1,@function
+	.set	nomips16
+	.ent	f1
+f1:                                     # @f1
+	.frame	$sp,24,$ra
+	.mask 	0x80000000,-4
+	.fmask	0x00000000,0
+	.set	noreorder
+	.set	nomacro
+	.set	noat
+# BB#0:                                 # %entry
+	lui	$2, %hi(_gp_disp)
+	addiu	$2, $2, %lo(_gp_disp)
+	addiu	$sp, $sp, -24
+	sw	$ra, 20($sp)            # 4-byte Folded Spill
+	addu	$gp, $2, $25
+	lw	$25, %call16(__tls_get_addr)($gp)
+	jalr	$25
+	addiu	$4, $gp, %tlsgd(t1)
+	lw	$2, 0($2)
+	lw	$ra, 20($sp)            # 4-byte Folded Reload
+	jr	$ra
+	addiu	$sp, $sp, 24
+	.set	at
+	.set	macro
+	.set	reorder
+	.end	f1
+$tmp0:
+	.size	f1, ($tmp0)-f1
+
+	.globl	f2
+	.align	2
+	.type	f2,@function
+	.set	nomips16
+	.ent	f2
+f2:                                     # @f2
+	.frame	$sp,24,$ra
+	.mask 	0x80000000,-4
+	.fmask	0x00000000,0
+	.set	noreorder
+	.set	nomacro
+	.set	noat
+# BB#0:                                 # %entry
+	lui	$2, %hi(_gp_disp)
+	addiu	$2, $2, %lo(_gp_disp)
+	addiu	$sp, $sp, -24
+	sw	$ra, 20($sp)            # 4-byte Folded Spill
+	addu	$gp, $2, $25
+	lw	$25, %call16(__tls_get_addr)($gp)
+	jalr	$25
+	addiu	$4, $gp, %tlsgd(t2)
+	lw	$2, 0($2)
+	lw	$ra, 20($sp)            # 4-byte Folded Reload
+	jr	$ra
+	addiu	$sp, $sp, 24
+	.set	at
+	.set	macro
+	.set	reorder
+	.end	f2
+$tmp1:
+	.size	f2, ($tmp1)-f2
+
+	.globl	f3
+	.align	2
+	.type	f3,@function
+	.set	nomips16
+	.ent	f3
+f3:                                     # @f3
+	.frame	$sp,24,$ra
+	.mask 	0x80000000,-4
+	.fmask	0x00000000,0
+	.set	noreorder
+	.set	nomacro
+	.set	noat
+# BB#0:                                 # %entry
+	lui	$2, %hi(_gp_disp)
+	addiu	$2, $2, %lo(_gp_disp)
+	addiu	$sp, $sp, -24
+	sw	$ra, 20($sp)            # 4-byte Folded Spill
+	addu	$gp, $2, $25
+	lw	$25, %call16(__tls_get_addr)($gp)
+	jalr	$25
+	addiu	$4, $gp, %tlsldm(f3.i)
+	lui	$1, %dtprel_hi(f3.i)
+	addu	$1, $1, $2
+	lw	$2, %dtprel_lo(f3.i)($1)
+	addiu	$2, $2, 1
+	sw	$2, %dtprel_lo(f3.i)($1)
+	lw	$ra, 20($sp)            # 4-byte Folded Reload
+	jr	$ra
+	addiu	$sp, $sp, 24
+	.set	at
+	.set	macro
+	.set	reorder
+	.end	f3
+$tmp2:
+	.size	f3, ($tmp2)-f3
+
+	.type	t1,@object              # @t1
+	.section	.tbss,"awT",@nobits
+	.globl	t1
+	.align	2
+t1:
+	.4byte	0                       # 0x0
+	.size	t1, 4
+
+	.type	f3.i,@object            # @f3.i
+	.section	.tdata,"awT",@progbits
+	.align	2
+f3.i:
+	.4byte	1                       # 0x1
+	.size	f3.i, 4
+
+
+	.text
diff --git a/test/MC/Mips/elf_eflags.ll b/test/MC/Mips/elf_eflags.ll
deleted file mode 100644
index 9432dcf..0000000
--- a/test/MC/Mips/elf_eflags.ll
+++ /dev/null
@@ -1,69 +0,0 @@
-; This tests ELF EFLAGS setting with direct object.
-; When the assembler is ready a .s file for it will
-; be created.
-
-; Non-shared (static) is the absence of pic and or cpic.
-
-; EF_MIPS_NOREORDER (0x00000001) is always on by default currently
-; EF_MIPS_PIC (0x00000002)
-; EF_MIPS_CPIC (0x00000004) - See note below
-; EF_MIPS_ABI2 (0x00000020) - n32 not tested yet
-; EF_MIPS_ARCH_32 (0x50000000)
-; EF_MIPS_ARCH_64 (0x60000000)
-; EF_MIPS_ARCH_32R2 (0x70000000)
-; EF_MIPS_ARCH_64R2 (0x80000000)
-
-; Note that EF_MIPS_CPIC is set by -mabicalls which is the default on Linux
-; TODO need to support -mno-abicalls
-
-; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32 -relocation-model=static %s -print-hack-directives -o - | FileCheck -check-prefix=CHECK-BE32 %s
-; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32 -print-hack-directives %s -o - | FileCheck -check-prefix=CHECK-BE32_PIC %s
-; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32r2 -relocation-model=static %s -print-hack-directives -o - | FileCheck -check-prefix=CHECK-BE32R2 %s
-; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32r2 -print-hack-directives %s -o - | FileCheck -check-prefix=CHECK-BE32R2_PIC %s
-; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32r2 -mattr=+micromips -relocation-model=static -print-hack-directives %s -o - | FileCheck -check-prefix=CHECK-BE32R2-MICROMIPS %s
-; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32r2 -mattr=+micromips -print-hack-directives %s -o - | FileCheck -check-prefix=CHECK-BE32R2-MICROMIPS_PIC %s
-
-; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips64 -relocation-model=static %s -print-hack-directives -o - | FileCheck -check-prefix=CHECK-BE64 %s
-; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips64 %s -print-hack-directives -o - | FileCheck -check-prefix=CHECK-BE64_PIC %s
-; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips64r2 -relocation-model=static -print-hack-directives %s -o - | FileCheck -check-prefix=CHECK-BE64R2 %s
-; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips64r2 -print-hack-directives %s -o - | FileCheck -check-prefix=CHECK-BE64R2_PIC %s
-
-; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32r2 -mattr=+mips16 -relocation-model=pic -print-hack-directives %s -o - | FileCheck -check-prefix=CHECK-LE32R2-MIPS16 %s
- 
-; 32(R1) bit with NO_REORDER and static
-; CHECK-BE32: .mips_hack_elf_flags 0x50001005
-;
-; 32(R1) bit with NO_REORDER and PIC
-; CHECK-BE32_PIC: .mips_hack_elf_flags 0x50001007
-;
-; 32R2 bit with NO_REORDER and static
-; CHECK-BE32R2: .mips_hack_elf_flags 0x70001005
-;
-; 32R2 bit with NO_REORDER and PIC
-; CHECK-BE32R2_PIC: .mips_hack_elf_flags 0x70001007
-;
-; 32R2 bit MICROMIPS with NO_REORDER and static
-; CHECK-BE32R2-MICROMIPS: .mips_hack_elf_flags 0x72001005
-;
-; 32R2 bit MICROMIPS with NO_REORDER and PIC
-; CHECK-BE32R2-MICROMIPS_PIC: .mips_hack_elf_flags 0x72001007
-;
-; 64(R1) bit with NO_REORDER and static
-; CHECK-BE64: .mips_hack_elf_flags 0x60000005
-;
-; 64(R1) bit with NO_REORDER and PIC
-; CHECK-BE64_PIC: .mips_hack_elf_flags 0x60000007
-;
-; 64R2 bit with NO_REORDER and static
-; CHECK-BE64R2: .mips_hack_elf_flags 0x80000005
-;
-; 64R2 bit with NO_REORDER and PIC
-; CHECK-BE64R2_PIC: .mips_hack_elf_flags 0x80000007
-;
-; 32R2 bit MIPS16 with PIC
-; CHECK-LE32R2-MIPS16: .mips_hack_elf_flags 0x74001006
-
-define i32 @main() nounwind {
-entry:
-  ret i32 0
-}
diff --git a/test/MC/Mips/elf_eflags.s b/test/MC/Mips/elf_eflags.s
index c565964..c789428 100644
--- a/test/MC/Mips/elf_eflags.s
+++ b/test/MC/Mips/elf_eflags.s
@@ -1,5 +1,43 @@
-// RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux %s -o -| llvm-readobj -h | FileCheck %s
+# These *MUST* match the output of gas compiled with the same triple and
+# corresponding options (-mcpu=mips32 -> -mips32 for example).
 
-        .mips_hack_elf_flags 0x50001005
+# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r2 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R2 %s
+# MIPSEL-MIPS64R2: Flags [ (0x80001100)
 
-// CHECK: Flags [ (0x50001005)
+# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64 %s
+# MIPSEL-MIPS64: Flags [ (0x60001100)
+
+# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips32r2 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS32R2 %s
+# MIPSEL-MIPS32R2: Flags [ (0x70001000)
+
+# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips32 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS32 %s
+# MIPSEL-MIPS32: Flags [ (0x50001000)
+
+# RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -mcpu=mips64r2 -mattr=-n64,n32 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64R2-N32 %s
+# MIPS64EL-MIPS64R2-N32: Flags [ (0x80000020)
+
+# RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -mcpu=mips64 -mattr=-n64,n32 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64-N32 %s
+# MIPS64EL-MIPS64-N32: Flags [ (0x60000020)
+
+# RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -mcpu=mips64r2 -mattr=n64 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64R2-N64 %s
+# MIPS64EL-MIPS64R2-N64: Flags [ (0x80000000)
+
+# RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -mcpu=mips64 %s -mattr=n64 -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64-N64 %s
+# MIPS64EL-MIPS64-N64: Flags [ (0x60000000)
+
+# RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -mcpu=mips64r2 -mattr=-n64,o32 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64R2-O32 %s
+# MIPS64EL-MIPS64R2-O32: Flags [ (0x80001100)
+
+# RUN: llvm-mc -filetype=obj -triple mips64-unknown-linux -mcpu=mips4 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS4 %s
+# MIPS4: Flags [ (0x30000000)
+
+# RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -mcpu=mips64 %s -mattr=-n64,o32 -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64-O32 %s
+# MIPS64EL-MIPS64-O32: Flags [ (0x60001100)
+	
+# Default ABI for MIPS64 is N64 as opposed to GCC/GAS (N32)
+# RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -mcpu=mips64r2 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64R2 %s
+# MIPS64EL-MIPS64R2: Flags [ (0x80000000)
+
+# Default ABI for MIPS64 is N64 as opposed to GCC/GAS (N32)
+# RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -mcpu=mips64 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64 %s
+# MIPS64EL-MIPS64: Flags [ (0x60000000)
diff --git a/test/MC/Mips/elf_eflags_abicalls.s b/test/MC/Mips/elf_eflags_abicalls.s
new file mode 100644
index 0000000..5f39630
--- /dev/null
+++ b/test/MC/Mips/elf_eflags_abicalls.s
@@ -0,0 +1,6 @@
+# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips32 %s -o -| llvm-readobj -h | FileCheck %s
+
+# This *MUST* match the output of gas compiled with the same triple.
+# CHECK: Flags [ (0x50001006)
+
+.abicalls
diff --git a/test/MC/Mips/elf_eflags_micromips.s b/test/MC/Mips/elf_eflags_micromips.s
new file mode 100644
index 0000000..14bbcad
--- /dev/null
+++ b/test/MC/Mips/elf_eflags_micromips.s
@@ -0,0 +1,8 @@
+# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips32 %s -o -| llvm-readobj -h | FileCheck %s
+
+# This *MUST* match the output of gas compiled with the same triple.
+# CHECK: Flags [ (0x52001000)
+
+        .set micromips
+f:
+        nop
diff --git a/test/MC/Mips/elf_eflags_mips16.s b/test/MC/Mips/elf_eflags_mips16.s
new file mode 100644
index 0000000..deac3d4
--- /dev/null
+++ b/test/MC/Mips/elf_eflags_mips16.s
@@ -0,0 +1,8 @@
+# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips32 %s -o -| llvm-readobj -h | FileCheck %s
+
+# This *MUST* match the output of gas compiled with the same triple.
+# CHECK: Flags [ (0x54001000)
+
+        .set mips16
+f:
+        nop
diff --git a/test/MC/Mips/elf_eflags_noreorder.s b/test/MC/Mips/elf_eflags_noreorder.s
new file mode 100644
index 0000000..3fea18b
--- /dev/null
+++ b/test/MC/Mips/elf_eflags_noreorder.s
@@ -0,0 +1,6 @@
+# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips32 %s -o -| llvm-readobj -h | FileCheck %s
+
+# This *MUST* match the output of gas compiled with the same triple.
+# CHECK: Flags [ (0x50001001)
+
+.set noreorder
diff --git a/test/MC/Mips/elf_eflags_pic0.s b/test/MC/Mips/elf_eflags_pic0.s
new file mode 100644
index 0000000..a78ca03
--- /dev/null
+++ b/test/MC/Mips/elf_eflags_pic0.s
@@ -0,0 +1,7 @@
+# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips32 %s -o -| llvm-readobj -h | FileCheck %s
+
+# This *MUST* match the output of gas compiled with the same triple.
+# CHECK: Flags [ (0x50001004)
+
+.abicalls
+.option pic0
diff --git a/test/MC/Mips/elf_eflags_pic2.s b/test/MC/Mips/elf_eflags_pic2.s
new file mode 100644
index 0000000..a15208a
--- /dev/null
+++ b/test/MC/Mips/elf_eflags_pic2.s
@@ -0,0 +1,6 @@
+# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips32 %s -o -| llvm-readobj -h | FileCheck %s
+
+# This *MUST* match the output of gas compiled with the same triple.
+# CHECK: Flags [ (0x50001006)
+
+.option pic2
diff --git a/test/MC/Mips/elf_reginfo.s b/test/MC/Mips/elf_reginfo.s
new file mode 100644
index 0000000..5e9ddf8
--- /dev/null
+++ b/test/MC/Mips/elf_reginfo.s
@@ -0,0 +1,26 @@
+# These *MUST* match the output of gas compiled with the same triple and
+# corresponding options (-mabi=64 -> -mattr=+n64 for example).
+
+# RUN: llvm-mc -filetype=obj -triple=mips64el-linux -mattr=-n64,+n64 %s -o - \
+# RUN: | llvm-readobj -s | FileCheck --check-prefix=CHECK_64 %s
+# RUN: llvm-mc -filetype=obj -triple=mipsel %s -mattr=-o32,+n32 -o - \
+# RUN: | llvm-readobj -s | FileCheck --check-prefix=CHECK_32 %s
+
+# Check for register information sections.
+#
+
+# Check that the appropriate relocations were created.
+
+# check for .MIPS.options
+# CHECK_64:      Sections [
+# CHECK_64:        Section {
+# CHECK_64:          Name: .MIPS.options
+# CHECK_64-NEXT:     Type: SHT_MIPS_OPTIONS
+# CHECK_64-NEXT:     Flags [ (0x8000002)
+
+# check for .reginfo
+# CHECK_32:      Sections [
+# CHECK_32:        Section {
+# CHECK_32:          Name: .reginfo
+# CHECK_32-NEXT:     Type:  SHT_MIPS_REGINFO
+# CHECK_32-NEXT:     Flags [ (0x2)
diff --git a/test/MC/Mips/elf_st_other.ll b/test/MC/Mips/elf_st_other.ll
deleted file mode 100644
index 31294c8..0000000
--- a/test/MC/Mips/elf_st_other.ll
+++ /dev/null
@@ -1,11 +0,0 @@
-; This tests value of ELF st_other field for function symbol table entries.
-; For microMIPS value should be equal to STO_MIPS_MICROMIPS.
-
-; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32r2 -mattr=+micromips -print-hack-directives %s -o - | FileCheck %s
-
-define i32 @main() nounwind {
-entry:
-  ret i32 0
-}
-
-; CHECK:     .mips_hack_stocg main, 128
diff --git a/test/MC/Mips/elf_st_other.s b/test/MC/Mips/elf_st_other.s
index 2d63288..579707b 100644
--- a/test/MC/Mips/elf_st_other.s
+++ b/test/MC/Mips/elf_st_other.s
@@ -1,13 +1,26 @@
 // RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux %s -o -| llvm-readobj -t | FileCheck %s
 
-        .text
-        .globl  main
-        .align  2
-        .type   main,@function
-        .set    nomips16                # @main
-        .ent    main
-        .mips_hack_stocg main, 128
-main:
-
-// CHECK:     Name: main
-// CHECK:     Other: 128
+
+.globl f1
+.type f1, @function
+.set micromips
+f1:
+	nop
+
+.globl d1
+.type d1, @object
+d1:
+.word 42
+
+.globl f2
+.type f2, @function
+.set nomicromips
+f2:
+	nop
+
+// CHECK-LABEL: Name: d1
+// CHECK:       Other: 0
+// CHECK-LABEL: Name: f1
+// CHECK:       Other: 128
+// CHECK-LABEL: Name: f2
+// CHECK:       Other: 0
diff --git a/test/MC/Mips/higher-highest-addressing.s b/test/MC/Mips/higher-highest-addressing.s
new file mode 100644
index 0000000..2973a64
--- /dev/null
+++ b/test/MC/Mips/higher-highest-addressing.s
@@ -0,0 +1,54 @@
+# RUN: llvm-mc -filetype=obj -triple=mips64el-unknown-linux -mcpu=mips64r2 %s \
+# RUN:  | llvm-objdump -disassemble -triple mips64el - | FileCheck %s
+
+# RUN: llvm-mc -filetype=obj -triple=mips64el-unknown-linux -mcpu=mips64r2 %s \
+# RUN:  | llvm-readobj -r | FileCheck %s -check-prefix=CHECK-REL
+
+
+# Test that R_MIPS_HIGHER and R_MIPS_HIGHEST relocations are created.  By using
+# NEXT we also test that none of the expressions from the test2 generates
+# relocations.
+
+test1:
+# CHECK-LABEL:    test1:
+
+        lui     $5, %highest(func)
+        daddiu  $5, $5, %higher(func)
+
+# CHECK-REL:           Relocations [
+# CHECK-REL-NEXT:      {
+# CHECK-REL-NEXT:          0x{{[0-9,A-F]+}} R_MIPS_HIGHEST
+# CHECK-REL-NEXT:          0x{{[0-9,A-F]+}} R_MIPS_HIGHER
+# CHECK-REL-NEXT:      }
+
+
+# Test the calculation of %higher and %highest:
+# ((x + 0x80008000) >> 32) & 0xffff (higher)
+# ((x + 0x800080008000) >> 48) & 0xffff (highest).
+
+test2:
+# CHECK-LABEL:    test2:
+
+# Check the case where relocations are not modified by adding +1.  The constant
+# is chosen so that it is just below the value that triggers the addition of +1
+# to %higher.
+$L1:
+        lui     $6,    %highest($L2-$L1+0x300047FFF7FF7)
+        daddiu  $6, $6, %higher($L2-$L1+0x300047FFF7FF7)
+$L2:
+# CHECK:    lui      $6, 3
+# CHECK:    daddiu   $6, $6, 4
+
+
+# Check the case where %higher is modified by adding +1.
+        lui     $7, %highest($L2-$L1+0x300047FFF7FF8)
+        ld      $7, %higher ($L2-$L1+0x300047FFF7FF8)($7)
+# CHECK:    lui     $7, 3
+# CHECK:    ld      $7, 5($7)
+
+
+# Check the case where both %higher and %highest are modified by adding +1.
+        lui     $8, %highest(0x37FFF7FFF8000)
+        ld      $8, %higher (0x37FFF7FFF8000)($8)
+# CHECK:    lui     $8, 4
+# CHECK:    ld      $8, -32768($8)
diff --git a/test/MC/Mips/higher_highest.ll b/test/MC/Mips/higher_highest.ll
deleted file mode 100644
index 6c3d71f..0000000
--- a/test/MC/Mips/higher_highest.ll
+++ /dev/null
@@ -1,32 +0,0 @@
-; DISABLE: llc -march=mips64el -mcpu=mips64 -mattr=n64  -force-mips-long-branch -filetype=obj < %s -o - | llvm-readobj -r | FileCheck %s
-; RUN: false
-; XFAIL: *
-; Disabled because currently we don't have a way to generate these relocations.
-;
-; Check that the R_MIPS_HIGHER and R_MIPS_HIGHEST relocations were created.
-
-; CHECK: Relocations [
-; CHECK:     0x{{[0-9,A-F]+}} R_MIPS_HIGHEST
-; CHECK:     0x{{[0-9,A-F]+}} R_MIPS_HIGHEST
-; CHECK:     0x{{[0-9,A-F]+}} R_MIPS_HIGHER
-; CHECK:     0x{{[0-9,A-F]+}} R_MIPS_HIGHER
-; CHECK: ]
-
-@g0 = external global i32
-
-define void @foo1(i32 %s) nounwind {
-entry:
-
-  %tobool = icmp eq i32 %s, 0
-  br i1 %tobool, label %if.end, label %if.then
-
-if.then:                                          ; preds = %entry
-  %0 = load i32* @g0, align 4
-  %add = add nsw i32 %0, 12
-  store i32 %add, i32* @g0, align 4
-  br label %if.end
-
-if.end:                                           ; preds = %entry, %if.then
-  ret void
-}
-
diff --git a/test/MC/Mips/hilo-addressing.s b/test/MC/Mips/hilo-addressing.s
index 28459c2..720c7e2 100644
--- a/test/MC/Mips/hilo-addressing.s
+++ b/test/MC/Mips/hilo-addressing.s
@@ -1,11 +1,42 @@
-# RUN: llvm-mc -show-encoding -triple mips-unknown-unknown %s | FileCheck %s
-
-  .ent hilo_test
-     .equ    addr, 0xdeadbeef
-# CHECK: # encoding: [0x3c,0x04,0xde,0xae]
-    lui $4,%hi(addr)
-# CHECK: # encoding: [0x03,0xe0,0x00,0x08]
-    jr  $31
-# CHECK: # encoding: [0x80,0x82,0xbe,0xef]
-    lb  $2,%lo(addr)($4)
-    .end hilo_test
+# RUN: llvm-mc -show-encoding -triple mips-unknown-unknown %s \
+# RUN:  | FileCheck %s -check-prefix=CHECK-ENC
+
+# RUN: llvm-mc -filetype=obj -triple=mipsel-unknown-linux %s \
+# RUN:  | llvm-objdump -disassemble - | FileCheck %s -check-prefix=CHECK-INSTR
+
+# RUN: llvm-mc -filetype=obj -triple=mipsel-unknown-linux %s \
+# RUN:  | llvm-readobj -r | FileCheck %s -check-prefix=CHECK-REL
+
+
+# Check that 1 is added to the high 16 bits if bit 15 of the low part is 1.
+
+        .equ    addr, 0xdeadbeef
+        lui     $4, %hi(addr)
+        lb      $2, %lo(addr)($4)
+# CHECK-ENC: # encoding: [0x3c,0x04,0xde,0xae]
+# CHECK-ENC: # encoding: [0x80,0x82,0xbe,0xef]
+
+
+# Check that assembler can handle %hi(label1 - label2) and %lo(label1 - label2)
+# expressions.
+
+$L1:
+        # Emit zeros so that difference between $L3 and $L1 is 0x30124 bytes.
+        .fill 0x30124-8
+$L2:
+        lui     $4, %hi($L3-$L1)
+        addiu   $4, $4, %lo($L3-$L1)
+# CHECK-INSTR:    lui     $4, 3
+# CHECK-INSTR:    addiu   $4, $4, 292
+
+$L3:
+        lui     $5, %hi($L2-$L3)
+        lw      $5, %lo($L2-$L3)($5)
+# CHECK-INSTR:    lui     $5, 0
+# CHECK-INSTR:    lw      $5, -8($5)
+
+
+# Check that relocation isn't emitted for %hi(label1 - label2) and
+# %lo(label1 - label2) expressions.
+
+# CHECK-REL-NOT:    R_MIPS
diff --git a/test/MC/Mips/lea_64.ll b/test/MC/Mips/lea_64.ll
deleted file mode 100644
index 2e7a37b..0000000
--- a/test/MC/Mips/lea_64.ll
+++ /dev/null
@@ -1,18 +0,0 @@
-; RUN: llc -march=mips64el -filetype=obj -mcpu=mips64r2 %s -o - \
-; RUN:  | llvm-objdump -disassemble -triple mips64el - \
-; RUN:  | FileCheck %s
-
-@p = external global i32*
-
-define void @f1() nounwind {
-entry:
-; CHECK: .text:
-; CHECK-NOT: addiu {{[0-9,a-f]+}}, {{[0-9,a-f]+}}, {{[0-9]+}}
-
-  %a = alloca [10 x i32], align 4
-  %arraydecay = getelementptr inbounds [10 x i32]* %a, i64 0, i64 0
-  store i32* %arraydecay, i32** @p, align 8
-  ret void
-
-; CHECK: jr $ra
-}
diff --git a/test/MC/Mips/micromips-16-bit-instructions.s b/test/MC/Mips/micromips-16-bit-instructions.s
new file mode 100644
index 0000000..31bddcc
--- /dev/null
+++ b/test/MC/Mips/micromips-16-bit-instructions.s
@@ -0,0 +1,27 @@
+# RUN: llvm-mc %s -triple=mipsel -show-encoding -mattr=micromips | \
+# RUN: FileCheck -check-prefix=CHECK-EL %s
+# RUN: llvm-mc %s -triple=mips -show-encoding -mattr=micromips | \
+# RUN: FileCheck -check-prefix=CHECK-EB %s
+# Check that the assembler can handle the documented syntax
+# for arithmetic and logical instructions.
+#------------------------------------------------------------------------------
+# MicroMIPS 16-bit Instructions
+#------------------------------------------------------------------------------
+# Little endian
+#------------------------------------------------------------------------------
+# CHECK-EL: mfhi    $9              # encoding: [0x09,0x46]
+# CHECK-EL: mflo    $9              # encoding: [0x49,0x46]
+# CHECK-EL: move    $25, $1         # encoding: [0x21,0x0f]
+# CHECK-EL: jalr    $9              # encoding: [0xc9,0x45]
+#------------------------------------------------------------------------------
+# Big endian
+#------------------------------------------------------------------------------
+# CHECK-EB: mfhi    $9              # encoding: [0x46,0x09]
+# CHECK-EB: mflo    $9              # encoding: [0x46,0x49]
+# CHECK-EB: move    $25, $1         # encoding: [0x0f,0x21]
+# CHECK-EB: jalr    $9              # encoding: [0x45,0xc9]
+
+    mfhi    $9
+    mflo    $9
+    move    $25, $1
+    jalr    $9
diff --git a/test/MC/Mips/micromips-alias.s b/test/MC/Mips/micromips-alias.s
new file mode 100644
index 0000000..c0bf4b3
--- /dev/null
+++ b/test/MC/Mips/micromips-alias.s
@@ -0,0 +1,16 @@
+# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips32 %s -o - \
+# RUN:   | llvm-readobj -t | FileCheck %s
+
+# Symbol bar must be marked as micromips.
+# CHECK: Name: bar
+# CHECK: Other: 128
+  .align 2
+  .type  f,@function
+  .set   nomips16
+  .set   micromips
+f:
+  nop
+  .set   nomicromips
+  nop
+  .globl bar
+bar = f
diff --git a/test/MC/Mips/micromips-alu-instructions.s b/test/MC/Mips/micromips-alu-instructions.s
index 276a83e..1131d1f 100644
--- a/test/MC/Mips/micromips-alu-instructions.s
+++ b/test/MC/Mips/micromips-alu-instructions.s
@@ -17,7 +17,6 @@
 # CHECK-EL: subu  $4, $3, $5      # encoding: [0xa3,0x00,0xd0,0x21]
 # CHECK-EL: neg   $6, $7          # encoding: [0xe0,0x00,0x90,0x31]
 # CHECK-EL: negu  $6, $7          # encoding: [0xe0,0x00,0xd0,0x31]
-# CHECK-EL: move  $7, $8          # encoding: [0x08,0x00,0x50,0x39]
 # CHECK-EL: slt    $3, $3, $5     # encoding: [0xa3,0x00,0x50,0x1b]
 # CHECK-EL: slti   $3, $3, 103    # encoding: [0x63,0x90,0x67,0x00]
 # CHECK-EL: slti   $3, $3, 103    # encoding: [0x63,0x90,0x67,0x00]
@@ -52,7 +51,6 @@
 # CHECK-EB: subu  $4, $3, $5      # encoding: [0x00,0xa3,0x21,0xd0]
 # CHECK-EB: neg $6, $7            # encoding: [0x00,0xe0,0x31,0x90]
 # CHECK-EB: negu  $6, $7          # encoding: [0x00,0xe0,0x31,0xd0]
-# CHECK-EB: move  $7, $8          # encoding: [0x00,0x08,0x39,0x50]
 # CHECK-EB: slt $3, $3, $5        # encoding: [0x00,0xa3,0x1b,0x50]
 # CHECK-EB: slti  $3, $3, 103     # encoding: [0x90,0x63,0x00,0x67]
 # CHECK-EB: slti  $3, $3, 103     # encoding: [0x90,0x63,0x00,0x67]
diff --git a/test/MC/Mips/micromips-bad-branches.s b/test/MC/Mips/micromips-bad-branches.s
new file mode 100644
index 0000000..573605e
--- /dev/null
+++ b/test/MC/Mips/micromips-bad-branches.s
@@ -0,0 +1,225 @@
+# RUN: not llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 -mattr=+msa -arch=mips -mattr=+micromips 2>&1  | FileCheck %s
+#
+# CHECK: error: branch to misaligned address
+# CHECK:        b -65535
+# CHECK: error: branch target out of range
+# CHECK:        b -65537
+# CHECK: error: branch to misaligned address
+# CHECK:        b 65535
+# CHECK: error: branch target out of range
+# CHECK:        b 65536
+
+# CHECK: error: branch to misaligned address
+# CHECK:        beq $1, $1, -65535
+# CHECK: error: branch target out of range
+# CHECK:        beq $1, $1, -65537
+# CHECK: error: branch to misaligned address
+# CHECK:        beq $1, $1, 65535
+# CHECK: error: branch target out of range
+# CHECK:        beq $1, $1, 65536
+
+# CHECK: error: branch to misaligned address
+# CHECK:        bne $1, $1, -65535
+# CHECK: error: branch target out of range
+# CHECK:        bne $1, $1, -65537
+# CHECK: error: branch to misaligned address
+# CHECK:        bne $1, $1, 65535
+# CHECK: error: branch target out of range
+# CHECK:        bne $1, $1, 65536
+
+# CHECK: error: branch to misaligned address
+# CHECK:        bal -65535
+# CHECK: error: branch target out of range
+# CHECK:        bal -65537
+# CHECK: error: branch to misaligned address
+# CHECK:        bal 65535
+# CHECK: error: branch target out of range
+# CHECK:        bal 65536
+
+# CHECK: error: branch to misaligned address
+# CHECK:        bgez $1, -65535
+# CHECK: error: branch target out of range
+# CHECK:        bgez $1, -65537
+# CHECK: error: branch to misaligned address
+# CHECK:        bgez $1, 65535
+# CHECK: error: branch target out of range
+# CHECK:        bgez $1, 65536
+
+# CHECK: error: branch to misaligned address
+# CHECK:        bgtz $1, -65535
+# CHECK: error: branch target out of range
+# CHECK:        bgtz $1, -65537
+# CHECK: error: branch to misaligned address
+# CHECK:        bgtz $1, 65535
+# CHECK: error: branch target out of range
+# CHECK:        bgtz $1, 65536
+
+# CHECK: error: branch to misaligned address
+# CHECK:        blez $1, -65535
+# CHECK: error: branch target out of range
+# CHECK:        blez $1, -65537
+# CHECK: error: branch to misaligned address
+# CHECK:        blez $1, 65535
+# CHECK: error: branch target out of range
+# CHECK:        blez $1, 65536
+
+# CHECK: error: branch to misaligned address
+# CHECK:        bltz $1, -65535
+# CHECK: error: branch target out of range
+# CHECK:        bltz $1, -65537
+# CHECK: error: branch to misaligned address
+# CHECK:        bltz $1, 65535
+# CHECK: error: branch target out of range
+# CHECK:        bltz $1, 65536
+
+# CHECK: error: branch to misaligned address
+# CHECK:        bgezal $1, -65535
+# CHECK: error: branch target out of range
+# CHECK:        bgezal $1, -65537
+# CHECK: error: branch to misaligned address
+# CHECK:        bgezal $1, 65535
+# CHECK: error: branch target out of range
+# CHECK:        bgezal $1, 65536
+
+# CHECK: error: branch to misaligned address
+# CHECK:        bltzal $1, -65535
+# CHECK: error: branch target out of range
+# CHECK:        bltzal $1, -65537
+# CHECK: error: branch to misaligned address
+# CHECK:        bltzal $1, 65535
+# CHECK: error: branch target out of range
+# CHECK:        bltzal $1, 65536
+
+# CHECK: error: branch to misaligned address
+# CHECK:        bc1f -65535
+# CHECK: error: branch target out of range
+# CHECK:        bc1f -65537
+# CHECK: error: branch to misaligned address
+# CHECK:        bc1f 65535
+# CHECK: error: branch target out of range
+# CHECK:        bc1f 65536
+
+# CHECK: error: branch to misaligned address
+# CHECK:        bc1f $fcc0, -65535
+# CHECK: error: branch target out of range
+# CHECK:        bc1f $fcc0, -65537
+# CHECK: error: branch to misaligned address
+# CHECK:        bc1f $fcc0, 65535
+# CHECK: error: branch target out of range
+# CHECK:        bc1f $fcc0, 65536
+
+# CHECK: error: branch to misaligned address
+# CHECK:        bc1t -65535
+# CHECK: error: branch target out of range
+# CHECK:        bc1t -65537
+# CHECK: error: branch to misaligned address
+# CHECK:        bc1t 65535
+# CHECK: error: branch target out of range
+# CHECK:        bc1t 65536
+
+# CHECK: error: branch to misaligned address
+# CHECK:        bc1t $fcc0, -65535
+# CHECK: error: branch target out of range
+# CHECK:        bc1t $fcc0, -65537
+# CHECK: error: branch to misaligned address
+# CHECK:        bc1t $fcc0, 65535
+# CHECK: error: branch target out of range
+# CHECK:        bc1t $fcc0, 65536
+
+        b -65535
+        b -65536
+        b -65537
+        b 65534
+        b 65535
+        b 65536
+
+        beq $1, $1, -65535
+        beq $1, $1, -65536
+        beq $1, $1, -65537
+        beq $1, $1, 65534
+        beq $1, $1, 65535
+        beq $1, $1, 65536
+
+        bne $1, $1, -65535
+        bne $1, $1, -65536
+        bne $1, $1, -65537
+        bne $1, $1, 65534
+        bne $1, $1, 65535
+        bne $1, $1, 65536
+
+        bal -65535
+        bal -65536
+        bal -65537
+        bal 65534
+        bal 65535
+        bal 65536
+
+        bgez $1, -65535
+        bgez $1, -65536
+        bgez $1, -65537
+        bgez $1, 65534
+        bgez $1, 65535
+        bgez $1, 65536
+
+        bgtz $1, -65535
+        bgtz $1, -65536
+        bgtz $1, -65537
+        bgtz $1, 65534
+        bgtz $1, 65535
+        bgtz $1, 65536
+
+        blez $1, -65535
+        blez $1, -65536
+        blez $1, -65537
+        blez $1, 65534
+        blez $1, 65535
+        blez $1, 65536
+
+        bltz $1, -65535
+        bltz $1, -65536
+        bltz $1, -65537
+        bltz $1, 65534
+        bltz $1, 65535
+        bltz $1, 65536
+
+        bgezal $1, -65535
+        bgezal $1, -65536
+        bgezal $1, -65537
+        bgezal $1, 65534
+        bgezal $1, 65535
+        bgezal $1, 65536
+
+        bltzal $1, -65535
+        bltzal $1, -65536
+        bltzal $1, -65537
+        bltzal $1, 65534
+        bltzal $1, 65535
+        bltzal $1, 65536
+
+        bc1f -65535
+        bc1f -65536
+        bc1f -65537
+        bc1f 65534
+        bc1f 65535
+        bc1f 65536
+
+        bc1f $fcc0, -65535
+        bc1f $fcc0, -65536
+        bc1f $fcc0, -65537
+        bc1f $fcc0, 65534
+        bc1f $fcc0, 65535
+        bc1f $fcc0, 65536
+
+        bc1t -65535
+        bc1t -65536
+        bc1t -65537
+        bc1t 65534
+        bc1t 65535
+        bc1t 65536
+
+        bc1t $fcc0, -65535
+        bc1t $fcc0, -65536
+        bc1t $fcc0, -65537
+        bc1t $fcc0, 65534
+        bc1t $fcc0, 65535
+        bc1t $fcc0, 65536
diff --git a/test/MC/Mips/micromips-control-instructions.s b/test/MC/Mips/micromips-control-instructions.s
new file mode 100644
index 0000000..8170a9c
--- /dev/null
+++ b/test/MC/Mips/micromips-control-instructions.s
@@ -0,0 +1,60 @@
+# RUN: llvm-mc %s -triple=mipsel -show-encoding -mattr=micromips \
+# RUN: | FileCheck -check-prefix=CHECK-EL %s
+# RUN: llvm-mc %s -triple=mips -show-encoding -mattr=micromips \
+# RUN: | FileCheck -check-prefix=CHECK-EB %s
+# Check that the assembler can handle the documented syntax
+# for control instructions.
+#------------------------------------------------------------------------------
+# microMIPS Control Instructions
+#------------------------------------------------------------------------------
+# Little endian
+#------------------------------------------------------------------------------
+# CHECK-EL:    break                      # encoding: [0x00,0x00,0x07,0x00]
+# CHECK-EL:    break 7, 0                 # encoding: [0x07,0x00,0x07,0x00]
+# CHECK-EL:    break 7, 5                 # encoding: [0x07,0x00,0x47,0x01]
+# CHECK-EL:    syscall                    # encoding: [0x00,0x00,0x7c,0x8b]
+# CHECK-EL:    syscall 396                # encoding: [0x8c,0x01,0x7c,0x8b]
+# CHECK-EL:    eret                       # encoding: [0x00,0x00,0x7c,0xf3]
+# CHECK-EL:    deret                      # encoding: [0x00,0x00,0x7c,0xe3]
+# CHECK-EL:    di                         # encoding: [0x00,0x00,0x7c,0x47]
+# CHECK-EL:    di                         # encoding: [0x00,0x00,0x7c,0x47]
+# CHECK-EL:    di  $10                    # encoding: [0x0a,0x00,0x7c,0x47]
+# CHECK-EL:    ei                         # encoding: [0x00,0x00,0x7c,0x57]
+# CHECK-EL:    ei                         # encoding: [0x00,0x00,0x7c,0x57]
+# CHECK-EL:    ei  $10                    # encoding: [0x0a,0x00,0x7c,0x57]
+# CHECK-EL:    wait                       # encoding: [0x00,0x00,0x7c,0x93]
+# CHECK-EL:    wait 17                    # encoding: [0x11,0x00,0x7c,0x93]
+#------------------------------------------------------------------------------
+# Big endian
+#------------------------------------------------------------------------------
+# CHECK-EB:   break                       # encoding: [0x00,0x00,0x00,0x07]
+# CHECK-EB:   break 7, 0                  # encoding: [0x00,0x07,0x00,0x07]
+# CHECK-EB:   break 7, 5                  # encoding: [0x00,0x07,0x01,0x47]
+# CHECK-EB:   syscall                     # encoding: [0x00,0x00,0x8b,0x7c]
+# CHECK-EB:   syscall 396                 # encoding: [0x01,0x8c,0x8b,0x7c]
+# CHECK-EB:   eret                        # encoding: [0x00,0x00,0xf3,0x7c]
+# CHECK-EB:   deret                       # encoding: [0x00,0x00,0xe3,0x7c]
+# CHECK-EB:   di                          # encoding: [0x00,0x00,0x47,0x7c]
+# CHECK-EB:   di                          # encoding: [0x00,0x00,0x47,0x7c]
+# CHECK-EB:   di  $10                     # encoding: [0x00,0x0a,0x47,0x7c]
+# CHECK-EB:   ei                          # encoding: [0x00,0x00,0x57,0x7c]
+# CHECK-EB:   ei                          # encoding: [0x00,0x00,0x57,0x7c]
+# CHECK-EB:   ei  $10                     # encoding: [0x00,0x0a,0x57,0x7c]
+# CHECK-EB:   wait                        # encoding: [0x00,0x00,0x93,0x7c]
+# CHECK-EB:   wait 17                     # encoding: [0x00,0x11,0x93,0x7c]
+
+    break
+    break 7
+    break 7,5
+    syscall
+    syscall 0x18c
+    eret
+    deret
+    di
+    di $0
+    di $10
+    ei
+    ei $0
+    ei $10
+    wait
+    wait 17
diff --git a/test/MC/Mips/micromips-diagnostic-fixup.s b/test/MC/Mips/micromips-diagnostic-fixup.s
new file mode 100644
index 0000000..f8fe447
--- /dev/null
+++ b/test/MC/Mips/micromips-diagnostic-fixup.s
@@ -0,0 +1,10 @@
+# RUN: not llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 -arch=mips -mattr=+micromips 2>&1 -filetype=obj | FileCheck %s
+#
+# CHECK: LLVM ERROR: out of range PC16 fixup
+
+.text
+  b foo
+  .space 65536 - 8, 1   # -8 = size of b instr plus size of automatically inserted nop
+  nop                   # This instr makes the branch too long to fit into a 17-bit offset
+foo:
+  add $0,$0,$0
diff --git a/test/MC/Mips/micromips-el-fixup-data.s b/test/MC/Mips/micromips-el-fixup-data.s
new file mode 100644
index 0000000..2293f63
--- /dev/null
+++ b/test/MC/Mips/micromips-el-fixup-data.s
@@ -0,0 +1,25 @@
+# RUN: llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 \
+# RUN:   -mattr=+micromips 2>&1 -filetype=obj > %t.o
+# RUN: llvm-objdump %t.o -triple mipsel -mattr=+micromips -d | FileCheck %s
+
+# Check that fixup data is writen in the microMIPS specific little endian
+# byte order.
+
+    .text
+    .globl  main
+    .align  2
+    .type   main,@function
+    .set    micromips
+    .set    nomips16
+    .ent    main
+main:
+    addiu   $sp, $sp, -16
+    bnez    $9, lab1
+
+# CHECK:    09 b4 04 00    bne $9, $zero, 8
+
+    addu    $zero, $zero, $zero
+lab1:
+    jr  $ra
+    addiu   $sp, $sp, 16
+    .end    main
diff --git a/test/MC/Mips/micromips-fpu-instructions.s b/test/MC/Mips/micromips-fpu-instructions.s
new file mode 100644
index 0000000..5af4f98
--- /dev/null
+++ b/test/MC/Mips/micromips-fpu-instructions.s
@@ -0,0 +1,193 @@
+# RUN: llvm-mc %s -triple=mipsel -show-encoding -mattr=micromips \
+# RUN: -mcpu=mips32r2 | FileCheck -check-prefix=CHECK-EL %s
+# RUN: llvm-mc %s -triple=mips -show-encoding -mattr=micromips \
+# RUN: -mcpu=mips32r2 | FileCheck -check-prefix=CHECK-EB %s
+# Check that the assembler can handle the documented syntax
+# for fpu instructions
+#------------------------------------------------------------------------------
+# FPU Instructions
+#------------------------------------------------------------------------------
+# Little endian
+#------------------------------------------------------------------------------
+# CHECK-EL: add.s      $f4, $f6, $f8    # encoding: [0x06,0x55,0x30,0x20]
+# CHECK-EL: add.d      $f4, $f6, $f8    # encoding: [0x06,0x55,0x30,0x21]
+# CHECK-EL: div.s      $f4, $f6, $f8    # encoding: [0x06,0x55,0xf0,0x20]
+# CHECK-EL: div.d      $f4, $f6, $f8    # encoding: [0x06,0x55,0xf0,0x21]
+# CHECK-EL: mul.s      $f4, $f6, $f8    # encoding: [0x06,0x55,0xb0,0x20]
+# CHECK-EL: mul.d      $f4, $f6, $f8    # encoding: [0x06,0x55,0xb0,0x21]
+# CHECK-EL: sub.s      $f4, $f6, $f8    # encoding: [0x06,0x55,0x70,0x20]
+# CHECK-EL: sub.d      $f4, $f6, $f8    # encoding: [0x06,0x55,0x70,0x21]
+# CHECK-EL: lwc1       $f2, 4($6)       # encoding: [0x46,0x9c,0x04,0x00]
+# CHECK-EL: ldc1       $f2, 4($6)       # encoding: [0x46,0xbc,0x04,0x00]
+# CHECK-EL: swc1       $f2, 4($6)       # encoding: [0x46,0x98,0x04,0x00]
+# CHECK-EL: sdc1       $f2, 4($6)       # encoding: [0x46,0xb8,0x04,0x00]
+# CHECK-EL: bc1f       1332             # encoding: [0x80,0x43,0x9a,0x02]
+# CHECK-EL: nop                         # encoding: [0x00,0x00,0x00,0x00]
+# CHECK-EL: bc1t       1332             # encoding: [0xa0,0x43,0x9a,0x02]
+# CHECK-EL: nop                         # encoding: [0x00,0x00,0x00,0x00]
+# CHECK-EL: luxc1      $f2, $4($6)      # encoding: [0x86,0x54,0x48,0x11]
+# CHECK-EL: suxc1      $f2, $4($6)      # encoding: [0x86,0x54,0x88,0x11]
+# CHECK-EL: ceil.w.s   $f6, $f8         # encoding: [0xc8,0x54,0x3b,0x1b]
+# CHECK-EL: ceil.w.d   $f6, $f8         # encoding: [0xc8,0x54,0x3b,0x5b]
+# CHECK-EL: cvt.w.s    $f6, $f8         # encoding: [0xc8,0x54,0x3b,0x09]
+# CHECK-EL: cvt.w.d    $f6, $f8         # encoding: [0xc8,0x54,0x3b,0x49]
+# CHECK-EL: floor.w.s  $f6, $f8         # encoding: [0xc8,0x54,0x3b,0x0b]
+# CHECK-EL: floor.w.d  $f6, $f8         # encoding: [0xc8,0x54,0x3b,0x4b]
+# CHECK-EL: round.w.s  $f6, $f8         # encoding: [0xc8,0x54,0x3b,0x3b]
+# CHECK-EL: round.w.d  $f6, $f8         # encoding: [0xc8,0x54,0x3b,0x7b]
+# CHECK-EL: sqrt.s     $f6, $f8         # encoding: [0xc8,0x54,0x3b,0x0a]
+# CHECK-EL: sqrt.d     $f6, $f8         # encoding: [0xc8,0x54,0x3b,0x4a]
+# CHECK-EL: trunc.w.s  $f6, $f8         # encoding: [0xc8,0x54,0x3b,0x2b]
+# CHECK-EL: trunc.w.d  $f6, $f8         # encoding: [0xc8,0x54,0x3b,0x6b]
+# CHECK-EL: abs.s      $f6, $f8         # encoding: [0xc8,0x54,0x7b,0x03]
+# CHECK-EL: abs.d      $f6, $f8         # encoding: [0xc8,0x54,0x7b,0x23]
+# CHECK-EL: mov.s      $f6, $f8         # encoding: [0xc8,0x54,0x7b,0x00]
+# CHECK-EL: mov.d      $f6, $f8         # encoding: [0xc8,0x54,0x7b,0x20]
+# CHECK-EL: neg.s      $f6, $f8         # encoding: [0xc8,0x54,0x7b,0x0b]
+# CHECK-EL: neg.d      $f6, $f8         # encoding: [0xc8,0x54,0x7b,0x2b]
+# CHECK-EL: cvt.d.s    $f6, $f8         # encoding: [0xc8,0x54,0x7b,0x13]
+# CHECK-EL: cvt.d.w    $f6, $f8         # encoding: [0xc8,0x54,0x7b,0x33]
+# CHECK-EL: cvt.s.d    $f6, $f8         # encoding: [0xc8,0x54,0x7b,0x1b]
+# CHECK-EL: cvt.s.w    $f6, $f8         # encoding: [0xc8,0x54,0x7b,0x3b]
+# CHECK-EL: cfc1    $6, $0              # encoding: [0xc0,0x54,0x3b,0x10]
+# CHECK-EL: ctc1    $6, $0              # encoding: [0xc0,0x54,0x3b,0x18]
+# CHECK-EL: mfc1    $6, $f8             # encoding: [0xc8,0x54,0x3b,0x20]
+# CHECK-EL: mtc1    $6, $f8             # encoding: [0xc8,0x54,0x3b,0x28]
+# CHECK-EL: movz.s  $f4, $f6, $7        # encoding: [0xe6,0x54,0x78,0x20]
+# CHECK-EL: movz.d  $f4, $f6, $7        # encoding: [0xe6,0x54,0x78,0x21]
+# CHECK-EL: movn.s  $f4, $f6, $7        # encoding: [0xe6,0x54,0x38,0x20]
+# CHECK-EL: movn.d  $f4, $f6, $7        # encoding: [0xe6,0x54,0x38,0x21]
+# CHECK-EL: movt.s  $f4, $f6, $fcc0     # encoding: [0x86,0x54,0x60,0x00]
+# CHECK-EL: movt.d  $f4, $f6, $fcc0     # encoding: [0x86,0x54,0x60,0x02]
+# CHECK-EL: movf.s  $f4, $f6, $fcc0     # encoding: [0x86,0x54,0x20,0x00]
+# CHECK-EL: movf.d  $f4, $f6, $fcc0     # encoding: [0x86,0x54,0x20,0x02]
+# CHECK-EL: madd.s  $f2, $f4, $f6, $f8  # encoding: [0x06,0x55,0x01,0x11]
+# CHECK-EL: madd.d  $f2, $f4, $f6, $f8  # encoding: [0x06,0x55,0x09,0x11]
+# CHECK-EL: msub.s  $f2, $f4, $f6, $f8  # encoding: [0x06,0x55,0x21,0x11]
+# CHECK-EL: msub.d  $f2, $f4, $f6, $f8  # encoding: [0x06,0x55,0x29,0x11]
+# CHECK-EL: nmadd.s $f2, $f4, $f6, $f8  # encoding: [0x06,0x55,0x02,0x11]
+# CHECK-EL: nmadd.d $f2, $f4, $f6, $f8  # encoding: [0x06,0x55,0x0a,0x11]
+# CHECK-EL: nmsub.s $f2, $f4, $f6, $f8  # encoding: [0x06,0x55,0x22,0x11]
+# CHECK-EL: nmsub.d $f2, $f4, $f6, $f8  # encoding: [0x06,0x55,0x2a,0x11]
+#------------------------------------------------------------------------------
+# Big endian
+#------------------------------------------------------------------------------
+# CHECK-EB: add.s $f4, $f6, $f8         # encoding: [0x55,0x06,0x20,0x30]
+# CHECK-EB: add.d $f4, $f6, $f8         # encoding: [0x55,0x06,0x21,0x30]
+# CHECK-EB: div.s $f4, $f6, $f8         # encoding: [0x55,0x06,0x20,0xf0]
+# CHECK-EB: div.d $f4, $f6, $f8         # encoding: [0x55,0x06,0x21,0xf0]
+# CHECK-EB: mul.s $f4, $f6, $f8         # encoding: [0x55,0x06,0x20,0xb0]
+# CHECK-EB: mul.d $f4, $f6, $f8         # encoding: [0x55,0x06,0x21,0xb0]
+# CHECK-EB: sub.s $f4, $f6, $f8         # encoding: [0x55,0x06,0x20,0x70]
+# CHECK-EB: sub.d $f4, $f6, $f8         # encoding: [0x55,0x06,0x21,0x70]
+# CHECK-EB: lwc1  $f2, 4($6)            # encoding: [0x9c,0x46,0x00,0x04]
+# CHECK-EB: ldc1  $f2, 4($6)            # encoding: [0xbc,0x46,0x00,0x04]
+# CHECK-EB: swc1  $f2, 4($6)            # encoding: [0x98,0x46,0x00,0x04]
+# CHECK-EB: sdc1  $f2, 4($6)            # encoding: [0xb8,0x46,0x00,0x04]
+# CHECK-EB: bc1f  1332                  # encoding: [0x43,0x80,0x02,0x9a]
+# CHECK-EB: nop                         # encoding: [0x00,0x00,0x00,0x00]
+# CHECK-EB: bc1t  1332                  # encoding: [0x43,0xa0,0x02,0x9a]
+# CHECK-EB: nop                         # encoding: [0x00,0x00,0x00,0x00]
+# CHECK-EB: luxc1 $f2, $4($6)           # encoding: [0x54,0x86,0x11,0x48]
+# CHECK-EB: suxc1 $f2, $4($6)           # encoding: [0x54,0x86,0x11,0x88]
+# CHECK-EB: ceil.w.s  $f6, $f8          # encoding: [0x54,0xc8,0x1b,0x3b]
+# CHECK-EB: ceil.w.d  $f6, $f8          # encoding: [0x54,0xc8,0x5b,0x3b]
+# CHECK-EB: cvt.w.s   $f6, $f8          # encoding: [0x54,0xc8,0x09,0x3b]
+# CHECK-EB: cvt.w.d   $f6, $f8          # encoding: [0x54,0xc8,0x49,0x3b]
+# CHECK-EB: floor.w.s $f6, $f8          # encoding: [0x54,0xc8,0x0b,0x3b]
+# CHECK-EB: floor.w.d $f6, $f8          # encoding: [0x54,0xc8,0x4b,0x3b]
+# CHECK-EB: round.w.s $f6, $f8          # encoding: [0x54,0xc8,0x3b,0x3b]
+# CHECK-EB: round.w.d $f6, $f8          # encoding: [0x54,0xc8,0x7b,0x3b]
+# CHECK-EB: sqrt.s    $f6, $f8          # encoding: [0x54,0xc8,0x0a,0x3b]
+# CHECK-EB: sqrt.d    $f6, $f8          # encoding: [0x54,0xc8,0x4a,0x3b]
+# CHECK-EB: trunc.w.s $f6, $f8          # encoding: [0x54,0xc8,0x2b,0x3b]
+# CHECK-EB: trunc.w.d $f6, $f8          # encoding: [0x54,0xc8,0x6b,0x3b]
+# CHECK-EB: abs.s $f6, $f8              # encoding: [0x54,0xc8,0x03,0x7b]
+# CHECK-EB: abs.d $f6, $f8              # encoding: [0x54,0xc8,0x23,0x7b]
+# CHECK-EB: mov.s $f6, $f8              # encoding: [0x54,0xc8,0x00,0x7b]
+# CHECK-EB: mov.d $f6, $f8              # encoding: [0x54,0xc8,0x20,0x7b]
+# CHECK-EB: neg.s $f6, $f8              # encoding: [0x54,0xc8,0x0b,0x7b]
+# CHECK-EB: neg.d $f6, $f8              # encoding: [0x54,0xc8,0x2b,0x7b]
+# CHECK-EB: cvt.d.s $f6, $f8            # encoding: [0x54,0xc8,0x13,0x7b]
+# CHECK-EB: cvt.d.w $f6, $f8            # encoding: [0x54,0xc8,0x33,0x7b]
+# CHECK-EB: cvt.s.d $f6, $f8            # encoding: [0x54,0xc8,0x1b,0x7b]
+# CHECK-EB: cvt.s.w $f6, $f8            # encoding: [0x54,0xc8,0x3b,0x7b]
+# CHECK-EB: cfc1    $6, $0              # encoding: [0x54,0xc0,0x10,0x3b]
+# CHECK-EB: ctc1    $6, $0              # encoding: [0x54,0xc0,0x18,0x3b]
+# CHECK-EB: mfc1    $6, $f8             # encoding: [0x54,0xc8,0x20,0x3b]
+# CHECK-EB: mtc1    $6, $f8             # encoding: [0x54,0xc8,0x28,0x3b]
+# CHECK-EB: movz.s  $f4, $f6, $7        # encoding: [0x54,0xe6,0x20,0x78]
+# CHECK-EB: movz.d  $f4, $f6, $7        # encoding: [0x54,0xe6,0x21,0x78]
+# CHECK-EB: movn.s  $f4, $f6, $7        # encoding: [0x54,0xe6,0x20,0x38]
+# CHECK-EB: movn.d  $f4, $f6, $7        # encoding: [0x54,0xe6,0x21,0x38]
+# CHECK-EB: movt.s  $f4, $f6, $fcc0     # encoding: [0x54,0x86,0x00,0x60]
+# CHECK-EB: movt.d  $f4, $f6, $fcc0     # encoding: [0x54,0x86,0x02,0x60]
+# CHECK-EB: movf.s  $f4, $f6, $fcc0     # encoding: [0x54,0x86,0x00,0x20]
+# CHECK-EB: movf.d  $f4, $f6, $fcc0     # encoding: [0x54,0x86,0x02,0x20]
+# CHECK-EB: madd.s  $f2, $f4, $f6, $f8  # encoding: [0x55,0x06,0x11,0x01]
+# CHECK-EB: madd.d  $f2, $f4, $f6, $f8  # encoding: [0x55,0x06,0x11,0x09]
+# CHECK-EB: msub.s  $f2, $f4, $f6, $f8  # encoding: [0x55,0x06,0x11,0x21]
+# CHECK-EB: msub.d  $f2, $f4, $f6, $f8  # encoding: [0x55,0x06,0x11,0x29]
+# CHECK-EB: nmadd.s $f2, $f4, $f6, $f8  # encoding: [0x55,0x06,0x11,0x02]
+# CHECK-EB: nmadd.d $f2, $f4, $f6, $f8  # encoding: [0x55,0x06,0x11,0x0a]
+# CHECK-EB: nmsub.s $f2, $f4, $f6, $f8  # encoding: [0x55,0x06,0x11,0x22]
+# CHECK-EB: nmsub.d $f2, $f4, $f6, $f8  # encoding: [0x55,0x06,0x11,0x2a]
+
+    add.s      $f4, $f6, $f8
+    add.d      $f4, $f6, $f8
+    div.s      $f4, $f6, $f8
+    div.d      $f4, $f6, $f8
+    mul.s      $f4, $f6, $f8
+    mul.d      $f4, $f6, $f8
+    sub.s      $f4, $f6, $f8
+    sub.d      $f4, $f6, $f8
+    lwc1       $f2, 4($6)
+    ldc1       $f2, 4($6)
+    swc1       $f2, 4($6)
+    sdc1       $f2, 4($6)
+    bc1f       1332
+    bc1t       1332
+    luxc1      $f2, $4($6)
+    suxc1      $f2, $4($6)
+    ceil.w.s   $f6, $f8
+    ceil.w.d   $f6, $f8
+    cvt.w.s    $f6, $f8
+    cvt.w.d    $f6, $f8
+    floor.w.s  $f6, $f8
+    floor.w.d  $f6, $f8
+    round.w.s  $f6, $f8
+    round.w.d  $f6, $f8
+    sqrt.s     $f6, $f8
+    sqrt.d     $f6, $f8
+    trunc.w.s  $f6, $f8
+    trunc.w.d  $f6, $f8
+    abs.s      $f6, $f8
+    abs.d      $f6, $f8
+    mov.s      $f6, $f8
+    mov.d      $f6, $f8
+    neg.s      $f6, $f8
+    neg.d      $f6, $f8
+    cvt.d.s    $f6, $f8
+    cvt.d.w    $f6, $f8
+    cvt.s.d    $f6, $f8
+    cvt.s.w    $f6, $f8
+    cfc1       $6, $0
+    ctc1       $6, $0
+    mfc1       $6, $f8
+    mtc1       $6, $f8
+    movz.s     $f4, $f6, $7
+    movz.d     $f4, $f6, $7
+    movn.s     $f4, $f6, $7
+    movn.d     $f4, $f6, $7
+    movt.s     $f4, $f6, $fcc0
+    movt.d     $f4, $f6, $fcc0
+    movf.s     $f4, $f6, $fcc0
+    movf.d     $f4, $f6, $fcc0
+    madd.s     $f2, $f4, $f6, $f8
+    madd.d     $f2, $f4, $f6, $f8
+    msub.s     $f2, $f4, $f6, $f8
+    msub.d     $f2, $f4, $f6, $f8
+    nmadd.s    $f2, $f4, $f6, $f8
+    nmadd.d    $f2, $f4, $f6, $f8
+    nmsub.s    $f2, $f4, $f6, $f8
+    nmsub.d    $f2, $f4, $f6, $f8
diff --git a/test/MC/Mips/micromips-jump-instructions.s b/test/MC/Mips/micromips-jump-instructions.s
index 6f571b6..a6c7676 100644
--- a/test/MC/Mips/micromips-jump-instructions.s
+++ b/test/MC/Mips/micromips-jump-instructions.s
@@ -13,7 +13,7 @@
 # CHECK-EL: nop         # encoding: [0x00,0x00,0x00,0x00]
 # CHECK-EL: jal 1328    # encoding: [0x00,0xf4,0x98,0x02]
 # CHECK-EL: nop         # encoding: [0x00,0x00,0x00,0x00]
-# CHECK-EL: jalr $6     # encoding: [0xe6,0x03,0x3c,0x0f]
+# CHECK-EL: jalr $ra, $6 # encoding: [0xe6,0x03,0x3c,0x0f]
 # CHECK-EL: nop         # encoding: [0x00,0x00,0x00,0x00]
 # CHECK-EL: jr $7       # encoding: [0x07,0x00,0x3c,0x0f]
 # CHECK-EL: nop         # encoding: [0x00,0x00,0x00,0x00]
@@ -26,7 +26,7 @@
 # CHECK-EB: nop         # encoding: [0x00,0x00,0x00,0x00]
 # CHECK-EB: jal 1328    # encoding: [0xf4,0x00,0x02,0x98]
 # CHECK-EB: nop         # encoding: [0x00,0x00,0x00,0x00]
-# CHECK-EB: jalr $6     # encoding: [0x03,0xe6,0x0f,0x3c]
+# CHECK-EB: jalr $ra, $6 # encoding: [0x03,0xe6,0x0f,0x3c]
 # CHECK-EB: nop         # encoding: [0x00,0x00,0x00,0x00]
 # CHECK-EB: jr $7       # encoding: [0x00,0x07,0x0f,0x3c]
 # CHECK-EB: nop         # encoding: [0x00,0x00,0x00,0x00]
@@ -35,6 +35,6 @@
 
      j 1328
      jal 1328
-     jalr $6
+     jalr $ra, $6
      jr $7
      j $7
diff --git a/test/MC/Mips/micromips-loadstore-instructions.s b/test/MC/Mips/micromips-loadstore-instructions.s
index cc7514b..8a1b93b 100644
--- a/test/MC/Mips/micromips-loadstore-instructions.s
+++ b/test/MC/Mips/micromips-loadstore-instructions.s
@@ -1,5 +1,7 @@
-# RUN: llvm-mc %s -triple=mipsel -show-encoding -mattr=micromips | FileCheck -check-prefix=CHECK-EL %s
-# RUN: llvm-mc %s -triple=mips -show-encoding -mattr=micromips | FileCheck -check-prefix=CHECK-EB %s
+# RUN: llvm-mc %s -triple=mipsel -show-encoding -mattr=micromips \
+# RUN: | FileCheck -check-prefix=CHECK-EL %s
+# RUN: llvm-mc %s -triple=mips -show-encoding -mattr=micromips \
+# RUN: | FileCheck -check-prefix=CHECK-EB %s
 # Check that the assembler can handle the documented syntax
 # for load and store instructions.
 #------------------------------------------------------------------------------
@@ -15,6 +17,9 @@
 # CHECK-EL: sb     $5, 8($4)      # encoding: [0xa4,0x18,0x08,0x00]
 # CHECK-EL: sh     $2, 8($4)      # encoding: [0x44,0x38,0x08,0x00]
 # CHECK-EL: sw     $5, 4($6)      # encoding: [0xa6,0xf8,0x04,0x00]
+# CHECK-EL: ll     $2, 8($4)      # encoding: [0x44,0x60,0x08,0x30]
+# CHECK-EL: sc     $2, 8($4)      # encoding: [0x44,0x60,0x08,0xb0]
+# CHECK-EL: lwu    $2, 8($4)      # encoding: [0x44,0x60,0x08,0xe0]
 #------------------------------------------------------------------------------
 # Big endian
 #------------------------------------------------------------------------------
@@ -26,6 +31,9 @@
 # CHECK-EB: sb     $5, 8($4)      # encoding: [0x18,0xa4,0x00,0x08]
 # CHECK-EB: sh     $2, 8($4)      # encoding: [0x38,0x44,0x00,0x08]
 # CHECK-EB: sw     $5, 4($6)      # encoding: [0xf8,0xa6,0x00,0x04]
+# CHECK-EB: ll     $2, 8($4)      # encoding: [0x60,0x44,0x30,0x08]
+# CHECK-EB: sc     $2, 8($4)      # encoding: [0x60,0x44,0xb0,0x08]
+# CHECK-EB: lwu    $2, 8($4)      # encoding: [0x60,0x44,0xe0,0x08]
      lb     $5, 8($4)
      lbu    $6, 8($4)
      lh     $2, 8($4)
@@ -34,3 +42,6 @@
      sb     $5, 8($4)
      sh     $2, 8($4)
      sw     $5, 4($6)
+     ll     $2, 8($4)
+     sc     $2, 8($4)
+     lwu    $2, 8($4)
diff --git a/test/MC/Mips/micromips-long-branch.ll b/test/MC/Mips/micromips-long-branch.ll
deleted file mode 100644
index 3267f4a..0000000
--- a/test/MC/Mips/micromips-long-branch.ll
+++ /dev/null
@@ -1,16437 +0,0 @@
-; RUN: llc %s -march=mipsel -mcpu=mips32r2 -mattr=micromips -filetype=asm \
-; RUN: -relocation-model=pic -O3 -o - | FileCheck %s
-
-@a = common global [10 x i32] zeroinitializer, align 16
-
-; Function Attrs: nounwind uwtable
-define i32 @main() #0 {
-entry:
-  %retval = alloca i32, align 4
-  %i = alloca i32, align 4
-  store i32 0, i32* %retval
-  store i32 0, i32* %i, align 4
-  br label %for.cond
-
-for.cond:
-  %0 = load i32* %i, align 4
-  %cmp = icmp slt i32 %0, 10
-  br i1 %cmp, label %for.body, label %for.end
-
-; CHECK:  addiu $sp, $sp, -8
-; CHECK:  sw  $ra, 0($sp)
-; CHECK:  lui $[[REG1:[0-9]+]], 2
-; CHECK:  addiu $[[REG1]], $[[REG1]], 0
-; CHECK:  addu  $[[REG1]], $ra, $[[REG1]]
-; CHECK:  lw  $ra, 0($sp)
-; CHECK:  jr  $[[REG1]]
-; CHECK:  addiu $sp, $sp, 8
-
-for.body:
-  %1 = load i32* %i, align 4
-  %2 = load i32* %i, align 4
-  %idxprom = sext i32 %2 to i64
-  %arrayidx = getelementptr inbounds [10 x i32]* @a, i32 0, i64 %idxprom
-  store i32 %1, i32* %arrayidx, align 4  %nop0 = alloca i1, i1 0
-  %nop1 = alloca i1, i1 0
-  %nop2 = alloca i1, i1 0
-  %nop3 = alloca i1, i1 0
-  %nop4 = alloca i1, i1 0
-  %nop5 = alloca i1, i1 0
-  %nop6 = alloca i1, i1 0
-  %nop7 = alloca i1, i1 0
-  %nop8 = alloca i1, i1 0
-  %nop9 = alloca i1, i1 0
-  %nop10 = alloca i1, i1 0
-  %nop11 = alloca i1, i1 0
-  %nop12 = alloca i1, i1 0
-  %nop13 = alloca i1, i1 0
-  %nop14 = alloca i1, i1 0
-  %nop15 = alloca i1, i1 0
-  %nop16 = alloca i1, i1 0
-  %nop17 = alloca i1, i1 0
-  %nop18 = alloca i1, i1 0
-  %nop19 = alloca i1, i1 0
-  %nop20 = alloca i1, i1 0
-  %nop21 = alloca i1, i1 0
-  %nop22 = alloca i1, i1 0
-  %nop23 = alloca i1, i1 0
-  %nop24 = alloca i1, i1 0
-  %nop25 = alloca i1, i1 0
-  %nop26 = alloca i1, i1 0
-  %nop27 = alloca i1, i1 0
-  %nop28 = alloca i1, i1 0
-  %nop29 = alloca i1, i1 0
-  %nop30 = alloca i1, i1 0
-  %nop31 = alloca i1, i1 0
-  %nop32 = alloca i1, i1 0
-  %nop33 = alloca i1, i1 0
-  %nop34 = alloca i1, i1 0
-  %nop35 = alloca i1, i1 0
-  %nop36 = alloca i1, i1 0
-  %nop37 = alloca i1, i1 0
-  %nop38 = alloca i1, i1 0
-  %nop39 = alloca i1, i1 0
-  %nop40 = alloca i1, i1 0
-  %nop41 = alloca i1, i1 0
-  %nop42 = alloca i1, i1 0
-  %nop43 = alloca i1, i1 0
-  %nop44 = alloca i1, i1 0
-  %nop45 = alloca i1, i1 0
-  %nop46 = alloca i1, i1 0
-  %nop47 = alloca i1, i1 0
-  %nop48 = alloca i1, i1 0
-  %nop49 = alloca i1, i1 0
-  %nop50 = alloca i1, i1 0
-  %nop51 = alloca i1, i1 0
-  %nop52 = alloca i1, i1 0
-  %nop53 = alloca i1, i1 0
-  %nop54 = alloca i1, i1 0
-  %nop55 = alloca i1, i1 0
-  %nop56 = alloca i1, i1 0
-  %nop57 = alloca i1, i1 0
-  %nop58 = alloca i1, i1 0
-  %nop59 = alloca i1, i1 0
-  %nop60 = alloca i1, i1 0
-  %nop61 = alloca i1, i1 0
-  %nop62 = alloca i1, i1 0
-  %nop63 = alloca i1, i1 0
-  %nop64 = alloca i1, i1 0
-  %nop65 = alloca i1, i1 0
-  %nop66 = alloca i1, i1 0
-  %nop67 = alloca i1, i1 0
-  %nop68 = alloca i1, i1 0
-  %nop69 = alloca i1, i1 0
-  %nop70 = alloca i1, i1 0
-  %nop71 = alloca i1, i1 0
-  %nop72 = alloca i1, i1 0
-  %nop73 = alloca i1, i1 0
-  %nop74 = alloca i1, i1 0
-  %nop75 = alloca i1, i1 0
-  %nop76 = alloca i1, i1 0
-  %nop77 = alloca i1, i1 0
-  %nop78 = alloca i1, i1 0
-  %nop79 = alloca i1, i1 0
-  %nop80 = alloca i1, i1 0
-  %nop81 = alloca i1, i1 0
-  %nop82 = alloca i1, i1 0
-  %nop83 = alloca i1, i1 0
-  %nop84 = alloca i1, i1 0
-  %nop85 = alloca i1, i1 0
-  %nop86 = alloca i1, i1 0
-  %nop87 = alloca i1, i1 0
-  %nop88 = alloca i1, i1 0
-  %nop89 = alloca i1, i1 0
-  %nop90 = alloca i1, i1 0
-  %nop91 = alloca i1, i1 0
-  %nop92 = alloca i1, i1 0
-  %nop93 = alloca i1, i1 0
-  %nop94 = alloca i1, i1 0
-  %nop95 = alloca i1, i1 0
-  %nop96 = alloca i1, i1 0
-  %nop97 = alloca i1, i1 0
-  %nop98 = alloca i1, i1 0
-  %nop99 = alloca i1, i1 0
-  %nop100 = alloca i1, i1 0
-  %nop101 = alloca i1, i1 0
-  %nop102 = alloca i1, i1 0
-  %nop103 = alloca i1, i1 0
-  %nop104 = alloca i1, i1 0
-  %nop105 = alloca i1, i1 0
-  %nop106 = alloca i1, i1 0
-  %nop107 = alloca i1, i1 0
-  %nop108 = alloca i1, i1 0
-  %nop109 = alloca i1, i1 0
-  %nop110 = alloca i1, i1 0
-  %nop111 = alloca i1, i1 0
-  %nop112 = alloca i1, i1 0
-  %nop113 = alloca i1, i1 0
-  %nop114 = alloca i1, i1 0
-  %nop115 = alloca i1, i1 0
-  %nop116 = alloca i1, i1 0
-  %nop117 = alloca i1, i1 0
-  %nop118 = alloca i1, i1 0
-  %nop119 = alloca i1, i1 0
-  %nop120 = alloca i1, i1 0
-  %nop121 = alloca i1, i1 0
-  %nop122 = alloca i1, i1 0
-  %nop123 = alloca i1, i1 0
-  %nop124 = alloca i1, i1 0
-  %nop125 = alloca i1, i1 0
-  %nop126 = alloca i1, i1 0
-  %nop127 = alloca i1, i1 0
-  %nop128 = alloca i1, i1 0
-  %nop129 = alloca i1, i1 0
-  %nop130 = alloca i1, i1 0
-  %nop131 = alloca i1, i1 0
-  %nop132 = alloca i1, i1 0
-  %nop133 = alloca i1, i1 0
-  %nop134 = alloca i1, i1 0
-  %nop135 = alloca i1, i1 0
-  %nop136 = alloca i1, i1 0
-  %nop137 = alloca i1, i1 0
-  %nop138 = alloca i1, i1 0
-  %nop139 = alloca i1, i1 0
-  %nop140 = alloca i1, i1 0
-  %nop141 = alloca i1, i1 0
-  %nop142 = alloca i1, i1 0
-  %nop143 = alloca i1, i1 0
-  %nop144 = alloca i1, i1 0
-  %nop145 = alloca i1, i1 0
-  %nop146 = alloca i1, i1 0
-  %nop147 = alloca i1, i1 0
-  %nop148 = alloca i1, i1 0
-  %nop149 = alloca i1, i1 0
-  %nop150 = alloca i1, i1 0
-  %nop151 = alloca i1, i1 0
-  %nop152 = alloca i1, i1 0
-  %nop153 = alloca i1, i1 0
-  %nop154 = alloca i1, i1 0
-  %nop155 = alloca i1, i1 0
-  %nop156 = alloca i1, i1 0
-  %nop157 = alloca i1, i1 0
-  %nop158 = alloca i1, i1 0
-  %nop159 = alloca i1, i1 0
-  %nop160 = alloca i1, i1 0
-  %nop161 = alloca i1, i1 0
-  %nop162 = alloca i1, i1 0
-  %nop163 = alloca i1, i1 0
-  %nop164 = alloca i1, i1 0
-  %nop165 = alloca i1, i1 0
-  %nop166 = alloca i1, i1 0
-  %nop167 = alloca i1, i1 0
-  %nop168 = alloca i1, i1 0
-  %nop169 = alloca i1, i1 0
-  %nop170 = alloca i1, i1 0
-  %nop171 = alloca i1, i1 0
-  %nop172 = alloca i1, i1 0
-  %nop173 = alloca i1, i1 0
-  %nop174 = alloca i1, i1 0
-  %nop175 = alloca i1, i1 0
-  %nop176 = alloca i1, i1 0
-  %nop177 = alloca i1, i1 0
-  %nop178 = alloca i1, i1 0
-  %nop179 = alloca i1, i1 0
-  %nop180 = alloca i1, i1 0
-  %nop181 = alloca i1, i1 0
-  %nop182 = alloca i1, i1 0
-  %nop183 = alloca i1, i1 0
-  %nop184 = alloca i1, i1 0
-  %nop185 = alloca i1, i1 0
-  %nop186 = alloca i1, i1 0
-  %nop187 = alloca i1, i1 0
-  %nop188 = alloca i1, i1 0
-  %nop189 = alloca i1, i1 0
-  %nop190 = alloca i1, i1 0
-  %nop191 = alloca i1, i1 0
-  %nop192 = alloca i1, i1 0
-  %nop193 = alloca i1, i1 0
-  %nop194 = alloca i1, i1 0
-  %nop195 = alloca i1, i1 0
-  %nop196 = alloca i1, i1 0
-  %nop197 = alloca i1, i1 0
-  %nop198 = alloca i1, i1 0
-  %nop199 = alloca i1, i1 0
-  %nop200 = alloca i1, i1 0
-  %nop201 = alloca i1, i1 0
-  %nop202 = alloca i1, i1 0
-  %nop203 = alloca i1, i1 0
-  %nop204 = alloca i1, i1 0
-  %nop205 = alloca i1, i1 0
-  %nop206 = alloca i1, i1 0
-  %nop207 = alloca i1, i1 0
-  %nop208 = alloca i1, i1 0
-  %nop209 = alloca i1, i1 0
-  %nop210 = alloca i1, i1 0
-  %nop211 = alloca i1, i1 0
-  %nop212 = alloca i1, i1 0
-  %nop213 = alloca i1, i1 0
-  %nop214 = alloca i1, i1 0
-  %nop215 = alloca i1, i1 0
-  %nop216 = alloca i1, i1 0
-  %nop217 = alloca i1, i1 0
-  %nop218 = alloca i1, i1 0
-  %nop219 = alloca i1, i1 0
-  %nop220 = alloca i1, i1 0
-  %nop221 = alloca i1, i1 0
-  %nop222 = alloca i1, i1 0
-  %nop223 = alloca i1, i1 0
-  %nop224 = alloca i1, i1 0
-  %nop225 = alloca i1, i1 0
-  %nop226 = alloca i1, i1 0
-  %nop227 = alloca i1, i1 0
-  %nop228 = alloca i1, i1 0
-  %nop229 = alloca i1, i1 0
-  %nop230 = alloca i1, i1 0
-  %nop231 = alloca i1, i1 0
-  %nop232 = alloca i1, i1 0
-  %nop233 = alloca i1, i1 0
-  %nop234 = alloca i1, i1 0
-  %nop235 = alloca i1, i1 0
-  %nop236 = alloca i1, i1 0
-  %nop237 = alloca i1, i1 0
-  %nop238 = alloca i1, i1 0
-  %nop239 = alloca i1, i1 0
-  %nop240 = alloca i1, i1 0
-  %nop241 = alloca i1, i1 0
-  %nop242 = alloca i1, i1 0
-  %nop243 = alloca i1, i1 0
-  %nop244 = alloca i1, i1 0
-  %nop245 = alloca i1, i1 0
-  %nop246 = alloca i1, i1 0
-  %nop247 = alloca i1, i1 0
-  %nop248 = alloca i1, i1 0
-  %nop249 = alloca i1, i1 0
-  %nop250 = alloca i1, i1 0
-  %nop251 = alloca i1, i1 0
-  %nop252 = alloca i1, i1 0
-  %nop253 = alloca i1, i1 0
-  %nop254 = alloca i1, i1 0
-  %nop255 = alloca i1, i1 0
-  %nop256 = alloca i1, i1 0
-  %nop257 = alloca i1, i1 0
-  %nop258 = alloca i1, i1 0
-  %nop259 = alloca i1, i1 0
-  %nop260 = alloca i1, i1 0
-  %nop261 = alloca i1, i1 0
-  %nop262 = alloca i1, i1 0
-  %nop263 = alloca i1, i1 0
-  %nop264 = alloca i1, i1 0
-  %nop265 = alloca i1, i1 0
-  %nop266 = alloca i1, i1 0
-  %nop267 = alloca i1, i1 0
-  %nop268 = alloca i1, i1 0
-  %nop269 = alloca i1, i1 0
-  %nop270 = alloca i1, i1 0
-  %nop271 = alloca i1, i1 0
-  %nop272 = alloca i1, i1 0
-  %nop273 = alloca i1, i1 0
-  %nop274 = alloca i1, i1 0
-  %nop275 = alloca i1, i1 0
-  %nop276 = alloca i1, i1 0
-  %nop277 = alloca i1, i1 0
-  %nop278 = alloca i1, i1 0
-  %nop279 = alloca i1, i1 0
-  %nop280 = alloca i1, i1 0
-  %nop281 = alloca i1, i1 0
-  %nop282 = alloca i1, i1 0
-  %nop283 = alloca i1, i1 0
-  %nop284 = alloca i1, i1 0
-  %nop285 = alloca i1, i1 0
-  %nop286 = alloca i1, i1 0
-  %nop287 = alloca i1, i1 0
-  %nop288 = alloca i1, i1 0
-  %nop289 = alloca i1, i1 0
-  %nop290 = alloca i1, i1 0
-  %nop291 = alloca i1, i1 0
-  %nop292 = alloca i1, i1 0
-  %nop293 = alloca i1, i1 0
-  %nop294 = alloca i1, i1 0
-  %nop295 = alloca i1, i1 0
-  %nop296 = alloca i1, i1 0
-  %nop297 = alloca i1, i1 0
-  %nop298 = alloca i1, i1 0
-  %nop299 = alloca i1, i1 0
-  %nop300 = alloca i1, i1 0
-  %nop301 = alloca i1, i1 0
-  %nop302 = alloca i1, i1 0
-  %nop303 = alloca i1, i1 0
-  %nop304 = alloca i1, i1 0
-  %nop305 = alloca i1, i1 0
-  %nop306 = alloca i1, i1 0
-  %nop307 = alloca i1, i1 0
-  %nop308 = alloca i1, i1 0
-  %nop309 = alloca i1, i1 0
-  %nop310 = alloca i1, i1 0
-  %nop311 = alloca i1, i1 0
-  %nop312 = alloca i1, i1 0
-  %nop313 = alloca i1, i1 0
-  %nop314 = alloca i1, i1 0
-  %nop315 = alloca i1, i1 0
-  %nop316 = alloca i1, i1 0
-  %nop317 = alloca i1, i1 0
-  %nop318 = alloca i1, i1 0
-  %nop319 = alloca i1, i1 0
-  %nop320 = alloca i1, i1 0
-  %nop321 = alloca i1, i1 0
-  %nop322 = alloca i1, i1 0
-  %nop323 = alloca i1, i1 0
-  %nop324 = alloca i1, i1 0
-  %nop325 = alloca i1, i1 0
-  %nop326 = alloca i1, i1 0
-  %nop327 = alloca i1, i1 0
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-  %nop329 = alloca i1, i1 0
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-  %nop362 = alloca i1, i1 0
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-  %nop365 = alloca i1, i1 0
-  %nop366 = alloca i1, i1 0
-  %nop367 = alloca i1, i1 0
-  %nop368 = alloca i1, i1 0
-  %nop369 = alloca i1, i1 0
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-  %nop371 = alloca i1, i1 0
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-  %nop384 = alloca i1, i1 0
-  %nop385 = alloca i1, i1 0
-  %nop386 = alloca i1, i1 0
-  %nop387 = alloca i1, i1 0
-  %nop388 = alloca i1, i1 0
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-  %nop390 = alloca i1, i1 0
-  %nop391 = alloca i1, i1 0
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-  %nop401 = alloca i1, i1 0
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-  %nop404 = alloca i1, i1 0
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-  %nop411 = alloca i1, i1 0
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-  %nop416 = alloca i1, i1 0
-  %nop417 = alloca i1, i1 0
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-  %nop437 = alloca i1, i1 0
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-  %nop468 = alloca i1, i1 0
-  %nop469 = alloca i1, i1 0
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-  %nop488 = alloca i1, i1 0
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-  %nop501 = alloca i1, i1 0
-  %nop502 = alloca i1, i1 0
-  %nop503 = alloca i1, i1 0
-  %nop504 = alloca i1, i1 0
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-  %nop509 = alloca i1, i1 0
-  %nop510 = alloca i1, i1 0
-  %nop511 = alloca i1, i1 0
-  %nop512 = alloca i1, i1 0
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-  %nop515 = alloca i1, i1 0
-  %nop516 = alloca i1, i1 0
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-  %nop528 = alloca i1, i1 0
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-  %nop531 = alloca i1, i1 0
-  %nop532 = alloca i1, i1 0
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-  %nop534 = alloca i1, i1 0
-  %nop535 = alloca i1, i1 0
-  %nop536 = alloca i1, i1 0
-  %nop537 = alloca i1, i1 0
-  %nop538 = alloca i1, i1 0
-  %nop539 = alloca i1, i1 0
-  %nop540 = alloca i1, i1 0
-  %nop541 = alloca i1, i1 0
-  %nop542 = alloca i1, i1 0
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-  %nop566 = alloca i1, i1 0
-  %nop567 = alloca i1, i1 0
-  %nop568 = alloca i1, i1 0
-  %nop569 = alloca i1, i1 0
-  %nop570 = alloca i1, i1 0
-  %nop571 = alloca i1, i1 0
-  %nop572 = alloca i1, i1 0
-  %nop573 = alloca i1, i1 0
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-  %nop578 = alloca i1, i1 0
-  %nop579 = alloca i1, i1 0
-  %nop580 = alloca i1, i1 0
-  %nop581 = alloca i1, i1 0
-  %nop582 = alloca i1, i1 0
-  %nop583 = alloca i1, i1 0
-  %nop584 = alloca i1, i1 0
-  %nop585 = alloca i1, i1 0
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-  %nop588 = alloca i1, i1 0
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-  %nop603 = alloca i1, i1 0
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-  %nop610 = alloca i1, i1 0
-  %nop611 = alloca i1, i1 0
-  %nop612 = alloca i1, i1 0
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-  %nop614 = alloca i1, i1 0
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-  %nop616 = alloca i1, i1 0
-  %nop617 = alloca i1, i1 0
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-  %nop619 = alloca i1, i1 0
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-  %nop621 = alloca i1, i1 0
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-  %nop628 = alloca i1, i1 0
-  %nop629 = alloca i1, i1 0
-  %nop630 = alloca i1, i1 0
-  %nop631 = alloca i1, i1 0
-  %nop632 = alloca i1, i1 0
-  %nop633 = alloca i1, i1 0
-  %nop634 = alloca i1, i1 0
-  %nop635 = alloca i1, i1 0
-  %nop636 = alloca i1, i1 0
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-  %nop640 = alloca i1, i1 0
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-  %nop651 = alloca i1, i1 0
-  %nop652 = alloca i1, i1 0
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-  %nop654 = alloca i1, i1 0
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-  %nop664 = alloca i1, i1 0
-  %nop665 = alloca i1, i1 0
-  %nop666 = alloca i1, i1 0
-  %nop667 = alloca i1, i1 0
-  %nop668 = alloca i1, i1 0
-  %nop669 = alloca i1, i1 0
-  %nop670 = alloca i1, i1 0
-  %nop671 = alloca i1, i1 0
-  %nop672 = alloca i1, i1 0
-  %nop673 = alloca i1, i1 0
-  %nop674 = alloca i1, i1 0
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-  %nop692 = alloca i1, i1 0
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-  %nop694 = alloca i1, i1 0
-  %nop695 = alloca i1, i1 0
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-  %nop705 = alloca i1, i1 0
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-  %nop707 = alloca i1, i1 0
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-  %nop709 = alloca i1, i1 0
-  %nop710 = alloca i1, i1 0
-  %nop711 = alloca i1, i1 0
-  %nop712 = alloca i1, i1 0
-  %nop713 = alloca i1, i1 0
-  %nop714 = alloca i1, i1 0
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-  %nop716 = alloca i1, i1 0
-  %nop717 = alloca i1, i1 0
-  %nop718 = alloca i1, i1 0
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-  %nop730 = alloca i1, i1 0
-  %nop731 = alloca i1, i1 0
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-  %nop793 = alloca i1, i1 0
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-  %nop811 = alloca i1, i1 0
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-  %nop821 = alloca i1, i1 0
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-  %nop827 = alloca i1, i1 0
-  %nop828 = alloca i1, i1 0
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-  %nop830 = alloca i1, i1 0
-  %nop831 = alloca i1, i1 0
-  %nop832 = alloca i1, i1 0
-  %nop833 = alloca i1, i1 0
-  %nop834 = alloca i1, i1 0
-  %nop835 = alloca i1, i1 0
-  %nop836 = alloca i1, i1 0
-  %nop837 = alloca i1, i1 0
-  %nop838 = alloca i1, i1 0
-  %nop839 = alloca i1, i1 0
-  %nop840 = alloca i1, i1 0
-  %nop841 = alloca i1, i1 0
-  %nop842 = alloca i1, i1 0
-  %nop843 = alloca i1, i1 0
-  %nop844 = alloca i1, i1 0
-  %nop845 = alloca i1, i1 0
-  %nop846 = alloca i1, i1 0
-  %nop847 = alloca i1, i1 0
-  %nop848 = alloca i1, i1 0
-  %nop849 = alloca i1, i1 0
-  %nop850 = alloca i1, i1 0
-  %nop851 = alloca i1, i1 0
-  %nop852 = alloca i1, i1 0
-  %nop853 = alloca i1, i1 0
-  %nop854 = alloca i1, i1 0
-  %nop855 = alloca i1, i1 0
-  %nop856 = alloca i1, i1 0
-  %nop857 = alloca i1, i1 0
-  %nop858 = alloca i1, i1 0
-  %nop859 = alloca i1, i1 0
-  %nop860 = alloca i1, i1 0
-  %nop861 = alloca i1, i1 0
-  %nop862 = alloca i1, i1 0
-  %nop863 = alloca i1, i1 0
-  %nop864 = alloca i1, i1 0
-  %nop865 = alloca i1, i1 0
-  %nop866 = alloca i1, i1 0
-  %nop867 = alloca i1, i1 0
-  %nop868 = alloca i1, i1 0
-  %nop869 = alloca i1, i1 0
-  %nop870 = alloca i1, i1 0
-  %nop871 = alloca i1, i1 0
-  %nop872 = alloca i1, i1 0
-  %nop873 = alloca i1, i1 0
-  %nop874 = alloca i1, i1 0
-  %nop875 = alloca i1, i1 0
-  %nop876 = alloca i1, i1 0
-  %nop877 = alloca i1, i1 0
-  %nop878 = alloca i1, i1 0
-  %nop879 = alloca i1, i1 0
-  %nop880 = alloca i1, i1 0
-  %nop881 = alloca i1, i1 0
-  %nop882 = alloca i1, i1 0
-  %nop883 = alloca i1, i1 0
-  %nop884 = alloca i1, i1 0
-  %nop885 = alloca i1, i1 0
-  %nop886 = alloca i1, i1 0
-  %nop887 = alloca i1, i1 0
-  %nop888 = alloca i1, i1 0
-  %nop889 = alloca i1, i1 0
-  %nop890 = alloca i1, i1 0
-  %nop891 = alloca i1, i1 0
-  %nop892 = alloca i1, i1 0
-  %nop893 = alloca i1, i1 0
-  %nop894 = alloca i1, i1 0
-  %nop895 = alloca i1, i1 0
-  %nop896 = alloca i1, i1 0
-  %nop897 = alloca i1, i1 0
-  %nop898 = alloca i1, i1 0
-  %nop899 = alloca i1, i1 0
-  %nop900 = alloca i1, i1 0
-  %nop901 = alloca i1, i1 0
-  %nop902 = alloca i1, i1 0
-  %nop903 = alloca i1, i1 0
-  %nop904 = alloca i1, i1 0
-  %nop905 = alloca i1, i1 0
-  %nop906 = alloca i1, i1 0
-  %nop907 = alloca i1, i1 0
-  %nop908 = alloca i1, i1 0
-  %nop909 = alloca i1, i1 0
-  %nop910 = alloca i1, i1 0
-  %nop911 = alloca i1, i1 0
-  %nop912 = alloca i1, i1 0
-  %nop913 = alloca i1, i1 0
-  %nop914 = alloca i1, i1 0
-  %nop915 = alloca i1, i1 0
-  %nop916 = alloca i1, i1 0
-  %nop917 = alloca i1, i1 0
-  %nop918 = alloca i1, i1 0
-  %nop919 = alloca i1, i1 0
-  %nop920 = alloca i1, i1 0
-  %nop921 = alloca i1, i1 0
-  %nop922 = alloca i1, i1 0
-  %nop923 = alloca i1, i1 0
-  %nop924 = alloca i1, i1 0
-  %nop925 = alloca i1, i1 0
-  %nop926 = alloca i1, i1 0
-  %nop927 = alloca i1, i1 0
-  %nop928 = alloca i1, i1 0
-  %nop929 = alloca i1, i1 0
-  %nop930 = alloca i1, i1 0
-  %nop931 = alloca i1, i1 0
-  %nop932 = alloca i1, i1 0
-  %nop933 = alloca i1, i1 0
-  %nop934 = alloca i1, i1 0
-  %nop935 = alloca i1, i1 0
-  %nop936 = alloca i1, i1 0
-  %nop937 = alloca i1, i1 0
-  %nop938 = alloca i1, i1 0
-  %nop939 = alloca i1, i1 0
-  %nop940 = alloca i1, i1 0
-  %nop941 = alloca i1, i1 0
-  %nop942 = alloca i1, i1 0
-  %nop943 = alloca i1, i1 0
-  %nop944 = alloca i1, i1 0
-  %nop945 = alloca i1, i1 0
-  %nop946 = alloca i1, i1 0
-  %nop947 = alloca i1, i1 0
-  %nop948 = alloca i1, i1 0
-  %nop949 = alloca i1, i1 0
-  %nop950 = alloca i1, i1 0
-  %nop951 = alloca i1, i1 0
-  %nop952 = alloca i1, i1 0
-  %nop953 = alloca i1, i1 0
-  %nop954 = alloca i1, i1 0
-  %nop955 = alloca i1, i1 0
-  %nop956 = alloca i1, i1 0
-  %nop957 = alloca i1, i1 0
-  %nop958 = alloca i1, i1 0
-  %nop959 = alloca i1, i1 0
-  %nop960 = alloca i1, i1 0
-  %nop961 = alloca i1, i1 0
-  %nop962 = alloca i1, i1 0
-  %nop963 = alloca i1, i1 0
-  %nop964 = alloca i1, i1 0
-  %nop965 = alloca i1, i1 0
-  %nop966 = alloca i1, i1 0
-  %nop967 = alloca i1, i1 0
-  %nop968 = alloca i1, i1 0
-  %nop969 = alloca i1, i1 0
-  %nop970 = alloca i1, i1 0
-  %nop971 = alloca i1, i1 0
-  %nop972 = alloca i1, i1 0
-  %nop973 = alloca i1, i1 0
-  %nop974 = alloca i1, i1 0
-  %nop975 = alloca i1, i1 0
-  %nop976 = alloca i1, i1 0
-  %nop977 = alloca i1, i1 0
-  %nop978 = alloca i1, i1 0
-  %nop979 = alloca i1, i1 0
-  %nop980 = alloca i1, i1 0
-  %nop981 = alloca i1, i1 0
-  %nop982 = alloca i1, i1 0
-  %nop983 = alloca i1, i1 0
-  %nop984 = alloca i1, i1 0
-  %nop985 = alloca i1, i1 0
-  %nop986 = alloca i1, i1 0
-  %nop987 = alloca i1, i1 0
-  %nop988 = alloca i1, i1 0
-  %nop989 = alloca i1, i1 0
-  %nop990 = alloca i1, i1 0
-  %nop991 = alloca i1, i1 0
-  %nop992 = alloca i1, i1 0
-  %nop993 = alloca i1, i1 0
-  %nop994 = alloca i1, i1 0
-  %nop995 = alloca i1, i1 0
-  %nop996 = alloca i1, i1 0
-  %nop997 = alloca i1, i1 0
-  %nop998 = alloca i1, i1 0
-  %nop999 = alloca i1, i1 0
-  %nop1000 = alloca i1, i1 0
-  %nop1001 = alloca i1, i1 0
-  %nop1002 = alloca i1, i1 0
-  %nop1003 = alloca i1, i1 0
-  %nop1004 = alloca i1, i1 0
-  %nop1005 = alloca i1, i1 0
-  %nop1006 = alloca i1, i1 0
-  %nop1007 = alloca i1, i1 0
-  %nop1008 = alloca i1, i1 0
-  %nop1009 = alloca i1, i1 0
-  %nop1010 = alloca i1, i1 0
-  %nop1011 = alloca i1, i1 0
-  %nop1012 = alloca i1, i1 0
-  %nop1013 = alloca i1, i1 0
-  %nop1014 = alloca i1, i1 0
-  %nop1015 = alloca i1, i1 0
-  %nop1016 = alloca i1, i1 0
-  %nop1017 = alloca i1, i1 0
-  %nop1018 = alloca i1, i1 0
-  %nop1019 = alloca i1, i1 0
-  %nop1020 = alloca i1, i1 0
-  %nop1021 = alloca i1, i1 0
-  %nop1022 = alloca i1, i1 0
-  %nop1023 = alloca i1, i1 0
-  %nop1024 = alloca i1, i1 0
-  %nop1025 = alloca i1, i1 0
-  %nop1026 = alloca i1, i1 0
-  %nop1027 = alloca i1, i1 0
-  %nop1028 = alloca i1, i1 0
-  %nop1029 = alloca i1, i1 0
-  %nop1030 = alloca i1, i1 0
-  %nop1031 = alloca i1, i1 0
-  %nop1032 = alloca i1, i1 0
-  %nop1033 = alloca i1, i1 0
-  %nop1034 = alloca i1, i1 0
-  %nop1035 = alloca i1, i1 0
-  %nop1036 = alloca i1, i1 0
-  %nop1037 = alloca i1, i1 0
-  %nop1038 = alloca i1, i1 0
-  %nop1039 = alloca i1, i1 0
-  %nop1040 = alloca i1, i1 0
-  %nop1041 = alloca i1, i1 0
-  %nop1042 = alloca i1, i1 0
-  %nop1043 = alloca i1, i1 0
-  %nop1044 = alloca i1, i1 0
-  %nop1045 = alloca i1, i1 0
-  %nop1046 = alloca i1, i1 0
-  %nop1047 = alloca i1, i1 0
-  %nop1048 = alloca i1, i1 0
-  %nop1049 = alloca i1, i1 0
-  %nop1050 = alloca i1, i1 0
-  %nop1051 = alloca i1, i1 0
-  %nop1052 = alloca i1, i1 0
-  %nop1053 = alloca i1, i1 0
-  %nop1054 = alloca i1, i1 0
-  %nop1055 = alloca i1, i1 0
-  %nop1056 = alloca i1, i1 0
-  %nop1057 = alloca i1, i1 0
-  %nop1058 = alloca i1, i1 0
-  %nop1059 = alloca i1, i1 0
-  %nop1060 = alloca i1, i1 0
-  %nop1061 = alloca i1, i1 0
-  %nop1062 = alloca i1, i1 0
-  %nop1063 = alloca i1, i1 0
-  %nop1064 = alloca i1, i1 0
-  %nop1065 = alloca i1, i1 0
-  %nop1066 = alloca i1, i1 0
-  %nop1067 = alloca i1, i1 0
-  %nop1068 = alloca i1, i1 0
-  %nop1069 = alloca i1, i1 0
-  %nop1070 = alloca i1, i1 0
-  %nop1071 = alloca i1, i1 0
-  %nop1072 = alloca i1, i1 0
-  %nop1073 = alloca i1, i1 0
-  %nop1074 = alloca i1, i1 0
-  %nop1075 = alloca i1, i1 0
-  %nop1076 = alloca i1, i1 0
-  %nop1077 = alloca i1, i1 0
-  %nop1078 = alloca i1, i1 0
-  %nop1079 = alloca i1, i1 0
-  %nop1080 = alloca i1, i1 0
-  %nop1081 = alloca i1, i1 0
-  %nop1082 = alloca i1, i1 0
-  %nop1083 = alloca i1, i1 0
-  %nop1084 = alloca i1, i1 0
-  %nop1085 = alloca i1, i1 0
-  %nop1086 = alloca i1, i1 0
-  %nop1087 = alloca i1, i1 0
-  %nop1088 = alloca i1, i1 0
-  %nop1089 = alloca i1, i1 0
-  %nop1090 = alloca i1, i1 0
-  %nop1091 = alloca i1, i1 0
-  %nop1092 = alloca i1, i1 0
-  %nop1093 = alloca i1, i1 0
-  %nop1094 = alloca i1, i1 0
-  %nop1095 = alloca i1, i1 0
-  %nop1096 = alloca i1, i1 0
-  %nop1097 = alloca i1, i1 0
-  %nop1098 = alloca i1, i1 0
-  %nop1099 = alloca i1, i1 0
-  %nop1100 = alloca i1, i1 0
-  %nop1101 = alloca i1, i1 0
-  %nop1102 = alloca i1, i1 0
-  %nop1103 = alloca i1, i1 0
-  %nop1104 = alloca i1, i1 0
-  %nop1105 = alloca i1, i1 0
-  %nop1106 = alloca i1, i1 0
-  %nop1107 = alloca i1, i1 0
-  %nop1108 = alloca i1, i1 0
-  %nop1109 = alloca i1, i1 0
-  %nop1110 = alloca i1, i1 0
-  %nop1111 = alloca i1, i1 0
-  %nop1112 = alloca i1, i1 0
-  %nop1113 = alloca i1, i1 0
-  %nop1114 = alloca i1, i1 0
-  %nop1115 = alloca i1, i1 0
-  %nop1116 = alloca i1, i1 0
-  %nop1117 = alloca i1, i1 0
-  %nop1118 = alloca i1, i1 0
-  %nop1119 = alloca i1, i1 0
-  %nop1120 = alloca i1, i1 0
-  %nop1121 = alloca i1, i1 0
-  %nop1122 = alloca i1, i1 0
-  %nop1123 = alloca i1, i1 0
-  %nop1124 = alloca i1, i1 0
-  %nop1125 = alloca i1, i1 0
-  %nop1126 = alloca i1, i1 0
-  %nop1127 = alloca i1, i1 0
-  %nop1128 = alloca i1, i1 0
-  %nop1129 = alloca i1, i1 0
-  %nop1130 = alloca i1, i1 0
-  %nop1131 = alloca i1, i1 0
-  %nop1132 = alloca i1, i1 0
-  %nop1133 = alloca i1, i1 0
-  %nop1134 = alloca i1, i1 0
-  %nop1135 = alloca i1, i1 0
-  %nop1136 = alloca i1, i1 0
-  %nop1137 = alloca i1, i1 0
-  %nop1138 = alloca i1, i1 0
-  %nop1139 = alloca i1, i1 0
-  %nop1140 = alloca i1, i1 0
-  %nop1141 = alloca i1, i1 0
-  %nop1142 = alloca i1, i1 0
-  %nop1143 = alloca i1, i1 0
-  %nop1144 = alloca i1, i1 0
-  %nop1145 = alloca i1, i1 0
-  %nop1146 = alloca i1, i1 0
-  %nop1147 = alloca i1, i1 0
-  %nop1148 = alloca i1, i1 0
-  %nop1149 = alloca i1, i1 0
-  %nop1150 = alloca i1, i1 0
-  %nop1151 = alloca i1, i1 0
-  %nop1152 = alloca i1, i1 0
-  %nop1153 = alloca i1, i1 0
-  %nop1154 = alloca i1, i1 0
-  %nop1155 = alloca i1, i1 0
-  %nop1156 = alloca i1, i1 0
-  %nop1157 = alloca i1, i1 0
-  %nop1158 = alloca i1, i1 0
-  %nop1159 = alloca i1, i1 0
-  %nop1160 = alloca i1, i1 0
-  %nop1161 = alloca i1, i1 0
-  %nop1162 = alloca i1, i1 0
-  %nop1163 = alloca i1, i1 0
-  %nop1164 = alloca i1, i1 0
-  %nop1165 = alloca i1, i1 0
-  %nop1166 = alloca i1, i1 0
-  %nop1167 = alloca i1, i1 0
-  %nop1168 = alloca i1, i1 0
-  %nop1169 = alloca i1, i1 0
-  %nop1170 = alloca i1, i1 0
-  %nop1171 = alloca i1, i1 0
-  %nop1172 = alloca i1, i1 0
-  %nop1173 = alloca i1, i1 0
-  %nop1174 = alloca i1, i1 0
-  %nop1175 = alloca i1, i1 0
-  %nop1176 = alloca i1, i1 0
-  %nop1177 = alloca i1, i1 0
-  %nop1178 = alloca i1, i1 0
-  %nop1179 = alloca i1, i1 0
-  %nop1180 = alloca i1, i1 0
-  %nop1181 = alloca i1, i1 0
-  %nop1182 = alloca i1, i1 0
-  %nop1183 = alloca i1, i1 0
-  %nop1184 = alloca i1, i1 0
-  %nop1185 = alloca i1, i1 0
-  %nop1186 = alloca i1, i1 0
-  %nop1187 = alloca i1, i1 0
-  %nop1188 = alloca i1, i1 0
-  %nop1189 = alloca i1, i1 0
-  %nop1190 = alloca i1, i1 0
-  %nop1191 = alloca i1, i1 0
-  %nop1192 = alloca i1, i1 0
-  %nop1193 = alloca i1, i1 0
-  %nop1194 = alloca i1, i1 0
-  %nop1195 = alloca i1, i1 0
-  %nop1196 = alloca i1, i1 0
-  %nop1197 = alloca i1, i1 0
-  %nop1198 = alloca i1, i1 0
-  %nop1199 = alloca i1, i1 0
-  %nop1200 = alloca i1, i1 0
-  %nop1201 = alloca i1, i1 0
-  %nop1202 = alloca i1, i1 0
-  %nop1203 = alloca i1, i1 0
-  %nop1204 = alloca i1, i1 0
-  %nop1205 = alloca i1, i1 0
-  %nop1206 = alloca i1, i1 0
-  %nop1207 = alloca i1, i1 0
-  %nop1208 = alloca i1, i1 0
-  %nop1209 = alloca i1, i1 0
-  %nop1210 = alloca i1, i1 0
-  %nop1211 = alloca i1, i1 0
-  %nop1212 = alloca i1, i1 0
-  %nop1213 = alloca i1, i1 0
-  %nop1214 = alloca i1, i1 0
-  %nop1215 = alloca i1, i1 0
-  %nop1216 = alloca i1, i1 0
-  %nop1217 = alloca i1, i1 0
-  %nop1218 = alloca i1, i1 0
-  %nop1219 = alloca i1, i1 0
-  %nop1220 = alloca i1, i1 0
-  %nop1221 = alloca i1, i1 0
-  %nop1222 = alloca i1, i1 0
-  %nop1223 = alloca i1, i1 0
-  %nop1224 = alloca i1, i1 0
-  %nop1225 = alloca i1, i1 0
-  %nop1226 = alloca i1, i1 0
-  %nop1227 = alloca i1, i1 0
-  %nop1228 = alloca i1, i1 0
-  %nop1229 = alloca i1, i1 0
-  %nop1230 = alloca i1, i1 0
-  %nop1231 = alloca i1, i1 0
-  %nop1232 = alloca i1, i1 0
-  %nop1233 = alloca i1, i1 0
-  %nop1234 = alloca i1, i1 0
-  %nop1235 = alloca i1, i1 0
-  %nop1236 = alloca i1, i1 0
-  %nop1237 = alloca i1, i1 0
-  %nop1238 = alloca i1, i1 0
-  %nop1239 = alloca i1, i1 0
-  %nop1240 = alloca i1, i1 0
-  %nop1241 = alloca i1, i1 0
-  %nop1242 = alloca i1, i1 0
-  %nop1243 = alloca i1, i1 0
-  %nop1244 = alloca i1, i1 0
-  %nop1245 = alloca i1, i1 0
-  %nop1246 = alloca i1, i1 0
-  %nop1247 = alloca i1, i1 0
-  %nop1248 = alloca i1, i1 0
-  %nop1249 = alloca i1, i1 0
-  %nop1250 = alloca i1, i1 0
-  %nop1251 = alloca i1, i1 0
-  %nop1252 = alloca i1, i1 0
-  %nop1253 = alloca i1, i1 0
-  %nop1254 = alloca i1, i1 0
-  %nop1255 = alloca i1, i1 0
-  %nop1256 = alloca i1, i1 0
-  %nop1257 = alloca i1, i1 0
-  %nop1258 = alloca i1, i1 0
-  %nop1259 = alloca i1, i1 0
-  %nop1260 = alloca i1, i1 0
-  %nop1261 = alloca i1, i1 0
-  %nop1262 = alloca i1, i1 0
-  %nop1263 = alloca i1, i1 0
-  %nop1264 = alloca i1, i1 0
-  %nop1265 = alloca i1, i1 0
-  %nop1266 = alloca i1, i1 0
-  %nop1267 = alloca i1, i1 0
-  %nop1268 = alloca i1, i1 0
-  %nop1269 = alloca i1, i1 0
-  %nop1270 = alloca i1, i1 0
-  %nop1271 = alloca i1, i1 0
-  %nop1272 = alloca i1, i1 0
-  %nop1273 = alloca i1, i1 0
-  %nop1274 = alloca i1, i1 0
-  %nop1275 = alloca i1, i1 0
-  %nop1276 = alloca i1, i1 0
-  %nop1277 = alloca i1, i1 0
-  %nop1278 = alloca i1, i1 0
-  %nop1279 = alloca i1, i1 0
-  %nop1280 = alloca i1, i1 0
-  %nop1281 = alloca i1, i1 0
-  %nop1282 = alloca i1, i1 0
-  %nop1283 = alloca i1, i1 0
-  %nop1284 = alloca i1, i1 0
-  %nop1285 = alloca i1, i1 0
-  %nop1286 = alloca i1, i1 0
-  %nop1287 = alloca i1, i1 0
-  %nop1288 = alloca i1, i1 0
-  %nop1289 = alloca i1, i1 0
-  %nop1290 = alloca i1, i1 0
-  %nop1291 = alloca i1, i1 0
-  %nop1292 = alloca i1, i1 0
-  %nop1293 = alloca i1, i1 0
-  %nop1294 = alloca i1, i1 0
-  %nop1295 = alloca i1, i1 0
-  %nop1296 = alloca i1, i1 0
-  %nop1297 = alloca i1, i1 0
-  %nop1298 = alloca i1, i1 0
-  %nop1299 = alloca i1, i1 0
-  %nop1300 = alloca i1, i1 0
-  %nop1301 = alloca i1, i1 0
-  %nop1302 = alloca i1, i1 0
-  %nop1303 = alloca i1, i1 0
-  %nop1304 = alloca i1, i1 0
-  %nop1305 = alloca i1, i1 0
-  %nop1306 = alloca i1, i1 0
-  %nop1307 = alloca i1, i1 0
-  %nop1308 = alloca i1, i1 0
-  %nop1309 = alloca i1, i1 0
-  %nop1310 = alloca i1, i1 0
-  %nop1311 = alloca i1, i1 0
-  %nop1312 = alloca i1, i1 0
-  %nop1313 = alloca i1, i1 0
-  %nop1314 = alloca i1, i1 0
-  %nop1315 = alloca i1, i1 0
-  %nop1316 = alloca i1, i1 0
-  %nop1317 = alloca i1, i1 0
-  %nop1318 = alloca i1, i1 0
-  %nop1319 = alloca i1, i1 0
-  %nop1320 = alloca i1, i1 0
-  %nop1321 = alloca i1, i1 0
-  %nop1322 = alloca i1, i1 0
-  %nop1323 = alloca i1, i1 0
-  %nop1324 = alloca i1, i1 0
-  %nop1325 = alloca i1, i1 0
-  %nop1326 = alloca i1, i1 0
-  %nop1327 = alloca i1, i1 0
-  %nop1328 = alloca i1, i1 0
-  %nop1329 = alloca i1, i1 0
-  %nop1330 = alloca i1, i1 0
-  %nop1331 = alloca i1, i1 0
-  %nop1332 = alloca i1, i1 0
-  %nop1333 = alloca i1, i1 0
-  %nop1334 = alloca i1, i1 0
-  %nop1335 = alloca i1, i1 0
-  %nop1336 = alloca i1, i1 0
-  %nop1337 = alloca i1, i1 0
-  %nop1338 = alloca i1, i1 0
-  %nop1339 = alloca i1, i1 0
-  %nop1340 = alloca i1, i1 0
-  %nop1341 = alloca i1, i1 0
-  %nop1342 = alloca i1, i1 0
-  %nop1343 = alloca i1, i1 0
-  %nop1344 = alloca i1, i1 0
-  %nop1345 = alloca i1, i1 0
-  %nop1346 = alloca i1, i1 0
-  %nop1347 = alloca i1, i1 0
-  %nop1348 = alloca i1, i1 0
-  %nop1349 = alloca i1, i1 0
-  %nop1350 = alloca i1, i1 0
-  %nop1351 = alloca i1, i1 0
-  %nop1352 = alloca i1, i1 0
-  %nop1353 = alloca i1, i1 0
-  %nop1354 = alloca i1, i1 0
-  %nop1355 = alloca i1, i1 0
-  %nop1356 = alloca i1, i1 0
-  %nop1357 = alloca i1, i1 0
-  %nop1358 = alloca i1, i1 0
-  %nop1359 = alloca i1, i1 0
-  %nop1360 = alloca i1, i1 0
-  %nop1361 = alloca i1, i1 0
-  %nop1362 = alloca i1, i1 0
-  %nop1363 = alloca i1, i1 0
-  %nop1364 = alloca i1, i1 0
-  %nop1365 = alloca i1, i1 0
-  %nop1366 = alloca i1, i1 0
-  %nop1367 = alloca i1, i1 0
-  %nop1368 = alloca i1, i1 0
-  %nop1369 = alloca i1, i1 0
-  %nop1370 = alloca i1, i1 0
-  %nop1371 = alloca i1, i1 0
-  %nop1372 = alloca i1, i1 0
-  %nop1373 = alloca i1, i1 0
-  %nop1374 = alloca i1, i1 0
-  %nop1375 = alloca i1, i1 0
-  %nop1376 = alloca i1, i1 0
-  %nop1377 = alloca i1, i1 0
-  %nop1378 = alloca i1, i1 0
-  %nop1379 = alloca i1, i1 0
-  %nop1380 = alloca i1, i1 0
-  %nop1381 = alloca i1, i1 0
-  %nop1382 = alloca i1, i1 0
-  %nop1383 = alloca i1, i1 0
-  %nop1384 = alloca i1, i1 0
-  %nop1385 = alloca i1, i1 0
-  %nop1386 = alloca i1, i1 0
-  %nop1387 = alloca i1, i1 0
-  %nop1388 = alloca i1, i1 0
-  %nop1389 = alloca i1, i1 0
-  %nop1390 = alloca i1, i1 0
-  %nop1391 = alloca i1, i1 0
-  %nop1392 = alloca i1, i1 0
-  %nop1393 = alloca i1, i1 0
-  %nop1394 = alloca i1, i1 0
-  %nop1395 = alloca i1, i1 0
-  %nop1396 = alloca i1, i1 0
-  %nop1397 = alloca i1, i1 0
-  %nop1398 = alloca i1, i1 0
-  %nop1399 = alloca i1, i1 0
-  %nop1400 = alloca i1, i1 0
-  %nop1401 = alloca i1, i1 0
-  %nop1402 = alloca i1, i1 0
-  %nop1403 = alloca i1, i1 0
-  %nop1404 = alloca i1, i1 0
-  %nop1405 = alloca i1, i1 0
-  %nop1406 = alloca i1, i1 0
-  %nop1407 = alloca i1, i1 0
-  %nop1408 = alloca i1, i1 0
-  %nop1409 = alloca i1, i1 0
-  %nop1410 = alloca i1, i1 0
-  %nop1411 = alloca i1, i1 0
-  %nop1412 = alloca i1, i1 0
-  %nop1413 = alloca i1, i1 0
-  %nop1414 = alloca i1, i1 0
-  %nop1415 = alloca i1, i1 0
-  %nop1416 = alloca i1, i1 0
-  %nop1417 = alloca i1, i1 0
-  %nop1418 = alloca i1, i1 0
-  %nop1419 = alloca i1, i1 0
-  %nop1420 = alloca i1, i1 0
-  %nop1421 = alloca i1, i1 0
-  %nop1422 = alloca i1, i1 0
-  %nop1423 = alloca i1, i1 0
-  %nop1424 = alloca i1, i1 0
-  %nop1425 = alloca i1, i1 0
-  %nop1426 = alloca i1, i1 0
-  %nop1427 = alloca i1, i1 0
-  %nop1428 = alloca i1, i1 0
-  %nop1429 = alloca i1, i1 0
-  %nop1430 = alloca i1, i1 0
-  %nop1431 = alloca i1, i1 0
-  %nop1432 = alloca i1, i1 0
-  %nop1433 = alloca i1, i1 0
-  %nop1434 = alloca i1, i1 0
-  %nop1435 = alloca i1, i1 0
-  %nop1436 = alloca i1, i1 0
-  %nop1437 = alloca i1, i1 0
-  %nop1438 = alloca i1, i1 0
-  %nop1439 = alloca i1, i1 0
-  %nop1440 = alloca i1, i1 0
-  %nop1441 = alloca i1, i1 0
-  %nop1442 = alloca i1, i1 0
-  %nop1443 = alloca i1, i1 0
-  %nop1444 = alloca i1, i1 0
-  %nop1445 = alloca i1, i1 0
-  %nop1446 = alloca i1, i1 0
-  %nop1447 = alloca i1, i1 0
-  %nop1448 = alloca i1, i1 0
-  %nop1449 = alloca i1, i1 0
-  %nop1450 = alloca i1, i1 0
-  %nop1451 = alloca i1, i1 0
-  %nop1452 = alloca i1, i1 0
-  %nop1453 = alloca i1, i1 0
-  %nop1454 = alloca i1, i1 0
-  %nop1455 = alloca i1, i1 0
-  %nop1456 = alloca i1, i1 0
-  %nop1457 = alloca i1, i1 0
-  %nop1458 = alloca i1, i1 0
-  %nop1459 = alloca i1, i1 0
-  %nop1460 = alloca i1, i1 0
-  %nop1461 = alloca i1, i1 0
-  %nop1462 = alloca i1, i1 0
-  %nop1463 = alloca i1, i1 0
-  %nop1464 = alloca i1, i1 0
-  %nop1465 = alloca i1, i1 0
-  %nop1466 = alloca i1, i1 0
-  %nop1467 = alloca i1, i1 0
-  %nop1468 = alloca i1, i1 0
-  %nop1469 = alloca i1, i1 0
-  %nop1470 = alloca i1, i1 0
-  %nop1471 = alloca i1, i1 0
-  %nop1472 = alloca i1, i1 0
-  %nop1473 = alloca i1, i1 0
-  %nop1474 = alloca i1, i1 0
-  %nop1475 = alloca i1, i1 0
-  %nop1476 = alloca i1, i1 0
-  %nop1477 = alloca i1, i1 0
-  %nop1478 = alloca i1, i1 0
-  %nop1479 = alloca i1, i1 0
-  %nop1480 = alloca i1, i1 0
-  %nop1481 = alloca i1, i1 0
-  %nop1482 = alloca i1, i1 0
-  %nop1483 = alloca i1, i1 0
-  %nop1484 = alloca i1, i1 0
-  %nop1485 = alloca i1, i1 0
-  %nop1486 = alloca i1, i1 0
-  %nop1487 = alloca i1, i1 0
-  %nop1488 = alloca i1, i1 0
-  %nop1489 = alloca i1, i1 0
-  %nop1490 = alloca i1, i1 0
-  %nop1491 = alloca i1, i1 0
-  %nop1492 = alloca i1, i1 0
-  %nop1493 = alloca i1, i1 0
-  %nop1494 = alloca i1, i1 0
-  %nop1495 = alloca i1, i1 0
-  %nop1496 = alloca i1, i1 0
-  %nop1497 = alloca i1, i1 0
-  %nop1498 = alloca i1, i1 0
-  %nop1499 = alloca i1, i1 0
-  %nop1500 = alloca i1, i1 0
-  %nop1501 = alloca i1, i1 0
-  %nop1502 = alloca i1, i1 0
-  %nop1503 = alloca i1, i1 0
-  %nop1504 = alloca i1, i1 0
-  %nop1505 = alloca i1, i1 0
-  %nop1506 = alloca i1, i1 0
-  %nop1507 = alloca i1, i1 0
-  %nop1508 = alloca i1, i1 0
-  %nop1509 = alloca i1, i1 0
-  %nop1510 = alloca i1, i1 0
-  %nop1511 = alloca i1, i1 0
-  %nop1512 = alloca i1, i1 0
-  %nop1513 = alloca i1, i1 0
-  %nop1514 = alloca i1, i1 0
-  %nop1515 = alloca i1, i1 0
-  %nop1516 = alloca i1, i1 0
-  %nop1517 = alloca i1, i1 0
-  %nop1518 = alloca i1, i1 0
-  %nop1519 = alloca i1, i1 0
-  %nop1520 = alloca i1, i1 0
-  %nop1521 = alloca i1, i1 0
-  %nop1522 = alloca i1, i1 0
-  %nop1523 = alloca i1, i1 0
-  %nop1524 = alloca i1, i1 0
-  %nop1525 = alloca i1, i1 0
-  %nop1526 = alloca i1, i1 0
-  %nop1527 = alloca i1, i1 0
-  %nop1528 = alloca i1, i1 0
-  %nop1529 = alloca i1, i1 0
-  %nop1530 = alloca i1, i1 0
-  %nop1531 = alloca i1, i1 0
-  %nop1532 = alloca i1, i1 0
-  %nop1533 = alloca i1, i1 0
-  %nop1534 = alloca i1, i1 0
-  %nop1535 = alloca i1, i1 0
-  %nop1536 = alloca i1, i1 0
-  %nop1537 = alloca i1, i1 0
-  %nop1538 = alloca i1, i1 0
-  %nop1539 = alloca i1, i1 0
-  %nop1540 = alloca i1, i1 0
-  %nop1541 = alloca i1, i1 0
-  %nop1542 = alloca i1, i1 0
-  %nop1543 = alloca i1, i1 0
-  %nop1544 = alloca i1, i1 0
-  %nop1545 = alloca i1, i1 0
-  %nop1546 = alloca i1, i1 0
-  %nop1547 = alloca i1, i1 0
-  %nop1548 = alloca i1, i1 0
-  %nop1549 = alloca i1, i1 0
-  %nop1550 = alloca i1, i1 0
-  %nop1551 = alloca i1, i1 0
-  %nop1552 = alloca i1, i1 0
-  %nop1553 = alloca i1, i1 0
-  %nop1554 = alloca i1, i1 0
-  %nop1555 = alloca i1, i1 0
-  %nop1556 = alloca i1, i1 0
-  %nop1557 = alloca i1, i1 0
-  %nop1558 = alloca i1, i1 0
-  %nop1559 = alloca i1, i1 0
-  %nop1560 = alloca i1, i1 0
-  %nop1561 = alloca i1, i1 0
-  %nop1562 = alloca i1, i1 0
-  %nop1563 = alloca i1, i1 0
-  %nop1564 = alloca i1, i1 0
-  %nop1565 = alloca i1, i1 0
-  %nop1566 = alloca i1, i1 0
-  %nop1567 = alloca i1, i1 0
-  %nop1568 = alloca i1, i1 0
-  %nop1569 = alloca i1, i1 0
-  %nop1570 = alloca i1, i1 0
-  %nop1571 = alloca i1, i1 0
-  %nop1572 = alloca i1, i1 0
-  %nop1573 = alloca i1, i1 0
-  %nop1574 = alloca i1, i1 0
-  %nop1575 = alloca i1, i1 0
-  %nop1576 = alloca i1, i1 0
-  %nop1577 = alloca i1, i1 0
-  %nop1578 = alloca i1, i1 0
-  %nop1579 = alloca i1, i1 0
-  %nop1580 = alloca i1, i1 0
-  %nop1581 = alloca i1, i1 0
-  %nop1582 = alloca i1, i1 0
-  %nop1583 = alloca i1, i1 0
-  %nop1584 = alloca i1, i1 0
-  %nop1585 = alloca i1, i1 0
-  %nop1586 = alloca i1, i1 0
-  %nop1587 = alloca i1, i1 0
-  %nop1588 = alloca i1, i1 0
-  %nop1589 = alloca i1, i1 0
-  %nop1590 = alloca i1, i1 0
-  %nop1591 = alloca i1, i1 0
-  %nop1592 = alloca i1, i1 0
-  %nop1593 = alloca i1, i1 0
-  %nop1594 = alloca i1, i1 0
-  %nop1595 = alloca i1, i1 0
-  %nop1596 = alloca i1, i1 0
-  %nop1597 = alloca i1, i1 0
-  %nop1598 = alloca i1, i1 0
-  %nop1599 = alloca i1, i1 0
-  %nop1600 = alloca i1, i1 0
-  %nop1601 = alloca i1, i1 0
-  %nop1602 = alloca i1, i1 0
-  %nop1603 = alloca i1, i1 0
-  %nop1604 = alloca i1, i1 0
-  %nop1605 = alloca i1, i1 0
-  %nop1606 = alloca i1, i1 0
-  %nop1607 = alloca i1, i1 0
-  %nop1608 = alloca i1, i1 0
-  %nop1609 = alloca i1, i1 0
-  %nop1610 = alloca i1, i1 0
-  %nop1611 = alloca i1, i1 0
-  %nop1612 = alloca i1, i1 0
-  %nop1613 = alloca i1, i1 0
-  %nop1614 = alloca i1, i1 0
-  %nop1615 = alloca i1, i1 0
-  %nop1616 = alloca i1, i1 0
-  %nop1617 = alloca i1, i1 0
-  %nop1618 = alloca i1, i1 0
-  %nop1619 = alloca i1, i1 0
-  %nop1620 = alloca i1, i1 0
-  %nop1621 = alloca i1, i1 0
-  %nop1622 = alloca i1, i1 0
-  %nop1623 = alloca i1, i1 0
-  %nop1624 = alloca i1, i1 0
-  %nop1625 = alloca i1, i1 0
-  %nop1626 = alloca i1, i1 0
-  %nop1627 = alloca i1, i1 0
-  %nop1628 = alloca i1, i1 0
-  %nop1629 = alloca i1, i1 0
-  %nop1630 = alloca i1, i1 0
-  %nop1631 = alloca i1, i1 0
-  %nop1632 = alloca i1, i1 0
-  %nop1633 = alloca i1, i1 0
-  %nop1634 = alloca i1, i1 0
-  %nop1635 = alloca i1, i1 0
-  %nop1636 = alloca i1, i1 0
-  %nop1637 = alloca i1, i1 0
-  %nop1638 = alloca i1, i1 0
-  %nop1639 = alloca i1, i1 0
-  %nop1640 = alloca i1, i1 0
-  %nop1641 = alloca i1, i1 0
-  %nop1642 = alloca i1, i1 0
-  %nop1643 = alloca i1, i1 0
-  %nop1644 = alloca i1, i1 0
-  %nop1645 = alloca i1, i1 0
-  %nop1646 = alloca i1, i1 0
-  %nop1647 = alloca i1, i1 0
-  %nop1648 = alloca i1, i1 0
-  %nop1649 = alloca i1, i1 0
-  %nop1650 = alloca i1, i1 0
-  %nop1651 = alloca i1, i1 0
-  %nop1652 = alloca i1, i1 0
-  %nop1653 = alloca i1, i1 0
-  %nop1654 = alloca i1, i1 0
-  %nop1655 = alloca i1, i1 0
-  %nop1656 = alloca i1, i1 0
-  %nop1657 = alloca i1, i1 0
-  %nop1658 = alloca i1, i1 0
-  %nop1659 = alloca i1, i1 0
-  %nop1660 = alloca i1, i1 0
-  %nop1661 = alloca i1, i1 0
-  %nop1662 = alloca i1, i1 0
-  %nop1663 = alloca i1, i1 0
-  %nop1664 = alloca i1, i1 0
-  %nop1665 = alloca i1, i1 0
-  %nop1666 = alloca i1, i1 0
-  %nop1667 = alloca i1, i1 0
-  %nop1668 = alloca i1, i1 0
-  %nop1669 = alloca i1, i1 0
-  %nop1670 = alloca i1, i1 0
-  %nop1671 = alloca i1, i1 0
-  %nop1672 = alloca i1, i1 0
-  %nop1673 = alloca i1, i1 0
-  %nop1674 = alloca i1, i1 0
-  %nop1675 = alloca i1, i1 0
-  %nop1676 = alloca i1, i1 0
-  %nop1677 = alloca i1, i1 0
-  %nop1678 = alloca i1, i1 0
-  %nop1679 = alloca i1, i1 0
-  %nop1680 = alloca i1, i1 0
-  %nop1681 = alloca i1, i1 0
-  %nop1682 = alloca i1, i1 0
-  %nop1683 = alloca i1, i1 0
-  %nop1684 = alloca i1, i1 0
-  %nop1685 = alloca i1, i1 0
-  %nop1686 = alloca i1, i1 0
-  %nop1687 = alloca i1, i1 0
-  %nop1688 = alloca i1, i1 0
-  %nop1689 = alloca i1, i1 0
-  %nop1690 = alloca i1, i1 0
-  %nop1691 = alloca i1, i1 0
-  %nop1692 = alloca i1, i1 0
-  %nop1693 = alloca i1, i1 0
-  %nop1694 = alloca i1, i1 0
-  %nop1695 = alloca i1, i1 0
-  %nop1696 = alloca i1, i1 0
-  %nop1697 = alloca i1, i1 0
-  %nop1698 = alloca i1, i1 0
-  %nop1699 = alloca i1, i1 0
-  %nop1700 = alloca i1, i1 0
-  %nop1701 = alloca i1, i1 0
-  %nop1702 = alloca i1, i1 0
-  %nop1703 = alloca i1, i1 0
-  %nop1704 = alloca i1, i1 0
-  %nop1705 = alloca i1, i1 0
-  %nop1706 = alloca i1, i1 0
-  %nop1707 = alloca i1, i1 0
-  %nop1708 = alloca i1, i1 0
-  %nop1709 = alloca i1, i1 0
-  %nop1710 = alloca i1, i1 0
-  %nop1711 = alloca i1, i1 0
-  %nop1712 = alloca i1, i1 0
-  %nop1713 = alloca i1, i1 0
-  %nop1714 = alloca i1, i1 0
-  %nop1715 = alloca i1, i1 0
-  %nop1716 = alloca i1, i1 0
-  %nop1717 = alloca i1, i1 0
-  %nop1718 = alloca i1, i1 0
-  %nop1719 = alloca i1, i1 0
-  %nop1720 = alloca i1, i1 0
-  %nop1721 = alloca i1, i1 0
-  %nop1722 = alloca i1, i1 0
-  %nop1723 = alloca i1, i1 0
-  %nop1724 = alloca i1, i1 0
-  %nop1725 = alloca i1, i1 0
-  %nop1726 = alloca i1, i1 0
-  %nop1727 = alloca i1, i1 0
-  %nop1728 = alloca i1, i1 0
-  %nop1729 = alloca i1, i1 0
-  %nop1730 = alloca i1, i1 0
-  %nop1731 = alloca i1, i1 0
-  %nop1732 = alloca i1, i1 0
-  %nop1733 = alloca i1, i1 0
-  %nop1734 = alloca i1, i1 0
-  %nop1735 = alloca i1, i1 0
-  %nop1736 = alloca i1, i1 0
-  %nop1737 = alloca i1, i1 0
-  %nop1738 = alloca i1, i1 0
-  %nop1739 = alloca i1, i1 0
-  %nop1740 = alloca i1, i1 0
-  %nop1741 = alloca i1, i1 0
-  %nop1742 = alloca i1, i1 0
-  %nop1743 = alloca i1, i1 0
-  %nop1744 = alloca i1, i1 0
-  %nop1745 = alloca i1, i1 0
-  %nop1746 = alloca i1, i1 0
-  %nop1747 = alloca i1, i1 0
-  %nop1748 = alloca i1, i1 0
-  %nop1749 = alloca i1, i1 0
-  %nop1750 = alloca i1, i1 0
-  %nop1751 = alloca i1, i1 0
-  %nop1752 = alloca i1, i1 0
-  %nop1753 = alloca i1, i1 0
-  %nop1754 = alloca i1, i1 0
-  %nop1755 = alloca i1, i1 0
-  %nop1756 = alloca i1, i1 0
-  %nop1757 = alloca i1, i1 0
-  %nop1758 = alloca i1, i1 0
-  %nop1759 = alloca i1, i1 0
-  %nop1760 = alloca i1, i1 0
-  %nop1761 = alloca i1, i1 0
-  %nop1762 = alloca i1, i1 0
-  %nop1763 = alloca i1, i1 0
-  %nop1764 = alloca i1, i1 0
-  %nop1765 = alloca i1, i1 0
-  %nop1766 = alloca i1, i1 0
-  %nop1767 = alloca i1, i1 0
-  %nop1768 = alloca i1, i1 0
-  %nop1769 = alloca i1, i1 0
-  %nop1770 = alloca i1, i1 0
-  %nop1771 = alloca i1, i1 0
-  %nop1772 = alloca i1, i1 0
-  %nop1773 = alloca i1, i1 0
-  %nop1774 = alloca i1, i1 0
-  %nop1775 = alloca i1, i1 0
-  %nop1776 = alloca i1, i1 0
-  %nop1777 = alloca i1, i1 0
-  %nop1778 = alloca i1, i1 0
-  %nop1779 = alloca i1, i1 0
-  %nop1780 = alloca i1, i1 0
-  %nop1781 = alloca i1, i1 0
-  %nop1782 = alloca i1, i1 0
-  %nop1783 = alloca i1, i1 0
-  %nop1784 = alloca i1, i1 0
-  %nop1785 = alloca i1, i1 0
-  %nop1786 = alloca i1, i1 0
-  %nop1787 = alloca i1, i1 0
-  %nop1788 = alloca i1, i1 0
-  %nop1789 = alloca i1, i1 0
-  %nop1790 = alloca i1, i1 0
-  %nop1791 = alloca i1, i1 0
-  %nop1792 = alloca i1, i1 0
-  %nop1793 = alloca i1, i1 0
-  %nop1794 = alloca i1, i1 0
-  %nop1795 = alloca i1, i1 0
-  %nop1796 = alloca i1, i1 0
-  %nop1797 = alloca i1, i1 0
-  %nop1798 = alloca i1, i1 0
-  %nop1799 = alloca i1, i1 0
-  %nop1800 = alloca i1, i1 0
-  %nop1801 = alloca i1, i1 0
-  %nop1802 = alloca i1, i1 0
-  %nop1803 = alloca i1, i1 0
-  %nop1804 = alloca i1, i1 0
-  %nop1805 = alloca i1, i1 0
-  %nop1806 = alloca i1, i1 0
-  %nop1807 = alloca i1, i1 0
-  %nop1808 = alloca i1, i1 0
-  %nop1809 = alloca i1, i1 0
-  %nop1810 = alloca i1, i1 0
-  %nop1811 = alloca i1, i1 0
-  %nop1812 = alloca i1, i1 0
-  %nop1813 = alloca i1, i1 0
-  %nop1814 = alloca i1, i1 0
-  %nop1815 = alloca i1, i1 0
-  %nop1816 = alloca i1, i1 0
-  %nop1817 = alloca i1, i1 0
-  %nop1818 = alloca i1, i1 0
-  %nop1819 = alloca i1, i1 0
-  %nop1820 = alloca i1, i1 0
-  %nop1821 = alloca i1, i1 0
-  %nop1822 = alloca i1, i1 0
-  %nop1823 = alloca i1, i1 0
-  %nop1824 = alloca i1, i1 0
-  %nop1825 = alloca i1, i1 0
-  %nop1826 = alloca i1, i1 0
-  %nop1827 = alloca i1, i1 0
-  %nop1828 = alloca i1, i1 0
-  %nop1829 = alloca i1, i1 0
-  %nop1830 = alloca i1, i1 0
-  %nop1831 = alloca i1, i1 0
-  %nop1832 = alloca i1, i1 0
-  %nop1833 = alloca i1, i1 0
-  %nop1834 = alloca i1, i1 0
-  %nop1835 = alloca i1, i1 0
-  %nop1836 = alloca i1, i1 0
-  %nop1837 = alloca i1, i1 0
-  %nop1838 = alloca i1, i1 0
-  %nop1839 = alloca i1, i1 0
-  %nop1840 = alloca i1, i1 0
-  %nop1841 = alloca i1, i1 0
-  %nop1842 = alloca i1, i1 0
-  %nop1843 = alloca i1, i1 0
-  %nop1844 = alloca i1, i1 0
-  %nop1845 = alloca i1, i1 0
-  %nop1846 = alloca i1, i1 0
-  %nop1847 = alloca i1, i1 0
-  %nop1848 = alloca i1, i1 0
-  %nop1849 = alloca i1, i1 0
-  %nop1850 = alloca i1, i1 0
-  %nop1851 = alloca i1, i1 0
-  %nop1852 = alloca i1, i1 0
-  %nop1853 = alloca i1, i1 0
-  %nop1854 = alloca i1, i1 0
-  %nop1855 = alloca i1, i1 0
-  %nop1856 = alloca i1, i1 0
-  %nop1857 = alloca i1, i1 0
-  %nop1858 = alloca i1, i1 0
-  %nop1859 = alloca i1, i1 0
-  %nop1860 = alloca i1, i1 0
-  %nop1861 = alloca i1, i1 0
-  %nop1862 = alloca i1, i1 0
-  %nop1863 = alloca i1, i1 0
-  %nop1864 = alloca i1, i1 0
-  %nop1865 = alloca i1, i1 0
-  %nop1866 = alloca i1, i1 0
-  %nop1867 = alloca i1, i1 0
-  %nop1868 = alloca i1, i1 0
-  %nop1869 = alloca i1, i1 0
-  %nop1870 = alloca i1, i1 0
-  %nop1871 = alloca i1, i1 0
-  %nop1872 = alloca i1, i1 0
-  %nop1873 = alloca i1, i1 0
-  %nop1874 = alloca i1, i1 0
-  %nop1875 = alloca i1, i1 0
-  %nop1876 = alloca i1, i1 0
-  %nop1877 = alloca i1, i1 0
-  %nop1878 = alloca i1, i1 0
-  %nop1879 = alloca i1, i1 0
-  %nop1880 = alloca i1, i1 0
-  %nop1881 = alloca i1, i1 0
-  %nop1882 = alloca i1, i1 0
-  %nop1883 = alloca i1, i1 0
-  %nop1884 = alloca i1, i1 0
-  %nop1885 = alloca i1, i1 0
-  %nop1886 = alloca i1, i1 0
-  %nop1887 = alloca i1, i1 0
-  %nop1888 = alloca i1, i1 0
-  %nop1889 = alloca i1, i1 0
-  %nop1890 = alloca i1, i1 0
-  %nop1891 = alloca i1, i1 0
-  %nop1892 = alloca i1, i1 0
-  %nop1893 = alloca i1, i1 0
-  %nop1894 = alloca i1, i1 0
-  %nop1895 = alloca i1, i1 0
-  %nop1896 = alloca i1, i1 0
-  %nop1897 = alloca i1, i1 0
-  %nop1898 = alloca i1, i1 0
-  %nop1899 = alloca i1, i1 0
-  %nop1900 = alloca i1, i1 0
-  %nop1901 = alloca i1, i1 0
-  %nop1902 = alloca i1, i1 0
-  %nop1903 = alloca i1, i1 0
-  %nop1904 = alloca i1, i1 0
-  %nop1905 = alloca i1, i1 0
-  %nop1906 = alloca i1, i1 0
-  %nop1907 = alloca i1, i1 0
-  %nop1908 = alloca i1, i1 0
-  %nop1909 = alloca i1, i1 0
-  %nop1910 = alloca i1, i1 0
-  %nop1911 = alloca i1, i1 0
-  %nop1912 = alloca i1, i1 0
-  %nop1913 = alloca i1, i1 0
-  %nop1914 = alloca i1, i1 0
-  %nop1915 = alloca i1, i1 0
-  %nop1916 = alloca i1, i1 0
-  %nop1917 = alloca i1, i1 0
-  %nop1918 = alloca i1, i1 0
-  %nop1919 = alloca i1, i1 0
-  %nop1920 = alloca i1, i1 0
-  %nop1921 = alloca i1, i1 0
-  %nop1922 = alloca i1, i1 0
-  %nop1923 = alloca i1, i1 0
-  %nop1924 = alloca i1, i1 0
-  %nop1925 = alloca i1, i1 0
-  %nop1926 = alloca i1, i1 0
-  %nop1927 = alloca i1, i1 0
-  %nop1928 = alloca i1, i1 0
-  %nop1929 = alloca i1, i1 0
-  %nop1930 = alloca i1, i1 0
-  %nop1931 = alloca i1, i1 0
-  %nop1932 = alloca i1, i1 0
-  %nop1933 = alloca i1, i1 0
-  %nop1934 = alloca i1, i1 0
-  %nop1935 = alloca i1, i1 0
-  %nop1936 = alloca i1, i1 0
-  %nop1937 = alloca i1, i1 0
-  %nop1938 = alloca i1, i1 0
-  %nop1939 = alloca i1, i1 0
-  %nop1940 = alloca i1, i1 0
-  %nop1941 = alloca i1, i1 0
-  %nop1942 = alloca i1, i1 0
-  %nop1943 = alloca i1, i1 0
-  %nop1944 = alloca i1, i1 0
-  %nop1945 = alloca i1, i1 0
-  %nop1946 = alloca i1, i1 0
-  %nop1947 = alloca i1, i1 0
-  %nop1948 = alloca i1, i1 0
-  %nop1949 = alloca i1, i1 0
-  %nop1950 = alloca i1, i1 0
-  %nop1951 = alloca i1, i1 0
-  %nop1952 = alloca i1, i1 0
-  %nop1953 = alloca i1, i1 0
-  %nop1954 = alloca i1, i1 0
-  %nop1955 = alloca i1, i1 0
-  %nop1956 = alloca i1, i1 0
-  %nop1957 = alloca i1, i1 0
-  %nop1958 = alloca i1, i1 0
-  %nop1959 = alloca i1, i1 0
-  %nop1960 = alloca i1, i1 0
-  %nop1961 = alloca i1, i1 0
-  %nop1962 = alloca i1, i1 0
-  %nop1963 = alloca i1, i1 0
-  %nop1964 = alloca i1, i1 0
-  %nop1965 = alloca i1, i1 0
-  %nop1966 = alloca i1, i1 0
-  %nop1967 = alloca i1, i1 0
-  %nop1968 = alloca i1, i1 0
-  %nop1969 = alloca i1, i1 0
-  %nop1970 = alloca i1, i1 0
-  %nop1971 = alloca i1, i1 0
-  %nop1972 = alloca i1, i1 0
-  %nop1973 = alloca i1, i1 0
-  %nop1974 = alloca i1, i1 0
-  %nop1975 = alloca i1, i1 0
-  %nop1976 = alloca i1, i1 0
-  %nop1977 = alloca i1, i1 0
-  %nop1978 = alloca i1, i1 0
-  %nop1979 = alloca i1, i1 0
-  %nop1980 = alloca i1, i1 0
-  %nop1981 = alloca i1, i1 0
-  %nop1982 = alloca i1, i1 0
-  %nop1983 = alloca i1, i1 0
-  %nop1984 = alloca i1, i1 0
-  %nop1985 = alloca i1, i1 0
-  %nop1986 = alloca i1, i1 0
-  %nop1987 = alloca i1, i1 0
-  %nop1988 = alloca i1, i1 0
-  %nop1989 = alloca i1, i1 0
-  %nop1990 = alloca i1, i1 0
-  %nop1991 = alloca i1, i1 0
-  %nop1992 = alloca i1, i1 0
-  %nop1993 = alloca i1, i1 0
-  %nop1994 = alloca i1, i1 0
-  %nop1995 = alloca i1, i1 0
-  %nop1996 = alloca i1, i1 0
-  %nop1997 = alloca i1, i1 0
-  %nop1998 = alloca i1, i1 0
-  %nop1999 = alloca i1, i1 0
-  %nop2000 = alloca i1, i1 0
-  %nop2001 = alloca i1, i1 0
-  %nop2002 = alloca i1, i1 0
-  %nop2003 = alloca i1, i1 0
-  %nop2004 = alloca i1, i1 0
-  %nop2005 = alloca i1, i1 0
-  %nop2006 = alloca i1, i1 0
-  %nop2007 = alloca i1, i1 0
-  %nop2008 = alloca i1, i1 0
-  %nop2009 = alloca i1, i1 0
-  %nop2010 = alloca i1, i1 0
-  %nop2011 = alloca i1, i1 0
-  %nop2012 = alloca i1, i1 0
-  %nop2013 = alloca i1, i1 0
-  %nop2014 = alloca i1, i1 0
-  %nop2015 = alloca i1, i1 0
-  %nop2016 = alloca i1, i1 0
-  %nop2017 = alloca i1, i1 0
-  %nop2018 = alloca i1, i1 0
-  %nop2019 = alloca i1, i1 0
-  %nop2020 = alloca i1, i1 0
-  %nop2021 = alloca i1, i1 0
-  %nop2022 = alloca i1, i1 0
-  %nop2023 = alloca i1, i1 0
-  %nop2024 = alloca i1, i1 0
-  %nop2025 = alloca i1, i1 0
-  %nop2026 = alloca i1, i1 0
-  %nop2027 = alloca i1, i1 0
-  %nop2028 = alloca i1, i1 0
-  %nop2029 = alloca i1, i1 0
-  %nop2030 = alloca i1, i1 0
-  %nop2031 = alloca i1, i1 0
-  %nop2032 = alloca i1, i1 0
-  %nop2033 = alloca i1, i1 0
-  %nop2034 = alloca i1, i1 0
-  %nop2035 = alloca i1, i1 0
-  %nop2036 = alloca i1, i1 0
-  %nop2037 = alloca i1, i1 0
-  %nop2038 = alloca i1, i1 0
-  %nop2039 = alloca i1, i1 0
-  %nop2040 = alloca i1, i1 0
-  %nop2041 = alloca i1, i1 0
-  %nop2042 = alloca i1, i1 0
-  %nop2043 = alloca i1, i1 0
-  %nop2044 = alloca i1, i1 0
-  %nop2045 = alloca i1, i1 0
-  %nop2046 = alloca i1, i1 0
-  %nop2047 = alloca i1, i1 0
-  %nop2048 = alloca i1, i1 0
-  %nop2049 = alloca i1, i1 0
-  %nop2050 = alloca i1, i1 0
-  %nop2051 = alloca i1, i1 0
-  %nop2052 = alloca i1, i1 0
-  %nop2053 = alloca i1, i1 0
-  %nop2054 = alloca i1, i1 0
-  %nop2055 = alloca i1, i1 0
-  %nop2056 = alloca i1, i1 0
-  %nop2057 = alloca i1, i1 0
-  %nop2058 = alloca i1, i1 0
-  %nop2059 = alloca i1, i1 0
-  %nop2060 = alloca i1, i1 0
-  %nop2061 = alloca i1, i1 0
-  %nop2062 = alloca i1, i1 0
-  %nop2063 = alloca i1, i1 0
-  %nop2064 = alloca i1, i1 0
-  %nop2065 = alloca i1, i1 0
-  %nop2066 = alloca i1, i1 0
-  %nop2067 = alloca i1, i1 0
-  %nop2068 = alloca i1, i1 0
-  %nop2069 = alloca i1, i1 0
-  %nop2070 = alloca i1, i1 0
-  %nop2071 = alloca i1, i1 0
-  %nop2072 = alloca i1, i1 0
-  %nop2073 = alloca i1, i1 0
-  %nop2074 = alloca i1, i1 0
-  %nop2075 = alloca i1, i1 0
-  %nop2076 = alloca i1, i1 0
-  %nop2077 = alloca i1, i1 0
-  %nop2078 = alloca i1, i1 0
-  %nop2079 = alloca i1, i1 0
-  %nop2080 = alloca i1, i1 0
-  %nop2081 = alloca i1, i1 0
-  %nop2082 = alloca i1, i1 0
-  %nop2083 = alloca i1, i1 0
-  %nop2084 = alloca i1, i1 0
-  %nop2085 = alloca i1, i1 0
-  %nop2086 = alloca i1, i1 0
-  %nop2087 = alloca i1, i1 0
-  %nop2088 = alloca i1, i1 0
-  %nop2089 = alloca i1, i1 0
-  %nop2090 = alloca i1, i1 0
-  %nop2091 = alloca i1, i1 0
-  %nop2092 = alloca i1, i1 0
-  %nop2093 = alloca i1, i1 0
-  %nop2094 = alloca i1, i1 0
-  %nop2095 = alloca i1, i1 0
-  %nop2096 = alloca i1, i1 0
-  %nop2097 = alloca i1, i1 0
-  %nop2098 = alloca i1, i1 0
-  %nop2099 = alloca i1, i1 0
-  %nop2100 = alloca i1, i1 0
-  %nop2101 = alloca i1, i1 0
-  %nop2102 = alloca i1, i1 0
-  %nop2103 = alloca i1, i1 0
-  %nop2104 = alloca i1, i1 0
-  %nop2105 = alloca i1, i1 0
-  %nop2106 = alloca i1, i1 0
-  %nop2107 = alloca i1, i1 0
-  %nop2108 = alloca i1, i1 0
-  %nop2109 = alloca i1, i1 0
-  %nop2110 = alloca i1, i1 0
-  %nop2111 = alloca i1, i1 0
-  %nop2112 = alloca i1, i1 0
-  %nop2113 = alloca i1, i1 0
-  %nop2114 = alloca i1, i1 0
-  %nop2115 = alloca i1, i1 0
-  %nop2116 = alloca i1, i1 0
-  %nop2117 = alloca i1, i1 0
-  %nop2118 = alloca i1, i1 0
-  %nop2119 = alloca i1, i1 0
-  %nop2120 = alloca i1, i1 0
-  %nop2121 = alloca i1, i1 0
-  %nop2122 = alloca i1, i1 0
-  %nop2123 = alloca i1, i1 0
-  %nop2124 = alloca i1, i1 0
-  %nop2125 = alloca i1, i1 0
-  %nop2126 = alloca i1, i1 0
-  %nop2127 = alloca i1, i1 0
-  %nop2128 = alloca i1, i1 0
-  %nop2129 = alloca i1, i1 0
-  %nop2130 = alloca i1, i1 0
-  %nop2131 = alloca i1, i1 0
-  %nop2132 = alloca i1, i1 0
-  %nop2133 = alloca i1, i1 0
-  %nop2134 = alloca i1, i1 0
-  %nop2135 = alloca i1, i1 0
-  %nop2136 = alloca i1, i1 0
-  %nop2137 = alloca i1, i1 0
-  %nop2138 = alloca i1, i1 0
-  %nop2139 = alloca i1, i1 0
-  %nop2140 = alloca i1, i1 0
-  %nop2141 = alloca i1, i1 0
-  %nop2142 = alloca i1, i1 0
-  %nop2143 = alloca i1, i1 0
-  %nop2144 = alloca i1, i1 0
-  %nop2145 = alloca i1, i1 0
-  %nop2146 = alloca i1, i1 0
-  %nop2147 = alloca i1, i1 0
-  %nop2148 = alloca i1, i1 0
-  %nop2149 = alloca i1, i1 0
-  %nop2150 = alloca i1, i1 0
-  %nop2151 = alloca i1, i1 0
-  %nop2152 = alloca i1, i1 0
-  %nop2153 = alloca i1, i1 0
-  %nop2154 = alloca i1, i1 0
-  %nop2155 = alloca i1, i1 0
-  %nop2156 = alloca i1, i1 0
-  %nop2157 = alloca i1, i1 0
-  %nop2158 = alloca i1, i1 0
-  %nop2159 = alloca i1, i1 0
-  %nop2160 = alloca i1, i1 0
-  %nop2161 = alloca i1, i1 0
-  %nop2162 = alloca i1, i1 0
-  %nop2163 = alloca i1, i1 0
-  %nop2164 = alloca i1, i1 0
-  %nop2165 = alloca i1, i1 0
-  %nop2166 = alloca i1, i1 0
-  %nop2167 = alloca i1, i1 0
-  %nop2168 = alloca i1, i1 0
-  %nop2169 = alloca i1, i1 0
-  %nop2170 = alloca i1, i1 0
-  %nop2171 = alloca i1, i1 0
-  %nop2172 = alloca i1, i1 0
-  %nop2173 = alloca i1, i1 0
-  %nop2174 = alloca i1, i1 0
-  %nop2175 = alloca i1, i1 0
-  %nop2176 = alloca i1, i1 0
-  %nop2177 = alloca i1, i1 0
-  %nop2178 = alloca i1, i1 0
-  %nop2179 = alloca i1, i1 0
-  %nop2180 = alloca i1, i1 0
-  %nop2181 = alloca i1, i1 0
-  %nop2182 = alloca i1, i1 0
-  %nop2183 = alloca i1, i1 0
-  %nop2184 = alloca i1, i1 0
-  %nop2185 = alloca i1, i1 0
-  %nop2186 = alloca i1, i1 0
-  %nop2187 = alloca i1, i1 0
-  %nop2188 = alloca i1, i1 0
-  %nop2189 = alloca i1, i1 0
-  %nop2190 = alloca i1, i1 0
-  %nop2191 = alloca i1, i1 0
-  %nop2192 = alloca i1, i1 0
-  %nop2193 = alloca i1, i1 0
-  %nop2194 = alloca i1, i1 0
-  %nop2195 = alloca i1, i1 0
-  %nop2196 = alloca i1, i1 0
-  %nop2197 = alloca i1, i1 0
-  %nop2198 = alloca i1, i1 0
-  %nop2199 = alloca i1, i1 0
-  %nop2200 = alloca i1, i1 0
-  %nop2201 = alloca i1, i1 0
-  %nop2202 = alloca i1, i1 0
-  %nop2203 = alloca i1, i1 0
-  %nop2204 = alloca i1, i1 0
-  %nop2205 = alloca i1, i1 0
-  %nop2206 = alloca i1, i1 0
-  %nop2207 = alloca i1, i1 0
-  %nop2208 = alloca i1, i1 0
-  %nop2209 = alloca i1, i1 0
-  %nop2210 = alloca i1, i1 0
-  %nop2211 = alloca i1, i1 0
-  %nop2212 = alloca i1, i1 0
-  %nop2213 = alloca i1, i1 0
-  %nop2214 = alloca i1, i1 0
-  %nop2215 = alloca i1, i1 0
-  %nop2216 = alloca i1, i1 0
-  %nop2217 = alloca i1, i1 0
-  %nop2218 = alloca i1, i1 0
-  %nop2219 = alloca i1, i1 0
-  %nop2220 = alloca i1, i1 0
-  %nop2221 = alloca i1, i1 0
-  %nop2222 = alloca i1, i1 0
-  %nop2223 = alloca i1, i1 0
-  %nop2224 = alloca i1, i1 0
-  %nop2225 = alloca i1, i1 0
-  %nop2226 = alloca i1, i1 0
-  %nop2227 = alloca i1, i1 0
-  %nop2228 = alloca i1, i1 0
-  %nop2229 = alloca i1, i1 0
-  %nop2230 = alloca i1, i1 0
-  %nop2231 = alloca i1, i1 0
-  %nop2232 = alloca i1, i1 0
-  %nop2233 = alloca i1, i1 0
-  %nop2234 = alloca i1, i1 0
-  %nop2235 = alloca i1, i1 0
-  %nop2236 = alloca i1, i1 0
-  %nop2237 = alloca i1, i1 0
-  %nop2238 = alloca i1, i1 0
-  %nop2239 = alloca i1, i1 0
-  %nop2240 = alloca i1, i1 0
-  %nop2241 = alloca i1, i1 0
-  %nop2242 = alloca i1, i1 0
-  %nop2243 = alloca i1, i1 0
-  %nop2244 = alloca i1, i1 0
-  %nop2245 = alloca i1, i1 0
-  %nop2246 = alloca i1, i1 0
-  %nop2247 = alloca i1, i1 0
-  %nop2248 = alloca i1, i1 0
-  %nop2249 = alloca i1, i1 0
-  %nop2250 = alloca i1, i1 0
-  %nop2251 = alloca i1, i1 0
-  %nop2252 = alloca i1, i1 0
-  %nop2253 = alloca i1, i1 0
-  %nop2254 = alloca i1, i1 0
-  %nop2255 = alloca i1, i1 0
-  %nop2256 = alloca i1, i1 0
-  %nop2257 = alloca i1, i1 0
-  %nop2258 = alloca i1, i1 0
-  %nop2259 = alloca i1, i1 0
-  %nop2260 = alloca i1, i1 0
-  %nop2261 = alloca i1, i1 0
-  %nop2262 = alloca i1, i1 0
-  %nop2263 = alloca i1, i1 0
-  %nop2264 = alloca i1, i1 0
-  %nop2265 = alloca i1, i1 0
-  %nop2266 = alloca i1, i1 0
-  %nop2267 = alloca i1, i1 0
-  %nop2268 = alloca i1, i1 0
-  %nop2269 = alloca i1, i1 0
-  %nop2270 = alloca i1, i1 0
-  %nop2271 = alloca i1, i1 0
-  %nop2272 = alloca i1, i1 0
-  %nop2273 = alloca i1, i1 0
-  %nop2274 = alloca i1, i1 0
-  %nop2275 = alloca i1, i1 0
-  %nop2276 = alloca i1, i1 0
-  %nop2277 = alloca i1, i1 0
-  %nop2278 = alloca i1, i1 0
-  %nop2279 = alloca i1, i1 0
-  %nop2280 = alloca i1, i1 0
-  %nop2281 = alloca i1, i1 0
-  %nop2282 = alloca i1, i1 0
-  %nop2283 = alloca i1, i1 0
-  %nop2284 = alloca i1, i1 0
-  %nop2285 = alloca i1, i1 0
-  %nop2286 = alloca i1, i1 0
-  %nop2287 = alloca i1, i1 0
-  %nop2288 = alloca i1, i1 0
-  %nop2289 = alloca i1, i1 0
-  %nop2290 = alloca i1, i1 0
-  %nop2291 = alloca i1, i1 0
-  %nop2292 = alloca i1, i1 0
-  %nop2293 = alloca i1, i1 0
-  %nop2294 = alloca i1, i1 0
-  %nop2295 = alloca i1, i1 0
-  %nop2296 = alloca i1, i1 0
-  %nop2297 = alloca i1, i1 0
-  %nop2298 = alloca i1, i1 0
-  %nop2299 = alloca i1, i1 0
-  %nop2300 = alloca i1, i1 0
-  %nop2301 = alloca i1, i1 0
-  %nop2302 = alloca i1, i1 0
-  %nop2303 = alloca i1, i1 0
-  %nop2304 = alloca i1, i1 0
-  %nop2305 = alloca i1, i1 0
-  %nop2306 = alloca i1, i1 0
-  %nop2307 = alloca i1, i1 0
-  %nop2308 = alloca i1, i1 0
-  %nop2309 = alloca i1, i1 0
-  %nop2310 = alloca i1, i1 0
-  %nop2311 = alloca i1, i1 0
-  %nop2312 = alloca i1, i1 0
-  %nop2313 = alloca i1, i1 0
-  %nop2314 = alloca i1, i1 0
-  %nop2315 = alloca i1, i1 0
-  %nop2316 = alloca i1, i1 0
-  %nop2317 = alloca i1, i1 0
-  %nop2318 = alloca i1, i1 0
-  %nop2319 = alloca i1, i1 0
-  %nop2320 = alloca i1, i1 0
-  %nop2321 = alloca i1, i1 0
-  %nop2322 = alloca i1, i1 0
-  %nop2323 = alloca i1, i1 0
-  %nop2324 = alloca i1, i1 0
-  %nop2325 = alloca i1, i1 0
-  %nop2326 = alloca i1, i1 0
-  %nop2327 = alloca i1, i1 0
-  %nop2328 = alloca i1, i1 0
-  %nop2329 = alloca i1, i1 0
-  %nop2330 = alloca i1, i1 0
-  %nop2331 = alloca i1, i1 0
-  %nop2332 = alloca i1, i1 0
-  %nop2333 = alloca i1, i1 0
-  %nop2334 = alloca i1, i1 0
-  %nop2335 = alloca i1, i1 0
-  %nop2336 = alloca i1, i1 0
-  %nop2337 = alloca i1, i1 0
-  %nop2338 = alloca i1, i1 0
-  %nop2339 = alloca i1, i1 0
-  %nop2340 = alloca i1, i1 0
-  %nop2341 = alloca i1, i1 0
-  %nop2342 = alloca i1, i1 0
-  %nop2343 = alloca i1, i1 0
-  %nop2344 = alloca i1, i1 0
-  %nop2345 = alloca i1, i1 0
-  %nop2346 = alloca i1, i1 0
-  %nop2347 = alloca i1, i1 0
-  %nop2348 = alloca i1, i1 0
-  %nop2349 = alloca i1, i1 0
-  %nop2350 = alloca i1, i1 0
-  %nop2351 = alloca i1, i1 0
-  %nop2352 = alloca i1, i1 0
-  %nop2353 = alloca i1, i1 0
-  %nop2354 = alloca i1, i1 0
-  %nop2355 = alloca i1, i1 0
-  %nop2356 = alloca i1, i1 0
-  %nop2357 = alloca i1, i1 0
-  %nop2358 = alloca i1, i1 0
-  %nop2359 = alloca i1, i1 0
-  %nop2360 = alloca i1, i1 0
-  %nop2361 = alloca i1, i1 0
-  %nop2362 = alloca i1, i1 0
-  %nop2363 = alloca i1, i1 0
-  %nop2364 = alloca i1, i1 0
-  %nop2365 = alloca i1, i1 0
-  %nop2366 = alloca i1, i1 0
-  %nop2367 = alloca i1, i1 0
-  %nop2368 = alloca i1, i1 0
-  %nop2369 = alloca i1, i1 0
-  %nop2370 = alloca i1, i1 0
-  %nop2371 = alloca i1, i1 0
-  %nop2372 = alloca i1, i1 0
-  %nop2373 = alloca i1, i1 0
-  %nop2374 = alloca i1, i1 0
-  %nop2375 = alloca i1, i1 0
-  %nop2376 = alloca i1, i1 0
-  %nop2377 = alloca i1, i1 0
-  %nop2378 = alloca i1, i1 0
-  %nop2379 = alloca i1, i1 0
-  %nop2380 = alloca i1, i1 0
-  %nop2381 = alloca i1, i1 0
-  %nop2382 = alloca i1, i1 0
-  %nop2383 = alloca i1, i1 0
-  %nop2384 = alloca i1, i1 0
-  %nop2385 = alloca i1, i1 0
-  %nop2386 = alloca i1, i1 0
-  %nop2387 = alloca i1, i1 0
-  %nop2388 = alloca i1, i1 0
-  %nop2389 = alloca i1, i1 0
-  %nop2390 = alloca i1, i1 0
-  %nop2391 = alloca i1, i1 0
-  %nop2392 = alloca i1, i1 0
-  %nop2393 = alloca i1, i1 0
-  %nop2394 = alloca i1, i1 0
-  %nop2395 = alloca i1, i1 0
-  %nop2396 = alloca i1, i1 0
-  %nop2397 = alloca i1, i1 0
-  %nop2398 = alloca i1, i1 0
-  %nop2399 = alloca i1, i1 0
-  %nop2400 = alloca i1, i1 0
-  %nop2401 = alloca i1, i1 0
-  %nop2402 = alloca i1, i1 0
-  %nop2403 = alloca i1, i1 0
-  %nop2404 = alloca i1, i1 0
-  %nop2405 = alloca i1, i1 0
-  %nop2406 = alloca i1, i1 0
-  %nop2407 = alloca i1, i1 0
-  %nop2408 = alloca i1, i1 0
-  %nop2409 = alloca i1, i1 0
-  %nop2410 = alloca i1, i1 0
-  %nop2411 = alloca i1, i1 0
-  %nop2412 = alloca i1, i1 0
-  %nop2413 = alloca i1, i1 0
-  %nop2414 = alloca i1, i1 0
-  %nop2415 = alloca i1, i1 0
-  %nop2416 = alloca i1, i1 0
-  %nop2417 = alloca i1, i1 0
-  %nop2418 = alloca i1, i1 0
-  %nop2419 = alloca i1, i1 0
-  %nop2420 = alloca i1, i1 0
-  %nop2421 = alloca i1, i1 0
-  %nop2422 = alloca i1, i1 0
-  %nop2423 = alloca i1, i1 0
-  %nop2424 = alloca i1, i1 0
-  %nop2425 = alloca i1, i1 0
-  %nop2426 = alloca i1, i1 0
-  %nop2427 = alloca i1, i1 0
-  %nop2428 = alloca i1, i1 0
-  %nop2429 = alloca i1, i1 0
-  %nop2430 = alloca i1, i1 0
-  %nop2431 = alloca i1, i1 0
-  %nop2432 = alloca i1, i1 0
-  %nop2433 = alloca i1, i1 0
-  %nop2434 = alloca i1, i1 0
-  %nop2435 = alloca i1, i1 0
-  %nop2436 = alloca i1, i1 0
-  %nop2437 = alloca i1, i1 0
-  %nop2438 = alloca i1, i1 0
-  %nop2439 = alloca i1, i1 0
-  %nop2440 = alloca i1, i1 0
-  %nop2441 = alloca i1, i1 0
-  %nop2442 = alloca i1, i1 0
-  %nop2443 = alloca i1, i1 0
-  %nop2444 = alloca i1, i1 0
-  %nop2445 = alloca i1, i1 0
-  %nop2446 = alloca i1, i1 0
-  %nop2447 = alloca i1, i1 0
-  %nop2448 = alloca i1, i1 0
-  %nop2449 = alloca i1, i1 0
-  %nop2450 = alloca i1, i1 0
-  %nop2451 = alloca i1, i1 0
-  %nop2452 = alloca i1, i1 0
-  %nop2453 = alloca i1, i1 0
-  %nop2454 = alloca i1, i1 0
-  %nop2455 = alloca i1, i1 0
-  %nop2456 = alloca i1, i1 0
-  %nop2457 = alloca i1, i1 0
-  %nop2458 = alloca i1, i1 0
-  %nop2459 = alloca i1, i1 0
-  %nop2460 = alloca i1, i1 0
-  %nop2461 = alloca i1, i1 0
-  %nop2462 = alloca i1, i1 0
-  %nop2463 = alloca i1, i1 0
-  %nop2464 = alloca i1, i1 0
-  %nop2465 = alloca i1, i1 0
-  %nop2466 = alloca i1, i1 0
-  %nop2467 = alloca i1, i1 0
-  %nop2468 = alloca i1, i1 0
-  %nop2469 = alloca i1, i1 0
-  %nop2470 = alloca i1, i1 0
-  %nop2471 = alloca i1, i1 0
-  %nop2472 = alloca i1, i1 0
-  %nop2473 = alloca i1, i1 0
-  %nop2474 = alloca i1, i1 0
-  %nop2475 = alloca i1, i1 0
-  %nop2476 = alloca i1, i1 0
-  %nop2477 = alloca i1, i1 0
-  %nop2478 = alloca i1, i1 0
-  %nop2479 = alloca i1, i1 0
-  %nop2480 = alloca i1, i1 0
-  %nop2481 = alloca i1, i1 0
-  %nop2482 = alloca i1, i1 0
-  %nop2483 = alloca i1, i1 0
-  %nop2484 = alloca i1, i1 0
-  %nop2485 = alloca i1, i1 0
-  %nop2486 = alloca i1, i1 0
-  %nop2487 = alloca i1, i1 0
-  %nop2488 = alloca i1, i1 0
-  %nop2489 = alloca i1, i1 0
-  %nop2490 = alloca i1, i1 0
-  %nop2491 = alloca i1, i1 0
-  %nop2492 = alloca i1, i1 0
-  %nop2493 = alloca i1, i1 0
-  %nop2494 = alloca i1, i1 0
-  %nop2495 = alloca i1, i1 0
-  %nop2496 = alloca i1, i1 0
-  %nop2497 = alloca i1, i1 0
-  %nop2498 = alloca i1, i1 0
-  %nop2499 = alloca i1, i1 0
-  %nop2500 = alloca i1, i1 0
-  %nop2501 = alloca i1, i1 0
-  %nop2502 = alloca i1, i1 0
-  %nop2503 = alloca i1, i1 0
-  %nop2504 = alloca i1, i1 0
-  %nop2505 = alloca i1, i1 0
-  %nop2506 = alloca i1, i1 0
-  %nop2507 = alloca i1, i1 0
-  %nop2508 = alloca i1, i1 0
-  %nop2509 = alloca i1, i1 0
-  %nop2510 = alloca i1, i1 0
-  %nop2511 = alloca i1, i1 0
-  %nop2512 = alloca i1, i1 0
-  %nop2513 = alloca i1, i1 0
-  %nop2514 = alloca i1, i1 0
-  %nop2515 = alloca i1, i1 0
-  %nop2516 = alloca i1, i1 0
-  %nop2517 = alloca i1, i1 0
-  %nop2518 = alloca i1, i1 0
-  %nop2519 = alloca i1, i1 0
-  %nop2520 = alloca i1, i1 0
-  %nop2521 = alloca i1, i1 0
-  %nop2522 = alloca i1, i1 0
-  %nop2523 = alloca i1, i1 0
-  %nop2524 = alloca i1, i1 0
-  %nop2525 = alloca i1, i1 0
-  %nop2526 = alloca i1, i1 0
-  %nop2527 = alloca i1, i1 0
-  %nop2528 = alloca i1, i1 0
-  %nop2529 = alloca i1, i1 0
-  %nop2530 = alloca i1, i1 0
-  %nop2531 = alloca i1, i1 0
-  %nop2532 = alloca i1, i1 0
-  %nop2533 = alloca i1, i1 0
-  %nop2534 = alloca i1, i1 0
-  %nop2535 = alloca i1, i1 0
-  %nop2536 = alloca i1, i1 0
-  %nop2537 = alloca i1, i1 0
-  %nop2538 = alloca i1, i1 0
-  %nop2539 = alloca i1, i1 0
-  %nop2540 = alloca i1, i1 0
-  %nop2541 = alloca i1, i1 0
-  %nop2542 = alloca i1, i1 0
-  %nop2543 = alloca i1, i1 0
-  %nop2544 = alloca i1, i1 0
-  %nop2545 = alloca i1, i1 0
-  %nop2546 = alloca i1, i1 0
-  %nop2547 = alloca i1, i1 0
-  %nop2548 = alloca i1, i1 0
-  %nop2549 = alloca i1, i1 0
-  %nop2550 = alloca i1, i1 0
-  %nop2551 = alloca i1, i1 0
-  %nop2552 = alloca i1, i1 0
-  %nop2553 = alloca i1, i1 0
-  %nop2554 = alloca i1, i1 0
-  %nop2555 = alloca i1, i1 0
-  %nop2556 = alloca i1, i1 0
-  %nop2557 = alloca i1, i1 0
-  %nop2558 = alloca i1, i1 0
-  %nop2559 = alloca i1, i1 0
-  %nop2560 = alloca i1, i1 0
-  %nop2561 = alloca i1, i1 0
-  %nop2562 = alloca i1, i1 0
-  %nop2563 = alloca i1, i1 0
-  %nop2564 = alloca i1, i1 0
-  %nop2565 = alloca i1, i1 0
-  %nop2566 = alloca i1, i1 0
-  %nop2567 = alloca i1, i1 0
-  %nop2568 = alloca i1, i1 0
-  %nop2569 = alloca i1, i1 0
-  %nop2570 = alloca i1, i1 0
-  %nop2571 = alloca i1, i1 0
-  %nop2572 = alloca i1, i1 0
-  %nop2573 = alloca i1, i1 0
-  %nop2574 = alloca i1, i1 0
-  %nop2575 = alloca i1, i1 0
-  %nop2576 = alloca i1, i1 0
-  %nop2577 = alloca i1, i1 0
-  %nop2578 = alloca i1, i1 0
-  %nop2579 = alloca i1, i1 0
-  %nop2580 = alloca i1, i1 0
-  %nop2581 = alloca i1, i1 0
-  %nop2582 = alloca i1, i1 0
-  %nop2583 = alloca i1, i1 0
-  %nop2584 = alloca i1, i1 0
-  %nop2585 = alloca i1, i1 0
-  %nop2586 = alloca i1, i1 0
-  %nop2587 = alloca i1, i1 0
-  %nop2588 = alloca i1, i1 0
-  %nop2589 = alloca i1, i1 0
-  %nop2590 = alloca i1, i1 0
-  %nop2591 = alloca i1, i1 0
-  %nop2592 = alloca i1, i1 0
-  %nop2593 = alloca i1, i1 0
-  %nop2594 = alloca i1, i1 0
-  %nop2595 = alloca i1, i1 0
-  %nop2596 = alloca i1, i1 0
-  %nop2597 = alloca i1, i1 0
-  %nop2598 = alloca i1, i1 0
-  %nop2599 = alloca i1, i1 0
-  %nop2600 = alloca i1, i1 0
-  %nop2601 = alloca i1, i1 0
-  %nop2602 = alloca i1, i1 0
-  %nop2603 = alloca i1, i1 0
-  %nop2604 = alloca i1, i1 0
-  %nop2605 = alloca i1, i1 0
-  %nop2606 = alloca i1, i1 0
-  %nop2607 = alloca i1, i1 0
-  %nop2608 = alloca i1, i1 0
-  %nop2609 = alloca i1, i1 0
-  %nop2610 = alloca i1, i1 0
-  %nop2611 = alloca i1, i1 0
-  %nop2612 = alloca i1, i1 0
-  %nop2613 = alloca i1, i1 0
-  %nop2614 = alloca i1, i1 0
-  %nop2615 = alloca i1, i1 0
-  %nop2616 = alloca i1, i1 0
-  %nop2617 = alloca i1, i1 0
-  %nop2618 = alloca i1, i1 0
-  %nop2619 = alloca i1, i1 0
-  %nop2620 = alloca i1, i1 0
-  %nop2621 = alloca i1, i1 0
-  %nop2622 = alloca i1, i1 0
-  %nop2623 = alloca i1, i1 0
-  %nop2624 = alloca i1, i1 0
-  %nop2625 = alloca i1, i1 0
-  %nop2626 = alloca i1, i1 0
-  %nop2627 = alloca i1, i1 0
-  %nop2628 = alloca i1, i1 0
-  %nop2629 = alloca i1, i1 0
-  %nop2630 = alloca i1, i1 0
-  %nop2631 = alloca i1, i1 0
-  %nop2632 = alloca i1, i1 0
-  %nop2633 = alloca i1, i1 0
-  %nop2634 = alloca i1, i1 0
-  %nop2635 = alloca i1, i1 0
-  %nop2636 = alloca i1, i1 0
-  %nop2637 = alloca i1, i1 0
-  %nop2638 = alloca i1, i1 0
-  %nop2639 = alloca i1, i1 0
-  %nop2640 = alloca i1, i1 0
-  %nop2641 = alloca i1, i1 0
-  %nop2642 = alloca i1, i1 0
-  %nop2643 = alloca i1, i1 0
-  %nop2644 = alloca i1, i1 0
-  %nop2645 = alloca i1, i1 0
-  %nop2646 = alloca i1, i1 0
-  %nop2647 = alloca i1, i1 0
-  %nop2648 = alloca i1, i1 0
-  %nop2649 = alloca i1, i1 0
-  %nop2650 = alloca i1, i1 0
-  %nop2651 = alloca i1, i1 0
-  %nop2652 = alloca i1, i1 0
-  %nop2653 = alloca i1, i1 0
-  %nop2654 = alloca i1, i1 0
-  %nop2655 = alloca i1, i1 0
-  %nop2656 = alloca i1, i1 0
-  %nop2657 = alloca i1, i1 0
-  %nop2658 = alloca i1, i1 0
-  %nop2659 = alloca i1, i1 0
-  %nop2660 = alloca i1, i1 0
-  %nop2661 = alloca i1, i1 0
-  %nop2662 = alloca i1, i1 0
-  %nop2663 = alloca i1, i1 0
-  %nop2664 = alloca i1, i1 0
-  %nop2665 = alloca i1, i1 0
-  %nop2666 = alloca i1, i1 0
-  %nop2667 = alloca i1, i1 0
-  %nop2668 = alloca i1, i1 0
-  %nop2669 = alloca i1, i1 0
-  %nop2670 = alloca i1, i1 0
-  %nop2671 = alloca i1, i1 0
-  %nop2672 = alloca i1, i1 0
-  %nop2673 = alloca i1, i1 0
-  %nop2674 = alloca i1, i1 0
-  %nop2675 = alloca i1, i1 0
-  %nop2676 = alloca i1, i1 0
-  %nop2677 = alloca i1, i1 0
-  %nop2678 = alloca i1, i1 0
-  %nop2679 = alloca i1, i1 0
-  %nop2680 = alloca i1, i1 0
-  %nop2681 = alloca i1, i1 0
-  %nop2682 = alloca i1, i1 0
-  %nop2683 = alloca i1, i1 0
-  %nop2684 = alloca i1, i1 0
-  %nop2685 = alloca i1, i1 0
-  %nop2686 = alloca i1, i1 0
-  %nop2687 = alloca i1, i1 0
-  %nop2688 = alloca i1, i1 0
-  %nop2689 = alloca i1, i1 0
-  %nop2690 = alloca i1, i1 0
-  %nop2691 = alloca i1, i1 0
-  %nop2692 = alloca i1, i1 0
-  %nop2693 = alloca i1, i1 0
-  %nop2694 = alloca i1, i1 0
-  %nop2695 = alloca i1, i1 0
-  %nop2696 = alloca i1, i1 0
-  %nop2697 = alloca i1, i1 0
-  %nop2698 = alloca i1, i1 0
-  %nop2699 = alloca i1, i1 0
-  %nop2700 = alloca i1, i1 0
-  %nop2701 = alloca i1, i1 0
-  %nop2702 = alloca i1, i1 0
-  %nop2703 = alloca i1, i1 0
-  %nop2704 = alloca i1, i1 0
-  %nop2705 = alloca i1, i1 0
-  %nop2706 = alloca i1, i1 0
-  %nop2707 = alloca i1, i1 0
-  %nop2708 = alloca i1, i1 0
-  %nop2709 = alloca i1, i1 0
-  %nop2710 = alloca i1, i1 0
-  %nop2711 = alloca i1, i1 0
-  %nop2712 = alloca i1, i1 0
-  %nop2713 = alloca i1, i1 0
-  %nop2714 = alloca i1, i1 0
-  %nop2715 = alloca i1, i1 0
-  %nop2716 = alloca i1, i1 0
-  %nop2717 = alloca i1, i1 0
-  %nop2718 = alloca i1, i1 0
-  %nop2719 = alloca i1, i1 0
-  %nop2720 = alloca i1, i1 0
-  %nop2721 = alloca i1, i1 0
-  %nop2722 = alloca i1, i1 0
-  %nop2723 = alloca i1, i1 0
-  %nop2724 = alloca i1, i1 0
-  %nop2725 = alloca i1, i1 0
-  %nop2726 = alloca i1, i1 0
-  %nop2727 = alloca i1, i1 0
-  %nop2728 = alloca i1, i1 0
-  %nop2729 = alloca i1, i1 0
-  %nop2730 = alloca i1, i1 0
-  %nop2731 = alloca i1, i1 0
-  %nop2732 = alloca i1, i1 0
-  %nop2733 = alloca i1, i1 0
-  %nop2734 = alloca i1, i1 0
-  %nop2735 = alloca i1, i1 0
-  %nop2736 = alloca i1, i1 0
-  %nop2737 = alloca i1, i1 0
-  %nop2738 = alloca i1, i1 0
-  %nop2739 = alloca i1, i1 0
-  %nop2740 = alloca i1, i1 0
-  %nop2741 = alloca i1, i1 0
-  %nop2742 = alloca i1, i1 0
-  %nop2743 = alloca i1, i1 0
-  %nop2744 = alloca i1, i1 0
-  %nop2745 = alloca i1, i1 0
-  %nop2746 = alloca i1, i1 0
-  %nop2747 = alloca i1, i1 0
-  %nop2748 = alloca i1, i1 0
-  %nop2749 = alloca i1, i1 0
-  %nop2750 = alloca i1, i1 0
-  %nop2751 = alloca i1, i1 0
-  %nop2752 = alloca i1, i1 0
-  %nop2753 = alloca i1, i1 0
-  %nop2754 = alloca i1, i1 0
-  %nop2755 = alloca i1, i1 0
-  %nop2756 = alloca i1, i1 0
-  %nop2757 = alloca i1, i1 0
-  %nop2758 = alloca i1, i1 0
-  %nop2759 = alloca i1, i1 0
-  %nop2760 = alloca i1, i1 0
-  %nop2761 = alloca i1, i1 0
-  %nop2762 = alloca i1, i1 0
-  %nop2763 = alloca i1, i1 0
-  %nop2764 = alloca i1, i1 0
-  %nop2765 = alloca i1, i1 0
-  %nop2766 = alloca i1, i1 0
-  %nop2767 = alloca i1, i1 0
-  %nop2768 = alloca i1, i1 0
-  %nop2769 = alloca i1, i1 0
-  %nop2770 = alloca i1, i1 0
-  %nop2771 = alloca i1, i1 0
-  %nop2772 = alloca i1, i1 0
-  %nop2773 = alloca i1, i1 0
-  %nop2774 = alloca i1, i1 0
-  %nop2775 = alloca i1, i1 0
-  %nop2776 = alloca i1, i1 0
-  %nop2777 = alloca i1, i1 0
-  %nop2778 = alloca i1, i1 0
-  %nop2779 = alloca i1, i1 0
-  %nop2780 = alloca i1, i1 0
-  %nop2781 = alloca i1, i1 0
-  %nop2782 = alloca i1, i1 0
-  %nop2783 = alloca i1, i1 0
-  %nop2784 = alloca i1, i1 0
-  %nop2785 = alloca i1, i1 0
-  %nop2786 = alloca i1, i1 0
-  %nop2787 = alloca i1, i1 0
-  %nop2788 = alloca i1, i1 0
-  %nop2789 = alloca i1, i1 0
-  %nop2790 = alloca i1, i1 0
-  %nop2791 = alloca i1, i1 0
-  %nop2792 = alloca i1, i1 0
-  %nop2793 = alloca i1, i1 0
-  %nop2794 = alloca i1, i1 0
-  %nop2795 = alloca i1, i1 0
-  %nop2796 = alloca i1, i1 0
-  %nop2797 = alloca i1, i1 0
-  %nop2798 = alloca i1, i1 0
-  %nop2799 = alloca i1, i1 0
-  %nop2800 = alloca i1, i1 0
-  %nop2801 = alloca i1, i1 0
-  %nop2802 = alloca i1, i1 0
-  %nop2803 = alloca i1, i1 0
-  %nop2804 = alloca i1, i1 0
-  %nop2805 = alloca i1, i1 0
-  %nop2806 = alloca i1, i1 0
-  %nop2807 = alloca i1, i1 0
-  %nop2808 = alloca i1, i1 0
-  %nop2809 = alloca i1, i1 0
-  %nop2810 = alloca i1, i1 0
-  %nop2811 = alloca i1, i1 0
-  %nop2812 = alloca i1, i1 0
-  %nop2813 = alloca i1, i1 0
-  %nop2814 = alloca i1, i1 0
-  %nop2815 = alloca i1, i1 0
-  %nop2816 = alloca i1, i1 0
-  %nop2817 = alloca i1, i1 0
-  %nop2818 = alloca i1, i1 0
-  %nop2819 = alloca i1, i1 0
-  %nop2820 = alloca i1, i1 0
-  %nop2821 = alloca i1, i1 0
-  %nop2822 = alloca i1, i1 0
-  %nop2823 = alloca i1, i1 0
-  %nop2824 = alloca i1, i1 0
-  %nop2825 = alloca i1, i1 0
-  %nop2826 = alloca i1, i1 0
-  %nop2827 = alloca i1, i1 0
-  %nop2828 = alloca i1, i1 0
-  %nop2829 = alloca i1, i1 0
-  %nop2830 = alloca i1, i1 0
-  %nop2831 = alloca i1, i1 0
-  %nop2832 = alloca i1, i1 0
-  %nop2833 = alloca i1, i1 0
-  %nop2834 = alloca i1, i1 0
-  %nop2835 = alloca i1, i1 0
-  %nop2836 = alloca i1, i1 0
-  %nop2837 = alloca i1, i1 0
-  %nop2838 = alloca i1, i1 0
-  %nop2839 = alloca i1, i1 0
-  %nop2840 = alloca i1, i1 0
-  %nop2841 = alloca i1, i1 0
-  %nop2842 = alloca i1, i1 0
-  %nop2843 = alloca i1, i1 0
-  %nop2844 = alloca i1, i1 0
-  %nop2845 = alloca i1, i1 0
-  %nop2846 = alloca i1, i1 0
-  %nop2847 = alloca i1, i1 0
-  %nop2848 = alloca i1, i1 0
-  %nop2849 = alloca i1, i1 0
-  %nop2850 = alloca i1, i1 0
-  %nop2851 = alloca i1, i1 0
-  %nop2852 = alloca i1, i1 0
-  %nop2853 = alloca i1, i1 0
-  %nop2854 = alloca i1, i1 0
-  %nop2855 = alloca i1, i1 0
-  %nop2856 = alloca i1, i1 0
-  %nop2857 = alloca i1, i1 0
-  %nop2858 = alloca i1, i1 0
-  %nop2859 = alloca i1, i1 0
-  %nop2860 = alloca i1, i1 0
-  %nop2861 = alloca i1, i1 0
-  %nop2862 = alloca i1, i1 0
-  %nop2863 = alloca i1, i1 0
-  %nop2864 = alloca i1, i1 0
-  %nop2865 = alloca i1, i1 0
-  %nop2866 = alloca i1, i1 0
-  %nop2867 = alloca i1, i1 0
-  %nop2868 = alloca i1, i1 0
-  %nop2869 = alloca i1, i1 0
-  %nop2870 = alloca i1, i1 0
-  %nop2871 = alloca i1, i1 0
-  %nop2872 = alloca i1, i1 0
-  %nop2873 = alloca i1, i1 0
-  %nop2874 = alloca i1, i1 0
-  %nop2875 = alloca i1, i1 0
-  %nop2876 = alloca i1, i1 0
-  %nop2877 = alloca i1, i1 0
-  %nop2878 = alloca i1, i1 0
-  %nop2879 = alloca i1, i1 0
-  %nop2880 = alloca i1, i1 0
-  %nop2881 = alloca i1, i1 0
-  %nop2882 = alloca i1, i1 0
-  %nop2883 = alloca i1, i1 0
-  %nop2884 = alloca i1, i1 0
-  %nop2885 = alloca i1, i1 0
-  %nop2886 = alloca i1, i1 0
-  %nop2887 = alloca i1, i1 0
-  %nop2888 = alloca i1, i1 0
-  %nop2889 = alloca i1, i1 0
-  %nop2890 = alloca i1, i1 0
-  %nop2891 = alloca i1, i1 0
-  %nop2892 = alloca i1, i1 0
-  %nop2893 = alloca i1, i1 0
-  %nop2894 = alloca i1, i1 0
-  %nop2895 = alloca i1, i1 0
-  %nop2896 = alloca i1, i1 0
-  %nop2897 = alloca i1, i1 0
-  %nop2898 = alloca i1, i1 0
-  %nop2899 = alloca i1, i1 0
-  %nop2900 = alloca i1, i1 0
-  %nop2901 = alloca i1, i1 0
-  %nop2902 = alloca i1, i1 0
-  %nop2903 = alloca i1, i1 0
-  %nop2904 = alloca i1, i1 0
-  %nop2905 = alloca i1, i1 0
-  %nop2906 = alloca i1, i1 0
-  %nop2907 = alloca i1, i1 0
-  %nop2908 = alloca i1, i1 0
-  %nop2909 = alloca i1, i1 0
-  %nop2910 = alloca i1, i1 0
-  %nop2911 = alloca i1, i1 0
-  %nop2912 = alloca i1, i1 0
-  %nop2913 = alloca i1, i1 0
-  %nop2914 = alloca i1, i1 0
-  %nop2915 = alloca i1, i1 0
-  %nop2916 = alloca i1, i1 0
-  %nop2917 = alloca i1, i1 0
-  %nop2918 = alloca i1, i1 0
-  %nop2919 = alloca i1, i1 0
-  %nop2920 = alloca i1, i1 0
-  %nop2921 = alloca i1, i1 0
-  %nop2922 = alloca i1, i1 0
-  %nop2923 = alloca i1, i1 0
-  %nop2924 = alloca i1, i1 0
-  %nop2925 = alloca i1, i1 0
-  %nop2926 = alloca i1, i1 0
-  %nop2927 = alloca i1, i1 0
-  %nop2928 = alloca i1, i1 0
-  %nop2929 = alloca i1, i1 0
-  %nop2930 = alloca i1, i1 0
-  %nop2931 = alloca i1, i1 0
-  %nop2932 = alloca i1, i1 0
-  %nop2933 = alloca i1, i1 0
-  %nop2934 = alloca i1, i1 0
-  %nop2935 = alloca i1, i1 0
-  %nop2936 = alloca i1, i1 0
-  %nop2937 = alloca i1, i1 0
-  %nop2938 = alloca i1, i1 0
-  %nop2939 = alloca i1, i1 0
-  %nop2940 = alloca i1, i1 0
-  %nop2941 = alloca i1, i1 0
-  %nop2942 = alloca i1, i1 0
-  %nop2943 = alloca i1, i1 0
-  %nop2944 = alloca i1, i1 0
-  %nop2945 = alloca i1, i1 0
-  %nop2946 = alloca i1, i1 0
-  %nop2947 = alloca i1, i1 0
-  %nop2948 = alloca i1, i1 0
-  %nop2949 = alloca i1, i1 0
-  %nop2950 = alloca i1, i1 0
-  %nop2951 = alloca i1, i1 0
-  %nop2952 = alloca i1, i1 0
-  %nop2953 = alloca i1, i1 0
-  %nop2954 = alloca i1, i1 0
-  %nop2955 = alloca i1, i1 0
-  %nop2956 = alloca i1, i1 0
-  %nop2957 = alloca i1, i1 0
-  %nop2958 = alloca i1, i1 0
-  %nop2959 = alloca i1, i1 0
-  %nop2960 = alloca i1, i1 0
-  %nop2961 = alloca i1, i1 0
-  %nop2962 = alloca i1, i1 0
-  %nop2963 = alloca i1, i1 0
-  %nop2964 = alloca i1, i1 0
-  %nop2965 = alloca i1, i1 0
-  %nop2966 = alloca i1, i1 0
-  %nop2967 = alloca i1, i1 0
-  %nop2968 = alloca i1, i1 0
-  %nop2969 = alloca i1, i1 0
-  %nop2970 = alloca i1, i1 0
-  %nop2971 = alloca i1, i1 0
-  %nop2972 = alloca i1, i1 0
-  %nop2973 = alloca i1, i1 0
-  %nop2974 = alloca i1, i1 0
-  %nop2975 = alloca i1, i1 0
-  %nop2976 = alloca i1, i1 0
-  %nop2977 = alloca i1, i1 0
-  %nop2978 = alloca i1, i1 0
-  %nop2979 = alloca i1, i1 0
-  %nop2980 = alloca i1, i1 0
-  %nop2981 = alloca i1, i1 0
-  %nop2982 = alloca i1, i1 0
-  %nop2983 = alloca i1, i1 0
-  %nop2984 = alloca i1, i1 0
-  %nop2985 = alloca i1, i1 0
-  %nop2986 = alloca i1, i1 0
-  %nop2987 = alloca i1, i1 0
-  %nop2988 = alloca i1, i1 0
-  %nop2989 = alloca i1, i1 0
-  %nop2990 = alloca i1, i1 0
-  %nop2991 = alloca i1, i1 0
-  %nop2992 = alloca i1, i1 0
-  %nop2993 = alloca i1, i1 0
-  %nop2994 = alloca i1, i1 0
-  %nop2995 = alloca i1, i1 0
-  %nop2996 = alloca i1, i1 0
-  %nop2997 = alloca i1, i1 0
-  %nop2998 = alloca i1, i1 0
-  %nop2999 = alloca i1, i1 0
-  %nop3000 = alloca i1, i1 0
-  %nop3001 = alloca i1, i1 0
-  %nop3002 = alloca i1, i1 0
-  %nop3003 = alloca i1, i1 0
-  %nop3004 = alloca i1, i1 0
-  %nop3005 = alloca i1, i1 0
-  %nop3006 = alloca i1, i1 0
-  %nop3007 = alloca i1, i1 0
-  %nop3008 = alloca i1, i1 0
-  %nop3009 = alloca i1, i1 0
-  %nop3010 = alloca i1, i1 0
-  %nop3011 = alloca i1, i1 0
-  %nop3012 = alloca i1, i1 0
-  %nop3013 = alloca i1, i1 0
-  %nop3014 = alloca i1, i1 0
-  %nop3015 = alloca i1, i1 0
-  %nop3016 = alloca i1, i1 0
-  %nop3017 = alloca i1, i1 0
-  %nop3018 = alloca i1, i1 0
-  %nop3019 = alloca i1, i1 0
-  %nop3020 = alloca i1, i1 0
-  %nop3021 = alloca i1, i1 0
-  %nop3022 = alloca i1, i1 0
-  %nop3023 = alloca i1, i1 0
-  %nop3024 = alloca i1, i1 0
-  %nop3025 = alloca i1, i1 0
-  %nop3026 = alloca i1, i1 0
-  %nop3027 = alloca i1, i1 0
-  %nop3028 = alloca i1, i1 0
-  %nop3029 = alloca i1, i1 0
-  %nop3030 = alloca i1, i1 0
-  %nop3031 = alloca i1, i1 0
-  %nop3032 = alloca i1, i1 0
-  %nop3033 = alloca i1, i1 0
-  %nop3034 = alloca i1, i1 0
-  %nop3035 = alloca i1, i1 0
-  %nop3036 = alloca i1, i1 0
-  %nop3037 = alloca i1, i1 0
-  %nop3038 = alloca i1, i1 0
-  %nop3039 = alloca i1, i1 0
-  %nop3040 = alloca i1, i1 0
-  %nop3041 = alloca i1, i1 0
-  %nop3042 = alloca i1, i1 0
-  %nop3043 = alloca i1, i1 0
-  %nop3044 = alloca i1, i1 0
-  %nop3045 = alloca i1, i1 0
-  %nop3046 = alloca i1, i1 0
-  %nop3047 = alloca i1, i1 0
-  %nop3048 = alloca i1, i1 0
-  %nop3049 = alloca i1, i1 0
-  %nop3050 = alloca i1, i1 0
-  %nop3051 = alloca i1, i1 0
-  %nop3052 = alloca i1, i1 0
-  %nop3053 = alloca i1, i1 0
-  %nop3054 = alloca i1, i1 0
-  %nop3055 = alloca i1, i1 0
-  %nop3056 = alloca i1, i1 0
-  %nop3057 = alloca i1, i1 0
-  %nop3058 = alloca i1, i1 0
-  %nop3059 = alloca i1, i1 0
-  %nop3060 = alloca i1, i1 0
-  %nop3061 = alloca i1, i1 0
-  %nop3062 = alloca i1, i1 0
-  %nop3063 = alloca i1, i1 0
-  %nop3064 = alloca i1, i1 0
-  %nop3065 = alloca i1, i1 0
-  %nop3066 = alloca i1, i1 0
-  %nop3067 = alloca i1, i1 0
-  %nop3068 = alloca i1, i1 0
-  %nop3069 = alloca i1, i1 0
-  %nop3070 = alloca i1, i1 0
-  %nop3071 = alloca i1, i1 0
-  %nop3072 = alloca i1, i1 0
-  %nop3073 = alloca i1, i1 0
-  %nop3074 = alloca i1, i1 0
-  %nop3075 = alloca i1, i1 0
-  %nop3076 = alloca i1, i1 0
-  %nop3077 = alloca i1, i1 0
-  %nop3078 = alloca i1, i1 0
-  %nop3079 = alloca i1, i1 0
-  %nop3080 = alloca i1, i1 0
-  %nop3081 = alloca i1, i1 0
-  %nop3082 = alloca i1, i1 0
-  %nop3083 = alloca i1, i1 0
-  %nop3084 = alloca i1, i1 0
-  %nop3085 = alloca i1, i1 0
-  %nop3086 = alloca i1, i1 0
-  %nop3087 = alloca i1, i1 0
-  %nop3088 = alloca i1, i1 0
-  %nop3089 = alloca i1, i1 0
-  %nop3090 = alloca i1, i1 0
-  %nop3091 = alloca i1, i1 0
-  %nop3092 = alloca i1, i1 0
-  %nop3093 = alloca i1, i1 0
-  %nop3094 = alloca i1, i1 0
-  %nop3095 = alloca i1, i1 0
-  %nop3096 = alloca i1, i1 0
-  %nop3097 = alloca i1, i1 0
-  %nop3098 = alloca i1, i1 0
-  %nop3099 = alloca i1, i1 0
-  %nop3100 = alloca i1, i1 0
-  %nop3101 = alloca i1, i1 0
-  %nop3102 = alloca i1, i1 0
-  %nop3103 = alloca i1, i1 0
-  %nop3104 = alloca i1, i1 0
-  %nop3105 = alloca i1, i1 0
-  %nop3106 = alloca i1, i1 0
-  %nop3107 = alloca i1, i1 0
-  %nop3108 = alloca i1, i1 0
-  %nop3109 = alloca i1, i1 0
-  %nop3110 = alloca i1, i1 0
-  %nop3111 = alloca i1, i1 0
-  %nop3112 = alloca i1, i1 0
-  %nop3113 = alloca i1, i1 0
-  %nop3114 = alloca i1, i1 0
-  %nop3115 = alloca i1, i1 0
-  %nop3116 = alloca i1, i1 0
-  %nop3117 = alloca i1, i1 0
-  %nop3118 = alloca i1, i1 0
-  %nop3119 = alloca i1, i1 0
-  %nop3120 = alloca i1, i1 0
-  %nop3121 = alloca i1, i1 0
-  %nop3122 = alloca i1, i1 0
-  %nop3123 = alloca i1, i1 0
-  %nop3124 = alloca i1, i1 0
-  %nop3125 = alloca i1, i1 0
-  %nop3126 = alloca i1, i1 0
-  %nop3127 = alloca i1, i1 0
-  %nop3128 = alloca i1, i1 0
-  %nop3129 = alloca i1, i1 0
-  %nop3130 = alloca i1, i1 0
-  %nop3131 = alloca i1, i1 0
-  %nop3132 = alloca i1, i1 0
-  %nop3133 = alloca i1, i1 0
-  %nop3134 = alloca i1, i1 0
-  %nop3135 = alloca i1, i1 0
-  %nop3136 = alloca i1, i1 0
-  %nop3137 = alloca i1, i1 0
-  %nop3138 = alloca i1, i1 0
-  %nop3139 = alloca i1, i1 0
-  %nop3140 = alloca i1, i1 0
-  %nop3141 = alloca i1, i1 0
-  %nop3142 = alloca i1, i1 0
-  %nop3143 = alloca i1, i1 0
-  %nop3144 = alloca i1, i1 0
-  %nop3145 = alloca i1, i1 0
-  %nop3146 = alloca i1, i1 0
-  %nop3147 = alloca i1, i1 0
-  %nop3148 = alloca i1, i1 0
-  %nop3149 = alloca i1, i1 0
-  %nop3150 = alloca i1, i1 0
-  %nop3151 = alloca i1, i1 0
-  %nop3152 = alloca i1, i1 0
-  %nop3153 = alloca i1, i1 0
-  %nop3154 = alloca i1, i1 0
-  %nop3155 = alloca i1, i1 0
-  %nop3156 = alloca i1, i1 0
-  %nop3157 = alloca i1, i1 0
-  %nop3158 = alloca i1, i1 0
-  %nop3159 = alloca i1, i1 0
-  %nop3160 = alloca i1, i1 0
-  %nop3161 = alloca i1, i1 0
-  %nop3162 = alloca i1, i1 0
-  %nop3163 = alloca i1, i1 0
-  %nop3164 = alloca i1, i1 0
-  %nop3165 = alloca i1, i1 0
-  %nop3166 = alloca i1, i1 0
-  %nop3167 = alloca i1, i1 0
-  %nop3168 = alloca i1, i1 0
-  %nop3169 = alloca i1, i1 0
-  %nop3170 = alloca i1, i1 0
-  %nop3171 = alloca i1, i1 0
-  %nop3172 = alloca i1, i1 0
-  %nop3173 = alloca i1, i1 0
-  %nop3174 = alloca i1, i1 0
-  %nop3175 = alloca i1, i1 0
-  %nop3176 = alloca i1, i1 0
-  %nop3177 = alloca i1, i1 0
-  %nop3178 = alloca i1, i1 0
-  %nop3179 = alloca i1, i1 0
-  %nop3180 = alloca i1, i1 0
-  %nop3181 = alloca i1, i1 0
-  %nop3182 = alloca i1, i1 0
-  %nop3183 = alloca i1, i1 0
-  %nop3184 = alloca i1, i1 0
-  %nop3185 = alloca i1, i1 0
-  %nop3186 = alloca i1, i1 0
-  %nop3187 = alloca i1, i1 0
-  %nop3188 = alloca i1, i1 0
-  %nop3189 = alloca i1, i1 0
-  %nop3190 = alloca i1, i1 0
-  %nop3191 = alloca i1, i1 0
-  %nop3192 = alloca i1, i1 0
-  %nop3193 = alloca i1, i1 0
-  %nop3194 = alloca i1, i1 0
-  %nop3195 = alloca i1, i1 0
-  %nop3196 = alloca i1, i1 0
-  %nop3197 = alloca i1, i1 0
-  %nop3198 = alloca i1, i1 0
-  %nop3199 = alloca i1, i1 0
-  %nop3200 = alloca i1, i1 0
-  %nop3201 = alloca i1, i1 0
-  %nop3202 = alloca i1, i1 0
-  %nop3203 = alloca i1, i1 0
-  %nop3204 = alloca i1, i1 0
-  %nop3205 = alloca i1, i1 0
-  %nop3206 = alloca i1, i1 0
-  %nop3207 = alloca i1, i1 0
-  %nop3208 = alloca i1, i1 0
-  %nop3209 = alloca i1, i1 0
-  %nop3210 = alloca i1, i1 0
-  %nop3211 = alloca i1, i1 0
-  %nop3212 = alloca i1, i1 0
-  %nop3213 = alloca i1, i1 0
-  %nop3214 = alloca i1, i1 0
-  %nop3215 = alloca i1, i1 0
-  %nop3216 = alloca i1, i1 0
-  %nop3217 = alloca i1, i1 0
-  %nop3218 = alloca i1, i1 0
-  %nop3219 = alloca i1, i1 0
-  %nop3220 = alloca i1, i1 0
-  %nop3221 = alloca i1, i1 0
-  %nop3222 = alloca i1, i1 0
-  %nop3223 = alloca i1, i1 0
-  %nop3224 = alloca i1, i1 0
-  %nop3225 = alloca i1, i1 0
-  %nop3226 = alloca i1, i1 0
-  %nop3227 = alloca i1, i1 0
-  %nop3228 = alloca i1, i1 0
-  %nop3229 = alloca i1, i1 0
-  %nop3230 = alloca i1, i1 0
-  %nop3231 = alloca i1, i1 0
-  %nop3232 = alloca i1, i1 0
-  %nop3233 = alloca i1, i1 0
-  %nop3234 = alloca i1, i1 0
-  %nop3235 = alloca i1, i1 0
-  %nop3236 = alloca i1, i1 0
-  %nop3237 = alloca i1, i1 0
-  %nop3238 = alloca i1, i1 0
-  %nop3239 = alloca i1, i1 0
-  %nop3240 = alloca i1, i1 0
-  %nop3241 = alloca i1, i1 0
-  %nop3242 = alloca i1, i1 0
-  %nop3243 = alloca i1, i1 0
-  %nop3244 = alloca i1, i1 0
-  %nop3245 = alloca i1, i1 0
-  %nop3246 = alloca i1, i1 0
-  %nop3247 = alloca i1, i1 0
-  %nop3248 = alloca i1, i1 0
-  %nop3249 = alloca i1, i1 0
-  %nop3250 = alloca i1, i1 0
-  %nop3251 = alloca i1, i1 0
-  %nop3252 = alloca i1, i1 0
-  %nop3253 = alloca i1, i1 0
-  %nop3254 = alloca i1, i1 0
-  %nop3255 = alloca i1, i1 0
-  %nop3256 = alloca i1, i1 0
-  %nop3257 = alloca i1, i1 0
-  %nop3258 = alloca i1, i1 0
-  %nop3259 = alloca i1, i1 0
-  %nop3260 = alloca i1, i1 0
-  %nop3261 = alloca i1, i1 0
-  %nop3262 = alloca i1, i1 0
-  %nop3263 = alloca i1, i1 0
-  %nop3264 = alloca i1, i1 0
-  %nop3265 = alloca i1, i1 0
-  %nop3266 = alloca i1, i1 0
-  %nop3267 = alloca i1, i1 0
-  %nop3268 = alloca i1, i1 0
-  %nop3269 = alloca i1, i1 0
-  %nop3270 = alloca i1, i1 0
-  %nop3271 = alloca i1, i1 0
-  %nop3272 = alloca i1, i1 0
-  %nop3273 = alloca i1, i1 0
-  %nop3274 = alloca i1, i1 0
-  %nop3275 = alloca i1, i1 0
-  %nop3276 = alloca i1, i1 0
-  %nop3277 = alloca i1, i1 0
-  %nop3278 = alloca i1, i1 0
-  %nop3279 = alloca i1, i1 0
-  %nop3280 = alloca i1, i1 0
-  %nop3281 = alloca i1, i1 0
-  %nop3282 = alloca i1, i1 0
-  %nop3283 = alloca i1, i1 0
-  %nop3284 = alloca i1, i1 0
-  %nop3285 = alloca i1, i1 0
-  %nop3286 = alloca i1, i1 0
-  %nop3287 = alloca i1, i1 0
-  %nop3288 = alloca i1, i1 0
-  %nop3289 = alloca i1, i1 0
-  %nop3290 = alloca i1, i1 0
-  %nop3291 = alloca i1, i1 0
-  %nop3292 = alloca i1, i1 0
-  %nop3293 = alloca i1, i1 0
-  %nop3294 = alloca i1, i1 0
-  %nop3295 = alloca i1, i1 0
-  %nop3296 = alloca i1, i1 0
-  %nop3297 = alloca i1, i1 0
-  %nop3298 = alloca i1, i1 0
-  %nop3299 = alloca i1, i1 0
-  %nop3300 = alloca i1, i1 0
-  %nop3301 = alloca i1, i1 0
-  %nop3302 = alloca i1, i1 0
-  %nop3303 = alloca i1, i1 0
-  %nop3304 = alloca i1, i1 0
-  %nop3305 = alloca i1, i1 0
-  %nop3306 = alloca i1, i1 0
-  %nop3307 = alloca i1, i1 0
-  %nop3308 = alloca i1, i1 0
-  %nop3309 = alloca i1, i1 0
-  %nop3310 = alloca i1, i1 0
-  %nop3311 = alloca i1, i1 0
-  %nop3312 = alloca i1, i1 0
-  %nop3313 = alloca i1, i1 0
-  %nop3314 = alloca i1, i1 0
-  %nop3315 = alloca i1, i1 0
-  %nop3316 = alloca i1, i1 0
-  %nop3317 = alloca i1, i1 0
-  %nop3318 = alloca i1, i1 0
-  %nop3319 = alloca i1, i1 0
-  %nop3320 = alloca i1, i1 0
-  %nop3321 = alloca i1, i1 0
-  %nop3322 = alloca i1, i1 0
-  %nop3323 = alloca i1, i1 0
-  %nop3324 = alloca i1, i1 0
-  %nop3325 = alloca i1, i1 0
-  %nop3326 = alloca i1, i1 0
-  %nop3327 = alloca i1, i1 0
-  %nop3328 = alloca i1, i1 0
-  %nop3329 = alloca i1, i1 0
-  %nop3330 = alloca i1, i1 0
-  %nop3331 = alloca i1, i1 0
-  %nop3332 = alloca i1, i1 0
-  %nop3333 = alloca i1, i1 0
-  %nop3334 = alloca i1, i1 0
-  %nop3335 = alloca i1, i1 0
-  %nop3336 = alloca i1, i1 0
-  %nop3337 = alloca i1, i1 0
-  %nop3338 = alloca i1, i1 0
-  %nop3339 = alloca i1, i1 0
-  %nop3340 = alloca i1, i1 0
-  %nop3341 = alloca i1, i1 0
-  %nop3342 = alloca i1, i1 0
-  %nop3343 = alloca i1, i1 0
-  %nop3344 = alloca i1, i1 0
-  %nop3345 = alloca i1, i1 0
-  %nop3346 = alloca i1, i1 0
-  %nop3347 = alloca i1, i1 0
-  %nop3348 = alloca i1, i1 0
-  %nop3349 = alloca i1, i1 0
-  %nop3350 = alloca i1, i1 0
-  %nop3351 = alloca i1, i1 0
-  %nop3352 = alloca i1, i1 0
-  %nop3353 = alloca i1, i1 0
-  %nop3354 = alloca i1, i1 0
-  %nop3355 = alloca i1, i1 0
-  %nop3356 = alloca i1, i1 0
-  %nop3357 = alloca i1, i1 0
-  %nop3358 = alloca i1, i1 0
-  %nop3359 = alloca i1, i1 0
-  %nop3360 = alloca i1, i1 0
-  %nop3361 = alloca i1, i1 0
-  %nop3362 = alloca i1, i1 0
-  %nop3363 = alloca i1, i1 0
-  %nop3364 = alloca i1, i1 0
-  %nop3365 = alloca i1, i1 0
-  %nop3366 = alloca i1, i1 0
-  %nop3367 = alloca i1, i1 0
-  %nop3368 = alloca i1, i1 0
-  %nop3369 = alloca i1, i1 0
-  %nop3370 = alloca i1, i1 0
-  %nop3371 = alloca i1, i1 0
-  %nop3372 = alloca i1, i1 0
-  %nop3373 = alloca i1, i1 0
-  %nop3374 = alloca i1, i1 0
-  %nop3375 = alloca i1, i1 0
-  %nop3376 = alloca i1, i1 0
-  %nop3377 = alloca i1, i1 0
-  %nop3378 = alloca i1, i1 0
-  %nop3379 = alloca i1, i1 0
-  %nop3380 = alloca i1, i1 0
-  %nop3381 = alloca i1, i1 0
-  %nop3382 = alloca i1, i1 0
-  %nop3383 = alloca i1, i1 0
-  %nop3384 = alloca i1, i1 0
-  %nop3385 = alloca i1, i1 0
-  %nop3386 = alloca i1, i1 0
-  %nop3387 = alloca i1, i1 0
-  %nop3388 = alloca i1, i1 0
-  %nop3389 = alloca i1, i1 0
-  %nop3390 = alloca i1, i1 0
-  %nop3391 = alloca i1, i1 0
-  %nop3392 = alloca i1, i1 0
-  %nop3393 = alloca i1, i1 0
-  %nop3394 = alloca i1, i1 0
-  %nop3395 = alloca i1, i1 0
-  %nop3396 = alloca i1, i1 0
-  %nop3397 = alloca i1, i1 0
-  %nop3398 = alloca i1, i1 0
-  %nop3399 = alloca i1, i1 0
-  %nop3400 = alloca i1, i1 0
-  %nop3401 = alloca i1, i1 0
-  %nop3402 = alloca i1, i1 0
-  %nop3403 = alloca i1, i1 0
-  %nop3404 = alloca i1, i1 0
-  %nop3405 = alloca i1, i1 0
-  %nop3406 = alloca i1, i1 0
-  %nop3407 = alloca i1, i1 0
-  %nop3408 = alloca i1, i1 0
-  %nop3409 = alloca i1, i1 0
-  %nop3410 = alloca i1, i1 0
-  %nop3411 = alloca i1, i1 0
-  %nop3412 = alloca i1, i1 0
-  %nop3413 = alloca i1, i1 0
-  %nop3414 = alloca i1, i1 0
-  %nop3415 = alloca i1, i1 0
-  %nop3416 = alloca i1, i1 0
-  %nop3417 = alloca i1, i1 0
-  %nop3418 = alloca i1, i1 0
-  %nop3419 = alloca i1, i1 0
-  %nop3420 = alloca i1, i1 0
-  %nop3421 = alloca i1, i1 0
-  %nop3422 = alloca i1, i1 0
-  %nop3423 = alloca i1, i1 0
-  %nop3424 = alloca i1, i1 0
-  %nop3425 = alloca i1, i1 0
-  %nop3426 = alloca i1, i1 0
-  %nop3427 = alloca i1, i1 0
-  %nop3428 = alloca i1, i1 0
-  %nop3429 = alloca i1, i1 0
-  %nop3430 = alloca i1, i1 0
-  %nop3431 = alloca i1, i1 0
-  %nop3432 = alloca i1, i1 0
-  %nop3433 = alloca i1, i1 0
-  %nop3434 = alloca i1, i1 0
-  %nop3435 = alloca i1, i1 0
-  %nop3436 = alloca i1, i1 0
-  %nop3437 = alloca i1, i1 0
-  %nop3438 = alloca i1, i1 0
-  %nop3439 = alloca i1, i1 0
-  %nop3440 = alloca i1, i1 0
-  %nop3441 = alloca i1, i1 0
-  %nop3442 = alloca i1, i1 0
-  %nop3443 = alloca i1, i1 0
-  %nop3444 = alloca i1, i1 0
-  %nop3445 = alloca i1, i1 0
-  %nop3446 = alloca i1, i1 0
-  %nop3447 = alloca i1, i1 0
-  %nop3448 = alloca i1, i1 0
-  %nop3449 = alloca i1, i1 0
-  %nop3450 = alloca i1, i1 0
-  %nop3451 = alloca i1, i1 0
-  %nop3452 = alloca i1, i1 0
-  %nop3453 = alloca i1, i1 0
-  %nop3454 = alloca i1, i1 0
-  %nop3455 = alloca i1, i1 0
-  %nop3456 = alloca i1, i1 0
-  %nop3457 = alloca i1, i1 0
-  %nop3458 = alloca i1, i1 0
-  %nop3459 = alloca i1, i1 0
-  %nop3460 = alloca i1, i1 0
-  %nop3461 = alloca i1, i1 0
-  %nop3462 = alloca i1, i1 0
-  %nop3463 = alloca i1, i1 0
-  %nop3464 = alloca i1, i1 0
-  %nop3465 = alloca i1, i1 0
-  %nop3466 = alloca i1, i1 0
-  %nop3467 = alloca i1, i1 0
-  %nop3468 = alloca i1, i1 0
-  %nop3469 = alloca i1, i1 0
-  %nop3470 = alloca i1, i1 0
-  %nop3471 = alloca i1, i1 0
-  %nop3472 = alloca i1, i1 0
-  %nop3473 = alloca i1, i1 0
-  %nop3474 = alloca i1, i1 0
-  %nop3475 = alloca i1, i1 0
-  %nop3476 = alloca i1, i1 0
-  %nop3477 = alloca i1, i1 0
-  %nop3478 = alloca i1, i1 0
-  %nop3479 = alloca i1, i1 0
-  %nop3480 = alloca i1, i1 0
-  %nop3481 = alloca i1, i1 0
-  %nop3482 = alloca i1, i1 0
-  %nop3483 = alloca i1, i1 0
-  %nop3484 = alloca i1, i1 0
-  %nop3485 = alloca i1, i1 0
-  %nop3486 = alloca i1, i1 0
-  %nop3487 = alloca i1, i1 0
-  %nop3488 = alloca i1, i1 0
-  %nop3489 = alloca i1, i1 0
-  %nop3490 = alloca i1, i1 0
-  %nop3491 = alloca i1, i1 0
-  %nop3492 = alloca i1, i1 0
-  %nop3493 = alloca i1, i1 0
-  %nop3494 = alloca i1, i1 0
-  %nop3495 = alloca i1, i1 0
-  %nop3496 = alloca i1, i1 0
-  %nop3497 = alloca i1, i1 0
-  %nop3498 = alloca i1, i1 0
-  %nop3499 = alloca i1, i1 0
-  %nop3500 = alloca i1, i1 0
-  %nop3501 = alloca i1, i1 0
-  %nop3502 = alloca i1, i1 0
-  %nop3503 = alloca i1, i1 0
-  %nop3504 = alloca i1, i1 0
-  %nop3505 = alloca i1, i1 0
-  %nop3506 = alloca i1, i1 0
-  %nop3507 = alloca i1, i1 0
-  %nop3508 = alloca i1, i1 0
-  %nop3509 = alloca i1, i1 0
-  %nop3510 = alloca i1, i1 0
-  %nop3511 = alloca i1, i1 0
-  %nop3512 = alloca i1, i1 0
-  %nop3513 = alloca i1, i1 0
-  %nop3514 = alloca i1, i1 0
-  %nop3515 = alloca i1, i1 0
-  %nop3516 = alloca i1, i1 0
-  %nop3517 = alloca i1, i1 0
-  %nop3518 = alloca i1, i1 0
-  %nop3519 = alloca i1, i1 0
-  %nop3520 = alloca i1, i1 0
-  %nop3521 = alloca i1, i1 0
-  %nop3522 = alloca i1, i1 0
-  %nop3523 = alloca i1, i1 0
-  %nop3524 = alloca i1, i1 0
-  %nop3525 = alloca i1, i1 0
-  %nop3526 = alloca i1, i1 0
-  %nop3527 = alloca i1, i1 0
-  %nop3528 = alloca i1, i1 0
-  %nop3529 = alloca i1, i1 0
-  %nop3530 = alloca i1, i1 0
-  %nop3531 = alloca i1, i1 0
-  %nop3532 = alloca i1, i1 0
-  %nop3533 = alloca i1, i1 0
-  %nop3534 = alloca i1, i1 0
-  %nop3535 = alloca i1, i1 0
-  %nop3536 = alloca i1, i1 0
-  %nop3537 = alloca i1, i1 0
-  %nop3538 = alloca i1, i1 0
-  %nop3539 = alloca i1, i1 0
-  %nop3540 = alloca i1, i1 0
-  %nop3541 = alloca i1, i1 0
-  %nop3542 = alloca i1, i1 0
-  %nop3543 = alloca i1, i1 0
-  %nop3544 = alloca i1, i1 0
-  %nop3545 = alloca i1, i1 0
-  %nop3546 = alloca i1, i1 0
-  %nop3547 = alloca i1, i1 0
-  %nop3548 = alloca i1, i1 0
-  %nop3549 = alloca i1, i1 0
-  %nop3550 = alloca i1, i1 0
-  %nop3551 = alloca i1, i1 0
-  %nop3552 = alloca i1, i1 0
-  %nop3553 = alloca i1, i1 0
-  %nop3554 = alloca i1, i1 0
-  %nop3555 = alloca i1, i1 0
-  %nop3556 = alloca i1, i1 0
-  %nop3557 = alloca i1, i1 0
-  %nop3558 = alloca i1, i1 0
-  %nop3559 = alloca i1, i1 0
-  %nop3560 = alloca i1, i1 0
-  %nop3561 = alloca i1, i1 0
-  %nop3562 = alloca i1, i1 0
-  %nop3563 = alloca i1, i1 0
-  %nop3564 = alloca i1, i1 0
-  %nop3565 = alloca i1, i1 0
-  %nop3566 = alloca i1, i1 0
-  %nop3567 = alloca i1, i1 0
-  %nop3568 = alloca i1, i1 0
-  %nop3569 = alloca i1, i1 0
-  %nop3570 = alloca i1, i1 0
-  %nop3571 = alloca i1, i1 0
-  %nop3572 = alloca i1, i1 0
-  %nop3573 = alloca i1, i1 0
-  %nop3574 = alloca i1, i1 0
-  %nop3575 = alloca i1, i1 0
-  %nop3576 = alloca i1, i1 0
-  %nop3577 = alloca i1, i1 0
-  %nop3578 = alloca i1, i1 0
-  %nop3579 = alloca i1, i1 0
-  %nop3580 = alloca i1, i1 0
-  %nop3581 = alloca i1, i1 0
-  %nop3582 = alloca i1, i1 0
-  %nop3583 = alloca i1, i1 0
-  %nop3584 = alloca i1, i1 0
-  %nop3585 = alloca i1, i1 0
-  %nop3586 = alloca i1, i1 0
-  %nop3587 = alloca i1, i1 0
-  %nop3588 = alloca i1, i1 0
-  %nop3589 = alloca i1, i1 0
-  %nop3590 = alloca i1, i1 0
-  %nop3591 = alloca i1, i1 0
-  %nop3592 = alloca i1, i1 0
-  %nop3593 = alloca i1, i1 0
-  %nop3594 = alloca i1, i1 0
-  %nop3595 = alloca i1, i1 0
-  %nop3596 = alloca i1, i1 0
-  %nop3597 = alloca i1, i1 0
-  %nop3598 = alloca i1, i1 0
-  %nop3599 = alloca i1, i1 0
-  %nop3600 = alloca i1, i1 0
-  %nop3601 = alloca i1, i1 0
-  %nop3602 = alloca i1, i1 0
-  %nop3603 = alloca i1, i1 0
-  %nop3604 = alloca i1, i1 0
-  %nop3605 = alloca i1, i1 0
-  %nop3606 = alloca i1, i1 0
-  %nop3607 = alloca i1, i1 0
-  %nop3608 = alloca i1, i1 0
-  %nop3609 = alloca i1, i1 0
-  %nop3610 = alloca i1, i1 0
-  %nop3611 = alloca i1, i1 0
-  %nop3612 = alloca i1, i1 0
-  %nop3613 = alloca i1, i1 0
-  %nop3614 = alloca i1, i1 0
-  %nop3615 = alloca i1, i1 0
-  %nop3616 = alloca i1, i1 0
-  %nop3617 = alloca i1, i1 0
-  %nop3618 = alloca i1, i1 0
-  %nop3619 = alloca i1, i1 0
-  %nop3620 = alloca i1, i1 0
-  %nop3621 = alloca i1, i1 0
-  %nop3622 = alloca i1, i1 0
-  %nop3623 = alloca i1, i1 0
-  %nop3624 = alloca i1, i1 0
-  %nop3625 = alloca i1, i1 0
-  %nop3626 = alloca i1, i1 0
-  %nop3627 = alloca i1, i1 0
-  %nop3628 = alloca i1, i1 0
-  %nop3629 = alloca i1, i1 0
-  %nop3630 = alloca i1, i1 0
-  %nop3631 = alloca i1, i1 0
-  %nop3632 = alloca i1, i1 0
-  %nop3633 = alloca i1, i1 0
-  %nop3634 = alloca i1, i1 0
-  %nop3635 = alloca i1, i1 0
-  %nop3636 = alloca i1, i1 0
-  %nop3637 = alloca i1, i1 0
-  %nop3638 = alloca i1, i1 0
-  %nop3639 = alloca i1, i1 0
-  %nop3640 = alloca i1, i1 0
-  %nop3641 = alloca i1, i1 0
-  %nop3642 = alloca i1, i1 0
-  %nop3643 = alloca i1, i1 0
-  %nop3644 = alloca i1, i1 0
-  %nop3645 = alloca i1, i1 0
-  %nop3646 = alloca i1, i1 0
-  %nop3647 = alloca i1, i1 0
-  %nop3648 = alloca i1, i1 0
-  %nop3649 = alloca i1, i1 0
-  %nop3650 = alloca i1, i1 0
-  %nop3651 = alloca i1, i1 0
-  %nop3652 = alloca i1, i1 0
-  %nop3653 = alloca i1, i1 0
-  %nop3654 = alloca i1, i1 0
-  %nop3655 = alloca i1, i1 0
-  %nop3656 = alloca i1, i1 0
-  %nop3657 = alloca i1, i1 0
-  %nop3658 = alloca i1, i1 0
-  %nop3659 = alloca i1, i1 0
-  %nop3660 = alloca i1, i1 0
-  %nop3661 = alloca i1, i1 0
-  %nop3662 = alloca i1, i1 0
-  %nop3663 = alloca i1, i1 0
-  %nop3664 = alloca i1, i1 0
-  %nop3665 = alloca i1, i1 0
-  %nop3666 = alloca i1, i1 0
-  %nop3667 = alloca i1, i1 0
-  %nop3668 = alloca i1, i1 0
-  %nop3669 = alloca i1, i1 0
-  %nop3670 = alloca i1, i1 0
-  %nop3671 = alloca i1, i1 0
-  %nop3672 = alloca i1, i1 0
-  %nop3673 = alloca i1, i1 0
-  %nop3674 = alloca i1, i1 0
-  %nop3675 = alloca i1, i1 0
-  %nop3676 = alloca i1, i1 0
-  %nop3677 = alloca i1, i1 0
-  %nop3678 = alloca i1, i1 0
-  %nop3679 = alloca i1, i1 0
-  %nop3680 = alloca i1, i1 0
-  %nop3681 = alloca i1, i1 0
-  %nop3682 = alloca i1, i1 0
-  %nop3683 = alloca i1, i1 0
-  %nop3684 = alloca i1, i1 0
-  %nop3685 = alloca i1, i1 0
-  %nop3686 = alloca i1, i1 0
-  %nop3687 = alloca i1, i1 0
-  %nop3688 = alloca i1, i1 0
-  %nop3689 = alloca i1, i1 0
-  %nop3690 = alloca i1, i1 0
-  %nop3691 = alloca i1, i1 0
-  %nop3692 = alloca i1, i1 0
-  %nop3693 = alloca i1, i1 0
-  %nop3694 = alloca i1, i1 0
-  %nop3695 = alloca i1, i1 0
-  %nop3696 = alloca i1, i1 0
-  %nop3697 = alloca i1, i1 0
-  %nop3698 = alloca i1, i1 0
-  %nop3699 = alloca i1, i1 0
-  %nop3700 = alloca i1, i1 0
-  %nop3701 = alloca i1, i1 0
-  %nop3702 = alloca i1, i1 0
-  %nop3703 = alloca i1, i1 0
-  %nop3704 = alloca i1, i1 0
-  %nop3705 = alloca i1, i1 0
-  %nop3706 = alloca i1, i1 0
-  %nop3707 = alloca i1, i1 0
-  %nop3708 = alloca i1, i1 0
-  %nop3709 = alloca i1, i1 0
-  %nop3710 = alloca i1, i1 0
-  %nop3711 = alloca i1, i1 0
-  %nop3712 = alloca i1, i1 0
-  %nop3713 = alloca i1, i1 0
-  %nop3714 = alloca i1, i1 0
-  %nop3715 = alloca i1, i1 0
-  %nop3716 = alloca i1, i1 0
-  %nop3717 = alloca i1, i1 0
-  %nop3718 = alloca i1, i1 0
-  %nop3719 = alloca i1, i1 0
-  %nop3720 = alloca i1, i1 0
-  %nop3721 = alloca i1, i1 0
-  %nop3722 = alloca i1, i1 0
-  %nop3723 = alloca i1, i1 0
-  %nop3724 = alloca i1, i1 0
-  %nop3725 = alloca i1, i1 0
-  %nop3726 = alloca i1, i1 0
-  %nop3727 = alloca i1, i1 0
-  %nop3728 = alloca i1, i1 0
-  %nop3729 = alloca i1, i1 0
-  %nop3730 = alloca i1, i1 0
-  %nop3731 = alloca i1, i1 0
-  %nop3732 = alloca i1, i1 0
-  %nop3733 = alloca i1, i1 0
-  %nop3734 = alloca i1, i1 0
-  %nop3735 = alloca i1, i1 0
-  %nop3736 = alloca i1, i1 0
-  %nop3737 = alloca i1, i1 0
-  %nop3738 = alloca i1, i1 0
-  %nop3739 = alloca i1, i1 0
-  %nop3740 = alloca i1, i1 0
-  %nop3741 = alloca i1, i1 0
-  %nop3742 = alloca i1, i1 0
-  %nop3743 = alloca i1, i1 0
-  %nop3744 = alloca i1, i1 0
-  %nop3745 = alloca i1, i1 0
-  %nop3746 = alloca i1, i1 0
-  %nop3747 = alloca i1, i1 0
-  %nop3748 = alloca i1, i1 0
-  %nop3749 = alloca i1, i1 0
-  %nop3750 = alloca i1, i1 0
-  %nop3751 = alloca i1, i1 0
-  %nop3752 = alloca i1, i1 0
-  %nop3753 = alloca i1, i1 0
-  %nop3754 = alloca i1, i1 0
-  %nop3755 = alloca i1, i1 0
-  %nop3756 = alloca i1, i1 0
-  %nop3757 = alloca i1, i1 0
-  %nop3758 = alloca i1, i1 0
-  %nop3759 = alloca i1, i1 0
-  %nop3760 = alloca i1, i1 0
-  %nop3761 = alloca i1, i1 0
-  %nop3762 = alloca i1, i1 0
-  %nop3763 = alloca i1, i1 0
-  %nop3764 = alloca i1, i1 0
-  %nop3765 = alloca i1, i1 0
-  %nop3766 = alloca i1, i1 0
-  %nop3767 = alloca i1, i1 0
-  %nop3768 = alloca i1, i1 0
-  %nop3769 = alloca i1, i1 0
-  %nop3770 = alloca i1, i1 0
-  %nop3771 = alloca i1, i1 0
-  %nop3772 = alloca i1, i1 0
-  %nop3773 = alloca i1, i1 0
-  %nop3774 = alloca i1, i1 0
-  %nop3775 = alloca i1, i1 0
-  %nop3776 = alloca i1, i1 0
-  %nop3777 = alloca i1, i1 0
-  %nop3778 = alloca i1, i1 0
-  %nop3779 = alloca i1, i1 0
-  %nop3780 = alloca i1, i1 0
-  %nop3781 = alloca i1, i1 0
-  %nop3782 = alloca i1, i1 0
-  %nop3783 = alloca i1, i1 0
-  %nop3784 = alloca i1, i1 0
-  %nop3785 = alloca i1, i1 0
-  %nop3786 = alloca i1, i1 0
-  %nop3787 = alloca i1, i1 0
-  %nop3788 = alloca i1, i1 0
-  %nop3789 = alloca i1, i1 0
-  %nop3790 = alloca i1, i1 0
-  %nop3791 = alloca i1, i1 0
-  %nop3792 = alloca i1, i1 0
-  %nop3793 = alloca i1, i1 0
-  %nop3794 = alloca i1, i1 0
-  %nop3795 = alloca i1, i1 0
-  %nop3796 = alloca i1, i1 0
-  %nop3797 = alloca i1, i1 0
-  %nop3798 = alloca i1, i1 0
-  %nop3799 = alloca i1, i1 0
-  %nop3800 = alloca i1, i1 0
-  %nop3801 = alloca i1, i1 0
-  %nop3802 = alloca i1, i1 0
-  %nop3803 = alloca i1, i1 0
-  %nop3804 = alloca i1, i1 0
-  %nop3805 = alloca i1, i1 0
-  %nop3806 = alloca i1, i1 0
-  %nop3807 = alloca i1, i1 0
-  %nop3808 = alloca i1, i1 0
-  %nop3809 = alloca i1, i1 0
-  %nop3810 = alloca i1, i1 0
-  %nop3811 = alloca i1, i1 0
-  %nop3812 = alloca i1, i1 0
-  %nop3813 = alloca i1, i1 0
-  %nop3814 = alloca i1, i1 0
-  %nop3815 = alloca i1, i1 0
-  %nop3816 = alloca i1, i1 0
-  %nop3817 = alloca i1, i1 0
-  %nop3818 = alloca i1, i1 0
-  %nop3819 = alloca i1, i1 0
-  %nop3820 = alloca i1, i1 0
-  %nop3821 = alloca i1, i1 0
-  %nop3822 = alloca i1, i1 0
-  %nop3823 = alloca i1, i1 0
-  %nop3824 = alloca i1, i1 0
-  %nop3825 = alloca i1, i1 0
-  %nop3826 = alloca i1, i1 0
-  %nop3827 = alloca i1, i1 0
-  %nop3828 = alloca i1, i1 0
-  %nop3829 = alloca i1, i1 0
-  %nop3830 = alloca i1, i1 0
-  %nop3831 = alloca i1, i1 0
-  %nop3832 = alloca i1, i1 0
-  %nop3833 = alloca i1, i1 0
-  %nop3834 = alloca i1, i1 0
-  %nop3835 = alloca i1, i1 0
-  %nop3836 = alloca i1, i1 0
-  %nop3837 = alloca i1, i1 0
-  %nop3838 = alloca i1, i1 0
-  %nop3839 = alloca i1, i1 0
-  %nop3840 = alloca i1, i1 0
-  %nop3841 = alloca i1, i1 0
-  %nop3842 = alloca i1, i1 0
-  %nop3843 = alloca i1, i1 0
-  %nop3844 = alloca i1, i1 0
-  %nop3845 = alloca i1, i1 0
-  %nop3846 = alloca i1, i1 0
-  %nop3847 = alloca i1, i1 0
-  %nop3848 = alloca i1, i1 0
-  %nop3849 = alloca i1, i1 0
-  %nop3850 = alloca i1, i1 0
-  %nop3851 = alloca i1, i1 0
-  %nop3852 = alloca i1, i1 0
-  %nop3853 = alloca i1, i1 0
-  %nop3854 = alloca i1, i1 0
-  %nop3855 = alloca i1, i1 0
-  %nop3856 = alloca i1, i1 0
-  %nop3857 = alloca i1, i1 0
-  %nop3858 = alloca i1, i1 0
-  %nop3859 = alloca i1, i1 0
-  %nop3860 = alloca i1, i1 0
-  %nop3861 = alloca i1, i1 0
-  %nop3862 = alloca i1, i1 0
-  %nop3863 = alloca i1, i1 0
-  %nop3864 = alloca i1, i1 0
-  %nop3865 = alloca i1, i1 0
-  %nop3866 = alloca i1, i1 0
-  %nop3867 = alloca i1, i1 0
-  %nop3868 = alloca i1, i1 0
-  %nop3869 = alloca i1, i1 0
-  %nop3870 = alloca i1, i1 0
-  %nop3871 = alloca i1, i1 0
-  %nop3872 = alloca i1, i1 0
-  %nop3873 = alloca i1, i1 0
-  %nop3874 = alloca i1, i1 0
-  %nop3875 = alloca i1, i1 0
-  %nop3876 = alloca i1, i1 0
-  %nop3877 = alloca i1, i1 0
-  %nop3878 = alloca i1, i1 0
-  %nop3879 = alloca i1, i1 0
-  %nop3880 = alloca i1, i1 0
-  %nop3881 = alloca i1, i1 0
-  %nop3882 = alloca i1, i1 0
-  %nop3883 = alloca i1, i1 0
-  %nop3884 = alloca i1, i1 0
-  %nop3885 = alloca i1, i1 0
-  %nop3886 = alloca i1, i1 0
-  %nop3887 = alloca i1, i1 0
-  %nop3888 = alloca i1, i1 0
-  %nop3889 = alloca i1, i1 0
-  %nop3890 = alloca i1, i1 0
-  %nop3891 = alloca i1, i1 0
-  %nop3892 = alloca i1, i1 0
-  %nop3893 = alloca i1, i1 0
-  %nop3894 = alloca i1, i1 0
-  %nop3895 = alloca i1, i1 0
-  %nop3896 = alloca i1, i1 0
-  %nop3897 = alloca i1, i1 0
-  %nop3898 = alloca i1, i1 0
-  %nop3899 = alloca i1, i1 0
-  %nop3900 = alloca i1, i1 0
-  %nop3901 = alloca i1, i1 0
-  %nop3902 = alloca i1, i1 0
-  %nop3903 = alloca i1, i1 0
-  %nop3904 = alloca i1, i1 0
-  %nop3905 = alloca i1, i1 0
-  %nop3906 = alloca i1, i1 0
-  %nop3907 = alloca i1, i1 0
-  %nop3908 = alloca i1, i1 0
-  %nop3909 = alloca i1, i1 0
-  %nop3910 = alloca i1, i1 0
-  %nop3911 = alloca i1, i1 0
-  %nop3912 = alloca i1, i1 0
-  %nop3913 = alloca i1, i1 0
-  %nop3914 = alloca i1, i1 0
-  %nop3915 = alloca i1, i1 0
-  %nop3916 = alloca i1, i1 0
-  %nop3917 = alloca i1, i1 0
-  %nop3918 = alloca i1, i1 0
-  %nop3919 = alloca i1, i1 0
-  %nop3920 = alloca i1, i1 0
-  %nop3921 = alloca i1, i1 0
-  %nop3922 = alloca i1, i1 0
-  %nop3923 = alloca i1, i1 0
-  %nop3924 = alloca i1, i1 0
-  %nop3925 = alloca i1, i1 0
-  %nop3926 = alloca i1, i1 0
-  %nop3927 = alloca i1, i1 0
-  %nop3928 = alloca i1, i1 0
-  %nop3929 = alloca i1, i1 0
-  %nop3930 = alloca i1, i1 0
-  %nop3931 = alloca i1, i1 0
-  %nop3932 = alloca i1, i1 0
-  %nop3933 = alloca i1, i1 0
-  %nop3934 = alloca i1, i1 0
-  %nop3935 = alloca i1, i1 0
-  %nop3936 = alloca i1, i1 0
-  %nop3937 = alloca i1, i1 0
-  %nop3938 = alloca i1, i1 0
-  %nop3939 = alloca i1, i1 0
-  %nop3940 = alloca i1, i1 0
-  %nop3941 = alloca i1, i1 0
-  %nop3942 = alloca i1, i1 0
-  %nop3943 = alloca i1, i1 0
-  %nop3944 = alloca i1, i1 0
-  %nop3945 = alloca i1, i1 0
-  %nop3946 = alloca i1, i1 0
-  %nop3947 = alloca i1, i1 0
-  %nop3948 = alloca i1, i1 0
-  %nop3949 = alloca i1, i1 0
-  %nop3950 = alloca i1, i1 0
-  %nop3951 = alloca i1, i1 0
-  %nop3952 = alloca i1, i1 0
-  %nop3953 = alloca i1, i1 0
-  %nop3954 = alloca i1, i1 0
-  %nop3955 = alloca i1, i1 0
-  %nop3956 = alloca i1, i1 0
-  %nop3957 = alloca i1, i1 0
-  %nop3958 = alloca i1, i1 0
-  %nop3959 = alloca i1, i1 0
-  %nop3960 = alloca i1, i1 0
-  %nop3961 = alloca i1, i1 0
-  %nop3962 = alloca i1, i1 0
-  %nop3963 = alloca i1, i1 0
-  %nop3964 = alloca i1, i1 0
-  %nop3965 = alloca i1, i1 0
-  %nop3966 = alloca i1, i1 0
-  %nop3967 = alloca i1, i1 0
-  %nop3968 = alloca i1, i1 0
-  %nop3969 = alloca i1, i1 0
-  %nop3970 = alloca i1, i1 0
-  %nop3971 = alloca i1, i1 0
-  %nop3972 = alloca i1, i1 0
-  %nop3973 = alloca i1, i1 0
-  %nop3974 = alloca i1, i1 0
-  %nop3975 = alloca i1, i1 0
-  %nop3976 = alloca i1, i1 0
-  %nop3977 = alloca i1, i1 0
-  %nop3978 = alloca i1, i1 0
-  %nop3979 = alloca i1, i1 0
-  %nop3980 = alloca i1, i1 0
-  %nop3981 = alloca i1, i1 0
-  %nop3982 = alloca i1, i1 0
-  %nop3983 = alloca i1, i1 0
-  %nop3984 = alloca i1, i1 0
-  %nop3985 = alloca i1, i1 0
-  %nop3986 = alloca i1, i1 0
-  %nop3987 = alloca i1, i1 0
-  %nop3988 = alloca i1, i1 0
-  %nop3989 = alloca i1, i1 0
-  %nop3990 = alloca i1, i1 0
-  %nop3991 = alloca i1, i1 0
-  %nop3992 = alloca i1, i1 0
-  %nop3993 = alloca i1, i1 0
-  %nop3994 = alloca i1, i1 0
-  %nop3995 = alloca i1, i1 0
-  %nop3996 = alloca i1, i1 0
-  %nop3997 = alloca i1, i1 0
-  %nop3998 = alloca i1, i1 0
-  %nop3999 = alloca i1, i1 0
-  %nop4000 = alloca i1, i1 0
-  %nop4001 = alloca i1, i1 0
-  %nop4002 = alloca i1, i1 0
-  %nop4003 = alloca i1, i1 0
-  %nop4004 = alloca i1, i1 0
-  %nop4005 = alloca i1, i1 0
-  %nop4006 = alloca i1, i1 0
-  %nop4007 = alloca i1, i1 0
-  %nop4008 = alloca i1, i1 0
-  %nop4009 = alloca i1, i1 0
-  %nop4010 = alloca i1, i1 0
-  %nop4011 = alloca i1, i1 0
-  %nop4012 = alloca i1, i1 0
-  %nop4013 = alloca i1, i1 0
-  %nop4014 = alloca i1, i1 0
-  %nop4015 = alloca i1, i1 0
-  %nop4016 = alloca i1, i1 0
-  %nop4017 = alloca i1, i1 0
-  %nop4018 = alloca i1, i1 0
-  %nop4019 = alloca i1, i1 0
-  %nop4020 = alloca i1, i1 0
-  %nop4021 = alloca i1, i1 0
-  %nop4022 = alloca i1, i1 0
-  %nop4023 = alloca i1, i1 0
-  %nop4024 = alloca i1, i1 0
-  %nop4025 = alloca i1, i1 0
-  %nop4026 = alloca i1, i1 0
-  %nop4027 = alloca i1, i1 0
-  %nop4028 = alloca i1, i1 0
-  %nop4029 = alloca i1, i1 0
-  %nop4030 = alloca i1, i1 0
-  %nop4031 = alloca i1, i1 0
-  %nop4032 = alloca i1, i1 0
-  %nop4033 = alloca i1, i1 0
-  %nop4034 = alloca i1, i1 0
-  %nop4035 = alloca i1, i1 0
-  %nop4036 = alloca i1, i1 0
-  %nop4037 = alloca i1, i1 0
-  %nop4038 = alloca i1, i1 0
-  %nop4039 = alloca i1, i1 0
-  %nop4040 = alloca i1, i1 0
-  %nop4041 = alloca i1, i1 0
-  %nop4042 = alloca i1, i1 0
-  %nop4043 = alloca i1, i1 0
-  %nop4044 = alloca i1, i1 0
-  %nop4045 = alloca i1, i1 0
-  %nop4046 = alloca i1, i1 0
-  %nop4047 = alloca i1, i1 0
-  %nop4048 = alloca i1, i1 0
-  %nop4049 = alloca i1, i1 0
-  %nop4050 = alloca i1, i1 0
-  %nop4051 = alloca i1, i1 0
-  %nop4052 = alloca i1, i1 0
-  %nop4053 = alloca i1, i1 0
-  %nop4054 = alloca i1, i1 0
-  %nop4055 = alloca i1, i1 0
-  %nop4056 = alloca i1, i1 0
-  %nop4057 = alloca i1, i1 0
-  %nop4058 = alloca i1, i1 0
-  %nop4059 = alloca i1, i1 0
-  %nop4060 = alloca i1, i1 0
-  %nop4061 = alloca i1, i1 0
-  %nop4062 = alloca i1, i1 0
-  %nop4063 = alloca i1, i1 0
-  %nop4064 = alloca i1, i1 0
-  %nop4065 = alloca i1, i1 0
-  %nop4066 = alloca i1, i1 0
-  %nop4067 = alloca i1, i1 0
-  %nop4068 = alloca i1, i1 0
-  %nop4069 = alloca i1, i1 0
-  %nop4070 = alloca i1, i1 0
-  %nop4071 = alloca i1, i1 0
-  %nop4072 = alloca i1, i1 0
-  %nop4073 = alloca i1, i1 0
-  %nop4074 = alloca i1, i1 0
-  %nop4075 = alloca i1, i1 0
-  %nop4076 = alloca i1, i1 0
-  %nop4077 = alloca i1, i1 0
-  %nop4078 = alloca i1, i1 0
-  %nop4079 = alloca i1, i1 0
-  %nop4080 = alloca i1, i1 0
-  %nop4081 = alloca i1, i1 0
-  %nop4082 = alloca i1, i1 0
-  %nop4083 = alloca i1, i1 0
-  %nop4084 = alloca i1, i1 0
-  %nop4085 = alloca i1, i1 0
-  %nop4086 = alloca i1, i1 0
-  %nop4087 = alloca i1, i1 0
-  %nop4088 = alloca i1, i1 0
-  %nop4089 = alloca i1, i1 0
-  %nop4090 = alloca i1, i1 0
-  %nop4091 = alloca i1, i1 0
-  %nop4092 = alloca i1, i1 0
-  %nop4093 = alloca i1, i1 0
-  %nop4094 = alloca i1, i1 0
-  %nop4095 = alloca i1, i1 0
-  %nop4096 = alloca i1, i1 0
-  %nop4097 = alloca i1, i1 0
-  %nop4098 = alloca i1, i1 0
-  %nop4099 = alloca i1, i1 0
-  %nop4100 = alloca i1, i1 0
-  %nop4101 = alloca i1, i1 0
-  %nop4102 = alloca i1, i1 0
-  %nop4103 = alloca i1, i1 0
-  %nop4104 = alloca i1, i1 0
-  %nop4105 = alloca i1, i1 0
-  %nop4106 = alloca i1, i1 0
-  %nop4107 = alloca i1, i1 0
-  %nop4108 = alloca i1, i1 0
-  %nop4109 = alloca i1, i1 0
-  %nop4110 = alloca i1, i1 0
-  %nop4111 = alloca i1, i1 0
-  %nop4112 = alloca i1, i1 0
-  %nop4113 = alloca i1, i1 0
-  %nop4114 = alloca i1, i1 0
-  %nop4115 = alloca i1, i1 0
-  %nop4116 = alloca i1, i1 0
-  %nop4117 = alloca i1, i1 0
-  %nop4118 = alloca i1, i1 0
-  %nop4119 = alloca i1, i1 0
-  %nop4120 = alloca i1, i1 0
-  %nop4121 = alloca i1, i1 0
-  %nop4122 = alloca i1, i1 0
-  %nop4123 = alloca i1, i1 0
-  %nop4124 = alloca i1, i1 0
-  %nop4125 = alloca i1, i1 0
-  %nop4126 = alloca i1, i1 0
-  %nop4127 = alloca i1, i1 0
-  %nop4128 = alloca i1, i1 0
-  %nop4129 = alloca i1, i1 0
-  %nop4130 = alloca i1, i1 0
-  %nop4131 = alloca i1, i1 0
-  %nop4132 = alloca i1, i1 0
-  %nop4133 = alloca i1, i1 0
-  %nop4134 = alloca i1, i1 0
-  %nop4135 = alloca i1, i1 0
-  %nop4136 = alloca i1, i1 0
-  %nop4137 = alloca i1, i1 0
-  %nop4138 = alloca i1, i1 0
-  %nop4139 = alloca i1, i1 0
-  %nop4140 = alloca i1, i1 0
-  %nop4141 = alloca i1, i1 0
-  %nop4142 = alloca i1, i1 0
-  %nop4143 = alloca i1, i1 0
-  %nop4144 = alloca i1, i1 0
-  %nop4145 = alloca i1, i1 0
-  %nop4146 = alloca i1, i1 0
-  %nop4147 = alloca i1, i1 0
-  %nop4148 = alloca i1, i1 0
-  %nop4149 = alloca i1, i1 0
-  %nop4150 = alloca i1, i1 0
-  %nop4151 = alloca i1, i1 0
-  %nop4152 = alloca i1, i1 0
-  %nop4153 = alloca i1, i1 0
-  %nop4154 = alloca i1, i1 0
-  %nop4155 = alloca i1, i1 0
-  %nop4156 = alloca i1, i1 0
-  %nop4157 = alloca i1, i1 0
-  %nop4158 = alloca i1, i1 0
-  %nop4159 = alloca i1, i1 0
-  %nop4160 = alloca i1, i1 0
-  %nop4161 = alloca i1, i1 0
-  %nop4162 = alloca i1, i1 0
-  %nop4163 = alloca i1, i1 0
-  %nop4164 = alloca i1, i1 0
-  %nop4165 = alloca i1, i1 0
-  %nop4166 = alloca i1, i1 0
-  %nop4167 = alloca i1, i1 0
-  %nop4168 = alloca i1, i1 0
-  %nop4169 = alloca i1, i1 0
-  %nop4170 = alloca i1, i1 0
-  %nop4171 = alloca i1, i1 0
-  %nop4172 = alloca i1, i1 0
-  %nop4173 = alloca i1, i1 0
-  %nop4174 = alloca i1, i1 0
-  %nop4175 = alloca i1, i1 0
-  %nop4176 = alloca i1, i1 0
-  %nop4177 = alloca i1, i1 0
-  %nop4178 = alloca i1, i1 0
-  %nop4179 = alloca i1, i1 0
-  %nop4180 = alloca i1, i1 0
-  %nop4181 = alloca i1, i1 0
-  %nop4182 = alloca i1, i1 0
-  %nop4183 = alloca i1, i1 0
-  %nop4184 = alloca i1, i1 0
-  %nop4185 = alloca i1, i1 0
-  %nop4186 = alloca i1, i1 0
-  %nop4187 = alloca i1, i1 0
-  %nop4188 = alloca i1, i1 0
-  %nop4189 = alloca i1, i1 0
-  %nop4190 = alloca i1, i1 0
-  %nop4191 = alloca i1, i1 0
-  %nop4192 = alloca i1, i1 0
-  %nop4193 = alloca i1, i1 0
-  %nop4194 = alloca i1, i1 0
-  %nop4195 = alloca i1, i1 0
-  %nop4196 = alloca i1, i1 0
-  %nop4197 = alloca i1, i1 0
-  %nop4198 = alloca i1, i1 0
-  %nop4199 = alloca i1, i1 0
-  %nop4200 = alloca i1, i1 0
-  %nop4201 = alloca i1, i1 0
-  %nop4202 = alloca i1, i1 0
-  %nop4203 = alloca i1, i1 0
-  %nop4204 = alloca i1, i1 0
-  %nop4205 = alloca i1, i1 0
-  %nop4206 = alloca i1, i1 0
-  %nop4207 = alloca i1, i1 0
-  %nop4208 = alloca i1, i1 0
-  %nop4209 = alloca i1, i1 0
-  %nop4210 = alloca i1, i1 0
-  %nop4211 = alloca i1, i1 0
-  %nop4212 = alloca i1, i1 0
-  %nop4213 = alloca i1, i1 0
-  %nop4214 = alloca i1, i1 0
-  %nop4215 = alloca i1, i1 0
-  %nop4216 = alloca i1, i1 0
-  %nop4217 = alloca i1, i1 0
-  %nop4218 = alloca i1, i1 0
-  %nop4219 = alloca i1, i1 0
-  %nop4220 = alloca i1, i1 0
-  %nop4221 = alloca i1, i1 0
-  %nop4222 = alloca i1, i1 0
-  %nop4223 = alloca i1, i1 0
-  %nop4224 = alloca i1, i1 0
-  %nop4225 = alloca i1, i1 0
-  %nop4226 = alloca i1, i1 0
-  %nop4227 = alloca i1, i1 0
-  %nop4228 = alloca i1, i1 0
-  %nop4229 = alloca i1, i1 0
-  %nop4230 = alloca i1, i1 0
-  %nop4231 = alloca i1, i1 0
-  %nop4232 = alloca i1, i1 0
-  %nop4233 = alloca i1, i1 0
-  %nop4234 = alloca i1, i1 0
-  %nop4235 = alloca i1, i1 0
-  %nop4236 = alloca i1, i1 0
-  %nop4237 = alloca i1, i1 0
-  %nop4238 = alloca i1, i1 0
-  %nop4239 = alloca i1, i1 0
-  %nop4240 = alloca i1, i1 0
-  %nop4241 = alloca i1, i1 0
-  %nop4242 = alloca i1, i1 0
-  %nop4243 = alloca i1, i1 0
-  %nop4244 = alloca i1, i1 0
-  %nop4245 = alloca i1, i1 0
-  %nop4246 = alloca i1, i1 0
-  %nop4247 = alloca i1, i1 0
-  %nop4248 = alloca i1, i1 0
-  %nop4249 = alloca i1, i1 0
-  %nop4250 = alloca i1, i1 0
-  %nop4251 = alloca i1, i1 0
-  %nop4252 = alloca i1, i1 0
-  %nop4253 = alloca i1, i1 0
-  %nop4254 = alloca i1, i1 0
-  %nop4255 = alloca i1, i1 0
-  %nop4256 = alloca i1, i1 0
-  %nop4257 = alloca i1, i1 0
-  %nop4258 = alloca i1, i1 0
-  %nop4259 = alloca i1, i1 0
-  %nop4260 = alloca i1, i1 0
-  %nop4261 = alloca i1, i1 0
-  %nop4262 = alloca i1, i1 0
-  %nop4263 = alloca i1, i1 0
-  %nop4264 = alloca i1, i1 0
-  %nop4265 = alloca i1, i1 0
-  %nop4266 = alloca i1, i1 0
-  %nop4267 = alloca i1, i1 0
-  %nop4268 = alloca i1, i1 0
-  %nop4269 = alloca i1, i1 0
-  %nop4270 = alloca i1, i1 0
-  %nop4271 = alloca i1, i1 0
-  %nop4272 = alloca i1, i1 0
-  %nop4273 = alloca i1, i1 0
-  %nop4274 = alloca i1, i1 0
-  %nop4275 = alloca i1, i1 0
-  %nop4276 = alloca i1, i1 0
-  %nop4277 = alloca i1, i1 0
-  %nop4278 = alloca i1, i1 0
-  %nop4279 = alloca i1, i1 0
-  %nop4280 = alloca i1, i1 0
-  %nop4281 = alloca i1, i1 0
-  %nop4282 = alloca i1, i1 0
-  %nop4283 = alloca i1, i1 0
-  %nop4284 = alloca i1, i1 0
-  %nop4285 = alloca i1, i1 0
-  %nop4286 = alloca i1, i1 0
-  %nop4287 = alloca i1, i1 0
-  %nop4288 = alloca i1, i1 0
-  %nop4289 = alloca i1, i1 0
-  %nop4290 = alloca i1, i1 0
-  %nop4291 = alloca i1, i1 0
-  %nop4292 = alloca i1, i1 0
-  %nop4293 = alloca i1, i1 0
-  %nop4294 = alloca i1, i1 0
-  %nop4295 = alloca i1, i1 0
-  %nop4296 = alloca i1, i1 0
-  %nop4297 = alloca i1, i1 0
-  %nop4298 = alloca i1, i1 0
-  %nop4299 = alloca i1, i1 0
-  %nop4300 = alloca i1, i1 0
-  %nop4301 = alloca i1, i1 0
-  %nop4302 = alloca i1, i1 0
-  %nop4303 = alloca i1, i1 0
-  %nop4304 = alloca i1, i1 0
-  %nop4305 = alloca i1, i1 0
-  %nop4306 = alloca i1, i1 0
-  %nop4307 = alloca i1, i1 0
-  %nop4308 = alloca i1, i1 0
-  %nop4309 = alloca i1, i1 0
-  %nop4310 = alloca i1, i1 0
-  %nop4311 = alloca i1, i1 0
-  %nop4312 = alloca i1, i1 0
-  %nop4313 = alloca i1, i1 0
-  %nop4314 = alloca i1, i1 0
-  %nop4315 = alloca i1, i1 0
-  %nop4316 = alloca i1, i1 0
-  %nop4317 = alloca i1, i1 0
-  %nop4318 = alloca i1, i1 0
-  %nop4319 = alloca i1, i1 0
-  %nop4320 = alloca i1, i1 0
-  %nop4321 = alloca i1, i1 0
-  %nop4322 = alloca i1, i1 0
-  %nop4323 = alloca i1, i1 0
-  %nop4324 = alloca i1, i1 0
-  %nop4325 = alloca i1, i1 0
-  %nop4326 = alloca i1, i1 0
-  %nop4327 = alloca i1, i1 0
-  %nop4328 = alloca i1, i1 0
-  %nop4329 = alloca i1, i1 0
-  %nop4330 = alloca i1, i1 0
-  %nop4331 = alloca i1, i1 0
-  %nop4332 = alloca i1, i1 0
-  %nop4333 = alloca i1, i1 0
-  %nop4334 = alloca i1, i1 0
-  %nop4335 = alloca i1, i1 0
-  %nop4336 = alloca i1, i1 0
-  %nop4337 = alloca i1, i1 0
-  %nop4338 = alloca i1, i1 0
-  %nop4339 = alloca i1, i1 0
-  %nop4340 = alloca i1, i1 0
-  %nop4341 = alloca i1, i1 0
-  %nop4342 = alloca i1, i1 0
-  %nop4343 = alloca i1, i1 0
-  %nop4344 = alloca i1, i1 0
-  %nop4345 = alloca i1, i1 0
-  %nop4346 = alloca i1, i1 0
-  %nop4347 = alloca i1, i1 0
-  %nop4348 = alloca i1, i1 0
-  %nop4349 = alloca i1, i1 0
-  %nop4350 = alloca i1, i1 0
-  %nop4351 = alloca i1, i1 0
-  %nop4352 = alloca i1, i1 0
-  %nop4353 = alloca i1, i1 0
-  %nop4354 = alloca i1, i1 0
-  %nop4355 = alloca i1, i1 0
-  %nop4356 = alloca i1, i1 0
-  %nop4357 = alloca i1, i1 0
-  %nop4358 = alloca i1, i1 0
-  %nop4359 = alloca i1, i1 0
-  %nop4360 = alloca i1, i1 0
-  %nop4361 = alloca i1, i1 0
-  %nop4362 = alloca i1, i1 0
-  %nop4363 = alloca i1, i1 0
-  %nop4364 = alloca i1, i1 0
-  %nop4365 = alloca i1, i1 0
-  %nop4366 = alloca i1, i1 0
-  %nop4367 = alloca i1, i1 0
-  %nop4368 = alloca i1, i1 0
-  %nop4369 = alloca i1, i1 0
-  %nop4370 = alloca i1, i1 0
-  %nop4371 = alloca i1, i1 0
-  %nop4372 = alloca i1, i1 0
-  %nop4373 = alloca i1, i1 0
-  %nop4374 = alloca i1, i1 0
-  %nop4375 = alloca i1, i1 0
-  %nop4376 = alloca i1, i1 0
-  %nop4377 = alloca i1, i1 0
-  %nop4378 = alloca i1, i1 0
-  %nop4379 = alloca i1, i1 0
-  %nop4380 = alloca i1, i1 0
-  %nop4381 = alloca i1, i1 0
-  %nop4382 = alloca i1, i1 0
-  %nop4383 = alloca i1, i1 0
-  %nop4384 = alloca i1, i1 0
-  %nop4385 = alloca i1, i1 0
-  %nop4386 = alloca i1, i1 0
-  %nop4387 = alloca i1, i1 0
-  %nop4388 = alloca i1, i1 0
-  %nop4389 = alloca i1, i1 0
-  %nop4390 = alloca i1, i1 0
-  %nop4391 = alloca i1, i1 0
-  %nop4392 = alloca i1, i1 0
-  %nop4393 = alloca i1, i1 0
-  %nop4394 = alloca i1, i1 0
-  %nop4395 = alloca i1, i1 0
-  %nop4396 = alloca i1, i1 0
-  %nop4397 = alloca i1, i1 0
-  %nop4398 = alloca i1, i1 0
-  %nop4399 = alloca i1, i1 0
-  %nop4400 = alloca i1, i1 0
-  %nop4401 = alloca i1, i1 0
-  %nop4402 = alloca i1, i1 0
-  %nop4403 = alloca i1, i1 0
-  %nop4404 = alloca i1, i1 0
-  %nop4405 = alloca i1, i1 0
-  %nop4406 = alloca i1, i1 0
-  %nop4407 = alloca i1, i1 0
-  %nop4408 = alloca i1, i1 0
-  %nop4409 = alloca i1, i1 0
-  %nop4410 = alloca i1, i1 0
-  %nop4411 = alloca i1, i1 0
-  %nop4412 = alloca i1, i1 0
-  %nop4413 = alloca i1, i1 0
-  %nop4414 = alloca i1, i1 0
-  %nop4415 = alloca i1, i1 0
-  %nop4416 = alloca i1, i1 0
-  %nop4417 = alloca i1, i1 0
-  %nop4418 = alloca i1, i1 0
-  %nop4419 = alloca i1, i1 0
-  %nop4420 = alloca i1, i1 0
-  %nop4421 = alloca i1, i1 0
-  %nop4422 = alloca i1, i1 0
-  %nop4423 = alloca i1, i1 0
-  %nop4424 = alloca i1, i1 0
-  %nop4425 = alloca i1, i1 0
-  %nop4426 = alloca i1, i1 0
-  %nop4427 = alloca i1, i1 0
-  %nop4428 = alloca i1, i1 0
-  %nop4429 = alloca i1, i1 0
-  %nop4430 = alloca i1, i1 0
-  %nop4431 = alloca i1, i1 0
-  %nop4432 = alloca i1, i1 0
-  %nop4433 = alloca i1, i1 0
-  %nop4434 = alloca i1, i1 0
-  %nop4435 = alloca i1, i1 0
-  %nop4436 = alloca i1, i1 0
-  %nop4437 = alloca i1, i1 0
-  %nop4438 = alloca i1, i1 0
-  %nop4439 = alloca i1, i1 0
-  %nop4440 = alloca i1, i1 0
-  %nop4441 = alloca i1, i1 0
-  %nop4442 = alloca i1, i1 0
-  %nop4443 = alloca i1, i1 0
-  %nop4444 = alloca i1, i1 0
-  %nop4445 = alloca i1, i1 0
-  %nop4446 = alloca i1, i1 0
-  %nop4447 = alloca i1, i1 0
-  %nop4448 = alloca i1, i1 0
-  %nop4449 = alloca i1, i1 0
-  %nop4450 = alloca i1, i1 0
-  %nop4451 = alloca i1, i1 0
-  %nop4452 = alloca i1, i1 0
-  %nop4453 = alloca i1, i1 0
-  %nop4454 = alloca i1, i1 0
-  %nop4455 = alloca i1, i1 0
-  %nop4456 = alloca i1, i1 0
-  %nop4457 = alloca i1, i1 0
-  %nop4458 = alloca i1, i1 0
-  %nop4459 = alloca i1, i1 0
-  %nop4460 = alloca i1, i1 0
-  %nop4461 = alloca i1, i1 0
-  %nop4462 = alloca i1, i1 0
-  %nop4463 = alloca i1, i1 0
-  %nop4464 = alloca i1, i1 0
-  %nop4465 = alloca i1, i1 0
-  %nop4466 = alloca i1, i1 0
-  %nop4467 = alloca i1, i1 0
-  %nop4468 = alloca i1, i1 0
-  %nop4469 = alloca i1, i1 0
-  %nop4470 = alloca i1, i1 0
-  %nop4471 = alloca i1, i1 0
-  %nop4472 = alloca i1, i1 0
-  %nop4473 = alloca i1, i1 0
-  %nop4474 = alloca i1, i1 0
-  %nop4475 = alloca i1, i1 0
-  %nop4476 = alloca i1, i1 0
-  %nop4477 = alloca i1, i1 0
-  %nop4478 = alloca i1, i1 0
-  %nop4479 = alloca i1, i1 0
-  %nop4480 = alloca i1, i1 0
-  %nop4481 = alloca i1, i1 0
-  %nop4482 = alloca i1, i1 0
-  %nop4483 = alloca i1, i1 0
-  %nop4484 = alloca i1, i1 0
-  %nop4485 = alloca i1, i1 0
-  %nop4486 = alloca i1, i1 0
-  %nop4487 = alloca i1, i1 0
-  %nop4488 = alloca i1, i1 0
-  %nop4489 = alloca i1, i1 0
-  %nop4490 = alloca i1, i1 0
-  %nop4491 = alloca i1, i1 0
-  %nop4492 = alloca i1, i1 0
-  %nop4493 = alloca i1, i1 0
-  %nop4494 = alloca i1, i1 0
-  %nop4495 = alloca i1, i1 0
-  %nop4496 = alloca i1, i1 0
-  %nop4497 = alloca i1, i1 0
-  %nop4498 = alloca i1, i1 0
-  %nop4499 = alloca i1, i1 0
-  %nop4500 = alloca i1, i1 0
-  %nop4501 = alloca i1, i1 0
-  %nop4502 = alloca i1, i1 0
-  %nop4503 = alloca i1, i1 0
-  %nop4504 = alloca i1, i1 0
-  %nop4505 = alloca i1, i1 0
-  %nop4506 = alloca i1, i1 0
-  %nop4507 = alloca i1, i1 0
-  %nop4508 = alloca i1, i1 0
-  %nop4509 = alloca i1, i1 0
-  %nop4510 = alloca i1, i1 0
-  %nop4511 = alloca i1, i1 0
-  %nop4512 = alloca i1, i1 0
-  %nop4513 = alloca i1, i1 0
-  %nop4514 = alloca i1, i1 0
-  %nop4515 = alloca i1, i1 0
-  %nop4516 = alloca i1, i1 0
-  %nop4517 = alloca i1, i1 0
-  %nop4518 = alloca i1, i1 0
-  %nop4519 = alloca i1, i1 0
-  %nop4520 = alloca i1, i1 0
-  %nop4521 = alloca i1, i1 0
-  %nop4522 = alloca i1, i1 0
-  %nop4523 = alloca i1, i1 0
-  %nop4524 = alloca i1, i1 0
-  %nop4525 = alloca i1, i1 0
-  %nop4526 = alloca i1, i1 0
-  %nop4527 = alloca i1, i1 0
-  %nop4528 = alloca i1, i1 0
-  %nop4529 = alloca i1, i1 0
-  %nop4530 = alloca i1, i1 0
-  %nop4531 = alloca i1, i1 0
-  %nop4532 = alloca i1, i1 0
-  %nop4533 = alloca i1, i1 0
-  %nop4534 = alloca i1, i1 0
-  %nop4535 = alloca i1, i1 0
-  %nop4536 = alloca i1, i1 0
-  %nop4537 = alloca i1, i1 0
-  %nop4538 = alloca i1, i1 0
-  %nop4539 = alloca i1, i1 0
-  %nop4540 = alloca i1, i1 0
-  %nop4541 = alloca i1, i1 0
-  %nop4542 = alloca i1, i1 0
-  %nop4543 = alloca i1, i1 0
-  %nop4544 = alloca i1, i1 0
-  %nop4545 = alloca i1, i1 0
-  %nop4546 = alloca i1, i1 0
-  %nop4547 = alloca i1, i1 0
-  %nop4548 = alloca i1, i1 0
-  %nop4549 = alloca i1, i1 0
-  %nop4550 = alloca i1, i1 0
-  %nop4551 = alloca i1, i1 0
-  %nop4552 = alloca i1, i1 0
-  %nop4553 = alloca i1, i1 0
-  %nop4554 = alloca i1, i1 0
-  %nop4555 = alloca i1, i1 0
-  %nop4556 = alloca i1, i1 0
-  %nop4557 = alloca i1, i1 0
-  %nop4558 = alloca i1, i1 0
-  %nop4559 = alloca i1, i1 0
-  %nop4560 = alloca i1, i1 0
-  %nop4561 = alloca i1, i1 0
-  %nop4562 = alloca i1, i1 0
-  %nop4563 = alloca i1, i1 0
-  %nop4564 = alloca i1, i1 0
-  %nop4565 = alloca i1, i1 0
-  %nop4566 = alloca i1, i1 0
-  %nop4567 = alloca i1, i1 0
-  %nop4568 = alloca i1, i1 0
-  %nop4569 = alloca i1, i1 0
-  %nop4570 = alloca i1, i1 0
-  %nop4571 = alloca i1, i1 0
-  %nop4572 = alloca i1, i1 0
-  %nop4573 = alloca i1, i1 0
-  %nop4574 = alloca i1, i1 0
-  %nop4575 = alloca i1, i1 0
-  %nop4576 = alloca i1, i1 0
-  %nop4577 = alloca i1, i1 0
-  %nop4578 = alloca i1, i1 0
-  %nop4579 = alloca i1, i1 0
-  %nop4580 = alloca i1, i1 0
-  %nop4581 = alloca i1, i1 0
-  %nop4582 = alloca i1, i1 0
-  %nop4583 = alloca i1, i1 0
-  %nop4584 = alloca i1, i1 0
-  %nop4585 = alloca i1, i1 0
-  %nop4586 = alloca i1, i1 0
-  %nop4587 = alloca i1, i1 0
-  %nop4588 = alloca i1, i1 0
-  %nop4589 = alloca i1, i1 0
-  %nop4590 = alloca i1, i1 0
-  %nop4591 = alloca i1, i1 0
-  %nop4592 = alloca i1, i1 0
-  %nop4593 = alloca i1, i1 0
-  %nop4594 = alloca i1, i1 0
-  %nop4595 = alloca i1, i1 0
-  %nop4596 = alloca i1, i1 0
-  %nop4597 = alloca i1, i1 0
-  %nop4598 = alloca i1, i1 0
-  %nop4599 = alloca i1, i1 0
-  %nop4600 = alloca i1, i1 0
-  %nop4601 = alloca i1, i1 0
-  %nop4602 = alloca i1, i1 0
-  %nop4603 = alloca i1, i1 0
-  %nop4604 = alloca i1, i1 0
-  %nop4605 = alloca i1, i1 0
-  %nop4606 = alloca i1, i1 0
-  %nop4607 = alloca i1, i1 0
-  %nop4608 = alloca i1, i1 0
-  %nop4609 = alloca i1, i1 0
-  %nop4610 = alloca i1, i1 0
-  %nop4611 = alloca i1, i1 0
-  %nop4612 = alloca i1, i1 0
-  %nop4613 = alloca i1, i1 0
-  %nop4614 = alloca i1, i1 0
-  %nop4615 = alloca i1, i1 0
-  %nop4616 = alloca i1, i1 0
-  %nop4617 = alloca i1, i1 0
-  %nop4618 = alloca i1, i1 0
-  %nop4619 = alloca i1, i1 0
-  %nop4620 = alloca i1, i1 0
-  %nop4621 = alloca i1, i1 0
-  %nop4622 = alloca i1, i1 0
-  %nop4623 = alloca i1, i1 0
-  %nop4624 = alloca i1, i1 0
-  %nop4625 = alloca i1, i1 0
-  %nop4626 = alloca i1, i1 0
-  %nop4627 = alloca i1, i1 0
-  %nop4628 = alloca i1, i1 0
-  %nop4629 = alloca i1, i1 0
-  %nop4630 = alloca i1, i1 0
-  %nop4631 = alloca i1, i1 0
-  %nop4632 = alloca i1, i1 0
-  %nop4633 = alloca i1, i1 0
-  %nop4634 = alloca i1, i1 0
-  %nop4635 = alloca i1, i1 0
-  %nop4636 = alloca i1, i1 0
-  %nop4637 = alloca i1, i1 0
-  %nop4638 = alloca i1, i1 0
-  %nop4639 = alloca i1, i1 0
-  %nop4640 = alloca i1, i1 0
-  %nop4641 = alloca i1, i1 0
-  %nop4642 = alloca i1, i1 0
-  %nop4643 = alloca i1, i1 0
-  %nop4644 = alloca i1, i1 0
-  %nop4645 = alloca i1, i1 0
-  %nop4646 = alloca i1, i1 0
-  %nop4647 = alloca i1, i1 0
-  %nop4648 = alloca i1, i1 0
-  %nop4649 = alloca i1, i1 0
-  %nop4650 = alloca i1, i1 0
-  %nop4651 = alloca i1, i1 0
-  %nop4652 = alloca i1, i1 0
-  %nop4653 = alloca i1, i1 0
-  %nop4654 = alloca i1, i1 0
-  %nop4655 = alloca i1, i1 0
-  %nop4656 = alloca i1, i1 0
-  %nop4657 = alloca i1, i1 0
-  %nop4658 = alloca i1, i1 0
-  %nop4659 = alloca i1, i1 0
-  %nop4660 = alloca i1, i1 0
-  %nop4661 = alloca i1, i1 0
-  %nop4662 = alloca i1, i1 0
-  %nop4663 = alloca i1, i1 0
-  %nop4664 = alloca i1, i1 0
-  %nop4665 = alloca i1, i1 0
-  %nop4666 = alloca i1, i1 0
-  %nop4667 = alloca i1, i1 0
-  %nop4668 = alloca i1, i1 0
-  %nop4669 = alloca i1, i1 0
-  %nop4670 = alloca i1, i1 0
-  %nop4671 = alloca i1, i1 0
-  %nop4672 = alloca i1, i1 0
-  %nop4673 = alloca i1, i1 0
-  %nop4674 = alloca i1, i1 0
-  %nop4675 = alloca i1, i1 0
-  %nop4676 = alloca i1, i1 0
-  %nop4677 = alloca i1, i1 0
-  %nop4678 = alloca i1, i1 0
-  %nop4679 = alloca i1, i1 0
-  %nop4680 = alloca i1, i1 0
-  %nop4681 = alloca i1, i1 0
-  %nop4682 = alloca i1, i1 0
-  %nop4683 = alloca i1, i1 0
-  %nop4684 = alloca i1, i1 0
-  %nop4685 = alloca i1, i1 0
-  %nop4686 = alloca i1, i1 0
-  %nop4687 = alloca i1, i1 0
-  %nop4688 = alloca i1, i1 0
-  %nop4689 = alloca i1, i1 0
-  %nop4690 = alloca i1, i1 0
-  %nop4691 = alloca i1, i1 0
-  %nop4692 = alloca i1, i1 0
-  %nop4693 = alloca i1, i1 0
-  %nop4694 = alloca i1, i1 0
-  %nop4695 = alloca i1, i1 0
-  %nop4696 = alloca i1, i1 0
-  %nop4697 = alloca i1, i1 0
-  %nop4698 = alloca i1, i1 0
-  %nop4699 = alloca i1, i1 0
-  %nop4700 = alloca i1, i1 0
-  %nop4701 = alloca i1, i1 0
-  %nop4702 = alloca i1, i1 0
-  %nop4703 = alloca i1, i1 0
-  %nop4704 = alloca i1, i1 0
-  %nop4705 = alloca i1, i1 0
-  %nop4706 = alloca i1, i1 0
-  %nop4707 = alloca i1, i1 0
-  %nop4708 = alloca i1, i1 0
-  %nop4709 = alloca i1, i1 0
-  %nop4710 = alloca i1, i1 0
-  %nop4711 = alloca i1, i1 0
-  %nop4712 = alloca i1, i1 0
-  %nop4713 = alloca i1, i1 0
-  %nop4714 = alloca i1, i1 0
-  %nop4715 = alloca i1, i1 0
-  %nop4716 = alloca i1, i1 0
-  %nop4717 = alloca i1, i1 0
-  %nop4718 = alloca i1, i1 0
-  %nop4719 = alloca i1, i1 0
-  %nop4720 = alloca i1, i1 0
-  %nop4721 = alloca i1, i1 0
-  %nop4722 = alloca i1, i1 0
-  %nop4723 = alloca i1, i1 0
-  %nop4724 = alloca i1, i1 0
-  %nop4725 = alloca i1, i1 0
-  %nop4726 = alloca i1, i1 0
-  %nop4727 = alloca i1, i1 0
-  %nop4728 = alloca i1, i1 0
-  %nop4729 = alloca i1, i1 0
-  %nop4730 = alloca i1, i1 0
-  %nop4731 = alloca i1, i1 0
-  %nop4732 = alloca i1, i1 0
-  %nop4733 = alloca i1, i1 0
-  %nop4734 = alloca i1, i1 0
-  %nop4735 = alloca i1, i1 0
-  %nop4736 = alloca i1, i1 0
-  %nop4737 = alloca i1, i1 0
-  %nop4738 = alloca i1, i1 0
-  %nop4739 = alloca i1, i1 0
-  %nop4740 = alloca i1, i1 0
-  %nop4741 = alloca i1, i1 0
-  %nop4742 = alloca i1, i1 0
-  %nop4743 = alloca i1, i1 0
-  %nop4744 = alloca i1, i1 0
-  %nop4745 = alloca i1, i1 0
-  %nop4746 = alloca i1, i1 0
-  %nop4747 = alloca i1, i1 0
-  %nop4748 = alloca i1, i1 0
-  %nop4749 = alloca i1, i1 0
-  %nop4750 = alloca i1, i1 0
-  %nop4751 = alloca i1, i1 0
-  %nop4752 = alloca i1, i1 0
-  %nop4753 = alloca i1, i1 0
-  %nop4754 = alloca i1, i1 0
-  %nop4755 = alloca i1, i1 0
-  %nop4756 = alloca i1, i1 0
-  %nop4757 = alloca i1, i1 0
-  %nop4758 = alloca i1, i1 0
-  %nop4759 = alloca i1, i1 0
-  %nop4760 = alloca i1, i1 0
-  %nop4761 = alloca i1, i1 0
-  %nop4762 = alloca i1, i1 0
-  %nop4763 = alloca i1, i1 0
-  %nop4764 = alloca i1, i1 0
-  %nop4765 = alloca i1, i1 0
-  %nop4766 = alloca i1, i1 0
-  %nop4767 = alloca i1, i1 0
-  %nop4768 = alloca i1, i1 0
-  %nop4769 = alloca i1, i1 0
-  %nop4770 = alloca i1, i1 0
-  %nop4771 = alloca i1, i1 0
-  %nop4772 = alloca i1, i1 0
-  %nop4773 = alloca i1, i1 0
-  %nop4774 = alloca i1, i1 0
-  %nop4775 = alloca i1, i1 0
-  %nop4776 = alloca i1, i1 0
-  %nop4777 = alloca i1, i1 0
-  %nop4778 = alloca i1, i1 0
-  %nop4779 = alloca i1, i1 0
-  %nop4780 = alloca i1, i1 0
-  %nop4781 = alloca i1, i1 0
-  %nop4782 = alloca i1, i1 0
-  %nop4783 = alloca i1, i1 0
-  %nop4784 = alloca i1, i1 0
-  %nop4785 = alloca i1, i1 0
-  %nop4786 = alloca i1, i1 0
-  %nop4787 = alloca i1, i1 0
-  %nop4788 = alloca i1, i1 0
-  %nop4789 = alloca i1, i1 0
-  %nop4790 = alloca i1, i1 0
-  %nop4791 = alloca i1, i1 0
-  %nop4792 = alloca i1, i1 0
-  %nop4793 = alloca i1, i1 0
-  %nop4794 = alloca i1, i1 0
-  %nop4795 = alloca i1, i1 0
-  %nop4796 = alloca i1, i1 0
-  %nop4797 = alloca i1, i1 0
-  %nop4798 = alloca i1, i1 0
-  %nop4799 = alloca i1, i1 0
-  %nop4800 = alloca i1, i1 0
-  %nop4801 = alloca i1, i1 0
-  %nop4802 = alloca i1, i1 0
-  %nop4803 = alloca i1, i1 0
-  %nop4804 = alloca i1, i1 0
-  %nop4805 = alloca i1, i1 0
-  %nop4806 = alloca i1, i1 0
-  %nop4807 = alloca i1, i1 0
-  %nop4808 = alloca i1, i1 0
-  %nop4809 = alloca i1, i1 0
-  %nop4810 = alloca i1, i1 0
-  %nop4811 = alloca i1, i1 0
-  %nop4812 = alloca i1, i1 0
-  %nop4813 = alloca i1, i1 0
-  %nop4814 = alloca i1, i1 0
-  %nop4815 = alloca i1, i1 0
-  %nop4816 = alloca i1, i1 0
-  %nop4817 = alloca i1, i1 0
-  %nop4818 = alloca i1, i1 0
-  %nop4819 = alloca i1, i1 0
-  %nop4820 = alloca i1, i1 0
-  %nop4821 = alloca i1, i1 0
-  %nop4822 = alloca i1, i1 0
-  %nop4823 = alloca i1, i1 0
-  %nop4824 = alloca i1, i1 0
-  %nop4825 = alloca i1, i1 0
-  %nop4826 = alloca i1, i1 0
-  %nop4827 = alloca i1, i1 0
-  %nop4828 = alloca i1, i1 0
-  %nop4829 = alloca i1, i1 0
-  %nop4830 = alloca i1, i1 0
-  %nop4831 = alloca i1, i1 0
-  %nop4832 = alloca i1, i1 0
-  %nop4833 = alloca i1, i1 0
-  %nop4834 = alloca i1, i1 0
-  %nop4835 = alloca i1, i1 0
-  %nop4836 = alloca i1, i1 0
-  %nop4837 = alloca i1, i1 0
-  %nop4838 = alloca i1, i1 0
-  %nop4839 = alloca i1, i1 0
-  %nop4840 = alloca i1, i1 0
-  %nop4841 = alloca i1, i1 0
-  %nop4842 = alloca i1, i1 0
-  %nop4843 = alloca i1, i1 0
-  %nop4844 = alloca i1, i1 0
-  %nop4845 = alloca i1, i1 0
-  %nop4846 = alloca i1, i1 0
-  %nop4847 = alloca i1, i1 0
-  %nop4848 = alloca i1, i1 0
-  %nop4849 = alloca i1, i1 0
-  %nop4850 = alloca i1, i1 0
-  %nop4851 = alloca i1, i1 0
-  %nop4852 = alloca i1, i1 0
-  %nop4853 = alloca i1, i1 0
-  %nop4854 = alloca i1, i1 0
-  %nop4855 = alloca i1, i1 0
-  %nop4856 = alloca i1, i1 0
-  %nop4857 = alloca i1, i1 0
-  %nop4858 = alloca i1, i1 0
-  %nop4859 = alloca i1, i1 0
-  %nop4860 = alloca i1, i1 0
-  %nop4861 = alloca i1, i1 0
-  %nop4862 = alloca i1, i1 0
-  %nop4863 = alloca i1, i1 0
-  %nop4864 = alloca i1, i1 0
-  %nop4865 = alloca i1, i1 0
-  %nop4866 = alloca i1, i1 0
-  %nop4867 = alloca i1, i1 0
-  %nop4868 = alloca i1, i1 0
-  %nop4869 = alloca i1, i1 0
-  %nop4870 = alloca i1, i1 0
-  %nop4871 = alloca i1, i1 0
-  %nop4872 = alloca i1, i1 0
-  %nop4873 = alloca i1, i1 0
-  %nop4874 = alloca i1, i1 0
-  %nop4875 = alloca i1, i1 0
-  %nop4876 = alloca i1, i1 0
-  %nop4877 = alloca i1, i1 0
-  %nop4878 = alloca i1, i1 0
-  %nop4879 = alloca i1, i1 0
-  %nop4880 = alloca i1, i1 0
-  %nop4881 = alloca i1, i1 0
-  %nop4882 = alloca i1, i1 0
-  %nop4883 = alloca i1, i1 0
-  %nop4884 = alloca i1, i1 0
-  %nop4885 = alloca i1, i1 0
-  %nop4886 = alloca i1, i1 0
-  %nop4887 = alloca i1, i1 0
-  %nop4888 = alloca i1, i1 0
-  %nop4889 = alloca i1, i1 0
-  %nop4890 = alloca i1, i1 0
-  %nop4891 = alloca i1, i1 0
-  %nop4892 = alloca i1, i1 0
-  %nop4893 = alloca i1, i1 0
-  %nop4894 = alloca i1, i1 0
-  %nop4895 = alloca i1, i1 0
-  %nop4896 = alloca i1, i1 0
-  %nop4897 = alloca i1, i1 0
-  %nop4898 = alloca i1, i1 0
-  %nop4899 = alloca i1, i1 0
-  %nop4900 = alloca i1, i1 0
-  %nop4901 = alloca i1, i1 0
-  %nop4902 = alloca i1, i1 0
-  %nop4903 = alloca i1, i1 0
-  %nop4904 = alloca i1, i1 0
-  %nop4905 = alloca i1, i1 0
-  %nop4906 = alloca i1, i1 0
-  %nop4907 = alloca i1, i1 0
-  %nop4908 = alloca i1, i1 0
-  %nop4909 = alloca i1, i1 0
-  %nop4910 = alloca i1, i1 0
-  %nop4911 = alloca i1, i1 0
-  %nop4912 = alloca i1, i1 0
-  %nop4913 = alloca i1, i1 0
-  %nop4914 = alloca i1, i1 0
-  %nop4915 = alloca i1, i1 0
-  %nop4916 = alloca i1, i1 0
-  %nop4917 = alloca i1, i1 0
-  %nop4918 = alloca i1, i1 0
-  %nop4919 = alloca i1, i1 0
-  %nop4920 = alloca i1, i1 0
-  %nop4921 = alloca i1, i1 0
-  %nop4922 = alloca i1, i1 0
-  %nop4923 = alloca i1, i1 0
-  %nop4924 = alloca i1, i1 0
-  %nop4925 = alloca i1, i1 0
-  %nop4926 = alloca i1, i1 0
-  %nop4927 = alloca i1, i1 0
-  %nop4928 = alloca i1, i1 0
-  %nop4929 = alloca i1, i1 0
-  %nop4930 = alloca i1, i1 0
-  %nop4931 = alloca i1, i1 0
-  %nop4932 = alloca i1, i1 0
-  %nop4933 = alloca i1, i1 0
-  %nop4934 = alloca i1, i1 0
-  %nop4935 = alloca i1, i1 0
-  %nop4936 = alloca i1, i1 0
-  %nop4937 = alloca i1, i1 0
-  %nop4938 = alloca i1, i1 0
-  %nop4939 = alloca i1, i1 0
-  %nop4940 = alloca i1, i1 0
-  %nop4941 = alloca i1, i1 0
-  %nop4942 = alloca i1, i1 0
-  %nop4943 = alloca i1, i1 0
-  %nop4944 = alloca i1, i1 0
-  %nop4945 = alloca i1, i1 0
-  %nop4946 = alloca i1, i1 0
-  %nop4947 = alloca i1, i1 0
-  %nop4948 = alloca i1, i1 0
-  %nop4949 = alloca i1, i1 0
-  %nop4950 = alloca i1, i1 0
-  %nop4951 = alloca i1, i1 0
-  %nop4952 = alloca i1, i1 0
-  %nop4953 = alloca i1, i1 0
-  %nop4954 = alloca i1, i1 0
-  %nop4955 = alloca i1, i1 0
-  %nop4956 = alloca i1, i1 0
-  %nop4957 = alloca i1, i1 0
-  %nop4958 = alloca i1, i1 0
-  %nop4959 = alloca i1, i1 0
-  %nop4960 = alloca i1, i1 0
-  %nop4961 = alloca i1, i1 0
-  %nop4962 = alloca i1, i1 0
-  %nop4963 = alloca i1, i1 0
-  %nop4964 = alloca i1, i1 0
-  %nop4965 = alloca i1, i1 0
-  %nop4966 = alloca i1, i1 0
-  %nop4967 = alloca i1, i1 0
-  %nop4968 = alloca i1, i1 0
-  %nop4969 = alloca i1, i1 0
-  %nop4970 = alloca i1, i1 0
-  %nop4971 = alloca i1, i1 0
-  %nop4972 = alloca i1, i1 0
-  %nop4973 = alloca i1, i1 0
-  %nop4974 = alloca i1, i1 0
-  %nop4975 = alloca i1, i1 0
-  %nop4976 = alloca i1, i1 0
-  %nop4977 = alloca i1, i1 0
-  %nop4978 = alloca i1, i1 0
-  %nop4979 = alloca i1, i1 0
-  %nop4980 = alloca i1, i1 0
-  %nop4981 = alloca i1, i1 0
-  %nop4982 = alloca i1, i1 0
-  %nop4983 = alloca i1, i1 0
-  %nop4984 = alloca i1, i1 0
-  %nop4985 = alloca i1, i1 0
-  %nop4986 = alloca i1, i1 0
-  %nop4987 = alloca i1, i1 0
-  %nop4988 = alloca i1, i1 0
-  %nop4989 = alloca i1, i1 0
-  %nop4990 = alloca i1, i1 0
-  %nop4991 = alloca i1, i1 0
-  %nop4992 = alloca i1, i1 0
-  %nop4993 = alloca i1, i1 0
-  %nop4994 = alloca i1, i1 0
-  %nop4995 = alloca i1, i1 0
-  %nop4996 = alloca i1, i1 0
-  %nop4997 = alloca i1, i1 0
-  %nop4998 = alloca i1, i1 0
-  %nop4999 = alloca i1, i1 0
-  %nop5000 = alloca i1, i1 0
-  %nop5001 = alloca i1, i1 0
-  %nop5002 = alloca i1, i1 0
-  %nop5003 = alloca i1, i1 0
-  %nop5004 = alloca i1, i1 0
-  %nop5005 = alloca i1, i1 0
-  %nop5006 = alloca i1, i1 0
-  %nop5007 = alloca i1, i1 0
-  %nop5008 = alloca i1, i1 0
-  %nop5009 = alloca i1, i1 0
-  %nop5010 = alloca i1, i1 0
-  %nop5011 = alloca i1, i1 0
-  %nop5012 = alloca i1, i1 0
-  %nop5013 = alloca i1, i1 0
-  %nop5014 = alloca i1, i1 0
-  %nop5015 = alloca i1, i1 0
-  %nop5016 = alloca i1, i1 0
-  %nop5017 = alloca i1, i1 0
-  %nop5018 = alloca i1, i1 0
-  %nop5019 = alloca i1, i1 0
-  %nop5020 = alloca i1, i1 0
-  %nop5021 = alloca i1, i1 0
-  %nop5022 = alloca i1, i1 0
-  %nop5023 = alloca i1, i1 0
-  %nop5024 = alloca i1, i1 0
-  %nop5025 = alloca i1, i1 0
-  %nop5026 = alloca i1, i1 0
-  %nop5027 = alloca i1, i1 0
-  %nop5028 = alloca i1, i1 0
-  %nop5029 = alloca i1, i1 0
-  %nop5030 = alloca i1, i1 0
-  %nop5031 = alloca i1, i1 0
-  %nop5032 = alloca i1, i1 0
-  %nop5033 = alloca i1, i1 0
-  %nop5034 = alloca i1, i1 0
-  %nop5035 = alloca i1, i1 0
-  %nop5036 = alloca i1, i1 0
-  %nop5037 = alloca i1, i1 0
-  %nop5038 = alloca i1, i1 0
-  %nop5039 = alloca i1, i1 0
-  %nop5040 = alloca i1, i1 0
-  %nop5041 = alloca i1, i1 0
-  %nop5042 = alloca i1, i1 0
-  %nop5043 = alloca i1, i1 0
-  %nop5044 = alloca i1, i1 0
-  %nop5045 = alloca i1, i1 0
-  %nop5046 = alloca i1, i1 0
-  %nop5047 = alloca i1, i1 0
-  %nop5048 = alloca i1, i1 0
-  %nop5049 = alloca i1, i1 0
-  %nop5050 = alloca i1, i1 0
-  %nop5051 = alloca i1, i1 0
-  %nop5052 = alloca i1, i1 0
-  %nop5053 = alloca i1, i1 0
-  %nop5054 = alloca i1, i1 0
-  %nop5055 = alloca i1, i1 0
-  %nop5056 = alloca i1, i1 0
-  %nop5057 = alloca i1, i1 0
-  %nop5058 = alloca i1, i1 0
-  %nop5059 = alloca i1, i1 0
-  %nop5060 = alloca i1, i1 0
-  %nop5061 = alloca i1, i1 0
-  %nop5062 = alloca i1, i1 0
-  %nop5063 = alloca i1, i1 0
-  %nop5064 = alloca i1, i1 0
-  %nop5065 = alloca i1, i1 0
-  %nop5066 = alloca i1, i1 0
-  %nop5067 = alloca i1, i1 0
-  %nop5068 = alloca i1, i1 0
-  %nop5069 = alloca i1, i1 0
-  %nop5070 = alloca i1, i1 0
-  %nop5071 = alloca i1, i1 0
-  %nop5072 = alloca i1, i1 0
-  %nop5073 = alloca i1, i1 0
-  %nop5074 = alloca i1, i1 0
-  %nop5075 = alloca i1, i1 0
-  %nop5076 = alloca i1, i1 0
-  %nop5077 = alloca i1, i1 0
-  %nop5078 = alloca i1, i1 0
-  %nop5079 = alloca i1, i1 0
-  %nop5080 = alloca i1, i1 0
-  %nop5081 = alloca i1, i1 0
-  %nop5082 = alloca i1, i1 0
-  %nop5083 = alloca i1, i1 0
-  %nop5084 = alloca i1, i1 0
-  %nop5085 = alloca i1, i1 0
-  %nop5086 = alloca i1, i1 0
-  %nop5087 = alloca i1, i1 0
-  %nop5088 = alloca i1, i1 0
-  %nop5089 = alloca i1, i1 0
-  %nop5090 = alloca i1, i1 0
-  %nop5091 = alloca i1, i1 0
-  %nop5092 = alloca i1, i1 0
-  %nop5093 = alloca i1, i1 0
-  %nop5094 = alloca i1, i1 0
-  %nop5095 = alloca i1, i1 0
-  %nop5096 = alloca i1, i1 0
-  %nop5097 = alloca i1, i1 0
-  %nop5098 = alloca i1, i1 0
-  %nop5099 = alloca i1, i1 0
-  %nop5100 = alloca i1, i1 0
-  %nop5101 = alloca i1, i1 0
-  %nop5102 = alloca i1, i1 0
-  %nop5103 = alloca i1, i1 0
-  %nop5104 = alloca i1, i1 0
-  %nop5105 = alloca i1, i1 0
-  %nop5106 = alloca i1, i1 0
-  %nop5107 = alloca i1, i1 0
-  %nop5108 = alloca i1, i1 0
-  %nop5109 = alloca i1, i1 0
-  %nop5110 = alloca i1, i1 0
-  %nop5111 = alloca i1, i1 0
-  %nop5112 = alloca i1, i1 0
-  %nop5113 = alloca i1, i1 0
-  %nop5114 = alloca i1, i1 0
-  %nop5115 = alloca i1, i1 0
-  %nop5116 = alloca i1, i1 0
-  %nop5117 = alloca i1, i1 0
-  %nop5118 = alloca i1, i1 0
-  %nop5119 = alloca i1, i1 0
-  %nop5120 = alloca i1, i1 0
-  %nop5121 = alloca i1, i1 0
-  %nop5122 = alloca i1, i1 0
-  %nop5123 = alloca i1, i1 0
-  %nop5124 = alloca i1, i1 0
-  %nop5125 = alloca i1, i1 0
-  %nop5126 = alloca i1, i1 0
-  %nop5127 = alloca i1, i1 0
-  %nop5128 = alloca i1, i1 0
-  %nop5129 = alloca i1, i1 0
-  %nop5130 = alloca i1, i1 0
-  %nop5131 = alloca i1, i1 0
-  %nop5132 = alloca i1, i1 0
-  %nop5133 = alloca i1, i1 0
-  %nop5134 = alloca i1, i1 0
-  %nop5135 = alloca i1, i1 0
-  %nop5136 = alloca i1, i1 0
-  %nop5137 = alloca i1, i1 0
-  %nop5138 = alloca i1, i1 0
-  %nop5139 = alloca i1, i1 0
-  %nop5140 = alloca i1, i1 0
-  %nop5141 = alloca i1, i1 0
-  %nop5142 = alloca i1, i1 0
-  %nop5143 = alloca i1, i1 0
-  %nop5144 = alloca i1, i1 0
-  %nop5145 = alloca i1, i1 0
-  %nop5146 = alloca i1, i1 0
-  %nop5147 = alloca i1, i1 0
-  %nop5148 = alloca i1, i1 0
-  %nop5149 = alloca i1, i1 0
-  %nop5150 = alloca i1, i1 0
-  %nop5151 = alloca i1, i1 0
-  %nop5152 = alloca i1, i1 0
-  %nop5153 = alloca i1, i1 0
-  %nop5154 = alloca i1, i1 0
-  %nop5155 = alloca i1, i1 0
-  %nop5156 = alloca i1, i1 0
-  %nop5157 = alloca i1, i1 0
-  %nop5158 = alloca i1, i1 0
-  %nop5159 = alloca i1, i1 0
-  %nop5160 = alloca i1, i1 0
-  %nop5161 = alloca i1, i1 0
-  %nop5162 = alloca i1, i1 0
-  %nop5163 = alloca i1, i1 0
-  %nop5164 = alloca i1, i1 0
-  %nop5165 = alloca i1, i1 0
-  %nop5166 = alloca i1, i1 0
-  %nop5167 = alloca i1, i1 0
-  %nop5168 = alloca i1, i1 0
-  %nop5169 = alloca i1, i1 0
-  %nop5170 = alloca i1, i1 0
-  %nop5171 = alloca i1, i1 0
-  %nop5172 = alloca i1, i1 0
-  %nop5173 = alloca i1, i1 0
-  %nop5174 = alloca i1, i1 0
-  %nop5175 = alloca i1, i1 0
-  %nop5176 = alloca i1, i1 0
-  %nop5177 = alloca i1, i1 0
-  %nop5178 = alloca i1, i1 0
-  %nop5179 = alloca i1, i1 0
-  %nop5180 = alloca i1, i1 0
-  %nop5181 = alloca i1, i1 0
-  %nop5182 = alloca i1, i1 0
-  %nop5183 = alloca i1, i1 0
-  %nop5184 = alloca i1, i1 0
-  %nop5185 = alloca i1, i1 0
-  %nop5186 = alloca i1, i1 0
-  %nop5187 = alloca i1, i1 0
-  %nop5188 = alloca i1, i1 0
-  %nop5189 = alloca i1, i1 0
-  %nop5190 = alloca i1, i1 0
-  %nop5191 = alloca i1, i1 0
-  %nop5192 = alloca i1, i1 0
-  %nop5193 = alloca i1, i1 0
-  %nop5194 = alloca i1, i1 0
-  %nop5195 = alloca i1, i1 0
-  %nop5196 = alloca i1, i1 0
-  %nop5197 = alloca i1, i1 0
-  %nop5198 = alloca i1, i1 0
-  %nop5199 = alloca i1, i1 0
-  %nop5200 = alloca i1, i1 0
-  %nop5201 = alloca i1, i1 0
-  %nop5202 = alloca i1, i1 0
-  %nop5203 = alloca i1, i1 0
-  %nop5204 = alloca i1, i1 0
-  %nop5205 = alloca i1, i1 0
-  %nop5206 = alloca i1, i1 0
-  %nop5207 = alloca i1, i1 0
-  %nop5208 = alloca i1, i1 0
-  %nop5209 = alloca i1, i1 0
-  %nop5210 = alloca i1, i1 0
-  %nop5211 = alloca i1, i1 0
-  %nop5212 = alloca i1, i1 0
-  %nop5213 = alloca i1, i1 0
-  %nop5214 = alloca i1, i1 0
-  %nop5215 = alloca i1, i1 0
-  %nop5216 = alloca i1, i1 0
-  %nop5217 = alloca i1, i1 0
-  %nop5218 = alloca i1, i1 0
-  %nop5219 = alloca i1, i1 0
-  %nop5220 = alloca i1, i1 0
-  %nop5221 = alloca i1, i1 0
-  %nop5222 = alloca i1, i1 0
-  %nop5223 = alloca i1, i1 0
-  %nop5224 = alloca i1, i1 0
-  %nop5225 = alloca i1, i1 0
-  %nop5226 = alloca i1, i1 0
-  %nop5227 = alloca i1, i1 0
-  %nop5228 = alloca i1, i1 0
-  %nop5229 = alloca i1, i1 0
-  %nop5230 = alloca i1, i1 0
-  %nop5231 = alloca i1, i1 0
-  %nop5232 = alloca i1, i1 0
-  %nop5233 = alloca i1, i1 0
-  %nop5234 = alloca i1, i1 0
-  %nop5235 = alloca i1, i1 0
-  %nop5236 = alloca i1, i1 0
-  %nop5237 = alloca i1, i1 0
-  %nop5238 = alloca i1, i1 0
-  %nop5239 = alloca i1, i1 0
-  %nop5240 = alloca i1, i1 0
-  %nop5241 = alloca i1, i1 0
-  %nop5242 = alloca i1, i1 0
-  %nop5243 = alloca i1, i1 0
-  %nop5244 = alloca i1, i1 0
-  %nop5245 = alloca i1, i1 0
-  %nop5246 = alloca i1, i1 0
-  %nop5247 = alloca i1, i1 0
-  %nop5248 = alloca i1, i1 0
-  %nop5249 = alloca i1, i1 0
-  %nop5250 = alloca i1, i1 0
-  %nop5251 = alloca i1, i1 0
-  %nop5252 = alloca i1, i1 0
-  %nop5253 = alloca i1, i1 0
-  %nop5254 = alloca i1, i1 0
-  %nop5255 = alloca i1, i1 0
-  %nop5256 = alloca i1, i1 0
-  %nop5257 = alloca i1, i1 0
-  %nop5258 = alloca i1, i1 0
-  %nop5259 = alloca i1, i1 0
-  %nop5260 = alloca i1, i1 0
-  %nop5261 = alloca i1, i1 0
-  %nop5262 = alloca i1, i1 0
-  %nop5263 = alloca i1, i1 0
-  %nop5264 = alloca i1, i1 0
-  %nop5265 = alloca i1, i1 0
-  %nop5266 = alloca i1, i1 0
-  %nop5267 = alloca i1, i1 0
-  %nop5268 = alloca i1, i1 0
-  %nop5269 = alloca i1, i1 0
-  %nop5270 = alloca i1, i1 0
-  %nop5271 = alloca i1, i1 0
-  %nop5272 = alloca i1, i1 0
-  %nop5273 = alloca i1, i1 0
-  %nop5274 = alloca i1, i1 0
-  %nop5275 = alloca i1, i1 0
-  %nop5276 = alloca i1, i1 0
-  %nop5277 = alloca i1, i1 0
-  %nop5278 = alloca i1, i1 0
-  %nop5279 = alloca i1, i1 0
-  %nop5280 = alloca i1, i1 0
-  %nop5281 = alloca i1, i1 0
-  %nop5282 = alloca i1, i1 0
-  %nop5283 = alloca i1, i1 0
-  %nop5284 = alloca i1, i1 0
-  %nop5285 = alloca i1, i1 0
-  %nop5286 = alloca i1, i1 0
-  %nop5287 = alloca i1, i1 0
-  %nop5288 = alloca i1, i1 0
-  %nop5289 = alloca i1, i1 0
-  %nop5290 = alloca i1, i1 0
-  %nop5291 = alloca i1, i1 0
-  %nop5292 = alloca i1, i1 0
-  %nop5293 = alloca i1, i1 0
-  %nop5294 = alloca i1, i1 0
-  %nop5295 = alloca i1, i1 0
-  %nop5296 = alloca i1, i1 0
-  %nop5297 = alloca i1, i1 0
-  %nop5298 = alloca i1, i1 0
-  %nop5299 = alloca i1, i1 0
-  %nop5300 = alloca i1, i1 0
-  %nop5301 = alloca i1, i1 0
-  %nop5302 = alloca i1, i1 0
-  %nop5303 = alloca i1, i1 0
-  %nop5304 = alloca i1, i1 0
-  %nop5305 = alloca i1, i1 0
-  %nop5306 = alloca i1, i1 0
-  %nop5307 = alloca i1, i1 0
-  %nop5308 = alloca i1, i1 0
-  %nop5309 = alloca i1, i1 0
-  %nop5310 = alloca i1, i1 0
-  %nop5311 = alloca i1, i1 0
-  %nop5312 = alloca i1, i1 0
-  %nop5313 = alloca i1, i1 0
-  %nop5314 = alloca i1, i1 0
-  %nop5315 = alloca i1, i1 0
-  %nop5316 = alloca i1, i1 0
-  %nop5317 = alloca i1, i1 0
-  %nop5318 = alloca i1, i1 0
-  %nop5319 = alloca i1, i1 0
-  %nop5320 = alloca i1, i1 0
-  %nop5321 = alloca i1, i1 0
-  %nop5322 = alloca i1, i1 0
-  %nop5323 = alloca i1, i1 0
-  %nop5324 = alloca i1, i1 0
-  %nop5325 = alloca i1, i1 0
-  %nop5326 = alloca i1, i1 0
-  %nop5327 = alloca i1, i1 0
-  %nop5328 = alloca i1, i1 0
-  %nop5329 = alloca i1, i1 0
-  %nop5330 = alloca i1, i1 0
-  %nop5331 = alloca i1, i1 0
-  %nop5332 = alloca i1, i1 0
-  %nop5333 = alloca i1, i1 0
-  %nop5334 = alloca i1, i1 0
-  %nop5335 = alloca i1, i1 0
-  %nop5336 = alloca i1, i1 0
-  %nop5337 = alloca i1, i1 0
-  %nop5338 = alloca i1, i1 0
-  %nop5339 = alloca i1, i1 0
-  %nop5340 = alloca i1, i1 0
-  %nop5341 = alloca i1, i1 0
-  %nop5342 = alloca i1, i1 0
-  %nop5343 = alloca i1, i1 0
-  %nop5344 = alloca i1, i1 0
-  %nop5345 = alloca i1, i1 0
-  %nop5346 = alloca i1, i1 0
-  %nop5347 = alloca i1, i1 0
-  %nop5348 = alloca i1, i1 0
-  %nop5349 = alloca i1, i1 0
-  %nop5350 = alloca i1, i1 0
-  %nop5351 = alloca i1, i1 0
-  %nop5352 = alloca i1, i1 0
-  %nop5353 = alloca i1, i1 0
-  %nop5354 = alloca i1, i1 0
-  %nop5355 = alloca i1, i1 0
-  %nop5356 = alloca i1, i1 0
-  %nop5357 = alloca i1, i1 0
-  %nop5358 = alloca i1, i1 0
-  %nop5359 = alloca i1, i1 0
-  %nop5360 = alloca i1, i1 0
-  %nop5361 = alloca i1, i1 0
-  %nop5362 = alloca i1, i1 0
-  %nop5363 = alloca i1, i1 0
-  %nop5364 = alloca i1, i1 0
-  %nop5365 = alloca i1, i1 0
-  %nop5366 = alloca i1, i1 0
-  %nop5367 = alloca i1, i1 0
-  %nop5368 = alloca i1, i1 0
-  %nop5369 = alloca i1, i1 0
-  %nop5370 = alloca i1, i1 0
-  %nop5371 = alloca i1, i1 0
-  %nop5372 = alloca i1, i1 0
-  %nop5373 = alloca i1, i1 0
-  %nop5374 = alloca i1, i1 0
-  %nop5375 = alloca i1, i1 0
-  %nop5376 = alloca i1, i1 0
-  %nop5377 = alloca i1, i1 0
-  %nop5378 = alloca i1, i1 0
-  %nop5379 = alloca i1, i1 0
-  %nop5380 = alloca i1, i1 0
-  %nop5381 = alloca i1, i1 0
-  %nop5382 = alloca i1, i1 0
-  %nop5383 = alloca i1, i1 0
-  %nop5384 = alloca i1, i1 0
-  %nop5385 = alloca i1, i1 0
-  %nop5386 = alloca i1, i1 0
-  %nop5387 = alloca i1, i1 0
-  %nop5388 = alloca i1, i1 0
-  %nop5389 = alloca i1, i1 0
-  %nop5390 = alloca i1, i1 0
-  %nop5391 = alloca i1, i1 0
-  %nop5392 = alloca i1, i1 0
-  %nop5393 = alloca i1, i1 0
-  %nop5394 = alloca i1, i1 0
-  %nop5395 = alloca i1, i1 0
-  %nop5396 = alloca i1, i1 0
-  %nop5397 = alloca i1, i1 0
-  %nop5398 = alloca i1, i1 0
-  %nop5399 = alloca i1, i1 0
-  %nop5400 = alloca i1, i1 0
-  %nop5401 = alloca i1, i1 0
-  %nop5402 = alloca i1, i1 0
-  %nop5403 = alloca i1, i1 0
-  %nop5404 = alloca i1, i1 0
-  %nop5405 = alloca i1, i1 0
-  %nop5406 = alloca i1, i1 0
-  %nop5407 = alloca i1, i1 0
-  %nop5408 = alloca i1, i1 0
-  %nop5409 = alloca i1, i1 0
-  %nop5410 = alloca i1, i1 0
-  %nop5411 = alloca i1, i1 0
-  %nop5412 = alloca i1, i1 0
-  %nop5413 = alloca i1, i1 0
-  %nop5414 = alloca i1, i1 0
-  %nop5415 = alloca i1, i1 0
-  %nop5416 = alloca i1, i1 0
-  %nop5417 = alloca i1, i1 0
-  %nop5418 = alloca i1, i1 0
-  %nop5419 = alloca i1, i1 0
-  %nop5420 = alloca i1, i1 0
-  %nop5421 = alloca i1, i1 0
-  %nop5422 = alloca i1, i1 0
-  %nop5423 = alloca i1, i1 0
-  %nop5424 = alloca i1, i1 0
-  %nop5425 = alloca i1, i1 0
-  %nop5426 = alloca i1, i1 0
-  %nop5427 = alloca i1, i1 0
-  %nop5428 = alloca i1, i1 0
-  %nop5429 = alloca i1, i1 0
-  %nop5430 = alloca i1, i1 0
-  %nop5431 = alloca i1, i1 0
-  %nop5432 = alloca i1, i1 0
-  %nop5433 = alloca i1, i1 0
-  %nop5434 = alloca i1, i1 0
-  %nop5435 = alloca i1, i1 0
-  %nop5436 = alloca i1, i1 0
-  %nop5437 = alloca i1, i1 0
-  %nop5438 = alloca i1, i1 0
-  %nop5439 = alloca i1, i1 0
-  %nop5440 = alloca i1, i1 0
-  %nop5441 = alloca i1, i1 0
-  %nop5442 = alloca i1, i1 0
-  %nop5443 = alloca i1, i1 0
-  %nop5444 = alloca i1, i1 0
-  %nop5445 = alloca i1, i1 0
-  %nop5446 = alloca i1, i1 0
-  %nop5447 = alloca i1, i1 0
-  %nop5448 = alloca i1, i1 0
-  %nop5449 = alloca i1, i1 0
-  %nop5450 = alloca i1, i1 0
-  %nop5451 = alloca i1, i1 0
-  %nop5452 = alloca i1, i1 0
-  %nop5453 = alloca i1, i1 0
-  %nop5454 = alloca i1, i1 0
-  %nop5455 = alloca i1, i1 0
-  %nop5456 = alloca i1, i1 0
-  %nop5457 = alloca i1, i1 0
-  %nop5458 = alloca i1, i1 0
-  %nop5459 = alloca i1, i1 0
-  %nop5460 = alloca i1, i1 0
-  %nop5461 = alloca i1, i1 0
-  %nop5462 = alloca i1, i1 0
-  %nop5463 = alloca i1, i1 0
-  %nop5464 = alloca i1, i1 0
-  %nop5465 = alloca i1, i1 0
-  %nop5466 = alloca i1, i1 0
-  %nop5467 = alloca i1, i1 0
-  %nop5468 = alloca i1, i1 0
-  %nop5469 = alloca i1, i1 0
-  %nop5470 = alloca i1, i1 0
-  %nop5471 = alloca i1, i1 0
-  %nop5472 = alloca i1, i1 0
-  %nop5473 = alloca i1, i1 0
-  %nop5474 = alloca i1, i1 0
-  %nop5475 = alloca i1, i1 0
-  %nop5476 = alloca i1, i1 0
-  %nop5477 = alloca i1, i1 0
-  %nop5478 = alloca i1, i1 0
-  %nop5479 = alloca i1, i1 0
-  %nop5480 = alloca i1, i1 0
-  %nop5481 = alloca i1, i1 0
-  %nop5482 = alloca i1, i1 0
-  %nop5483 = alloca i1, i1 0
-  %nop5484 = alloca i1, i1 0
-  %nop5485 = alloca i1, i1 0
-  %nop5486 = alloca i1, i1 0
-  %nop5487 = alloca i1, i1 0
-  %nop5488 = alloca i1, i1 0
-  %nop5489 = alloca i1, i1 0
-  %nop5490 = alloca i1, i1 0
-  %nop5491 = alloca i1, i1 0
-  %nop5492 = alloca i1, i1 0
-  %nop5493 = alloca i1, i1 0
-  %nop5494 = alloca i1, i1 0
-  %nop5495 = alloca i1, i1 0
-  %nop5496 = alloca i1, i1 0
-  %nop5497 = alloca i1, i1 0
-  %nop5498 = alloca i1, i1 0
-  %nop5499 = alloca i1, i1 0
-  %nop5500 = alloca i1, i1 0
-  %nop5501 = alloca i1, i1 0
-  %nop5502 = alloca i1, i1 0
-  %nop5503 = alloca i1, i1 0
-  %nop5504 = alloca i1, i1 0
-  %nop5505 = alloca i1, i1 0
-  %nop5506 = alloca i1, i1 0
-  %nop5507 = alloca i1, i1 0
-  %nop5508 = alloca i1, i1 0
-  %nop5509 = alloca i1, i1 0
-  %nop5510 = alloca i1, i1 0
-  %nop5511 = alloca i1, i1 0
-  %nop5512 = alloca i1, i1 0
-  %nop5513 = alloca i1, i1 0
-  %nop5514 = alloca i1, i1 0
-  %nop5515 = alloca i1, i1 0
-  %nop5516 = alloca i1, i1 0
-  %nop5517 = alloca i1, i1 0
-  %nop5518 = alloca i1, i1 0
-  %nop5519 = alloca i1, i1 0
-  %nop5520 = alloca i1, i1 0
-  %nop5521 = alloca i1, i1 0
-  %nop5522 = alloca i1, i1 0
-  %nop5523 = alloca i1, i1 0
-  %nop5524 = alloca i1, i1 0
-  %nop5525 = alloca i1, i1 0
-  %nop5526 = alloca i1, i1 0
-  %nop5527 = alloca i1, i1 0
-  %nop5528 = alloca i1, i1 0
-  %nop5529 = alloca i1, i1 0
-  %nop5530 = alloca i1, i1 0
-  %nop5531 = alloca i1, i1 0
-  %nop5532 = alloca i1, i1 0
-  %nop5533 = alloca i1, i1 0
-  %nop5534 = alloca i1, i1 0
-  %nop5535 = alloca i1, i1 0
-  %nop5536 = alloca i1, i1 0
-  %nop5537 = alloca i1, i1 0
-  %nop5538 = alloca i1, i1 0
-  %nop5539 = alloca i1, i1 0
-  %nop5540 = alloca i1, i1 0
-  %nop5541 = alloca i1, i1 0
-  %nop5542 = alloca i1, i1 0
-  %nop5543 = alloca i1, i1 0
-  %nop5544 = alloca i1, i1 0
-  %nop5545 = alloca i1, i1 0
-  %nop5546 = alloca i1, i1 0
-  %nop5547 = alloca i1, i1 0
-  %nop5548 = alloca i1, i1 0
-  %nop5549 = alloca i1, i1 0
-  %nop5550 = alloca i1, i1 0
-  %nop5551 = alloca i1, i1 0
-  %nop5552 = alloca i1, i1 0
-  %nop5553 = alloca i1, i1 0
-  %nop5554 = alloca i1, i1 0
-  %nop5555 = alloca i1, i1 0
-  %nop5556 = alloca i1, i1 0
-  %nop5557 = alloca i1, i1 0
-  %nop5558 = alloca i1, i1 0
-  %nop5559 = alloca i1, i1 0
-  %nop5560 = alloca i1, i1 0
-  %nop5561 = alloca i1, i1 0
-  %nop5562 = alloca i1, i1 0
-  %nop5563 = alloca i1, i1 0
-  %nop5564 = alloca i1, i1 0
-  %nop5565 = alloca i1, i1 0
-  %nop5566 = alloca i1, i1 0
-  %nop5567 = alloca i1, i1 0
-  %nop5568 = alloca i1, i1 0
-  %nop5569 = alloca i1, i1 0
-  %nop5570 = alloca i1, i1 0
-  %nop5571 = alloca i1, i1 0
-  %nop5572 = alloca i1, i1 0
-  %nop5573 = alloca i1, i1 0
-  %nop5574 = alloca i1, i1 0
-  %nop5575 = alloca i1, i1 0
-  %nop5576 = alloca i1, i1 0
-  %nop5577 = alloca i1, i1 0
-  %nop5578 = alloca i1, i1 0
-  %nop5579 = alloca i1, i1 0
-  %nop5580 = alloca i1, i1 0
-  %nop5581 = alloca i1, i1 0
-  %nop5582 = alloca i1, i1 0
-  %nop5583 = alloca i1, i1 0
-  %nop5584 = alloca i1, i1 0
-  %nop5585 = alloca i1, i1 0
-  %nop5586 = alloca i1, i1 0
-  %nop5587 = alloca i1, i1 0
-  %nop5588 = alloca i1, i1 0
-  %nop5589 = alloca i1, i1 0
-  %nop5590 = alloca i1, i1 0
-  %nop5591 = alloca i1, i1 0
-  %nop5592 = alloca i1, i1 0
-  %nop5593 = alloca i1, i1 0
-  %nop5594 = alloca i1, i1 0
-  %nop5595 = alloca i1, i1 0
-  %nop5596 = alloca i1, i1 0
-  %nop5597 = alloca i1, i1 0
-  %nop5598 = alloca i1, i1 0
-  %nop5599 = alloca i1, i1 0
-  %nop5600 = alloca i1, i1 0
-  %nop5601 = alloca i1, i1 0
-  %nop5602 = alloca i1, i1 0
-  %nop5603 = alloca i1, i1 0
-  %nop5604 = alloca i1, i1 0
-  %nop5605 = alloca i1, i1 0
-  %nop5606 = alloca i1, i1 0
-  %nop5607 = alloca i1, i1 0
-  %nop5608 = alloca i1, i1 0
-  %nop5609 = alloca i1, i1 0
-  %nop5610 = alloca i1, i1 0
-  %nop5611 = alloca i1, i1 0
-  %nop5612 = alloca i1, i1 0
-  %nop5613 = alloca i1, i1 0
-  %nop5614 = alloca i1, i1 0
-  %nop5615 = alloca i1, i1 0
-  %nop5616 = alloca i1, i1 0
-  %nop5617 = alloca i1, i1 0
-  %nop5618 = alloca i1, i1 0
-  %nop5619 = alloca i1, i1 0
-  %nop5620 = alloca i1, i1 0
-  %nop5621 = alloca i1, i1 0
-  %nop5622 = alloca i1, i1 0
-  %nop5623 = alloca i1, i1 0
-  %nop5624 = alloca i1, i1 0
-  %nop5625 = alloca i1, i1 0
-  %nop5626 = alloca i1, i1 0
-  %nop5627 = alloca i1, i1 0
-  %nop5628 = alloca i1, i1 0
-  %nop5629 = alloca i1, i1 0
-  %nop5630 = alloca i1, i1 0
-  %nop5631 = alloca i1, i1 0
-  %nop5632 = alloca i1, i1 0
-  %nop5633 = alloca i1, i1 0
-  %nop5634 = alloca i1, i1 0
-  %nop5635 = alloca i1, i1 0
-  %nop5636 = alloca i1, i1 0
-  %nop5637 = alloca i1, i1 0
-  %nop5638 = alloca i1, i1 0
-  %nop5639 = alloca i1, i1 0
-  %nop5640 = alloca i1, i1 0
-  %nop5641 = alloca i1, i1 0
-  %nop5642 = alloca i1, i1 0
-  %nop5643 = alloca i1, i1 0
-  %nop5644 = alloca i1, i1 0
-  %nop5645 = alloca i1, i1 0
-  %nop5646 = alloca i1, i1 0
-  %nop5647 = alloca i1, i1 0
-  %nop5648 = alloca i1, i1 0
-  %nop5649 = alloca i1, i1 0
-  %nop5650 = alloca i1, i1 0
-  %nop5651 = alloca i1, i1 0
-  %nop5652 = alloca i1, i1 0
-  %nop5653 = alloca i1, i1 0
-  %nop5654 = alloca i1, i1 0
-  %nop5655 = alloca i1, i1 0
-  %nop5656 = alloca i1, i1 0
-  %nop5657 = alloca i1, i1 0
-  %nop5658 = alloca i1, i1 0
-  %nop5659 = alloca i1, i1 0
-  %nop5660 = alloca i1, i1 0
-  %nop5661 = alloca i1, i1 0
-  %nop5662 = alloca i1, i1 0
-  %nop5663 = alloca i1, i1 0
-  %nop5664 = alloca i1, i1 0
-  %nop5665 = alloca i1, i1 0
-  %nop5666 = alloca i1, i1 0
-  %nop5667 = alloca i1, i1 0
-  %nop5668 = alloca i1, i1 0
-  %nop5669 = alloca i1, i1 0
-  %nop5670 = alloca i1, i1 0
-  %nop5671 = alloca i1, i1 0
-  %nop5672 = alloca i1, i1 0
-  %nop5673 = alloca i1, i1 0
-  %nop5674 = alloca i1, i1 0
-  %nop5675 = alloca i1, i1 0
-  %nop5676 = alloca i1, i1 0
-  %nop5677 = alloca i1, i1 0
-  %nop5678 = alloca i1, i1 0
-  %nop5679 = alloca i1, i1 0
-  %nop5680 = alloca i1, i1 0
-  %nop5681 = alloca i1, i1 0
-  %nop5682 = alloca i1, i1 0
-  %nop5683 = alloca i1, i1 0
-  %nop5684 = alloca i1, i1 0
-  %nop5685 = alloca i1, i1 0
-  %nop5686 = alloca i1, i1 0
-  %nop5687 = alloca i1, i1 0
-  %nop5688 = alloca i1, i1 0
-  %nop5689 = alloca i1, i1 0
-  %nop5690 = alloca i1, i1 0
-  %nop5691 = alloca i1, i1 0
-  %nop5692 = alloca i1, i1 0
-  %nop5693 = alloca i1, i1 0
-  %nop5694 = alloca i1, i1 0
-  %nop5695 = alloca i1, i1 0
-  %nop5696 = alloca i1, i1 0
-  %nop5697 = alloca i1, i1 0
-  %nop5698 = alloca i1, i1 0
-  %nop5699 = alloca i1, i1 0
-  %nop5700 = alloca i1, i1 0
-  %nop5701 = alloca i1, i1 0
-  %nop5702 = alloca i1, i1 0
-  %nop5703 = alloca i1, i1 0
-  %nop5704 = alloca i1, i1 0
-  %nop5705 = alloca i1, i1 0
-  %nop5706 = alloca i1, i1 0
-  %nop5707 = alloca i1, i1 0
-  %nop5708 = alloca i1, i1 0
-  %nop5709 = alloca i1, i1 0
-  %nop5710 = alloca i1, i1 0
-  %nop5711 = alloca i1, i1 0
-  %nop5712 = alloca i1, i1 0
-  %nop5713 = alloca i1, i1 0
-  %nop5714 = alloca i1, i1 0
-  %nop5715 = alloca i1, i1 0
-  %nop5716 = alloca i1, i1 0
-  %nop5717 = alloca i1, i1 0
-  %nop5718 = alloca i1, i1 0
-  %nop5719 = alloca i1, i1 0
-  %nop5720 = alloca i1, i1 0
-  %nop5721 = alloca i1, i1 0
-  %nop5722 = alloca i1, i1 0
-  %nop5723 = alloca i1, i1 0
-  %nop5724 = alloca i1, i1 0
-  %nop5725 = alloca i1, i1 0
-  %nop5726 = alloca i1, i1 0
-  %nop5727 = alloca i1, i1 0
-  %nop5728 = alloca i1, i1 0
-  %nop5729 = alloca i1, i1 0
-  %nop5730 = alloca i1, i1 0
-  %nop5731 = alloca i1, i1 0
-  %nop5732 = alloca i1, i1 0
-  %nop5733 = alloca i1, i1 0
-  %nop5734 = alloca i1, i1 0
-  %nop5735 = alloca i1, i1 0
-  %nop5736 = alloca i1, i1 0
-  %nop5737 = alloca i1, i1 0
-  %nop5738 = alloca i1, i1 0
-  %nop5739 = alloca i1, i1 0
-  %nop5740 = alloca i1, i1 0
-  %nop5741 = alloca i1, i1 0
-  %nop5742 = alloca i1, i1 0
-  %nop5743 = alloca i1, i1 0
-  %nop5744 = alloca i1, i1 0
-  %nop5745 = alloca i1, i1 0
-  %nop5746 = alloca i1, i1 0
-  %nop5747 = alloca i1, i1 0
-  %nop5748 = alloca i1, i1 0
-  %nop5749 = alloca i1, i1 0
-  %nop5750 = alloca i1, i1 0
-  %nop5751 = alloca i1, i1 0
-  %nop5752 = alloca i1, i1 0
-  %nop5753 = alloca i1, i1 0
-  %nop5754 = alloca i1, i1 0
-  %nop5755 = alloca i1, i1 0
-  %nop5756 = alloca i1, i1 0
-  %nop5757 = alloca i1, i1 0
-  %nop5758 = alloca i1, i1 0
-  %nop5759 = alloca i1, i1 0
-  %nop5760 = alloca i1, i1 0
-  %nop5761 = alloca i1, i1 0
-  %nop5762 = alloca i1, i1 0
-  %nop5763 = alloca i1, i1 0
-  %nop5764 = alloca i1, i1 0
-  %nop5765 = alloca i1, i1 0
-  %nop5766 = alloca i1, i1 0
-  %nop5767 = alloca i1, i1 0
-  %nop5768 = alloca i1, i1 0
-  %nop5769 = alloca i1, i1 0
-  %nop5770 = alloca i1, i1 0
-  %nop5771 = alloca i1, i1 0
-  %nop5772 = alloca i1, i1 0
-  %nop5773 = alloca i1, i1 0
-  %nop5774 = alloca i1, i1 0
-  %nop5775 = alloca i1, i1 0
-  %nop5776 = alloca i1, i1 0
-  %nop5777 = alloca i1, i1 0
-  %nop5778 = alloca i1, i1 0
-  %nop5779 = alloca i1, i1 0
-  %nop5780 = alloca i1, i1 0
-  %nop5781 = alloca i1, i1 0
-  %nop5782 = alloca i1, i1 0
-  %nop5783 = alloca i1, i1 0
-  %nop5784 = alloca i1, i1 0
-  %nop5785 = alloca i1, i1 0
-  %nop5786 = alloca i1, i1 0
-  %nop5787 = alloca i1, i1 0
-  %nop5788 = alloca i1, i1 0
-  %nop5789 = alloca i1, i1 0
-  %nop5790 = alloca i1, i1 0
-  %nop5791 = alloca i1, i1 0
-  %nop5792 = alloca i1, i1 0
-  %nop5793 = alloca i1, i1 0
-  %nop5794 = alloca i1, i1 0
-  %nop5795 = alloca i1, i1 0
-  %nop5796 = alloca i1, i1 0
-  %nop5797 = alloca i1, i1 0
-  %nop5798 = alloca i1, i1 0
-  %nop5799 = alloca i1, i1 0
-  %nop5800 = alloca i1, i1 0
-  %nop5801 = alloca i1, i1 0
-  %nop5802 = alloca i1, i1 0
-  %nop5803 = alloca i1, i1 0
-  %nop5804 = alloca i1, i1 0
-  %nop5805 = alloca i1, i1 0
-  %nop5806 = alloca i1, i1 0
-  %nop5807 = alloca i1, i1 0
-  %nop5808 = alloca i1, i1 0
-  %nop5809 = alloca i1, i1 0
-  %nop5810 = alloca i1, i1 0
-  %nop5811 = alloca i1, i1 0
-  %nop5812 = alloca i1, i1 0
-  %nop5813 = alloca i1, i1 0
-  %nop5814 = alloca i1, i1 0
-  %nop5815 = alloca i1, i1 0
-  %nop5816 = alloca i1, i1 0
-  %nop5817 = alloca i1, i1 0
-  %nop5818 = alloca i1, i1 0
-  %nop5819 = alloca i1, i1 0
-  %nop5820 = alloca i1, i1 0
-  %nop5821 = alloca i1, i1 0
-  %nop5822 = alloca i1, i1 0
-  %nop5823 = alloca i1, i1 0
-  %nop5824 = alloca i1, i1 0
-  %nop5825 = alloca i1, i1 0
-  %nop5826 = alloca i1, i1 0
-  %nop5827 = alloca i1, i1 0
-  %nop5828 = alloca i1, i1 0
-  %nop5829 = alloca i1, i1 0
-  %nop5830 = alloca i1, i1 0
-  %nop5831 = alloca i1, i1 0
-  %nop5832 = alloca i1, i1 0
-  %nop5833 = alloca i1, i1 0
-  %nop5834 = alloca i1, i1 0
-  %nop5835 = alloca i1, i1 0
-  %nop5836 = alloca i1, i1 0
-  %nop5837 = alloca i1, i1 0
-  %nop5838 = alloca i1, i1 0
-  %nop5839 = alloca i1, i1 0
-  %nop5840 = alloca i1, i1 0
-  %nop5841 = alloca i1, i1 0
-  %nop5842 = alloca i1, i1 0
-  %nop5843 = alloca i1, i1 0
-  %nop5844 = alloca i1, i1 0
-  %nop5845 = alloca i1, i1 0
-  %nop5846 = alloca i1, i1 0
-  %nop5847 = alloca i1, i1 0
-  %nop5848 = alloca i1, i1 0
-  %nop5849 = alloca i1, i1 0
-  %nop5850 = alloca i1, i1 0
-  %nop5851 = alloca i1, i1 0
-  %nop5852 = alloca i1, i1 0
-  %nop5853 = alloca i1, i1 0
-  %nop5854 = alloca i1, i1 0
-  %nop5855 = alloca i1, i1 0
-  %nop5856 = alloca i1, i1 0
-  %nop5857 = alloca i1, i1 0
-  %nop5858 = alloca i1, i1 0
-  %nop5859 = alloca i1, i1 0
-  %nop5860 = alloca i1, i1 0
-  %nop5861 = alloca i1, i1 0
-  %nop5862 = alloca i1, i1 0
-  %nop5863 = alloca i1, i1 0
-  %nop5864 = alloca i1, i1 0
-  %nop5865 = alloca i1, i1 0
-  %nop5866 = alloca i1, i1 0
-  %nop5867 = alloca i1, i1 0
-  %nop5868 = alloca i1, i1 0
-  %nop5869 = alloca i1, i1 0
-  %nop5870 = alloca i1, i1 0
-  %nop5871 = alloca i1, i1 0
-  %nop5872 = alloca i1, i1 0
-  %nop5873 = alloca i1, i1 0
-  %nop5874 = alloca i1, i1 0
-  %nop5875 = alloca i1, i1 0
-  %nop5876 = alloca i1, i1 0
-  %nop5877 = alloca i1, i1 0
-  %nop5878 = alloca i1, i1 0
-  %nop5879 = alloca i1, i1 0
-  %nop5880 = alloca i1, i1 0
-  %nop5881 = alloca i1, i1 0
-  %nop5882 = alloca i1, i1 0
-  %nop5883 = alloca i1, i1 0
-  %nop5884 = alloca i1, i1 0
-  %nop5885 = alloca i1, i1 0
-  %nop5886 = alloca i1, i1 0
-  %nop5887 = alloca i1, i1 0
-  %nop5888 = alloca i1, i1 0
-  %nop5889 = alloca i1, i1 0
-  %nop5890 = alloca i1, i1 0
-  %nop5891 = alloca i1, i1 0
-  %nop5892 = alloca i1, i1 0
-  %nop5893 = alloca i1, i1 0
-  %nop5894 = alloca i1, i1 0
-  %nop5895 = alloca i1, i1 0
-  %nop5896 = alloca i1, i1 0
-  %nop5897 = alloca i1, i1 0
-  %nop5898 = alloca i1, i1 0
-  %nop5899 = alloca i1, i1 0
-  %nop5900 = alloca i1, i1 0
-  %nop5901 = alloca i1, i1 0
-  %nop5902 = alloca i1, i1 0
-  %nop5903 = alloca i1, i1 0
-  %nop5904 = alloca i1, i1 0
-  %nop5905 = alloca i1, i1 0
-  %nop5906 = alloca i1, i1 0
-  %nop5907 = alloca i1, i1 0
-  %nop5908 = alloca i1, i1 0
-  %nop5909 = alloca i1, i1 0
-  %nop5910 = alloca i1, i1 0
-  %nop5911 = alloca i1, i1 0
-  %nop5912 = alloca i1, i1 0
-  %nop5913 = alloca i1, i1 0
-  %nop5914 = alloca i1, i1 0
-  %nop5915 = alloca i1, i1 0
-  %nop5916 = alloca i1, i1 0
-  %nop5917 = alloca i1, i1 0
-  %nop5918 = alloca i1, i1 0
-  %nop5919 = alloca i1, i1 0
-  %nop5920 = alloca i1, i1 0
-  %nop5921 = alloca i1, i1 0
-  %nop5922 = alloca i1, i1 0
-  %nop5923 = alloca i1, i1 0
-  %nop5924 = alloca i1, i1 0
-  %nop5925 = alloca i1, i1 0
-  %nop5926 = alloca i1, i1 0
-  %nop5927 = alloca i1, i1 0
-  %nop5928 = alloca i1, i1 0
-  %nop5929 = alloca i1, i1 0
-  %nop5930 = alloca i1, i1 0
-  %nop5931 = alloca i1, i1 0
-  %nop5932 = alloca i1, i1 0
-  %nop5933 = alloca i1, i1 0
-  %nop5934 = alloca i1, i1 0
-  %nop5935 = alloca i1, i1 0
-  %nop5936 = alloca i1, i1 0
-  %nop5937 = alloca i1, i1 0
-  %nop5938 = alloca i1, i1 0
-  %nop5939 = alloca i1, i1 0
-  %nop5940 = alloca i1, i1 0
-  %nop5941 = alloca i1, i1 0
-  %nop5942 = alloca i1, i1 0
-  %nop5943 = alloca i1, i1 0
-  %nop5944 = alloca i1, i1 0
-  %nop5945 = alloca i1, i1 0
-  %nop5946 = alloca i1, i1 0
-  %nop5947 = alloca i1, i1 0
-  %nop5948 = alloca i1, i1 0
-  %nop5949 = alloca i1, i1 0
-  %nop5950 = alloca i1, i1 0
-  %nop5951 = alloca i1, i1 0
-  %nop5952 = alloca i1, i1 0
-  %nop5953 = alloca i1, i1 0
-  %nop5954 = alloca i1, i1 0
-  %nop5955 = alloca i1, i1 0
-  %nop5956 = alloca i1, i1 0
-  %nop5957 = alloca i1, i1 0
-  %nop5958 = alloca i1, i1 0
-  %nop5959 = alloca i1, i1 0
-  %nop5960 = alloca i1, i1 0
-  %nop5961 = alloca i1, i1 0
-  %nop5962 = alloca i1, i1 0
-  %nop5963 = alloca i1, i1 0
-  %nop5964 = alloca i1, i1 0
-  %nop5965 = alloca i1, i1 0
-  %nop5966 = alloca i1, i1 0
-  %nop5967 = alloca i1, i1 0
-  %nop5968 = alloca i1, i1 0
-  %nop5969 = alloca i1, i1 0
-  %nop5970 = alloca i1, i1 0
-  %nop5971 = alloca i1, i1 0
-  %nop5972 = alloca i1, i1 0
-  %nop5973 = alloca i1, i1 0
-  %nop5974 = alloca i1, i1 0
-  %nop5975 = alloca i1, i1 0
-  %nop5976 = alloca i1, i1 0
-  %nop5977 = alloca i1, i1 0
-  %nop5978 = alloca i1, i1 0
-  %nop5979 = alloca i1, i1 0
-  %nop5980 = alloca i1, i1 0
-  %nop5981 = alloca i1, i1 0
-  %nop5982 = alloca i1, i1 0
-  %nop5983 = alloca i1, i1 0
-  %nop5984 = alloca i1, i1 0
-  %nop5985 = alloca i1, i1 0
-  %nop5986 = alloca i1, i1 0
-  %nop5987 = alloca i1, i1 0
-  %nop5988 = alloca i1, i1 0
-  %nop5989 = alloca i1, i1 0
-  %nop5990 = alloca i1, i1 0
-  %nop5991 = alloca i1, i1 0
-  %nop5992 = alloca i1, i1 0
-  %nop5993 = alloca i1, i1 0
-  %nop5994 = alloca i1, i1 0
-  %nop5995 = alloca i1, i1 0
-  %nop5996 = alloca i1, i1 0
-  %nop5997 = alloca i1, i1 0
-  %nop5998 = alloca i1, i1 0
-  %nop5999 = alloca i1, i1 0
-  %nop6000 = alloca i1, i1 0
-  %nop6001 = alloca i1, i1 0
-  %nop6002 = alloca i1, i1 0
-  %nop6003 = alloca i1, i1 0
-  %nop6004 = alloca i1, i1 0
-  %nop6005 = alloca i1, i1 0
-  %nop6006 = alloca i1, i1 0
-  %nop6007 = alloca i1, i1 0
-  %nop6008 = alloca i1, i1 0
-  %nop6009 = alloca i1, i1 0
-  %nop6010 = alloca i1, i1 0
-  %nop6011 = alloca i1, i1 0
-  %nop6012 = alloca i1, i1 0
-  %nop6013 = alloca i1, i1 0
-  %nop6014 = alloca i1, i1 0
-  %nop6015 = alloca i1, i1 0
-  %nop6016 = alloca i1, i1 0
-  %nop6017 = alloca i1, i1 0
-  %nop6018 = alloca i1, i1 0
-  %nop6019 = alloca i1, i1 0
-  %nop6020 = alloca i1, i1 0
-  %nop6021 = alloca i1, i1 0
-  %nop6022 = alloca i1, i1 0
-  %nop6023 = alloca i1, i1 0
-  %nop6024 = alloca i1, i1 0
-  %nop6025 = alloca i1, i1 0
-  %nop6026 = alloca i1, i1 0
-  %nop6027 = alloca i1, i1 0
-  %nop6028 = alloca i1, i1 0
-  %nop6029 = alloca i1, i1 0
-  %nop6030 = alloca i1, i1 0
-  %nop6031 = alloca i1, i1 0
-  %nop6032 = alloca i1, i1 0
-  %nop6033 = alloca i1, i1 0
-  %nop6034 = alloca i1, i1 0
-  %nop6035 = alloca i1, i1 0
-  %nop6036 = alloca i1, i1 0
-  %nop6037 = alloca i1, i1 0
-  %nop6038 = alloca i1, i1 0
-  %nop6039 = alloca i1, i1 0
-  %nop6040 = alloca i1, i1 0
-  %nop6041 = alloca i1, i1 0
-  %nop6042 = alloca i1, i1 0
-  %nop6043 = alloca i1, i1 0
-  %nop6044 = alloca i1, i1 0
-  %nop6045 = alloca i1, i1 0
-  %nop6046 = alloca i1, i1 0
-  %nop6047 = alloca i1, i1 0
-  %nop6048 = alloca i1, i1 0
-  %nop6049 = alloca i1, i1 0
-  %nop6050 = alloca i1, i1 0
-  %nop6051 = alloca i1, i1 0
-  %nop6052 = alloca i1, i1 0
-  %nop6053 = alloca i1, i1 0
-  %nop6054 = alloca i1, i1 0
-  %nop6055 = alloca i1, i1 0
-  %nop6056 = alloca i1, i1 0
-  %nop6057 = alloca i1, i1 0
-  %nop6058 = alloca i1, i1 0
-  %nop6059 = alloca i1, i1 0
-  %nop6060 = alloca i1, i1 0
-  %nop6061 = alloca i1, i1 0
-  %nop6062 = alloca i1, i1 0
-  %nop6063 = alloca i1, i1 0
-  %nop6064 = alloca i1, i1 0
-  %nop6065 = alloca i1, i1 0
-  %nop6066 = alloca i1, i1 0
-  %nop6067 = alloca i1, i1 0
-  %nop6068 = alloca i1, i1 0
-  %nop6069 = alloca i1, i1 0
-  %nop6070 = alloca i1, i1 0
-  %nop6071 = alloca i1, i1 0
-  %nop6072 = alloca i1, i1 0
-  %nop6073 = alloca i1, i1 0
-  %nop6074 = alloca i1, i1 0
-  %nop6075 = alloca i1, i1 0
-  %nop6076 = alloca i1, i1 0
-  %nop6077 = alloca i1, i1 0
-  %nop6078 = alloca i1, i1 0
-  %nop6079 = alloca i1, i1 0
-  %nop6080 = alloca i1, i1 0
-  %nop6081 = alloca i1, i1 0
-  %nop6082 = alloca i1, i1 0
-  %nop6083 = alloca i1, i1 0
-  %nop6084 = alloca i1, i1 0
-  %nop6085 = alloca i1, i1 0
-  %nop6086 = alloca i1, i1 0
-  %nop6087 = alloca i1, i1 0
-  %nop6088 = alloca i1, i1 0
-  %nop6089 = alloca i1, i1 0
-  %nop6090 = alloca i1, i1 0
-  %nop6091 = alloca i1, i1 0
-  %nop6092 = alloca i1, i1 0
-  %nop6093 = alloca i1, i1 0
-  %nop6094 = alloca i1, i1 0
-  %nop6095 = alloca i1, i1 0
-  %nop6096 = alloca i1, i1 0
-  %nop6097 = alloca i1, i1 0
-  %nop6098 = alloca i1, i1 0
-  %nop6099 = alloca i1, i1 0
-  %nop6100 = alloca i1, i1 0
-  %nop6101 = alloca i1, i1 0
-  %nop6102 = alloca i1, i1 0
-  %nop6103 = alloca i1, i1 0
-  %nop6104 = alloca i1, i1 0
-  %nop6105 = alloca i1, i1 0
-  %nop6106 = alloca i1, i1 0
-  %nop6107 = alloca i1, i1 0
-  %nop6108 = alloca i1, i1 0
-  %nop6109 = alloca i1, i1 0
-  %nop6110 = alloca i1, i1 0
-  %nop6111 = alloca i1, i1 0
-  %nop6112 = alloca i1, i1 0
-  %nop6113 = alloca i1, i1 0
-  %nop6114 = alloca i1, i1 0
-  %nop6115 = alloca i1, i1 0
-  %nop6116 = alloca i1, i1 0
-  %nop6117 = alloca i1, i1 0
-  %nop6118 = alloca i1, i1 0
-  %nop6119 = alloca i1, i1 0
-  %nop6120 = alloca i1, i1 0
-  %nop6121 = alloca i1, i1 0
-  %nop6122 = alloca i1, i1 0
-  %nop6123 = alloca i1, i1 0
-  %nop6124 = alloca i1, i1 0
-  %nop6125 = alloca i1, i1 0
-  %nop6126 = alloca i1, i1 0
-  %nop6127 = alloca i1, i1 0
-  %nop6128 = alloca i1, i1 0
-  %nop6129 = alloca i1, i1 0
-  %nop6130 = alloca i1, i1 0
-  %nop6131 = alloca i1, i1 0
-  %nop6132 = alloca i1, i1 0
-  %nop6133 = alloca i1, i1 0
-  %nop6134 = alloca i1, i1 0
-  %nop6135 = alloca i1, i1 0
-  %nop6136 = alloca i1, i1 0
-  %nop6137 = alloca i1, i1 0
-  %nop6138 = alloca i1, i1 0
-  %nop6139 = alloca i1, i1 0
-  %nop6140 = alloca i1, i1 0
-  %nop6141 = alloca i1, i1 0
-  %nop6142 = alloca i1, i1 0
-  %nop6143 = alloca i1, i1 0
-  %nop6144 = alloca i1, i1 0
-  %nop6145 = alloca i1, i1 0
-  %nop6146 = alloca i1, i1 0
-  %nop6147 = alloca i1, i1 0
-  %nop6148 = alloca i1, i1 0
-  %nop6149 = alloca i1, i1 0
-  %nop6150 = alloca i1, i1 0
-  %nop6151 = alloca i1, i1 0
-  %nop6152 = alloca i1, i1 0
-  %nop6153 = alloca i1, i1 0
-  %nop6154 = alloca i1, i1 0
-  %nop6155 = alloca i1, i1 0
-  %nop6156 = alloca i1, i1 0
-  %nop6157 = alloca i1, i1 0
-  %nop6158 = alloca i1, i1 0
-  %nop6159 = alloca i1, i1 0
-  %nop6160 = alloca i1, i1 0
-  %nop6161 = alloca i1, i1 0
-  %nop6162 = alloca i1, i1 0
-  %nop6163 = alloca i1, i1 0
-  %nop6164 = alloca i1, i1 0
-  %nop6165 = alloca i1, i1 0
-  %nop6166 = alloca i1, i1 0
-  %nop6167 = alloca i1, i1 0
-  %nop6168 = alloca i1, i1 0
-  %nop6169 = alloca i1, i1 0
-  %nop6170 = alloca i1, i1 0
-  %nop6171 = alloca i1, i1 0
-  %nop6172 = alloca i1, i1 0
-  %nop6173 = alloca i1, i1 0
-  %nop6174 = alloca i1, i1 0
-  %nop6175 = alloca i1, i1 0
-  %nop6176 = alloca i1, i1 0
-  %nop6177 = alloca i1, i1 0
-  %nop6178 = alloca i1, i1 0
-  %nop6179 = alloca i1, i1 0
-  %nop6180 = alloca i1, i1 0
-  %nop6181 = alloca i1, i1 0
-  %nop6182 = alloca i1, i1 0
-  %nop6183 = alloca i1, i1 0
-  %nop6184 = alloca i1, i1 0
-  %nop6185 = alloca i1, i1 0
-  %nop6186 = alloca i1, i1 0
-  %nop6187 = alloca i1, i1 0
-  %nop6188 = alloca i1, i1 0
-  %nop6189 = alloca i1, i1 0
-  %nop6190 = alloca i1, i1 0
-  %nop6191 = alloca i1, i1 0
-  %nop6192 = alloca i1, i1 0
-  %nop6193 = alloca i1, i1 0
-  %nop6194 = alloca i1, i1 0
-  %nop6195 = alloca i1, i1 0
-  %nop6196 = alloca i1, i1 0
-  %nop6197 = alloca i1, i1 0
-  %nop6198 = alloca i1, i1 0
-  %nop6199 = alloca i1, i1 0
-  %nop6200 = alloca i1, i1 0
-  %nop6201 = alloca i1, i1 0
-  %nop6202 = alloca i1, i1 0
-  %nop6203 = alloca i1, i1 0
-  %nop6204 = alloca i1, i1 0
-  %nop6205 = alloca i1, i1 0
-  %nop6206 = alloca i1, i1 0
-  %nop6207 = alloca i1, i1 0
-  %nop6208 = alloca i1, i1 0
-  %nop6209 = alloca i1, i1 0
-  %nop6210 = alloca i1, i1 0
-  %nop6211 = alloca i1, i1 0
-  %nop6212 = alloca i1, i1 0
-  %nop6213 = alloca i1, i1 0
-  %nop6214 = alloca i1, i1 0
-  %nop6215 = alloca i1, i1 0
-  %nop6216 = alloca i1, i1 0
-  %nop6217 = alloca i1, i1 0
-  %nop6218 = alloca i1, i1 0
-  %nop6219 = alloca i1, i1 0
-  %nop6220 = alloca i1, i1 0
-  %nop6221 = alloca i1, i1 0
-  %nop6222 = alloca i1, i1 0
-  %nop6223 = alloca i1, i1 0
-  %nop6224 = alloca i1, i1 0
-  %nop6225 = alloca i1, i1 0
-  %nop6226 = alloca i1, i1 0
-  %nop6227 = alloca i1, i1 0
-  %nop6228 = alloca i1, i1 0
-  %nop6229 = alloca i1, i1 0
-  %nop6230 = alloca i1, i1 0
-  %nop6231 = alloca i1, i1 0
-  %nop6232 = alloca i1, i1 0
-  %nop6233 = alloca i1, i1 0
-  %nop6234 = alloca i1, i1 0
-  %nop6235 = alloca i1, i1 0
-  %nop6236 = alloca i1, i1 0
-  %nop6237 = alloca i1, i1 0
-  %nop6238 = alloca i1, i1 0
-  %nop6239 = alloca i1, i1 0
-  %nop6240 = alloca i1, i1 0
-  %nop6241 = alloca i1, i1 0
-  %nop6242 = alloca i1, i1 0
-  %nop6243 = alloca i1, i1 0
-  %nop6244 = alloca i1, i1 0
-  %nop6245 = alloca i1, i1 0
-  %nop6246 = alloca i1, i1 0
-  %nop6247 = alloca i1, i1 0
-  %nop6248 = alloca i1, i1 0
-  %nop6249 = alloca i1, i1 0
-  %nop6250 = alloca i1, i1 0
-  %nop6251 = alloca i1, i1 0
-  %nop6252 = alloca i1, i1 0
-  %nop6253 = alloca i1, i1 0
-  %nop6254 = alloca i1, i1 0
-  %nop6255 = alloca i1, i1 0
-  %nop6256 = alloca i1, i1 0
-  %nop6257 = alloca i1, i1 0
-  %nop6258 = alloca i1, i1 0
-  %nop6259 = alloca i1, i1 0
-  %nop6260 = alloca i1, i1 0
-  %nop6261 = alloca i1, i1 0
-  %nop6262 = alloca i1, i1 0
-  %nop6263 = alloca i1, i1 0
-  %nop6264 = alloca i1, i1 0
-  %nop6265 = alloca i1, i1 0
-  %nop6266 = alloca i1, i1 0
-  %nop6267 = alloca i1, i1 0
-  %nop6268 = alloca i1, i1 0
-  %nop6269 = alloca i1, i1 0
-  %nop6270 = alloca i1, i1 0
-  %nop6271 = alloca i1, i1 0
-  %nop6272 = alloca i1, i1 0
-  %nop6273 = alloca i1, i1 0
-  %nop6274 = alloca i1, i1 0
-  %nop6275 = alloca i1, i1 0
-  %nop6276 = alloca i1, i1 0
-  %nop6277 = alloca i1, i1 0
-  %nop6278 = alloca i1, i1 0
-  %nop6279 = alloca i1, i1 0
-  %nop6280 = alloca i1, i1 0
-  %nop6281 = alloca i1, i1 0
-  %nop6282 = alloca i1, i1 0
-  %nop6283 = alloca i1, i1 0
-  %nop6284 = alloca i1, i1 0
-  %nop6285 = alloca i1, i1 0
-  %nop6286 = alloca i1, i1 0
-  %nop6287 = alloca i1, i1 0
-  %nop6288 = alloca i1, i1 0
-  %nop6289 = alloca i1, i1 0
-  %nop6290 = alloca i1, i1 0
-  %nop6291 = alloca i1, i1 0
-  %nop6292 = alloca i1, i1 0
-  %nop6293 = alloca i1, i1 0
-  %nop6294 = alloca i1, i1 0
-  %nop6295 = alloca i1, i1 0
-  %nop6296 = alloca i1, i1 0
-  %nop6297 = alloca i1, i1 0
-  %nop6298 = alloca i1, i1 0
-  %nop6299 = alloca i1, i1 0
-  %nop6300 = alloca i1, i1 0
-  %nop6301 = alloca i1, i1 0
-  %nop6302 = alloca i1, i1 0
-  %nop6303 = alloca i1, i1 0
-  %nop6304 = alloca i1, i1 0
-  %nop6305 = alloca i1, i1 0
-  %nop6306 = alloca i1, i1 0
-  %nop6307 = alloca i1, i1 0
-  %nop6308 = alloca i1, i1 0
-  %nop6309 = alloca i1, i1 0
-  %nop6310 = alloca i1, i1 0
-  %nop6311 = alloca i1, i1 0
-  %nop6312 = alloca i1, i1 0
-  %nop6313 = alloca i1, i1 0
-  %nop6314 = alloca i1, i1 0
-  %nop6315 = alloca i1, i1 0
-  %nop6316 = alloca i1, i1 0
-  %nop6317 = alloca i1, i1 0
-  %nop6318 = alloca i1, i1 0
-  %nop6319 = alloca i1, i1 0
-  %nop6320 = alloca i1, i1 0
-  %nop6321 = alloca i1, i1 0
-  %nop6322 = alloca i1, i1 0
-  %nop6323 = alloca i1, i1 0
-  %nop6324 = alloca i1, i1 0
-  %nop6325 = alloca i1, i1 0
-  %nop6326 = alloca i1, i1 0
-  %nop6327 = alloca i1, i1 0
-  %nop6328 = alloca i1, i1 0
-  %nop6329 = alloca i1, i1 0
-  %nop6330 = alloca i1, i1 0
-  %nop6331 = alloca i1, i1 0
-  %nop6332 = alloca i1, i1 0
-  %nop6333 = alloca i1, i1 0
-  %nop6334 = alloca i1, i1 0
-  %nop6335 = alloca i1, i1 0
-  %nop6336 = alloca i1, i1 0
-  %nop6337 = alloca i1, i1 0
-  %nop6338 = alloca i1, i1 0
-  %nop6339 = alloca i1, i1 0
-  %nop6340 = alloca i1, i1 0
-  %nop6341 = alloca i1, i1 0
-  %nop6342 = alloca i1, i1 0
-  %nop6343 = alloca i1, i1 0
-  %nop6344 = alloca i1, i1 0
-  %nop6345 = alloca i1, i1 0
-  %nop6346 = alloca i1, i1 0
-  %nop6347 = alloca i1, i1 0
-  %nop6348 = alloca i1, i1 0
-  %nop6349 = alloca i1, i1 0
-  %nop6350 = alloca i1, i1 0
-  %nop6351 = alloca i1, i1 0
-  %nop6352 = alloca i1, i1 0
-  %nop6353 = alloca i1, i1 0
-  %nop6354 = alloca i1, i1 0
-  %nop6355 = alloca i1, i1 0
-  %nop6356 = alloca i1, i1 0
-  %nop6357 = alloca i1, i1 0
-  %nop6358 = alloca i1, i1 0
-  %nop6359 = alloca i1, i1 0
-  %nop6360 = alloca i1, i1 0
-  %nop6361 = alloca i1, i1 0
-  %nop6362 = alloca i1, i1 0
-  %nop6363 = alloca i1, i1 0
-  %nop6364 = alloca i1, i1 0
-  %nop6365 = alloca i1, i1 0
-  %nop6366 = alloca i1, i1 0
-  %nop6367 = alloca i1, i1 0
-  %nop6368 = alloca i1, i1 0
-  %nop6369 = alloca i1, i1 0
-  %nop6370 = alloca i1, i1 0
-  %nop6371 = alloca i1, i1 0
-  %nop6372 = alloca i1, i1 0
-  %nop6373 = alloca i1, i1 0
-  %nop6374 = alloca i1, i1 0
-  %nop6375 = alloca i1, i1 0
-  %nop6376 = alloca i1, i1 0
-  %nop6377 = alloca i1, i1 0
-  %nop6378 = alloca i1, i1 0
-  %nop6379 = alloca i1, i1 0
-  %nop6380 = alloca i1, i1 0
-  %nop6381 = alloca i1, i1 0
-  %nop6382 = alloca i1, i1 0
-  %nop6383 = alloca i1, i1 0
-  %nop6384 = alloca i1, i1 0
-  %nop6385 = alloca i1, i1 0
-  %nop6386 = alloca i1, i1 0
-  %nop6387 = alloca i1, i1 0
-  %nop6388 = alloca i1, i1 0
-  %nop6389 = alloca i1, i1 0
-  %nop6390 = alloca i1, i1 0
-  %nop6391 = alloca i1, i1 0
-  %nop6392 = alloca i1, i1 0
-  %nop6393 = alloca i1, i1 0
-  %nop6394 = alloca i1, i1 0
-  %nop6395 = alloca i1, i1 0
-  %nop6396 = alloca i1, i1 0
-  %nop6397 = alloca i1, i1 0
-  %nop6398 = alloca i1, i1 0
-  %nop6399 = alloca i1, i1 0
-  %nop6400 = alloca i1, i1 0
-  %nop6401 = alloca i1, i1 0
-  %nop6402 = alloca i1, i1 0
-  %nop6403 = alloca i1, i1 0
-  %nop6404 = alloca i1, i1 0
-  %nop6405 = alloca i1, i1 0
-  %nop6406 = alloca i1, i1 0
-  %nop6407 = alloca i1, i1 0
-  %nop6408 = alloca i1, i1 0
-  %nop6409 = alloca i1, i1 0
-  %nop6410 = alloca i1, i1 0
-  %nop6411 = alloca i1, i1 0
-  %nop6412 = alloca i1, i1 0
-  %nop6413 = alloca i1, i1 0
-  %nop6414 = alloca i1, i1 0
-  %nop6415 = alloca i1, i1 0
-  %nop6416 = alloca i1, i1 0
-  %nop6417 = alloca i1, i1 0
-  %nop6418 = alloca i1, i1 0
-  %nop6419 = alloca i1, i1 0
-  %nop6420 = alloca i1, i1 0
-  %nop6421 = alloca i1, i1 0
-  %nop6422 = alloca i1, i1 0
-  %nop6423 = alloca i1, i1 0
-  %nop6424 = alloca i1, i1 0
-  %nop6425 = alloca i1, i1 0
-  %nop6426 = alloca i1, i1 0
-  %nop6427 = alloca i1, i1 0
-  %nop6428 = alloca i1, i1 0
-  %nop6429 = alloca i1, i1 0
-  %nop6430 = alloca i1, i1 0
-  %nop6431 = alloca i1, i1 0
-  %nop6432 = alloca i1, i1 0
-  %nop6433 = alloca i1, i1 0
-  %nop6434 = alloca i1, i1 0
-  %nop6435 = alloca i1, i1 0
-  %nop6436 = alloca i1, i1 0
-  %nop6437 = alloca i1, i1 0
-  %nop6438 = alloca i1, i1 0
-  %nop6439 = alloca i1, i1 0
-  %nop6440 = alloca i1, i1 0
-  %nop6441 = alloca i1, i1 0
-  %nop6442 = alloca i1, i1 0
-  %nop6443 = alloca i1, i1 0
-  %nop6444 = alloca i1, i1 0
-  %nop6445 = alloca i1, i1 0
-  %nop6446 = alloca i1, i1 0
-  %nop6447 = alloca i1, i1 0
-  %nop6448 = alloca i1, i1 0
-  %nop6449 = alloca i1, i1 0
-  %nop6450 = alloca i1, i1 0
-  %nop6451 = alloca i1, i1 0
-  %nop6452 = alloca i1, i1 0
-  %nop6453 = alloca i1, i1 0
-  %nop6454 = alloca i1, i1 0
-  %nop6455 = alloca i1, i1 0
-  %nop6456 = alloca i1, i1 0
-  %nop6457 = alloca i1, i1 0
-  %nop6458 = alloca i1, i1 0
-  %nop6459 = alloca i1, i1 0
-  %nop6460 = alloca i1, i1 0
-  %nop6461 = alloca i1, i1 0
-  %nop6462 = alloca i1, i1 0
-  %nop6463 = alloca i1, i1 0
-  %nop6464 = alloca i1, i1 0
-  %nop6465 = alloca i1, i1 0
-  %nop6466 = alloca i1, i1 0
-  %nop6467 = alloca i1, i1 0
-  %nop6468 = alloca i1, i1 0
-  %nop6469 = alloca i1, i1 0
-  %nop6470 = alloca i1, i1 0
-  %nop6471 = alloca i1, i1 0
-  %nop6472 = alloca i1, i1 0
-  %nop6473 = alloca i1, i1 0
-  %nop6474 = alloca i1, i1 0
-  %nop6475 = alloca i1, i1 0
-  %nop6476 = alloca i1, i1 0
-  %nop6477 = alloca i1, i1 0
-  %nop6478 = alloca i1, i1 0
-  %nop6479 = alloca i1, i1 0
-  %nop6480 = alloca i1, i1 0
-  %nop6481 = alloca i1, i1 0
-  %nop6482 = alloca i1, i1 0
-  %nop6483 = alloca i1, i1 0
-  %nop6484 = alloca i1, i1 0
-  %nop6485 = alloca i1, i1 0
-  %nop6486 = alloca i1, i1 0
-  %nop6487 = alloca i1, i1 0
-  %nop6488 = alloca i1, i1 0
-  %nop6489 = alloca i1, i1 0
-  %nop6490 = alloca i1, i1 0
-  %nop6491 = alloca i1, i1 0
-  %nop6492 = alloca i1, i1 0
-  %nop6493 = alloca i1, i1 0
-  %nop6494 = alloca i1, i1 0
-  %nop6495 = alloca i1, i1 0
-  %nop6496 = alloca i1, i1 0
-  %nop6497 = alloca i1, i1 0
-  %nop6498 = alloca i1, i1 0
-  %nop6499 = alloca i1, i1 0
-  %nop6500 = alloca i1, i1 0
-  %nop6501 = alloca i1, i1 0
-  %nop6502 = alloca i1, i1 0
-  %nop6503 = alloca i1, i1 0
-  %nop6504 = alloca i1, i1 0
-  %nop6505 = alloca i1, i1 0
-  %nop6506 = alloca i1, i1 0
-  %nop6507 = alloca i1, i1 0
-  %nop6508 = alloca i1, i1 0
-  %nop6509 = alloca i1, i1 0
-  %nop6510 = alloca i1, i1 0
-  %nop6511 = alloca i1, i1 0
-  %nop6512 = alloca i1, i1 0
-  %nop6513 = alloca i1, i1 0
-  %nop6514 = alloca i1, i1 0
-  %nop6515 = alloca i1, i1 0
-  %nop6516 = alloca i1, i1 0
-  %nop6517 = alloca i1, i1 0
-  %nop6518 = alloca i1, i1 0
-  %nop6519 = alloca i1, i1 0
-  %nop6520 = alloca i1, i1 0
-  %nop6521 = alloca i1, i1 0
-  %nop6522 = alloca i1, i1 0
-  %nop6523 = alloca i1, i1 0
-  %nop6524 = alloca i1, i1 0
-  %nop6525 = alloca i1, i1 0
-  %nop6526 = alloca i1, i1 0
-  %nop6527 = alloca i1, i1 0
-  %nop6528 = alloca i1, i1 0
-  %nop6529 = alloca i1, i1 0
-  %nop6530 = alloca i1, i1 0
-  %nop6531 = alloca i1, i1 0
-  %nop6532 = alloca i1, i1 0
-  %nop6533 = alloca i1, i1 0
-  %nop6534 = alloca i1, i1 0
-  %nop6535 = alloca i1, i1 0
-  %nop6536 = alloca i1, i1 0
-  %nop6537 = alloca i1, i1 0
-  %nop6538 = alloca i1, i1 0
-  %nop6539 = alloca i1, i1 0
-  %nop6540 = alloca i1, i1 0
-  %nop6541 = alloca i1, i1 0
-  %nop6542 = alloca i1, i1 0
-  %nop6543 = alloca i1, i1 0
-  %nop6544 = alloca i1, i1 0
-  %nop6545 = alloca i1, i1 0
-  %nop6546 = alloca i1, i1 0
-  %nop6547 = alloca i1, i1 0
-  %nop6548 = alloca i1, i1 0
-  %nop6549 = alloca i1, i1 0
-  %nop6550 = alloca i1, i1 0
-  %nop6551 = alloca i1, i1 0
-  %nop6552 = alloca i1, i1 0
-  %nop6553 = alloca i1, i1 0
-  %nop6554 = alloca i1, i1 0
-  %nop6555 = alloca i1, i1 0
-  %nop6556 = alloca i1, i1 0
-  %nop6557 = alloca i1, i1 0
-  %nop6558 = alloca i1, i1 0
-  %nop6559 = alloca i1, i1 0
-  %nop6560 = alloca i1, i1 0
-  %nop6561 = alloca i1, i1 0
-  %nop6562 = alloca i1, i1 0
-  %nop6563 = alloca i1, i1 0
-  %nop6564 = alloca i1, i1 0
-  %nop6565 = alloca i1, i1 0
-  %nop6566 = alloca i1, i1 0
-  %nop6567 = alloca i1, i1 0
-  %nop6568 = alloca i1, i1 0
-  %nop6569 = alloca i1, i1 0
-  %nop6570 = alloca i1, i1 0
-  %nop6571 = alloca i1, i1 0
-  %nop6572 = alloca i1, i1 0
-  %nop6573 = alloca i1, i1 0
-  %nop6574 = alloca i1, i1 0
-  %nop6575 = alloca i1, i1 0
-  %nop6576 = alloca i1, i1 0
-  %nop6577 = alloca i1, i1 0
-  %nop6578 = alloca i1, i1 0
-  %nop6579 = alloca i1, i1 0
-  %nop6580 = alloca i1, i1 0
-  %nop6581 = alloca i1, i1 0
-  %nop6582 = alloca i1, i1 0
-  %nop6583 = alloca i1, i1 0
-  %nop6584 = alloca i1, i1 0
-  %nop6585 = alloca i1, i1 0
-  %nop6586 = alloca i1, i1 0
-  %nop6587 = alloca i1, i1 0
-  %nop6588 = alloca i1, i1 0
-  %nop6589 = alloca i1, i1 0
-  %nop6590 = alloca i1, i1 0
-  %nop6591 = alloca i1, i1 0
-  %nop6592 = alloca i1, i1 0
-  %nop6593 = alloca i1, i1 0
-  %nop6594 = alloca i1, i1 0
-  %nop6595 = alloca i1, i1 0
-  %nop6596 = alloca i1, i1 0
-  %nop6597 = alloca i1, i1 0
-  %nop6598 = alloca i1, i1 0
-  %nop6599 = alloca i1, i1 0
-  %nop6600 = alloca i1, i1 0
-  %nop6601 = alloca i1, i1 0
-  %nop6602 = alloca i1, i1 0
-  %nop6603 = alloca i1, i1 0
-  %nop6604 = alloca i1, i1 0
-  %nop6605 = alloca i1, i1 0
-  %nop6606 = alloca i1, i1 0
-  %nop6607 = alloca i1, i1 0
-  %nop6608 = alloca i1, i1 0
-  %nop6609 = alloca i1, i1 0
-  %nop6610 = alloca i1, i1 0
-  %nop6611 = alloca i1, i1 0
-  %nop6612 = alloca i1, i1 0
-  %nop6613 = alloca i1, i1 0
-  %nop6614 = alloca i1, i1 0
-  %nop6615 = alloca i1, i1 0
-  %nop6616 = alloca i1, i1 0
-  %nop6617 = alloca i1, i1 0
-  %nop6618 = alloca i1, i1 0
-  %nop6619 = alloca i1, i1 0
-  %nop6620 = alloca i1, i1 0
-  %nop6621 = alloca i1, i1 0
-  %nop6622 = alloca i1, i1 0
-  %nop6623 = alloca i1, i1 0
-  %nop6624 = alloca i1, i1 0
-  %nop6625 = alloca i1, i1 0
-  %nop6626 = alloca i1, i1 0
-  %nop6627 = alloca i1, i1 0
-  %nop6628 = alloca i1, i1 0
-  %nop6629 = alloca i1, i1 0
-  %nop6630 = alloca i1, i1 0
-  %nop6631 = alloca i1, i1 0
-  %nop6632 = alloca i1, i1 0
-  %nop6633 = alloca i1, i1 0
-  %nop6634 = alloca i1, i1 0
-  %nop6635 = alloca i1, i1 0
-  %nop6636 = alloca i1, i1 0
-  %nop6637 = alloca i1, i1 0
-  %nop6638 = alloca i1, i1 0
-  %nop6639 = alloca i1, i1 0
-  %nop6640 = alloca i1, i1 0
-  %nop6641 = alloca i1, i1 0
-  %nop6642 = alloca i1, i1 0
-  %nop6643 = alloca i1, i1 0
-  %nop6644 = alloca i1, i1 0
-  %nop6645 = alloca i1, i1 0
-  %nop6646 = alloca i1, i1 0
-  %nop6647 = alloca i1, i1 0
-  %nop6648 = alloca i1, i1 0
-  %nop6649 = alloca i1, i1 0
-  %nop6650 = alloca i1, i1 0
-  %nop6651 = alloca i1, i1 0
-  %nop6652 = alloca i1, i1 0
-  %nop6653 = alloca i1, i1 0
-  %nop6654 = alloca i1, i1 0
-  %nop6655 = alloca i1, i1 0
-  %nop6656 = alloca i1, i1 0
-  %nop6657 = alloca i1, i1 0
-  %nop6658 = alloca i1, i1 0
-  %nop6659 = alloca i1, i1 0
-  %nop6660 = alloca i1, i1 0
-  %nop6661 = alloca i1, i1 0
-  %nop6662 = alloca i1, i1 0
-  %nop6663 = alloca i1, i1 0
-  %nop6664 = alloca i1, i1 0
-  %nop6665 = alloca i1, i1 0
-  %nop6666 = alloca i1, i1 0
-  %nop6667 = alloca i1, i1 0
-  %nop6668 = alloca i1, i1 0
-  %nop6669 = alloca i1, i1 0
-  %nop6670 = alloca i1, i1 0
-  %nop6671 = alloca i1, i1 0
-  %nop6672 = alloca i1, i1 0
-  %nop6673 = alloca i1, i1 0
-  %nop6674 = alloca i1, i1 0
-  %nop6675 = alloca i1, i1 0
-  %nop6676 = alloca i1, i1 0
-  %nop6677 = alloca i1, i1 0
-  %nop6678 = alloca i1, i1 0
-  %nop6679 = alloca i1, i1 0
-  %nop6680 = alloca i1, i1 0
-  %nop6681 = alloca i1, i1 0
-  %nop6682 = alloca i1, i1 0
-  %nop6683 = alloca i1, i1 0
-  %nop6684 = alloca i1, i1 0
-  %nop6685 = alloca i1, i1 0
-  %nop6686 = alloca i1, i1 0
-  %nop6687 = alloca i1, i1 0
-  %nop6688 = alloca i1, i1 0
-  %nop6689 = alloca i1, i1 0
-  %nop6690 = alloca i1, i1 0
-  %nop6691 = alloca i1, i1 0
-  %nop6692 = alloca i1, i1 0
-  %nop6693 = alloca i1, i1 0
-  %nop6694 = alloca i1, i1 0
-  %nop6695 = alloca i1, i1 0
-  %nop6696 = alloca i1, i1 0
-  %nop6697 = alloca i1, i1 0
-  %nop6698 = alloca i1, i1 0
-  %nop6699 = alloca i1, i1 0
-  %nop6700 = alloca i1, i1 0
-  %nop6701 = alloca i1, i1 0
-  %nop6702 = alloca i1, i1 0
-  %nop6703 = alloca i1, i1 0
-  %nop6704 = alloca i1, i1 0
-  %nop6705 = alloca i1, i1 0
-  %nop6706 = alloca i1, i1 0
-  %nop6707 = alloca i1, i1 0
-  %nop6708 = alloca i1, i1 0
-  %nop6709 = alloca i1, i1 0
-  %nop6710 = alloca i1, i1 0
-  %nop6711 = alloca i1, i1 0
-  %nop6712 = alloca i1, i1 0
-  %nop6713 = alloca i1, i1 0
-  %nop6714 = alloca i1, i1 0
-  %nop6715 = alloca i1, i1 0
-  %nop6716 = alloca i1, i1 0
-  %nop6717 = alloca i1, i1 0
-  %nop6718 = alloca i1, i1 0
-  %nop6719 = alloca i1, i1 0
-  %nop6720 = alloca i1, i1 0
-  %nop6721 = alloca i1, i1 0
-  %nop6722 = alloca i1, i1 0
-  %nop6723 = alloca i1, i1 0
-  %nop6724 = alloca i1, i1 0
-  %nop6725 = alloca i1, i1 0
-  %nop6726 = alloca i1, i1 0
-  %nop6727 = alloca i1, i1 0
-  %nop6728 = alloca i1, i1 0
-  %nop6729 = alloca i1, i1 0
-  %nop6730 = alloca i1, i1 0
-  %nop6731 = alloca i1, i1 0
-  %nop6732 = alloca i1, i1 0
-  %nop6733 = alloca i1, i1 0
-  %nop6734 = alloca i1, i1 0
-  %nop6735 = alloca i1, i1 0
-  %nop6736 = alloca i1, i1 0
-  %nop6737 = alloca i1, i1 0
-  %nop6738 = alloca i1, i1 0
-  %nop6739 = alloca i1, i1 0
-  %nop6740 = alloca i1, i1 0
-  %nop6741 = alloca i1, i1 0
-  %nop6742 = alloca i1, i1 0
-  %nop6743 = alloca i1, i1 0
-  %nop6744 = alloca i1, i1 0
-  %nop6745 = alloca i1, i1 0
-  %nop6746 = alloca i1, i1 0
-  %nop6747 = alloca i1, i1 0
-  %nop6748 = alloca i1, i1 0
-  %nop6749 = alloca i1, i1 0
-  %nop6750 = alloca i1, i1 0
-  %nop6751 = alloca i1, i1 0
-  %nop6752 = alloca i1, i1 0
-  %nop6753 = alloca i1, i1 0
-  %nop6754 = alloca i1, i1 0
-  %nop6755 = alloca i1, i1 0
-  %nop6756 = alloca i1, i1 0
-  %nop6757 = alloca i1, i1 0
-  %nop6758 = alloca i1, i1 0
-  %nop6759 = alloca i1, i1 0
-  %nop6760 = alloca i1, i1 0
-  %nop6761 = alloca i1, i1 0
-  %nop6762 = alloca i1, i1 0
-  %nop6763 = alloca i1, i1 0
-  %nop6764 = alloca i1, i1 0
-  %nop6765 = alloca i1, i1 0
-  %nop6766 = alloca i1, i1 0
-  %nop6767 = alloca i1, i1 0
-  %nop6768 = alloca i1, i1 0
-  %nop6769 = alloca i1, i1 0
-  %nop6770 = alloca i1, i1 0
-  %nop6771 = alloca i1, i1 0
-  %nop6772 = alloca i1, i1 0
-  %nop6773 = alloca i1, i1 0
-  %nop6774 = alloca i1, i1 0
-  %nop6775 = alloca i1, i1 0
-  %nop6776 = alloca i1, i1 0
-  %nop6777 = alloca i1, i1 0
-  %nop6778 = alloca i1, i1 0
-  %nop6779 = alloca i1, i1 0
-  %nop6780 = alloca i1, i1 0
-  %nop6781 = alloca i1, i1 0
-  %nop6782 = alloca i1, i1 0
-  %nop6783 = alloca i1, i1 0
-  %nop6784 = alloca i1, i1 0
-  %nop6785 = alloca i1, i1 0
-  %nop6786 = alloca i1, i1 0
-  %nop6787 = alloca i1, i1 0
-  %nop6788 = alloca i1, i1 0
-  %nop6789 = alloca i1, i1 0
-  %nop6790 = alloca i1, i1 0
-  %nop6791 = alloca i1, i1 0
-  %nop6792 = alloca i1, i1 0
-  %nop6793 = alloca i1, i1 0
-  %nop6794 = alloca i1, i1 0
-  %nop6795 = alloca i1, i1 0
-  %nop6796 = alloca i1, i1 0
-  %nop6797 = alloca i1, i1 0
-  %nop6798 = alloca i1, i1 0
-  %nop6799 = alloca i1, i1 0
-  %nop6800 = alloca i1, i1 0
-  %nop6801 = alloca i1, i1 0
-  %nop6802 = alloca i1, i1 0
-  %nop6803 = alloca i1, i1 0
-  %nop6804 = alloca i1, i1 0
-  %nop6805 = alloca i1, i1 0
-  %nop6806 = alloca i1, i1 0
-  %nop6807 = alloca i1, i1 0
-  %nop6808 = alloca i1, i1 0
-  %nop6809 = alloca i1, i1 0
-  %nop6810 = alloca i1, i1 0
-  %nop6811 = alloca i1, i1 0
-  %nop6812 = alloca i1, i1 0
-  %nop6813 = alloca i1, i1 0
-  %nop6814 = alloca i1, i1 0
-  %nop6815 = alloca i1, i1 0
-  %nop6816 = alloca i1, i1 0
-  %nop6817 = alloca i1, i1 0
-  %nop6818 = alloca i1, i1 0
-  %nop6819 = alloca i1, i1 0
-  %nop6820 = alloca i1, i1 0
-  %nop6821 = alloca i1, i1 0
-  %nop6822 = alloca i1, i1 0
-  %nop6823 = alloca i1, i1 0
-  %nop6824 = alloca i1, i1 0
-  %nop6825 = alloca i1, i1 0
-  %nop6826 = alloca i1, i1 0
-  %nop6827 = alloca i1, i1 0
-  %nop6828 = alloca i1, i1 0
-  %nop6829 = alloca i1, i1 0
-  %nop6830 = alloca i1, i1 0
-  %nop6831 = alloca i1, i1 0
-  %nop6832 = alloca i1, i1 0
-  %nop6833 = alloca i1, i1 0
-  %nop6834 = alloca i1, i1 0
-  %nop6835 = alloca i1, i1 0
-  %nop6836 = alloca i1, i1 0
-  %nop6837 = alloca i1, i1 0
-  %nop6838 = alloca i1, i1 0
-  %nop6839 = alloca i1, i1 0
-  %nop6840 = alloca i1, i1 0
-  %nop6841 = alloca i1, i1 0
-  %nop6842 = alloca i1, i1 0
-  %nop6843 = alloca i1, i1 0
-  %nop6844 = alloca i1, i1 0
-  %nop6845 = alloca i1, i1 0
-  %nop6846 = alloca i1, i1 0
-  %nop6847 = alloca i1, i1 0
-  %nop6848 = alloca i1, i1 0
-  %nop6849 = alloca i1, i1 0
-  %nop6850 = alloca i1, i1 0
-  %nop6851 = alloca i1, i1 0
-  %nop6852 = alloca i1, i1 0
-  %nop6853 = alloca i1, i1 0
-  %nop6854 = alloca i1, i1 0
-  %nop6855 = alloca i1, i1 0
-  %nop6856 = alloca i1, i1 0
-  %nop6857 = alloca i1, i1 0
-  %nop6858 = alloca i1, i1 0
-  %nop6859 = alloca i1, i1 0
-  %nop6860 = alloca i1, i1 0
-  %nop6861 = alloca i1, i1 0
-  %nop6862 = alloca i1, i1 0
-  %nop6863 = alloca i1, i1 0
-  %nop6864 = alloca i1, i1 0
-  %nop6865 = alloca i1, i1 0
-  %nop6866 = alloca i1, i1 0
-  %nop6867 = alloca i1, i1 0
-  %nop6868 = alloca i1, i1 0
-  %nop6869 = alloca i1, i1 0
-  %nop6870 = alloca i1, i1 0
-  %nop6871 = alloca i1, i1 0
-  %nop6872 = alloca i1, i1 0
-  %nop6873 = alloca i1, i1 0
-  %nop6874 = alloca i1, i1 0
-  %nop6875 = alloca i1, i1 0
-  %nop6876 = alloca i1, i1 0
-  %nop6877 = alloca i1, i1 0
-  %nop6878 = alloca i1, i1 0
-  %nop6879 = alloca i1, i1 0
-  %nop6880 = alloca i1, i1 0
-  %nop6881 = alloca i1, i1 0
-  %nop6882 = alloca i1, i1 0
-  %nop6883 = alloca i1, i1 0
-  %nop6884 = alloca i1, i1 0
-  %nop6885 = alloca i1, i1 0
-  %nop6886 = alloca i1, i1 0
-  %nop6887 = alloca i1, i1 0
-  %nop6888 = alloca i1, i1 0
-  %nop6889 = alloca i1, i1 0
-  %nop6890 = alloca i1, i1 0
-  %nop6891 = alloca i1, i1 0
-  %nop6892 = alloca i1, i1 0
-  %nop6893 = alloca i1, i1 0
-  %nop6894 = alloca i1, i1 0
-  %nop6895 = alloca i1, i1 0
-  %nop6896 = alloca i1, i1 0
-  %nop6897 = alloca i1, i1 0
-  %nop6898 = alloca i1, i1 0
-  %nop6899 = alloca i1, i1 0
-  %nop6900 = alloca i1, i1 0
-  %nop6901 = alloca i1, i1 0
-  %nop6902 = alloca i1, i1 0
-  %nop6903 = alloca i1, i1 0
-  %nop6904 = alloca i1, i1 0
-  %nop6905 = alloca i1, i1 0
-  %nop6906 = alloca i1, i1 0
-  %nop6907 = alloca i1, i1 0
-  %nop6908 = alloca i1, i1 0
-  %nop6909 = alloca i1, i1 0
-  %nop6910 = alloca i1, i1 0
-  %nop6911 = alloca i1, i1 0
-  %nop6912 = alloca i1, i1 0
-  %nop6913 = alloca i1, i1 0
-  %nop6914 = alloca i1, i1 0
-  %nop6915 = alloca i1, i1 0
-  %nop6916 = alloca i1, i1 0
-  %nop6917 = alloca i1, i1 0
-  %nop6918 = alloca i1, i1 0
-  %nop6919 = alloca i1, i1 0
-  %nop6920 = alloca i1, i1 0
-  %nop6921 = alloca i1, i1 0
-  %nop6922 = alloca i1, i1 0
-  %nop6923 = alloca i1, i1 0
-  %nop6924 = alloca i1, i1 0
-  %nop6925 = alloca i1, i1 0
-  %nop6926 = alloca i1, i1 0
-  %nop6927 = alloca i1, i1 0
-  %nop6928 = alloca i1, i1 0
-  %nop6929 = alloca i1, i1 0
-  %nop6930 = alloca i1, i1 0
-  %nop6931 = alloca i1, i1 0
-  %nop6932 = alloca i1, i1 0
-  %nop6933 = alloca i1, i1 0
-  %nop6934 = alloca i1, i1 0
-  %nop6935 = alloca i1, i1 0
-  %nop6936 = alloca i1, i1 0
-  %nop6937 = alloca i1, i1 0
-  %nop6938 = alloca i1, i1 0
-  %nop6939 = alloca i1, i1 0
-  %nop6940 = alloca i1, i1 0
-  %nop6941 = alloca i1, i1 0
-  %nop6942 = alloca i1, i1 0
-  %nop6943 = alloca i1, i1 0
-  %nop6944 = alloca i1, i1 0
-  %nop6945 = alloca i1, i1 0
-  %nop6946 = alloca i1, i1 0
-  %nop6947 = alloca i1, i1 0
-  %nop6948 = alloca i1, i1 0
-  %nop6949 = alloca i1, i1 0
-  %nop6950 = alloca i1, i1 0
-  %nop6951 = alloca i1, i1 0
-  %nop6952 = alloca i1, i1 0
-  %nop6953 = alloca i1, i1 0
-  %nop6954 = alloca i1, i1 0
-  %nop6955 = alloca i1, i1 0
-  %nop6956 = alloca i1, i1 0
-  %nop6957 = alloca i1, i1 0
-  %nop6958 = alloca i1, i1 0
-  %nop6959 = alloca i1, i1 0
-  %nop6960 = alloca i1, i1 0
-  %nop6961 = alloca i1, i1 0
-  %nop6962 = alloca i1, i1 0
-  %nop6963 = alloca i1, i1 0
-  %nop6964 = alloca i1, i1 0
-  %nop6965 = alloca i1, i1 0
-  %nop6966 = alloca i1, i1 0
-  %nop6967 = alloca i1, i1 0
-  %nop6968 = alloca i1, i1 0
-  %nop6969 = alloca i1, i1 0
-  %nop6970 = alloca i1, i1 0
-  %nop6971 = alloca i1, i1 0
-  %nop6972 = alloca i1, i1 0
-  %nop6973 = alloca i1, i1 0
-  %nop6974 = alloca i1, i1 0
-  %nop6975 = alloca i1, i1 0
-  %nop6976 = alloca i1, i1 0
-  %nop6977 = alloca i1, i1 0
-  %nop6978 = alloca i1, i1 0
-  %nop6979 = alloca i1, i1 0
-  %nop6980 = alloca i1, i1 0
-  %nop6981 = alloca i1, i1 0
-  %nop6982 = alloca i1, i1 0
-  %nop6983 = alloca i1, i1 0
-  %nop6984 = alloca i1, i1 0
-  %nop6985 = alloca i1, i1 0
-  %nop6986 = alloca i1, i1 0
-  %nop6987 = alloca i1, i1 0
-  %nop6988 = alloca i1, i1 0
-  %nop6989 = alloca i1, i1 0
-  %nop6990 = alloca i1, i1 0
-  %nop6991 = alloca i1, i1 0
-  %nop6992 = alloca i1, i1 0
-  %nop6993 = alloca i1, i1 0
-  %nop6994 = alloca i1, i1 0
-  %nop6995 = alloca i1, i1 0
-  %nop6996 = alloca i1, i1 0
-  %nop6997 = alloca i1, i1 0
-  %nop6998 = alloca i1, i1 0
-  %nop6999 = alloca i1, i1 0
-  %nop7000 = alloca i1, i1 0
-  %nop7001 = alloca i1, i1 0
-  %nop7002 = alloca i1, i1 0
-  %nop7003 = alloca i1, i1 0
-  %nop7004 = alloca i1, i1 0
-  %nop7005 = alloca i1, i1 0
-  %nop7006 = alloca i1, i1 0
-  %nop7007 = alloca i1, i1 0
-  %nop7008 = alloca i1, i1 0
-  %nop7009 = alloca i1, i1 0
-  %nop7010 = alloca i1, i1 0
-  %nop7011 = alloca i1, i1 0
-  %nop7012 = alloca i1, i1 0
-  %nop7013 = alloca i1, i1 0
-  %nop7014 = alloca i1, i1 0
-  %nop7015 = alloca i1, i1 0
-  %nop7016 = alloca i1, i1 0
-  %nop7017 = alloca i1, i1 0
-  %nop7018 = alloca i1, i1 0
-  %nop7019 = alloca i1, i1 0
-  %nop7020 = alloca i1, i1 0
-  %nop7021 = alloca i1, i1 0
-  %nop7022 = alloca i1, i1 0
-  %nop7023 = alloca i1, i1 0
-  %nop7024 = alloca i1, i1 0
-  %nop7025 = alloca i1, i1 0
-  %nop7026 = alloca i1, i1 0
-  %nop7027 = alloca i1, i1 0
-  %nop7028 = alloca i1, i1 0
-  %nop7029 = alloca i1, i1 0
-  %nop7030 = alloca i1, i1 0
-  %nop7031 = alloca i1, i1 0
-  %nop7032 = alloca i1, i1 0
-  %nop7033 = alloca i1, i1 0
-  %nop7034 = alloca i1, i1 0
-  %nop7035 = alloca i1, i1 0
-  %nop7036 = alloca i1, i1 0
-  %nop7037 = alloca i1, i1 0
-  %nop7038 = alloca i1, i1 0
-  %nop7039 = alloca i1, i1 0
-  %nop7040 = alloca i1, i1 0
-  %nop7041 = alloca i1, i1 0
-  %nop7042 = alloca i1, i1 0
-  %nop7043 = alloca i1, i1 0
-  %nop7044 = alloca i1, i1 0
-  %nop7045 = alloca i1, i1 0
-  %nop7046 = alloca i1, i1 0
-  %nop7047 = alloca i1, i1 0
-  %nop7048 = alloca i1, i1 0
-  %nop7049 = alloca i1, i1 0
-  %nop7050 = alloca i1, i1 0
-  %nop7051 = alloca i1, i1 0
-  %nop7052 = alloca i1, i1 0
-  %nop7053 = alloca i1, i1 0
-  %nop7054 = alloca i1, i1 0
-  %nop7055 = alloca i1, i1 0
-  %nop7056 = alloca i1, i1 0
-  %nop7057 = alloca i1, i1 0
-  %nop7058 = alloca i1, i1 0
-  %nop7059 = alloca i1, i1 0
-  %nop7060 = alloca i1, i1 0
-  %nop7061 = alloca i1, i1 0
-  %nop7062 = alloca i1, i1 0
-  %nop7063 = alloca i1, i1 0
-  %nop7064 = alloca i1, i1 0
-  %nop7065 = alloca i1, i1 0
-  %nop7066 = alloca i1, i1 0
-  %nop7067 = alloca i1, i1 0
-  %nop7068 = alloca i1, i1 0
-  %nop7069 = alloca i1, i1 0
-  %nop7070 = alloca i1, i1 0
-  %nop7071 = alloca i1, i1 0
-  %nop7072 = alloca i1, i1 0
-  %nop7073 = alloca i1, i1 0
-  %nop7074 = alloca i1, i1 0
-  %nop7075 = alloca i1, i1 0
-  %nop7076 = alloca i1, i1 0
-  %nop7077 = alloca i1, i1 0
-  %nop7078 = alloca i1, i1 0
-  %nop7079 = alloca i1, i1 0
-  %nop7080 = alloca i1, i1 0
-  %nop7081 = alloca i1, i1 0
-  %nop7082 = alloca i1, i1 0
-  %nop7083 = alloca i1, i1 0
-  %nop7084 = alloca i1, i1 0
-  %nop7085 = alloca i1, i1 0
-  %nop7086 = alloca i1, i1 0
-  %nop7087 = alloca i1, i1 0
-  %nop7088 = alloca i1, i1 0
-  %nop7089 = alloca i1, i1 0
-  %nop7090 = alloca i1, i1 0
-  %nop7091 = alloca i1, i1 0
-  %nop7092 = alloca i1, i1 0
-  %nop7093 = alloca i1, i1 0
-  %nop7094 = alloca i1, i1 0
-  %nop7095 = alloca i1, i1 0
-  %nop7096 = alloca i1, i1 0
-  %nop7097 = alloca i1, i1 0
-  %nop7098 = alloca i1, i1 0
-  %nop7099 = alloca i1, i1 0
-  %nop7100 = alloca i1, i1 0
-  %nop7101 = alloca i1, i1 0
-  %nop7102 = alloca i1, i1 0
-  %nop7103 = alloca i1, i1 0
-  %nop7104 = alloca i1, i1 0
-  %nop7105 = alloca i1, i1 0
-  %nop7106 = alloca i1, i1 0
-  %nop7107 = alloca i1, i1 0
-  %nop7108 = alloca i1, i1 0
-  %nop7109 = alloca i1, i1 0
-  %nop7110 = alloca i1, i1 0
-  %nop7111 = alloca i1, i1 0
-  %nop7112 = alloca i1, i1 0
-  %nop7113 = alloca i1, i1 0
-  %nop7114 = alloca i1, i1 0
-  %nop7115 = alloca i1, i1 0
-  %nop7116 = alloca i1, i1 0
-  %nop7117 = alloca i1, i1 0
-  %nop7118 = alloca i1, i1 0
-  %nop7119 = alloca i1, i1 0
-  %nop7120 = alloca i1, i1 0
-  %nop7121 = alloca i1, i1 0
-  %nop7122 = alloca i1, i1 0
-  %nop7123 = alloca i1, i1 0
-  %nop7124 = alloca i1, i1 0
-  %nop7125 = alloca i1, i1 0
-  %nop7126 = alloca i1, i1 0
-  %nop7127 = alloca i1, i1 0
-  %nop7128 = alloca i1, i1 0
-  %nop7129 = alloca i1, i1 0
-  %nop7130 = alloca i1, i1 0
-  %nop7131 = alloca i1, i1 0
-  %nop7132 = alloca i1, i1 0
-  %nop7133 = alloca i1, i1 0
-  %nop7134 = alloca i1, i1 0
-  %nop7135 = alloca i1, i1 0
-  %nop7136 = alloca i1, i1 0
-  %nop7137 = alloca i1, i1 0
-  %nop7138 = alloca i1, i1 0
-  %nop7139 = alloca i1, i1 0
-  %nop7140 = alloca i1, i1 0
-  %nop7141 = alloca i1, i1 0
-  %nop7142 = alloca i1, i1 0
-  %nop7143 = alloca i1, i1 0
-  %nop7144 = alloca i1, i1 0
-  %nop7145 = alloca i1, i1 0
-  %nop7146 = alloca i1, i1 0
-  %nop7147 = alloca i1, i1 0
-  %nop7148 = alloca i1, i1 0
-  %nop7149 = alloca i1, i1 0
-  %nop7150 = alloca i1, i1 0
-  %nop7151 = alloca i1, i1 0
-  %nop7152 = alloca i1, i1 0
-  %nop7153 = alloca i1, i1 0
-  %nop7154 = alloca i1, i1 0
-  %nop7155 = alloca i1, i1 0
-  %nop7156 = alloca i1, i1 0
-  %nop7157 = alloca i1, i1 0
-  %nop7158 = alloca i1, i1 0
-  %nop7159 = alloca i1, i1 0
-  %nop7160 = alloca i1, i1 0
-  %nop7161 = alloca i1, i1 0
-  %nop7162 = alloca i1, i1 0
-  %nop7163 = alloca i1, i1 0
-  %nop7164 = alloca i1, i1 0
-  %nop7165 = alloca i1, i1 0
-  %nop7166 = alloca i1, i1 0
-  %nop7167 = alloca i1, i1 0
-  %nop7168 = alloca i1, i1 0
-  %nop7169 = alloca i1, i1 0
-  %nop7170 = alloca i1, i1 0
-  %nop7171 = alloca i1, i1 0
-  %nop7172 = alloca i1, i1 0
-  %nop7173 = alloca i1, i1 0
-  %nop7174 = alloca i1, i1 0
-  %nop7175 = alloca i1, i1 0
-  %nop7176 = alloca i1, i1 0
-  %nop7177 = alloca i1, i1 0
-  %nop7178 = alloca i1, i1 0
-  %nop7179 = alloca i1, i1 0
-  %nop7180 = alloca i1, i1 0
-  %nop7181 = alloca i1, i1 0
-  %nop7182 = alloca i1, i1 0
-  %nop7183 = alloca i1, i1 0
-  %nop7184 = alloca i1, i1 0
-  %nop7185 = alloca i1, i1 0
-  %nop7186 = alloca i1, i1 0
-  %nop7187 = alloca i1, i1 0
-  %nop7188 = alloca i1, i1 0
-  %nop7189 = alloca i1, i1 0
-  %nop7190 = alloca i1, i1 0
-  %nop7191 = alloca i1, i1 0
-  %nop7192 = alloca i1, i1 0
-  %nop7193 = alloca i1, i1 0
-  %nop7194 = alloca i1, i1 0
-  %nop7195 = alloca i1, i1 0
-  %nop7196 = alloca i1, i1 0
-  %nop7197 = alloca i1, i1 0
-  %nop7198 = alloca i1, i1 0
-  %nop7199 = alloca i1, i1 0
-  %nop7200 = alloca i1, i1 0
-  %nop7201 = alloca i1, i1 0
-  %nop7202 = alloca i1, i1 0
-  %nop7203 = alloca i1, i1 0
-  %nop7204 = alloca i1, i1 0
-  %nop7205 = alloca i1, i1 0
-  %nop7206 = alloca i1, i1 0
-  %nop7207 = alloca i1, i1 0
-  %nop7208 = alloca i1, i1 0
-  %nop7209 = alloca i1, i1 0
-  %nop7210 = alloca i1, i1 0
-  %nop7211 = alloca i1, i1 0
-  %nop7212 = alloca i1, i1 0
-  %nop7213 = alloca i1, i1 0
-  %nop7214 = alloca i1, i1 0
-  %nop7215 = alloca i1, i1 0
-  %nop7216 = alloca i1, i1 0
-  %nop7217 = alloca i1, i1 0
-  %nop7218 = alloca i1, i1 0
-  %nop7219 = alloca i1, i1 0
-  %nop7220 = alloca i1, i1 0
-  %nop7221 = alloca i1, i1 0
-  %nop7222 = alloca i1, i1 0
-  %nop7223 = alloca i1, i1 0
-  %nop7224 = alloca i1, i1 0
-  %nop7225 = alloca i1, i1 0
-  %nop7226 = alloca i1, i1 0
-  %nop7227 = alloca i1, i1 0
-  %nop7228 = alloca i1, i1 0
-  %nop7229 = alloca i1, i1 0
-  %nop7230 = alloca i1, i1 0
-  %nop7231 = alloca i1, i1 0
-  %nop7232 = alloca i1, i1 0
-  %nop7233 = alloca i1, i1 0
-  %nop7234 = alloca i1, i1 0
-  %nop7235 = alloca i1, i1 0
-  %nop7236 = alloca i1, i1 0
-  %nop7237 = alloca i1, i1 0
-  %nop7238 = alloca i1, i1 0
-  %nop7239 = alloca i1, i1 0
-  %nop7240 = alloca i1, i1 0
-  %nop7241 = alloca i1, i1 0
-  %nop7242 = alloca i1, i1 0
-  %nop7243 = alloca i1, i1 0
-  %nop7244 = alloca i1, i1 0
-  %nop7245 = alloca i1, i1 0
-  %nop7246 = alloca i1, i1 0
-  %nop7247 = alloca i1, i1 0
-  %nop7248 = alloca i1, i1 0
-  %nop7249 = alloca i1, i1 0
-  %nop7250 = alloca i1, i1 0
-  %nop7251 = alloca i1, i1 0
-  %nop7252 = alloca i1, i1 0
-  %nop7253 = alloca i1, i1 0
-  %nop7254 = alloca i1, i1 0
-  %nop7255 = alloca i1, i1 0
-  %nop7256 = alloca i1, i1 0
-  %nop7257 = alloca i1, i1 0
-  %nop7258 = alloca i1, i1 0
-  %nop7259 = alloca i1, i1 0
-  %nop7260 = alloca i1, i1 0
-  %nop7261 = alloca i1, i1 0
-  %nop7262 = alloca i1, i1 0
-  %nop7263 = alloca i1, i1 0
-  %nop7264 = alloca i1, i1 0
-  %nop7265 = alloca i1, i1 0
-  %nop7266 = alloca i1, i1 0
-  %nop7267 = alloca i1, i1 0
-  %nop7268 = alloca i1, i1 0
-  %nop7269 = alloca i1, i1 0
-  %nop7270 = alloca i1, i1 0
-  %nop7271 = alloca i1, i1 0
-  %nop7272 = alloca i1, i1 0
-  %nop7273 = alloca i1, i1 0
-  %nop7274 = alloca i1, i1 0
-  %nop7275 = alloca i1, i1 0
-  %nop7276 = alloca i1, i1 0
-  %nop7277 = alloca i1, i1 0
-  %nop7278 = alloca i1, i1 0
-  %nop7279 = alloca i1, i1 0
-  %nop7280 = alloca i1, i1 0
-  %nop7281 = alloca i1, i1 0
-  %nop7282 = alloca i1, i1 0
-  %nop7283 = alloca i1, i1 0
-  %nop7284 = alloca i1, i1 0
-  %nop7285 = alloca i1, i1 0
-  %nop7286 = alloca i1, i1 0
-  %nop7287 = alloca i1, i1 0
-  %nop7288 = alloca i1, i1 0
-  %nop7289 = alloca i1, i1 0
-  %nop7290 = alloca i1, i1 0
-  %nop7291 = alloca i1, i1 0
-  %nop7292 = alloca i1, i1 0
-  %nop7293 = alloca i1, i1 0
-  %nop7294 = alloca i1, i1 0
-  %nop7295 = alloca i1, i1 0
-  %nop7296 = alloca i1, i1 0
-  %nop7297 = alloca i1, i1 0
-  %nop7298 = alloca i1, i1 0
-  %nop7299 = alloca i1, i1 0
-  %nop7300 = alloca i1, i1 0
-  %nop7301 = alloca i1, i1 0
-  %nop7302 = alloca i1, i1 0
-  %nop7303 = alloca i1, i1 0
-  %nop7304 = alloca i1, i1 0
-  %nop7305 = alloca i1, i1 0
-  %nop7306 = alloca i1, i1 0
-  %nop7307 = alloca i1, i1 0
-  %nop7308 = alloca i1, i1 0
-  %nop7309 = alloca i1, i1 0
-  %nop7310 = alloca i1, i1 0
-  %nop7311 = alloca i1, i1 0
-  %nop7312 = alloca i1, i1 0
-  %nop7313 = alloca i1, i1 0
-  %nop7314 = alloca i1, i1 0
-  %nop7315 = alloca i1, i1 0
-  %nop7316 = alloca i1, i1 0
-  %nop7317 = alloca i1, i1 0
-  %nop7318 = alloca i1, i1 0
-  %nop7319 = alloca i1, i1 0
-  %nop7320 = alloca i1, i1 0
-  %nop7321 = alloca i1, i1 0
-  %nop7322 = alloca i1, i1 0
-  %nop7323 = alloca i1, i1 0
-  %nop7324 = alloca i1, i1 0
-  %nop7325 = alloca i1, i1 0
-  %nop7326 = alloca i1, i1 0
-  %nop7327 = alloca i1, i1 0
-  %nop7328 = alloca i1, i1 0
-  %nop7329 = alloca i1, i1 0
-  %nop7330 = alloca i1, i1 0
-  %nop7331 = alloca i1, i1 0
-  %nop7332 = alloca i1, i1 0
-  %nop7333 = alloca i1, i1 0
-  %nop7334 = alloca i1, i1 0
-  %nop7335 = alloca i1, i1 0
-  %nop7336 = alloca i1, i1 0
-  %nop7337 = alloca i1, i1 0
-  %nop7338 = alloca i1, i1 0
-  %nop7339 = alloca i1, i1 0
-  %nop7340 = alloca i1, i1 0
-  %nop7341 = alloca i1, i1 0
-  %nop7342 = alloca i1, i1 0
-  %nop7343 = alloca i1, i1 0
-  %nop7344 = alloca i1, i1 0
-  %nop7345 = alloca i1, i1 0
-  %nop7346 = alloca i1, i1 0
-  %nop7347 = alloca i1, i1 0
-  %nop7348 = alloca i1, i1 0
-  %nop7349 = alloca i1, i1 0
-  %nop7350 = alloca i1, i1 0
-  %nop7351 = alloca i1, i1 0
-  %nop7352 = alloca i1, i1 0
-  %nop7353 = alloca i1, i1 0
-  %nop7354 = alloca i1, i1 0
-  %nop7355 = alloca i1, i1 0
-  %nop7356 = alloca i1, i1 0
-  %nop7357 = alloca i1, i1 0
-  %nop7358 = alloca i1, i1 0
-  %nop7359 = alloca i1, i1 0
-  %nop7360 = alloca i1, i1 0
-  %nop7361 = alloca i1, i1 0
-  %nop7362 = alloca i1, i1 0
-  %nop7363 = alloca i1, i1 0
-  %nop7364 = alloca i1, i1 0
-  %nop7365 = alloca i1, i1 0
-  %nop7366 = alloca i1, i1 0
-  %nop7367 = alloca i1, i1 0
-  %nop7368 = alloca i1, i1 0
-  %nop7369 = alloca i1, i1 0
-  %nop7370 = alloca i1, i1 0
-  %nop7371 = alloca i1, i1 0
-  %nop7372 = alloca i1, i1 0
-  %nop7373 = alloca i1, i1 0
-  %nop7374 = alloca i1, i1 0
-  %nop7375 = alloca i1, i1 0
-  %nop7376 = alloca i1, i1 0
-  %nop7377 = alloca i1, i1 0
-  %nop7378 = alloca i1, i1 0
-  %nop7379 = alloca i1, i1 0
-  %nop7380 = alloca i1, i1 0
-  %nop7381 = alloca i1, i1 0
-  %nop7382 = alloca i1, i1 0
-  %nop7383 = alloca i1, i1 0
-  %nop7384 = alloca i1, i1 0
-  %nop7385 = alloca i1, i1 0
-  %nop7386 = alloca i1, i1 0
-  %nop7387 = alloca i1, i1 0
-  %nop7388 = alloca i1, i1 0
-  %nop7389 = alloca i1, i1 0
-  %nop7390 = alloca i1, i1 0
-  %nop7391 = alloca i1, i1 0
-  %nop7392 = alloca i1, i1 0
-  %nop7393 = alloca i1, i1 0
-  %nop7394 = alloca i1, i1 0
-  %nop7395 = alloca i1, i1 0
-  %nop7396 = alloca i1, i1 0
-  %nop7397 = alloca i1, i1 0
-  %nop7398 = alloca i1, i1 0
-  %nop7399 = alloca i1, i1 0
-  %nop7400 = alloca i1, i1 0
-  %nop7401 = alloca i1, i1 0
-  %nop7402 = alloca i1, i1 0
-  %nop7403 = alloca i1, i1 0
-  %nop7404 = alloca i1, i1 0
-  %nop7405 = alloca i1, i1 0
-  %nop7406 = alloca i1, i1 0
-  %nop7407 = alloca i1, i1 0
-  %nop7408 = alloca i1, i1 0
-  %nop7409 = alloca i1, i1 0
-  %nop7410 = alloca i1, i1 0
-  %nop7411 = alloca i1, i1 0
-  %nop7412 = alloca i1, i1 0
-  %nop7413 = alloca i1, i1 0
-  %nop7414 = alloca i1, i1 0
-  %nop7415 = alloca i1, i1 0
-  %nop7416 = alloca i1, i1 0
-  %nop7417 = alloca i1, i1 0
-  %nop7418 = alloca i1, i1 0
-  %nop7419 = alloca i1, i1 0
-  %nop7420 = alloca i1, i1 0
-  %nop7421 = alloca i1, i1 0
-  %nop7422 = alloca i1, i1 0
-  %nop7423 = alloca i1, i1 0
-  %nop7424 = alloca i1, i1 0
-  %nop7425 = alloca i1, i1 0
-  %nop7426 = alloca i1, i1 0
-  %nop7427 = alloca i1, i1 0
-  %nop7428 = alloca i1, i1 0
-  %nop7429 = alloca i1, i1 0
-  %nop7430 = alloca i1, i1 0
-  %nop7431 = alloca i1, i1 0
-  %nop7432 = alloca i1, i1 0
-  %nop7433 = alloca i1, i1 0
-  %nop7434 = alloca i1, i1 0
-  %nop7435 = alloca i1, i1 0
-  %nop7436 = alloca i1, i1 0
-  %nop7437 = alloca i1, i1 0
-  %nop7438 = alloca i1, i1 0
-  %nop7439 = alloca i1, i1 0
-  %nop7440 = alloca i1, i1 0
-  %nop7441 = alloca i1, i1 0
-  %nop7442 = alloca i1, i1 0
-  %nop7443 = alloca i1, i1 0
-  %nop7444 = alloca i1, i1 0
-  %nop7445 = alloca i1, i1 0
-  %nop7446 = alloca i1, i1 0
-  %nop7447 = alloca i1, i1 0
-  %nop7448 = alloca i1, i1 0
-  %nop7449 = alloca i1, i1 0
-  %nop7450 = alloca i1, i1 0
-  %nop7451 = alloca i1, i1 0
-  %nop7452 = alloca i1, i1 0
-  %nop7453 = alloca i1, i1 0
-  %nop7454 = alloca i1, i1 0
-  %nop7455 = alloca i1, i1 0
-  %nop7456 = alloca i1, i1 0
-  %nop7457 = alloca i1, i1 0
-  %nop7458 = alloca i1, i1 0
-  %nop7459 = alloca i1, i1 0
-  %nop7460 = alloca i1, i1 0
-  %nop7461 = alloca i1, i1 0
-  %nop7462 = alloca i1, i1 0
-  %nop7463 = alloca i1, i1 0
-  %nop7464 = alloca i1, i1 0
-  %nop7465 = alloca i1, i1 0
-  %nop7466 = alloca i1, i1 0
-  %nop7467 = alloca i1, i1 0
-  %nop7468 = alloca i1, i1 0
-  %nop7469 = alloca i1, i1 0
-  %nop7470 = alloca i1, i1 0
-  %nop7471 = alloca i1, i1 0
-  %nop7472 = alloca i1, i1 0
-  %nop7473 = alloca i1, i1 0
-  %nop7474 = alloca i1, i1 0
-  %nop7475 = alloca i1, i1 0
-  %nop7476 = alloca i1, i1 0
-  %nop7477 = alloca i1, i1 0
-  %nop7478 = alloca i1, i1 0
-  %nop7479 = alloca i1, i1 0
-  %nop7480 = alloca i1, i1 0
-  %nop7481 = alloca i1, i1 0
-  %nop7482 = alloca i1, i1 0
-  %nop7483 = alloca i1, i1 0
-  %nop7484 = alloca i1, i1 0
-  %nop7485 = alloca i1, i1 0
-  %nop7486 = alloca i1, i1 0
-  %nop7487 = alloca i1, i1 0
-  %nop7488 = alloca i1, i1 0
-  %nop7489 = alloca i1, i1 0
-  %nop7490 = alloca i1, i1 0
-  %nop7491 = alloca i1, i1 0
-  %nop7492 = alloca i1, i1 0
-  %nop7493 = alloca i1, i1 0
-  %nop7494 = alloca i1, i1 0
-  %nop7495 = alloca i1, i1 0
-  %nop7496 = alloca i1, i1 0
-  %nop7497 = alloca i1, i1 0
-  %nop7498 = alloca i1, i1 0
-  %nop7499 = alloca i1, i1 0
-  %nop7500 = alloca i1, i1 0
-  %nop7501 = alloca i1, i1 0
-  %nop7502 = alloca i1, i1 0
-  %nop7503 = alloca i1, i1 0
-  %nop7504 = alloca i1, i1 0
-  %nop7505 = alloca i1, i1 0
-  %nop7506 = alloca i1, i1 0
-  %nop7507 = alloca i1, i1 0
-  %nop7508 = alloca i1, i1 0
-  %nop7509 = alloca i1, i1 0
-  %nop7510 = alloca i1, i1 0
-  %nop7511 = alloca i1, i1 0
-  %nop7512 = alloca i1, i1 0
-  %nop7513 = alloca i1, i1 0
-  %nop7514 = alloca i1, i1 0
-  %nop7515 = alloca i1, i1 0
-  %nop7516 = alloca i1, i1 0
-  %nop7517 = alloca i1, i1 0
-  %nop7518 = alloca i1, i1 0
-  %nop7519 = alloca i1, i1 0
-  %nop7520 = alloca i1, i1 0
-  %nop7521 = alloca i1, i1 0
-  %nop7522 = alloca i1, i1 0
-  %nop7523 = alloca i1, i1 0
-  %nop7524 = alloca i1, i1 0
-  %nop7525 = alloca i1, i1 0
-  %nop7526 = alloca i1, i1 0
-  %nop7527 = alloca i1, i1 0
-  %nop7528 = alloca i1, i1 0
-  %nop7529 = alloca i1, i1 0
-  %nop7530 = alloca i1, i1 0
-  %nop7531 = alloca i1, i1 0
-  %nop7532 = alloca i1, i1 0
-  %nop7533 = alloca i1, i1 0
-  %nop7534 = alloca i1, i1 0
-  %nop7535 = alloca i1, i1 0
-  %nop7536 = alloca i1, i1 0
-  %nop7537 = alloca i1, i1 0
-  %nop7538 = alloca i1, i1 0
-  %nop7539 = alloca i1, i1 0
-  %nop7540 = alloca i1, i1 0
-  %nop7541 = alloca i1, i1 0
-  %nop7542 = alloca i1, i1 0
-  %nop7543 = alloca i1, i1 0
-  %nop7544 = alloca i1, i1 0
-  %nop7545 = alloca i1, i1 0
-  %nop7546 = alloca i1, i1 0
-  %nop7547 = alloca i1, i1 0
-  %nop7548 = alloca i1, i1 0
-  %nop7549 = alloca i1, i1 0
-  %nop7550 = alloca i1, i1 0
-  %nop7551 = alloca i1, i1 0
-  %nop7552 = alloca i1, i1 0
-  %nop7553 = alloca i1, i1 0
-  %nop7554 = alloca i1, i1 0
-  %nop7555 = alloca i1, i1 0
-  %nop7556 = alloca i1, i1 0
-  %nop7557 = alloca i1, i1 0
-  %nop7558 = alloca i1, i1 0
-  %nop7559 = alloca i1, i1 0
-  %nop7560 = alloca i1, i1 0
-  %nop7561 = alloca i1, i1 0
-  %nop7562 = alloca i1, i1 0
-  %nop7563 = alloca i1, i1 0
-  %nop7564 = alloca i1, i1 0
-  %nop7565 = alloca i1, i1 0
-  %nop7566 = alloca i1, i1 0
-  %nop7567 = alloca i1, i1 0
-  %nop7568 = alloca i1, i1 0
-  %nop7569 = alloca i1, i1 0
-  %nop7570 = alloca i1, i1 0
-  %nop7571 = alloca i1, i1 0
-  %nop7572 = alloca i1, i1 0
-  %nop7573 = alloca i1, i1 0
-  %nop7574 = alloca i1, i1 0
-  %nop7575 = alloca i1, i1 0
-  %nop7576 = alloca i1, i1 0
-  %nop7577 = alloca i1, i1 0
-  %nop7578 = alloca i1, i1 0
-  %nop7579 = alloca i1, i1 0
-  %nop7580 = alloca i1, i1 0
-  %nop7581 = alloca i1, i1 0
-  %nop7582 = alloca i1, i1 0
-  %nop7583 = alloca i1, i1 0
-  %nop7584 = alloca i1, i1 0
-  %nop7585 = alloca i1, i1 0
-  %nop7586 = alloca i1, i1 0
-  %nop7587 = alloca i1, i1 0
-  %nop7588 = alloca i1, i1 0
-  %nop7589 = alloca i1, i1 0
-  %nop7590 = alloca i1, i1 0
-  %nop7591 = alloca i1, i1 0
-  %nop7592 = alloca i1, i1 0
-  %nop7593 = alloca i1, i1 0
-  %nop7594 = alloca i1, i1 0
-  %nop7595 = alloca i1, i1 0
-  %nop7596 = alloca i1, i1 0
-  %nop7597 = alloca i1, i1 0
-  %nop7598 = alloca i1, i1 0
-  %nop7599 = alloca i1, i1 0
-  %nop7600 = alloca i1, i1 0
-  %nop7601 = alloca i1, i1 0
-  %nop7602 = alloca i1, i1 0
-  %nop7603 = alloca i1, i1 0
-  %nop7604 = alloca i1, i1 0
-  %nop7605 = alloca i1, i1 0
-  %nop7606 = alloca i1, i1 0
-  %nop7607 = alloca i1, i1 0
-  %nop7608 = alloca i1, i1 0
-  %nop7609 = alloca i1, i1 0
-  %nop7610 = alloca i1, i1 0
-  %nop7611 = alloca i1, i1 0
-  %nop7612 = alloca i1, i1 0
-  %nop7613 = alloca i1, i1 0
-  %nop7614 = alloca i1, i1 0
-  %nop7615 = alloca i1, i1 0
-  %nop7616 = alloca i1, i1 0
-  %nop7617 = alloca i1, i1 0
-  %nop7618 = alloca i1, i1 0
-  %nop7619 = alloca i1, i1 0
-  %nop7620 = alloca i1, i1 0
-  %nop7621 = alloca i1, i1 0
-  %nop7622 = alloca i1, i1 0
-  %nop7623 = alloca i1, i1 0
-  %nop7624 = alloca i1, i1 0
-  %nop7625 = alloca i1, i1 0
-  %nop7626 = alloca i1, i1 0
-  %nop7627 = alloca i1, i1 0
-  %nop7628 = alloca i1, i1 0
-  %nop7629 = alloca i1, i1 0
-  %nop7630 = alloca i1, i1 0
-  %nop7631 = alloca i1, i1 0
-  %nop7632 = alloca i1, i1 0
-  %nop7633 = alloca i1, i1 0
-  %nop7634 = alloca i1, i1 0
-  %nop7635 = alloca i1, i1 0
-  %nop7636 = alloca i1, i1 0
-  %nop7637 = alloca i1, i1 0
-  %nop7638 = alloca i1, i1 0
-  %nop7639 = alloca i1, i1 0
-  %nop7640 = alloca i1, i1 0
-  %nop7641 = alloca i1, i1 0
-  %nop7642 = alloca i1, i1 0
-  %nop7643 = alloca i1, i1 0
-  %nop7644 = alloca i1, i1 0
-  %nop7645 = alloca i1, i1 0
-  %nop7646 = alloca i1, i1 0
-  %nop7647 = alloca i1, i1 0
-  %nop7648 = alloca i1, i1 0
-  %nop7649 = alloca i1, i1 0
-  %nop7650 = alloca i1, i1 0
-  %nop7651 = alloca i1, i1 0
-  %nop7652 = alloca i1, i1 0
-  %nop7653 = alloca i1, i1 0
-  %nop7654 = alloca i1, i1 0
-  %nop7655 = alloca i1, i1 0
-  %nop7656 = alloca i1, i1 0
-  %nop7657 = alloca i1, i1 0
-  %nop7658 = alloca i1, i1 0
-  %nop7659 = alloca i1, i1 0
-  %nop7660 = alloca i1, i1 0
-  %nop7661 = alloca i1, i1 0
-  %nop7662 = alloca i1, i1 0
-  %nop7663 = alloca i1, i1 0
-  %nop7664 = alloca i1, i1 0
-  %nop7665 = alloca i1, i1 0
-  %nop7666 = alloca i1, i1 0
-  %nop7667 = alloca i1, i1 0
-  %nop7668 = alloca i1, i1 0
-  %nop7669 = alloca i1, i1 0
-  %nop7670 = alloca i1, i1 0
-  %nop7671 = alloca i1, i1 0
-  %nop7672 = alloca i1, i1 0
-  %nop7673 = alloca i1, i1 0
-  %nop7674 = alloca i1, i1 0
-  %nop7675 = alloca i1, i1 0
-  %nop7676 = alloca i1, i1 0
-  %nop7677 = alloca i1, i1 0
-  %nop7678 = alloca i1, i1 0
-  %nop7679 = alloca i1, i1 0
-  %nop7680 = alloca i1, i1 0
-  %nop7681 = alloca i1, i1 0
-  %nop7682 = alloca i1, i1 0
-  %nop7683 = alloca i1, i1 0
-  %nop7684 = alloca i1, i1 0
-  %nop7685 = alloca i1, i1 0
-  %nop7686 = alloca i1, i1 0
-  %nop7687 = alloca i1, i1 0
-  %nop7688 = alloca i1, i1 0
-  %nop7689 = alloca i1, i1 0
-  %nop7690 = alloca i1, i1 0
-  %nop7691 = alloca i1, i1 0
-  %nop7692 = alloca i1, i1 0
-  %nop7693 = alloca i1, i1 0
-  %nop7694 = alloca i1, i1 0
-  %nop7695 = alloca i1, i1 0
-  %nop7696 = alloca i1, i1 0
-  %nop7697 = alloca i1, i1 0
-  %nop7698 = alloca i1, i1 0
-  %nop7699 = alloca i1, i1 0
-  %nop7700 = alloca i1, i1 0
-  %nop7701 = alloca i1, i1 0
-  %nop7702 = alloca i1, i1 0
-  %nop7703 = alloca i1, i1 0
-  %nop7704 = alloca i1, i1 0
-  %nop7705 = alloca i1, i1 0
-  %nop7706 = alloca i1, i1 0
-  %nop7707 = alloca i1, i1 0
-  %nop7708 = alloca i1, i1 0
-  %nop7709 = alloca i1, i1 0
-  %nop7710 = alloca i1, i1 0
-  %nop7711 = alloca i1, i1 0
-  %nop7712 = alloca i1, i1 0
-  %nop7713 = alloca i1, i1 0
-  %nop7714 = alloca i1, i1 0
-  %nop7715 = alloca i1, i1 0
-  %nop7716 = alloca i1, i1 0
-  %nop7717 = alloca i1, i1 0
-  %nop7718 = alloca i1, i1 0
-  %nop7719 = alloca i1, i1 0
-  %nop7720 = alloca i1, i1 0
-  %nop7721 = alloca i1, i1 0
-  %nop7722 = alloca i1, i1 0
-  %nop7723 = alloca i1, i1 0
-  %nop7724 = alloca i1, i1 0
-  %nop7725 = alloca i1, i1 0
-  %nop7726 = alloca i1, i1 0
-  %nop7727 = alloca i1, i1 0
-  %nop7728 = alloca i1, i1 0
-  %nop7729 = alloca i1, i1 0
-  %nop7730 = alloca i1, i1 0
-  %nop7731 = alloca i1, i1 0
-  %nop7732 = alloca i1, i1 0
-  %nop7733 = alloca i1, i1 0
-  %nop7734 = alloca i1, i1 0
-  %nop7735 = alloca i1, i1 0
-  %nop7736 = alloca i1, i1 0
-  %nop7737 = alloca i1, i1 0
-  %nop7738 = alloca i1, i1 0
-  %nop7739 = alloca i1, i1 0
-  %nop7740 = alloca i1, i1 0
-  %nop7741 = alloca i1, i1 0
-  %nop7742 = alloca i1, i1 0
-  %nop7743 = alloca i1, i1 0
-  %nop7744 = alloca i1, i1 0
-  %nop7745 = alloca i1, i1 0
-  %nop7746 = alloca i1, i1 0
-  %nop7747 = alloca i1, i1 0
-  %nop7748 = alloca i1, i1 0
-  %nop7749 = alloca i1, i1 0
-  %nop7750 = alloca i1, i1 0
-  %nop7751 = alloca i1, i1 0
-  %nop7752 = alloca i1, i1 0
-  %nop7753 = alloca i1, i1 0
-  %nop7754 = alloca i1, i1 0
-  %nop7755 = alloca i1, i1 0
-  %nop7756 = alloca i1, i1 0
-  %nop7757 = alloca i1, i1 0
-  %nop7758 = alloca i1, i1 0
-  %nop7759 = alloca i1, i1 0
-  %nop7760 = alloca i1, i1 0
-  %nop7761 = alloca i1, i1 0
-  %nop7762 = alloca i1, i1 0
-  %nop7763 = alloca i1, i1 0
-  %nop7764 = alloca i1, i1 0
-  %nop7765 = alloca i1, i1 0
-  %nop7766 = alloca i1, i1 0
-  %nop7767 = alloca i1, i1 0
-  %nop7768 = alloca i1, i1 0
-  %nop7769 = alloca i1, i1 0
-  %nop7770 = alloca i1, i1 0
-  %nop7771 = alloca i1, i1 0
-  %nop7772 = alloca i1, i1 0
-  %nop7773 = alloca i1, i1 0
-  %nop7774 = alloca i1, i1 0
-  %nop7775 = alloca i1, i1 0
-  %nop7776 = alloca i1, i1 0
-  %nop7777 = alloca i1, i1 0
-  %nop7778 = alloca i1, i1 0
-  %nop7779 = alloca i1, i1 0
-  %nop7780 = alloca i1, i1 0
-  %nop7781 = alloca i1, i1 0
-  %nop7782 = alloca i1, i1 0
-  %nop7783 = alloca i1, i1 0
-  %nop7784 = alloca i1, i1 0
-  %nop7785 = alloca i1, i1 0
-  %nop7786 = alloca i1, i1 0
-  %nop7787 = alloca i1, i1 0
-  %nop7788 = alloca i1, i1 0
-  %nop7789 = alloca i1, i1 0
-  %nop7790 = alloca i1, i1 0
-  %nop7791 = alloca i1, i1 0
-  %nop7792 = alloca i1, i1 0
-  %nop7793 = alloca i1, i1 0
-  %nop7794 = alloca i1, i1 0
-  %nop7795 = alloca i1, i1 0
-  %nop7796 = alloca i1, i1 0
-  %nop7797 = alloca i1, i1 0
-  %nop7798 = alloca i1, i1 0
-  %nop7799 = alloca i1, i1 0
-  %nop7800 = alloca i1, i1 0
-  %nop7801 = alloca i1, i1 0
-  %nop7802 = alloca i1, i1 0
-  %nop7803 = alloca i1, i1 0
-  %nop7804 = alloca i1, i1 0
-  %nop7805 = alloca i1, i1 0
-  %nop7806 = alloca i1, i1 0
-  %nop7807 = alloca i1, i1 0
-  %nop7808 = alloca i1, i1 0
-  %nop7809 = alloca i1, i1 0
-  %nop7810 = alloca i1, i1 0
-  %nop7811 = alloca i1, i1 0
-  %nop7812 = alloca i1, i1 0
-  %nop7813 = alloca i1, i1 0
-  %nop7814 = alloca i1, i1 0
-  %nop7815 = alloca i1, i1 0
-  %nop7816 = alloca i1, i1 0
-  %nop7817 = alloca i1, i1 0
-  %nop7818 = alloca i1, i1 0
-  %nop7819 = alloca i1, i1 0
-  %nop7820 = alloca i1, i1 0
-  %nop7821 = alloca i1, i1 0
-  %nop7822 = alloca i1, i1 0
-  %nop7823 = alloca i1, i1 0
-  %nop7824 = alloca i1, i1 0
-  %nop7825 = alloca i1, i1 0
-  %nop7826 = alloca i1, i1 0
-  %nop7827 = alloca i1, i1 0
-  %nop7828 = alloca i1, i1 0
-  %nop7829 = alloca i1, i1 0
-  %nop7830 = alloca i1, i1 0
-  %nop7831 = alloca i1, i1 0
-  %nop7832 = alloca i1, i1 0
-  %nop7833 = alloca i1, i1 0
-  %nop7834 = alloca i1, i1 0
-  %nop7835 = alloca i1, i1 0
-  %nop7836 = alloca i1, i1 0
-  %nop7837 = alloca i1, i1 0
-  %nop7838 = alloca i1, i1 0
-  %nop7839 = alloca i1, i1 0
-  %nop7840 = alloca i1, i1 0
-  %nop7841 = alloca i1, i1 0
-  %nop7842 = alloca i1, i1 0
-  %nop7843 = alloca i1, i1 0
-  %nop7844 = alloca i1, i1 0
-  %nop7845 = alloca i1, i1 0
-  %nop7846 = alloca i1, i1 0
-  %nop7847 = alloca i1, i1 0
-  %nop7848 = alloca i1, i1 0
-  %nop7849 = alloca i1, i1 0
-  %nop7850 = alloca i1, i1 0
-  %nop7851 = alloca i1, i1 0
-  %nop7852 = alloca i1, i1 0
-  %nop7853 = alloca i1, i1 0
-  %nop7854 = alloca i1, i1 0
-  %nop7855 = alloca i1, i1 0
-  %nop7856 = alloca i1, i1 0
-  %nop7857 = alloca i1, i1 0
-  %nop7858 = alloca i1, i1 0
-  %nop7859 = alloca i1, i1 0
-  %nop7860 = alloca i1, i1 0
-  %nop7861 = alloca i1, i1 0
-  %nop7862 = alloca i1, i1 0
-  %nop7863 = alloca i1, i1 0
-  %nop7864 = alloca i1, i1 0
-  %nop7865 = alloca i1, i1 0
-  %nop7866 = alloca i1, i1 0
-  %nop7867 = alloca i1, i1 0
-  %nop7868 = alloca i1, i1 0
-  %nop7869 = alloca i1, i1 0
-  %nop7870 = alloca i1, i1 0
-  %nop7871 = alloca i1, i1 0
-  %nop7872 = alloca i1, i1 0
-  %nop7873 = alloca i1, i1 0
-  %nop7874 = alloca i1, i1 0
-  %nop7875 = alloca i1, i1 0
-  %nop7876 = alloca i1, i1 0
-  %nop7877 = alloca i1, i1 0
-  %nop7878 = alloca i1, i1 0
-  %nop7879 = alloca i1, i1 0
-  %nop7880 = alloca i1, i1 0
-  %nop7881 = alloca i1, i1 0
-  %nop7882 = alloca i1, i1 0
-  %nop7883 = alloca i1, i1 0
-  %nop7884 = alloca i1, i1 0
-  %nop7885 = alloca i1, i1 0
-  %nop7886 = alloca i1, i1 0
-  %nop7887 = alloca i1, i1 0
-  %nop7888 = alloca i1, i1 0
-  %nop7889 = alloca i1, i1 0
-  %nop7890 = alloca i1, i1 0
-  %nop7891 = alloca i1, i1 0
-  %nop7892 = alloca i1, i1 0
-  %nop7893 = alloca i1, i1 0
-  %nop7894 = alloca i1, i1 0
-  %nop7895 = alloca i1, i1 0
-  %nop7896 = alloca i1, i1 0
-  %nop7897 = alloca i1, i1 0
-  %nop7898 = alloca i1, i1 0
-  %nop7899 = alloca i1, i1 0
-  %nop7900 = alloca i1, i1 0
-  %nop7901 = alloca i1, i1 0
-  %nop7902 = alloca i1, i1 0
-  %nop7903 = alloca i1, i1 0
-  %nop7904 = alloca i1, i1 0
-  %nop7905 = alloca i1, i1 0
-  %nop7906 = alloca i1, i1 0
-  %nop7907 = alloca i1, i1 0
-  %nop7908 = alloca i1, i1 0
-  %nop7909 = alloca i1, i1 0
-  %nop7910 = alloca i1, i1 0
-  %nop7911 = alloca i1, i1 0
-  %nop7912 = alloca i1, i1 0
-  %nop7913 = alloca i1, i1 0
-  %nop7914 = alloca i1, i1 0
-  %nop7915 = alloca i1, i1 0
-  %nop7916 = alloca i1, i1 0
-  %nop7917 = alloca i1, i1 0
-  %nop7918 = alloca i1, i1 0
-  %nop7919 = alloca i1, i1 0
-  %nop7920 = alloca i1, i1 0
-  %nop7921 = alloca i1, i1 0
-  %nop7922 = alloca i1, i1 0
-  %nop7923 = alloca i1, i1 0
-  %nop7924 = alloca i1, i1 0
-  %nop7925 = alloca i1, i1 0
-  %nop7926 = alloca i1, i1 0
-  %nop7927 = alloca i1, i1 0
-  %nop7928 = alloca i1, i1 0
-  %nop7929 = alloca i1, i1 0
-  %nop7930 = alloca i1, i1 0
-  %nop7931 = alloca i1, i1 0
-  %nop7932 = alloca i1, i1 0
-  %nop7933 = alloca i1, i1 0
-  %nop7934 = alloca i1, i1 0
-  %nop7935 = alloca i1, i1 0
-  %nop7936 = alloca i1, i1 0
-  %nop7937 = alloca i1, i1 0
-  %nop7938 = alloca i1, i1 0
-  %nop7939 = alloca i1, i1 0
-  %nop7940 = alloca i1, i1 0
-  %nop7941 = alloca i1, i1 0
-  %nop7942 = alloca i1, i1 0
-  %nop7943 = alloca i1, i1 0
-  %nop7944 = alloca i1, i1 0
-  %nop7945 = alloca i1, i1 0
-  %nop7946 = alloca i1, i1 0
-  %nop7947 = alloca i1, i1 0
-  %nop7948 = alloca i1, i1 0
-  %nop7949 = alloca i1, i1 0
-  %nop7950 = alloca i1, i1 0
-  %nop7951 = alloca i1, i1 0
-  %nop7952 = alloca i1, i1 0
-  %nop7953 = alloca i1, i1 0
-  %nop7954 = alloca i1, i1 0
-  %nop7955 = alloca i1, i1 0
-  %nop7956 = alloca i1, i1 0
-  %nop7957 = alloca i1, i1 0
-  %nop7958 = alloca i1, i1 0
-  %nop7959 = alloca i1, i1 0
-  %nop7960 = alloca i1, i1 0
-  %nop7961 = alloca i1, i1 0
-  %nop7962 = alloca i1, i1 0
-  %nop7963 = alloca i1, i1 0
-  %nop7964 = alloca i1, i1 0
-  %nop7965 = alloca i1, i1 0
-  %nop7966 = alloca i1, i1 0
-  %nop7967 = alloca i1, i1 0
-  %nop7968 = alloca i1, i1 0
-  %nop7969 = alloca i1, i1 0
-  %nop7970 = alloca i1, i1 0
-  %nop7971 = alloca i1, i1 0
-  %nop7972 = alloca i1, i1 0
-  %nop7973 = alloca i1, i1 0
-  %nop7974 = alloca i1, i1 0
-  %nop7975 = alloca i1, i1 0
-  %nop7976 = alloca i1, i1 0
-  %nop7977 = alloca i1, i1 0
-  %nop7978 = alloca i1, i1 0
-  %nop7979 = alloca i1, i1 0
-  %nop7980 = alloca i1, i1 0
-  %nop7981 = alloca i1, i1 0
-  %nop7982 = alloca i1, i1 0
-  %nop7983 = alloca i1, i1 0
-  %nop7984 = alloca i1, i1 0
-  %nop7985 = alloca i1, i1 0
-  %nop7986 = alloca i1, i1 0
-  %nop7987 = alloca i1, i1 0
-  %nop7988 = alloca i1, i1 0
-  %nop7989 = alloca i1, i1 0
-  %nop7990 = alloca i1, i1 0
-  %nop7991 = alloca i1, i1 0
-  %nop7992 = alloca i1, i1 0
-  %nop7993 = alloca i1, i1 0
-  %nop7994 = alloca i1, i1 0
-  %nop7995 = alloca i1, i1 0
-  %nop7996 = alloca i1, i1 0
-  %nop7997 = alloca i1, i1 0
-  %nop7998 = alloca i1, i1 0
-  %nop7999 = alloca i1, i1 0
-  %nop8000 = alloca i1, i1 0
-  %nop8001 = alloca i1, i1 0
-  %nop8002 = alloca i1, i1 0
-  %nop8003 = alloca i1, i1 0
-  %nop8004 = alloca i1, i1 0
-  %nop8005 = alloca i1, i1 0
-  %nop8006 = alloca i1, i1 0
-  %nop8007 = alloca i1, i1 0
-  %nop8008 = alloca i1, i1 0
-  %nop8009 = alloca i1, i1 0
-  %nop8010 = alloca i1, i1 0
-  %nop8011 = alloca i1, i1 0
-  %nop8012 = alloca i1, i1 0
-  %nop8013 = alloca i1, i1 0
-  %nop8014 = alloca i1, i1 0
-  %nop8015 = alloca i1, i1 0
-  %nop8016 = alloca i1, i1 0
-  %nop8017 = alloca i1, i1 0
-  %nop8018 = alloca i1, i1 0
-  %nop8019 = alloca i1, i1 0
-  %nop8020 = alloca i1, i1 0
-  %nop8021 = alloca i1, i1 0
-  %nop8022 = alloca i1, i1 0
-  %nop8023 = alloca i1, i1 0
-  %nop8024 = alloca i1, i1 0
-  %nop8025 = alloca i1, i1 0
-  %nop8026 = alloca i1, i1 0
-  %nop8027 = alloca i1, i1 0
-  %nop8028 = alloca i1, i1 0
-  %nop8029 = alloca i1, i1 0
-  %nop8030 = alloca i1, i1 0
-  %nop8031 = alloca i1, i1 0
-  %nop8032 = alloca i1, i1 0
-  %nop8033 = alloca i1, i1 0
-  %nop8034 = alloca i1, i1 0
-  %nop8035 = alloca i1, i1 0
-  %nop8036 = alloca i1, i1 0
-  %nop8037 = alloca i1, i1 0
-  %nop8038 = alloca i1, i1 0
-  %nop8039 = alloca i1, i1 0
-  %nop8040 = alloca i1, i1 0
-  %nop8041 = alloca i1, i1 0
-  %nop8042 = alloca i1, i1 0
-  %nop8043 = alloca i1, i1 0
-  %nop8044 = alloca i1, i1 0
-  %nop8045 = alloca i1, i1 0
-  %nop8046 = alloca i1, i1 0
-  %nop8047 = alloca i1, i1 0
-  %nop8048 = alloca i1, i1 0
-  %nop8049 = alloca i1, i1 0
-  %nop8050 = alloca i1, i1 0
-  %nop8051 = alloca i1, i1 0
-  %nop8052 = alloca i1, i1 0
-  %nop8053 = alloca i1, i1 0
-  %nop8054 = alloca i1, i1 0
-  %nop8055 = alloca i1, i1 0
-  %nop8056 = alloca i1, i1 0
-  %nop8057 = alloca i1, i1 0
-  %nop8058 = alloca i1, i1 0
-  %nop8059 = alloca i1, i1 0
-  %nop8060 = alloca i1, i1 0
-  %nop8061 = alloca i1, i1 0
-  %nop8062 = alloca i1, i1 0
-  %nop8063 = alloca i1, i1 0
-  %nop8064 = alloca i1, i1 0
-  %nop8065 = alloca i1, i1 0
-  %nop8066 = alloca i1, i1 0
-  %nop8067 = alloca i1, i1 0
-  %nop8068 = alloca i1, i1 0
-  %nop8069 = alloca i1, i1 0
-  %nop8070 = alloca i1, i1 0
-  %nop8071 = alloca i1, i1 0
-  %nop8072 = alloca i1, i1 0
-  %nop8073 = alloca i1, i1 0
-  %nop8074 = alloca i1, i1 0
-  %nop8075 = alloca i1, i1 0
-  %nop8076 = alloca i1, i1 0
-  %nop8077 = alloca i1, i1 0
-  %nop8078 = alloca i1, i1 0
-  %nop8079 = alloca i1, i1 0
-  %nop8080 = alloca i1, i1 0
-  %nop8081 = alloca i1, i1 0
-  %nop8082 = alloca i1, i1 0
-  %nop8083 = alloca i1, i1 0
-  %nop8084 = alloca i1, i1 0
-  %nop8085 = alloca i1, i1 0
-  %nop8086 = alloca i1, i1 0
-  %nop8087 = alloca i1, i1 0
-  %nop8088 = alloca i1, i1 0
-  %nop8089 = alloca i1, i1 0
-  %nop8090 = alloca i1, i1 0
-  %nop8091 = alloca i1, i1 0
-  %nop8092 = alloca i1, i1 0
-  %nop8093 = alloca i1, i1 0
-  %nop8094 = alloca i1, i1 0
-  %nop8095 = alloca i1, i1 0
-  %nop8096 = alloca i1, i1 0
-  %nop8097 = alloca i1, i1 0
-  %nop8098 = alloca i1, i1 0
-  %nop8099 = alloca i1, i1 0
-  %nop8100 = alloca i1, i1 0
-  %nop8101 = alloca i1, i1 0
-  %nop8102 = alloca i1, i1 0
-  %nop8103 = alloca i1, i1 0
-  %nop8104 = alloca i1, i1 0
-  %nop8105 = alloca i1, i1 0
-  %nop8106 = alloca i1, i1 0
-  %nop8107 = alloca i1, i1 0
-  %nop8108 = alloca i1, i1 0
-  %nop8109 = alloca i1, i1 0
-  %nop8110 = alloca i1, i1 0
-  %nop8111 = alloca i1, i1 0
-  %nop8112 = alloca i1, i1 0
-  %nop8113 = alloca i1, i1 0
-  %nop8114 = alloca i1, i1 0
-  %nop8115 = alloca i1, i1 0
-  %nop8116 = alloca i1, i1 0
-  %nop8117 = alloca i1, i1 0
-  %nop8118 = alloca i1, i1 0
-  %nop8119 = alloca i1, i1 0
-  %nop8120 = alloca i1, i1 0
-  %nop8121 = alloca i1, i1 0
-  %nop8122 = alloca i1, i1 0
-  %nop8123 = alloca i1, i1 0
-  %nop8124 = alloca i1, i1 0
-  %nop8125 = alloca i1, i1 0
-  %nop8126 = alloca i1, i1 0
-  %nop8127 = alloca i1, i1 0
-  %nop8128 = alloca i1, i1 0
-  %nop8129 = alloca i1, i1 0
-  %nop8130 = alloca i1, i1 0
-  %nop8131 = alloca i1, i1 0
-  %nop8132 = alloca i1, i1 0
-  %nop8133 = alloca i1, i1 0
-  %nop8134 = alloca i1, i1 0
-  %nop8135 = alloca i1, i1 0
-  %nop8136 = alloca i1, i1 0
-  %nop8137 = alloca i1, i1 0
-  %nop8138 = alloca i1, i1 0
-  %nop8139 = alloca i1, i1 0
-  %nop8140 = alloca i1, i1 0
-  %nop8141 = alloca i1, i1 0
-  %nop8142 = alloca i1, i1 0
-  %nop8143 = alloca i1, i1 0
-  %nop8144 = alloca i1, i1 0
-  %nop8145 = alloca i1, i1 0
-  %nop8146 = alloca i1, i1 0
-  %nop8147 = alloca i1, i1 0
-  %nop8148 = alloca i1, i1 0
-  %nop8149 = alloca i1, i1 0
-  %nop8150 = alloca i1, i1 0
-  %nop8151 = alloca i1, i1 0
-  %nop8152 = alloca i1, i1 0
-  %nop8153 = alloca i1, i1 0
-  %nop8154 = alloca i1, i1 0
-  %nop8155 = alloca i1, i1 0
-  %nop8156 = alloca i1, i1 0
-  %nop8157 = alloca i1, i1 0
-  %nop8158 = alloca i1, i1 0
-  %nop8159 = alloca i1, i1 0
-  %nop8160 = alloca i1, i1 0
-  %nop8161 = alloca i1, i1 0
-  %nop8162 = alloca i1, i1 0
-  %nop8163 = alloca i1, i1 0
-  %nop8164 = alloca i1, i1 0
-  %nop8165 = alloca i1, i1 0
-  %nop8166 = alloca i1, i1 0
-  %nop8167 = alloca i1, i1 0
-  %nop8168 = alloca i1, i1 0
-  %nop8169 = alloca i1, i1 0
-  %nop8170 = alloca i1, i1 0
-  %nop8171 = alloca i1, i1 0
-  %nop8172 = alloca i1, i1 0
-  %nop8173 = alloca i1, i1 0
-  %nop8174 = alloca i1, i1 0
-  %nop8175 = alloca i1, i1 0
-  %nop8176 = alloca i1, i1 0
-  %nop8177 = alloca i1, i1 0
-  %nop8178 = alloca i1, i1 0
-  %nop8179 = alloca i1, i1 0
-  %nop8180 = alloca i1, i1 0
-  %nop8181 = alloca i1, i1 0
-  %nop8182 = alloca i1, i1 0
-  %nop8183 = alloca i1, i1 0
-  %nop8184 = alloca i1, i1 0
-  %nop8185 = alloca i1, i1 0
-  %nop8186 = alloca i1, i1 0
-  %nop8187 = alloca i1, i1 0
-  %nop8188 = alloca i1, i1 0
-  %nop8189 = alloca i1, i1 0
-  %nop8190 = alloca i1, i1 0
-  %nop8191 = alloca i1, i1 0
-  %nop8192 = alloca i1, i1 0
-  %nop8193 = alloca i1, i1 0
-  %nop8194 = alloca i1, i1 0
-  %nop8195 = alloca i1, i1 0
-  %nop8196 = alloca i1, i1 0
-  %nop8197 = alloca i1, i1 0
-  %nop8198 = alloca i1, i1 0
-  %nop8199 = alloca i1, i1 0
-  %nop8200 = alloca i1, i1 0
-  %nop8201 = alloca i1, i1 0
-  %nop8202 = alloca i1, i1 0
-  %nop8203 = alloca i1, i1 0
-  %nop8204 = alloca i1, i1 0
-  %nop8205 = alloca i1, i1 0
-  %nop8206 = alloca i1, i1 0
-  %nop8207 = alloca i1, i1 0
-  %nop8208 = alloca i1, i1 0
-  %nop8209 = alloca i1, i1 0
-  %nop8210 = alloca i1, i1 0
-  %nop8211 = alloca i1, i1 0
-  %nop8212 = alloca i1, i1 0
-  %nop8213 = alloca i1, i1 0
-  %nop8214 = alloca i1, i1 0
-  %nop8215 = alloca i1, i1 0
-  %nop8216 = alloca i1, i1 0
-  %nop8217 = alloca i1, i1 0
-  %nop8218 = alloca i1, i1 0
-  %nop8219 = alloca i1, i1 0
-  %nop8220 = alloca i1, i1 0
-  %nop8221 = alloca i1, i1 0
-  %nop8222 = alloca i1, i1 0
-  %nop8223 = alloca i1, i1 0
-  %nop8224 = alloca i1, i1 0
-  %nop8225 = alloca i1, i1 0
-  %nop8226 = alloca i1, i1 0
-  %nop8227 = alloca i1, i1 0
-  %nop8228 = alloca i1, i1 0
-  %nop8229 = alloca i1, i1 0
-  %nop8230 = alloca i1, i1 0
-  %nop8231 = alloca i1, i1 0
-  %nop8232 = alloca i1, i1 0
-  %nop8233 = alloca i1, i1 0
-  %nop8234 = alloca i1, i1 0
-  %nop8235 = alloca i1, i1 0
-  %nop8236 = alloca i1, i1 0
-  %nop8237 = alloca i1, i1 0
-  %nop8238 = alloca i1, i1 0
-  %nop8239 = alloca i1, i1 0
-  %nop8240 = alloca i1, i1 0
-  %nop8241 = alloca i1, i1 0
-  %nop8242 = alloca i1, i1 0
-  %nop8243 = alloca i1, i1 0
-  %nop8244 = alloca i1, i1 0
-  %nop8245 = alloca i1, i1 0
-  %nop8246 = alloca i1, i1 0
-  %nop8247 = alloca i1, i1 0
-  %nop8248 = alloca i1, i1 0
-  %nop8249 = alloca i1, i1 0
-  %nop8250 = alloca i1, i1 0
-  %nop8251 = alloca i1, i1 0
-  %nop8252 = alloca i1, i1 0
-  %nop8253 = alloca i1, i1 0
-  %nop8254 = alloca i1, i1 0
-  %nop8255 = alloca i1, i1 0
-  %nop8256 = alloca i1, i1 0
-  %nop8257 = alloca i1, i1 0
-  %nop8258 = alloca i1, i1 0
-  %nop8259 = alloca i1, i1 0
-  %nop8260 = alloca i1, i1 0
-  %nop8261 = alloca i1, i1 0
-  %nop8262 = alloca i1, i1 0
-  %nop8263 = alloca i1, i1 0
-  %nop8264 = alloca i1, i1 0
-  %nop8265 = alloca i1, i1 0
-  %nop8266 = alloca i1, i1 0
-  %nop8267 = alloca i1, i1 0
-  %nop8268 = alloca i1, i1 0
-  %nop8269 = alloca i1, i1 0
-  %nop8270 = alloca i1, i1 0
-  %nop8271 = alloca i1, i1 0
-  %nop8272 = alloca i1, i1 0
-  %nop8273 = alloca i1, i1 0
-  %nop8274 = alloca i1, i1 0
-  %nop8275 = alloca i1, i1 0
-  %nop8276 = alloca i1, i1 0
-  %nop8277 = alloca i1, i1 0
-  %nop8278 = alloca i1, i1 0
-  %nop8279 = alloca i1, i1 0
-  %nop8280 = alloca i1, i1 0
-  %nop8281 = alloca i1, i1 0
-  %nop8282 = alloca i1, i1 0
-  %nop8283 = alloca i1, i1 0
-  %nop8284 = alloca i1, i1 0
-  %nop8285 = alloca i1, i1 0
-  %nop8286 = alloca i1, i1 0
-  %nop8287 = alloca i1, i1 0
-  %nop8288 = alloca i1, i1 0
-  %nop8289 = alloca i1, i1 0
-  %nop8290 = alloca i1, i1 0
-  %nop8291 = alloca i1, i1 0
-  %nop8292 = alloca i1, i1 0
-  %nop8293 = alloca i1, i1 0
-  %nop8294 = alloca i1, i1 0
-  %nop8295 = alloca i1, i1 0
-  %nop8296 = alloca i1, i1 0
-  %nop8297 = alloca i1, i1 0
-  %nop8298 = alloca i1, i1 0
-  %nop8299 = alloca i1, i1 0
-  %nop8300 = alloca i1, i1 0
-  %nop8301 = alloca i1, i1 0
-  %nop8302 = alloca i1, i1 0
-  %nop8303 = alloca i1, i1 0
-  %nop8304 = alloca i1, i1 0
-  %nop8305 = alloca i1, i1 0
-  %nop8306 = alloca i1, i1 0
-  %nop8307 = alloca i1, i1 0
-  %nop8308 = alloca i1, i1 0
-  %nop8309 = alloca i1, i1 0
-  %nop8310 = alloca i1, i1 0
-  %nop8311 = alloca i1, i1 0
-  %nop8312 = alloca i1, i1 0
-  %nop8313 = alloca i1, i1 0
-  %nop8314 = alloca i1, i1 0
-  %nop8315 = alloca i1, i1 0
-  %nop8316 = alloca i1, i1 0
-  %nop8317 = alloca i1, i1 0
-  %nop8318 = alloca i1, i1 0
-  %nop8319 = alloca i1, i1 0
-  %nop8320 = alloca i1, i1 0
-  %nop8321 = alloca i1, i1 0
-  %nop8322 = alloca i1, i1 0
-  %nop8323 = alloca i1, i1 0
-  %nop8324 = alloca i1, i1 0
-  %nop8325 = alloca i1, i1 0
-  %nop8326 = alloca i1, i1 0
-  %nop8327 = alloca i1, i1 0
-  %nop8328 = alloca i1, i1 0
-  %nop8329 = alloca i1, i1 0
-  %nop8330 = alloca i1, i1 0
-  %nop8331 = alloca i1, i1 0
-  %nop8332 = alloca i1, i1 0
-  %nop8333 = alloca i1, i1 0
-  %nop8334 = alloca i1, i1 0
-  %nop8335 = alloca i1, i1 0
-  %nop8336 = alloca i1, i1 0
-  %nop8337 = alloca i1, i1 0
-  %nop8338 = alloca i1, i1 0
-  %nop8339 = alloca i1, i1 0
-  %nop8340 = alloca i1, i1 0
-  %nop8341 = alloca i1, i1 0
-  %nop8342 = alloca i1, i1 0
-  %nop8343 = alloca i1, i1 0
-  %nop8344 = alloca i1, i1 0
-  %nop8345 = alloca i1, i1 0
-  %nop8346 = alloca i1, i1 0
-  %nop8347 = alloca i1, i1 0
-  %nop8348 = alloca i1, i1 0
-  %nop8349 = alloca i1, i1 0
-  %nop8350 = alloca i1, i1 0
-  %nop8351 = alloca i1, i1 0
-  %nop8352 = alloca i1, i1 0
-  %nop8353 = alloca i1, i1 0
-  %nop8354 = alloca i1, i1 0
-  %nop8355 = alloca i1, i1 0
-  %nop8356 = alloca i1, i1 0
-  %nop8357 = alloca i1, i1 0
-  %nop8358 = alloca i1, i1 0
-  %nop8359 = alloca i1, i1 0
-  %nop8360 = alloca i1, i1 0
-  %nop8361 = alloca i1, i1 0
-  %nop8362 = alloca i1, i1 0
-  %nop8363 = alloca i1, i1 0
-  %nop8364 = alloca i1, i1 0
-  %nop8365 = alloca i1, i1 0
-  %nop8366 = alloca i1, i1 0
-  %nop8367 = alloca i1, i1 0
-  %nop8368 = alloca i1, i1 0
-  %nop8369 = alloca i1, i1 0
-  %nop8370 = alloca i1, i1 0
-  %nop8371 = alloca i1, i1 0
-  %nop8372 = alloca i1, i1 0
-  %nop8373 = alloca i1, i1 0
-  %nop8374 = alloca i1, i1 0
-  %nop8375 = alloca i1, i1 0
-  %nop8376 = alloca i1, i1 0
-  %nop8377 = alloca i1, i1 0
-  %nop8378 = alloca i1, i1 0
-  %nop8379 = alloca i1, i1 0
-  %nop8380 = alloca i1, i1 0
-  %nop8381 = alloca i1, i1 0
-  %nop8382 = alloca i1, i1 0
-  %nop8383 = alloca i1, i1 0
-  %nop8384 = alloca i1, i1 0
-  %nop8385 = alloca i1, i1 0
-  %nop8386 = alloca i1, i1 0
-  %nop8387 = alloca i1, i1 0
-  %nop8388 = alloca i1, i1 0
-  %nop8389 = alloca i1, i1 0
-  %nop8390 = alloca i1, i1 0
-  %nop8391 = alloca i1, i1 0
-  %nop8392 = alloca i1, i1 0
-  %nop8393 = alloca i1, i1 0
-  %nop8394 = alloca i1, i1 0
-  %nop8395 = alloca i1, i1 0
-  %nop8396 = alloca i1, i1 0
-  %nop8397 = alloca i1, i1 0
-  %nop8398 = alloca i1, i1 0
-  %nop8399 = alloca i1, i1 0
-  %nop8400 = alloca i1, i1 0
-  %nop8401 = alloca i1, i1 0
-  %nop8402 = alloca i1, i1 0
-  %nop8403 = alloca i1, i1 0
-  %nop8404 = alloca i1, i1 0
-  %nop8405 = alloca i1, i1 0
-  %nop8406 = alloca i1, i1 0
-  %nop8407 = alloca i1, i1 0
-  %nop8408 = alloca i1, i1 0
-  %nop8409 = alloca i1, i1 0
-  %nop8410 = alloca i1, i1 0
-  %nop8411 = alloca i1, i1 0
-  %nop8412 = alloca i1, i1 0
-  %nop8413 = alloca i1, i1 0
-  %nop8414 = alloca i1, i1 0
-  %nop8415 = alloca i1, i1 0
-  %nop8416 = alloca i1, i1 0
-  %nop8417 = alloca i1, i1 0
-  %nop8418 = alloca i1, i1 0
-  %nop8419 = alloca i1, i1 0
-  %nop8420 = alloca i1, i1 0
-  %nop8421 = alloca i1, i1 0
-  %nop8422 = alloca i1, i1 0
-  %nop8423 = alloca i1, i1 0
-  %nop8424 = alloca i1, i1 0
-  %nop8425 = alloca i1, i1 0
-  %nop8426 = alloca i1, i1 0
-  %nop8427 = alloca i1, i1 0
-  %nop8428 = alloca i1, i1 0
-  %nop8429 = alloca i1, i1 0
-  %nop8430 = alloca i1, i1 0
-  %nop8431 = alloca i1, i1 0
-  %nop8432 = alloca i1, i1 0
-  %nop8433 = alloca i1, i1 0
-  %nop8434 = alloca i1, i1 0
-  %nop8435 = alloca i1, i1 0
-  %nop8436 = alloca i1, i1 0
-  %nop8437 = alloca i1, i1 0
-  %nop8438 = alloca i1, i1 0
-  %nop8439 = alloca i1, i1 0
-  %nop8440 = alloca i1, i1 0
-  %nop8441 = alloca i1, i1 0
-  %nop8442 = alloca i1, i1 0
-  %nop8443 = alloca i1, i1 0
-  %nop8444 = alloca i1, i1 0
-  %nop8445 = alloca i1, i1 0
-  %nop8446 = alloca i1, i1 0
-  %nop8447 = alloca i1, i1 0
-  %nop8448 = alloca i1, i1 0
-  %nop8449 = alloca i1, i1 0
-  %nop8450 = alloca i1, i1 0
-  %nop8451 = alloca i1, i1 0
-  %nop8452 = alloca i1, i1 0
-  %nop8453 = alloca i1, i1 0
-  %nop8454 = alloca i1, i1 0
-  %nop8455 = alloca i1, i1 0
-  %nop8456 = alloca i1, i1 0
-  %nop8457 = alloca i1, i1 0
-  %nop8458 = alloca i1, i1 0
-  %nop8459 = alloca i1, i1 0
-  %nop8460 = alloca i1, i1 0
-  %nop8461 = alloca i1, i1 0
-  %nop8462 = alloca i1, i1 0
-  %nop8463 = alloca i1, i1 0
-  %nop8464 = alloca i1, i1 0
-  %nop8465 = alloca i1, i1 0
-  %nop8466 = alloca i1, i1 0
-  %nop8467 = alloca i1, i1 0
-  %nop8468 = alloca i1, i1 0
-  %nop8469 = alloca i1, i1 0
-  %nop8470 = alloca i1, i1 0
-  %nop8471 = alloca i1, i1 0
-  %nop8472 = alloca i1, i1 0
-  %nop8473 = alloca i1, i1 0
-  %nop8474 = alloca i1, i1 0
-  %nop8475 = alloca i1, i1 0
-  %nop8476 = alloca i1, i1 0
-  %nop8477 = alloca i1, i1 0
-  %nop8478 = alloca i1, i1 0
-  %nop8479 = alloca i1, i1 0
-  %nop8480 = alloca i1, i1 0
-  %nop8481 = alloca i1, i1 0
-  %nop8482 = alloca i1, i1 0
-  %nop8483 = alloca i1, i1 0
-  %nop8484 = alloca i1, i1 0
-  %nop8485 = alloca i1, i1 0
-  %nop8486 = alloca i1, i1 0
-  %nop8487 = alloca i1, i1 0
-  %nop8488 = alloca i1, i1 0
-  %nop8489 = alloca i1, i1 0
-  %nop8490 = alloca i1, i1 0
-  %nop8491 = alloca i1, i1 0
-  %nop8492 = alloca i1, i1 0
-  %nop8493 = alloca i1, i1 0
-  %nop8494 = alloca i1, i1 0
-  %nop8495 = alloca i1, i1 0
-  %nop8496 = alloca i1, i1 0
-  %nop8497 = alloca i1, i1 0
-  %nop8498 = alloca i1, i1 0
-  %nop8499 = alloca i1, i1 0
-  %nop8500 = alloca i1, i1 0
-  %nop8501 = alloca i1, i1 0
-  %nop8502 = alloca i1, i1 0
-  %nop8503 = alloca i1, i1 0
-  %nop8504 = alloca i1, i1 0
-  %nop8505 = alloca i1, i1 0
-  %nop8506 = alloca i1, i1 0
-  %nop8507 = alloca i1, i1 0
-  %nop8508 = alloca i1, i1 0
-  %nop8509 = alloca i1, i1 0
-  %nop8510 = alloca i1, i1 0
-  %nop8511 = alloca i1, i1 0
-  %nop8512 = alloca i1, i1 0
-  %nop8513 = alloca i1, i1 0
-  %nop8514 = alloca i1, i1 0
-  %nop8515 = alloca i1, i1 0
-  %nop8516 = alloca i1, i1 0
-  %nop8517 = alloca i1, i1 0
-  %nop8518 = alloca i1, i1 0
-  %nop8519 = alloca i1, i1 0
-  %nop8520 = alloca i1, i1 0
-  %nop8521 = alloca i1, i1 0
-  %nop8522 = alloca i1, i1 0
-  %nop8523 = alloca i1, i1 0
-  %nop8524 = alloca i1, i1 0
-  %nop8525 = alloca i1, i1 0
-  %nop8526 = alloca i1, i1 0
-  %nop8527 = alloca i1, i1 0
-  %nop8528 = alloca i1, i1 0
-  %nop8529 = alloca i1, i1 0
-  %nop8530 = alloca i1, i1 0
-  %nop8531 = alloca i1, i1 0
-  %nop8532 = alloca i1, i1 0
-  %nop8533 = alloca i1, i1 0
-  %nop8534 = alloca i1, i1 0
-  %nop8535 = alloca i1, i1 0
-  %nop8536 = alloca i1, i1 0
-  %nop8537 = alloca i1, i1 0
-  %nop8538 = alloca i1, i1 0
-  %nop8539 = alloca i1, i1 0
-  %nop8540 = alloca i1, i1 0
-  %nop8541 = alloca i1, i1 0
-  %nop8542 = alloca i1, i1 0
-  %nop8543 = alloca i1, i1 0
-  %nop8544 = alloca i1, i1 0
-  %nop8545 = alloca i1, i1 0
-  %nop8546 = alloca i1, i1 0
-  %nop8547 = alloca i1, i1 0
-  %nop8548 = alloca i1, i1 0
-  %nop8549 = alloca i1, i1 0
-  %nop8550 = alloca i1, i1 0
-  %nop8551 = alloca i1, i1 0
-  %nop8552 = alloca i1, i1 0
-  %nop8553 = alloca i1, i1 0
-  %nop8554 = alloca i1, i1 0
-  %nop8555 = alloca i1, i1 0
-  %nop8556 = alloca i1, i1 0
-  %nop8557 = alloca i1, i1 0
-  %nop8558 = alloca i1, i1 0
-  %nop8559 = alloca i1, i1 0
-  %nop8560 = alloca i1, i1 0
-  %nop8561 = alloca i1, i1 0
-  %nop8562 = alloca i1, i1 0
-  %nop8563 = alloca i1, i1 0
-  %nop8564 = alloca i1, i1 0
-  %nop8565 = alloca i1, i1 0
-  %nop8566 = alloca i1, i1 0
-  %nop8567 = alloca i1, i1 0
-  %nop8568 = alloca i1, i1 0
-  %nop8569 = alloca i1, i1 0
-  %nop8570 = alloca i1, i1 0
-  %nop8571 = alloca i1, i1 0
-  %nop8572 = alloca i1, i1 0
-  %nop8573 = alloca i1, i1 0
-  %nop8574 = alloca i1, i1 0
-  %nop8575 = alloca i1, i1 0
-  %nop8576 = alloca i1, i1 0
-  %nop8577 = alloca i1, i1 0
-  %nop8578 = alloca i1, i1 0
-  %nop8579 = alloca i1, i1 0
-  %nop8580 = alloca i1, i1 0
-  %nop8581 = alloca i1, i1 0
-  %nop8582 = alloca i1, i1 0
-  %nop8583 = alloca i1, i1 0
-  %nop8584 = alloca i1, i1 0
-  %nop8585 = alloca i1, i1 0
-  %nop8586 = alloca i1, i1 0
-  %nop8587 = alloca i1, i1 0
-  %nop8588 = alloca i1, i1 0
-  %nop8589 = alloca i1, i1 0
-  %nop8590 = alloca i1, i1 0
-  %nop8591 = alloca i1, i1 0
-  %nop8592 = alloca i1, i1 0
-  %nop8593 = alloca i1, i1 0
-  %nop8594 = alloca i1, i1 0
-  %nop8595 = alloca i1, i1 0
-  %nop8596 = alloca i1, i1 0
-  %nop8597 = alloca i1, i1 0
-  %nop8598 = alloca i1, i1 0
-  %nop8599 = alloca i1, i1 0
-  %nop8600 = alloca i1, i1 0
-  %nop8601 = alloca i1, i1 0
-  %nop8602 = alloca i1, i1 0
-  %nop8603 = alloca i1, i1 0
-  %nop8604 = alloca i1, i1 0
-  %nop8605 = alloca i1, i1 0
-  %nop8606 = alloca i1, i1 0
-  %nop8607 = alloca i1, i1 0
-  %nop8608 = alloca i1, i1 0
-  %nop8609 = alloca i1, i1 0
-  %nop8610 = alloca i1, i1 0
-  %nop8611 = alloca i1, i1 0
-  %nop8612 = alloca i1, i1 0
-  %nop8613 = alloca i1, i1 0
-  %nop8614 = alloca i1, i1 0
-  %nop8615 = alloca i1, i1 0
-  %nop8616 = alloca i1, i1 0
-  %nop8617 = alloca i1, i1 0
-  %nop8618 = alloca i1, i1 0
-  %nop8619 = alloca i1, i1 0
-  %nop8620 = alloca i1, i1 0
-  %nop8621 = alloca i1, i1 0
-  %nop8622 = alloca i1, i1 0
-  %nop8623 = alloca i1, i1 0
-  %nop8624 = alloca i1, i1 0
-  %nop8625 = alloca i1, i1 0
-  %nop8626 = alloca i1, i1 0
-  %nop8627 = alloca i1, i1 0
-  %nop8628 = alloca i1, i1 0
-  %nop8629 = alloca i1, i1 0
-  %nop8630 = alloca i1, i1 0
-  %nop8631 = alloca i1, i1 0
-  %nop8632 = alloca i1, i1 0
-  %nop8633 = alloca i1, i1 0
-  %nop8634 = alloca i1, i1 0
-  %nop8635 = alloca i1, i1 0
-  %nop8636 = alloca i1, i1 0
-  %nop8637 = alloca i1, i1 0
-  %nop8638 = alloca i1, i1 0
-  %nop8639 = alloca i1, i1 0
-  %nop8640 = alloca i1, i1 0
-  %nop8641 = alloca i1, i1 0
-  %nop8642 = alloca i1, i1 0
-  %nop8643 = alloca i1, i1 0
-  %nop8644 = alloca i1, i1 0
-  %nop8645 = alloca i1, i1 0
-  %nop8646 = alloca i1, i1 0
-  %nop8647 = alloca i1, i1 0
-  %nop8648 = alloca i1, i1 0
-  %nop8649 = alloca i1, i1 0
-  %nop8650 = alloca i1, i1 0
-  %nop8651 = alloca i1, i1 0
-  %nop8652 = alloca i1, i1 0
-  %nop8653 = alloca i1, i1 0
-  %nop8654 = alloca i1, i1 0
-  %nop8655 = alloca i1, i1 0
-  %nop8656 = alloca i1, i1 0
-  %nop8657 = alloca i1, i1 0
-  %nop8658 = alloca i1, i1 0
-  %nop8659 = alloca i1, i1 0
-  %nop8660 = alloca i1, i1 0
-  %nop8661 = alloca i1, i1 0
-  %nop8662 = alloca i1, i1 0
-  %nop8663 = alloca i1, i1 0
-  %nop8664 = alloca i1, i1 0
-  %nop8665 = alloca i1, i1 0
-  %nop8666 = alloca i1, i1 0
-  %nop8667 = alloca i1, i1 0
-  %nop8668 = alloca i1, i1 0
-  %nop8669 = alloca i1, i1 0
-  %nop8670 = alloca i1, i1 0
-  %nop8671 = alloca i1, i1 0
-  %nop8672 = alloca i1, i1 0
-  %nop8673 = alloca i1, i1 0
-  %nop8674 = alloca i1, i1 0
-  %nop8675 = alloca i1, i1 0
-  %nop8676 = alloca i1, i1 0
-  %nop8677 = alloca i1, i1 0
-  %nop8678 = alloca i1, i1 0
-  %nop8679 = alloca i1, i1 0
-  %nop8680 = alloca i1, i1 0
-  %nop8681 = alloca i1, i1 0
-  %nop8682 = alloca i1, i1 0
-  %nop8683 = alloca i1, i1 0
-  %nop8684 = alloca i1, i1 0
-  %nop8685 = alloca i1, i1 0
-  %nop8686 = alloca i1, i1 0
-  %nop8687 = alloca i1, i1 0
-  %nop8688 = alloca i1, i1 0
-  %nop8689 = alloca i1, i1 0
-  %nop8690 = alloca i1, i1 0
-  %nop8691 = alloca i1, i1 0
-  %nop8692 = alloca i1, i1 0
-  %nop8693 = alloca i1, i1 0
-  %nop8694 = alloca i1, i1 0
-  %nop8695 = alloca i1, i1 0
-  %nop8696 = alloca i1, i1 0
-  %nop8697 = alloca i1, i1 0
-  %nop8698 = alloca i1, i1 0
-  %nop8699 = alloca i1, i1 0
-  %nop8700 = alloca i1, i1 0
-  %nop8701 = alloca i1, i1 0
-  %nop8702 = alloca i1, i1 0
-  %nop8703 = alloca i1, i1 0
-  %nop8704 = alloca i1, i1 0
-  %nop8705 = alloca i1, i1 0
-  %nop8706 = alloca i1, i1 0
-  %nop8707 = alloca i1, i1 0
-  %nop8708 = alloca i1, i1 0
-  %nop8709 = alloca i1, i1 0
-  %nop8710 = alloca i1, i1 0
-  %nop8711 = alloca i1, i1 0
-  %nop8712 = alloca i1, i1 0
-  %nop8713 = alloca i1, i1 0
-  %nop8714 = alloca i1, i1 0
-  %nop8715 = alloca i1, i1 0
-  %nop8716 = alloca i1, i1 0
-  %nop8717 = alloca i1, i1 0
-  %nop8718 = alloca i1, i1 0
-  %nop8719 = alloca i1, i1 0
-  %nop8720 = alloca i1, i1 0
-  %nop8721 = alloca i1, i1 0
-  %nop8722 = alloca i1, i1 0
-  %nop8723 = alloca i1, i1 0
-  %nop8724 = alloca i1, i1 0
-  %nop8725 = alloca i1, i1 0
-  %nop8726 = alloca i1, i1 0
-  %nop8727 = alloca i1, i1 0
-  %nop8728 = alloca i1, i1 0
-  %nop8729 = alloca i1, i1 0
-  %nop8730 = alloca i1, i1 0
-  %nop8731 = alloca i1, i1 0
-  %nop8732 = alloca i1, i1 0
-  %nop8733 = alloca i1, i1 0
-  %nop8734 = alloca i1, i1 0
-  %nop8735 = alloca i1, i1 0
-  %nop8736 = alloca i1, i1 0
-  %nop8737 = alloca i1, i1 0
-  %nop8738 = alloca i1, i1 0
-  %nop8739 = alloca i1, i1 0
-  %nop8740 = alloca i1, i1 0
-  %nop8741 = alloca i1, i1 0
-  %nop8742 = alloca i1, i1 0
-  %nop8743 = alloca i1, i1 0
-  %nop8744 = alloca i1, i1 0
-  %nop8745 = alloca i1, i1 0
-  %nop8746 = alloca i1, i1 0
-  %nop8747 = alloca i1, i1 0
-  %nop8748 = alloca i1, i1 0
-  %nop8749 = alloca i1, i1 0
-  %nop8750 = alloca i1, i1 0
-  %nop8751 = alloca i1, i1 0
-  %nop8752 = alloca i1, i1 0
-  %nop8753 = alloca i1, i1 0
-  %nop8754 = alloca i1, i1 0
-  %nop8755 = alloca i1, i1 0
-  %nop8756 = alloca i1, i1 0
-  %nop8757 = alloca i1, i1 0
-  %nop8758 = alloca i1, i1 0
-  %nop8759 = alloca i1, i1 0
-  %nop8760 = alloca i1, i1 0
-  %nop8761 = alloca i1, i1 0
-  %nop8762 = alloca i1, i1 0
-  %nop8763 = alloca i1, i1 0
-  %nop8764 = alloca i1, i1 0
-  %nop8765 = alloca i1, i1 0
-  %nop8766 = alloca i1, i1 0
-  %nop8767 = alloca i1, i1 0
-  %nop8768 = alloca i1, i1 0
-  %nop8769 = alloca i1, i1 0
-  %nop8770 = alloca i1, i1 0
-  %nop8771 = alloca i1, i1 0
-  %nop8772 = alloca i1, i1 0
-  %nop8773 = alloca i1, i1 0
-  %nop8774 = alloca i1, i1 0
-  %nop8775 = alloca i1, i1 0
-  %nop8776 = alloca i1, i1 0
-  %nop8777 = alloca i1, i1 0
-  %nop8778 = alloca i1, i1 0
-  %nop8779 = alloca i1, i1 0
-  %nop8780 = alloca i1, i1 0
-  %nop8781 = alloca i1, i1 0
-  %nop8782 = alloca i1, i1 0
-  %nop8783 = alloca i1, i1 0
-  %nop8784 = alloca i1, i1 0
-  %nop8785 = alloca i1, i1 0
-  %nop8786 = alloca i1, i1 0
-  %nop8787 = alloca i1, i1 0
-  %nop8788 = alloca i1, i1 0
-  %nop8789 = alloca i1, i1 0
-  %nop8790 = alloca i1, i1 0
-  %nop8791 = alloca i1, i1 0
-  %nop8792 = alloca i1, i1 0
-  %nop8793 = alloca i1, i1 0
-  %nop8794 = alloca i1, i1 0
-  %nop8795 = alloca i1, i1 0
-  %nop8796 = alloca i1, i1 0
-  %nop8797 = alloca i1, i1 0
-  %nop8798 = alloca i1, i1 0
-  %nop8799 = alloca i1, i1 0
-  %nop8800 = alloca i1, i1 0
-  %nop8801 = alloca i1, i1 0
-  %nop8802 = alloca i1, i1 0
-  %nop8803 = alloca i1, i1 0
-  %nop8804 = alloca i1, i1 0
-  %nop8805 = alloca i1, i1 0
-  %nop8806 = alloca i1, i1 0
-  %nop8807 = alloca i1, i1 0
-  %nop8808 = alloca i1, i1 0
-  %nop8809 = alloca i1, i1 0
-  %nop8810 = alloca i1, i1 0
-  %nop8811 = alloca i1, i1 0
-  %nop8812 = alloca i1, i1 0
-  %nop8813 = alloca i1, i1 0
-  %nop8814 = alloca i1, i1 0
-  %nop8815 = alloca i1, i1 0
-  %nop8816 = alloca i1, i1 0
-  %nop8817 = alloca i1, i1 0
-  %nop8818 = alloca i1, i1 0
-  %nop8819 = alloca i1, i1 0
-  %nop8820 = alloca i1, i1 0
-  %nop8821 = alloca i1, i1 0
-  %nop8822 = alloca i1, i1 0
-  %nop8823 = alloca i1, i1 0
-  %nop8824 = alloca i1, i1 0
-  %nop8825 = alloca i1, i1 0
-  %nop8826 = alloca i1, i1 0
-  %nop8827 = alloca i1, i1 0
-  %nop8828 = alloca i1, i1 0
-  %nop8829 = alloca i1, i1 0
-  %nop8830 = alloca i1, i1 0
-  %nop8831 = alloca i1, i1 0
-  %nop8832 = alloca i1, i1 0
-  %nop8833 = alloca i1, i1 0
-  %nop8834 = alloca i1, i1 0
-  %nop8835 = alloca i1, i1 0
-  %nop8836 = alloca i1, i1 0
-  %nop8837 = alloca i1, i1 0
-  %nop8838 = alloca i1, i1 0
-  %nop8839 = alloca i1, i1 0
-  %nop8840 = alloca i1, i1 0
-  %nop8841 = alloca i1, i1 0
-  %nop8842 = alloca i1, i1 0
-  %nop8843 = alloca i1, i1 0
-  %nop8844 = alloca i1, i1 0
-  %nop8845 = alloca i1, i1 0
-  %nop8846 = alloca i1, i1 0
-  %nop8847 = alloca i1, i1 0
-  %nop8848 = alloca i1, i1 0
-  %nop8849 = alloca i1, i1 0
-  %nop8850 = alloca i1, i1 0
-  %nop8851 = alloca i1, i1 0
-  %nop8852 = alloca i1, i1 0
-  %nop8853 = alloca i1, i1 0
-  %nop8854 = alloca i1, i1 0
-  %nop8855 = alloca i1, i1 0
-  %nop8856 = alloca i1, i1 0
-  %nop8857 = alloca i1, i1 0
-  %nop8858 = alloca i1, i1 0
-  %nop8859 = alloca i1, i1 0
-  %nop8860 = alloca i1, i1 0
-  %nop8861 = alloca i1, i1 0
-  %nop8862 = alloca i1, i1 0
-  %nop8863 = alloca i1, i1 0
-  %nop8864 = alloca i1, i1 0
-  %nop8865 = alloca i1, i1 0
-  %nop8866 = alloca i1, i1 0
-  %nop8867 = alloca i1, i1 0
-  %nop8868 = alloca i1, i1 0
-  %nop8869 = alloca i1, i1 0
-  %nop8870 = alloca i1, i1 0
-  %nop8871 = alloca i1, i1 0
-  %nop8872 = alloca i1, i1 0
-  %nop8873 = alloca i1, i1 0
-  %nop8874 = alloca i1, i1 0
-  %nop8875 = alloca i1, i1 0
-  %nop8876 = alloca i1, i1 0
-  %nop8877 = alloca i1, i1 0
-  %nop8878 = alloca i1, i1 0
-  %nop8879 = alloca i1, i1 0
-  %nop8880 = alloca i1, i1 0
-  %nop8881 = alloca i1, i1 0
-  %nop8882 = alloca i1, i1 0
-  %nop8883 = alloca i1, i1 0
-  %nop8884 = alloca i1, i1 0
-  %nop8885 = alloca i1, i1 0
-  %nop8886 = alloca i1, i1 0
-  %nop8887 = alloca i1, i1 0
-  %nop8888 = alloca i1, i1 0
-  %nop8889 = alloca i1, i1 0
-  %nop8890 = alloca i1, i1 0
-  %nop8891 = alloca i1, i1 0
-  %nop8892 = alloca i1, i1 0
-  %nop8893 = alloca i1, i1 0
-  %nop8894 = alloca i1, i1 0
-  %nop8895 = alloca i1, i1 0
-  %nop8896 = alloca i1, i1 0
-  %nop8897 = alloca i1, i1 0
-  %nop8898 = alloca i1, i1 0
-  %nop8899 = alloca i1, i1 0
-  %nop8900 = alloca i1, i1 0
-  %nop8901 = alloca i1, i1 0
-  %nop8902 = alloca i1, i1 0
-  %nop8903 = alloca i1, i1 0
-  %nop8904 = alloca i1, i1 0
-  %nop8905 = alloca i1, i1 0
-  %nop8906 = alloca i1, i1 0
-  %nop8907 = alloca i1, i1 0
-  %nop8908 = alloca i1, i1 0
-  %nop8909 = alloca i1, i1 0
-  %nop8910 = alloca i1, i1 0
-  %nop8911 = alloca i1, i1 0
-  %nop8912 = alloca i1, i1 0
-  %nop8913 = alloca i1, i1 0
-  %nop8914 = alloca i1, i1 0
-  %nop8915 = alloca i1, i1 0
-  %nop8916 = alloca i1, i1 0
-  %nop8917 = alloca i1, i1 0
-  %nop8918 = alloca i1, i1 0
-  %nop8919 = alloca i1, i1 0
-  %nop8920 = alloca i1, i1 0
-  %nop8921 = alloca i1, i1 0
-  %nop8922 = alloca i1, i1 0
-  %nop8923 = alloca i1, i1 0
-  %nop8924 = alloca i1, i1 0
-  %nop8925 = alloca i1, i1 0
-  %nop8926 = alloca i1, i1 0
-  %nop8927 = alloca i1, i1 0
-  %nop8928 = alloca i1, i1 0
-  %nop8929 = alloca i1, i1 0
-  %nop8930 = alloca i1, i1 0
-  %nop8931 = alloca i1, i1 0
-  %nop8932 = alloca i1, i1 0
-  %nop8933 = alloca i1, i1 0
-  %nop8934 = alloca i1, i1 0
-  %nop8935 = alloca i1, i1 0
-  %nop8936 = alloca i1, i1 0
-  %nop8937 = alloca i1, i1 0
-  %nop8938 = alloca i1, i1 0
-  %nop8939 = alloca i1, i1 0
-  %nop8940 = alloca i1, i1 0
-  %nop8941 = alloca i1, i1 0
-  %nop8942 = alloca i1, i1 0
-  %nop8943 = alloca i1, i1 0
-  %nop8944 = alloca i1, i1 0
-  %nop8945 = alloca i1, i1 0
-  %nop8946 = alloca i1, i1 0
-  %nop8947 = alloca i1, i1 0
-  %nop8948 = alloca i1, i1 0
-  %nop8949 = alloca i1, i1 0
-  %nop8950 = alloca i1, i1 0
-  %nop8951 = alloca i1, i1 0
-  %nop8952 = alloca i1, i1 0
-  %nop8953 = alloca i1, i1 0
-  %nop8954 = alloca i1, i1 0
-  %nop8955 = alloca i1, i1 0
-  %nop8956 = alloca i1, i1 0
-  %nop8957 = alloca i1, i1 0
-  %nop8958 = alloca i1, i1 0
-  %nop8959 = alloca i1, i1 0
-  %nop8960 = alloca i1, i1 0
-  %nop8961 = alloca i1, i1 0
-  %nop8962 = alloca i1, i1 0
-  %nop8963 = alloca i1, i1 0
-  %nop8964 = alloca i1, i1 0
-  %nop8965 = alloca i1, i1 0
-  %nop8966 = alloca i1, i1 0
-  %nop8967 = alloca i1, i1 0
-  %nop8968 = alloca i1, i1 0
-  %nop8969 = alloca i1, i1 0
-  %nop8970 = alloca i1, i1 0
-  %nop8971 = alloca i1, i1 0
-  %nop8972 = alloca i1, i1 0
-  %nop8973 = alloca i1, i1 0
-  %nop8974 = alloca i1, i1 0
-  %nop8975 = alloca i1, i1 0
-  %nop8976 = alloca i1, i1 0
-  %nop8977 = alloca i1, i1 0
-  %nop8978 = alloca i1, i1 0
-  %nop8979 = alloca i1, i1 0
-  %nop8980 = alloca i1, i1 0
-  %nop8981 = alloca i1, i1 0
-  %nop8982 = alloca i1, i1 0
-  %nop8983 = alloca i1, i1 0
-  %nop8984 = alloca i1, i1 0
-  %nop8985 = alloca i1, i1 0
-  %nop8986 = alloca i1, i1 0
-  %nop8987 = alloca i1, i1 0
-  %nop8988 = alloca i1, i1 0
-  %nop8989 = alloca i1, i1 0
-  %nop8990 = alloca i1, i1 0
-  %nop8991 = alloca i1, i1 0
-  %nop8992 = alloca i1, i1 0
-  %nop8993 = alloca i1, i1 0
-  %nop8994 = alloca i1, i1 0
-  %nop8995 = alloca i1, i1 0
-  %nop8996 = alloca i1, i1 0
-  %nop8997 = alloca i1, i1 0
-  %nop8998 = alloca i1, i1 0
-  %nop8999 = alloca i1, i1 0
-  %nop9000 = alloca i1, i1 0
-  %nop9001 = alloca i1, i1 0
-  %nop9002 = alloca i1, i1 0
-  %nop9003 = alloca i1, i1 0
-  %nop9004 = alloca i1, i1 0
-  %nop9005 = alloca i1, i1 0
-  %nop9006 = alloca i1, i1 0
-  %nop9007 = alloca i1, i1 0
-  %nop9008 = alloca i1, i1 0
-  %nop9009 = alloca i1, i1 0
-  %nop9010 = alloca i1, i1 0
-  %nop9011 = alloca i1, i1 0
-  %nop9012 = alloca i1, i1 0
-  %nop9013 = alloca i1, i1 0
-  %nop9014 = alloca i1, i1 0
-  %nop9015 = alloca i1, i1 0
-  %nop9016 = alloca i1, i1 0
-  %nop9017 = alloca i1, i1 0
-  %nop9018 = alloca i1, i1 0
-  %nop9019 = alloca i1, i1 0
-  %nop9020 = alloca i1, i1 0
-  %nop9021 = alloca i1, i1 0
-  %nop9022 = alloca i1, i1 0
-  %nop9023 = alloca i1, i1 0
-  %nop9024 = alloca i1, i1 0
-  %nop9025 = alloca i1, i1 0
-  %nop9026 = alloca i1, i1 0
-  %nop9027 = alloca i1, i1 0
-  %nop9028 = alloca i1, i1 0
-  %nop9029 = alloca i1, i1 0
-  %nop9030 = alloca i1, i1 0
-  %nop9031 = alloca i1, i1 0
-  %nop9032 = alloca i1, i1 0
-  %nop9033 = alloca i1, i1 0
-  %nop9034 = alloca i1, i1 0
-  %nop9035 = alloca i1, i1 0
-  %nop9036 = alloca i1, i1 0
-  %nop9037 = alloca i1, i1 0
-  %nop9038 = alloca i1, i1 0
-  %nop9039 = alloca i1, i1 0
-  %nop9040 = alloca i1, i1 0
-  %nop9041 = alloca i1, i1 0
-  %nop9042 = alloca i1, i1 0
-  %nop9043 = alloca i1, i1 0
-  %nop9044 = alloca i1, i1 0
-  %nop9045 = alloca i1, i1 0
-  %nop9046 = alloca i1, i1 0
-  %nop9047 = alloca i1, i1 0
-  %nop9048 = alloca i1, i1 0
-  %nop9049 = alloca i1, i1 0
-  %nop9050 = alloca i1, i1 0
-  %nop9051 = alloca i1, i1 0
-  %nop9052 = alloca i1, i1 0
-  %nop9053 = alloca i1, i1 0
-  %nop9054 = alloca i1, i1 0
-  %nop9055 = alloca i1, i1 0
-  %nop9056 = alloca i1, i1 0
-  %nop9057 = alloca i1, i1 0
-  %nop9058 = alloca i1, i1 0
-  %nop9059 = alloca i1, i1 0
-  %nop9060 = alloca i1, i1 0
-  %nop9061 = alloca i1, i1 0
-  %nop9062 = alloca i1, i1 0
-  %nop9063 = alloca i1, i1 0
-  %nop9064 = alloca i1, i1 0
-  %nop9065 = alloca i1, i1 0
-  %nop9066 = alloca i1, i1 0
-  %nop9067 = alloca i1, i1 0
-  %nop9068 = alloca i1, i1 0
-  %nop9069 = alloca i1, i1 0
-  %nop9070 = alloca i1, i1 0
-  %nop9071 = alloca i1, i1 0
-  %nop9072 = alloca i1, i1 0
-  %nop9073 = alloca i1, i1 0
-  %nop9074 = alloca i1, i1 0
-  %nop9075 = alloca i1, i1 0
-  %nop9076 = alloca i1, i1 0
-  %nop9077 = alloca i1, i1 0
-  %nop9078 = alloca i1, i1 0
-  %nop9079 = alloca i1, i1 0
-  %nop9080 = alloca i1, i1 0
-  %nop9081 = alloca i1, i1 0
-  %nop9082 = alloca i1, i1 0
-  %nop9083 = alloca i1, i1 0
-  %nop9084 = alloca i1, i1 0
-  %nop9085 = alloca i1, i1 0
-  %nop9086 = alloca i1, i1 0
-  %nop9087 = alloca i1, i1 0
-  %nop9088 = alloca i1, i1 0
-  %nop9089 = alloca i1, i1 0
-  %nop9090 = alloca i1, i1 0
-  %nop9091 = alloca i1, i1 0
-  %nop9092 = alloca i1, i1 0
-  %nop9093 = alloca i1, i1 0
-  %nop9094 = alloca i1, i1 0
-  %nop9095 = alloca i1, i1 0
-  %nop9096 = alloca i1, i1 0
-  %nop9097 = alloca i1, i1 0
-  %nop9098 = alloca i1, i1 0
-  %nop9099 = alloca i1, i1 0
-  %nop9100 = alloca i1, i1 0
-  %nop9101 = alloca i1, i1 0
-  %nop9102 = alloca i1, i1 0
-  %nop9103 = alloca i1, i1 0
-  %nop9104 = alloca i1, i1 0
-  %nop9105 = alloca i1, i1 0
-  %nop9106 = alloca i1, i1 0
-  %nop9107 = alloca i1, i1 0
-  %nop9108 = alloca i1, i1 0
-  %nop9109 = alloca i1, i1 0
-  %nop9110 = alloca i1, i1 0
-  %nop9111 = alloca i1, i1 0
-  %nop9112 = alloca i1, i1 0
-  %nop9113 = alloca i1, i1 0
-  %nop9114 = alloca i1, i1 0
-  %nop9115 = alloca i1, i1 0
-  %nop9116 = alloca i1, i1 0
-  %nop9117 = alloca i1, i1 0
-  %nop9118 = alloca i1, i1 0
-  %nop9119 = alloca i1, i1 0
-  %nop9120 = alloca i1, i1 0
-  %nop9121 = alloca i1, i1 0
-  %nop9122 = alloca i1, i1 0
-  %nop9123 = alloca i1, i1 0
-  %nop9124 = alloca i1, i1 0
-  %nop9125 = alloca i1, i1 0
-  %nop9126 = alloca i1, i1 0
-  %nop9127 = alloca i1, i1 0
-  %nop9128 = alloca i1, i1 0
-  %nop9129 = alloca i1, i1 0
-  %nop9130 = alloca i1, i1 0
-  %nop9131 = alloca i1, i1 0
-  %nop9132 = alloca i1, i1 0
-  %nop9133 = alloca i1, i1 0
-  %nop9134 = alloca i1, i1 0
-  %nop9135 = alloca i1, i1 0
-  %nop9136 = alloca i1, i1 0
-  %nop9137 = alloca i1, i1 0
-  %nop9138 = alloca i1, i1 0
-  %nop9139 = alloca i1, i1 0
-  %nop9140 = alloca i1, i1 0
-  %nop9141 = alloca i1, i1 0
-  %nop9142 = alloca i1, i1 0
-  %nop9143 = alloca i1, i1 0
-  %nop9144 = alloca i1, i1 0
-  %nop9145 = alloca i1, i1 0
-  %nop9146 = alloca i1, i1 0
-  %nop9147 = alloca i1, i1 0
-  %nop9148 = alloca i1, i1 0
-  %nop9149 = alloca i1, i1 0
-  %nop9150 = alloca i1, i1 0
-  %nop9151 = alloca i1, i1 0
-  %nop9152 = alloca i1, i1 0
-  %nop9153 = alloca i1, i1 0
-  %nop9154 = alloca i1, i1 0
-  %nop9155 = alloca i1, i1 0
-  %nop9156 = alloca i1, i1 0
-  %nop9157 = alloca i1, i1 0
-  %nop9158 = alloca i1, i1 0
-  %nop9159 = alloca i1, i1 0
-  %nop9160 = alloca i1, i1 0
-  %nop9161 = alloca i1, i1 0
-  %nop9162 = alloca i1, i1 0
-  %nop9163 = alloca i1, i1 0
-  %nop9164 = alloca i1, i1 0
-  %nop9165 = alloca i1, i1 0
-  %nop9166 = alloca i1, i1 0
-  %nop9167 = alloca i1, i1 0
-  %nop9168 = alloca i1, i1 0
-  %nop9169 = alloca i1, i1 0
-  %nop9170 = alloca i1, i1 0
-  %nop9171 = alloca i1, i1 0
-  %nop9172 = alloca i1, i1 0
-  %nop9173 = alloca i1, i1 0
-  %nop9174 = alloca i1, i1 0
-  %nop9175 = alloca i1, i1 0
-  %nop9176 = alloca i1, i1 0
-  %nop9177 = alloca i1, i1 0
-  %nop9178 = alloca i1, i1 0
-  %nop9179 = alloca i1, i1 0
-  %nop9180 = alloca i1, i1 0
-  %nop9181 = alloca i1, i1 0
-  %nop9182 = alloca i1, i1 0
-  %nop9183 = alloca i1, i1 0
-  %nop9184 = alloca i1, i1 0
-  %nop9185 = alloca i1, i1 0
-  %nop9186 = alloca i1, i1 0
-  %nop9187 = alloca i1, i1 0
-  %nop9188 = alloca i1, i1 0
-  %nop9189 = alloca i1, i1 0
-  %nop9190 = alloca i1, i1 0
-  %nop9191 = alloca i1, i1 0
-  %nop9192 = alloca i1, i1 0
-  %nop9193 = alloca i1, i1 0
-  %nop9194 = alloca i1, i1 0
-  %nop9195 = alloca i1, i1 0
-  %nop9196 = alloca i1, i1 0
-  %nop9197 = alloca i1, i1 0
-  %nop9198 = alloca i1, i1 0
-  %nop9199 = alloca i1, i1 0
-  %nop9200 = alloca i1, i1 0
-  %nop9201 = alloca i1, i1 0
-  %nop9202 = alloca i1, i1 0
-  %nop9203 = alloca i1, i1 0
-  %nop9204 = alloca i1, i1 0
-  %nop9205 = alloca i1, i1 0
-  %nop9206 = alloca i1, i1 0
-  %nop9207 = alloca i1, i1 0
-  %nop9208 = alloca i1, i1 0
-  %nop9209 = alloca i1, i1 0
-  %nop9210 = alloca i1, i1 0
-  %nop9211 = alloca i1, i1 0
-  %nop9212 = alloca i1, i1 0
-  %nop9213 = alloca i1, i1 0
-  %nop9214 = alloca i1, i1 0
-  %nop9215 = alloca i1, i1 0
-  %nop9216 = alloca i1, i1 0
-  %nop9217 = alloca i1, i1 0
-  %nop9218 = alloca i1, i1 0
-  %nop9219 = alloca i1, i1 0
-  %nop9220 = alloca i1, i1 0
-  %nop9221 = alloca i1, i1 0
-  %nop9222 = alloca i1, i1 0
-  %nop9223 = alloca i1, i1 0
-  %nop9224 = alloca i1, i1 0
-  %nop9225 = alloca i1, i1 0
-  %nop9226 = alloca i1, i1 0
-  %nop9227 = alloca i1, i1 0
-  %nop9228 = alloca i1, i1 0
-  %nop9229 = alloca i1, i1 0
-  %nop9230 = alloca i1, i1 0
-  %nop9231 = alloca i1, i1 0
-  %nop9232 = alloca i1, i1 0
-  %nop9233 = alloca i1, i1 0
-  %nop9234 = alloca i1, i1 0
-  %nop9235 = alloca i1, i1 0
-  %nop9236 = alloca i1, i1 0
-  %nop9237 = alloca i1, i1 0
-  %nop9238 = alloca i1, i1 0
-  %nop9239 = alloca i1, i1 0
-  %nop9240 = alloca i1, i1 0
-  %nop9241 = alloca i1, i1 0
-  %nop9242 = alloca i1, i1 0
-  %nop9243 = alloca i1, i1 0
-  %nop9244 = alloca i1, i1 0
-  %nop9245 = alloca i1, i1 0
-  %nop9246 = alloca i1, i1 0
-  %nop9247 = alloca i1, i1 0
-  %nop9248 = alloca i1, i1 0
-  %nop9249 = alloca i1, i1 0
-  %nop9250 = alloca i1, i1 0
-  %nop9251 = alloca i1, i1 0
-  %nop9252 = alloca i1, i1 0
-  %nop9253 = alloca i1, i1 0
-  %nop9254 = alloca i1, i1 0
-  %nop9255 = alloca i1, i1 0
-  %nop9256 = alloca i1, i1 0
-  %nop9257 = alloca i1, i1 0
-  %nop9258 = alloca i1, i1 0
-  %nop9259 = alloca i1, i1 0
-  %nop9260 = alloca i1, i1 0
-  %nop9261 = alloca i1, i1 0
-  %nop9262 = alloca i1, i1 0
-  %nop9263 = alloca i1, i1 0
-  %nop9264 = alloca i1, i1 0
-  %nop9265 = alloca i1, i1 0
-  %nop9266 = alloca i1, i1 0
-  %nop9267 = alloca i1, i1 0
-  %nop9268 = alloca i1, i1 0
-  %nop9269 = alloca i1, i1 0
-  %nop9270 = alloca i1, i1 0
-  %nop9271 = alloca i1, i1 0
-  %nop9272 = alloca i1, i1 0
-  %nop9273 = alloca i1, i1 0
-  %nop9274 = alloca i1, i1 0
-  %nop9275 = alloca i1, i1 0
-  %nop9276 = alloca i1, i1 0
-  %nop9277 = alloca i1, i1 0
-  %nop9278 = alloca i1, i1 0
-  %nop9279 = alloca i1, i1 0
-  %nop9280 = alloca i1, i1 0
-  %nop9281 = alloca i1, i1 0
-  %nop9282 = alloca i1, i1 0
-  %nop9283 = alloca i1, i1 0
-  %nop9284 = alloca i1, i1 0
-  %nop9285 = alloca i1, i1 0
-  %nop9286 = alloca i1, i1 0
-  %nop9287 = alloca i1, i1 0
-  %nop9288 = alloca i1, i1 0
-  %nop9289 = alloca i1, i1 0
-  %nop9290 = alloca i1, i1 0
-  %nop9291 = alloca i1, i1 0
-  %nop9292 = alloca i1, i1 0
-  %nop9293 = alloca i1, i1 0
-  %nop9294 = alloca i1, i1 0
-  %nop9295 = alloca i1, i1 0
-  %nop9296 = alloca i1, i1 0
-  %nop9297 = alloca i1, i1 0
-  %nop9298 = alloca i1, i1 0
-  %nop9299 = alloca i1, i1 0
-  %nop9300 = alloca i1, i1 0
-  %nop9301 = alloca i1, i1 0
-  %nop9302 = alloca i1, i1 0
-  %nop9303 = alloca i1, i1 0
-  %nop9304 = alloca i1, i1 0
-  %nop9305 = alloca i1, i1 0
-  %nop9306 = alloca i1, i1 0
-  %nop9307 = alloca i1, i1 0
-  %nop9308 = alloca i1, i1 0
-  %nop9309 = alloca i1, i1 0
-  %nop9310 = alloca i1, i1 0
-  %nop9311 = alloca i1, i1 0
-  %nop9312 = alloca i1, i1 0
-  %nop9313 = alloca i1, i1 0
-  %nop9314 = alloca i1, i1 0
-  %nop9315 = alloca i1, i1 0
-  %nop9316 = alloca i1, i1 0
-  %nop9317 = alloca i1, i1 0
-  %nop9318 = alloca i1, i1 0
-  %nop9319 = alloca i1, i1 0
-  %nop9320 = alloca i1, i1 0
-  %nop9321 = alloca i1, i1 0
-  %nop9322 = alloca i1, i1 0
-  %nop9323 = alloca i1, i1 0
-  %nop9324 = alloca i1, i1 0
-  %nop9325 = alloca i1, i1 0
-  %nop9326 = alloca i1, i1 0
-  %nop9327 = alloca i1, i1 0
-  %nop9328 = alloca i1, i1 0
-  %nop9329 = alloca i1, i1 0
-  %nop9330 = alloca i1, i1 0
-  %nop9331 = alloca i1, i1 0
-  %nop9332 = alloca i1, i1 0
-  %nop9333 = alloca i1, i1 0
-  %nop9334 = alloca i1, i1 0
-  %nop9335 = alloca i1, i1 0
-  %nop9336 = alloca i1, i1 0
-  %nop9337 = alloca i1, i1 0
-  %nop9338 = alloca i1, i1 0
-  %nop9339 = alloca i1, i1 0
-  %nop9340 = alloca i1, i1 0
-  %nop9341 = alloca i1, i1 0
-  %nop9342 = alloca i1, i1 0
-  %nop9343 = alloca i1, i1 0
-  %nop9344 = alloca i1, i1 0
-  %nop9345 = alloca i1, i1 0
-  %nop9346 = alloca i1, i1 0
-  %nop9347 = alloca i1, i1 0
-  %nop9348 = alloca i1, i1 0
-  %nop9349 = alloca i1, i1 0
-  %nop9350 = alloca i1, i1 0
-  %nop9351 = alloca i1, i1 0
-  %nop9352 = alloca i1, i1 0
-  %nop9353 = alloca i1, i1 0
-  %nop9354 = alloca i1, i1 0
-  %nop9355 = alloca i1, i1 0
-  %nop9356 = alloca i1, i1 0
-  %nop9357 = alloca i1, i1 0
-  %nop9358 = alloca i1, i1 0
-  %nop9359 = alloca i1, i1 0
-  %nop9360 = alloca i1, i1 0
-  %nop9361 = alloca i1, i1 0
-  %nop9362 = alloca i1, i1 0
-  %nop9363 = alloca i1, i1 0
-  %nop9364 = alloca i1, i1 0
-  %nop9365 = alloca i1, i1 0
-  %nop9366 = alloca i1, i1 0
-  %nop9367 = alloca i1, i1 0
-  %nop9368 = alloca i1, i1 0
-  %nop9369 = alloca i1, i1 0
-  %nop9370 = alloca i1, i1 0
-  %nop9371 = alloca i1, i1 0
-  %nop9372 = alloca i1, i1 0
-  %nop9373 = alloca i1, i1 0
-  %nop9374 = alloca i1, i1 0
-  %nop9375 = alloca i1, i1 0
-  %nop9376 = alloca i1, i1 0
-  %nop9377 = alloca i1, i1 0
-  %nop9378 = alloca i1, i1 0
-  %nop9379 = alloca i1, i1 0
-  %nop9380 = alloca i1, i1 0
-  %nop9381 = alloca i1, i1 0
-  %nop9382 = alloca i1, i1 0
-  %nop9383 = alloca i1, i1 0
-  %nop9384 = alloca i1, i1 0
-  %nop9385 = alloca i1, i1 0
-  %nop9386 = alloca i1, i1 0
-  %nop9387 = alloca i1, i1 0
-  %nop9388 = alloca i1, i1 0
-  %nop9389 = alloca i1, i1 0
-  %nop9390 = alloca i1, i1 0
-  %nop9391 = alloca i1, i1 0
-  %nop9392 = alloca i1, i1 0
-  %nop9393 = alloca i1, i1 0
-  %nop9394 = alloca i1, i1 0
-  %nop9395 = alloca i1, i1 0
-  %nop9396 = alloca i1, i1 0
-  %nop9397 = alloca i1, i1 0
-  %nop9398 = alloca i1, i1 0
-  %nop9399 = alloca i1, i1 0
-  %nop9400 = alloca i1, i1 0
-  %nop9401 = alloca i1, i1 0
-  %nop9402 = alloca i1, i1 0
-  %nop9403 = alloca i1, i1 0
-  %nop9404 = alloca i1, i1 0
-  %nop9405 = alloca i1, i1 0
-  %nop9406 = alloca i1, i1 0
-  %nop9407 = alloca i1, i1 0
-  %nop9408 = alloca i1, i1 0
-  %nop9409 = alloca i1, i1 0
-  %nop9410 = alloca i1, i1 0
-  %nop9411 = alloca i1, i1 0
-  %nop9412 = alloca i1, i1 0
-  %nop9413 = alloca i1, i1 0
-  %nop9414 = alloca i1, i1 0
-  %nop9415 = alloca i1, i1 0
-  %nop9416 = alloca i1, i1 0
-  %nop9417 = alloca i1, i1 0
-  %nop9418 = alloca i1, i1 0
-  %nop9419 = alloca i1, i1 0
-  %nop9420 = alloca i1, i1 0
-  %nop9421 = alloca i1, i1 0
-  %nop9422 = alloca i1, i1 0
-  %nop9423 = alloca i1, i1 0
-  %nop9424 = alloca i1, i1 0
-  %nop9425 = alloca i1, i1 0
-  %nop9426 = alloca i1, i1 0
-  %nop9427 = alloca i1, i1 0
-  %nop9428 = alloca i1, i1 0
-  %nop9429 = alloca i1, i1 0
-  %nop9430 = alloca i1, i1 0
-  %nop9431 = alloca i1, i1 0
-  %nop9432 = alloca i1, i1 0
-  %nop9433 = alloca i1, i1 0
-  %nop9434 = alloca i1, i1 0
-  %nop9435 = alloca i1, i1 0
-  %nop9436 = alloca i1, i1 0
-  %nop9437 = alloca i1, i1 0
-  %nop9438 = alloca i1, i1 0
-  %nop9439 = alloca i1, i1 0
-  %nop9440 = alloca i1, i1 0
-  %nop9441 = alloca i1, i1 0
-  %nop9442 = alloca i1, i1 0
-  %nop9443 = alloca i1, i1 0
-  %nop9444 = alloca i1, i1 0
-  %nop9445 = alloca i1, i1 0
-  %nop9446 = alloca i1, i1 0
-  %nop9447 = alloca i1, i1 0
-  %nop9448 = alloca i1, i1 0
-  %nop9449 = alloca i1, i1 0
-  %nop9450 = alloca i1, i1 0
-  %nop9451 = alloca i1, i1 0
-  %nop9452 = alloca i1, i1 0
-  %nop9453 = alloca i1, i1 0
-  %nop9454 = alloca i1, i1 0
-  %nop9455 = alloca i1, i1 0
-  %nop9456 = alloca i1, i1 0
-  %nop9457 = alloca i1, i1 0
-  %nop9458 = alloca i1, i1 0
-  %nop9459 = alloca i1, i1 0
-  %nop9460 = alloca i1, i1 0
-  %nop9461 = alloca i1, i1 0
-  %nop9462 = alloca i1, i1 0
-  %nop9463 = alloca i1, i1 0
-  %nop9464 = alloca i1, i1 0
-  %nop9465 = alloca i1, i1 0
-  %nop9466 = alloca i1, i1 0
-  %nop9467 = alloca i1, i1 0
-  %nop9468 = alloca i1, i1 0
-  %nop9469 = alloca i1, i1 0
-  %nop9470 = alloca i1, i1 0
-  %nop9471 = alloca i1, i1 0
-  %nop9472 = alloca i1, i1 0
-  %nop9473 = alloca i1, i1 0
-  %nop9474 = alloca i1, i1 0
-  %nop9475 = alloca i1, i1 0
-  %nop9476 = alloca i1, i1 0
-  %nop9477 = alloca i1, i1 0
-  %nop9478 = alloca i1, i1 0
-  %nop9479 = alloca i1, i1 0
-  %nop9480 = alloca i1, i1 0
-  %nop9481 = alloca i1, i1 0
-  %nop9482 = alloca i1, i1 0
-  %nop9483 = alloca i1, i1 0
-  %nop9484 = alloca i1, i1 0
-  %nop9485 = alloca i1, i1 0
-  %nop9486 = alloca i1, i1 0
-  %nop9487 = alloca i1, i1 0
-  %nop9488 = alloca i1, i1 0
-  %nop9489 = alloca i1, i1 0
-  %nop9490 = alloca i1, i1 0
-  %nop9491 = alloca i1, i1 0
-  %nop9492 = alloca i1, i1 0
-  %nop9493 = alloca i1, i1 0
-  %nop9494 = alloca i1, i1 0
-  %nop9495 = alloca i1, i1 0
-  %nop9496 = alloca i1, i1 0
-  %nop9497 = alloca i1, i1 0
-  %nop9498 = alloca i1, i1 0
-  %nop9499 = alloca i1, i1 0
-  %nop9500 = alloca i1, i1 0
-  %nop9501 = alloca i1, i1 0
-  %nop9502 = alloca i1, i1 0
-  %nop9503 = alloca i1, i1 0
-  %nop9504 = alloca i1, i1 0
-  %nop9505 = alloca i1, i1 0
-  %nop9506 = alloca i1, i1 0
-  %nop9507 = alloca i1, i1 0
-  %nop9508 = alloca i1, i1 0
-  %nop9509 = alloca i1, i1 0
-  %nop9510 = alloca i1, i1 0
-  %nop9511 = alloca i1, i1 0
-  %nop9512 = alloca i1, i1 0
-  %nop9513 = alloca i1, i1 0
-  %nop9514 = alloca i1, i1 0
-  %nop9515 = alloca i1, i1 0
-  %nop9516 = alloca i1, i1 0
-  %nop9517 = alloca i1, i1 0
-  %nop9518 = alloca i1, i1 0
-  %nop9519 = alloca i1, i1 0
-  %nop9520 = alloca i1, i1 0
-  %nop9521 = alloca i1, i1 0
-  %nop9522 = alloca i1, i1 0
-  %nop9523 = alloca i1, i1 0
-  %nop9524 = alloca i1, i1 0
-  %nop9525 = alloca i1, i1 0
-  %nop9526 = alloca i1, i1 0
-  %nop9527 = alloca i1, i1 0
-  %nop9528 = alloca i1, i1 0
-  %nop9529 = alloca i1, i1 0
-  %nop9530 = alloca i1, i1 0
-  %nop9531 = alloca i1, i1 0
-  %nop9532 = alloca i1, i1 0
-  %nop9533 = alloca i1, i1 0
-  %nop9534 = alloca i1, i1 0
-  %nop9535 = alloca i1, i1 0
-  %nop9536 = alloca i1, i1 0
-  %nop9537 = alloca i1, i1 0
-  %nop9538 = alloca i1, i1 0
-  %nop9539 = alloca i1, i1 0
-  %nop9540 = alloca i1, i1 0
-  %nop9541 = alloca i1, i1 0
-  %nop9542 = alloca i1, i1 0
-  %nop9543 = alloca i1, i1 0
-  %nop9544 = alloca i1, i1 0
-  %nop9545 = alloca i1, i1 0
-  %nop9546 = alloca i1, i1 0
-  %nop9547 = alloca i1, i1 0
-  %nop9548 = alloca i1, i1 0
-  %nop9549 = alloca i1, i1 0
-  %nop9550 = alloca i1, i1 0
-  %nop9551 = alloca i1, i1 0
-  %nop9552 = alloca i1, i1 0
-  %nop9553 = alloca i1, i1 0
-  %nop9554 = alloca i1, i1 0
-  %nop9555 = alloca i1, i1 0
-  %nop9556 = alloca i1, i1 0
-  %nop9557 = alloca i1, i1 0
-  %nop9558 = alloca i1, i1 0
-  %nop9559 = alloca i1, i1 0
-  %nop9560 = alloca i1, i1 0
-  %nop9561 = alloca i1, i1 0
-  %nop9562 = alloca i1, i1 0
-  %nop9563 = alloca i1, i1 0
-  %nop9564 = alloca i1, i1 0
-  %nop9565 = alloca i1, i1 0
-  %nop9566 = alloca i1, i1 0
-  %nop9567 = alloca i1, i1 0
-  %nop9568 = alloca i1, i1 0
-  %nop9569 = alloca i1, i1 0
-  %nop9570 = alloca i1, i1 0
-  %nop9571 = alloca i1, i1 0
-  %nop9572 = alloca i1, i1 0
-  %nop9573 = alloca i1, i1 0
-  %nop9574 = alloca i1, i1 0
-  %nop9575 = alloca i1, i1 0
-  %nop9576 = alloca i1, i1 0
-  %nop9577 = alloca i1, i1 0
-  %nop9578 = alloca i1, i1 0
-  %nop9579 = alloca i1, i1 0
-  %nop9580 = alloca i1, i1 0
-  %nop9581 = alloca i1, i1 0
-  %nop9582 = alloca i1, i1 0
-  %nop9583 = alloca i1, i1 0
-  %nop9584 = alloca i1, i1 0
-  %nop9585 = alloca i1, i1 0
-  %nop9586 = alloca i1, i1 0
-  %nop9587 = alloca i1, i1 0
-  %nop9588 = alloca i1, i1 0
-  %nop9589 = alloca i1, i1 0
-  %nop9590 = alloca i1, i1 0
-  %nop9591 = alloca i1, i1 0
-  %nop9592 = alloca i1, i1 0
-  %nop9593 = alloca i1, i1 0
-  %nop9594 = alloca i1, i1 0
-  %nop9595 = alloca i1, i1 0
-  %nop9596 = alloca i1, i1 0
-  %nop9597 = alloca i1, i1 0
-  %nop9598 = alloca i1, i1 0
-  %nop9599 = alloca i1, i1 0
-  %nop9600 = alloca i1, i1 0
-  %nop9601 = alloca i1, i1 0
-  %nop9602 = alloca i1, i1 0
-  %nop9603 = alloca i1, i1 0
-  %nop9604 = alloca i1, i1 0
-  %nop9605 = alloca i1, i1 0
-  %nop9606 = alloca i1, i1 0
-  %nop9607 = alloca i1, i1 0
-  %nop9608 = alloca i1, i1 0
-  %nop9609 = alloca i1, i1 0
-  %nop9610 = alloca i1, i1 0
-  %nop9611 = alloca i1, i1 0
-  %nop9612 = alloca i1, i1 0
-  %nop9613 = alloca i1, i1 0
-  %nop9614 = alloca i1, i1 0
-  %nop9615 = alloca i1, i1 0
-  %nop9616 = alloca i1, i1 0
-  %nop9617 = alloca i1, i1 0
-  %nop9618 = alloca i1, i1 0
-  %nop9619 = alloca i1, i1 0
-  %nop9620 = alloca i1, i1 0
-  %nop9621 = alloca i1, i1 0
-  %nop9622 = alloca i1, i1 0
-  %nop9623 = alloca i1, i1 0
-  %nop9624 = alloca i1, i1 0
-  %nop9625 = alloca i1, i1 0
-  %nop9626 = alloca i1, i1 0
-  %nop9627 = alloca i1, i1 0
-  %nop9628 = alloca i1, i1 0
-  %nop9629 = alloca i1, i1 0
-  %nop9630 = alloca i1, i1 0
-  %nop9631 = alloca i1, i1 0
-  %nop9632 = alloca i1, i1 0
-  %nop9633 = alloca i1, i1 0
-  %nop9634 = alloca i1, i1 0
-  %nop9635 = alloca i1, i1 0
-  %nop9636 = alloca i1, i1 0
-  %nop9637 = alloca i1, i1 0
-  %nop9638 = alloca i1, i1 0
-  %nop9639 = alloca i1, i1 0
-  %nop9640 = alloca i1, i1 0
-  %nop9641 = alloca i1, i1 0
-  %nop9642 = alloca i1, i1 0
-  %nop9643 = alloca i1, i1 0
-  %nop9644 = alloca i1, i1 0
-  %nop9645 = alloca i1, i1 0
-  %nop9646 = alloca i1, i1 0
-  %nop9647 = alloca i1, i1 0
-  %nop9648 = alloca i1, i1 0
-  %nop9649 = alloca i1, i1 0
-  %nop9650 = alloca i1, i1 0
-  %nop9651 = alloca i1, i1 0
-  %nop9652 = alloca i1, i1 0
-  %nop9653 = alloca i1, i1 0
-  %nop9654 = alloca i1, i1 0
-  %nop9655 = alloca i1, i1 0
-  %nop9656 = alloca i1, i1 0
-  %nop9657 = alloca i1, i1 0
-  %nop9658 = alloca i1, i1 0
-  %nop9659 = alloca i1, i1 0
-  %nop9660 = alloca i1, i1 0
-  %nop9661 = alloca i1, i1 0
-  %nop9662 = alloca i1, i1 0
-  %nop9663 = alloca i1, i1 0
-  %nop9664 = alloca i1, i1 0
-  %nop9665 = alloca i1, i1 0
-  %nop9666 = alloca i1, i1 0
-  %nop9667 = alloca i1, i1 0
-  %nop9668 = alloca i1, i1 0
-  %nop9669 = alloca i1, i1 0
-  %nop9670 = alloca i1, i1 0
-  %nop9671 = alloca i1, i1 0
-  %nop9672 = alloca i1, i1 0
-  %nop9673 = alloca i1, i1 0
-  %nop9674 = alloca i1, i1 0
-  %nop9675 = alloca i1, i1 0
-  %nop9676 = alloca i1, i1 0
-  %nop9677 = alloca i1, i1 0
-  %nop9678 = alloca i1, i1 0
-  %nop9679 = alloca i1, i1 0
-  %nop9680 = alloca i1, i1 0
-  %nop9681 = alloca i1, i1 0
-  %nop9682 = alloca i1, i1 0
-  %nop9683 = alloca i1, i1 0
-  %nop9684 = alloca i1, i1 0
-  %nop9685 = alloca i1, i1 0
-  %nop9686 = alloca i1, i1 0
-  %nop9687 = alloca i1, i1 0
-  %nop9688 = alloca i1, i1 0
-  %nop9689 = alloca i1, i1 0
-  %nop9690 = alloca i1, i1 0
-  %nop9691 = alloca i1, i1 0
-  %nop9692 = alloca i1, i1 0
-  %nop9693 = alloca i1, i1 0
-  %nop9694 = alloca i1, i1 0
-  %nop9695 = alloca i1, i1 0
-  %nop9696 = alloca i1, i1 0
-  %nop9697 = alloca i1, i1 0
-  %nop9698 = alloca i1, i1 0
-  %nop9699 = alloca i1, i1 0
-  %nop9700 = alloca i1, i1 0
-  %nop9701 = alloca i1, i1 0
-  %nop9702 = alloca i1, i1 0
-  %nop9703 = alloca i1, i1 0
-  %nop9704 = alloca i1, i1 0
-  %nop9705 = alloca i1, i1 0
-  %nop9706 = alloca i1, i1 0
-  %nop9707 = alloca i1, i1 0
-  %nop9708 = alloca i1, i1 0
-  %nop9709 = alloca i1, i1 0
-  %nop9710 = alloca i1, i1 0
-  %nop9711 = alloca i1, i1 0
-  %nop9712 = alloca i1, i1 0
-  %nop9713 = alloca i1, i1 0
-  %nop9714 = alloca i1, i1 0
-  %nop9715 = alloca i1, i1 0
-  %nop9716 = alloca i1, i1 0
-  %nop9717 = alloca i1, i1 0
-  %nop9718 = alloca i1, i1 0
-  %nop9719 = alloca i1, i1 0
-  %nop9720 = alloca i1, i1 0
-  %nop9721 = alloca i1, i1 0
-  %nop9722 = alloca i1, i1 0
-  %nop9723 = alloca i1, i1 0
-  %nop9724 = alloca i1, i1 0
-  %nop9725 = alloca i1, i1 0
-  %nop9726 = alloca i1, i1 0
-  %nop9727 = alloca i1, i1 0
-  %nop9728 = alloca i1, i1 0
-  %nop9729 = alloca i1, i1 0
-  %nop9730 = alloca i1, i1 0
-  %nop9731 = alloca i1, i1 0
-  %nop9732 = alloca i1, i1 0
-  %nop9733 = alloca i1, i1 0
-  %nop9734 = alloca i1, i1 0
-  %nop9735 = alloca i1, i1 0
-  %nop9736 = alloca i1, i1 0
-  %nop9737 = alloca i1, i1 0
-  %nop9738 = alloca i1, i1 0
-  %nop9739 = alloca i1, i1 0
-  %nop9740 = alloca i1, i1 0
-  %nop9741 = alloca i1, i1 0
-  %nop9742 = alloca i1, i1 0
-  %nop9743 = alloca i1, i1 0
-  %nop9744 = alloca i1, i1 0
-  %nop9745 = alloca i1, i1 0
-  %nop9746 = alloca i1, i1 0
-  %nop9747 = alloca i1, i1 0
-  %nop9748 = alloca i1, i1 0
-  %nop9749 = alloca i1, i1 0
-  %nop9750 = alloca i1, i1 0
-  %nop9751 = alloca i1, i1 0
-  %nop9752 = alloca i1, i1 0
-  %nop9753 = alloca i1, i1 0
-  %nop9754 = alloca i1, i1 0
-  %nop9755 = alloca i1, i1 0
-  %nop9756 = alloca i1, i1 0
-  %nop9757 = alloca i1, i1 0
-  %nop9758 = alloca i1, i1 0
-  %nop9759 = alloca i1, i1 0
-  %nop9760 = alloca i1, i1 0
-  %nop9761 = alloca i1, i1 0
-  %nop9762 = alloca i1, i1 0
-  %nop9763 = alloca i1, i1 0
-  %nop9764 = alloca i1, i1 0
-  %nop9765 = alloca i1, i1 0
-  %nop9766 = alloca i1, i1 0
-  %nop9767 = alloca i1, i1 0
-  %nop9768 = alloca i1, i1 0
-  %nop9769 = alloca i1, i1 0
-  %nop9770 = alloca i1, i1 0
-  %nop9771 = alloca i1, i1 0
-  %nop9772 = alloca i1, i1 0
-  %nop9773 = alloca i1, i1 0
-  %nop9774 = alloca i1, i1 0
-  %nop9775 = alloca i1, i1 0
-  %nop9776 = alloca i1, i1 0
-  %nop9777 = alloca i1, i1 0
-  %nop9778 = alloca i1, i1 0
-  %nop9779 = alloca i1, i1 0
-  %nop9780 = alloca i1, i1 0
-  %nop9781 = alloca i1, i1 0
-  %nop9782 = alloca i1, i1 0
-  %nop9783 = alloca i1, i1 0
-  %nop9784 = alloca i1, i1 0
-  %nop9785 = alloca i1, i1 0
-  %nop9786 = alloca i1, i1 0
-  %nop9787 = alloca i1, i1 0
-  %nop9788 = alloca i1, i1 0
-  %nop9789 = alloca i1, i1 0
-  %nop9790 = alloca i1, i1 0
-  %nop9791 = alloca i1, i1 0
-  %nop9792 = alloca i1, i1 0
-  %nop9793 = alloca i1, i1 0
-  %nop9794 = alloca i1, i1 0
-  %nop9795 = alloca i1, i1 0
-  %nop9796 = alloca i1, i1 0
-  %nop9797 = alloca i1, i1 0
-  %nop9798 = alloca i1, i1 0
-  %nop9799 = alloca i1, i1 0
-  %nop9800 = alloca i1, i1 0
-  %nop9801 = alloca i1, i1 0
-  %nop9802 = alloca i1, i1 0
-  %nop9803 = alloca i1, i1 0
-  %nop9804 = alloca i1, i1 0
-  %nop9805 = alloca i1, i1 0
-  %nop9806 = alloca i1, i1 0
-  %nop9807 = alloca i1, i1 0
-  %nop9808 = alloca i1, i1 0
-  %nop9809 = alloca i1, i1 0
-  %nop9810 = alloca i1, i1 0
-  %nop9811 = alloca i1, i1 0
-  %nop9812 = alloca i1, i1 0
-  %nop9813 = alloca i1, i1 0
-  %nop9814 = alloca i1, i1 0
-  %nop9815 = alloca i1, i1 0
-  %nop9816 = alloca i1, i1 0
-  %nop9817 = alloca i1, i1 0
-  %nop9818 = alloca i1, i1 0
-  %nop9819 = alloca i1, i1 0
-  %nop9820 = alloca i1, i1 0
-  %nop9821 = alloca i1, i1 0
-  %nop9822 = alloca i1, i1 0
-  %nop9823 = alloca i1, i1 0
-  %nop9824 = alloca i1, i1 0
-  %nop9825 = alloca i1, i1 0
-  %nop9826 = alloca i1, i1 0
-  %nop9827 = alloca i1, i1 0
-  %nop9828 = alloca i1, i1 0
-  %nop9829 = alloca i1, i1 0
-  %nop9830 = alloca i1, i1 0
-  %nop9831 = alloca i1, i1 0
-  %nop9832 = alloca i1, i1 0
-  %nop9833 = alloca i1, i1 0
-  %nop9834 = alloca i1, i1 0
-  %nop9835 = alloca i1, i1 0
-  %nop9836 = alloca i1, i1 0
-  %nop9837 = alloca i1, i1 0
-  %nop9838 = alloca i1, i1 0
-  %nop9839 = alloca i1, i1 0
-  %nop9840 = alloca i1, i1 0
-  %nop9841 = alloca i1, i1 0
-  %nop9842 = alloca i1, i1 0
-  %nop9843 = alloca i1, i1 0
-  %nop9844 = alloca i1, i1 0
-  %nop9845 = alloca i1, i1 0
-  %nop9846 = alloca i1, i1 0
-  %nop9847 = alloca i1, i1 0
-  %nop9848 = alloca i1, i1 0
-  %nop9849 = alloca i1, i1 0
-  %nop9850 = alloca i1, i1 0
-  %nop9851 = alloca i1, i1 0
-  %nop9852 = alloca i1, i1 0
-  %nop9853 = alloca i1, i1 0
-  %nop9854 = alloca i1, i1 0
-  %nop9855 = alloca i1, i1 0
-  %nop9856 = alloca i1, i1 0
-  %nop9857 = alloca i1, i1 0
-  %nop9858 = alloca i1, i1 0
-  %nop9859 = alloca i1, i1 0
-  %nop9860 = alloca i1, i1 0
-  %nop9861 = alloca i1, i1 0
-  %nop9862 = alloca i1, i1 0
-  %nop9863 = alloca i1, i1 0
-  %nop9864 = alloca i1, i1 0
-  %nop9865 = alloca i1, i1 0
-  %nop9866 = alloca i1, i1 0
-  %nop9867 = alloca i1, i1 0
-  %nop9868 = alloca i1, i1 0
-  %nop9869 = alloca i1, i1 0
-  %nop9870 = alloca i1, i1 0
-  %nop9871 = alloca i1, i1 0
-  %nop9872 = alloca i1, i1 0
-  %nop9873 = alloca i1, i1 0
-  %nop9874 = alloca i1, i1 0
-  %nop9875 = alloca i1, i1 0
-  %nop9876 = alloca i1, i1 0
-  %nop9877 = alloca i1, i1 0
-  %nop9878 = alloca i1, i1 0
-  %nop9879 = alloca i1, i1 0
-  %nop9880 = alloca i1, i1 0
-  %nop9881 = alloca i1, i1 0
-  %nop9882 = alloca i1, i1 0
-  %nop9883 = alloca i1, i1 0
-  %nop9884 = alloca i1, i1 0
-  %nop9885 = alloca i1, i1 0
-  %nop9886 = alloca i1, i1 0
-  %nop9887 = alloca i1, i1 0
-  %nop9888 = alloca i1, i1 0
-  %nop9889 = alloca i1, i1 0
-  %nop9890 = alloca i1, i1 0
-  %nop9891 = alloca i1, i1 0
-  %nop9892 = alloca i1, i1 0
-  %nop9893 = alloca i1, i1 0
-  %nop9894 = alloca i1, i1 0
-  %nop9895 = alloca i1, i1 0
-  %nop9896 = alloca i1, i1 0
-  %nop9897 = alloca i1, i1 0
-  %nop9898 = alloca i1, i1 0
-  %nop9899 = alloca i1, i1 0
-  %nop9900 = alloca i1, i1 0
-  %nop9901 = alloca i1, i1 0
-  %nop9902 = alloca i1, i1 0
-  %nop9903 = alloca i1, i1 0
-  %nop9904 = alloca i1, i1 0
-  %nop9905 = alloca i1, i1 0
-  %nop9906 = alloca i1, i1 0
-  %nop9907 = alloca i1, i1 0
-  %nop9908 = alloca i1, i1 0
-  %nop9909 = alloca i1, i1 0
-  %nop9910 = alloca i1, i1 0
-  %nop9911 = alloca i1, i1 0
-  %nop9912 = alloca i1, i1 0
-  %nop9913 = alloca i1, i1 0
-  %nop9914 = alloca i1, i1 0
-  %nop9915 = alloca i1, i1 0
-  %nop9916 = alloca i1, i1 0
-  %nop9917 = alloca i1, i1 0
-  %nop9918 = alloca i1, i1 0
-  %nop9919 = alloca i1, i1 0
-  %nop9920 = alloca i1, i1 0
-  %nop9921 = alloca i1, i1 0
-  %nop9922 = alloca i1, i1 0
-  %nop9923 = alloca i1, i1 0
-  %nop9924 = alloca i1, i1 0
-  %nop9925 = alloca i1, i1 0
-  %nop9926 = alloca i1, i1 0
-  %nop9927 = alloca i1, i1 0
-  %nop9928 = alloca i1, i1 0
-  %nop9929 = alloca i1, i1 0
-  %nop9930 = alloca i1, i1 0
-  %nop9931 = alloca i1, i1 0
-  %nop9932 = alloca i1, i1 0
-  %nop9933 = alloca i1, i1 0
-  %nop9934 = alloca i1, i1 0
-  %nop9935 = alloca i1, i1 0
-  %nop9936 = alloca i1, i1 0
-  %nop9937 = alloca i1, i1 0
-  %nop9938 = alloca i1, i1 0
-  %nop9939 = alloca i1, i1 0
-  %nop9940 = alloca i1, i1 0
-  %nop9941 = alloca i1, i1 0
-  %nop9942 = alloca i1, i1 0
-  %nop9943 = alloca i1, i1 0
-  %nop9944 = alloca i1, i1 0
-  %nop9945 = alloca i1, i1 0
-  %nop9946 = alloca i1, i1 0
-  %nop9947 = alloca i1, i1 0
-  %nop9948 = alloca i1, i1 0
-  %nop9949 = alloca i1, i1 0
-  %nop9950 = alloca i1, i1 0
-  %nop9951 = alloca i1, i1 0
-  %nop9952 = alloca i1, i1 0
-  %nop9953 = alloca i1, i1 0
-  %nop9954 = alloca i1, i1 0
-  %nop9955 = alloca i1, i1 0
-  %nop9956 = alloca i1, i1 0
-  %nop9957 = alloca i1, i1 0
-  %nop9958 = alloca i1, i1 0
-  %nop9959 = alloca i1, i1 0
-  %nop9960 = alloca i1, i1 0
-  %nop9961 = alloca i1, i1 0
-  %nop9962 = alloca i1, i1 0
-  %nop9963 = alloca i1, i1 0
-  %nop9964 = alloca i1, i1 0
-  %nop9965 = alloca i1, i1 0
-  %nop9966 = alloca i1, i1 0
-  %nop9967 = alloca i1, i1 0
-  %nop9968 = alloca i1, i1 0
-  %nop9969 = alloca i1, i1 0
-  %nop9970 = alloca i1, i1 0
-  %nop9971 = alloca i1, i1 0
-  %nop9972 = alloca i1, i1 0
-  %nop9973 = alloca i1, i1 0
-  %nop9974 = alloca i1, i1 0
-  %nop9975 = alloca i1, i1 0
-  %nop9976 = alloca i1, i1 0
-  %nop9977 = alloca i1, i1 0
-  %nop9978 = alloca i1, i1 0
-  %nop9979 = alloca i1, i1 0
-  %nop9980 = alloca i1, i1 0
-  %nop9981 = alloca i1, i1 0
-  %nop9982 = alloca i1, i1 0
-  %nop9983 = alloca i1, i1 0
-  %nop9984 = alloca i1, i1 0
-  %nop9985 = alloca i1, i1 0
-  %nop9986 = alloca i1, i1 0
-  %nop9987 = alloca i1, i1 0
-  %nop9988 = alloca i1, i1 0
-  %nop9989 = alloca i1, i1 0
-  %nop9990 = alloca i1, i1 0
-  %nop9991 = alloca i1, i1 0
-  %nop9992 = alloca i1, i1 0
-  %nop9993 = alloca i1, i1 0
-  %nop9994 = alloca i1, i1 0
-  %nop9995 = alloca i1, i1 0
-  %nop9996 = alloca i1, i1 0
-  %nop9997 = alloca i1, i1 0
-  %nop9998 = alloca i1, i1 0
-  %nop9999 = alloca i1, i1 0
-  %nop10000 = alloca i1, i1 0
-  %nop10001 = alloca i1, i1 0
-  %nop10002 = alloca i1, i1 0
-  %nop10003 = alloca i1, i1 0
-  %nop10004 = alloca i1, i1 0
-  %nop10005 = alloca i1, i1 0
-  %nop10006 = alloca i1, i1 0
-  %nop10007 = alloca i1, i1 0
-  %nop10008 = alloca i1, i1 0
-  %nop10009 = alloca i1, i1 0
-  %nop10010 = alloca i1, i1 0
-  %nop10011 = alloca i1, i1 0
-  %nop10012 = alloca i1, i1 0
-  %nop10013 = alloca i1, i1 0
-  %nop10014 = alloca i1, i1 0
-  %nop10015 = alloca i1, i1 0
-  %nop10016 = alloca i1, i1 0
-  %nop10017 = alloca i1, i1 0
-  %nop10018 = alloca i1, i1 0
-  %nop10019 = alloca i1, i1 0
-  %nop10020 = alloca i1, i1 0
-  %nop10021 = alloca i1, i1 0
-  %nop10022 = alloca i1, i1 0
-  %nop10023 = alloca i1, i1 0
-  %nop10024 = alloca i1, i1 0
-  %nop10025 = alloca i1, i1 0
-  %nop10026 = alloca i1, i1 0
-  %nop10027 = alloca i1, i1 0
-  %nop10028 = alloca i1, i1 0
-  %nop10029 = alloca i1, i1 0
-  %nop10030 = alloca i1, i1 0
-  %nop10031 = alloca i1, i1 0
-  %nop10032 = alloca i1, i1 0
-  %nop10033 = alloca i1, i1 0
-  %nop10034 = alloca i1, i1 0
-  %nop10035 = alloca i1, i1 0
-  %nop10036 = alloca i1, i1 0
-  %nop10037 = alloca i1, i1 0
-  %nop10038 = alloca i1, i1 0
-  %nop10039 = alloca i1, i1 0
-  %nop10040 = alloca i1, i1 0
-  %nop10041 = alloca i1, i1 0
-  %nop10042 = alloca i1, i1 0
-  %nop10043 = alloca i1, i1 0
-  %nop10044 = alloca i1, i1 0
-  %nop10045 = alloca i1, i1 0
-  %nop10046 = alloca i1, i1 0
-  %nop10047 = alloca i1, i1 0
-  %nop10048 = alloca i1, i1 0
-  %nop10049 = alloca i1, i1 0
-  %nop10050 = alloca i1, i1 0
-  %nop10051 = alloca i1, i1 0
-  %nop10052 = alloca i1, i1 0
-  %nop10053 = alloca i1, i1 0
-  %nop10054 = alloca i1, i1 0
-  %nop10055 = alloca i1, i1 0
-  %nop10056 = alloca i1, i1 0
-  %nop10057 = alloca i1, i1 0
-  %nop10058 = alloca i1, i1 0
-  %nop10059 = alloca i1, i1 0
-  %nop10060 = alloca i1, i1 0
-  %nop10061 = alloca i1, i1 0
-  %nop10062 = alloca i1, i1 0
-  %nop10063 = alloca i1, i1 0
-  %nop10064 = alloca i1, i1 0
-  %nop10065 = alloca i1, i1 0
-  %nop10066 = alloca i1, i1 0
-  %nop10067 = alloca i1, i1 0
-  %nop10068 = alloca i1, i1 0
-  %nop10069 = alloca i1, i1 0
-  %nop10070 = alloca i1, i1 0
-  %nop10071 = alloca i1, i1 0
-  %nop10072 = alloca i1, i1 0
-  %nop10073 = alloca i1, i1 0
-  %nop10074 = alloca i1, i1 0
-  %nop10075 = alloca i1, i1 0
-  %nop10076 = alloca i1, i1 0
-  %nop10077 = alloca i1, i1 0
-  %nop10078 = alloca i1, i1 0
-  %nop10079 = alloca i1, i1 0
-  %nop10080 = alloca i1, i1 0
-  %nop10081 = alloca i1, i1 0
-  %nop10082 = alloca i1, i1 0
-  %nop10083 = alloca i1, i1 0
-  %nop10084 = alloca i1, i1 0
-  %nop10085 = alloca i1, i1 0
-  %nop10086 = alloca i1, i1 0
-  %nop10087 = alloca i1, i1 0
-  %nop10088 = alloca i1, i1 0
-  %nop10089 = alloca i1, i1 0
-  %nop10090 = alloca i1, i1 0
-  %nop10091 = alloca i1, i1 0
-  %nop10092 = alloca i1, i1 0
-  %nop10093 = alloca i1, i1 0
-  %nop10094 = alloca i1, i1 0
-  %nop10095 = alloca i1, i1 0
-  %nop10096 = alloca i1, i1 0
-  %nop10097 = alloca i1, i1 0
-  %nop10098 = alloca i1, i1 0
-  %nop10099 = alloca i1, i1 0
-  %nop10100 = alloca i1, i1 0
-  %nop10101 = alloca i1, i1 0
-  %nop10102 = alloca i1, i1 0
-  %nop10103 = alloca i1, i1 0
-  %nop10104 = alloca i1, i1 0
-  %nop10105 = alloca i1, i1 0
-  %nop10106 = alloca i1, i1 0
-  %nop10107 = alloca i1, i1 0
-  %nop10108 = alloca i1, i1 0
-  %nop10109 = alloca i1, i1 0
-  %nop10110 = alloca i1, i1 0
-  %nop10111 = alloca i1, i1 0
-  %nop10112 = alloca i1, i1 0
-  %nop10113 = alloca i1, i1 0
-  %nop10114 = alloca i1, i1 0
-  %nop10115 = alloca i1, i1 0
-  %nop10116 = alloca i1, i1 0
-  %nop10117 = alloca i1, i1 0
-  %nop10118 = alloca i1, i1 0
-  %nop10119 = alloca i1, i1 0
-  %nop10120 = alloca i1, i1 0
-  %nop10121 = alloca i1, i1 0
-  %nop10122 = alloca i1, i1 0
-  %nop10123 = alloca i1, i1 0
-  %nop10124 = alloca i1, i1 0
-  %nop10125 = alloca i1, i1 0
-  %nop10126 = alloca i1, i1 0
-  %nop10127 = alloca i1, i1 0
-  %nop10128 = alloca i1, i1 0
-  %nop10129 = alloca i1, i1 0
-  %nop10130 = alloca i1, i1 0
-  %nop10131 = alloca i1, i1 0
-  %nop10132 = alloca i1, i1 0
-  %nop10133 = alloca i1, i1 0
-  %nop10134 = alloca i1, i1 0
-  %nop10135 = alloca i1, i1 0
-  %nop10136 = alloca i1, i1 0
-  %nop10137 = alloca i1, i1 0
-  %nop10138 = alloca i1, i1 0
-  %nop10139 = alloca i1, i1 0
-  %nop10140 = alloca i1, i1 0
-  %nop10141 = alloca i1, i1 0
-  %nop10142 = alloca i1, i1 0
-  %nop10143 = alloca i1, i1 0
-  %nop10144 = alloca i1, i1 0
-  %nop10145 = alloca i1, i1 0
-  %nop10146 = alloca i1, i1 0
-  %nop10147 = alloca i1, i1 0
-  %nop10148 = alloca i1, i1 0
-  %nop10149 = alloca i1, i1 0
-  %nop10150 = alloca i1, i1 0
-  %nop10151 = alloca i1, i1 0
-  %nop10152 = alloca i1, i1 0
-  %nop10153 = alloca i1, i1 0
-  %nop10154 = alloca i1, i1 0
-  %nop10155 = alloca i1, i1 0
-  %nop10156 = alloca i1, i1 0
-  %nop10157 = alloca i1, i1 0
-  %nop10158 = alloca i1, i1 0
-  %nop10159 = alloca i1, i1 0
-  %nop10160 = alloca i1, i1 0
-  %nop10161 = alloca i1, i1 0
-  %nop10162 = alloca i1, i1 0
-  %nop10163 = alloca i1, i1 0
-  %nop10164 = alloca i1, i1 0
-  %nop10165 = alloca i1, i1 0
-  %nop10166 = alloca i1, i1 0
-  %nop10167 = alloca i1, i1 0
-  %nop10168 = alloca i1, i1 0
-  %nop10169 = alloca i1, i1 0
-  %nop10170 = alloca i1, i1 0
-  %nop10171 = alloca i1, i1 0
-  %nop10172 = alloca i1, i1 0
-  %nop10173 = alloca i1, i1 0
-  %nop10174 = alloca i1, i1 0
-  %nop10175 = alloca i1, i1 0
-  %nop10176 = alloca i1, i1 0
-  %nop10177 = alloca i1, i1 0
-  %nop10178 = alloca i1, i1 0
-  %nop10179 = alloca i1, i1 0
-  %nop10180 = alloca i1, i1 0
-  %nop10181 = alloca i1, i1 0
-  %nop10182 = alloca i1, i1 0
-  %nop10183 = alloca i1, i1 0
-  %nop10184 = alloca i1, i1 0
-  %nop10185 = alloca i1, i1 0
-  %nop10186 = alloca i1, i1 0
-  %nop10187 = alloca i1, i1 0
-  %nop10188 = alloca i1, i1 0
-  %nop10189 = alloca i1, i1 0
-  %nop10190 = alloca i1, i1 0
-  %nop10191 = alloca i1, i1 0
-  %nop10192 = alloca i1, i1 0
-  %nop10193 = alloca i1, i1 0
-  %nop10194 = alloca i1, i1 0
-  %nop10195 = alloca i1, i1 0
-  %nop10196 = alloca i1, i1 0
-  %nop10197 = alloca i1, i1 0
-  %nop10198 = alloca i1, i1 0
-  %nop10199 = alloca i1, i1 0
-  %nop10200 = alloca i1, i1 0
-  %nop10201 = alloca i1, i1 0
-  %nop10202 = alloca i1, i1 0
-  %nop10203 = alloca i1, i1 0
-  %nop10204 = alloca i1, i1 0
-  %nop10205 = alloca i1, i1 0
-  %nop10206 = alloca i1, i1 0
-  %nop10207 = alloca i1, i1 0
-  %nop10208 = alloca i1, i1 0
-  %nop10209 = alloca i1, i1 0
-  %nop10210 = alloca i1, i1 0
-  %nop10211 = alloca i1, i1 0
-  %nop10212 = alloca i1, i1 0
-  %nop10213 = alloca i1, i1 0
-  %nop10214 = alloca i1, i1 0
-  %nop10215 = alloca i1, i1 0
-  %nop10216 = alloca i1, i1 0
-  %nop10217 = alloca i1, i1 0
-  %nop10218 = alloca i1, i1 0
-  %nop10219 = alloca i1, i1 0
-  %nop10220 = alloca i1, i1 0
-  %nop10221 = alloca i1, i1 0
-  %nop10222 = alloca i1, i1 0
-  %nop10223 = alloca i1, i1 0
-  %nop10224 = alloca i1, i1 0
-  %nop10225 = alloca i1, i1 0
-  %nop10226 = alloca i1, i1 0
-  %nop10227 = alloca i1, i1 0
-  %nop10228 = alloca i1, i1 0
-  %nop10229 = alloca i1, i1 0
-  %nop10230 = alloca i1, i1 0
-  %nop10231 = alloca i1, i1 0
-  %nop10232 = alloca i1, i1 0
-  %nop10233 = alloca i1, i1 0
-  %nop10234 = alloca i1, i1 0
-  %nop10235 = alloca i1, i1 0
-  %nop10236 = alloca i1, i1 0
-  %nop10237 = alloca i1, i1 0
-  %nop10238 = alloca i1, i1 0
-  %nop10239 = alloca i1, i1 0
-  %nop10240 = alloca i1, i1 0
-  %nop10241 = alloca i1, i1 0
-  %nop10242 = alloca i1, i1 0
-  %nop10243 = alloca i1, i1 0
-  %nop10244 = alloca i1, i1 0
-  %nop10245 = alloca i1, i1 0
-  %nop10246 = alloca i1, i1 0
-  %nop10247 = alloca i1, i1 0
-  %nop10248 = alloca i1, i1 0
-  %nop10249 = alloca i1, i1 0
-  %nop10250 = alloca i1, i1 0
-  %nop10251 = alloca i1, i1 0
-  %nop10252 = alloca i1, i1 0
-  %nop10253 = alloca i1, i1 0
-  %nop10254 = alloca i1, i1 0
-  %nop10255 = alloca i1, i1 0
-  %nop10256 = alloca i1, i1 0
-  %nop10257 = alloca i1, i1 0
-  %nop10258 = alloca i1, i1 0
-  %nop10259 = alloca i1, i1 0
-  %nop10260 = alloca i1, i1 0
-  %nop10261 = alloca i1, i1 0
-  %nop10262 = alloca i1, i1 0
-  %nop10263 = alloca i1, i1 0
-  %nop10264 = alloca i1, i1 0
-  %nop10265 = alloca i1, i1 0
-  %nop10266 = alloca i1, i1 0
-  %nop10267 = alloca i1, i1 0
-  %nop10268 = alloca i1, i1 0
-  %nop10269 = alloca i1, i1 0
-  %nop10270 = alloca i1, i1 0
-  %nop10271 = alloca i1, i1 0
-  %nop10272 = alloca i1, i1 0
-  %nop10273 = alloca i1, i1 0
-  %nop10274 = alloca i1, i1 0
-  %nop10275 = alloca i1, i1 0
-  %nop10276 = alloca i1, i1 0
-  %nop10277 = alloca i1, i1 0
-  %nop10278 = alloca i1, i1 0
-  %nop10279 = alloca i1, i1 0
-  %nop10280 = alloca i1, i1 0
-  %nop10281 = alloca i1, i1 0
-  %nop10282 = alloca i1, i1 0
-  %nop10283 = alloca i1, i1 0
-  %nop10284 = alloca i1, i1 0
-  %nop10285 = alloca i1, i1 0
-  %nop10286 = alloca i1, i1 0
-  %nop10287 = alloca i1, i1 0
-  %nop10288 = alloca i1, i1 0
-  %nop10289 = alloca i1, i1 0
-  %nop10290 = alloca i1, i1 0
-  %nop10291 = alloca i1, i1 0
-  %nop10292 = alloca i1, i1 0
-  %nop10293 = alloca i1, i1 0
-  %nop10294 = alloca i1, i1 0
-  %nop10295 = alloca i1, i1 0
-  %nop10296 = alloca i1, i1 0
-  %nop10297 = alloca i1, i1 0
-  %nop10298 = alloca i1, i1 0
-  %nop10299 = alloca i1, i1 0
-  %nop10300 = alloca i1, i1 0
-  %nop10301 = alloca i1, i1 0
-  %nop10302 = alloca i1, i1 0
-  %nop10303 = alloca i1, i1 0
-  %nop10304 = alloca i1, i1 0
-  %nop10305 = alloca i1, i1 0
-  %nop10306 = alloca i1, i1 0
-  %nop10307 = alloca i1, i1 0
-  %nop10308 = alloca i1, i1 0
-  %nop10309 = alloca i1, i1 0
-  %nop10310 = alloca i1, i1 0
-  %nop10311 = alloca i1, i1 0
-  %nop10312 = alloca i1, i1 0
-  %nop10313 = alloca i1, i1 0
-  %nop10314 = alloca i1, i1 0
-  %nop10315 = alloca i1, i1 0
-  %nop10316 = alloca i1, i1 0
-  %nop10317 = alloca i1, i1 0
-  %nop10318 = alloca i1, i1 0
-  %nop10319 = alloca i1, i1 0
-  %nop10320 = alloca i1, i1 0
-  %nop10321 = alloca i1, i1 0
-  %nop10322 = alloca i1, i1 0
-  %nop10323 = alloca i1, i1 0
-  %nop10324 = alloca i1, i1 0
-  %nop10325 = alloca i1, i1 0
-  %nop10326 = alloca i1, i1 0
-  %nop10327 = alloca i1, i1 0
-  %nop10328 = alloca i1, i1 0
-  %nop10329 = alloca i1, i1 0
-  %nop10330 = alloca i1, i1 0
-  %nop10331 = alloca i1, i1 0
-  %nop10332 = alloca i1, i1 0
-  %nop10333 = alloca i1, i1 0
-  %nop10334 = alloca i1, i1 0
-  %nop10335 = alloca i1, i1 0
-  %nop10336 = alloca i1, i1 0
-  %nop10337 = alloca i1, i1 0
-  %nop10338 = alloca i1, i1 0
-  %nop10339 = alloca i1, i1 0
-  %nop10340 = alloca i1, i1 0
-  %nop10341 = alloca i1, i1 0
-  %nop10342 = alloca i1, i1 0
-  %nop10343 = alloca i1, i1 0
-  %nop10344 = alloca i1, i1 0
-  %nop10345 = alloca i1, i1 0
-  %nop10346 = alloca i1, i1 0
-  %nop10347 = alloca i1, i1 0
-  %nop10348 = alloca i1, i1 0
-  %nop10349 = alloca i1, i1 0
-  %nop10350 = alloca i1, i1 0
-  %nop10351 = alloca i1, i1 0
-  %nop10352 = alloca i1, i1 0
-  %nop10353 = alloca i1, i1 0
-  %nop10354 = alloca i1, i1 0
-  %nop10355 = alloca i1, i1 0
-  %nop10356 = alloca i1, i1 0
-  %nop10357 = alloca i1, i1 0
-  %nop10358 = alloca i1, i1 0
-  %nop10359 = alloca i1, i1 0
-  %nop10360 = alloca i1, i1 0
-  %nop10361 = alloca i1, i1 0
-  %nop10362 = alloca i1, i1 0
-  %nop10363 = alloca i1, i1 0
-  %nop10364 = alloca i1, i1 0
-  %nop10365 = alloca i1, i1 0
-  %nop10366 = alloca i1, i1 0
-  %nop10367 = alloca i1, i1 0
-  %nop10368 = alloca i1, i1 0
-  %nop10369 = alloca i1, i1 0
-  %nop10370 = alloca i1, i1 0
-  %nop10371 = alloca i1, i1 0
-  %nop10372 = alloca i1, i1 0
-  %nop10373 = alloca i1, i1 0
-  %nop10374 = alloca i1, i1 0
-  %nop10375 = alloca i1, i1 0
-  %nop10376 = alloca i1, i1 0
-  %nop10377 = alloca i1, i1 0
-  %nop10378 = alloca i1, i1 0
-  %nop10379 = alloca i1, i1 0
-  %nop10380 = alloca i1, i1 0
-  %nop10381 = alloca i1, i1 0
-  %nop10382 = alloca i1, i1 0
-  %nop10383 = alloca i1, i1 0
-  %nop10384 = alloca i1, i1 0
-  %nop10385 = alloca i1, i1 0
-  %nop10386 = alloca i1, i1 0
-  %nop10387 = alloca i1, i1 0
-  %nop10388 = alloca i1, i1 0
-  %nop10389 = alloca i1, i1 0
-  %nop10390 = alloca i1, i1 0
-  %nop10391 = alloca i1, i1 0
-  %nop10392 = alloca i1, i1 0
-  %nop10393 = alloca i1, i1 0
-  %nop10394 = alloca i1, i1 0
-  %nop10395 = alloca i1, i1 0
-  %nop10396 = alloca i1, i1 0
-  %nop10397 = alloca i1, i1 0
-  %nop10398 = alloca i1, i1 0
-  %nop10399 = alloca i1, i1 0
-  %nop10400 = alloca i1, i1 0
-  %nop10401 = alloca i1, i1 0
-  %nop10402 = alloca i1, i1 0
-  %nop10403 = alloca i1, i1 0
-  %nop10404 = alloca i1, i1 0
-  %nop10405 = alloca i1, i1 0
-  %nop10406 = alloca i1, i1 0
-  %nop10407 = alloca i1, i1 0
-  %nop10408 = alloca i1, i1 0
-  %nop10409 = alloca i1, i1 0
-  %nop10410 = alloca i1, i1 0
-  %nop10411 = alloca i1, i1 0
-  %nop10412 = alloca i1, i1 0
-  %nop10413 = alloca i1, i1 0
-  %nop10414 = alloca i1, i1 0
-  %nop10415 = alloca i1, i1 0
-  %nop10416 = alloca i1, i1 0
-  %nop10417 = alloca i1, i1 0
-  %nop10418 = alloca i1, i1 0
-  %nop10419 = alloca i1, i1 0
-  %nop10420 = alloca i1, i1 0
-  %nop10421 = alloca i1, i1 0
-  %nop10422 = alloca i1, i1 0
-  %nop10423 = alloca i1, i1 0
-  %nop10424 = alloca i1, i1 0
-  %nop10425 = alloca i1, i1 0
-  %nop10426 = alloca i1, i1 0
-  %nop10427 = alloca i1, i1 0
-  %nop10428 = alloca i1, i1 0
-  %nop10429 = alloca i1, i1 0
-  %nop10430 = alloca i1, i1 0
-  %nop10431 = alloca i1, i1 0
-  %nop10432 = alloca i1, i1 0
-  %nop10433 = alloca i1, i1 0
-  %nop10434 = alloca i1, i1 0
-  %nop10435 = alloca i1, i1 0
-  %nop10436 = alloca i1, i1 0
-  %nop10437 = alloca i1, i1 0
-  %nop10438 = alloca i1, i1 0
-  %nop10439 = alloca i1, i1 0
-  %nop10440 = alloca i1, i1 0
-  %nop10441 = alloca i1, i1 0
-  %nop10442 = alloca i1, i1 0
-  %nop10443 = alloca i1, i1 0
-  %nop10444 = alloca i1, i1 0
-  %nop10445 = alloca i1, i1 0
-  %nop10446 = alloca i1, i1 0
-  %nop10447 = alloca i1, i1 0
-  %nop10448 = alloca i1, i1 0
-  %nop10449 = alloca i1, i1 0
-  %nop10450 = alloca i1, i1 0
-  %nop10451 = alloca i1, i1 0
-  %nop10452 = alloca i1, i1 0
-  %nop10453 = alloca i1, i1 0
-  %nop10454 = alloca i1, i1 0
-  %nop10455 = alloca i1, i1 0
-  %nop10456 = alloca i1, i1 0
-  %nop10457 = alloca i1, i1 0
-  %nop10458 = alloca i1, i1 0
-  %nop10459 = alloca i1, i1 0
-  %nop10460 = alloca i1, i1 0
-  %nop10461 = alloca i1, i1 0
-  %nop10462 = alloca i1, i1 0
-  %nop10463 = alloca i1, i1 0
-  %nop10464 = alloca i1, i1 0
-  %nop10465 = alloca i1, i1 0
-  %nop10466 = alloca i1, i1 0
-  %nop10467 = alloca i1, i1 0
-  %nop10468 = alloca i1, i1 0
-  %nop10469 = alloca i1, i1 0
-  %nop10470 = alloca i1, i1 0
-  %nop10471 = alloca i1, i1 0
-  %nop10472 = alloca i1, i1 0
-  %nop10473 = alloca i1, i1 0
-  %nop10474 = alloca i1, i1 0
-  %nop10475 = alloca i1, i1 0
-  %nop10476 = alloca i1, i1 0
-  %nop10477 = alloca i1, i1 0
-  %nop10478 = alloca i1, i1 0
-  %nop10479 = alloca i1, i1 0
-  %nop10480 = alloca i1, i1 0
-  %nop10481 = alloca i1, i1 0
-  %nop10482 = alloca i1, i1 0
-  %nop10483 = alloca i1, i1 0
-  %nop10484 = alloca i1, i1 0
-  %nop10485 = alloca i1, i1 0
-  %nop10486 = alloca i1, i1 0
-  %nop10487 = alloca i1, i1 0
-  %nop10488 = alloca i1, i1 0
-  %nop10489 = alloca i1, i1 0
-  %nop10490 = alloca i1, i1 0
-  %nop10491 = alloca i1, i1 0
-  %nop10492 = alloca i1, i1 0
-  %nop10493 = alloca i1, i1 0
-  %nop10494 = alloca i1, i1 0
-  %nop10495 = alloca i1, i1 0
-  %nop10496 = alloca i1, i1 0
-  %nop10497 = alloca i1, i1 0
-  %nop10498 = alloca i1, i1 0
-  %nop10499 = alloca i1, i1 0
-  %nop10500 = alloca i1, i1 0
-  %nop10501 = alloca i1, i1 0
-  %nop10502 = alloca i1, i1 0
-  %nop10503 = alloca i1, i1 0
-  %nop10504 = alloca i1, i1 0
-  %nop10505 = alloca i1, i1 0
-  %nop10506 = alloca i1, i1 0
-  %nop10507 = alloca i1, i1 0
-  %nop10508 = alloca i1, i1 0
-  %nop10509 = alloca i1, i1 0
-  %nop10510 = alloca i1, i1 0
-  %nop10511 = alloca i1, i1 0
-  %nop10512 = alloca i1, i1 0
-  %nop10513 = alloca i1, i1 0
-  %nop10514 = alloca i1, i1 0
-  %nop10515 = alloca i1, i1 0
-  %nop10516 = alloca i1, i1 0
-  %nop10517 = alloca i1, i1 0
-  %nop10518 = alloca i1, i1 0
-  %nop10519 = alloca i1, i1 0
-  %nop10520 = alloca i1, i1 0
-  %nop10521 = alloca i1, i1 0
-  %nop10522 = alloca i1, i1 0
-  %nop10523 = alloca i1, i1 0
-  %nop10524 = alloca i1, i1 0
-  %nop10525 = alloca i1, i1 0
-  %nop10526 = alloca i1, i1 0
-  %nop10527 = alloca i1, i1 0
-  %nop10528 = alloca i1, i1 0
-  %nop10529 = alloca i1, i1 0
-  %nop10530 = alloca i1, i1 0
-  %nop10531 = alloca i1, i1 0
-  %nop10532 = alloca i1, i1 0
-  %nop10533 = alloca i1, i1 0
-  %nop10534 = alloca i1, i1 0
-  %nop10535 = alloca i1, i1 0
-  %nop10536 = alloca i1, i1 0
-  %nop10537 = alloca i1, i1 0
-  %nop10538 = alloca i1, i1 0
-  %nop10539 = alloca i1, i1 0
-  %nop10540 = alloca i1, i1 0
-  %nop10541 = alloca i1, i1 0
-  %nop10542 = alloca i1, i1 0
-  %nop10543 = alloca i1, i1 0
-  %nop10544 = alloca i1, i1 0
-  %nop10545 = alloca i1, i1 0
-  %nop10546 = alloca i1, i1 0
-  %nop10547 = alloca i1, i1 0
-  %nop10548 = alloca i1, i1 0
-  %nop10549 = alloca i1, i1 0
-  %nop10550 = alloca i1, i1 0
-  %nop10551 = alloca i1, i1 0
-  %nop10552 = alloca i1, i1 0
-  %nop10553 = alloca i1, i1 0
-  %nop10554 = alloca i1, i1 0
-  %nop10555 = alloca i1, i1 0
-  %nop10556 = alloca i1, i1 0
-  %nop10557 = alloca i1, i1 0
-  %nop10558 = alloca i1, i1 0
-  %nop10559 = alloca i1, i1 0
-  %nop10560 = alloca i1, i1 0
-  %nop10561 = alloca i1, i1 0
-  %nop10562 = alloca i1, i1 0
-  %nop10563 = alloca i1, i1 0
-  %nop10564 = alloca i1, i1 0
-  %nop10565 = alloca i1, i1 0
-  %nop10566 = alloca i1, i1 0
-  %nop10567 = alloca i1, i1 0
-  %nop10568 = alloca i1, i1 0
-  %nop10569 = alloca i1, i1 0
-  %nop10570 = alloca i1, i1 0
-  %nop10571 = alloca i1, i1 0
-  %nop10572 = alloca i1, i1 0
-  %nop10573 = alloca i1, i1 0
-  %nop10574 = alloca i1, i1 0
-  %nop10575 = alloca i1, i1 0
-  %nop10576 = alloca i1, i1 0
-  %nop10577 = alloca i1, i1 0
-  %nop10578 = alloca i1, i1 0
-  %nop10579 = alloca i1, i1 0
-  %nop10580 = alloca i1, i1 0
-  %nop10581 = alloca i1, i1 0
-  %nop10582 = alloca i1, i1 0
-  %nop10583 = alloca i1, i1 0
-  %nop10584 = alloca i1, i1 0
-  %nop10585 = alloca i1, i1 0
-  %nop10586 = alloca i1, i1 0
-  %nop10587 = alloca i1, i1 0
-  %nop10588 = alloca i1, i1 0
-  %nop10589 = alloca i1, i1 0
-  %nop10590 = alloca i1, i1 0
-  %nop10591 = alloca i1, i1 0
-  %nop10592 = alloca i1, i1 0
-  %nop10593 = alloca i1, i1 0
-  %nop10594 = alloca i1, i1 0
-  %nop10595 = alloca i1, i1 0
-  %nop10596 = alloca i1, i1 0
-  %nop10597 = alloca i1, i1 0
-  %nop10598 = alloca i1, i1 0
-  %nop10599 = alloca i1, i1 0
-  %nop10600 = alloca i1, i1 0
-  %nop10601 = alloca i1, i1 0
-  %nop10602 = alloca i1, i1 0
-  %nop10603 = alloca i1, i1 0
-  %nop10604 = alloca i1, i1 0
-  %nop10605 = alloca i1, i1 0
-  %nop10606 = alloca i1, i1 0
-  %nop10607 = alloca i1, i1 0
-  %nop10608 = alloca i1, i1 0
-  %nop10609 = alloca i1, i1 0
-  %nop10610 = alloca i1, i1 0
-  %nop10611 = alloca i1, i1 0
-  %nop10612 = alloca i1, i1 0
-  %nop10613 = alloca i1, i1 0
-  %nop10614 = alloca i1, i1 0
-  %nop10615 = alloca i1, i1 0
-  %nop10616 = alloca i1, i1 0
-  %nop10617 = alloca i1, i1 0
-  %nop10618 = alloca i1, i1 0
-  %nop10619 = alloca i1, i1 0
-  %nop10620 = alloca i1, i1 0
-  %nop10621 = alloca i1, i1 0
-  %nop10622 = alloca i1, i1 0
-  %nop10623 = alloca i1, i1 0
-  %nop10624 = alloca i1, i1 0
-  %nop10625 = alloca i1, i1 0
-  %nop10626 = alloca i1, i1 0
-  %nop10627 = alloca i1, i1 0
-  %nop10628 = alloca i1, i1 0
-  %nop10629 = alloca i1, i1 0
-  %nop10630 = alloca i1, i1 0
-  %nop10631 = alloca i1, i1 0
-  %nop10632 = alloca i1, i1 0
-  %nop10633 = alloca i1, i1 0
-  %nop10634 = alloca i1, i1 0
-  %nop10635 = alloca i1, i1 0
-  %nop10636 = alloca i1, i1 0
-  %nop10637 = alloca i1, i1 0
-  %nop10638 = alloca i1, i1 0
-  %nop10639 = alloca i1, i1 0
-  %nop10640 = alloca i1, i1 0
-  %nop10641 = alloca i1, i1 0
-  %nop10642 = alloca i1, i1 0
-  %nop10643 = alloca i1, i1 0
-  %nop10644 = alloca i1, i1 0
-  %nop10645 = alloca i1, i1 0
-  %nop10646 = alloca i1, i1 0
-  %nop10647 = alloca i1, i1 0
-  %nop10648 = alloca i1, i1 0
-  %nop10649 = alloca i1, i1 0
-  %nop10650 = alloca i1, i1 0
-  %nop10651 = alloca i1, i1 0
-  %nop10652 = alloca i1, i1 0
-  %nop10653 = alloca i1, i1 0
-  %nop10654 = alloca i1, i1 0
-  %nop10655 = alloca i1, i1 0
-  %nop10656 = alloca i1, i1 0
-  %nop10657 = alloca i1, i1 0
-  %nop10658 = alloca i1, i1 0
-  %nop10659 = alloca i1, i1 0
-  %nop10660 = alloca i1, i1 0
-  %nop10661 = alloca i1, i1 0
-  %nop10662 = alloca i1, i1 0
-  %nop10663 = alloca i1, i1 0
-  %nop10664 = alloca i1, i1 0
-  %nop10665 = alloca i1, i1 0
-  %nop10666 = alloca i1, i1 0
-  %nop10667 = alloca i1, i1 0
-  %nop10668 = alloca i1, i1 0
-  %nop10669 = alloca i1, i1 0
-  %nop10670 = alloca i1, i1 0
-  %nop10671 = alloca i1, i1 0
-  %nop10672 = alloca i1, i1 0
-  %nop10673 = alloca i1, i1 0
-  %nop10674 = alloca i1, i1 0
-  %nop10675 = alloca i1, i1 0
-  %nop10676 = alloca i1, i1 0
-  %nop10677 = alloca i1, i1 0
-  %nop10678 = alloca i1, i1 0
-  %nop10679 = alloca i1, i1 0
-  %nop10680 = alloca i1, i1 0
-  %nop10681 = alloca i1, i1 0
-  %nop10682 = alloca i1, i1 0
-  %nop10683 = alloca i1, i1 0
-  %nop10684 = alloca i1, i1 0
-  %nop10685 = alloca i1, i1 0
-  %nop10686 = alloca i1, i1 0
-  %nop10687 = alloca i1, i1 0
-  %nop10688 = alloca i1, i1 0
-  %nop10689 = alloca i1, i1 0
-  %nop10690 = alloca i1, i1 0
-  %nop10691 = alloca i1, i1 0
-  %nop10692 = alloca i1, i1 0
-  %nop10693 = alloca i1, i1 0
-  %nop10694 = alloca i1, i1 0
-  %nop10695 = alloca i1, i1 0
-  %nop10696 = alloca i1, i1 0
-  %nop10697 = alloca i1, i1 0
-  %nop10698 = alloca i1, i1 0
-  %nop10699 = alloca i1, i1 0
-  %nop10700 = alloca i1, i1 0
-  %nop10701 = alloca i1, i1 0
-  %nop10702 = alloca i1, i1 0
-  %nop10703 = alloca i1, i1 0
-  %nop10704 = alloca i1, i1 0
-  %nop10705 = alloca i1, i1 0
-  %nop10706 = alloca i1, i1 0
-  %nop10707 = alloca i1, i1 0
-  %nop10708 = alloca i1, i1 0
-  %nop10709 = alloca i1, i1 0
-  %nop10710 = alloca i1, i1 0
-  %nop10711 = alloca i1, i1 0
-  %nop10712 = alloca i1, i1 0
-  %nop10713 = alloca i1, i1 0
-  %nop10714 = alloca i1, i1 0
-  %nop10715 = alloca i1, i1 0
-  %nop10716 = alloca i1, i1 0
-  %nop10717 = alloca i1, i1 0
-  %nop10718 = alloca i1, i1 0
-  %nop10719 = alloca i1, i1 0
-  %nop10720 = alloca i1, i1 0
-  %nop10721 = alloca i1, i1 0
-  %nop10722 = alloca i1, i1 0
-  %nop10723 = alloca i1, i1 0
-  %nop10724 = alloca i1, i1 0
-  %nop10725 = alloca i1, i1 0
-  %nop10726 = alloca i1, i1 0
-  %nop10727 = alloca i1, i1 0
-  %nop10728 = alloca i1, i1 0
-  %nop10729 = alloca i1, i1 0
-  %nop10730 = alloca i1, i1 0
-  %nop10731 = alloca i1, i1 0
-  %nop10732 = alloca i1, i1 0
-  %nop10733 = alloca i1, i1 0
-  %nop10734 = alloca i1, i1 0
-  %nop10735 = alloca i1, i1 0
-  %nop10736 = alloca i1, i1 0
-  %nop10737 = alloca i1, i1 0
-  %nop10738 = alloca i1, i1 0
-  %nop10739 = alloca i1, i1 0
-  %nop10740 = alloca i1, i1 0
-  %nop10741 = alloca i1, i1 0
-  %nop10742 = alloca i1, i1 0
-  %nop10743 = alloca i1, i1 0
-  %nop10744 = alloca i1, i1 0
-  %nop10745 = alloca i1, i1 0
-  %nop10746 = alloca i1, i1 0
-  %nop10747 = alloca i1, i1 0
-  %nop10748 = alloca i1, i1 0
-  %nop10749 = alloca i1, i1 0
-  %nop10750 = alloca i1, i1 0
-  %nop10751 = alloca i1, i1 0
-  %nop10752 = alloca i1, i1 0
-  %nop10753 = alloca i1, i1 0
-  %nop10754 = alloca i1, i1 0
-  %nop10755 = alloca i1, i1 0
-  %nop10756 = alloca i1, i1 0
-  %nop10757 = alloca i1, i1 0
-  %nop10758 = alloca i1, i1 0
-  %nop10759 = alloca i1, i1 0
-  %nop10760 = alloca i1, i1 0
-  %nop10761 = alloca i1, i1 0
-  %nop10762 = alloca i1, i1 0
-  %nop10763 = alloca i1, i1 0
-  %nop10764 = alloca i1, i1 0
-  %nop10765 = alloca i1, i1 0
-  %nop10766 = alloca i1, i1 0
-  %nop10767 = alloca i1, i1 0
-  %nop10768 = alloca i1, i1 0
-  %nop10769 = alloca i1, i1 0
-  %nop10770 = alloca i1, i1 0
-  %nop10771 = alloca i1, i1 0
-  %nop10772 = alloca i1, i1 0
-  %nop10773 = alloca i1, i1 0
-  %nop10774 = alloca i1, i1 0
-  %nop10775 = alloca i1, i1 0
-  %nop10776 = alloca i1, i1 0
-  %nop10777 = alloca i1, i1 0
-  %nop10778 = alloca i1, i1 0
-  %nop10779 = alloca i1, i1 0
-  %nop10780 = alloca i1, i1 0
-  %nop10781 = alloca i1, i1 0
-  %nop10782 = alloca i1, i1 0
-  %nop10783 = alloca i1, i1 0
-  %nop10784 = alloca i1, i1 0
-  %nop10785 = alloca i1, i1 0
-  %nop10786 = alloca i1, i1 0
-  %nop10787 = alloca i1, i1 0
-  %nop10788 = alloca i1, i1 0
-  %nop10789 = alloca i1, i1 0
-  %nop10790 = alloca i1, i1 0
-  %nop10791 = alloca i1, i1 0
-  %nop10792 = alloca i1, i1 0
-  %nop10793 = alloca i1, i1 0
-  %nop10794 = alloca i1, i1 0
-  %nop10795 = alloca i1, i1 0
-  %nop10796 = alloca i1, i1 0
-  %nop10797 = alloca i1, i1 0
-  %nop10798 = alloca i1, i1 0
-  %nop10799 = alloca i1, i1 0
-  %nop10800 = alloca i1, i1 0
-  %nop10801 = alloca i1, i1 0
-  %nop10802 = alloca i1, i1 0
-  %nop10803 = alloca i1, i1 0
-  %nop10804 = alloca i1, i1 0
-  %nop10805 = alloca i1, i1 0
-  %nop10806 = alloca i1, i1 0
-  %nop10807 = alloca i1, i1 0
-  %nop10808 = alloca i1, i1 0
-  %nop10809 = alloca i1, i1 0
-  %nop10810 = alloca i1, i1 0
-  %nop10811 = alloca i1, i1 0
-  %nop10812 = alloca i1, i1 0
-  %nop10813 = alloca i1, i1 0
-  %nop10814 = alloca i1, i1 0
-  %nop10815 = alloca i1, i1 0
-  %nop10816 = alloca i1, i1 0
-  %nop10817 = alloca i1, i1 0
-  %nop10818 = alloca i1, i1 0
-  %nop10819 = alloca i1, i1 0
-  %nop10820 = alloca i1, i1 0
-  %nop10821 = alloca i1, i1 0
-  %nop10822 = alloca i1, i1 0
-  %nop10823 = alloca i1, i1 0
-  %nop10824 = alloca i1, i1 0
-  %nop10825 = alloca i1, i1 0
-  %nop10826 = alloca i1, i1 0
-  %nop10827 = alloca i1, i1 0
-  %nop10828 = alloca i1, i1 0
-  %nop10829 = alloca i1, i1 0
-  %nop10830 = alloca i1, i1 0
-  %nop10831 = alloca i1, i1 0
-  %nop10832 = alloca i1, i1 0
-  %nop10833 = alloca i1, i1 0
-  %nop10834 = alloca i1, i1 0
-  %nop10835 = alloca i1, i1 0
-  %nop10836 = alloca i1, i1 0
-  %nop10837 = alloca i1, i1 0
-  %nop10838 = alloca i1, i1 0
-  %nop10839 = alloca i1, i1 0
-  %nop10840 = alloca i1, i1 0
-  %nop10841 = alloca i1, i1 0
-  %nop10842 = alloca i1, i1 0
-  %nop10843 = alloca i1, i1 0
-  %nop10844 = alloca i1, i1 0
-  %nop10845 = alloca i1, i1 0
-  %nop10846 = alloca i1, i1 0
-  %nop10847 = alloca i1, i1 0
-  %nop10848 = alloca i1, i1 0
-  %nop10849 = alloca i1, i1 0
-  %nop10850 = alloca i1, i1 0
-  %nop10851 = alloca i1, i1 0
-  %nop10852 = alloca i1, i1 0
-  %nop10853 = alloca i1, i1 0
-  %nop10854 = alloca i1, i1 0
-  %nop10855 = alloca i1, i1 0
-  %nop10856 = alloca i1, i1 0
-  %nop10857 = alloca i1, i1 0
-  %nop10858 = alloca i1, i1 0
-  %nop10859 = alloca i1, i1 0
-  %nop10860 = alloca i1, i1 0
-  %nop10861 = alloca i1, i1 0
-  %nop10862 = alloca i1, i1 0
-  %nop10863 = alloca i1, i1 0
-  %nop10864 = alloca i1, i1 0
-  %nop10865 = alloca i1, i1 0
-  %nop10866 = alloca i1, i1 0
-  %nop10867 = alloca i1, i1 0
-  %nop10868 = alloca i1, i1 0
-  %nop10869 = alloca i1, i1 0
-  %nop10870 = alloca i1, i1 0
-  %nop10871 = alloca i1, i1 0
-  %nop10872 = alloca i1, i1 0
-  %nop10873 = alloca i1, i1 0
-  %nop10874 = alloca i1, i1 0
-  %nop10875 = alloca i1, i1 0
-  %nop10876 = alloca i1, i1 0
-  %nop10877 = alloca i1, i1 0
-  %nop10878 = alloca i1, i1 0
-  %nop10879 = alloca i1, i1 0
-  %nop10880 = alloca i1, i1 0
-  %nop10881 = alloca i1, i1 0
-  %nop10882 = alloca i1, i1 0
-  %nop10883 = alloca i1, i1 0
-  %nop10884 = alloca i1, i1 0
-  %nop10885 = alloca i1, i1 0
-  %nop10886 = alloca i1, i1 0
-  %nop10887 = alloca i1, i1 0
-  %nop10888 = alloca i1, i1 0
-  %nop10889 = alloca i1, i1 0
-  %nop10890 = alloca i1, i1 0
-  %nop10891 = alloca i1, i1 0
-  %nop10892 = alloca i1, i1 0
-  %nop10893 = alloca i1, i1 0
-  %nop10894 = alloca i1, i1 0
-  %nop10895 = alloca i1, i1 0
-  %nop10896 = alloca i1, i1 0
-  %nop10897 = alloca i1, i1 0
-  %nop10898 = alloca i1, i1 0
-  %nop10899 = alloca i1, i1 0
-  %nop10900 = alloca i1, i1 0
-  %nop10901 = alloca i1, i1 0
-  %nop10902 = alloca i1, i1 0
-  %nop10903 = alloca i1, i1 0
-  %nop10904 = alloca i1, i1 0
-  %nop10905 = alloca i1, i1 0
-  %nop10906 = alloca i1, i1 0
-  %nop10907 = alloca i1, i1 0
-  %nop10908 = alloca i1, i1 0
-  %nop10909 = alloca i1, i1 0
-  %nop10910 = alloca i1, i1 0
-  %nop10911 = alloca i1, i1 0
-  %nop10912 = alloca i1, i1 0
-  %nop10913 = alloca i1, i1 0
-  %nop10914 = alloca i1, i1 0
-  %nop10915 = alloca i1, i1 0
-  %nop10916 = alloca i1, i1 0
-  %nop10917 = alloca i1, i1 0
-  %nop10918 = alloca i1, i1 0
-  %nop10919 = alloca i1, i1 0
-  %nop10920 = alloca i1, i1 0
-  %nop10921 = alloca i1, i1 0
-  %nop10922 = alloca i1, i1 0
-  %nop10923 = alloca i1, i1 0
-  %nop10924 = alloca i1, i1 0
-  %nop10925 = alloca i1, i1 0
-  %nop10926 = alloca i1, i1 0
-  %nop10927 = alloca i1, i1 0
-  %nop10928 = alloca i1, i1 0
-  %nop10929 = alloca i1, i1 0
-  %nop10930 = alloca i1, i1 0
-  %nop10931 = alloca i1, i1 0
-  %nop10932 = alloca i1, i1 0
-  %nop10933 = alloca i1, i1 0
-  %nop10934 = alloca i1, i1 0
-  %nop10935 = alloca i1, i1 0
-  %nop10936 = alloca i1, i1 0
-  %nop10937 = alloca i1, i1 0
-  %nop10938 = alloca i1, i1 0
-  %nop10939 = alloca i1, i1 0
-  %nop10940 = alloca i1, i1 0
-  %nop10941 = alloca i1, i1 0
-  %nop10942 = alloca i1, i1 0
-  %nop10943 = alloca i1, i1 0
-  %nop10944 = alloca i1, i1 0
-  %nop10945 = alloca i1, i1 0
-  %nop10946 = alloca i1, i1 0
-  %nop10947 = alloca i1, i1 0
-  %nop10948 = alloca i1, i1 0
-  %nop10949 = alloca i1, i1 0
-  %nop10950 = alloca i1, i1 0
-  %nop10951 = alloca i1, i1 0
-  %nop10952 = alloca i1, i1 0
-  %nop10953 = alloca i1, i1 0
-  %nop10954 = alloca i1, i1 0
-  %nop10955 = alloca i1, i1 0
-  %nop10956 = alloca i1, i1 0
-  %nop10957 = alloca i1, i1 0
-  %nop10958 = alloca i1, i1 0
-  %nop10959 = alloca i1, i1 0
-  %nop10960 = alloca i1, i1 0
-  %nop10961 = alloca i1, i1 0
-  %nop10962 = alloca i1, i1 0
-  %nop10963 = alloca i1, i1 0
-  %nop10964 = alloca i1, i1 0
-  %nop10965 = alloca i1, i1 0
-  %nop10966 = alloca i1, i1 0
-  %nop10967 = alloca i1, i1 0
-  %nop10968 = alloca i1, i1 0
-  %nop10969 = alloca i1, i1 0
-  %nop10970 = alloca i1, i1 0
-  %nop10971 = alloca i1, i1 0
-  %nop10972 = alloca i1, i1 0
-  %nop10973 = alloca i1, i1 0
-  %nop10974 = alloca i1, i1 0
-  %nop10975 = alloca i1, i1 0
-  %nop10976 = alloca i1, i1 0
-  %nop10977 = alloca i1, i1 0
-  %nop10978 = alloca i1, i1 0
-  %nop10979 = alloca i1, i1 0
-  %nop10980 = alloca i1, i1 0
-  %nop10981 = alloca i1, i1 0
-  %nop10982 = alloca i1, i1 0
-  %nop10983 = alloca i1, i1 0
-  %nop10984 = alloca i1, i1 0
-  %nop10985 = alloca i1, i1 0
-  %nop10986 = alloca i1, i1 0
-  %nop10987 = alloca i1, i1 0
-  %nop10988 = alloca i1, i1 0
-  %nop10989 = alloca i1, i1 0
-  %nop10990 = alloca i1, i1 0
-  %nop10991 = alloca i1, i1 0
-  %nop10992 = alloca i1, i1 0
-  %nop10993 = alloca i1, i1 0
-  %nop10994 = alloca i1, i1 0
-  %nop10995 = alloca i1, i1 0
-  %nop10996 = alloca i1, i1 0
-  %nop10997 = alloca i1, i1 0
-  %nop10998 = alloca i1, i1 0
-  %nop10999 = alloca i1, i1 0
-  %nop11000 = alloca i1, i1 0
-  %nop11001 = alloca i1, i1 0
-  %nop11002 = alloca i1, i1 0
-  %nop11003 = alloca i1, i1 0
-  %nop11004 = alloca i1, i1 0
-  %nop11005 = alloca i1, i1 0
-  %nop11006 = alloca i1, i1 0
-  %nop11007 = alloca i1, i1 0
-  %nop11008 = alloca i1, i1 0
-  %nop11009 = alloca i1, i1 0
-  %nop11010 = alloca i1, i1 0
-  %nop11011 = alloca i1, i1 0
-  %nop11012 = alloca i1, i1 0
-  %nop11013 = alloca i1, i1 0
-  %nop11014 = alloca i1, i1 0
-  %nop11015 = alloca i1, i1 0
-  %nop11016 = alloca i1, i1 0
-  %nop11017 = alloca i1, i1 0
-  %nop11018 = alloca i1, i1 0
-  %nop11019 = alloca i1, i1 0
-  %nop11020 = alloca i1, i1 0
-  %nop11021 = alloca i1, i1 0
-  %nop11022 = alloca i1, i1 0
-  %nop11023 = alloca i1, i1 0
-  %nop11024 = alloca i1, i1 0
-  %nop11025 = alloca i1, i1 0
-  %nop11026 = alloca i1, i1 0
-  %nop11027 = alloca i1, i1 0
-  %nop11028 = alloca i1, i1 0
-  %nop11029 = alloca i1, i1 0
-  %nop11030 = alloca i1, i1 0
-  %nop11031 = alloca i1, i1 0
-  %nop11032 = alloca i1, i1 0
-  %nop11033 = alloca i1, i1 0
-  %nop11034 = alloca i1, i1 0
-  %nop11035 = alloca i1, i1 0
-  %nop11036 = alloca i1, i1 0
-  %nop11037 = alloca i1, i1 0
-  %nop11038 = alloca i1, i1 0
-  %nop11039 = alloca i1, i1 0
-  %nop11040 = alloca i1, i1 0
-  %nop11041 = alloca i1, i1 0
-  %nop11042 = alloca i1, i1 0
-  %nop11043 = alloca i1, i1 0
-  %nop11044 = alloca i1, i1 0
-  %nop11045 = alloca i1, i1 0
-  %nop11046 = alloca i1, i1 0
-  %nop11047 = alloca i1, i1 0
-  %nop11048 = alloca i1, i1 0
-  %nop11049 = alloca i1, i1 0
-  %nop11050 = alloca i1, i1 0
-  %nop11051 = alloca i1, i1 0
-  %nop11052 = alloca i1, i1 0
-  %nop11053 = alloca i1, i1 0
-  %nop11054 = alloca i1, i1 0
-  %nop11055 = alloca i1, i1 0
-  %nop11056 = alloca i1, i1 0
-  %nop11057 = alloca i1, i1 0
-  %nop11058 = alloca i1, i1 0
-  %nop11059 = alloca i1, i1 0
-  %nop11060 = alloca i1, i1 0
-  %nop11061 = alloca i1, i1 0
-  %nop11062 = alloca i1, i1 0
-  %nop11063 = alloca i1, i1 0
-  %nop11064 = alloca i1, i1 0
-  %nop11065 = alloca i1, i1 0
-  %nop11066 = alloca i1, i1 0
-  %nop11067 = alloca i1, i1 0
-  %nop11068 = alloca i1, i1 0
-  %nop11069 = alloca i1, i1 0
-  %nop11070 = alloca i1, i1 0
-  %nop11071 = alloca i1, i1 0
-  %nop11072 = alloca i1, i1 0
-  %nop11073 = alloca i1, i1 0
-  %nop11074 = alloca i1, i1 0
-  %nop11075 = alloca i1, i1 0
-  %nop11076 = alloca i1, i1 0
-  %nop11077 = alloca i1, i1 0
-  %nop11078 = alloca i1, i1 0
-  %nop11079 = alloca i1, i1 0
-  %nop11080 = alloca i1, i1 0
-  %nop11081 = alloca i1, i1 0
-  %nop11082 = alloca i1, i1 0
-  %nop11083 = alloca i1, i1 0
-  %nop11084 = alloca i1, i1 0
-  %nop11085 = alloca i1, i1 0
-  %nop11086 = alloca i1, i1 0
-  %nop11087 = alloca i1, i1 0
-  %nop11088 = alloca i1, i1 0
-  %nop11089 = alloca i1, i1 0
-  %nop11090 = alloca i1, i1 0
-  %nop11091 = alloca i1, i1 0
-  %nop11092 = alloca i1, i1 0
-  %nop11093 = alloca i1, i1 0
-  %nop11094 = alloca i1, i1 0
-  %nop11095 = alloca i1, i1 0
-  %nop11096 = alloca i1, i1 0
-  %nop11097 = alloca i1, i1 0
-  %nop11098 = alloca i1, i1 0
-  %nop11099 = alloca i1, i1 0
-  %nop11100 = alloca i1, i1 0
-  %nop11101 = alloca i1, i1 0
-  %nop11102 = alloca i1, i1 0
-  %nop11103 = alloca i1, i1 0
-  %nop11104 = alloca i1, i1 0
-  %nop11105 = alloca i1, i1 0
-  %nop11106 = alloca i1, i1 0
-  %nop11107 = alloca i1, i1 0
-  %nop11108 = alloca i1, i1 0
-  %nop11109 = alloca i1, i1 0
-  %nop11110 = alloca i1, i1 0
-  %nop11111 = alloca i1, i1 0
-  %nop11112 = alloca i1, i1 0
-  %nop11113 = alloca i1, i1 0
-  %nop11114 = alloca i1, i1 0
-  %nop11115 = alloca i1, i1 0
-  %nop11116 = alloca i1, i1 0
-  %nop11117 = alloca i1, i1 0
-  %nop11118 = alloca i1, i1 0
-  %nop11119 = alloca i1, i1 0
-  %nop11120 = alloca i1, i1 0
-  %nop11121 = alloca i1, i1 0
-  %nop11122 = alloca i1, i1 0
-  %nop11123 = alloca i1, i1 0
-  %nop11124 = alloca i1, i1 0
-  %nop11125 = alloca i1, i1 0
-  %nop11126 = alloca i1, i1 0
-  %nop11127 = alloca i1, i1 0
-  %nop11128 = alloca i1, i1 0
-  %nop11129 = alloca i1, i1 0
-  %nop11130 = alloca i1, i1 0
-  %nop11131 = alloca i1, i1 0
-  %nop11132 = alloca i1, i1 0
-  %nop11133 = alloca i1, i1 0
-  %nop11134 = alloca i1, i1 0
-  %nop11135 = alloca i1, i1 0
-  %nop11136 = alloca i1, i1 0
-  %nop11137 = alloca i1, i1 0
-  %nop11138 = alloca i1, i1 0
-  %nop11139 = alloca i1, i1 0
-  %nop11140 = alloca i1, i1 0
-  %nop11141 = alloca i1, i1 0
-  %nop11142 = alloca i1, i1 0
-  %nop11143 = alloca i1, i1 0
-  %nop11144 = alloca i1, i1 0
-  %nop11145 = alloca i1, i1 0
-  %nop11146 = alloca i1, i1 0
-  %nop11147 = alloca i1, i1 0
-  %nop11148 = alloca i1, i1 0
-  %nop11149 = alloca i1, i1 0
-  %nop11150 = alloca i1, i1 0
-  %nop11151 = alloca i1, i1 0
-  %nop11152 = alloca i1, i1 0
-  %nop11153 = alloca i1, i1 0
-  %nop11154 = alloca i1, i1 0
-  %nop11155 = alloca i1, i1 0
-  %nop11156 = alloca i1, i1 0
-  %nop11157 = alloca i1, i1 0
-  %nop11158 = alloca i1, i1 0
-  %nop11159 = alloca i1, i1 0
-  %nop11160 = alloca i1, i1 0
-  %nop11161 = alloca i1, i1 0
-  %nop11162 = alloca i1, i1 0
-  %nop11163 = alloca i1, i1 0
-  %nop11164 = alloca i1, i1 0
-  %nop11165 = alloca i1, i1 0
-  %nop11166 = alloca i1, i1 0
-  %nop11167 = alloca i1, i1 0
-  %nop11168 = alloca i1, i1 0
-  %nop11169 = alloca i1, i1 0
-  %nop11170 = alloca i1, i1 0
-  %nop11171 = alloca i1, i1 0
-  %nop11172 = alloca i1, i1 0
-  %nop11173 = alloca i1, i1 0
-  %nop11174 = alloca i1, i1 0
-  %nop11175 = alloca i1, i1 0
-  %nop11176 = alloca i1, i1 0
-  %nop11177 = alloca i1, i1 0
-  %nop11178 = alloca i1, i1 0
-  %nop11179 = alloca i1, i1 0
-  %nop11180 = alloca i1, i1 0
-  %nop11181 = alloca i1, i1 0
-  %nop11182 = alloca i1, i1 0
-  %nop11183 = alloca i1, i1 0
-  %nop11184 = alloca i1, i1 0
-  %nop11185 = alloca i1, i1 0
-  %nop11186 = alloca i1, i1 0
-  %nop11187 = alloca i1, i1 0
-  %nop11188 = alloca i1, i1 0
-  %nop11189 = alloca i1, i1 0
-  %nop11190 = alloca i1, i1 0
-  %nop11191 = alloca i1, i1 0
-  %nop11192 = alloca i1, i1 0
-  %nop11193 = alloca i1, i1 0
-  %nop11194 = alloca i1, i1 0
-  %nop11195 = alloca i1, i1 0
-  %nop11196 = alloca i1, i1 0
-  %nop11197 = alloca i1, i1 0
-  %nop11198 = alloca i1, i1 0
-  %nop11199 = alloca i1, i1 0
-  %nop11200 = alloca i1, i1 0
-  %nop11201 = alloca i1, i1 0
-  %nop11202 = alloca i1, i1 0
-  %nop11203 = alloca i1, i1 0
-  %nop11204 = alloca i1, i1 0
-  %nop11205 = alloca i1, i1 0
-  %nop11206 = alloca i1, i1 0
-  %nop11207 = alloca i1, i1 0
-  %nop11208 = alloca i1, i1 0
-  %nop11209 = alloca i1, i1 0
-  %nop11210 = alloca i1, i1 0
-  %nop11211 = alloca i1, i1 0
-  %nop11212 = alloca i1, i1 0
-  %nop11213 = alloca i1, i1 0
-  %nop11214 = alloca i1, i1 0
-  %nop11215 = alloca i1, i1 0
-  %nop11216 = alloca i1, i1 0
-  %nop11217 = alloca i1, i1 0
-  %nop11218 = alloca i1, i1 0
-  %nop11219 = alloca i1, i1 0
-  %nop11220 = alloca i1, i1 0
-  %nop11221 = alloca i1, i1 0
-  %nop11222 = alloca i1, i1 0
-  %nop11223 = alloca i1, i1 0
-  %nop11224 = alloca i1, i1 0
-  %nop11225 = alloca i1, i1 0
-  %nop11226 = alloca i1, i1 0
-  %nop11227 = alloca i1, i1 0
-  %nop11228 = alloca i1, i1 0
-  %nop11229 = alloca i1, i1 0
-  %nop11230 = alloca i1, i1 0
-  %nop11231 = alloca i1, i1 0
-  %nop11232 = alloca i1, i1 0
-  %nop11233 = alloca i1, i1 0
-  %nop11234 = alloca i1, i1 0
-  %nop11235 = alloca i1, i1 0
-  %nop11236 = alloca i1, i1 0
-  %nop11237 = alloca i1, i1 0
-  %nop11238 = alloca i1, i1 0
-  %nop11239 = alloca i1, i1 0
-  %nop11240 = alloca i1, i1 0
-  %nop11241 = alloca i1, i1 0
-  %nop11242 = alloca i1, i1 0
-  %nop11243 = alloca i1, i1 0
-  %nop11244 = alloca i1, i1 0
-  %nop11245 = alloca i1, i1 0
-  %nop11246 = alloca i1, i1 0
-  %nop11247 = alloca i1, i1 0
-  %nop11248 = alloca i1, i1 0
-  %nop11249 = alloca i1, i1 0
-  %nop11250 = alloca i1, i1 0
-  %nop11251 = alloca i1, i1 0
-  %nop11252 = alloca i1, i1 0
-  %nop11253 = alloca i1, i1 0
-  %nop11254 = alloca i1, i1 0
-  %nop11255 = alloca i1, i1 0
-  %nop11256 = alloca i1, i1 0
-  %nop11257 = alloca i1, i1 0
-  %nop11258 = alloca i1, i1 0
-  %nop11259 = alloca i1, i1 0
-  %nop11260 = alloca i1, i1 0
-  %nop11261 = alloca i1, i1 0
-  %nop11262 = alloca i1, i1 0
-  %nop11263 = alloca i1, i1 0
-  %nop11264 = alloca i1, i1 0
-  %nop11265 = alloca i1, i1 0
-  %nop11266 = alloca i1, i1 0
-  %nop11267 = alloca i1, i1 0
-  %nop11268 = alloca i1, i1 0
-  %nop11269 = alloca i1, i1 0
-  %nop11270 = alloca i1, i1 0
-  %nop11271 = alloca i1, i1 0
-  %nop11272 = alloca i1, i1 0
-  %nop11273 = alloca i1, i1 0
-  %nop11274 = alloca i1, i1 0
-  %nop11275 = alloca i1, i1 0
-  %nop11276 = alloca i1, i1 0
-  %nop11277 = alloca i1, i1 0
-  %nop11278 = alloca i1, i1 0
-  %nop11279 = alloca i1, i1 0
-  %nop11280 = alloca i1, i1 0
-  %nop11281 = alloca i1, i1 0
-  %nop11282 = alloca i1, i1 0
-  %nop11283 = alloca i1, i1 0
-  %nop11284 = alloca i1, i1 0
-  %nop11285 = alloca i1, i1 0
-  %nop11286 = alloca i1, i1 0
-  %nop11287 = alloca i1, i1 0
-  %nop11288 = alloca i1, i1 0
-  %nop11289 = alloca i1, i1 0
-  %nop11290 = alloca i1, i1 0
-  %nop11291 = alloca i1, i1 0
-  %nop11292 = alloca i1, i1 0
-  %nop11293 = alloca i1, i1 0
-  %nop11294 = alloca i1, i1 0
-  %nop11295 = alloca i1, i1 0
-  %nop11296 = alloca i1, i1 0
-  %nop11297 = alloca i1, i1 0
-  %nop11298 = alloca i1, i1 0
-  %nop11299 = alloca i1, i1 0
-  %nop11300 = alloca i1, i1 0
-  %nop11301 = alloca i1, i1 0
-  %nop11302 = alloca i1, i1 0
-  %nop11303 = alloca i1, i1 0
-  %nop11304 = alloca i1, i1 0
-  %nop11305 = alloca i1, i1 0
-  %nop11306 = alloca i1, i1 0
-  %nop11307 = alloca i1, i1 0
-  %nop11308 = alloca i1, i1 0
-  %nop11309 = alloca i1, i1 0
-  %nop11310 = alloca i1, i1 0
-  %nop11311 = alloca i1, i1 0
-  %nop11312 = alloca i1, i1 0
-  %nop11313 = alloca i1, i1 0
-  %nop11314 = alloca i1, i1 0
-  %nop11315 = alloca i1, i1 0
-  %nop11316 = alloca i1, i1 0
-  %nop11317 = alloca i1, i1 0
-  %nop11318 = alloca i1, i1 0
-  %nop11319 = alloca i1, i1 0
-  %nop11320 = alloca i1, i1 0
-  %nop11321 = alloca i1, i1 0
-  %nop11322 = alloca i1, i1 0
-  %nop11323 = alloca i1, i1 0
-  %nop11324 = alloca i1, i1 0
-  %nop11325 = alloca i1, i1 0
-  %nop11326 = alloca i1, i1 0
-  %nop11327 = alloca i1, i1 0
-  %nop11328 = alloca i1, i1 0
-  %nop11329 = alloca i1, i1 0
-  %nop11330 = alloca i1, i1 0
-  %nop11331 = alloca i1, i1 0
-  %nop11332 = alloca i1, i1 0
-  %nop11333 = alloca i1, i1 0
-  %nop11334 = alloca i1, i1 0
-  %nop11335 = alloca i1, i1 0
-  %nop11336 = alloca i1, i1 0
-  %nop11337 = alloca i1, i1 0
-  %nop11338 = alloca i1, i1 0
-  %nop11339 = alloca i1, i1 0
-  %nop11340 = alloca i1, i1 0
-  %nop11341 = alloca i1, i1 0
-  %nop11342 = alloca i1, i1 0
-  %nop11343 = alloca i1, i1 0
-  %nop11344 = alloca i1, i1 0
-  %nop11345 = alloca i1, i1 0
-  %nop11346 = alloca i1, i1 0
-  %nop11347 = alloca i1, i1 0
-  %nop11348 = alloca i1, i1 0
-  %nop11349 = alloca i1, i1 0
-  %nop11350 = alloca i1, i1 0
-  %nop11351 = alloca i1, i1 0
-  %nop11352 = alloca i1, i1 0
-  %nop11353 = alloca i1, i1 0
-  %nop11354 = alloca i1, i1 0
-  %nop11355 = alloca i1, i1 0
-  %nop11356 = alloca i1, i1 0
-  %nop11357 = alloca i1, i1 0
-  %nop11358 = alloca i1, i1 0
-  %nop11359 = alloca i1, i1 0
-  %nop11360 = alloca i1, i1 0
-  %nop11361 = alloca i1, i1 0
-  %nop11362 = alloca i1, i1 0
-  %nop11363 = alloca i1, i1 0
-  %nop11364 = alloca i1, i1 0
-  %nop11365 = alloca i1, i1 0
-  %nop11366 = alloca i1, i1 0
-  %nop11367 = alloca i1, i1 0
-  %nop11368 = alloca i1, i1 0
-  %nop11369 = alloca i1, i1 0
-  %nop11370 = alloca i1, i1 0
-  %nop11371 = alloca i1, i1 0
-  %nop11372 = alloca i1, i1 0
-  %nop11373 = alloca i1, i1 0
-  %nop11374 = alloca i1, i1 0
-  %nop11375 = alloca i1, i1 0
-  %nop11376 = alloca i1, i1 0
-  %nop11377 = alloca i1, i1 0
-  %nop11378 = alloca i1, i1 0
-  %nop11379 = alloca i1, i1 0
-  %nop11380 = alloca i1, i1 0
-  %nop11381 = alloca i1, i1 0
-  %nop11382 = alloca i1, i1 0
-  %nop11383 = alloca i1, i1 0
-  %nop11384 = alloca i1, i1 0
-  %nop11385 = alloca i1, i1 0
-  %nop11386 = alloca i1, i1 0
-  %nop11387 = alloca i1, i1 0
-  %nop11388 = alloca i1, i1 0
-  %nop11389 = alloca i1, i1 0
-  %nop11390 = alloca i1, i1 0
-  %nop11391 = alloca i1, i1 0
-  %nop11392 = alloca i1, i1 0
-  %nop11393 = alloca i1, i1 0
-  %nop11394 = alloca i1, i1 0
-  %nop11395 = alloca i1, i1 0
-  %nop11396 = alloca i1, i1 0
-  %nop11397 = alloca i1, i1 0
-  %nop11398 = alloca i1, i1 0
-  %nop11399 = alloca i1, i1 0
-  %nop11400 = alloca i1, i1 0
-  %nop11401 = alloca i1, i1 0
-  %nop11402 = alloca i1, i1 0
-  %nop11403 = alloca i1, i1 0
-  %nop11404 = alloca i1, i1 0
-  %nop11405 = alloca i1, i1 0
-  %nop11406 = alloca i1, i1 0
-  %nop11407 = alloca i1, i1 0
-  %nop11408 = alloca i1, i1 0
-  %nop11409 = alloca i1, i1 0
-  %nop11410 = alloca i1, i1 0
-  %nop11411 = alloca i1, i1 0
-  %nop11412 = alloca i1, i1 0
-  %nop11413 = alloca i1, i1 0
-  %nop11414 = alloca i1, i1 0
-  %nop11415 = alloca i1, i1 0
-  %nop11416 = alloca i1, i1 0
-  %nop11417 = alloca i1, i1 0
-  %nop11418 = alloca i1, i1 0
-  %nop11419 = alloca i1, i1 0
-  %nop11420 = alloca i1, i1 0
-  %nop11421 = alloca i1, i1 0
-  %nop11422 = alloca i1, i1 0
-  %nop11423 = alloca i1, i1 0
-  %nop11424 = alloca i1, i1 0
-  %nop11425 = alloca i1, i1 0
-  %nop11426 = alloca i1, i1 0
-  %nop11427 = alloca i1, i1 0
-  %nop11428 = alloca i1, i1 0
-  %nop11429 = alloca i1, i1 0
-  %nop11430 = alloca i1, i1 0
-  %nop11431 = alloca i1, i1 0
-  %nop11432 = alloca i1, i1 0
-  %nop11433 = alloca i1, i1 0
-  %nop11434 = alloca i1, i1 0
-  %nop11435 = alloca i1, i1 0
-  %nop11436 = alloca i1, i1 0
-  %nop11437 = alloca i1, i1 0
-  %nop11438 = alloca i1, i1 0
-  %nop11439 = alloca i1, i1 0
-  %nop11440 = alloca i1, i1 0
-  %nop11441 = alloca i1, i1 0
-  %nop11442 = alloca i1, i1 0
-  %nop11443 = alloca i1, i1 0
-  %nop11444 = alloca i1, i1 0
-  %nop11445 = alloca i1, i1 0
-  %nop11446 = alloca i1, i1 0
-  %nop11447 = alloca i1, i1 0
-  %nop11448 = alloca i1, i1 0
-  %nop11449 = alloca i1, i1 0
-  %nop11450 = alloca i1, i1 0
-  %nop11451 = alloca i1, i1 0
-  %nop11452 = alloca i1, i1 0
-  %nop11453 = alloca i1, i1 0
-  %nop11454 = alloca i1, i1 0
-  %nop11455 = alloca i1, i1 0
-  %nop11456 = alloca i1, i1 0
-  %nop11457 = alloca i1, i1 0
-  %nop11458 = alloca i1, i1 0
-  %nop11459 = alloca i1, i1 0
-  %nop11460 = alloca i1, i1 0
-  %nop11461 = alloca i1, i1 0
-  %nop11462 = alloca i1, i1 0
-  %nop11463 = alloca i1, i1 0
-  %nop11464 = alloca i1, i1 0
-  %nop11465 = alloca i1, i1 0
-  %nop11466 = alloca i1, i1 0
-  %nop11467 = alloca i1, i1 0
-  %nop11468 = alloca i1, i1 0
-  %nop11469 = alloca i1, i1 0
-  %nop11470 = alloca i1, i1 0
-  %nop11471 = alloca i1, i1 0
-  %nop11472 = alloca i1, i1 0
-  %nop11473 = alloca i1, i1 0
-  %nop11474 = alloca i1, i1 0
-  %nop11475 = alloca i1, i1 0
-  %nop11476 = alloca i1, i1 0
-  %nop11477 = alloca i1, i1 0
-  %nop11478 = alloca i1, i1 0
-  %nop11479 = alloca i1, i1 0
-  %nop11480 = alloca i1, i1 0
-  %nop11481 = alloca i1, i1 0
-  %nop11482 = alloca i1, i1 0
-  %nop11483 = alloca i1, i1 0
-  %nop11484 = alloca i1, i1 0
-  %nop11485 = alloca i1, i1 0
-  %nop11486 = alloca i1, i1 0
-  %nop11487 = alloca i1, i1 0
-  %nop11488 = alloca i1, i1 0
-  %nop11489 = alloca i1, i1 0
-  %nop11490 = alloca i1, i1 0
-  %nop11491 = alloca i1, i1 0
-  %nop11492 = alloca i1, i1 0
-  %nop11493 = alloca i1, i1 0
-  %nop11494 = alloca i1, i1 0
-  %nop11495 = alloca i1, i1 0
-  %nop11496 = alloca i1, i1 0
-  %nop11497 = alloca i1, i1 0
-  %nop11498 = alloca i1, i1 0
-  %nop11499 = alloca i1, i1 0
-  %nop11500 = alloca i1, i1 0
-  %nop11501 = alloca i1, i1 0
-  %nop11502 = alloca i1, i1 0
-  %nop11503 = alloca i1, i1 0
-  %nop11504 = alloca i1, i1 0
-  %nop11505 = alloca i1, i1 0
-  %nop11506 = alloca i1, i1 0
-  %nop11507 = alloca i1, i1 0
-  %nop11508 = alloca i1, i1 0
-  %nop11509 = alloca i1, i1 0
-  %nop11510 = alloca i1, i1 0
-  %nop11511 = alloca i1, i1 0
-  %nop11512 = alloca i1, i1 0
-  %nop11513 = alloca i1, i1 0
-  %nop11514 = alloca i1, i1 0
-  %nop11515 = alloca i1, i1 0
-  %nop11516 = alloca i1, i1 0
-  %nop11517 = alloca i1, i1 0
-  %nop11518 = alloca i1, i1 0
-  %nop11519 = alloca i1, i1 0
-  %nop11520 = alloca i1, i1 0
-  %nop11521 = alloca i1, i1 0
-  %nop11522 = alloca i1, i1 0
-  %nop11523 = alloca i1, i1 0
-  %nop11524 = alloca i1, i1 0
-  %nop11525 = alloca i1, i1 0
-  %nop11526 = alloca i1, i1 0
-  %nop11527 = alloca i1, i1 0
-  %nop11528 = alloca i1, i1 0
-  %nop11529 = alloca i1, i1 0
-  %nop11530 = alloca i1, i1 0
-  %nop11531 = alloca i1, i1 0
-  %nop11532 = alloca i1, i1 0
-  %nop11533 = alloca i1, i1 0
-  %nop11534 = alloca i1, i1 0
-  %nop11535 = alloca i1, i1 0
-  %nop11536 = alloca i1, i1 0
-  %nop11537 = alloca i1, i1 0
-  %nop11538 = alloca i1, i1 0
-  %nop11539 = alloca i1, i1 0
-  %nop11540 = alloca i1, i1 0
-  %nop11541 = alloca i1, i1 0
-  %nop11542 = alloca i1, i1 0
-  %nop11543 = alloca i1, i1 0
-  %nop11544 = alloca i1, i1 0
-  %nop11545 = alloca i1, i1 0
-  %nop11546 = alloca i1, i1 0
-  %nop11547 = alloca i1, i1 0
-  %nop11548 = alloca i1, i1 0
-  %nop11549 = alloca i1, i1 0
-  %nop11550 = alloca i1, i1 0
-  %nop11551 = alloca i1, i1 0
-  %nop11552 = alloca i1, i1 0
-  %nop11553 = alloca i1, i1 0
-  %nop11554 = alloca i1, i1 0
-  %nop11555 = alloca i1, i1 0
-  %nop11556 = alloca i1, i1 0
-  %nop11557 = alloca i1, i1 0
-  %nop11558 = alloca i1, i1 0
-  %nop11559 = alloca i1, i1 0
-  %nop11560 = alloca i1, i1 0
-  %nop11561 = alloca i1, i1 0
-  %nop11562 = alloca i1, i1 0
-  %nop11563 = alloca i1, i1 0
-  %nop11564 = alloca i1, i1 0
-  %nop11565 = alloca i1, i1 0
-  %nop11566 = alloca i1, i1 0
-  %nop11567 = alloca i1, i1 0
-  %nop11568 = alloca i1, i1 0
-  %nop11569 = alloca i1, i1 0
-  %nop11570 = alloca i1, i1 0
-  %nop11571 = alloca i1, i1 0
-  %nop11572 = alloca i1, i1 0
-  %nop11573 = alloca i1, i1 0
-  %nop11574 = alloca i1, i1 0
-  %nop11575 = alloca i1, i1 0
-  %nop11576 = alloca i1, i1 0
-  %nop11577 = alloca i1, i1 0
-  %nop11578 = alloca i1, i1 0
-  %nop11579 = alloca i1, i1 0
-  %nop11580 = alloca i1, i1 0
-  %nop11581 = alloca i1, i1 0
-  %nop11582 = alloca i1, i1 0
-  %nop11583 = alloca i1, i1 0
-  %nop11584 = alloca i1, i1 0
-  %nop11585 = alloca i1, i1 0
-  %nop11586 = alloca i1, i1 0
-  %nop11587 = alloca i1, i1 0
-  %nop11588 = alloca i1, i1 0
-  %nop11589 = alloca i1, i1 0
-  %nop11590 = alloca i1, i1 0
-  %nop11591 = alloca i1, i1 0
-  %nop11592 = alloca i1, i1 0
-  %nop11593 = alloca i1, i1 0
-  %nop11594 = alloca i1, i1 0
-  %nop11595 = alloca i1, i1 0
-  %nop11596 = alloca i1, i1 0
-  %nop11597 = alloca i1, i1 0
-  %nop11598 = alloca i1, i1 0
-  %nop11599 = alloca i1, i1 0
-  %nop11600 = alloca i1, i1 0
-  %nop11601 = alloca i1, i1 0
-  %nop11602 = alloca i1, i1 0
-  %nop11603 = alloca i1, i1 0
-  %nop11604 = alloca i1, i1 0
-  %nop11605 = alloca i1, i1 0
-  %nop11606 = alloca i1, i1 0
-  %nop11607 = alloca i1, i1 0
-  %nop11608 = alloca i1, i1 0
-  %nop11609 = alloca i1, i1 0
-  %nop11610 = alloca i1, i1 0
-  %nop11611 = alloca i1, i1 0
-  %nop11612 = alloca i1, i1 0
-  %nop11613 = alloca i1, i1 0
-  %nop11614 = alloca i1, i1 0
-  %nop11615 = alloca i1, i1 0
-  %nop11616 = alloca i1, i1 0
-  %nop11617 = alloca i1, i1 0
-  %nop11618 = alloca i1, i1 0
-  %nop11619 = alloca i1, i1 0
-  %nop11620 = alloca i1, i1 0
-  %nop11621 = alloca i1, i1 0
-  %nop11622 = alloca i1, i1 0
-  %nop11623 = alloca i1, i1 0
-  %nop11624 = alloca i1, i1 0
-  %nop11625 = alloca i1, i1 0
-  %nop11626 = alloca i1, i1 0
-  %nop11627 = alloca i1, i1 0
-  %nop11628 = alloca i1, i1 0
-  %nop11629 = alloca i1, i1 0
-  %nop11630 = alloca i1, i1 0
-  %nop11631 = alloca i1, i1 0
-  %nop11632 = alloca i1, i1 0
-  %nop11633 = alloca i1, i1 0
-  %nop11634 = alloca i1, i1 0
-  %nop11635 = alloca i1, i1 0
-  %nop11636 = alloca i1, i1 0
-  %nop11637 = alloca i1, i1 0
-  %nop11638 = alloca i1, i1 0
-  %nop11639 = alloca i1, i1 0
-  %nop11640 = alloca i1, i1 0
-  %nop11641 = alloca i1, i1 0
-  %nop11642 = alloca i1, i1 0
-  %nop11643 = alloca i1, i1 0
-  %nop11644 = alloca i1, i1 0
-  %nop11645 = alloca i1, i1 0
-  %nop11646 = alloca i1, i1 0
-  %nop11647 = alloca i1, i1 0
-  %nop11648 = alloca i1, i1 0
-  %nop11649 = alloca i1, i1 0
-  %nop11650 = alloca i1, i1 0
-  %nop11651 = alloca i1, i1 0
-  %nop11652 = alloca i1, i1 0
-  %nop11653 = alloca i1, i1 0
-  %nop11654 = alloca i1, i1 0
-  %nop11655 = alloca i1, i1 0
-  %nop11656 = alloca i1, i1 0
-  %nop11657 = alloca i1, i1 0
-  %nop11658 = alloca i1, i1 0
-  %nop11659 = alloca i1, i1 0
-  %nop11660 = alloca i1, i1 0
-  %nop11661 = alloca i1, i1 0
-  %nop11662 = alloca i1, i1 0
-  %nop11663 = alloca i1, i1 0
-  %nop11664 = alloca i1, i1 0
-  %nop11665 = alloca i1, i1 0
-  %nop11666 = alloca i1, i1 0
-  %nop11667 = alloca i1, i1 0
-  %nop11668 = alloca i1, i1 0
-  %nop11669 = alloca i1, i1 0
-  %nop11670 = alloca i1, i1 0
-  %nop11671 = alloca i1, i1 0
-  %nop11672 = alloca i1, i1 0
-  %nop11673 = alloca i1, i1 0
-  %nop11674 = alloca i1, i1 0
-  %nop11675 = alloca i1, i1 0
-  %nop11676 = alloca i1, i1 0
-  %nop11677 = alloca i1, i1 0
-  %nop11678 = alloca i1, i1 0
-  %nop11679 = alloca i1, i1 0
-  %nop11680 = alloca i1, i1 0
-  %nop11681 = alloca i1, i1 0
-  %nop11682 = alloca i1, i1 0
-  %nop11683 = alloca i1, i1 0
-  %nop11684 = alloca i1, i1 0
-  %nop11685 = alloca i1, i1 0
-  %nop11686 = alloca i1, i1 0
-  %nop11687 = alloca i1, i1 0
-  %nop11688 = alloca i1, i1 0
-  %nop11689 = alloca i1, i1 0
-  %nop11690 = alloca i1, i1 0
-  %nop11691 = alloca i1, i1 0
-  %nop11692 = alloca i1, i1 0
-  %nop11693 = alloca i1, i1 0
-  %nop11694 = alloca i1, i1 0
-  %nop11695 = alloca i1, i1 0
-  %nop11696 = alloca i1, i1 0
-  %nop11697 = alloca i1, i1 0
-  %nop11698 = alloca i1, i1 0
-  %nop11699 = alloca i1, i1 0
-  %nop11700 = alloca i1, i1 0
-  %nop11701 = alloca i1, i1 0
-  %nop11702 = alloca i1, i1 0
-  %nop11703 = alloca i1, i1 0
-  %nop11704 = alloca i1, i1 0
-  %nop11705 = alloca i1, i1 0
-  %nop11706 = alloca i1, i1 0
-  %nop11707 = alloca i1, i1 0
-  %nop11708 = alloca i1, i1 0
-  %nop11709 = alloca i1, i1 0
-  %nop11710 = alloca i1, i1 0
-  %nop11711 = alloca i1, i1 0
-  %nop11712 = alloca i1, i1 0
-  %nop11713 = alloca i1, i1 0
-  %nop11714 = alloca i1, i1 0
-  %nop11715 = alloca i1, i1 0
-  %nop11716 = alloca i1, i1 0
-  %nop11717 = alloca i1, i1 0
-  %nop11718 = alloca i1, i1 0
-  %nop11719 = alloca i1, i1 0
-  %nop11720 = alloca i1, i1 0
-  %nop11721 = alloca i1, i1 0
-  %nop11722 = alloca i1, i1 0
-  %nop11723 = alloca i1, i1 0
-  %nop11724 = alloca i1, i1 0
-  %nop11725 = alloca i1, i1 0
-  %nop11726 = alloca i1, i1 0
-  %nop11727 = alloca i1, i1 0
-  %nop11728 = alloca i1, i1 0
-  %nop11729 = alloca i1, i1 0
-  %nop11730 = alloca i1, i1 0
-  %nop11731 = alloca i1, i1 0
-  %nop11732 = alloca i1, i1 0
-  %nop11733 = alloca i1, i1 0
-  %nop11734 = alloca i1, i1 0
-  %nop11735 = alloca i1, i1 0
-  %nop11736 = alloca i1, i1 0
-  %nop11737 = alloca i1, i1 0
-  %nop11738 = alloca i1, i1 0
-  %nop11739 = alloca i1, i1 0
-  %nop11740 = alloca i1, i1 0
-  %nop11741 = alloca i1, i1 0
-  %nop11742 = alloca i1, i1 0
-  %nop11743 = alloca i1, i1 0
-  %nop11744 = alloca i1, i1 0
-  %nop11745 = alloca i1, i1 0
-  %nop11746 = alloca i1, i1 0
-  %nop11747 = alloca i1, i1 0
-  %nop11748 = alloca i1, i1 0
-  %nop11749 = alloca i1, i1 0
-  %nop11750 = alloca i1, i1 0
-  %nop11751 = alloca i1, i1 0
-  %nop11752 = alloca i1, i1 0
-  %nop11753 = alloca i1, i1 0
-  %nop11754 = alloca i1, i1 0
-  %nop11755 = alloca i1, i1 0
-  %nop11756 = alloca i1, i1 0
-  %nop11757 = alloca i1, i1 0
-  %nop11758 = alloca i1, i1 0
-  %nop11759 = alloca i1, i1 0
-  %nop11760 = alloca i1, i1 0
-  %nop11761 = alloca i1, i1 0
-  %nop11762 = alloca i1, i1 0
-  %nop11763 = alloca i1, i1 0
-  %nop11764 = alloca i1, i1 0
-  %nop11765 = alloca i1, i1 0
-  %nop11766 = alloca i1, i1 0
-  %nop11767 = alloca i1, i1 0
-  %nop11768 = alloca i1, i1 0
-  %nop11769 = alloca i1, i1 0
-  %nop11770 = alloca i1, i1 0
-  %nop11771 = alloca i1, i1 0
-  %nop11772 = alloca i1, i1 0
-  %nop11773 = alloca i1, i1 0
-  %nop11774 = alloca i1, i1 0
-  %nop11775 = alloca i1, i1 0
-  %nop11776 = alloca i1, i1 0
-  %nop11777 = alloca i1, i1 0
-  %nop11778 = alloca i1, i1 0
-  %nop11779 = alloca i1, i1 0
-  %nop11780 = alloca i1, i1 0
-  %nop11781 = alloca i1, i1 0
-  %nop11782 = alloca i1, i1 0
-  %nop11783 = alloca i1, i1 0
-  %nop11784 = alloca i1, i1 0
-  %nop11785 = alloca i1, i1 0
-  %nop11786 = alloca i1, i1 0
-  %nop11787 = alloca i1, i1 0
-  %nop11788 = alloca i1, i1 0
-  %nop11789 = alloca i1, i1 0
-  %nop11790 = alloca i1, i1 0
-  %nop11791 = alloca i1, i1 0
-  %nop11792 = alloca i1, i1 0
-  %nop11793 = alloca i1, i1 0
-  %nop11794 = alloca i1, i1 0
-  %nop11795 = alloca i1, i1 0
-  %nop11796 = alloca i1, i1 0
-  %nop11797 = alloca i1, i1 0
-  %nop11798 = alloca i1, i1 0
-  %nop11799 = alloca i1, i1 0
-  %nop11800 = alloca i1, i1 0
-  %nop11801 = alloca i1, i1 0
-  %nop11802 = alloca i1, i1 0
-  %nop11803 = alloca i1, i1 0
-  %nop11804 = alloca i1, i1 0
-  %nop11805 = alloca i1, i1 0
-  %nop11806 = alloca i1, i1 0
-  %nop11807 = alloca i1, i1 0
-  %nop11808 = alloca i1, i1 0
-  %nop11809 = alloca i1, i1 0
-  %nop11810 = alloca i1, i1 0
-  %nop11811 = alloca i1, i1 0
-  %nop11812 = alloca i1, i1 0
-  %nop11813 = alloca i1, i1 0
-  %nop11814 = alloca i1, i1 0
-  %nop11815 = alloca i1, i1 0
-  %nop11816 = alloca i1, i1 0
-  %nop11817 = alloca i1, i1 0
-  %nop11818 = alloca i1, i1 0
-  %nop11819 = alloca i1, i1 0
-  %nop11820 = alloca i1, i1 0
-  %nop11821 = alloca i1, i1 0
-  %nop11822 = alloca i1, i1 0
-  %nop11823 = alloca i1, i1 0
-  %nop11824 = alloca i1, i1 0
-  %nop11825 = alloca i1, i1 0
-  %nop11826 = alloca i1, i1 0
-  %nop11827 = alloca i1, i1 0
-  %nop11828 = alloca i1, i1 0
-  %nop11829 = alloca i1, i1 0
-  %nop11830 = alloca i1, i1 0
-  %nop11831 = alloca i1, i1 0
-  %nop11832 = alloca i1, i1 0
-  %nop11833 = alloca i1, i1 0
-  %nop11834 = alloca i1, i1 0
-  %nop11835 = alloca i1, i1 0
-  %nop11836 = alloca i1, i1 0
-  %nop11837 = alloca i1, i1 0
-  %nop11838 = alloca i1, i1 0
-  %nop11839 = alloca i1, i1 0
-  %nop11840 = alloca i1, i1 0
-  %nop11841 = alloca i1, i1 0
-  %nop11842 = alloca i1, i1 0
-  %nop11843 = alloca i1, i1 0
-  %nop11844 = alloca i1, i1 0
-  %nop11845 = alloca i1, i1 0
-  %nop11846 = alloca i1, i1 0
-  %nop11847 = alloca i1, i1 0
-  %nop11848 = alloca i1, i1 0
-  %nop11849 = alloca i1, i1 0
-  %nop11850 = alloca i1, i1 0
-  %nop11851 = alloca i1, i1 0
-  %nop11852 = alloca i1, i1 0
-  %nop11853 = alloca i1, i1 0
-  %nop11854 = alloca i1, i1 0
-  %nop11855 = alloca i1, i1 0
-  %nop11856 = alloca i1, i1 0
-  %nop11857 = alloca i1, i1 0
-  %nop11858 = alloca i1, i1 0
-  %nop11859 = alloca i1, i1 0
-  %nop11860 = alloca i1, i1 0
-  %nop11861 = alloca i1, i1 0
-  %nop11862 = alloca i1, i1 0
-  %nop11863 = alloca i1, i1 0
-  %nop11864 = alloca i1, i1 0
-  %nop11865 = alloca i1, i1 0
-  %nop11866 = alloca i1, i1 0
-  %nop11867 = alloca i1, i1 0
-  %nop11868 = alloca i1, i1 0
-  %nop11869 = alloca i1, i1 0
-  %nop11870 = alloca i1, i1 0
-  %nop11871 = alloca i1, i1 0
-  %nop11872 = alloca i1, i1 0
-  %nop11873 = alloca i1, i1 0
-  %nop11874 = alloca i1, i1 0
-  %nop11875 = alloca i1, i1 0
-  %nop11876 = alloca i1, i1 0
-  %nop11877 = alloca i1, i1 0
-  %nop11878 = alloca i1, i1 0
-  %nop11879 = alloca i1, i1 0
-  %nop11880 = alloca i1, i1 0
-  %nop11881 = alloca i1, i1 0
-  %nop11882 = alloca i1, i1 0
-  %nop11883 = alloca i1, i1 0
-  %nop11884 = alloca i1, i1 0
-  %nop11885 = alloca i1, i1 0
-  %nop11886 = alloca i1, i1 0
-  %nop11887 = alloca i1, i1 0
-  %nop11888 = alloca i1, i1 0
-  %nop11889 = alloca i1, i1 0
-  %nop11890 = alloca i1, i1 0
-  %nop11891 = alloca i1, i1 0
-  %nop11892 = alloca i1, i1 0
-  %nop11893 = alloca i1, i1 0
-  %nop11894 = alloca i1, i1 0
-  %nop11895 = alloca i1, i1 0
-  %nop11896 = alloca i1, i1 0
-  %nop11897 = alloca i1, i1 0
-  %nop11898 = alloca i1, i1 0
-  %nop11899 = alloca i1, i1 0
-  %nop11900 = alloca i1, i1 0
-  %nop11901 = alloca i1, i1 0
-  %nop11902 = alloca i1, i1 0
-  %nop11903 = alloca i1, i1 0
-  %nop11904 = alloca i1, i1 0
-  %nop11905 = alloca i1, i1 0
-  %nop11906 = alloca i1, i1 0
-  %nop11907 = alloca i1, i1 0
-  %nop11908 = alloca i1, i1 0
-  %nop11909 = alloca i1, i1 0
-  %nop11910 = alloca i1, i1 0
-  %nop11911 = alloca i1, i1 0
-  %nop11912 = alloca i1, i1 0
-  %nop11913 = alloca i1, i1 0
-  %nop11914 = alloca i1, i1 0
-  %nop11915 = alloca i1, i1 0
-  %nop11916 = alloca i1, i1 0
-  %nop11917 = alloca i1, i1 0
-  %nop11918 = alloca i1, i1 0
-  %nop11919 = alloca i1, i1 0
-  %nop11920 = alloca i1, i1 0
-  %nop11921 = alloca i1, i1 0
-  %nop11922 = alloca i1, i1 0
-  %nop11923 = alloca i1, i1 0
-  %nop11924 = alloca i1, i1 0
-  %nop11925 = alloca i1, i1 0
-  %nop11926 = alloca i1, i1 0
-  %nop11927 = alloca i1, i1 0
-  %nop11928 = alloca i1, i1 0
-  %nop11929 = alloca i1, i1 0
-  %nop11930 = alloca i1, i1 0
-  %nop11931 = alloca i1, i1 0
-  %nop11932 = alloca i1, i1 0
-  %nop11933 = alloca i1, i1 0
-  %nop11934 = alloca i1, i1 0
-  %nop11935 = alloca i1, i1 0
-  %nop11936 = alloca i1, i1 0
-  %nop11937 = alloca i1, i1 0
-  %nop11938 = alloca i1, i1 0
-  %nop11939 = alloca i1, i1 0
-  %nop11940 = alloca i1, i1 0
-  %nop11941 = alloca i1, i1 0
-  %nop11942 = alloca i1, i1 0
-  %nop11943 = alloca i1, i1 0
-  %nop11944 = alloca i1, i1 0
-  %nop11945 = alloca i1, i1 0
-  %nop11946 = alloca i1, i1 0
-  %nop11947 = alloca i1, i1 0
-  %nop11948 = alloca i1, i1 0
-  %nop11949 = alloca i1, i1 0
-  %nop11950 = alloca i1, i1 0
-  %nop11951 = alloca i1, i1 0
-  %nop11952 = alloca i1, i1 0
-  %nop11953 = alloca i1, i1 0
-  %nop11954 = alloca i1, i1 0
-  %nop11955 = alloca i1, i1 0
-  %nop11956 = alloca i1, i1 0
-  %nop11957 = alloca i1, i1 0
-  %nop11958 = alloca i1, i1 0
-  %nop11959 = alloca i1, i1 0
-  %nop11960 = alloca i1, i1 0
-  %nop11961 = alloca i1, i1 0
-  %nop11962 = alloca i1, i1 0
-  %nop11963 = alloca i1, i1 0
-  %nop11964 = alloca i1, i1 0
-  %nop11965 = alloca i1, i1 0
-  %nop11966 = alloca i1, i1 0
-  %nop11967 = alloca i1, i1 0
-  %nop11968 = alloca i1, i1 0
-  %nop11969 = alloca i1, i1 0
-  %nop11970 = alloca i1, i1 0
-  %nop11971 = alloca i1, i1 0
-  %nop11972 = alloca i1, i1 0
-  %nop11973 = alloca i1, i1 0
-  %nop11974 = alloca i1, i1 0
-  %nop11975 = alloca i1, i1 0
-  %nop11976 = alloca i1, i1 0
-  %nop11977 = alloca i1, i1 0
-  %nop11978 = alloca i1, i1 0
-  %nop11979 = alloca i1, i1 0
-  %nop11980 = alloca i1, i1 0
-  %nop11981 = alloca i1, i1 0
-  %nop11982 = alloca i1, i1 0
-  %nop11983 = alloca i1, i1 0
-  %nop11984 = alloca i1, i1 0
-  %nop11985 = alloca i1, i1 0
-  %nop11986 = alloca i1, i1 0
-  %nop11987 = alloca i1, i1 0
-  %nop11988 = alloca i1, i1 0
-  %nop11989 = alloca i1, i1 0
-  %nop11990 = alloca i1, i1 0
-  %nop11991 = alloca i1, i1 0
-  %nop11992 = alloca i1, i1 0
-  %nop11993 = alloca i1, i1 0
-  %nop11994 = alloca i1, i1 0
-  %nop11995 = alloca i1, i1 0
-  %nop11996 = alloca i1, i1 0
-  %nop11997 = alloca i1, i1 0
-  %nop11998 = alloca i1, i1 0
-  %nop11999 = alloca i1, i1 0
-  %nop12000 = alloca i1, i1 0
-  %nop12001 = alloca i1, i1 0
-  %nop12002 = alloca i1, i1 0
-  %nop12003 = alloca i1, i1 0
-  %nop12004 = alloca i1, i1 0
-  %nop12005 = alloca i1, i1 0
-  %nop12006 = alloca i1, i1 0
-  %nop12007 = alloca i1, i1 0
-  %nop12008 = alloca i1, i1 0
-  %nop12009 = alloca i1, i1 0
-  %nop12010 = alloca i1, i1 0
-  %nop12011 = alloca i1, i1 0
-  %nop12012 = alloca i1, i1 0
-  %nop12013 = alloca i1, i1 0
-  %nop12014 = alloca i1, i1 0
-  %nop12015 = alloca i1, i1 0
-  %nop12016 = alloca i1, i1 0
-  %nop12017 = alloca i1, i1 0
-  %nop12018 = alloca i1, i1 0
-  %nop12019 = alloca i1, i1 0
-  %nop12020 = alloca i1, i1 0
-  %nop12021 = alloca i1, i1 0
-  %nop12022 = alloca i1, i1 0
-  %nop12023 = alloca i1, i1 0
-  %nop12024 = alloca i1, i1 0
-  %nop12025 = alloca i1, i1 0
-  %nop12026 = alloca i1, i1 0
-  %nop12027 = alloca i1, i1 0
-  %nop12028 = alloca i1, i1 0
-  %nop12029 = alloca i1, i1 0
-  %nop12030 = alloca i1, i1 0
-  %nop12031 = alloca i1, i1 0
-  %nop12032 = alloca i1, i1 0
-  %nop12033 = alloca i1, i1 0
-  %nop12034 = alloca i1, i1 0
-  %nop12035 = alloca i1, i1 0
-  %nop12036 = alloca i1, i1 0
-  %nop12037 = alloca i1, i1 0
-  %nop12038 = alloca i1, i1 0
-  %nop12039 = alloca i1, i1 0
-  %nop12040 = alloca i1, i1 0
-  %nop12041 = alloca i1, i1 0
-  %nop12042 = alloca i1, i1 0
-  %nop12043 = alloca i1, i1 0
-  %nop12044 = alloca i1, i1 0
-  %nop12045 = alloca i1, i1 0
-  %nop12046 = alloca i1, i1 0
-  %nop12047 = alloca i1, i1 0
-  %nop12048 = alloca i1, i1 0
-  %nop12049 = alloca i1, i1 0
-  %nop12050 = alloca i1, i1 0
-  %nop12051 = alloca i1, i1 0
-  %nop12052 = alloca i1, i1 0
-  %nop12053 = alloca i1, i1 0
-  %nop12054 = alloca i1, i1 0
-  %nop12055 = alloca i1, i1 0
-  %nop12056 = alloca i1, i1 0
-  %nop12057 = alloca i1, i1 0
-  %nop12058 = alloca i1, i1 0
-  %nop12059 = alloca i1, i1 0
-  %nop12060 = alloca i1, i1 0
-  %nop12061 = alloca i1, i1 0
-  %nop12062 = alloca i1, i1 0
-  %nop12063 = alloca i1, i1 0
-  %nop12064 = alloca i1, i1 0
-  %nop12065 = alloca i1, i1 0
-  %nop12066 = alloca i1, i1 0
-  %nop12067 = alloca i1, i1 0
-  %nop12068 = alloca i1, i1 0
-  %nop12069 = alloca i1, i1 0
-  %nop12070 = alloca i1, i1 0
-  %nop12071 = alloca i1, i1 0
-  %nop12072 = alloca i1, i1 0
-  %nop12073 = alloca i1, i1 0
-  %nop12074 = alloca i1, i1 0
-  %nop12075 = alloca i1, i1 0
-  %nop12076 = alloca i1, i1 0
-  %nop12077 = alloca i1, i1 0
-  %nop12078 = alloca i1, i1 0
-  %nop12079 = alloca i1, i1 0
-  %nop12080 = alloca i1, i1 0
-  %nop12081 = alloca i1, i1 0
-  %nop12082 = alloca i1, i1 0
-  %nop12083 = alloca i1, i1 0
-  %nop12084 = alloca i1, i1 0
-  %nop12085 = alloca i1, i1 0
-  %nop12086 = alloca i1, i1 0
-  %nop12087 = alloca i1, i1 0
-  %nop12088 = alloca i1, i1 0
-  %nop12089 = alloca i1, i1 0
-  %nop12090 = alloca i1, i1 0
-  %nop12091 = alloca i1, i1 0
-  %nop12092 = alloca i1, i1 0
-  %nop12093 = alloca i1, i1 0
-  %nop12094 = alloca i1, i1 0
-  %nop12095 = alloca i1, i1 0
-  %nop12096 = alloca i1, i1 0
-  %nop12097 = alloca i1, i1 0
-  %nop12098 = alloca i1, i1 0
-  %nop12099 = alloca i1, i1 0
-  %nop12100 = alloca i1, i1 0
-  %nop12101 = alloca i1, i1 0
-  %nop12102 = alloca i1, i1 0
-  %nop12103 = alloca i1, i1 0
-  %nop12104 = alloca i1, i1 0
-  %nop12105 = alloca i1, i1 0
-  %nop12106 = alloca i1, i1 0
-  %nop12107 = alloca i1, i1 0
-  %nop12108 = alloca i1, i1 0
-  %nop12109 = alloca i1, i1 0
-  %nop12110 = alloca i1, i1 0
-  %nop12111 = alloca i1, i1 0
-  %nop12112 = alloca i1, i1 0
-  %nop12113 = alloca i1, i1 0
-  %nop12114 = alloca i1, i1 0
-  %nop12115 = alloca i1, i1 0
-  %nop12116 = alloca i1, i1 0
-  %nop12117 = alloca i1, i1 0
-  %nop12118 = alloca i1, i1 0
-  %nop12119 = alloca i1, i1 0
-  %nop12120 = alloca i1, i1 0
-  %nop12121 = alloca i1, i1 0
-  %nop12122 = alloca i1, i1 0
-  %nop12123 = alloca i1, i1 0
-  %nop12124 = alloca i1, i1 0
-  %nop12125 = alloca i1, i1 0
-  %nop12126 = alloca i1, i1 0
-  %nop12127 = alloca i1, i1 0
-  %nop12128 = alloca i1, i1 0
-  %nop12129 = alloca i1, i1 0
-  %nop12130 = alloca i1, i1 0
-  %nop12131 = alloca i1, i1 0
-  %nop12132 = alloca i1, i1 0
-  %nop12133 = alloca i1, i1 0
-  %nop12134 = alloca i1, i1 0
-  %nop12135 = alloca i1, i1 0
-  %nop12136 = alloca i1, i1 0
-  %nop12137 = alloca i1, i1 0
-  %nop12138 = alloca i1, i1 0
-  %nop12139 = alloca i1, i1 0
-  %nop12140 = alloca i1, i1 0
-  %nop12141 = alloca i1, i1 0
-  %nop12142 = alloca i1, i1 0
-  %nop12143 = alloca i1, i1 0
-  %nop12144 = alloca i1, i1 0
-  %nop12145 = alloca i1, i1 0
-  %nop12146 = alloca i1, i1 0
-  %nop12147 = alloca i1, i1 0
-  %nop12148 = alloca i1, i1 0
-  %nop12149 = alloca i1, i1 0
-  %nop12150 = alloca i1, i1 0
-  %nop12151 = alloca i1, i1 0
-  %nop12152 = alloca i1, i1 0
-  %nop12153 = alloca i1, i1 0
-  %nop12154 = alloca i1, i1 0
-  %nop12155 = alloca i1, i1 0
-  %nop12156 = alloca i1, i1 0
-  %nop12157 = alloca i1, i1 0
-  %nop12158 = alloca i1, i1 0
-  %nop12159 = alloca i1, i1 0
-  %nop12160 = alloca i1, i1 0
-  %nop12161 = alloca i1, i1 0
-  %nop12162 = alloca i1, i1 0
-  %nop12163 = alloca i1, i1 0
-  %nop12164 = alloca i1, i1 0
-  %nop12165 = alloca i1, i1 0
-  %nop12166 = alloca i1, i1 0
-  %nop12167 = alloca i1, i1 0
-  %nop12168 = alloca i1, i1 0
-  %nop12169 = alloca i1, i1 0
-  %nop12170 = alloca i1, i1 0
-  %nop12171 = alloca i1, i1 0
-  %nop12172 = alloca i1, i1 0
-  %nop12173 = alloca i1, i1 0
-  %nop12174 = alloca i1, i1 0
-  %nop12175 = alloca i1, i1 0
-  %nop12176 = alloca i1, i1 0
-  %nop12177 = alloca i1, i1 0
-  %nop12178 = alloca i1, i1 0
-  %nop12179 = alloca i1, i1 0
-  %nop12180 = alloca i1, i1 0
-  %nop12181 = alloca i1, i1 0
-  %nop12182 = alloca i1, i1 0
-  %nop12183 = alloca i1, i1 0
-  %nop12184 = alloca i1, i1 0
-  %nop12185 = alloca i1, i1 0
-  %nop12186 = alloca i1, i1 0
-  %nop12187 = alloca i1, i1 0
-  %nop12188 = alloca i1, i1 0
-  %nop12189 = alloca i1, i1 0
-  %nop12190 = alloca i1, i1 0
-  %nop12191 = alloca i1, i1 0
-  %nop12192 = alloca i1, i1 0
-  %nop12193 = alloca i1, i1 0
-  %nop12194 = alloca i1, i1 0
-  %nop12195 = alloca i1, i1 0
-  %nop12196 = alloca i1, i1 0
-  %nop12197 = alloca i1, i1 0
-  %nop12198 = alloca i1, i1 0
-  %nop12199 = alloca i1, i1 0
-  %nop12200 = alloca i1, i1 0
-  %nop12201 = alloca i1, i1 0
-  %nop12202 = alloca i1, i1 0
-  %nop12203 = alloca i1, i1 0
-  %nop12204 = alloca i1, i1 0
-  %nop12205 = alloca i1, i1 0
-  %nop12206 = alloca i1, i1 0
-  %nop12207 = alloca i1, i1 0
-  %nop12208 = alloca i1, i1 0
-  %nop12209 = alloca i1, i1 0
-  %nop12210 = alloca i1, i1 0
-  %nop12211 = alloca i1, i1 0
-  %nop12212 = alloca i1, i1 0
-  %nop12213 = alloca i1, i1 0
-  %nop12214 = alloca i1, i1 0
-  %nop12215 = alloca i1, i1 0
-  %nop12216 = alloca i1, i1 0
-  %nop12217 = alloca i1, i1 0
-  %nop12218 = alloca i1, i1 0
-  %nop12219 = alloca i1, i1 0
-  %nop12220 = alloca i1, i1 0
-  %nop12221 = alloca i1, i1 0
-  %nop12222 = alloca i1, i1 0
-  %nop12223 = alloca i1, i1 0
-  %nop12224 = alloca i1, i1 0
-  %nop12225 = alloca i1, i1 0
-  %nop12226 = alloca i1, i1 0
-  %nop12227 = alloca i1, i1 0
-  %nop12228 = alloca i1, i1 0
-  %nop12229 = alloca i1, i1 0
-  %nop12230 = alloca i1, i1 0
-  %nop12231 = alloca i1, i1 0
-  %nop12232 = alloca i1, i1 0
-  %nop12233 = alloca i1, i1 0
-  %nop12234 = alloca i1, i1 0
-  %nop12235 = alloca i1, i1 0
-  %nop12236 = alloca i1, i1 0
-  %nop12237 = alloca i1, i1 0
-  %nop12238 = alloca i1, i1 0
-  %nop12239 = alloca i1, i1 0
-  %nop12240 = alloca i1, i1 0
-  %nop12241 = alloca i1, i1 0
-  %nop12242 = alloca i1, i1 0
-  %nop12243 = alloca i1, i1 0
-  %nop12244 = alloca i1, i1 0
-  %nop12245 = alloca i1, i1 0
-  %nop12246 = alloca i1, i1 0
-  %nop12247 = alloca i1, i1 0
-  %nop12248 = alloca i1, i1 0
-  %nop12249 = alloca i1, i1 0
-  %nop12250 = alloca i1, i1 0
-  %nop12251 = alloca i1, i1 0
-  %nop12252 = alloca i1, i1 0
-  %nop12253 = alloca i1, i1 0
-  %nop12254 = alloca i1, i1 0
-  %nop12255 = alloca i1, i1 0
-  %nop12256 = alloca i1, i1 0
-  %nop12257 = alloca i1, i1 0
-  %nop12258 = alloca i1, i1 0
-  %nop12259 = alloca i1, i1 0
-  %nop12260 = alloca i1, i1 0
-  %nop12261 = alloca i1, i1 0
-  %nop12262 = alloca i1, i1 0
-  %nop12263 = alloca i1, i1 0
-  %nop12264 = alloca i1, i1 0
-  %nop12265 = alloca i1, i1 0
-  %nop12266 = alloca i1, i1 0
-  %nop12267 = alloca i1, i1 0
-  %nop12268 = alloca i1, i1 0
-  %nop12269 = alloca i1, i1 0
-  %nop12270 = alloca i1, i1 0
-  %nop12271 = alloca i1, i1 0
-  %nop12272 = alloca i1, i1 0
-  %nop12273 = alloca i1, i1 0
-  %nop12274 = alloca i1, i1 0
-  %nop12275 = alloca i1, i1 0
-  %nop12276 = alloca i1, i1 0
-  %nop12277 = alloca i1, i1 0
-  %nop12278 = alloca i1, i1 0
-  %nop12279 = alloca i1, i1 0
-  %nop12280 = alloca i1, i1 0
-  %nop12281 = alloca i1, i1 0
-  %nop12282 = alloca i1, i1 0
-  %nop12283 = alloca i1, i1 0
-  %nop12284 = alloca i1, i1 0
-  %nop12285 = alloca i1, i1 0
-  %nop12286 = alloca i1, i1 0
-  %nop12287 = alloca i1, i1 0
-  %nop12288 = alloca i1, i1 0
-  %nop12289 = alloca i1, i1 0
-  %nop12290 = alloca i1, i1 0
-  %nop12291 = alloca i1, i1 0
-  %nop12292 = alloca i1, i1 0
-  %nop12293 = alloca i1, i1 0
-  %nop12294 = alloca i1, i1 0
-  %nop12295 = alloca i1, i1 0
-  %nop12296 = alloca i1, i1 0
-  %nop12297 = alloca i1, i1 0
-  %nop12298 = alloca i1, i1 0
-  %nop12299 = alloca i1, i1 0
-  %nop12300 = alloca i1, i1 0
-  %nop12301 = alloca i1, i1 0
-  %nop12302 = alloca i1, i1 0
-  %nop12303 = alloca i1, i1 0
-  %nop12304 = alloca i1, i1 0
-  %nop12305 = alloca i1, i1 0
-  %nop12306 = alloca i1, i1 0
-  %nop12307 = alloca i1, i1 0
-  %nop12308 = alloca i1, i1 0
-  %nop12309 = alloca i1, i1 0
-  %nop12310 = alloca i1, i1 0
-  %nop12311 = alloca i1, i1 0
-  %nop12312 = alloca i1, i1 0
-  %nop12313 = alloca i1, i1 0
-  %nop12314 = alloca i1, i1 0
-  %nop12315 = alloca i1, i1 0
-  %nop12316 = alloca i1, i1 0
-  %nop12317 = alloca i1, i1 0
-  %nop12318 = alloca i1, i1 0
-  %nop12319 = alloca i1, i1 0
-  %nop12320 = alloca i1, i1 0
-  %nop12321 = alloca i1, i1 0
-  %nop12322 = alloca i1, i1 0
-  %nop12323 = alloca i1, i1 0
-  %nop12324 = alloca i1, i1 0
-  %nop12325 = alloca i1, i1 0
-  %nop12326 = alloca i1, i1 0
-  %nop12327 = alloca i1, i1 0
-  %nop12328 = alloca i1, i1 0
-  %nop12329 = alloca i1, i1 0
-  %nop12330 = alloca i1, i1 0
-  %nop12331 = alloca i1, i1 0
-  %nop12332 = alloca i1, i1 0
-  %nop12333 = alloca i1, i1 0
-  %nop12334 = alloca i1, i1 0
-  %nop12335 = alloca i1, i1 0
-  %nop12336 = alloca i1, i1 0
-  %nop12337 = alloca i1, i1 0
-  %nop12338 = alloca i1, i1 0
-  %nop12339 = alloca i1, i1 0
-  %nop12340 = alloca i1, i1 0
-  %nop12341 = alloca i1, i1 0
-  %nop12342 = alloca i1, i1 0
-  %nop12343 = alloca i1, i1 0
-  %nop12344 = alloca i1, i1 0
-  %nop12345 = alloca i1, i1 0
-  %nop12346 = alloca i1, i1 0
-  %nop12347 = alloca i1, i1 0
-  %nop12348 = alloca i1, i1 0
-  %nop12349 = alloca i1, i1 0
-  %nop12350 = alloca i1, i1 0
-  %nop12351 = alloca i1, i1 0
-  %nop12352 = alloca i1, i1 0
-  %nop12353 = alloca i1, i1 0
-  %nop12354 = alloca i1, i1 0
-  %nop12355 = alloca i1, i1 0
-  %nop12356 = alloca i1, i1 0
-  %nop12357 = alloca i1, i1 0
-  %nop12358 = alloca i1, i1 0
-  %nop12359 = alloca i1, i1 0
-  %nop12360 = alloca i1, i1 0
-  %nop12361 = alloca i1, i1 0
-  %nop12362 = alloca i1, i1 0
-  %nop12363 = alloca i1, i1 0
-  %nop12364 = alloca i1, i1 0
-  %nop12365 = alloca i1, i1 0
-  %nop12366 = alloca i1, i1 0
-  %nop12367 = alloca i1, i1 0
-  %nop12368 = alloca i1, i1 0
-  %nop12369 = alloca i1, i1 0
-  %nop12370 = alloca i1, i1 0
-  %nop12371 = alloca i1, i1 0
-  %nop12372 = alloca i1, i1 0
-  %nop12373 = alloca i1, i1 0
-  %nop12374 = alloca i1, i1 0
-  %nop12375 = alloca i1, i1 0
-  %nop12376 = alloca i1, i1 0
-  %nop12377 = alloca i1, i1 0
-  %nop12378 = alloca i1, i1 0
-  %nop12379 = alloca i1, i1 0
-  %nop12380 = alloca i1, i1 0
-  %nop12381 = alloca i1, i1 0
-  %nop12382 = alloca i1, i1 0
-  %nop12383 = alloca i1, i1 0
-  %nop12384 = alloca i1, i1 0
-  %nop12385 = alloca i1, i1 0
-  %nop12386 = alloca i1, i1 0
-  %nop12387 = alloca i1, i1 0
-  %nop12388 = alloca i1, i1 0
-  %nop12389 = alloca i1, i1 0
-  %nop12390 = alloca i1, i1 0
-  %nop12391 = alloca i1, i1 0
-  %nop12392 = alloca i1, i1 0
-  %nop12393 = alloca i1, i1 0
-  %nop12394 = alloca i1, i1 0
-  %nop12395 = alloca i1, i1 0
-  %nop12396 = alloca i1, i1 0
-  %nop12397 = alloca i1, i1 0
-  %nop12398 = alloca i1, i1 0
-  %nop12399 = alloca i1, i1 0
-  %nop12400 = alloca i1, i1 0
-  %nop12401 = alloca i1, i1 0
-  %nop12402 = alloca i1, i1 0
-  %nop12403 = alloca i1, i1 0
-  %nop12404 = alloca i1, i1 0
-  %nop12405 = alloca i1, i1 0
-  %nop12406 = alloca i1, i1 0
-  %nop12407 = alloca i1, i1 0
-  %nop12408 = alloca i1, i1 0
-  %nop12409 = alloca i1, i1 0
-  %nop12410 = alloca i1, i1 0
-  %nop12411 = alloca i1, i1 0
-  %nop12412 = alloca i1, i1 0
-  %nop12413 = alloca i1, i1 0
-  %nop12414 = alloca i1, i1 0
-  %nop12415 = alloca i1, i1 0
-  %nop12416 = alloca i1, i1 0
-  %nop12417 = alloca i1, i1 0
-  %nop12418 = alloca i1, i1 0
-  %nop12419 = alloca i1, i1 0
-  %nop12420 = alloca i1, i1 0
-  %nop12421 = alloca i1, i1 0
-  %nop12422 = alloca i1, i1 0
-  %nop12423 = alloca i1, i1 0
-  %nop12424 = alloca i1, i1 0
-  %nop12425 = alloca i1, i1 0
-  %nop12426 = alloca i1, i1 0
-  %nop12427 = alloca i1, i1 0
-  %nop12428 = alloca i1, i1 0
-  %nop12429 = alloca i1, i1 0
-  %nop12430 = alloca i1, i1 0
-  %nop12431 = alloca i1, i1 0
-  %nop12432 = alloca i1, i1 0
-  %nop12433 = alloca i1, i1 0
-  %nop12434 = alloca i1, i1 0
-  %nop12435 = alloca i1, i1 0
-  %nop12436 = alloca i1, i1 0
-  %nop12437 = alloca i1, i1 0
-  %nop12438 = alloca i1, i1 0
-  %nop12439 = alloca i1, i1 0
-  %nop12440 = alloca i1, i1 0
-  %nop12441 = alloca i1, i1 0
-  %nop12442 = alloca i1, i1 0
-  %nop12443 = alloca i1, i1 0
-  %nop12444 = alloca i1, i1 0
-  %nop12445 = alloca i1, i1 0
-  %nop12446 = alloca i1, i1 0
-  %nop12447 = alloca i1, i1 0
-  %nop12448 = alloca i1, i1 0
-  %nop12449 = alloca i1, i1 0
-  %nop12450 = alloca i1, i1 0
-  %nop12451 = alloca i1, i1 0
-  %nop12452 = alloca i1, i1 0
-  %nop12453 = alloca i1, i1 0
-  %nop12454 = alloca i1, i1 0
-  %nop12455 = alloca i1, i1 0
-  %nop12456 = alloca i1, i1 0
-  %nop12457 = alloca i1, i1 0
-  %nop12458 = alloca i1, i1 0
-  %nop12459 = alloca i1, i1 0
-  %nop12460 = alloca i1, i1 0
-  %nop12461 = alloca i1, i1 0
-  %nop12462 = alloca i1, i1 0
-  %nop12463 = alloca i1, i1 0
-  %nop12464 = alloca i1, i1 0
-  %nop12465 = alloca i1, i1 0
-  %nop12466 = alloca i1, i1 0
-  %nop12467 = alloca i1, i1 0
-  %nop12468 = alloca i1, i1 0
-  %nop12469 = alloca i1, i1 0
-  %nop12470 = alloca i1, i1 0
-  %nop12471 = alloca i1, i1 0
-  %nop12472 = alloca i1, i1 0
-  %nop12473 = alloca i1, i1 0
-  %nop12474 = alloca i1, i1 0
-  %nop12475 = alloca i1, i1 0
-  %nop12476 = alloca i1, i1 0
-  %nop12477 = alloca i1, i1 0
-  %nop12478 = alloca i1, i1 0
-  %nop12479 = alloca i1, i1 0
-  %nop12480 = alloca i1, i1 0
-  %nop12481 = alloca i1, i1 0
-  %nop12482 = alloca i1, i1 0
-  %nop12483 = alloca i1, i1 0
-  %nop12484 = alloca i1, i1 0
-  %nop12485 = alloca i1, i1 0
-  %nop12486 = alloca i1, i1 0
-  %nop12487 = alloca i1, i1 0
-  %nop12488 = alloca i1, i1 0
-  %nop12489 = alloca i1, i1 0
-  %nop12490 = alloca i1, i1 0
-  %nop12491 = alloca i1, i1 0
-  %nop12492 = alloca i1, i1 0
-  %nop12493 = alloca i1, i1 0
-  %nop12494 = alloca i1, i1 0
-  %nop12495 = alloca i1, i1 0
-  %nop12496 = alloca i1, i1 0
-  %nop12497 = alloca i1, i1 0
-  %nop12498 = alloca i1, i1 0
-  %nop12499 = alloca i1, i1 0
-  %nop12500 = alloca i1, i1 0
-  %nop12501 = alloca i1, i1 0
-  %nop12502 = alloca i1, i1 0
-  %nop12503 = alloca i1, i1 0
-  %nop12504 = alloca i1, i1 0
-  %nop12505 = alloca i1, i1 0
-  %nop12506 = alloca i1, i1 0
-  %nop12507 = alloca i1, i1 0
-  %nop12508 = alloca i1, i1 0
-  %nop12509 = alloca i1, i1 0
-  %nop12510 = alloca i1, i1 0
-  %nop12511 = alloca i1, i1 0
-  %nop12512 = alloca i1, i1 0
-  %nop12513 = alloca i1, i1 0
-  %nop12514 = alloca i1, i1 0
-  %nop12515 = alloca i1, i1 0
-  %nop12516 = alloca i1, i1 0
-  %nop12517 = alloca i1, i1 0
-  %nop12518 = alloca i1, i1 0
-  %nop12519 = alloca i1, i1 0
-  %nop12520 = alloca i1, i1 0
-  %nop12521 = alloca i1, i1 0
-  %nop12522 = alloca i1, i1 0
-  %nop12523 = alloca i1, i1 0
-  %nop12524 = alloca i1, i1 0
-  %nop12525 = alloca i1, i1 0
-  %nop12526 = alloca i1, i1 0
-  %nop12527 = alloca i1, i1 0
-  %nop12528 = alloca i1, i1 0
-  %nop12529 = alloca i1, i1 0
-  %nop12530 = alloca i1, i1 0
-  %nop12531 = alloca i1, i1 0
-  %nop12532 = alloca i1, i1 0
-  %nop12533 = alloca i1, i1 0
-  %nop12534 = alloca i1, i1 0
-  %nop12535 = alloca i1, i1 0
-  %nop12536 = alloca i1, i1 0
-  %nop12537 = alloca i1, i1 0
-  %nop12538 = alloca i1, i1 0
-  %nop12539 = alloca i1, i1 0
-  %nop12540 = alloca i1, i1 0
-  %nop12541 = alloca i1, i1 0
-  %nop12542 = alloca i1, i1 0
-  %nop12543 = alloca i1, i1 0
-  %nop12544 = alloca i1, i1 0
-  %nop12545 = alloca i1, i1 0
-  %nop12546 = alloca i1, i1 0
-  %nop12547 = alloca i1, i1 0
-  %nop12548 = alloca i1, i1 0
-  %nop12549 = alloca i1, i1 0
-  %nop12550 = alloca i1, i1 0
-  %nop12551 = alloca i1, i1 0
-  %nop12552 = alloca i1, i1 0
-  %nop12553 = alloca i1, i1 0
-  %nop12554 = alloca i1, i1 0
-  %nop12555 = alloca i1, i1 0
-  %nop12556 = alloca i1, i1 0
-  %nop12557 = alloca i1, i1 0
-  %nop12558 = alloca i1, i1 0
-  %nop12559 = alloca i1, i1 0
-  %nop12560 = alloca i1, i1 0
-  %nop12561 = alloca i1, i1 0
-  %nop12562 = alloca i1, i1 0
-  %nop12563 = alloca i1, i1 0
-  %nop12564 = alloca i1, i1 0
-  %nop12565 = alloca i1, i1 0
-  %nop12566 = alloca i1, i1 0
-  %nop12567 = alloca i1, i1 0
-  %nop12568 = alloca i1, i1 0
-  %nop12569 = alloca i1, i1 0
-  %nop12570 = alloca i1, i1 0
-  %nop12571 = alloca i1, i1 0
-  %nop12572 = alloca i1, i1 0
-  %nop12573 = alloca i1, i1 0
-  %nop12574 = alloca i1, i1 0
-  %nop12575 = alloca i1, i1 0
-  %nop12576 = alloca i1, i1 0
-  %nop12577 = alloca i1, i1 0
-  %nop12578 = alloca i1, i1 0
-  %nop12579 = alloca i1, i1 0
-  %nop12580 = alloca i1, i1 0
-  %nop12581 = alloca i1, i1 0
-  %nop12582 = alloca i1, i1 0
-  %nop12583 = alloca i1, i1 0
-  %nop12584 = alloca i1, i1 0
-  %nop12585 = alloca i1, i1 0
-  %nop12586 = alloca i1, i1 0
-  %nop12587 = alloca i1, i1 0
-  %nop12588 = alloca i1, i1 0
-  %nop12589 = alloca i1, i1 0
-  %nop12590 = alloca i1, i1 0
-  %nop12591 = alloca i1, i1 0
-  %nop12592 = alloca i1, i1 0
-  %nop12593 = alloca i1, i1 0
-  %nop12594 = alloca i1, i1 0
-  %nop12595 = alloca i1, i1 0
-  %nop12596 = alloca i1, i1 0
-  %nop12597 = alloca i1, i1 0
-  %nop12598 = alloca i1, i1 0
-  %nop12599 = alloca i1, i1 0
-  %nop12600 = alloca i1, i1 0
-  %nop12601 = alloca i1, i1 0
-  %nop12602 = alloca i1, i1 0
-  %nop12603 = alloca i1, i1 0
-  %nop12604 = alloca i1, i1 0
-  %nop12605 = alloca i1, i1 0
-  %nop12606 = alloca i1, i1 0
-  %nop12607 = alloca i1, i1 0
-  %nop12608 = alloca i1, i1 0
-  %nop12609 = alloca i1, i1 0
-  %nop12610 = alloca i1, i1 0
-  %nop12611 = alloca i1, i1 0
-  %nop12612 = alloca i1, i1 0
-  %nop12613 = alloca i1, i1 0
-  %nop12614 = alloca i1, i1 0
-  %nop12615 = alloca i1, i1 0
-  %nop12616 = alloca i1, i1 0
-  %nop12617 = alloca i1, i1 0
-  %nop12618 = alloca i1, i1 0
-  %nop12619 = alloca i1, i1 0
-  %nop12620 = alloca i1, i1 0
-  %nop12621 = alloca i1, i1 0
-  %nop12622 = alloca i1, i1 0
-  %nop12623 = alloca i1, i1 0
-  %nop12624 = alloca i1, i1 0
-  %nop12625 = alloca i1, i1 0
-  %nop12626 = alloca i1, i1 0
-  %nop12627 = alloca i1, i1 0
-  %nop12628 = alloca i1, i1 0
-  %nop12629 = alloca i1, i1 0
-  %nop12630 = alloca i1, i1 0
-  %nop12631 = alloca i1, i1 0
-  %nop12632 = alloca i1, i1 0
-  %nop12633 = alloca i1, i1 0
-  %nop12634 = alloca i1, i1 0
-  %nop12635 = alloca i1, i1 0
-  %nop12636 = alloca i1, i1 0
-  %nop12637 = alloca i1, i1 0
-  %nop12638 = alloca i1, i1 0
-  %nop12639 = alloca i1, i1 0
-  %nop12640 = alloca i1, i1 0
-  %nop12641 = alloca i1, i1 0
-  %nop12642 = alloca i1, i1 0
-  %nop12643 = alloca i1, i1 0
-  %nop12644 = alloca i1, i1 0
-  %nop12645 = alloca i1, i1 0
-  %nop12646 = alloca i1, i1 0
-  %nop12647 = alloca i1, i1 0
-  %nop12648 = alloca i1, i1 0
-  %nop12649 = alloca i1, i1 0
-  %nop12650 = alloca i1, i1 0
-  %nop12651 = alloca i1, i1 0
-  %nop12652 = alloca i1, i1 0
-  %nop12653 = alloca i1, i1 0
-  %nop12654 = alloca i1, i1 0
-  %nop12655 = alloca i1, i1 0
-  %nop12656 = alloca i1, i1 0
-  %nop12657 = alloca i1, i1 0
-  %nop12658 = alloca i1, i1 0
-  %nop12659 = alloca i1, i1 0
-  %nop12660 = alloca i1, i1 0
-  %nop12661 = alloca i1, i1 0
-  %nop12662 = alloca i1, i1 0
-  %nop12663 = alloca i1, i1 0
-  %nop12664 = alloca i1, i1 0
-  %nop12665 = alloca i1, i1 0
-  %nop12666 = alloca i1, i1 0
-  %nop12667 = alloca i1, i1 0
-  %nop12668 = alloca i1, i1 0
-  %nop12669 = alloca i1, i1 0
-  %nop12670 = alloca i1, i1 0
-  %nop12671 = alloca i1, i1 0
-  %nop12672 = alloca i1, i1 0
-  %nop12673 = alloca i1, i1 0
-  %nop12674 = alloca i1, i1 0
-  %nop12675 = alloca i1, i1 0
-  %nop12676 = alloca i1, i1 0
-  %nop12677 = alloca i1, i1 0
-  %nop12678 = alloca i1, i1 0
-  %nop12679 = alloca i1, i1 0
-  %nop12680 = alloca i1, i1 0
-  %nop12681 = alloca i1, i1 0
-  %nop12682 = alloca i1, i1 0
-  %nop12683 = alloca i1, i1 0
-  %nop12684 = alloca i1, i1 0
-  %nop12685 = alloca i1, i1 0
-  %nop12686 = alloca i1, i1 0
-  %nop12687 = alloca i1, i1 0
-  %nop12688 = alloca i1, i1 0
-  %nop12689 = alloca i1, i1 0
-  %nop12690 = alloca i1, i1 0
-  %nop12691 = alloca i1, i1 0
-  %nop12692 = alloca i1, i1 0
-  %nop12693 = alloca i1, i1 0
-  %nop12694 = alloca i1, i1 0
-  %nop12695 = alloca i1, i1 0
-  %nop12696 = alloca i1, i1 0
-  %nop12697 = alloca i1, i1 0
-  %nop12698 = alloca i1, i1 0
-  %nop12699 = alloca i1, i1 0
-  %nop12700 = alloca i1, i1 0
-  %nop12701 = alloca i1, i1 0
-  %nop12702 = alloca i1, i1 0
-  %nop12703 = alloca i1, i1 0
-  %nop12704 = alloca i1, i1 0
-  %nop12705 = alloca i1, i1 0
-  %nop12706 = alloca i1, i1 0
-  %nop12707 = alloca i1, i1 0
-  %nop12708 = alloca i1, i1 0
-  %nop12709 = alloca i1, i1 0
-  %nop12710 = alloca i1, i1 0
-  %nop12711 = alloca i1, i1 0
-  %nop12712 = alloca i1, i1 0
-  %nop12713 = alloca i1, i1 0
-  %nop12714 = alloca i1, i1 0
-  %nop12715 = alloca i1, i1 0
-  %nop12716 = alloca i1, i1 0
-  %nop12717 = alloca i1, i1 0
-  %nop12718 = alloca i1, i1 0
-  %nop12719 = alloca i1, i1 0
-  %nop12720 = alloca i1, i1 0
-  %nop12721 = alloca i1, i1 0
-  %nop12722 = alloca i1, i1 0
-  %nop12723 = alloca i1, i1 0
-  %nop12724 = alloca i1, i1 0
-  %nop12725 = alloca i1, i1 0
-  %nop12726 = alloca i1, i1 0
-  %nop12727 = alloca i1, i1 0
-  %nop12728 = alloca i1, i1 0
-  %nop12729 = alloca i1, i1 0
-  %nop12730 = alloca i1, i1 0
-  %nop12731 = alloca i1, i1 0
-  %nop12732 = alloca i1, i1 0
-  %nop12733 = alloca i1, i1 0
-  %nop12734 = alloca i1, i1 0
-  %nop12735 = alloca i1, i1 0
-  %nop12736 = alloca i1, i1 0
-  %nop12737 = alloca i1, i1 0
-  %nop12738 = alloca i1, i1 0
-  %nop12739 = alloca i1, i1 0
-  %nop12740 = alloca i1, i1 0
-  %nop12741 = alloca i1, i1 0
-  %nop12742 = alloca i1, i1 0
-  %nop12743 = alloca i1, i1 0
-  %nop12744 = alloca i1, i1 0
-  %nop12745 = alloca i1, i1 0
-  %nop12746 = alloca i1, i1 0
-  %nop12747 = alloca i1, i1 0
-  %nop12748 = alloca i1, i1 0
-  %nop12749 = alloca i1, i1 0
-  %nop12750 = alloca i1, i1 0
-  %nop12751 = alloca i1, i1 0
-  %nop12752 = alloca i1, i1 0
-  %nop12753 = alloca i1, i1 0
-  %nop12754 = alloca i1, i1 0
-  %nop12755 = alloca i1, i1 0
-  %nop12756 = alloca i1, i1 0
-  %nop12757 = alloca i1, i1 0
-  %nop12758 = alloca i1, i1 0
-  %nop12759 = alloca i1, i1 0
-  %nop12760 = alloca i1, i1 0
-  %nop12761 = alloca i1, i1 0
-  %nop12762 = alloca i1, i1 0
-  %nop12763 = alloca i1, i1 0
-  %nop12764 = alloca i1, i1 0
-  %nop12765 = alloca i1, i1 0
-  %nop12766 = alloca i1, i1 0
-  %nop12767 = alloca i1, i1 0
-  %nop12768 = alloca i1, i1 0
-  %nop12769 = alloca i1, i1 0
-  %nop12770 = alloca i1, i1 0
-  %nop12771 = alloca i1, i1 0
-  %nop12772 = alloca i1, i1 0
-  %nop12773 = alloca i1, i1 0
-  %nop12774 = alloca i1, i1 0
-  %nop12775 = alloca i1, i1 0
-  %nop12776 = alloca i1, i1 0
-  %nop12777 = alloca i1, i1 0
-  %nop12778 = alloca i1, i1 0
-  %nop12779 = alloca i1, i1 0
-  %nop12780 = alloca i1, i1 0
-  %nop12781 = alloca i1, i1 0
-  %nop12782 = alloca i1, i1 0
-  %nop12783 = alloca i1, i1 0
-  %nop12784 = alloca i1, i1 0
-  %nop12785 = alloca i1, i1 0
-  %nop12786 = alloca i1, i1 0
-  %nop12787 = alloca i1, i1 0
-  %nop12788 = alloca i1, i1 0
-  %nop12789 = alloca i1, i1 0
-  %nop12790 = alloca i1, i1 0
-  %nop12791 = alloca i1, i1 0
-  %nop12792 = alloca i1, i1 0
-  %nop12793 = alloca i1, i1 0
-  %nop12794 = alloca i1, i1 0
-  %nop12795 = alloca i1, i1 0
-  %nop12796 = alloca i1, i1 0
-  %nop12797 = alloca i1, i1 0
-  %nop12798 = alloca i1, i1 0
-  %nop12799 = alloca i1, i1 0
-  %nop12800 = alloca i1, i1 0
-  %nop12801 = alloca i1, i1 0
-  %nop12802 = alloca i1, i1 0
-  %nop12803 = alloca i1, i1 0
-  %nop12804 = alloca i1, i1 0
-  %nop12805 = alloca i1, i1 0
-  %nop12806 = alloca i1, i1 0
-  %nop12807 = alloca i1, i1 0
-  %nop12808 = alloca i1, i1 0
-  %nop12809 = alloca i1, i1 0
-  %nop12810 = alloca i1, i1 0
-  %nop12811 = alloca i1, i1 0
-  %nop12812 = alloca i1, i1 0
-  %nop12813 = alloca i1, i1 0
-  %nop12814 = alloca i1, i1 0
-  %nop12815 = alloca i1, i1 0
-  %nop12816 = alloca i1, i1 0
-  %nop12817 = alloca i1, i1 0
-  %nop12818 = alloca i1, i1 0
-  %nop12819 = alloca i1, i1 0
-  %nop12820 = alloca i1, i1 0
-  %nop12821 = alloca i1, i1 0
-  %nop12822 = alloca i1, i1 0
-  %nop12823 = alloca i1, i1 0
-  %nop12824 = alloca i1, i1 0
-  %nop12825 = alloca i1, i1 0
-  %nop12826 = alloca i1, i1 0
-  %nop12827 = alloca i1, i1 0
-  %nop12828 = alloca i1, i1 0
-  %nop12829 = alloca i1, i1 0
-  %nop12830 = alloca i1, i1 0
-  %nop12831 = alloca i1, i1 0
-  %nop12832 = alloca i1, i1 0
-  %nop12833 = alloca i1, i1 0
-  %nop12834 = alloca i1, i1 0
-  %nop12835 = alloca i1, i1 0
-  %nop12836 = alloca i1, i1 0
-  %nop12837 = alloca i1, i1 0
-  %nop12838 = alloca i1, i1 0
-  %nop12839 = alloca i1, i1 0
-  %nop12840 = alloca i1, i1 0
-  %nop12841 = alloca i1, i1 0
-  %nop12842 = alloca i1, i1 0
-  %nop12843 = alloca i1, i1 0
-  %nop12844 = alloca i1, i1 0
-  %nop12845 = alloca i1, i1 0
-  %nop12846 = alloca i1, i1 0
-  %nop12847 = alloca i1, i1 0
-  %nop12848 = alloca i1, i1 0
-  %nop12849 = alloca i1, i1 0
-  %nop12850 = alloca i1, i1 0
-  %nop12851 = alloca i1, i1 0
-  %nop12852 = alloca i1, i1 0
-  %nop12853 = alloca i1, i1 0
-  %nop12854 = alloca i1, i1 0
-  %nop12855 = alloca i1, i1 0
-  %nop12856 = alloca i1, i1 0
-  %nop12857 = alloca i1, i1 0
-  %nop12858 = alloca i1, i1 0
-  %nop12859 = alloca i1, i1 0
-  %nop12860 = alloca i1, i1 0
-  %nop12861 = alloca i1, i1 0
-  %nop12862 = alloca i1, i1 0
-  %nop12863 = alloca i1, i1 0
-  %nop12864 = alloca i1, i1 0
-  %nop12865 = alloca i1, i1 0
-  %nop12866 = alloca i1, i1 0
-  %nop12867 = alloca i1, i1 0
-  %nop12868 = alloca i1, i1 0
-  %nop12869 = alloca i1, i1 0
-  %nop12870 = alloca i1, i1 0
-  %nop12871 = alloca i1, i1 0
-  %nop12872 = alloca i1, i1 0
-  %nop12873 = alloca i1, i1 0
-  %nop12874 = alloca i1, i1 0
-  %nop12875 = alloca i1, i1 0
-  %nop12876 = alloca i1, i1 0
-  %nop12877 = alloca i1, i1 0
-  %nop12878 = alloca i1, i1 0
-  %nop12879 = alloca i1, i1 0
-  %nop12880 = alloca i1, i1 0
-  %nop12881 = alloca i1, i1 0
-  %nop12882 = alloca i1, i1 0
-  %nop12883 = alloca i1, i1 0
-  %nop12884 = alloca i1, i1 0
-  %nop12885 = alloca i1, i1 0
-  %nop12886 = alloca i1, i1 0
-  %nop12887 = alloca i1, i1 0
-  %nop12888 = alloca i1, i1 0
-  %nop12889 = alloca i1, i1 0
-  %nop12890 = alloca i1, i1 0
-  %nop12891 = alloca i1, i1 0
-  %nop12892 = alloca i1, i1 0
-  %nop12893 = alloca i1, i1 0
-  %nop12894 = alloca i1, i1 0
-  %nop12895 = alloca i1, i1 0
-  %nop12896 = alloca i1, i1 0
-  %nop12897 = alloca i1, i1 0
-  %nop12898 = alloca i1, i1 0
-  %nop12899 = alloca i1, i1 0
-  %nop12900 = alloca i1, i1 0
-  %nop12901 = alloca i1, i1 0
-  %nop12902 = alloca i1, i1 0
-  %nop12903 = alloca i1, i1 0
-  %nop12904 = alloca i1, i1 0
-  %nop12905 = alloca i1, i1 0
-  %nop12906 = alloca i1, i1 0
-  %nop12907 = alloca i1, i1 0
-  %nop12908 = alloca i1, i1 0
-  %nop12909 = alloca i1, i1 0
-  %nop12910 = alloca i1, i1 0
-  %nop12911 = alloca i1, i1 0
-  %nop12912 = alloca i1, i1 0
-  %nop12913 = alloca i1, i1 0
-  %nop12914 = alloca i1, i1 0
-  %nop12915 = alloca i1, i1 0
-  %nop12916 = alloca i1, i1 0
-  %nop12917 = alloca i1, i1 0
-  %nop12918 = alloca i1, i1 0
-  %nop12919 = alloca i1, i1 0
-  %nop12920 = alloca i1, i1 0
-  %nop12921 = alloca i1, i1 0
-  %nop12922 = alloca i1, i1 0
-  %nop12923 = alloca i1, i1 0
-  %nop12924 = alloca i1, i1 0
-  %nop12925 = alloca i1, i1 0
-  %nop12926 = alloca i1, i1 0
-  %nop12927 = alloca i1, i1 0
-  %nop12928 = alloca i1, i1 0
-  %nop12929 = alloca i1, i1 0
-  %nop12930 = alloca i1, i1 0
-  %nop12931 = alloca i1, i1 0
-  %nop12932 = alloca i1, i1 0
-  %nop12933 = alloca i1, i1 0
-  %nop12934 = alloca i1, i1 0
-  %nop12935 = alloca i1, i1 0
-  %nop12936 = alloca i1, i1 0
-  %nop12937 = alloca i1, i1 0
-  %nop12938 = alloca i1, i1 0
-  %nop12939 = alloca i1, i1 0
-  %nop12940 = alloca i1, i1 0
-  %nop12941 = alloca i1, i1 0
-  %nop12942 = alloca i1, i1 0
-  %nop12943 = alloca i1, i1 0
-  %nop12944 = alloca i1, i1 0
-  %nop12945 = alloca i1, i1 0
-  %nop12946 = alloca i1, i1 0
-  %nop12947 = alloca i1, i1 0
-  %nop12948 = alloca i1, i1 0
-  %nop12949 = alloca i1, i1 0
-  %nop12950 = alloca i1, i1 0
-  %nop12951 = alloca i1, i1 0
-  %nop12952 = alloca i1, i1 0
-  %nop12953 = alloca i1, i1 0
-  %nop12954 = alloca i1, i1 0
-  %nop12955 = alloca i1, i1 0
-  %nop12956 = alloca i1, i1 0
-  %nop12957 = alloca i1, i1 0
-  %nop12958 = alloca i1, i1 0
-  %nop12959 = alloca i1, i1 0
-  %nop12960 = alloca i1, i1 0
-  %nop12961 = alloca i1, i1 0
-  %nop12962 = alloca i1, i1 0
-  %nop12963 = alloca i1, i1 0
-  %nop12964 = alloca i1, i1 0
-  %nop12965 = alloca i1, i1 0
-  %nop12966 = alloca i1, i1 0
-  %nop12967 = alloca i1, i1 0
-  %nop12968 = alloca i1, i1 0
-  %nop12969 = alloca i1, i1 0
-  %nop12970 = alloca i1, i1 0
-  %nop12971 = alloca i1, i1 0
-  %nop12972 = alloca i1, i1 0
-  %nop12973 = alloca i1, i1 0
-  %nop12974 = alloca i1, i1 0
-  %nop12975 = alloca i1, i1 0
-  %nop12976 = alloca i1, i1 0
-  %nop12977 = alloca i1, i1 0
-  %nop12978 = alloca i1, i1 0
-  %nop12979 = alloca i1, i1 0
-  %nop12980 = alloca i1, i1 0
-  %nop12981 = alloca i1, i1 0
-  %nop12982 = alloca i1, i1 0
-  %nop12983 = alloca i1, i1 0
-  %nop12984 = alloca i1, i1 0
-  %nop12985 = alloca i1, i1 0
-  %nop12986 = alloca i1, i1 0
-  %nop12987 = alloca i1, i1 0
-  %nop12988 = alloca i1, i1 0
-  %nop12989 = alloca i1, i1 0
-  %nop12990 = alloca i1, i1 0
-  %nop12991 = alloca i1, i1 0
-  %nop12992 = alloca i1, i1 0
-  %nop12993 = alloca i1, i1 0
-  %nop12994 = alloca i1, i1 0
-  %nop12995 = alloca i1, i1 0
-  %nop12996 = alloca i1, i1 0
-  %nop12997 = alloca i1, i1 0
-  %nop12998 = alloca i1, i1 0
-  %nop12999 = alloca i1, i1 0
-  %nop13000 = alloca i1, i1 0
-  %nop13001 = alloca i1, i1 0
-  %nop13002 = alloca i1, i1 0
-  %nop13003 = alloca i1, i1 0
-  %nop13004 = alloca i1, i1 0
-  %nop13005 = alloca i1, i1 0
-  %nop13006 = alloca i1, i1 0
-  %nop13007 = alloca i1, i1 0
-  %nop13008 = alloca i1, i1 0
-  %nop13009 = alloca i1, i1 0
-  %nop13010 = alloca i1, i1 0
-  %nop13011 = alloca i1, i1 0
-  %nop13012 = alloca i1, i1 0
-  %nop13013 = alloca i1, i1 0
-  %nop13014 = alloca i1, i1 0
-  %nop13015 = alloca i1, i1 0
-  %nop13016 = alloca i1, i1 0
-  %nop13017 = alloca i1, i1 0
-  %nop13018 = alloca i1, i1 0
-  %nop13019 = alloca i1, i1 0
-  %nop13020 = alloca i1, i1 0
-  %nop13021 = alloca i1, i1 0
-  %nop13022 = alloca i1, i1 0
-  %nop13023 = alloca i1, i1 0
-  %nop13024 = alloca i1, i1 0
-  %nop13025 = alloca i1, i1 0
-  %nop13026 = alloca i1, i1 0
-  %nop13027 = alloca i1, i1 0
-  %nop13028 = alloca i1, i1 0
-  %nop13029 = alloca i1, i1 0
-  %nop13030 = alloca i1, i1 0
-  %nop13031 = alloca i1, i1 0
-  %nop13032 = alloca i1, i1 0
-  %nop13033 = alloca i1, i1 0
-  %nop13034 = alloca i1, i1 0
-  %nop13035 = alloca i1, i1 0
-  %nop13036 = alloca i1, i1 0
-  %nop13037 = alloca i1, i1 0
-  %nop13038 = alloca i1, i1 0
-  %nop13039 = alloca i1, i1 0
-  %nop13040 = alloca i1, i1 0
-  %nop13041 = alloca i1, i1 0
-  %nop13042 = alloca i1, i1 0
-  %nop13043 = alloca i1, i1 0
-  %nop13044 = alloca i1, i1 0
-  %nop13045 = alloca i1, i1 0
-  %nop13046 = alloca i1, i1 0
-  %nop13047 = alloca i1, i1 0
-  %nop13048 = alloca i1, i1 0
-  %nop13049 = alloca i1, i1 0
-  %nop13050 = alloca i1, i1 0
-  %nop13051 = alloca i1, i1 0
-  %nop13052 = alloca i1, i1 0
-  %nop13053 = alloca i1, i1 0
-  %nop13054 = alloca i1, i1 0
-  %nop13055 = alloca i1, i1 0
-  %nop13056 = alloca i1, i1 0
-  %nop13057 = alloca i1, i1 0
-  %nop13058 = alloca i1, i1 0
-  %nop13059 = alloca i1, i1 0
-  %nop13060 = alloca i1, i1 0
-  %nop13061 = alloca i1, i1 0
-  %nop13062 = alloca i1, i1 0
-  %nop13063 = alloca i1, i1 0
-  %nop13064 = alloca i1, i1 0
-  %nop13065 = alloca i1, i1 0
-  %nop13066 = alloca i1, i1 0
-  %nop13067 = alloca i1, i1 0
-  %nop13068 = alloca i1, i1 0
-  %nop13069 = alloca i1, i1 0
-  %nop13070 = alloca i1, i1 0
-  %nop13071 = alloca i1, i1 0
-  %nop13072 = alloca i1, i1 0
-  %nop13073 = alloca i1, i1 0
-  %nop13074 = alloca i1, i1 0
-  %nop13075 = alloca i1, i1 0
-  %nop13076 = alloca i1, i1 0
-  %nop13077 = alloca i1, i1 0
-  %nop13078 = alloca i1, i1 0
-  %nop13079 = alloca i1, i1 0
-  %nop13080 = alloca i1, i1 0
-  %nop13081 = alloca i1, i1 0
-  %nop13082 = alloca i1, i1 0
-  %nop13083 = alloca i1, i1 0
-  %nop13084 = alloca i1, i1 0
-  %nop13085 = alloca i1, i1 0
-  %nop13086 = alloca i1, i1 0
-  %nop13087 = alloca i1, i1 0
-  %nop13088 = alloca i1, i1 0
-  %nop13089 = alloca i1, i1 0
-  %nop13090 = alloca i1, i1 0
-  %nop13091 = alloca i1, i1 0
-  %nop13092 = alloca i1, i1 0
-  %nop13093 = alloca i1, i1 0
-  %nop13094 = alloca i1, i1 0
-  %nop13095 = alloca i1, i1 0
-  %nop13096 = alloca i1, i1 0
-  %nop13097 = alloca i1, i1 0
-  %nop13098 = alloca i1, i1 0
-  %nop13099 = alloca i1, i1 0
-  %nop13100 = alloca i1, i1 0
-  %nop13101 = alloca i1, i1 0
-  %nop13102 = alloca i1, i1 0
-  %nop13103 = alloca i1, i1 0
-  %nop13104 = alloca i1, i1 0
-  %nop13105 = alloca i1, i1 0
-  %nop13106 = alloca i1, i1 0
-  %nop13107 = alloca i1, i1 0
-  %nop13108 = alloca i1, i1 0
-  %nop13109 = alloca i1, i1 0
-  %nop13110 = alloca i1, i1 0
-  %nop13111 = alloca i1, i1 0
-  %nop13112 = alloca i1, i1 0
-  %nop13113 = alloca i1, i1 0
-  %nop13114 = alloca i1, i1 0
-  %nop13115 = alloca i1, i1 0
-  %nop13116 = alloca i1, i1 0
-  %nop13117 = alloca i1, i1 0
-  %nop13118 = alloca i1, i1 0
-  %nop13119 = alloca i1, i1 0
-  %nop13120 = alloca i1, i1 0
-  %nop13121 = alloca i1, i1 0
-  %nop13122 = alloca i1, i1 0
-  %nop13123 = alloca i1, i1 0
-  %nop13124 = alloca i1, i1 0
-  %nop13125 = alloca i1, i1 0
-  %nop13126 = alloca i1, i1 0
-  %nop13127 = alloca i1, i1 0
-  %nop13128 = alloca i1, i1 0
-  %nop13129 = alloca i1, i1 0
-  %nop13130 = alloca i1, i1 0
-  %nop13131 = alloca i1, i1 0
-  %nop13132 = alloca i1, i1 0
-  %nop13133 = alloca i1, i1 0
-  %nop13134 = alloca i1, i1 0
-  %nop13135 = alloca i1, i1 0
-  %nop13136 = alloca i1, i1 0
-  %nop13137 = alloca i1, i1 0
-  %nop13138 = alloca i1, i1 0
-  %nop13139 = alloca i1, i1 0
-  %nop13140 = alloca i1, i1 0
-  %nop13141 = alloca i1, i1 0
-  %nop13142 = alloca i1, i1 0
-  %nop13143 = alloca i1, i1 0
-  %nop13144 = alloca i1, i1 0
-  %nop13145 = alloca i1, i1 0
-  %nop13146 = alloca i1, i1 0
-  %nop13147 = alloca i1, i1 0
-  %nop13148 = alloca i1, i1 0
-  %nop13149 = alloca i1, i1 0
-  %nop13150 = alloca i1, i1 0
-  %nop13151 = alloca i1, i1 0
-  %nop13152 = alloca i1, i1 0
-  %nop13153 = alloca i1, i1 0
-  %nop13154 = alloca i1, i1 0
-  %nop13155 = alloca i1, i1 0
-  %nop13156 = alloca i1, i1 0
-  %nop13157 = alloca i1, i1 0
-  %nop13158 = alloca i1, i1 0
-  %nop13159 = alloca i1, i1 0
-  %nop13160 = alloca i1, i1 0
-  %nop13161 = alloca i1, i1 0
-  %nop13162 = alloca i1, i1 0
-  %nop13163 = alloca i1, i1 0
-  %nop13164 = alloca i1, i1 0
-  %nop13165 = alloca i1, i1 0
-  %nop13166 = alloca i1, i1 0
-  %nop13167 = alloca i1, i1 0
-  %nop13168 = alloca i1, i1 0
-  %nop13169 = alloca i1, i1 0
-  %nop13170 = alloca i1, i1 0
-  %nop13171 = alloca i1, i1 0
-  %nop13172 = alloca i1, i1 0
-  %nop13173 = alloca i1, i1 0
-  %nop13174 = alloca i1, i1 0
-  %nop13175 = alloca i1, i1 0
-  %nop13176 = alloca i1, i1 0
-  %nop13177 = alloca i1, i1 0
-  %nop13178 = alloca i1, i1 0
-  %nop13179 = alloca i1, i1 0
-  %nop13180 = alloca i1, i1 0
-  %nop13181 = alloca i1, i1 0
-  %nop13182 = alloca i1, i1 0
-  %nop13183 = alloca i1, i1 0
-  %nop13184 = alloca i1, i1 0
-  %nop13185 = alloca i1, i1 0
-  %nop13186 = alloca i1, i1 0
-  %nop13187 = alloca i1, i1 0
-  %nop13188 = alloca i1, i1 0
-  %nop13189 = alloca i1, i1 0
-  %nop13190 = alloca i1, i1 0
-  %nop13191 = alloca i1, i1 0
-  %nop13192 = alloca i1, i1 0
-  %nop13193 = alloca i1, i1 0
-  %nop13194 = alloca i1, i1 0
-  %nop13195 = alloca i1, i1 0
-  %nop13196 = alloca i1, i1 0
-  %nop13197 = alloca i1, i1 0
-  %nop13198 = alloca i1, i1 0
-  %nop13199 = alloca i1, i1 0
-  %nop13200 = alloca i1, i1 0
-  %nop13201 = alloca i1, i1 0
-  %nop13202 = alloca i1, i1 0
-  %nop13203 = alloca i1, i1 0
-  %nop13204 = alloca i1, i1 0
-  %nop13205 = alloca i1, i1 0
-  %nop13206 = alloca i1, i1 0
-  %nop13207 = alloca i1, i1 0
-  %nop13208 = alloca i1, i1 0
-  %nop13209 = alloca i1, i1 0
-  %nop13210 = alloca i1, i1 0
-  %nop13211 = alloca i1, i1 0
-  %nop13212 = alloca i1, i1 0
-  %nop13213 = alloca i1, i1 0
-  %nop13214 = alloca i1, i1 0
-  %nop13215 = alloca i1, i1 0
-  %nop13216 = alloca i1, i1 0
-  %nop13217 = alloca i1, i1 0
-  %nop13218 = alloca i1, i1 0
-  %nop13219 = alloca i1, i1 0
-  %nop13220 = alloca i1, i1 0
-  %nop13221 = alloca i1, i1 0
-  %nop13222 = alloca i1, i1 0
-  %nop13223 = alloca i1, i1 0
-  %nop13224 = alloca i1, i1 0
-  %nop13225 = alloca i1, i1 0
-  %nop13226 = alloca i1, i1 0
-  %nop13227 = alloca i1, i1 0
-  %nop13228 = alloca i1, i1 0
-  %nop13229 = alloca i1, i1 0
-  %nop13230 = alloca i1, i1 0
-  %nop13231 = alloca i1, i1 0
-  %nop13232 = alloca i1, i1 0
-  %nop13233 = alloca i1, i1 0
-  %nop13234 = alloca i1, i1 0
-  %nop13235 = alloca i1, i1 0
-  %nop13236 = alloca i1, i1 0
-  %nop13237 = alloca i1, i1 0
-  %nop13238 = alloca i1, i1 0
-  %nop13239 = alloca i1, i1 0
-  %nop13240 = alloca i1, i1 0
-  %nop13241 = alloca i1, i1 0
-  %nop13242 = alloca i1, i1 0
-  %nop13243 = alloca i1, i1 0
-  %nop13244 = alloca i1, i1 0
-  %nop13245 = alloca i1, i1 0
-  %nop13246 = alloca i1, i1 0
-  %nop13247 = alloca i1, i1 0
-  %nop13248 = alloca i1, i1 0
-  %nop13249 = alloca i1, i1 0
-  %nop13250 = alloca i1, i1 0
-  %nop13251 = alloca i1, i1 0
-  %nop13252 = alloca i1, i1 0
-  %nop13253 = alloca i1, i1 0
-  %nop13254 = alloca i1, i1 0
-  %nop13255 = alloca i1, i1 0
-  %nop13256 = alloca i1, i1 0
-  %nop13257 = alloca i1, i1 0
-  %nop13258 = alloca i1, i1 0
-  %nop13259 = alloca i1, i1 0
-  %nop13260 = alloca i1, i1 0
-  %nop13261 = alloca i1, i1 0
-  %nop13262 = alloca i1, i1 0
-  %nop13263 = alloca i1, i1 0
-  %nop13264 = alloca i1, i1 0
-  %nop13265 = alloca i1, i1 0
-  %nop13266 = alloca i1, i1 0
-  %nop13267 = alloca i1, i1 0
-  %nop13268 = alloca i1, i1 0
-  %nop13269 = alloca i1, i1 0
-  %nop13270 = alloca i1, i1 0
-  %nop13271 = alloca i1, i1 0
-  %nop13272 = alloca i1, i1 0
-  %nop13273 = alloca i1, i1 0
-  %nop13274 = alloca i1, i1 0
-  %nop13275 = alloca i1, i1 0
-  %nop13276 = alloca i1, i1 0
-  %nop13277 = alloca i1, i1 0
-  %nop13278 = alloca i1, i1 0
-  %nop13279 = alloca i1, i1 0
-  %nop13280 = alloca i1, i1 0
-  %nop13281 = alloca i1, i1 0
-  %nop13282 = alloca i1, i1 0
-  %nop13283 = alloca i1, i1 0
-  %nop13284 = alloca i1, i1 0
-  %nop13285 = alloca i1, i1 0
-  %nop13286 = alloca i1, i1 0
-  %nop13287 = alloca i1, i1 0
-  %nop13288 = alloca i1, i1 0
-  %nop13289 = alloca i1, i1 0
-  %nop13290 = alloca i1, i1 0
-  %nop13291 = alloca i1, i1 0
-  %nop13292 = alloca i1, i1 0
-  %nop13293 = alloca i1, i1 0
-  %nop13294 = alloca i1, i1 0
-  %nop13295 = alloca i1, i1 0
-  %nop13296 = alloca i1, i1 0
-  %nop13297 = alloca i1, i1 0
-  %nop13298 = alloca i1, i1 0
-  %nop13299 = alloca i1, i1 0
-  %nop13300 = alloca i1, i1 0
-  %nop13301 = alloca i1, i1 0
-  %nop13302 = alloca i1, i1 0
-  %nop13303 = alloca i1, i1 0
-  %nop13304 = alloca i1, i1 0
-  %nop13305 = alloca i1, i1 0
-  %nop13306 = alloca i1, i1 0
-  %nop13307 = alloca i1, i1 0
-  %nop13308 = alloca i1, i1 0
-  %nop13309 = alloca i1, i1 0
-  %nop13310 = alloca i1, i1 0
-  %nop13311 = alloca i1, i1 0
-  %nop13312 = alloca i1, i1 0
-  %nop13313 = alloca i1, i1 0
-  %nop13314 = alloca i1, i1 0
-  %nop13315 = alloca i1, i1 0
-  %nop13316 = alloca i1, i1 0
-  %nop13317 = alloca i1, i1 0
-  %nop13318 = alloca i1, i1 0
-  %nop13319 = alloca i1, i1 0
-  %nop13320 = alloca i1, i1 0
-  %nop13321 = alloca i1, i1 0
-  %nop13322 = alloca i1, i1 0
-  %nop13323 = alloca i1, i1 0
-  %nop13324 = alloca i1, i1 0
-  %nop13325 = alloca i1, i1 0
-  %nop13326 = alloca i1, i1 0
-  %nop13327 = alloca i1, i1 0
-  %nop13328 = alloca i1, i1 0
-  %nop13329 = alloca i1, i1 0
-  %nop13330 = alloca i1, i1 0
-  %nop13331 = alloca i1, i1 0
-  %nop13332 = alloca i1, i1 0
-  %nop13333 = alloca i1, i1 0
-  %nop13334 = alloca i1, i1 0
-  %nop13335 = alloca i1, i1 0
-  %nop13336 = alloca i1, i1 0
-  %nop13337 = alloca i1, i1 0
-  %nop13338 = alloca i1, i1 0
-  %nop13339 = alloca i1, i1 0
-  %nop13340 = alloca i1, i1 0
-  %nop13341 = alloca i1, i1 0
-  %nop13342 = alloca i1, i1 0
-  %nop13343 = alloca i1, i1 0
-  %nop13344 = alloca i1, i1 0
-  %nop13345 = alloca i1, i1 0
-  %nop13346 = alloca i1, i1 0
-  %nop13347 = alloca i1, i1 0
-  %nop13348 = alloca i1, i1 0
-  %nop13349 = alloca i1, i1 0
-  %nop13350 = alloca i1, i1 0
-  %nop13351 = alloca i1, i1 0
-  %nop13352 = alloca i1, i1 0
-  %nop13353 = alloca i1, i1 0
-  %nop13354 = alloca i1, i1 0
-  %nop13355 = alloca i1, i1 0
-  %nop13356 = alloca i1, i1 0
-  %nop13357 = alloca i1, i1 0
-  %nop13358 = alloca i1, i1 0
-  %nop13359 = alloca i1, i1 0
-  %nop13360 = alloca i1, i1 0
-  %nop13361 = alloca i1, i1 0
-  %nop13362 = alloca i1, i1 0
-  %nop13363 = alloca i1, i1 0
-  %nop13364 = alloca i1, i1 0
-  %nop13365 = alloca i1, i1 0
-  %nop13366 = alloca i1, i1 0
-  %nop13367 = alloca i1, i1 0
-  %nop13368 = alloca i1, i1 0
-  %nop13369 = alloca i1, i1 0
-  %nop13370 = alloca i1, i1 0
-  %nop13371 = alloca i1, i1 0
-  %nop13372 = alloca i1, i1 0
-  %nop13373 = alloca i1, i1 0
-  %nop13374 = alloca i1, i1 0
-  %nop13375 = alloca i1, i1 0
-  %nop13376 = alloca i1, i1 0
-  %nop13377 = alloca i1, i1 0
-  %nop13378 = alloca i1, i1 0
-  %nop13379 = alloca i1, i1 0
-  %nop13380 = alloca i1, i1 0
-  %nop13381 = alloca i1, i1 0
-  %nop13382 = alloca i1, i1 0
-  %nop13383 = alloca i1, i1 0
-  %nop13384 = alloca i1, i1 0
-  %nop13385 = alloca i1, i1 0
-  %nop13386 = alloca i1, i1 0
-  %nop13387 = alloca i1, i1 0
-  %nop13388 = alloca i1, i1 0
-  %nop13389 = alloca i1, i1 0
-  %nop13390 = alloca i1, i1 0
-  %nop13391 = alloca i1, i1 0
-  %nop13392 = alloca i1, i1 0
-  %nop13393 = alloca i1, i1 0
-  %nop13394 = alloca i1, i1 0
-  %nop13395 = alloca i1, i1 0
-  %nop13396 = alloca i1, i1 0
-  %nop13397 = alloca i1, i1 0
-  %nop13398 = alloca i1, i1 0
-  %nop13399 = alloca i1, i1 0
-  %nop13400 = alloca i1, i1 0
-  %nop13401 = alloca i1, i1 0
-  %nop13402 = alloca i1, i1 0
-  %nop13403 = alloca i1, i1 0
-  %nop13404 = alloca i1, i1 0
-  %nop13405 = alloca i1, i1 0
-  %nop13406 = alloca i1, i1 0
-  %nop13407 = alloca i1, i1 0
-  %nop13408 = alloca i1, i1 0
-  %nop13409 = alloca i1, i1 0
-  %nop13410 = alloca i1, i1 0
-  %nop13411 = alloca i1, i1 0
-  %nop13412 = alloca i1, i1 0
-  %nop13413 = alloca i1, i1 0
-  %nop13414 = alloca i1, i1 0
-  %nop13415 = alloca i1, i1 0
-  %nop13416 = alloca i1, i1 0
-  %nop13417 = alloca i1, i1 0
-  %nop13418 = alloca i1, i1 0
-  %nop13419 = alloca i1, i1 0
-  %nop13420 = alloca i1, i1 0
-  %nop13421 = alloca i1, i1 0
-  %nop13422 = alloca i1, i1 0
-  %nop13423 = alloca i1, i1 0
-  %nop13424 = alloca i1, i1 0
-  %nop13425 = alloca i1, i1 0
-  %nop13426 = alloca i1, i1 0
-  %nop13427 = alloca i1, i1 0
-  %nop13428 = alloca i1, i1 0
-  %nop13429 = alloca i1, i1 0
-  %nop13430 = alloca i1, i1 0
-  %nop13431 = alloca i1, i1 0
-  %nop13432 = alloca i1, i1 0
-  %nop13433 = alloca i1, i1 0
-  %nop13434 = alloca i1, i1 0
-  %nop13435 = alloca i1, i1 0
-  %nop13436 = alloca i1, i1 0
-  %nop13437 = alloca i1, i1 0
-  %nop13438 = alloca i1, i1 0
-  %nop13439 = alloca i1, i1 0
-  %nop13440 = alloca i1, i1 0
-  %nop13441 = alloca i1, i1 0
-  %nop13442 = alloca i1, i1 0
-  %nop13443 = alloca i1, i1 0
-  %nop13444 = alloca i1, i1 0
-  %nop13445 = alloca i1, i1 0
-  %nop13446 = alloca i1, i1 0
-  %nop13447 = alloca i1, i1 0
-  %nop13448 = alloca i1, i1 0
-  %nop13449 = alloca i1, i1 0
-  %nop13450 = alloca i1, i1 0
-  %nop13451 = alloca i1, i1 0
-  %nop13452 = alloca i1, i1 0
-  %nop13453 = alloca i1, i1 0
-  %nop13454 = alloca i1, i1 0
-  %nop13455 = alloca i1, i1 0
-  %nop13456 = alloca i1, i1 0
-  %nop13457 = alloca i1, i1 0
-  %nop13458 = alloca i1, i1 0
-  %nop13459 = alloca i1, i1 0
-  %nop13460 = alloca i1, i1 0
-  %nop13461 = alloca i1, i1 0
-  %nop13462 = alloca i1, i1 0
-  %nop13463 = alloca i1, i1 0
-  %nop13464 = alloca i1, i1 0
-  %nop13465 = alloca i1, i1 0
-  %nop13466 = alloca i1, i1 0
-  %nop13467 = alloca i1, i1 0
-  %nop13468 = alloca i1, i1 0
-  %nop13469 = alloca i1, i1 0
-  %nop13470 = alloca i1, i1 0
-  %nop13471 = alloca i1, i1 0
-  %nop13472 = alloca i1, i1 0
-  %nop13473 = alloca i1, i1 0
-  %nop13474 = alloca i1, i1 0
-  %nop13475 = alloca i1, i1 0
-  %nop13476 = alloca i1, i1 0
-  %nop13477 = alloca i1, i1 0
-  %nop13478 = alloca i1, i1 0
-  %nop13479 = alloca i1, i1 0
-  %nop13480 = alloca i1, i1 0
-  %nop13481 = alloca i1, i1 0
-  %nop13482 = alloca i1, i1 0
-  %nop13483 = alloca i1, i1 0
-  %nop13484 = alloca i1, i1 0
-  %nop13485 = alloca i1, i1 0
-  %nop13486 = alloca i1, i1 0
-  %nop13487 = alloca i1, i1 0
-  %nop13488 = alloca i1, i1 0
-  %nop13489 = alloca i1, i1 0
-  %nop13490 = alloca i1, i1 0
-  %nop13491 = alloca i1, i1 0
-  %nop13492 = alloca i1, i1 0
-  %nop13493 = alloca i1, i1 0
-  %nop13494 = alloca i1, i1 0
-  %nop13495 = alloca i1, i1 0
-  %nop13496 = alloca i1, i1 0
-  %nop13497 = alloca i1, i1 0
-  %nop13498 = alloca i1, i1 0
-  %nop13499 = alloca i1, i1 0
-  %nop13500 = alloca i1, i1 0
-  %nop13501 = alloca i1, i1 0
-  %nop13502 = alloca i1, i1 0
-  %nop13503 = alloca i1, i1 0
-  %nop13504 = alloca i1, i1 0
-  %nop13505 = alloca i1, i1 0
-  %nop13506 = alloca i1, i1 0
-  %nop13507 = alloca i1, i1 0
-  %nop13508 = alloca i1, i1 0
-  %nop13509 = alloca i1, i1 0
-  %nop13510 = alloca i1, i1 0
-  %nop13511 = alloca i1, i1 0
-  %nop13512 = alloca i1, i1 0
-  %nop13513 = alloca i1, i1 0
-  %nop13514 = alloca i1, i1 0
-  %nop13515 = alloca i1, i1 0
-  %nop13516 = alloca i1, i1 0
-  %nop13517 = alloca i1, i1 0
-  %nop13518 = alloca i1, i1 0
-  %nop13519 = alloca i1, i1 0
-  %nop13520 = alloca i1, i1 0
-  %nop13521 = alloca i1, i1 0
-  %nop13522 = alloca i1, i1 0
-  %nop13523 = alloca i1, i1 0
-  %nop13524 = alloca i1, i1 0
-  %nop13525 = alloca i1, i1 0
-  %nop13526 = alloca i1, i1 0
-  %nop13527 = alloca i1, i1 0
-  %nop13528 = alloca i1, i1 0
-  %nop13529 = alloca i1, i1 0
-  %nop13530 = alloca i1, i1 0
-  %nop13531 = alloca i1, i1 0
-  %nop13532 = alloca i1, i1 0
-  %nop13533 = alloca i1, i1 0
-  %nop13534 = alloca i1, i1 0
-  %nop13535 = alloca i1, i1 0
-  %nop13536 = alloca i1, i1 0
-  %nop13537 = alloca i1, i1 0
-  %nop13538 = alloca i1, i1 0
-  %nop13539 = alloca i1, i1 0
-  %nop13540 = alloca i1, i1 0
-  %nop13541 = alloca i1, i1 0
-  %nop13542 = alloca i1, i1 0
-  %nop13543 = alloca i1, i1 0
-  %nop13544 = alloca i1, i1 0
-  %nop13545 = alloca i1, i1 0
-  %nop13546 = alloca i1, i1 0
-  %nop13547 = alloca i1, i1 0
-  %nop13548 = alloca i1, i1 0
-  %nop13549 = alloca i1, i1 0
-  %nop13550 = alloca i1, i1 0
-  %nop13551 = alloca i1, i1 0
-  %nop13552 = alloca i1, i1 0
-  %nop13553 = alloca i1, i1 0
-  %nop13554 = alloca i1, i1 0
-  %nop13555 = alloca i1, i1 0
-  %nop13556 = alloca i1, i1 0
-  %nop13557 = alloca i1, i1 0
-  %nop13558 = alloca i1, i1 0
-  %nop13559 = alloca i1, i1 0
-  %nop13560 = alloca i1, i1 0
-  %nop13561 = alloca i1, i1 0
-  %nop13562 = alloca i1, i1 0
-  %nop13563 = alloca i1, i1 0
-  %nop13564 = alloca i1, i1 0
-  %nop13565 = alloca i1, i1 0
-  %nop13566 = alloca i1, i1 0
-  %nop13567 = alloca i1, i1 0
-  %nop13568 = alloca i1, i1 0
-  %nop13569 = alloca i1, i1 0
-  %nop13570 = alloca i1, i1 0
-  %nop13571 = alloca i1, i1 0
-  %nop13572 = alloca i1, i1 0
-  %nop13573 = alloca i1, i1 0
-  %nop13574 = alloca i1, i1 0
-  %nop13575 = alloca i1, i1 0
-  %nop13576 = alloca i1, i1 0
-  %nop13577 = alloca i1, i1 0
-  %nop13578 = alloca i1, i1 0
-  %nop13579 = alloca i1, i1 0
-  %nop13580 = alloca i1, i1 0
-  %nop13581 = alloca i1, i1 0
-  %nop13582 = alloca i1, i1 0
-  %nop13583 = alloca i1, i1 0
-  %nop13584 = alloca i1, i1 0
-  %nop13585 = alloca i1, i1 0
-  %nop13586 = alloca i1, i1 0
-  %nop13587 = alloca i1, i1 0
-  %nop13588 = alloca i1, i1 0
-  %nop13589 = alloca i1, i1 0
-  %nop13590 = alloca i1, i1 0
-  %nop13591 = alloca i1, i1 0
-  %nop13592 = alloca i1, i1 0
-  %nop13593 = alloca i1, i1 0
-  %nop13594 = alloca i1, i1 0
-  %nop13595 = alloca i1, i1 0
-  %nop13596 = alloca i1, i1 0
-  %nop13597 = alloca i1, i1 0
-  %nop13598 = alloca i1, i1 0
-  %nop13599 = alloca i1, i1 0
-  %nop13600 = alloca i1, i1 0
-  %nop13601 = alloca i1, i1 0
-  %nop13602 = alloca i1, i1 0
-  %nop13603 = alloca i1, i1 0
-  %nop13604 = alloca i1, i1 0
-  %nop13605 = alloca i1, i1 0
-  %nop13606 = alloca i1, i1 0
-  %nop13607 = alloca i1, i1 0
-  %nop13608 = alloca i1, i1 0
-  %nop13609 = alloca i1, i1 0
-  %nop13610 = alloca i1, i1 0
-  %nop13611 = alloca i1, i1 0
-  %nop13612 = alloca i1, i1 0
-  %nop13613 = alloca i1, i1 0
-  %nop13614 = alloca i1, i1 0
-  %nop13615 = alloca i1, i1 0
-  %nop13616 = alloca i1, i1 0
-  %nop13617 = alloca i1, i1 0
-  %nop13618 = alloca i1, i1 0
-  %nop13619 = alloca i1, i1 0
-  %nop13620 = alloca i1, i1 0
-  %nop13621 = alloca i1, i1 0
-  %nop13622 = alloca i1, i1 0
-  %nop13623 = alloca i1, i1 0
-  %nop13624 = alloca i1, i1 0
-  %nop13625 = alloca i1, i1 0
-  %nop13626 = alloca i1, i1 0
-  %nop13627 = alloca i1, i1 0
-  %nop13628 = alloca i1, i1 0
-  %nop13629 = alloca i1, i1 0
-  %nop13630 = alloca i1, i1 0
-  %nop13631 = alloca i1, i1 0
-  %nop13632 = alloca i1, i1 0
-  %nop13633 = alloca i1, i1 0
-  %nop13634 = alloca i1, i1 0
-  %nop13635 = alloca i1, i1 0
-  %nop13636 = alloca i1, i1 0
-  %nop13637 = alloca i1, i1 0
-  %nop13638 = alloca i1, i1 0
-  %nop13639 = alloca i1, i1 0
-  %nop13640 = alloca i1, i1 0
-  %nop13641 = alloca i1, i1 0
-  %nop13642 = alloca i1, i1 0
-  %nop13643 = alloca i1, i1 0
-  %nop13644 = alloca i1, i1 0
-  %nop13645 = alloca i1, i1 0
-  %nop13646 = alloca i1, i1 0
-  %nop13647 = alloca i1, i1 0
-  %nop13648 = alloca i1, i1 0
-  %nop13649 = alloca i1, i1 0
-  %nop13650 = alloca i1, i1 0
-  %nop13651 = alloca i1, i1 0
-  %nop13652 = alloca i1, i1 0
-  %nop13653 = alloca i1, i1 0
-  %nop13654 = alloca i1, i1 0
-  %nop13655 = alloca i1, i1 0
-  %nop13656 = alloca i1, i1 0
-  %nop13657 = alloca i1, i1 0
-  %nop13658 = alloca i1, i1 0
-  %nop13659 = alloca i1, i1 0
-  %nop13660 = alloca i1, i1 0
-  %nop13661 = alloca i1, i1 0
-  %nop13662 = alloca i1, i1 0
-  %nop13663 = alloca i1, i1 0
-  %nop13664 = alloca i1, i1 0
-  %nop13665 = alloca i1, i1 0
-  %nop13666 = alloca i1, i1 0
-  %nop13667 = alloca i1, i1 0
-  %nop13668 = alloca i1, i1 0
-  %nop13669 = alloca i1, i1 0
-  %nop13670 = alloca i1, i1 0
-  %nop13671 = alloca i1, i1 0
-  %nop13672 = alloca i1, i1 0
-  %nop13673 = alloca i1, i1 0
-  %nop13674 = alloca i1, i1 0
-  %nop13675 = alloca i1, i1 0
-  %nop13676 = alloca i1, i1 0
-  %nop13677 = alloca i1, i1 0
-  %nop13678 = alloca i1, i1 0
-  %nop13679 = alloca i1, i1 0
-  %nop13680 = alloca i1, i1 0
-  %nop13681 = alloca i1, i1 0
-  %nop13682 = alloca i1, i1 0
-  %nop13683 = alloca i1, i1 0
-  %nop13684 = alloca i1, i1 0
-  %nop13685 = alloca i1, i1 0
-  %nop13686 = alloca i1, i1 0
-  %nop13687 = alloca i1, i1 0
-  %nop13688 = alloca i1, i1 0
-  %nop13689 = alloca i1, i1 0
-  %nop13690 = alloca i1, i1 0
-  %nop13691 = alloca i1, i1 0
-  %nop13692 = alloca i1, i1 0
-  %nop13693 = alloca i1, i1 0
-  %nop13694 = alloca i1, i1 0
-  %nop13695 = alloca i1, i1 0
-  %nop13696 = alloca i1, i1 0
-  %nop13697 = alloca i1, i1 0
-  %nop13698 = alloca i1, i1 0
-  %nop13699 = alloca i1, i1 0
-  %nop13700 = alloca i1, i1 0
-  %nop13701 = alloca i1, i1 0
-  %nop13702 = alloca i1, i1 0
-  %nop13703 = alloca i1, i1 0
-  %nop13704 = alloca i1, i1 0
-  %nop13705 = alloca i1, i1 0
-  %nop13706 = alloca i1, i1 0
-  %nop13707 = alloca i1, i1 0
-  %nop13708 = alloca i1, i1 0
-  %nop13709 = alloca i1, i1 0
-  %nop13710 = alloca i1, i1 0
-  %nop13711 = alloca i1, i1 0
-  %nop13712 = alloca i1, i1 0
-  %nop13713 = alloca i1, i1 0
-  %nop13714 = alloca i1, i1 0
-  %nop13715 = alloca i1, i1 0
-  %nop13716 = alloca i1, i1 0
-  %nop13717 = alloca i1, i1 0
-  %nop13718 = alloca i1, i1 0
-  %nop13719 = alloca i1, i1 0
-  %nop13720 = alloca i1, i1 0
-  %nop13721 = alloca i1, i1 0
-  %nop13722 = alloca i1, i1 0
-  %nop13723 = alloca i1, i1 0
-  %nop13724 = alloca i1, i1 0
-  %nop13725 = alloca i1, i1 0
-  %nop13726 = alloca i1, i1 0
-  %nop13727 = alloca i1, i1 0
-  %nop13728 = alloca i1, i1 0
-  %nop13729 = alloca i1, i1 0
-  %nop13730 = alloca i1, i1 0
-  %nop13731 = alloca i1, i1 0
-  %nop13732 = alloca i1, i1 0
-  %nop13733 = alloca i1, i1 0
-  %nop13734 = alloca i1, i1 0
-  %nop13735 = alloca i1, i1 0
-  %nop13736 = alloca i1, i1 0
-  %nop13737 = alloca i1, i1 0
-  %nop13738 = alloca i1, i1 0
-  %nop13739 = alloca i1, i1 0
-  %nop13740 = alloca i1, i1 0
-  %nop13741 = alloca i1, i1 0
-  %nop13742 = alloca i1, i1 0
-  %nop13743 = alloca i1, i1 0
-  %nop13744 = alloca i1, i1 0
-  %nop13745 = alloca i1, i1 0
-  %nop13746 = alloca i1, i1 0
-  %nop13747 = alloca i1, i1 0
-  %nop13748 = alloca i1, i1 0
-  %nop13749 = alloca i1, i1 0
-  %nop13750 = alloca i1, i1 0
-  %nop13751 = alloca i1, i1 0
-  %nop13752 = alloca i1, i1 0
-  %nop13753 = alloca i1, i1 0
-  %nop13754 = alloca i1, i1 0
-  %nop13755 = alloca i1, i1 0
-  %nop13756 = alloca i1, i1 0
-  %nop13757 = alloca i1, i1 0
-  %nop13758 = alloca i1, i1 0
-  %nop13759 = alloca i1, i1 0
-  %nop13760 = alloca i1, i1 0
-  %nop13761 = alloca i1, i1 0
-  %nop13762 = alloca i1, i1 0
-  %nop13763 = alloca i1, i1 0
-  %nop13764 = alloca i1, i1 0
-  %nop13765 = alloca i1, i1 0
-  %nop13766 = alloca i1, i1 0
-  %nop13767 = alloca i1, i1 0
-  %nop13768 = alloca i1, i1 0
-  %nop13769 = alloca i1, i1 0
-  %nop13770 = alloca i1, i1 0
-  %nop13771 = alloca i1, i1 0
-  %nop13772 = alloca i1, i1 0
-  %nop13773 = alloca i1, i1 0
-  %nop13774 = alloca i1, i1 0
-  %nop13775 = alloca i1, i1 0
-  %nop13776 = alloca i1, i1 0
-  %nop13777 = alloca i1, i1 0
-  %nop13778 = alloca i1, i1 0
-  %nop13779 = alloca i1, i1 0
-  %nop13780 = alloca i1, i1 0
-  %nop13781 = alloca i1, i1 0
-  %nop13782 = alloca i1, i1 0
-  %nop13783 = alloca i1, i1 0
-  %nop13784 = alloca i1, i1 0
-  %nop13785 = alloca i1, i1 0
-  %nop13786 = alloca i1, i1 0
-  %nop13787 = alloca i1, i1 0
-  %nop13788 = alloca i1, i1 0
-  %nop13789 = alloca i1, i1 0
-  %nop13790 = alloca i1, i1 0
-  %nop13791 = alloca i1, i1 0
-  %nop13792 = alloca i1, i1 0
-  %nop13793 = alloca i1, i1 0
-  %nop13794 = alloca i1, i1 0
-  %nop13795 = alloca i1, i1 0
-  %nop13796 = alloca i1, i1 0
-  %nop13797 = alloca i1, i1 0
-  %nop13798 = alloca i1, i1 0
-  %nop13799 = alloca i1, i1 0
-  %nop13800 = alloca i1, i1 0
-  %nop13801 = alloca i1, i1 0
-  %nop13802 = alloca i1, i1 0
-  %nop13803 = alloca i1, i1 0
-  %nop13804 = alloca i1, i1 0
-  %nop13805 = alloca i1, i1 0
-  %nop13806 = alloca i1, i1 0
-  %nop13807 = alloca i1, i1 0
-  %nop13808 = alloca i1, i1 0
-  %nop13809 = alloca i1, i1 0
-  %nop13810 = alloca i1, i1 0
-  %nop13811 = alloca i1, i1 0
-  %nop13812 = alloca i1, i1 0
-  %nop13813 = alloca i1, i1 0
-  %nop13814 = alloca i1, i1 0
-  %nop13815 = alloca i1, i1 0
-  %nop13816 = alloca i1, i1 0
-  %nop13817 = alloca i1, i1 0
-  %nop13818 = alloca i1, i1 0
-  %nop13819 = alloca i1, i1 0
-  %nop13820 = alloca i1, i1 0
-  %nop13821 = alloca i1, i1 0
-  %nop13822 = alloca i1, i1 0
-  %nop13823 = alloca i1, i1 0
-  %nop13824 = alloca i1, i1 0
-  %nop13825 = alloca i1, i1 0
-  %nop13826 = alloca i1, i1 0
-  %nop13827 = alloca i1, i1 0
-  %nop13828 = alloca i1, i1 0
-  %nop13829 = alloca i1, i1 0
-  %nop13830 = alloca i1, i1 0
-  %nop13831 = alloca i1, i1 0
-  %nop13832 = alloca i1, i1 0
-  %nop13833 = alloca i1, i1 0
-  %nop13834 = alloca i1, i1 0
-  %nop13835 = alloca i1, i1 0
-  %nop13836 = alloca i1, i1 0
-  %nop13837 = alloca i1, i1 0
-  %nop13838 = alloca i1, i1 0
-  %nop13839 = alloca i1, i1 0
-  %nop13840 = alloca i1, i1 0
-  %nop13841 = alloca i1, i1 0
-  %nop13842 = alloca i1, i1 0
-  %nop13843 = alloca i1, i1 0
-  %nop13844 = alloca i1, i1 0
-  %nop13845 = alloca i1, i1 0
-  %nop13846 = alloca i1, i1 0
-  %nop13847 = alloca i1, i1 0
-  %nop13848 = alloca i1, i1 0
-  %nop13849 = alloca i1, i1 0
-  %nop13850 = alloca i1, i1 0
-  %nop13851 = alloca i1, i1 0
-  %nop13852 = alloca i1, i1 0
-  %nop13853 = alloca i1, i1 0
-  %nop13854 = alloca i1, i1 0
-  %nop13855 = alloca i1, i1 0
-  %nop13856 = alloca i1, i1 0
-  %nop13857 = alloca i1, i1 0
-  %nop13858 = alloca i1, i1 0
-  %nop13859 = alloca i1, i1 0
-  %nop13860 = alloca i1, i1 0
-  %nop13861 = alloca i1, i1 0
-  %nop13862 = alloca i1, i1 0
-  %nop13863 = alloca i1, i1 0
-  %nop13864 = alloca i1, i1 0
-  %nop13865 = alloca i1, i1 0
-  %nop13866 = alloca i1, i1 0
-  %nop13867 = alloca i1, i1 0
-  %nop13868 = alloca i1, i1 0
-  %nop13869 = alloca i1, i1 0
-  %nop13870 = alloca i1, i1 0
-  %nop13871 = alloca i1, i1 0
-  %nop13872 = alloca i1, i1 0
-  %nop13873 = alloca i1, i1 0
-  %nop13874 = alloca i1, i1 0
-  %nop13875 = alloca i1, i1 0
-  %nop13876 = alloca i1, i1 0
-  %nop13877 = alloca i1, i1 0
-  %nop13878 = alloca i1, i1 0
-  %nop13879 = alloca i1, i1 0
-  %nop13880 = alloca i1, i1 0
-  %nop13881 = alloca i1, i1 0
-  %nop13882 = alloca i1, i1 0
-  %nop13883 = alloca i1, i1 0
-  %nop13884 = alloca i1, i1 0
-  %nop13885 = alloca i1, i1 0
-  %nop13886 = alloca i1, i1 0
-  %nop13887 = alloca i1, i1 0
-  %nop13888 = alloca i1, i1 0
-  %nop13889 = alloca i1, i1 0
-  %nop13890 = alloca i1, i1 0
-  %nop13891 = alloca i1, i1 0
-  %nop13892 = alloca i1, i1 0
-  %nop13893 = alloca i1, i1 0
-  %nop13894 = alloca i1, i1 0
-  %nop13895 = alloca i1, i1 0
-  %nop13896 = alloca i1, i1 0
-  %nop13897 = alloca i1, i1 0
-  %nop13898 = alloca i1, i1 0
-  %nop13899 = alloca i1, i1 0
-  %nop13900 = alloca i1, i1 0
-  %nop13901 = alloca i1, i1 0
-  %nop13902 = alloca i1, i1 0
-  %nop13903 = alloca i1, i1 0
-  %nop13904 = alloca i1, i1 0
-  %nop13905 = alloca i1, i1 0
-  %nop13906 = alloca i1, i1 0
-  %nop13907 = alloca i1, i1 0
-  %nop13908 = alloca i1, i1 0
-  %nop13909 = alloca i1, i1 0
-  %nop13910 = alloca i1, i1 0
-  %nop13911 = alloca i1, i1 0
-  %nop13912 = alloca i1, i1 0
-  %nop13913 = alloca i1, i1 0
-  %nop13914 = alloca i1, i1 0
-  %nop13915 = alloca i1, i1 0
-  %nop13916 = alloca i1, i1 0
-  %nop13917 = alloca i1, i1 0
-  %nop13918 = alloca i1, i1 0
-  %nop13919 = alloca i1, i1 0
-  %nop13920 = alloca i1, i1 0
-  %nop13921 = alloca i1, i1 0
-  %nop13922 = alloca i1, i1 0
-  %nop13923 = alloca i1, i1 0
-  %nop13924 = alloca i1, i1 0
-  %nop13925 = alloca i1, i1 0
-  %nop13926 = alloca i1, i1 0
-  %nop13927 = alloca i1, i1 0
-  %nop13928 = alloca i1, i1 0
-  %nop13929 = alloca i1, i1 0
-  %nop13930 = alloca i1, i1 0
-  %nop13931 = alloca i1, i1 0
-  %nop13932 = alloca i1, i1 0
-  %nop13933 = alloca i1, i1 0
-  %nop13934 = alloca i1, i1 0
-  %nop13935 = alloca i1, i1 0
-  %nop13936 = alloca i1, i1 0
-  %nop13937 = alloca i1, i1 0
-  %nop13938 = alloca i1, i1 0
-  %nop13939 = alloca i1, i1 0
-  %nop13940 = alloca i1, i1 0
-  %nop13941 = alloca i1, i1 0
-  %nop13942 = alloca i1, i1 0
-  %nop13943 = alloca i1, i1 0
-  %nop13944 = alloca i1, i1 0
-  %nop13945 = alloca i1, i1 0
-  %nop13946 = alloca i1, i1 0
-  %nop13947 = alloca i1, i1 0
-  %nop13948 = alloca i1, i1 0
-  %nop13949 = alloca i1, i1 0
-  %nop13950 = alloca i1, i1 0
-  %nop13951 = alloca i1, i1 0
-  %nop13952 = alloca i1, i1 0
-  %nop13953 = alloca i1, i1 0
-  %nop13954 = alloca i1, i1 0
-  %nop13955 = alloca i1, i1 0
-  %nop13956 = alloca i1, i1 0
-  %nop13957 = alloca i1, i1 0
-  %nop13958 = alloca i1, i1 0
-  %nop13959 = alloca i1, i1 0
-  %nop13960 = alloca i1, i1 0
-  %nop13961 = alloca i1, i1 0
-  %nop13962 = alloca i1, i1 0
-  %nop13963 = alloca i1, i1 0
-  %nop13964 = alloca i1, i1 0
-  %nop13965 = alloca i1, i1 0
-  %nop13966 = alloca i1, i1 0
-  %nop13967 = alloca i1, i1 0
-  %nop13968 = alloca i1, i1 0
-  %nop13969 = alloca i1, i1 0
-  %nop13970 = alloca i1, i1 0
-  %nop13971 = alloca i1, i1 0
-  %nop13972 = alloca i1, i1 0
-  %nop13973 = alloca i1, i1 0
-  %nop13974 = alloca i1, i1 0
-  %nop13975 = alloca i1, i1 0
-  %nop13976 = alloca i1, i1 0
-  %nop13977 = alloca i1, i1 0
-  %nop13978 = alloca i1, i1 0
-  %nop13979 = alloca i1, i1 0
-  %nop13980 = alloca i1, i1 0
-  %nop13981 = alloca i1, i1 0
-  %nop13982 = alloca i1, i1 0
-  %nop13983 = alloca i1, i1 0
-  %nop13984 = alloca i1, i1 0
-  %nop13985 = alloca i1, i1 0
-  %nop13986 = alloca i1, i1 0
-  %nop13987 = alloca i1, i1 0
-  %nop13988 = alloca i1, i1 0
-  %nop13989 = alloca i1, i1 0
-  %nop13990 = alloca i1, i1 0
-  %nop13991 = alloca i1, i1 0
-  %nop13992 = alloca i1, i1 0
-  %nop13993 = alloca i1, i1 0
-  %nop13994 = alloca i1, i1 0
-  %nop13995 = alloca i1, i1 0
-  %nop13996 = alloca i1, i1 0
-  %nop13997 = alloca i1, i1 0
-  %nop13998 = alloca i1, i1 0
-  %nop13999 = alloca i1, i1 0
-  %nop14000 = alloca i1, i1 0
-  %nop14001 = alloca i1, i1 0
-  %nop14002 = alloca i1, i1 0
-  %nop14003 = alloca i1, i1 0
-  %nop14004 = alloca i1, i1 0
-  %nop14005 = alloca i1, i1 0
-  %nop14006 = alloca i1, i1 0
-  %nop14007 = alloca i1, i1 0
-  %nop14008 = alloca i1, i1 0
-  %nop14009 = alloca i1, i1 0
-  %nop14010 = alloca i1, i1 0
-  %nop14011 = alloca i1, i1 0
-  %nop14012 = alloca i1, i1 0
-  %nop14013 = alloca i1, i1 0
-  %nop14014 = alloca i1, i1 0
-  %nop14015 = alloca i1, i1 0
-  %nop14016 = alloca i1, i1 0
-  %nop14017 = alloca i1, i1 0
-  %nop14018 = alloca i1, i1 0
-  %nop14019 = alloca i1, i1 0
-  %nop14020 = alloca i1, i1 0
-  %nop14021 = alloca i1, i1 0
-  %nop14022 = alloca i1, i1 0
-  %nop14023 = alloca i1, i1 0
-  %nop14024 = alloca i1, i1 0
-  %nop14025 = alloca i1, i1 0
-  %nop14026 = alloca i1, i1 0
-  %nop14027 = alloca i1, i1 0
-  %nop14028 = alloca i1, i1 0
-  %nop14029 = alloca i1, i1 0
-  %nop14030 = alloca i1, i1 0
-  %nop14031 = alloca i1, i1 0
-  %nop14032 = alloca i1, i1 0
-  %nop14033 = alloca i1, i1 0
-  %nop14034 = alloca i1, i1 0
-  %nop14035 = alloca i1, i1 0
-  %nop14036 = alloca i1, i1 0
-  %nop14037 = alloca i1, i1 0
-  %nop14038 = alloca i1, i1 0
-  %nop14039 = alloca i1, i1 0
-  %nop14040 = alloca i1, i1 0
-  %nop14041 = alloca i1, i1 0
-  %nop14042 = alloca i1, i1 0
-  %nop14043 = alloca i1, i1 0
-  %nop14044 = alloca i1, i1 0
-  %nop14045 = alloca i1, i1 0
-  %nop14046 = alloca i1, i1 0
-  %nop14047 = alloca i1, i1 0
-  %nop14048 = alloca i1, i1 0
-  %nop14049 = alloca i1, i1 0
-  %nop14050 = alloca i1, i1 0
-  %nop14051 = alloca i1, i1 0
-  %nop14052 = alloca i1, i1 0
-  %nop14053 = alloca i1, i1 0
-  %nop14054 = alloca i1, i1 0
-  %nop14055 = alloca i1, i1 0
-  %nop14056 = alloca i1, i1 0
-  %nop14057 = alloca i1, i1 0
-  %nop14058 = alloca i1, i1 0
-  %nop14059 = alloca i1, i1 0
-  %nop14060 = alloca i1, i1 0
-  %nop14061 = alloca i1, i1 0
-  %nop14062 = alloca i1, i1 0
-  %nop14063 = alloca i1, i1 0
-  %nop14064 = alloca i1, i1 0
-  %nop14065 = alloca i1, i1 0
-  %nop14066 = alloca i1, i1 0
-  %nop14067 = alloca i1, i1 0
-  %nop14068 = alloca i1, i1 0
-  %nop14069 = alloca i1, i1 0
-  %nop14070 = alloca i1, i1 0
-  %nop14071 = alloca i1, i1 0
-  %nop14072 = alloca i1, i1 0
-  %nop14073 = alloca i1, i1 0
-  %nop14074 = alloca i1, i1 0
-  %nop14075 = alloca i1, i1 0
-  %nop14076 = alloca i1, i1 0
-  %nop14077 = alloca i1, i1 0
-  %nop14078 = alloca i1, i1 0
-  %nop14079 = alloca i1, i1 0
-  %nop14080 = alloca i1, i1 0
-  %nop14081 = alloca i1, i1 0
-  %nop14082 = alloca i1, i1 0
-  %nop14083 = alloca i1, i1 0
-  %nop14084 = alloca i1, i1 0
-  %nop14085 = alloca i1, i1 0
-  %nop14086 = alloca i1, i1 0
-  %nop14087 = alloca i1, i1 0
-  %nop14088 = alloca i1, i1 0
-  %nop14089 = alloca i1, i1 0
-  %nop14090 = alloca i1, i1 0
-  %nop14091 = alloca i1, i1 0
-  %nop14092 = alloca i1, i1 0
-  %nop14093 = alloca i1, i1 0
-  %nop14094 = alloca i1, i1 0
-  %nop14095 = alloca i1, i1 0
-  %nop14096 = alloca i1, i1 0
-  %nop14097 = alloca i1, i1 0
-  %nop14098 = alloca i1, i1 0
-  %nop14099 = alloca i1, i1 0
-  %nop14100 = alloca i1, i1 0
-  %nop14101 = alloca i1, i1 0
-  %nop14102 = alloca i1, i1 0
-  %nop14103 = alloca i1, i1 0
-  %nop14104 = alloca i1, i1 0
-  %nop14105 = alloca i1, i1 0
-  %nop14106 = alloca i1, i1 0
-  %nop14107 = alloca i1, i1 0
-  %nop14108 = alloca i1, i1 0
-  %nop14109 = alloca i1, i1 0
-  %nop14110 = alloca i1, i1 0
-  %nop14111 = alloca i1, i1 0
-  %nop14112 = alloca i1, i1 0
-  %nop14113 = alloca i1, i1 0
-  %nop14114 = alloca i1, i1 0
-  %nop14115 = alloca i1, i1 0
-  %nop14116 = alloca i1, i1 0
-  %nop14117 = alloca i1, i1 0
-  %nop14118 = alloca i1, i1 0
-  %nop14119 = alloca i1, i1 0
-  %nop14120 = alloca i1, i1 0
-  %nop14121 = alloca i1, i1 0
-  %nop14122 = alloca i1, i1 0
-  %nop14123 = alloca i1, i1 0
-  %nop14124 = alloca i1, i1 0
-  %nop14125 = alloca i1, i1 0
-  %nop14126 = alloca i1, i1 0
-  %nop14127 = alloca i1, i1 0
-  %nop14128 = alloca i1, i1 0
-  %nop14129 = alloca i1, i1 0
-  %nop14130 = alloca i1, i1 0
-  %nop14131 = alloca i1, i1 0
-  %nop14132 = alloca i1, i1 0
-  %nop14133 = alloca i1, i1 0
-  %nop14134 = alloca i1, i1 0
-  %nop14135 = alloca i1, i1 0
-  %nop14136 = alloca i1, i1 0
-  %nop14137 = alloca i1, i1 0
-  %nop14138 = alloca i1, i1 0
-  %nop14139 = alloca i1, i1 0
-  %nop14140 = alloca i1, i1 0
-  %nop14141 = alloca i1, i1 0
-  %nop14142 = alloca i1, i1 0
-  %nop14143 = alloca i1, i1 0
-  %nop14144 = alloca i1, i1 0
-  %nop14145 = alloca i1, i1 0
-  %nop14146 = alloca i1, i1 0
-  %nop14147 = alloca i1, i1 0
-  %nop14148 = alloca i1, i1 0
-  %nop14149 = alloca i1, i1 0
-  %nop14150 = alloca i1, i1 0
-  %nop14151 = alloca i1, i1 0
-  %nop14152 = alloca i1, i1 0
-  %nop14153 = alloca i1, i1 0
-  %nop14154 = alloca i1, i1 0
-  %nop14155 = alloca i1, i1 0
-  %nop14156 = alloca i1, i1 0
-  %nop14157 = alloca i1, i1 0
-  %nop14158 = alloca i1, i1 0
-  %nop14159 = alloca i1, i1 0
-  %nop14160 = alloca i1, i1 0
-  %nop14161 = alloca i1, i1 0
-  %nop14162 = alloca i1, i1 0
-  %nop14163 = alloca i1, i1 0
-  %nop14164 = alloca i1, i1 0
-  %nop14165 = alloca i1, i1 0
-  %nop14166 = alloca i1, i1 0
-  %nop14167 = alloca i1, i1 0
-  %nop14168 = alloca i1, i1 0
-  %nop14169 = alloca i1, i1 0
-  %nop14170 = alloca i1, i1 0
-  %nop14171 = alloca i1, i1 0
-  %nop14172 = alloca i1, i1 0
-  %nop14173 = alloca i1, i1 0
-  %nop14174 = alloca i1, i1 0
-  %nop14175 = alloca i1, i1 0
-  %nop14176 = alloca i1, i1 0
-  %nop14177 = alloca i1, i1 0
-  %nop14178 = alloca i1, i1 0
-  %nop14179 = alloca i1, i1 0
-  %nop14180 = alloca i1, i1 0
-  %nop14181 = alloca i1, i1 0
-  %nop14182 = alloca i1, i1 0
-  %nop14183 = alloca i1, i1 0
-  %nop14184 = alloca i1, i1 0
-  %nop14185 = alloca i1, i1 0
-  %nop14186 = alloca i1, i1 0
-  %nop14187 = alloca i1, i1 0
-  %nop14188 = alloca i1, i1 0
-  %nop14189 = alloca i1, i1 0
-  %nop14190 = alloca i1, i1 0
-  %nop14191 = alloca i1, i1 0
-  %nop14192 = alloca i1, i1 0
-  %nop14193 = alloca i1, i1 0
-  %nop14194 = alloca i1, i1 0
-  %nop14195 = alloca i1, i1 0
-  %nop14196 = alloca i1, i1 0
-  %nop14197 = alloca i1, i1 0
-  %nop14198 = alloca i1, i1 0
-  %nop14199 = alloca i1, i1 0
-  %nop14200 = alloca i1, i1 0
-  %nop14201 = alloca i1, i1 0
-  %nop14202 = alloca i1, i1 0
-  %nop14203 = alloca i1, i1 0
-  %nop14204 = alloca i1, i1 0
-  %nop14205 = alloca i1, i1 0
-  %nop14206 = alloca i1, i1 0
-  %nop14207 = alloca i1, i1 0
-  %nop14208 = alloca i1, i1 0
-  %nop14209 = alloca i1, i1 0
-  %nop14210 = alloca i1, i1 0
-  %nop14211 = alloca i1, i1 0
-  %nop14212 = alloca i1, i1 0
-  %nop14213 = alloca i1, i1 0
-  %nop14214 = alloca i1, i1 0
-  %nop14215 = alloca i1, i1 0
-  %nop14216 = alloca i1, i1 0
-  %nop14217 = alloca i1, i1 0
-  %nop14218 = alloca i1, i1 0
-  %nop14219 = alloca i1, i1 0
-  %nop14220 = alloca i1, i1 0
-  %nop14221 = alloca i1, i1 0
-  %nop14222 = alloca i1, i1 0
-  %nop14223 = alloca i1, i1 0
-  %nop14224 = alloca i1, i1 0
-  %nop14225 = alloca i1, i1 0
-  %nop14226 = alloca i1, i1 0
-  %nop14227 = alloca i1, i1 0
-  %nop14228 = alloca i1, i1 0
-  %nop14229 = alloca i1, i1 0
-  %nop14230 = alloca i1, i1 0
-  %nop14231 = alloca i1, i1 0
-  %nop14232 = alloca i1, i1 0
-  %nop14233 = alloca i1, i1 0
-  %nop14234 = alloca i1, i1 0
-  %nop14235 = alloca i1, i1 0
-  %nop14236 = alloca i1, i1 0
-  %nop14237 = alloca i1, i1 0
-  %nop14238 = alloca i1, i1 0
-  %nop14239 = alloca i1, i1 0
-  %nop14240 = alloca i1, i1 0
-  %nop14241 = alloca i1, i1 0
-  %nop14242 = alloca i1, i1 0
-  %nop14243 = alloca i1, i1 0
-  %nop14244 = alloca i1, i1 0
-  %nop14245 = alloca i1, i1 0
-  %nop14246 = alloca i1, i1 0
-  %nop14247 = alloca i1, i1 0
-  %nop14248 = alloca i1, i1 0
-  %nop14249 = alloca i1, i1 0
-  %nop14250 = alloca i1, i1 0
-  %nop14251 = alloca i1, i1 0
-  %nop14252 = alloca i1, i1 0
-  %nop14253 = alloca i1, i1 0
-  %nop14254 = alloca i1, i1 0
-  %nop14255 = alloca i1, i1 0
-  %nop14256 = alloca i1, i1 0
-  %nop14257 = alloca i1, i1 0
-  %nop14258 = alloca i1, i1 0
-  %nop14259 = alloca i1, i1 0
-  %nop14260 = alloca i1, i1 0
-  %nop14261 = alloca i1, i1 0
-  %nop14262 = alloca i1, i1 0
-  %nop14263 = alloca i1, i1 0
-  %nop14264 = alloca i1, i1 0
-  %nop14265 = alloca i1, i1 0
-  %nop14266 = alloca i1, i1 0
-  %nop14267 = alloca i1, i1 0
-  %nop14268 = alloca i1, i1 0
-  %nop14269 = alloca i1, i1 0
-  %nop14270 = alloca i1, i1 0
-  %nop14271 = alloca i1, i1 0
-  %nop14272 = alloca i1, i1 0
-  %nop14273 = alloca i1, i1 0
-  %nop14274 = alloca i1, i1 0
-  %nop14275 = alloca i1, i1 0
-  %nop14276 = alloca i1, i1 0
-  %nop14277 = alloca i1, i1 0
-  %nop14278 = alloca i1, i1 0
-  %nop14279 = alloca i1, i1 0
-  %nop14280 = alloca i1, i1 0
-  %nop14281 = alloca i1, i1 0
-  %nop14282 = alloca i1, i1 0
-  %nop14283 = alloca i1, i1 0
-  %nop14284 = alloca i1, i1 0
-  %nop14285 = alloca i1, i1 0
-  %nop14286 = alloca i1, i1 0
-  %nop14287 = alloca i1, i1 0
-  %nop14288 = alloca i1, i1 0
-  %nop14289 = alloca i1, i1 0
-  %nop14290 = alloca i1, i1 0
-  %nop14291 = alloca i1, i1 0
-  %nop14292 = alloca i1, i1 0
-  %nop14293 = alloca i1, i1 0
-  %nop14294 = alloca i1, i1 0
-  %nop14295 = alloca i1, i1 0
-  %nop14296 = alloca i1, i1 0
-  %nop14297 = alloca i1, i1 0
-  %nop14298 = alloca i1, i1 0
-  %nop14299 = alloca i1, i1 0
-  %nop14300 = alloca i1, i1 0
-  %nop14301 = alloca i1, i1 0
-  %nop14302 = alloca i1, i1 0
-  %nop14303 = alloca i1, i1 0
-  %nop14304 = alloca i1, i1 0
-  %nop14305 = alloca i1, i1 0
-  %nop14306 = alloca i1, i1 0
-  %nop14307 = alloca i1, i1 0
-  %nop14308 = alloca i1, i1 0
-  %nop14309 = alloca i1, i1 0
-  %nop14310 = alloca i1, i1 0
-  %nop14311 = alloca i1, i1 0
-  %nop14312 = alloca i1, i1 0
-  %nop14313 = alloca i1, i1 0
-  %nop14314 = alloca i1, i1 0
-  %nop14315 = alloca i1, i1 0
-  %nop14316 = alloca i1, i1 0
-  %nop14317 = alloca i1, i1 0
-  %nop14318 = alloca i1, i1 0
-  %nop14319 = alloca i1, i1 0
-  %nop14320 = alloca i1, i1 0
-  %nop14321 = alloca i1, i1 0
-  %nop14322 = alloca i1, i1 0
-  %nop14323 = alloca i1, i1 0
-  %nop14324 = alloca i1, i1 0
-  %nop14325 = alloca i1, i1 0
-  %nop14326 = alloca i1, i1 0
-  %nop14327 = alloca i1, i1 0
-  %nop14328 = alloca i1, i1 0
-  %nop14329 = alloca i1, i1 0
-  %nop14330 = alloca i1, i1 0
-  %nop14331 = alloca i1, i1 0
-  %nop14332 = alloca i1, i1 0
-  %nop14333 = alloca i1, i1 0
-  %nop14334 = alloca i1, i1 0
-  %nop14335 = alloca i1, i1 0
-  %nop14336 = alloca i1, i1 0
-  %nop14337 = alloca i1, i1 0
-  %nop14338 = alloca i1, i1 0
-  %nop14339 = alloca i1, i1 0
-  %nop14340 = alloca i1, i1 0
-  %nop14341 = alloca i1, i1 0
-  %nop14342 = alloca i1, i1 0
-  %nop14343 = alloca i1, i1 0
-  %nop14344 = alloca i1, i1 0
-  %nop14345 = alloca i1, i1 0
-  %nop14346 = alloca i1, i1 0
-  %nop14347 = alloca i1, i1 0
-  %nop14348 = alloca i1, i1 0
-  %nop14349 = alloca i1, i1 0
-  %nop14350 = alloca i1, i1 0
-  %nop14351 = alloca i1, i1 0
-  %nop14352 = alloca i1, i1 0
-  %nop14353 = alloca i1, i1 0
-  %nop14354 = alloca i1, i1 0
-  %nop14355 = alloca i1, i1 0
-  %nop14356 = alloca i1, i1 0
-  %nop14357 = alloca i1, i1 0
-  %nop14358 = alloca i1, i1 0
-  %nop14359 = alloca i1, i1 0
-  %nop14360 = alloca i1, i1 0
-  %nop14361 = alloca i1, i1 0
-  %nop14362 = alloca i1, i1 0
-  %nop14363 = alloca i1, i1 0
-  %nop14364 = alloca i1, i1 0
-  %nop14365 = alloca i1, i1 0
-  %nop14366 = alloca i1, i1 0
-  %nop14367 = alloca i1, i1 0
-  %nop14368 = alloca i1, i1 0
-  %nop14369 = alloca i1, i1 0
-  %nop14370 = alloca i1, i1 0
-  %nop14371 = alloca i1, i1 0
-  %nop14372 = alloca i1, i1 0
-  %nop14373 = alloca i1, i1 0
-  %nop14374 = alloca i1, i1 0
-  %nop14375 = alloca i1, i1 0
-  %nop14376 = alloca i1, i1 0
-  %nop14377 = alloca i1, i1 0
-  %nop14378 = alloca i1, i1 0
-  %nop14379 = alloca i1, i1 0
-  %nop14380 = alloca i1, i1 0
-  %nop14381 = alloca i1, i1 0
-  %nop14382 = alloca i1, i1 0
-  %nop14383 = alloca i1, i1 0
-  %nop14384 = alloca i1, i1 0
-  %nop14385 = alloca i1, i1 0
-  %nop14386 = alloca i1, i1 0
-  %nop14387 = alloca i1, i1 0
-  %nop14388 = alloca i1, i1 0
-  %nop14389 = alloca i1, i1 0
-  %nop14390 = alloca i1, i1 0
-  %nop14391 = alloca i1, i1 0
-  %nop14392 = alloca i1, i1 0
-  %nop14393 = alloca i1, i1 0
-  %nop14394 = alloca i1, i1 0
-  %nop14395 = alloca i1, i1 0
-  %nop14396 = alloca i1, i1 0
-  %nop14397 = alloca i1, i1 0
-  %nop14398 = alloca i1, i1 0
-  %nop14399 = alloca i1, i1 0
-  %nop14400 = alloca i1, i1 0
-  %nop14401 = alloca i1, i1 0
-  %nop14402 = alloca i1, i1 0
-  %nop14403 = alloca i1, i1 0
-  %nop14404 = alloca i1, i1 0
-  %nop14405 = alloca i1, i1 0
-  %nop14406 = alloca i1, i1 0
-  %nop14407 = alloca i1, i1 0
-  %nop14408 = alloca i1, i1 0
-  %nop14409 = alloca i1, i1 0
-  %nop14410 = alloca i1, i1 0
-  %nop14411 = alloca i1, i1 0
-  %nop14412 = alloca i1, i1 0
-  %nop14413 = alloca i1, i1 0
-  %nop14414 = alloca i1, i1 0
-  %nop14415 = alloca i1, i1 0
-  %nop14416 = alloca i1, i1 0
-  %nop14417 = alloca i1, i1 0
-  %nop14418 = alloca i1, i1 0
-  %nop14419 = alloca i1, i1 0
-  %nop14420 = alloca i1, i1 0
-  %nop14421 = alloca i1, i1 0
-  %nop14422 = alloca i1, i1 0
-  %nop14423 = alloca i1, i1 0
-  %nop14424 = alloca i1, i1 0
-  %nop14425 = alloca i1, i1 0
-  %nop14426 = alloca i1, i1 0
-  %nop14427 = alloca i1, i1 0
-  %nop14428 = alloca i1, i1 0
-  %nop14429 = alloca i1, i1 0
-  %nop14430 = alloca i1, i1 0
-  %nop14431 = alloca i1, i1 0
-  %nop14432 = alloca i1, i1 0
-  %nop14433 = alloca i1, i1 0
-  %nop14434 = alloca i1, i1 0
-  %nop14435 = alloca i1, i1 0
-  %nop14436 = alloca i1, i1 0
-  %nop14437 = alloca i1, i1 0
-  %nop14438 = alloca i1, i1 0
-  %nop14439 = alloca i1, i1 0
-  %nop14440 = alloca i1, i1 0
-  %nop14441 = alloca i1, i1 0
-  %nop14442 = alloca i1, i1 0
-  %nop14443 = alloca i1, i1 0
-  %nop14444 = alloca i1, i1 0
-  %nop14445 = alloca i1, i1 0
-  %nop14446 = alloca i1, i1 0
-  %nop14447 = alloca i1, i1 0
-  %nop14448 = alloca i1, i1 0
-  %nop14449 = alloca i1, i1 0
-  %nop14450 = alloca i1, i1 0
-  %nop14451 = alloca i1, i1 0
-  %nop14452 = alloca i1, i1 0
-  %nop14453 = alloca i1, i1 0
-  %nop14454 = alloca i1, i1 0
-  %nop14455 = alloca i1, i1 0
-  %nop14456 = alloca i1, i1 0
-  %nop14457 = alloca i1, i1 0
-  %nop14458 = alloca i1, i1 0
-  %nop14459 = alloca i1, i1 0
-  %nop14460 = alloca i1, i1 0
-  %nop14461 = alloca i1, i1 0
-  %nop14462 = alloca i1, i1 0
-  %nop14463 = alloca i1, i1 0
-  %nop14464 = alloca i1, i1 0
-  %nop14465 = alloca i1, i1 0
-  %nop14466 = alloca i1, i1 0
-  %nop14467 = alloca i1, i1 0
-  %nop14468 = alloca i1, i1 0
-  %nop14469 = alloca i1, i1 0
-  %nop14470 = alloca i1, i1 0
-  %nop14471 = alloca i1, i1 0
-  %nop14472 = alloca i1, i1 0
-  %nop14473 = alloca i1, i1 0
-  %nop14474 = alloca i1, i1 0
-  %nop14475 = alloca i1, i1 0
-  %nop14476 = alloca i1, i1 0
-  %nop14477 = alloca i1, i1 0
-  %nop14478 = alloca i1, i1 0
-  %nop14479 = alloca i1, i1 0
-  %nop14480 = alloca i1, i1 0
-  %nop14481 = alloca i1, i1 0
-  %nop14482 = alloca i1, i1 0
-  %nop14483 = alloca i1, i1 0
-  %nop14484 = alloca i1, i1 0
-  %nop14485 = alloca i1, i1 0
-  %nop14486 = alloca i1, i1 0
-  %nop14487 = alloca i1, i1 0
-  %nop14488 = alloca i1, i1 0
-  %nop14489 = alloca i1, i1 0
-  %nop14490 = alloca i1, i1 0
-  %nop14491 = alloca i1, i1 0
-  %nop14492 = alloca i1, i1 0
-  %nop14493 = alloca i1, i1 0
-  %nop14494 = alloca i1, i1 0
-  %nop14495 = alloca i1, i1 0
-  %nop14496 = alloca i1, i1 0
-  %nop14497 = alloca i1, i1 0
-  %nop14498 = alloca i1, i1 0
-  %nop14499 = alloca i1, i1 0
-  %nop14500 = alloca i1, i1 0
-  %nop14501 = alloca i1, i1 0
-  %nop14502 = alloca i1, i1 0
-  %nop14503 = alloca i1, i1 0
-  %nop14504 = alloca i1, i1 0
-  %nop14505 = alloca i1, i1 0
-  %nop14506 = alloca i1, i1 0
-  %nop14507 = alloca i1, i1 0
-  %nop14508 = alloca i1, i1 0
-  %nop14509 = alloca i1, i1 0
-  %nop14510 = alloca i1, i1 0
-  %nop14511 = alloca i1, i1 0
-  %nop14512 = alloca i1, i1 0
-  %nop14513 = alloca i1, i1 0
-  %nop14514 = alloca i1, i1 0
-  %nop14515 = alloca i1, i1 0
-  %nop14516 = alloca i1, i1 0
-  %nop14517 = alloca i1, i1 0
-  %nop14518 = alloca i1, i1 0
-  %nop14519 = alloca i1, i1 0
-  %nop14520 = alloca i1, i1 0
-  %nop14521 = alloca i1, i1 0
-  %nop14522 = alloca i1, i1 0
-  %nop14523 = alloca i1, i1 0
-  %nop14524 = alloca i1, i1 0
-  %nop14525 = alloca i1, i1 0
-  %nop14526 = alloca i1, i1 0
-  %nop14527 = alloca i1, i1 0
-  %nop14528 = alloca i1, i1 0
-  %nop14529 = alloca i1, i1 0
-  %nop14530 = alloca i1, i1 0
-  %nop14531 = alloca i1, i1 0
-  %nop14532 = alloca i1, i1 0
-  %nop14533 = alloca i1, i1 0
-  %nop14534 = alloca i1, i1 0
-  %nop14535 = alloca i1, i1 0
-  %nop14536 = alloca i1, i1 0
-  %nop14537 = alloca i1, i1 0
-  %nop14538 = alloca i1, i1 0
-  %nop14539 = alloca i1, i1 0
-  %nop14540 = alloca i1, i1 0
-  %nop14541 = alloca i1, i1 0
-  %nop14542 = alloca i1, i1 0
-  %nop14543 = alloca i1, i1 0
-  %nop14544 = alloca i1, i1 0
-  %nop14545 = alloca i1, i1 0
-  %nop14546 = alloca i1, i1 0
-  %nop14547 = alloca i1, i1 0
-  %nop14548 = alloca i1, i1 0
-  %nop14549 = alloca i1, i1 0
-  %nop14550 = alloca i1, i1 0
-  %nop14551 = alloca i1, i1 0
-  %nop14552 = alloca i1, i1 0
-  %nop14553 = alloca i1, i1 0
-  %nop14554 = alloca i1, i1 0
-  %nop14555 = alloca i1, i1 0
-  %nop14556 = alloca i1, i1 0
-  %nop14557 = alloca i1, i1 0
-  %nop14558 = alloca i1, i1 0
-  %nop14559 = alloca i1, i1 0
-  %nop14560 = alloca i1, i1 0
-  %nop14561 = alloca i1, i1 0
-  %nop14562 = alloca i1, i1 0
-  %nop14563 = alloca i1, i1 0
-  %nop14564 = alloca i1, i1 0
-  %nop14565 = alloca i1, i1 0
-  %nop14566 = alloca i1, i1 0
-  %nop14567 = alloca i1, i1 0
-  %nop14568 = alloca i1, i1 0
-  %nop14569 = alloca i1, i1 0
-  %nop14570 = alloca i1, i1 0
-  %nop14571 = alloca i1, i1 0
-  %nop14572 = alloca i1, i1 0
-  %nop14573 = alloca i1, i1 0
-  %nop14574 = alloca i1, i1 0
-  %nop14575 = alloca i1, i1 0
-  %nop14576 = alloca i1, i1 0
-  %nop14577 = alloca i1, i1 0
-  %nop14578 = alloca i1, i1 0
-  %nop14579 = alloca i1, i1 0
-  %nop14580 = alloca i1, i1 0
-  %nop14581 = alloca i1, i1 0
-  %nop14582 = alloca i1, i1 0
-  %nop14583 = alloca i1, i1 0
-  %nop14584 = alloca i1, i1 0
-  %nop14585 = alloca i1, i1 0
-  %nop14586 = alloca i1, i1 0
-  %nop14587 = alloca i1, i1 0
-  %nop14588 = alloca i1, i1 0
-  %nop14589 = alloca i1, i1 0
-  %nop14590 = alloca i1, i1 0
-  %nop14591 = alloca i1, i1 0
-  %nop14592 = alloca i1, i1 0
-  %nop14593 = alloca i1, i1 0
-  %nop14594 = alloca i1, i1 0
-  %nop14595 = alloca i1, i1 0
-  %nop14596 = alloca i1, i1 0
-  %nop14597 = alloca i1, i1 0
-  %nop14598 = alloca i1, i1 0
-  %nop14599 = alloca i1, i1 0
-  %nop14600 = alloca i1, i1 0
-  %nop14601 = alloca i1, i1 0
-  %nop14602 = alloca i1, i1 0
-  %nop14603 = alloca i1, i1 0
-  %nop14604 = alloca i1, i1 0
-  %nop14605 = alloca i1, i1 0
-  %nop14606 = alloca i1, i1 0
-  %nop14607 = alloca i1, i1 0
-  %nop14608 = alloca i1, i1 0
-  %nop14609 = alloca i1, i1 0
-  %nop14610 = alloca i1, i1 0
-  %nop14611 = alloca i1, i1 0
-  %nop14612 = alloca i1, i1 0
-  %nop14613 = alloca i1, i1 0
-  %nop14614 = alloca i1, i1 0
-  %nop14615 = alloca i1, i1 0
-  %nop14616 = alloca i1, i1 0
-  %nop14617 = alloca i1, i1 0
-  %nop14618 = alloca i1, i1 0
-  %nop14619 = alloca i1, i1 0
-  %nop14620 = alloca i1, i1 0
-  %nop14621 = alloca i1, i1 0
-  %nop14622 = alloca i1, i1 0
-  %nop14623 = alloca i1, i1 0
-  %nop14624 = alloca i1, i1 0
-  %nop14625 = alloca i1, i1 0
-  %nop14626 = alloca i1, i1 0
-  %nop14627 = alloca i1, i1 0
-  %nop14628 = alloca i1, i1 0
-  %nop14629 = alloca i1, i1 0
-  %nop14630 = alloca i1, i1 0
-  %nop14631 = alloca i1, i1 0
-  %nop14632 = alloca i1, i1 0
-  %nop14633 = alloca i1, i1 0
-  %nop14634 = alloca i1, i1 0
-  %nop14635 = alloca i1, i1 0
-  %nop14636 = alloca i1, i1 0
-  %nop14637 = alloca i1, i1 0
-  %nop14638 = alloca i1, i1 0
-  %nop14639 = alloca i1, i1 0
-  %nop14640 = alloca i1, i1 0
-  %nop14641 = alloca i1, i1 0
-  %nop14642 = alloca i1, i1 0
-  %nop14643 = alloca i1, i1 0
-  %nop14644 = alloca i1, i1 0
-  %nop14645 = alloca i1, i1 0
-  %nop14646 = alloca i1, i1 0
-  %nop14647 = alloca i1, i1 0
-  %nop14648 = alloca i1, i1 0
-  %nop14649 = alloca i1, i1 0
-  %nop14650 = alloca i1, i1 0
-  %nop14651 = alloca i1, i1 0
-  %nop14652 = alloca i1, i1 0
-  %nop14653 = alloca i1, i1 0
-  %nop14654 = alloca i1, i1 0
-  %nop14655 = alloca i1, i1 0
-  %nop14656 = alloca i1, i1 0
-  %nop14657 = alloca i1, i1 0
-  %nop14658 = alloca i1, i1 0
-  %nop14659 = alloca i1, i1 0
-  %nop14660 = alloca i1, i1 0
-  %nop14661 = alloca i1, i1 0
-  %nop14662 = alloca i1, i1 0
-  %nop14663 = alloca i1, i1 0
-  %nop14664 = alloca i1, i1 0
-  %nop14665 = alloca i1, i1 0
-  %nop14666 = alloca i1, i1 0
-  %nop14667 = alloca i1, i1 0
-  %nop14668 = alloca i1, i1 0
-  %nop14669 = alloca i1, i1 0
-  %nop14670 = alloca i1, i1 0
-  %nop14671 = alloca i1, i1 0
-  %nop14672 = alloca i1, i1 0
-  %nop14673 = alloca i1, i1 0
-  %nop14674 = alloca i1, i1 0
-  %nop14675 = alloca i1, i1 0
-  %nop14676 = alloca i1, i1 0
-  %nop14677 = alloca i1, i1 0
-  %nop14678 = alloca i1, i1 0
-  %nop14679 = alloca i1, i1 0
-  %nop14680 = alloca i1, i1 0
-  %nop14681 = alloca i1, i1 0
-  %nop14682 = alloca i1, i1 0
-  %nop14683 = alloca i1, i1 0
-  %nop14684 = alloca i1, i1 0
-  %nop14685 = alloca i1, i1 0
-  %nop14686 = alloca i1, i1 0
-  %nop14687 = alloca i1, i1 0
-  %nop14688 = alloca i1, i1 0
-  %nop14689 = alloca i1, i1 0
-  %nop14690 = alloca i1, i1 0
-  %nop14691 = alloca i1, i1 0
-  %nop14692 = alloca i1, i1 0
-  %nop14693 = alloca i1, i1 0
-  %nop14694 = alloca i1, i1 0
-  %nop14695 = alloca i1, i1 0
-  %nop14696 = alloca i1, i1 0
-  %nop14697 = alloca i1, i1 0
-  %nop14698 = alloca i1, i1 0
-  %nop14699 = alloca i1, i1 0
-  %nop14700 = alloca i1, i1 0
-  %nop14701 = alloca i1, i1 0
-  %nop14702 = alloca i1, i1 0
-  %nop14703 = alloca i1, i1 0
-  %nop14704 = alloca i1, i1 0
-  %nop14705 = alloca i1, i1 0
-  %nop14706 = alloca i1, i1 0
-  %nop14707 = alloca i1, i1 0
-  %nop14708 = alloca i1, i1 0
-  %nop14709 = alloca i1, i1 0
-  %nop14710 = alloca i1, i1 0
-  %nop14711 = alloca i1, i1 0
-  %nop14712 = alloca i1, i1 0
-  %nop14713 = alloca i1, i1 0
-  %nop14714 = alloca i1, i1 0
-  %nop14715 = alloca i1, i1 0
-  %nop14716 = alloca i1, i1 0
-  %nop14717 = alloca i1, i1 0
-  %nop14718 = alloca i1, i1 0
-  %nop14719 = alloca i1, i1 0
-  %nop14720 = alloca i1, i1 0
-  %nop14721 = alloca i1, i1 0
-  %nop14722 = alloca i1, i1 0
-  %nop14723 = alloca i1, i1 0
-  %nop14724 = alloca i1, i1 0
-  %nop14725 = alloca i1, i1 0
-  %nop14726 = alloca i1, i1 0
-  %nop14727 = alloca i1, i1 0
-  %nop14728 = alloca i1, i1 0
-  %nop14729 = alloca i1, i1 0
-  %nop14730 = alloca i1, i1 0
-  %nop14731 = alloca i1, i1 0
-  %nop14732 = alloca i1, i1 0
-  %nop14733 = alloca i1, i1 0
-  %nop14734 = alloca i1, i1 0
-  %nop14735 = alloca i1, i1 0
-  %nop14736 = alloca i1, i1 0
-  %nop14737 = alloca i1, i1 0
-  %nop14738 = alloca i1, i1 0
-  %nop14739 = alloca i1, i1 0
-  %nop14740 = alloca i1, i1 0
-  %nop14741 = alloca i1, i1 0
-  %nop14742 = alloca i1, i1 0
-  %nop14743 = alloca i1, i1 0
-  %nop14744 = alloca i1, i1 0
-  %nop14745 = alloca i1, i1 0
-  %nop14746 = alloca i1, i1 0
-  %nop14747 = alloca i1, i1 0
-  %nop14748 = alloca i1, i1 0
-  %nop14749 = alloca i1, i1 0
-  %nop14750 = alloca i1, i1 0
-  %nop14751 = alloca i1, i1 0
-  %nop14752 = alloca i1, i1 0
-  %nop14753 = alloca i1, i1 0
-  %nop14754 = alloca i1, i1 0
-  %nop14755 = alloca i1, i1 0
-  %nop14756 = alloca i1, i1 0
-  %nop14757 = alloca i1, i1 0
-  %nop14758 = alloca i1, i1 0
-  %nop14759 = alloca i1, i1 0
-  %nop14760 = alloca i1, i1 0
-  %nop14761 = alloca i1, i1 0
-  %nop14762 = alloca i1, i1 0
-  %nop14763 = alloca i1, i1 0
-  %nop14764 = alloca i1, i1 0
-  %nop14765 = alloca i1, i1 0
-  %nop14766 = alloca i1, i1 0
-  %nop14767 = alloca i1, i1 0
-  %nop14768 = alloca i1, i1 0
-  %nop14769 = alloca i1, i1 0
-  %nop14770 = alloca i1, i1 0
-  %nop14771 = alloca i1, i1 0
-  %nop14772 = alloca i1, i1 0
-  %nop14773 = alloca i1, i1 0
-  %nop14774 = alloca i1, i1 0
-  %nop14775 = alloca i1, i1 0
-  %nop14776 = alloca i1, i1 0
-  %nop14777 = alloca i1, i1 0
-  %nop14778 = alloca i1, i1 0
-  %nop14779 = alloca i1, i1 0
-  %nop14780 = alloca i1, i1 0
-  %nop14781 = alloca i1, i1 0
-  %nop14782 = alloca i1, i1 0
-  %nop14783 = alloca i1, i1 0
-  %nop14784 = alloca i1, i1 0
-  %nop14785 = alloca i1, i1 0
-  %nop14786 = alloca i1, i1 0
-  %nop14787 = alloca i1, i1 0
-  %nop14788 = alloca i1, i1 0
-  %nop14789 = alloca i1, i1 0
-  %nop14790 = alloca i1, i1 0
-  %nop14791 = alloca i1, i1 0
-  %nop14792 = alloca i1, i1 0
-  %nop14793 = alloca i1, i1 0
-  %nop14794 = alloca i1, i1 0
-  %nop14795 = alloca i1, i1 0
-  %nop14796 = alloca i1, i1 0
-  %nop14797 = alloca i1, i1 0
-  %nop14798 = alloca i1, i1 0
-  %nop14799 = alloca i1, i1 0
-  %nop14800 = alloca i1, i1 0
-  %nop14801 = alloca i1, i1 0
-  %nop14802 = alloca i1, i1 0
-  %nop14803 = alloca i1, i1 0
-  %nop14804 = alloca i1, i1 0
-  %nop14805 = alloca i1, i1 0
-  %nop14806 = alloca i1, i1 0
-  %nop14807 = alloca i1, i1 0
-  %nop14808 = alloca i1, i1 0
-  %nop14809 = alloca i1, i1 0
-  %nop14810 = alloca i1, i1 0
-  %nop14811 = alloca i1, i1 0
-  %nop14812 = alloca i1, i1 0
-  %nop14813 = alloca i1, i1 0
-  %nop14814 = alloca i1, i1 0
-  %nop14815 = alloca i1, i1 0
-  %nop14816 = alloca i1, i1 0
-  %nop14817 = alloca i1, i1 0
-  %nop14818 = alloca i1, i1 0
-  %nop14819 = alloca i1, i1 0
-  %nop14820 = alloca i1, i1 0
-  %nop14821 = alloca i1, i1 0
-  %nop14822 = alloca i1, i1 0
-  %nop14823 = alloca i1, i1 0
-  %nop14824 = alloca i1, i1 0
-  %nop14825 = alloca i1, i1 0
-  %nop14826 = alloca i1, i1 0
-  %nop14827 = alloca i1, i1 0
-  %nop14828 = alloca i1, i1 0
-  %nop14829 = alloca i1, i1 0
-  %nop14830 = alloca i1, i1 0
-  %nop14831 = alloca i1, i1 0
-  %nop14832 = alloca i1, i1 0
-  %nop14833 = alloca i1, i1 0
-  %nop14834 = alloca i1, i1 0
-  %nop14835 = alloca i1, i1 0
-  %nop14836 = alloca i1, i1 0
-  %nop14837 = alloca i1, i1 0
-  %nop14838 = alloca i1, i1 0
-  %nop14839 = alloca i1, i1 0
-  %nop14840 = alloca i1, i1 0
-  %nop14841 = alloca i1, i1 0
-  %nop14842 = alloca i1, i1 0
-  %nop14843 = alloca i1, i1 0
-  %nop14844 = alloca i1, i1 0
-  %nop14845 = alloca i1, i1 0
-  %nop14846 = alloca i1, i1 0
-  %nop14847 = alloca i1, i1 0
-  %nop14848 = alloca i1, i1 0
-  %nop14849 = alloca i1, i1 0
-  %nop14850 = alloca i1, i1 0
-  %nop14851 = alloca i1, i1 0
-  %nop14852 = alloca i1, i1 0
-  %nop14853 = alloca i1, i1 0
-  %nop14854 = alloca i1, i1 0
-  %nop14855 = alloca i1, i1 0
-  %nop14856 = alloca i1, i1 0
-  %nop14857 = alloca i1, i1 0
-  %nop14858 = alloca i1, i1 0
-  %nop14859 = alloca i1, i1 0
-  %nop14860 = alloca i1, i1 0
-  %nop14861 = alloca i1, i1 0
-  %nop14862 = alloca i1, i1 0
-  %nop14863 = alloca i1, i1 0
-  %nop14864 = alloca i1, i1 0
-  %nop14865 = alloca i1, i1 0
-  %nop14866 = alloca i1, i1 0
-  %nop14867 = alloca i1, i1 0
-  %nop14868 = alloca i1, i1 0
-  %nop14869 = alloca i1, i1 0
-  %nop14870 = alloca i1, i1 0
-  %nop14871 = alloca i1, i1 0
-  %nop14872 = alloca i1, i1 0
-  %nop14873 = alloca i1, i1 0
-  %nop14874 = alloca i1, i1 0
-  %nop14875 = alloca i1, i1 0
-  %nop14876 = alloca i1, i1 0
-  %nop14877 = alloca i1, i1 0
-  %nop14878 = alloca i1, i1 0
-  %nop14879 = alloca i1, i1 0
-  %nop14880 = alloca i1, i1 0
-  %nop14881 = alloca i1, i1 0
-  %nop14882 = alloca i1, i1 0
-  %nop14883 = alloca i1, i1 0
-  %nop14884 = alloca i1, i1 0
-  %nop14885 = alloca i1, i1 0
-  %nop14886 = alloca i1, i1 0
-  %nop14887 = alloca i1, i1 0
-  %nop14888 = alloca i1, i1 0
-  %nop14889 = alloca i1, i1 0
-  %nop14890 = alloca i1, i1 0
-  %nop14891 = alloca i1, i1 0
-  %nop14892 = alloca i1, i1 0
-  %nop14893 = alloca i1, i1 0
-  %nop14894 = alloca i1, i1 0
-  %nop14895 = alloca i1, i1 0
-  %nop14896 = alloca i1, i1 0
-  %nop14897 = alloca i1, i1 0
-  %nop14898 = alloca i1, i1 0
-  %nop14899 = alloca i1, i1 0
-  %nop14900 = alloca i1, i1 0
-  %nop14901 = alloca i1, i1 0
-  %nop14902 = alloca i1, i1 0
-  %nop14903 = alloca i1, i1 0
-  %nop14904 = alloca i1, i1 0
-  %nop14905 = alloca i1, i1 0
-  %nop14906 = alloca i1, i1 0
-  %nop14907 = alloca i1, i1 0
-  %nop14908 = alloca i1, i1 0
-  %nop14909 = alloca i1, i1 0
-  %nop14910 = alloca i1, i1 0
-  %nop14911 = alloca i1, i1 0
-  %nop14912 = alloca i1, i1 0
-  %nop14913 = alloca i1, i1 0
-  %nop14914 = alloca i1, i1 0
-  %nop14915 = alloca i1, i1 0
-  %nop14916 = alloca i1, i1 0
-  %nop14917 = alloca i1, i1 0
-  %nop14918 = alloca i1, i1 0
-  %nop14919 = alloca i1, i1 0
-  %nop14920 = alloca i1, i1 0
-  %nop14921 = alloca i1, i1 0
-  %nop14922 = alloca i1, i1 0
-  %nop14923 = alloca i1, i1 0
-  %nop14924 = alloca i1, i1 0
-  %nop14925 = alloca i1, i1 0
-  %nop14926 = alloca i1, i1 0
-  %nop14927 = alloca i1, i1 0
-  %nop14928 = alloca i1, i1 0
-  %nop14929 = alloca i1, i1 0
-  %nop14930 = alloca i1, i1 0
-  %nop14931 = alloca i1, i1 0
-  %nop14932 = alloca i1, i1 0
-  %nop14933 = alloca i1, i1 0
-  %nop14934 = alloca i1, i1 0
-  %nop14935 = alloca i1, i1 0
-  %nop14936 = alloca i1, i1 0
-  %nop14937 = alloca i1, i1 0
-  %nop14938 = alloca i1, i1 0
-  %nop14939 = alloca i1, i1 0
-  %nop14940 = alloca i1, i1 0
-  %nop14941 = alloca i1, i1 0
-  %nop14942 = alloca i1, i1 0
-  %nop14943 = alloca i1, i1 0
-  %nop14944 = alloca i1, i1 0
-  %nop14945 = alloca i1, i1 0
-  %nop14946 = alloca i1, i1 0
-  %nop14947 = alloca i1, i1 0
-  %nop14948 = alloca i1, i1 0
-  %nop14949 = alloca i1, i1 0
-  %nop14950 = alloca i1, i1 0
-  %nop14951 = alloca i1, i1 0
-  %nop14952 = alloca i1, i1 0
-  %nop14953 = alloca i1, i1 0
-  %nop14954 = alloca i1, i1 0
-  %nop14955 = alloca i1, i1 0
-  %nop14956 = alloca i1, i1 0
-  %nop14957 = alloca i1, i1 0
-  %nop14958 = alloca i1, i1 0
-  %nop14959 = alloca i1, i1 0
-  %nop14960 = alloca i1, i1 0
-  %nop14961 = alloca i1, i1 0
-  %nop14962 = alloca i1, i1 0
-  %nop14963 = alloca i1, i1 0
-  %nop14964 = alloca i1, i1 0
-  %nop14965 = alloca i1, i1 0
-  %nop14966 = alloca i1, i1 0
-  %nop14967 = alloca i1, i1 0
-  %nop14968 = alloca i1, i1 0
-  %nop14969 = alloca i1, i1 0
-  %nop14970 = alloca i1, i1 0
-  %nop14971 = alloca i1, i1 0
-  %nop14972 = alloca i1, i1 0
-  %nop14973 = alloca i1, i1 0
-  %nop14974 = alloca i1, i1 0
-  %nop14975 = alloca i1, i1 0
-  %nop14976 = alloca i1, i1 0
-  %nop14977 = alloca i1, i1 0
-  %nop14978 = alloca i1, i1 0
-  %nop14979 = alloca i1, i1 0
-  %nop14980 = alloca i1, i1 0
-  %nop14981 = alloca i1, i1 0
-  %nop14982 = alloca i1, i1 0
-  %nop14983 = alloca i1, i1 0
-  %nop14984 = alloca i1, i1 0
-  %nop14985 = alloca i1, i1 0
-  %nop14986 = alloca i1, i1 0
-  %nop14987 = alloca i1, i1 0
-  %nop14988 = alloca i1, i1 0
-  %nop14989 = alloca i1, i1 0
-  %nop14990 = alloca i1, i1 0
-  %nop14991 = alloca i1, i1 0
-  %nop14992 = alloca i1, i1 0
-  %nop14993 = alloca i1, i1 0
-  %nop14994 = alloca i1, i1 0
-  %nop14995 = alloca i1, i1 0
-  %nop14996 = alloca i1, i1 0
-  %nop14997 = alloca i1, i1 0
-  %nop14998 = alloca i1, i1 0
-  %nop14999 = alloca i1, i1 0
-  %nop15000 = alloca i1, i1 0
-  %nop15001 = alloca i1, i1 0
-  %nop15002 = alloca i1, i1 0
-  %nop15003 = alloca i1, i1 0
-  %nop15004 = alloca i1, i1 0
-  %nop15005 = alloca i1, i1 0
-  %nop15006 = alloca i1, i1 0
-  %nop15007 = alloca i1, i1 0
-  %nop15008 = alloca i1, i1 0
-  %nop15009 = alloca i1, i1 0
-  %nop15010 = alloca i1, i1 0
-  %nop15011 = alloca i1, i1 0
-  %nop15012 = alloca i1, i1 0
-  %nop15013 = alloca i1, i1 0
-  %nop15014 = alloca i1, i1 0
-  %nop15015 = alloca i1, i1 0
-  %nop15016 = alloca i1, i1 0
-  %nop15017 = alloca i1, i1 0
-  %nop15018 = alloca i1, i1 0
-  %nop15019 = alloca i1, i1 0
-  %nop15020 = alloca i1, i1 0
-  %nop15021 = alloca i1, i1 0
-  %nop15022 = alloca i1, i1 0
-  %nop15023 = alloca i1, i1 0
-  %nop15024 = alloca i1, i1 0
-  %nop15025 = alloca i1, i1 0
-  %nop15026 = alloca i1, i1 0
-  %nop15027 = alloca i1, i1 0
-  %nop15028 = alloca i1, i1 0
-  %nop15029 = alloca i1, i1 0
-  %nop15030 = alloca i1, i1 0
-  %nop15031 = alloca i1, i1 0
-  %nop15032 = alloca i1, i1 0
-  %nop15033 = alloca i1, i1 0
-  %nop15034 = alloca i1, i1 0
-  %nop15035 = alloca i1, i1 0
-  %nop15036 = alloca i1, i1 0
-  %nop15037 = alloca i1, i1 0
-  %nop15038 = alloca i1, i1 0
-  %nop15039 = alloca i1, i1 0
-  %nop15040 = alloca i1, i1 0
-  %nop15041 = alloca i1, i1 0
-  %nop15042 = alloca i1, i1 0
-  %nop15043 = alloca i1, i1 0
-  %nop15044 = alloca i1, i1 0
-  %nop15045 = alloca i1, i1 0
-  %nop15046 = alloca i1, i1 0
-  %nop15047 = alloca i1, i1 0
-  %nop15048 = alloca i1, i1 0
-  %nop15049 = alloca i1, i1 0
-  %nop15050 = alloca i1, i1 0
-  %nop15051 = alloca i1, i1 0
-  %nop15052 = alloca i1, i1 0
-  %nop15053 = alloca i1, i1 0
-  %nop15054 = alloca i1, i1 0
-  %nop15055 = alloca i1, i1 0
-  %nop15056 = alloca i1, i1 0
-  %nop15057 = alloca i1, i1 0
-  %nop15058 = alloca i1, i1 0
-  %nop15059 = alloca i1, i1 0
-  %nop15060 = alloca i1, i1 0
-  %nop15061 = alloca i1, i1 0
-  %nop15062 = alloca i1, i1 0
-  %nop15063 = alloca i1, i1 0
-  %nop15064 = alloca i1, i1 0
-  %nop15065 = alloca i1, i1 0
-  %nop15066 = alloca i1, i1 0
-  %nop15067 = alloca i1, i1 0
-  %nop15068 = alloca i1, i1 0
-  %nop15069 = alloca i1, i1 0
-  %nop15070 = alloca i1, i1 0
-  %nop15071 = alloca i1, i1 0
-  %nop15072 = alloca i1, i1 0
-  %nop15073 = alloca i1, i1 0
-  %nop15074 = alloca i1, i1 0
-  %nop15075 = alloca i1, i1 0
-  %nop15076 = alloca i1, i1 0
-  %nop15077 = alloca i1, i1 0
-  %nop15078 = alloca i1, i1 0
-  %nop15079 = alloca i1, i1 0
-  %nop15080 = alloca i1, i1 0
-  %nop15081 = alloca i1, i1 0
-  %nop15082 = alloca i1, i1 0
-  %nop15083 = alloca i1, i1 0
-  %nop15084 = alloca i1, i1 0
-  %nop15085 = alloca i1, i1 0
-  %nop15086 = alloca i1, i1 0
-  %nop15087 = alloca i1, i1 0
-  %nop15088 = alloca i1, i1 0
-  %nop15089 = alloca i1, i1 0
-  %nop15090 = alloca i1, i1 0
-  %nop15091 = alloca i1, i1 0
-  %nop15092 = alloca i1, i1 0
-  %nop15093 = alloca i1, i1 0
-  %nop15094 = alloca i1, i1 0
-  %nop15095 = alloca i1, i1 0
-  %nop15096 = alloca i1, i1 0
-  %nop15097 = alloca i1, i1 0
-  %nop15098 = alloca i1, i1 0
-  %nop15099 = alloca i1, i1 0
-  %nop15100 = alloca i1, i1 0
-  %nop15101 = alloca i1, i1 0
-  %nop15102 = alloca i1, i1 0
-  %nop15103 = alloca i1, i1 0
-  %nop15104 = alloca i1, i1 0
-  %nop15105 = alloca i1, i1 0
-  %nop15106 = alloca i1, i1 0
-  %nop15107 = alloca i1, i1 0
-  %nop15108 = alloca i1, i1 0
-  %nop15109 = alloca i1, i1 0
-  %nop15110 = alloca i1, i1 0
-  %nop15111 = alloca i1, i1 0
-  %nop15112 = alloca i1, i1 0
-  %nop15113 = alloca i1, i1 0
-  %nop15114 = alloca i1, i1 0
-  %nop15115 = alloca i1, i1 0
-  %nop15116 = alloca i1, i1 0
-  %nop15117 = alloca i1, i1 0
-  %nop15118 = alloca i1, i1 0
-  %nop15119 = alloca i1, i1 0
-  %nop15120 = alloca i1, i1 0
-  %nop15121 = alloca i1, i1 0
-  %nop15122 = alloca i1, i1 0
-  %nop15123 = alloca i1, i1 0
-  %nop15124 = alloca i1, i1 0
-  %nop15125 = alloca i1, i1 0
-  %nop15126 = alloca i1, i1 0
-  %nop15127 = alloca i1, i1 0
-  %nop15128 = alloca i1, i1 0
-  %nop15129 = alloca i1, i1 0
-  %nop15130 = alloca i1, i1 0
-  %nop15131 = alloca i1, i1 0
-  %nop15132 = alloca i1, i1 0
-  %nop15133 = alloca i1, i1 0
-  %nop15134 = alloca i1, i1 0
-  %nop15135 = alloca i1, i1 0
-  %nop15136 = alloca i1, i1 0
-  %nop15137 = alloca i1, i1 0
-  %nop15138 = alloca i1, i1 0
-  %nop15139 = alloca i1, i1 0
-  %nop15140 = alloca i1, i1 0
-  %nop15141 = alloca i1, i1 0
-  %nop15142 = alloca i1, i1 0
-  %nop15143 = alloca i1, i1 0
-  %nop15144 = alloca i1, i1 0
-  %nop15145 = alloca i1, i1 0
-  %nop15146 = alloca i1, i1 0
-  %nop15147 = alloca i1, i1 0
-  %nop15148 = alloca i1, i1 0
-  %nop15149 = alloca i1, i1 0
-  %nop15150 = alloca i1, i1 0
-  %nop15151 = alloca i1, i1 0
-  %nop15152 = alloca i1, i1 0
-  %nop15153 = alloca i1, i1 0
-  %nop15154 = alloca i1, i1 0
-  %nop15155 = alloca i1, i1 0
-  %nop15156 = alloca i1, i1 0
-  %nop15157 = alloca i1, i1 0
-  %nop15158 = alloca i1, i1 0
-  %nop15159 = alloca i1, i1 0
-  %nop15160 = alloca i1, i1 0
-  %nop15161 = alloca i1, i1 0
-  %nop15162 = alloca i1, i1 0
-  %nop15163 = alloca i1, i1 0
-  %nop15164 = alloca i1, i1 0
-  %nop15165 = alloca i1, i1 0
-  %nop15166 = alloca i1, i1 0
-  %nop15167 = alloca i1, i1 0
-  %nop15168 = alloca i1, i1 0
-  %nop15169 = alloca i1, i1 0
-  %nop15170 = alloca i1, i1 0
-  %nop15171 = alloca i1, i1 0
-  %nop15172 = alloca i1, i1 0
-  %nop15173 = alloca i1, i1 0
-  %nop15174 = alloca i1, i1 0
-  %nop15175 = alloca i1, i1 0
-  %nop15176 = alloca i1, i1 0
-  %nop15177 = alloca i1, i1 0
-  %nop15178 = alloca i1, i1 0
-  %nop15179 = alloca i1, i1 0
-  %nop15180 = alloca i1, i1 0
-  %nop15181 = alloca i1, i1 0
-  %nop15182 = alloca i1, i1 0
-  %nop15183 = alloca i1, i1 0
-  %nop15184 = alloca i1, i1 0
-  %nop15185 = alloca i1, i1 0
-  %nop15186 = alloca i1, i1 0
-  %nop15187 = alloca i1, i1 0
-  %nop15188 = alloca i1, i1 0
-  %nop15189 = alloca i1, i1 0
-  %nop15190 = alloca i1, i1 0
-  %nop15191 = alloca i1, i1 0
-  %nop15192 = alloca i1, i1 0
-  %nop15193 = alloca i1, i1 0
-  %nop15194 = alloca i1, i1 0
-  %nop15195 = alloca i1, i1 0
-  %nop15196 = alloca i1, i1 0
-  %nop15197 = alloca i1, i1 0
-  %nop15198 = alloca i1, i1 0
-  %nop15199 = alloca i1, i1 0
-  %nop15200 = alloca i1, i1 0
-  %nop15201 = alloca i1, i1 0
-  %nop15202 = alloca i1, i1 0
-  %nop15203 = alloca i1, i1 0
-  %nop15204 = alloca i1, i1 0
-  %nop15205 = alloca i1, i1 0
-  %nop15206 = alloca i1, i1 0
-  %nop15207 = alloca i1, i1 0
-  %nop15208 = alloca i1, i1 0
-  %nop15209 = alloca i1, i1 0
-  %nop15210 = alloca i1, i1 0
-  %nop15211 = alloca i1, i1 0
-  %nop15212 = alloca i1, i1 0
-  %nop15213 = alloca i1, i1 0
-  %nop15214 = alloca i1, i1 0
-  %nop15215 = alloca i1, i1 0
-  %nop15216 = alloca i1, i1 0
-  %nop15217 = alloca i1, i1 0
-  %nop15218 = alloca i1, i1 0
-  %nop15219 = alloca i1, i1 0
-  %nop15220 = alloca i1, i1 0
-  %nop15221 = alloca i1, i1 0
-  %nop15222 = alloca i1, i1 0
-  %nop15223 = alloca i1, i1 0
-  %nop15224 = alloca i1, i1 0
-  %nop15225 = alloca i1, i1 0
-  %nop15226 = alloca i1, i1 0
-  %nop15227 = alloca i1, i1 0
-  %nop15228 = alloca i1, i1 0
-  %nop15229 = alloca i1, i1 0
-  %nop15230 = alloca i1, i1 0
-  %nop15231 = alloca i1, i1 0
-  %nop15232 = alloca i1, i1 0
-  %nop15233 = alloca i1, i1 0
-  %nop15234 = alloca i1, i1 0
-  %nop15235 = alloca i1, i1 0
-  %nop15236 = alloca i1, i1 0
-  %nop15237 = alloca i1, i1 0
-  %nop15238 = alloca i1, i1 0
-  %nop15239 = alloca i1, i1 0
-  %nop15240 = alloca i1, i1 0
-  %nop15241 = alloca i1, i1 0
-  %nop15242 = alloca i1, i1 0
-  %nop15243 = alloca i1, i1 0
-  %nop15244 = alloca i1, i1 0
-  %nop15245 = alloca i1, i1 0
-  %nop15246 = alloca i1, i1 0
-  %nop15247 = alloca i1, i1 0
-  %nop15248 = alloca i1, i1 0
-  %nop15249 = alloca i1, i1 0
-  %nop15250 = alloca i1, i1 0
-  %nop15251 = alloca i1, i1 0
-  %nop15252 = alloca i1, i1 0
-  %nop15253 = alloca i1, i1 0
-  %nop15254 = alloca i1, i1 0
-  %nop15255 = alloca i1, i1 0
-  %nop15256 = alloca i1, i1 0
-  %nop15257 = alloca i1, i1 0
-  %nop15258 = alloca i1, i1 0
-  %nop15259 = alloca i1, i1 0
-  %nop15260 = alloca i1, i1 0
-  %nop15261 = alloca i1, i1 0
-  %nop15262 = alloca i1, i1 0
-  %nop15263 = alloca i1, i1 0
-  %nop15264 = alloca i1, i1 0
-  %nop15265 = alloca i1, i1 0
-  %nop15266 = alloca i1, i1 0
-  %nop15267 = alloca i1, i1 0
-  %nop15268 = alloca i1, i1 0
-  %nop15269 = alloca i1, i1 0
-  %nop15270 = alloca i1, i1 0
-  %nop15271 = alloca i1, i1 0
-  %nop15272 = alloca i1, i1 0
-  %nop15273 = alloca i1, i1 0
-  %nop15274 = alloca i1, i1 0
-  %nop15275 = alloca i1, i1 0
-  %nop15276 = alloca i1, i1 0
-  %nop15277 = alloca i1, i1 0
-  %nop15278 = alloca i1, i1 0
-  %nop15279 = alloca i1, i1 0
-  %nop15280 = alloca i1, i1 0
-  %nop15281 = alloca i1, i1 0
-  %nop15282 = alloca i1, i1 0
-  %nop15283 = alloca i1, i1 0
-  %nop15284 = alloca i1, i1 0
-  %nop15285 = alloca i1, i1 0
-  %nop15286 = alloca i1, i1 0
-  %nop15287 = alloca i1, i1 0
-  %nop15288 = alloca i1, i1 0
-  %nop15289 = alloca i1, i1 0
-  %nop15290 = alloca i1, i1 0
-  %nop15291 = alloca i1, i1 0
-  %nop15292 = alloca i1, i1 0
-  %nop15293 = alloca i1, i1 0
-  %nop15294 = alloca i1, i1 0
-  %nop15295 = alloca i1, i1 0
-  %nop15296 = alloca i1, i1 0
-  %nop15297 = alloca i1, i1 0
-  %nop15298 = alloca i1, i1 0
-  %nop15299 = alloca i1, i1 0
-  %nop15300 = alloca i1, i1 0
-  %nop15301 = alloca i1, i1 0
-  %nop15302 = alloca i1, i1 0
-  %nop15303 = alloca i1, i1 0
-  %nop15304 = alloca i1, i1 0
-  %nop15305 = alloca i1, i1 0
-  %nop15306 = alloca i1, i1 0
-  %nop15307 = alloca i1, i1 0
-  %nop15308 = alloca i1, i1 0
-  %nop15309 = alloca i1, i1 0
-  %nop15310 = alloca i1, i1 0
-  %nop15311 = alloca i1, i1 0
-  %nop15312 = alloca i1, i1 0
-  %nop15313 = alloca i1, i1 0
-  %nop15314 = alloca i1, i1 0
-  %nop15315 = alloca i1, i1 0
-  %nop15316 = alloca i1, i1 0
-  %nop15317 = alloca i1, i1 0
-  %nop15318 = alloca i1, i1 0
-  %nop15319 = alloca i1, i1 0
-  %nop15320 = alloca i1, i1 0
-  %nop15321 = alloca i1, i1 0
-  %nop15322 = alloca i1, i1 0
-  %nop15323 = alloca i1, i1 0
-  %nop15324 = alloca i1, i1 0
-  %nop15325 = alloca i1, i1 0
-  %nop15326 = alloca i1, i1 0
-  %nop15327 = alloca i1, i1 0
-  %nop15328 = alloca i1, i1 0
-  %nop15329 = alloca i1, i1 0
-  %nop15330 = alloca i1, i1 0
-  %nop15331 = alloca i1, i1 0
-  %nop15332 = alloca i1, i1 0
-  %nop15333 = alloca i1, i1 0
-  %nop15334 = alloca i1, i1 0
-  %nop15335 = alloca i1, i1 0
-  %nop15336 = alloca i1, i1 0
-  %nop15337 = alloca i1, i1 0
-  %nop15338 = alloca i1, i1 0
-  %nop15339 = alloca i1, i1 0
-  %nop15340 = alloca i1, i1 0
-  %nop15341 = alloca i1, i1 0
-  %nop15342 = alloca i1, i1 0
-  %nop15343 = alloca i1, i1 0
-  %nop15344 = alloca i1, i1 0
-  %nop15345 = alloca i1, i1 0
-  %nop15346 = alloca i1, i1 0
-  %nop15347 = alloca i1, i1 0
-  %nop15348 = alloca i1, i1 0
-  %nop15349 = alloca i1, i1 0
-  %nop15350 = alloca i1, i1 0
-  %nop15351 = alloca i1, i1 0
-  %nop15352 = alloca i1, i1 0
-  %nop15353 = alloca i1, i1 0
-  %nop15354 = alloca i1, i1 0
-  %nop15355 = alloca i1, i1 0
-  %nop15356 = alloca i1, i1 0
-  %nop15357 = alloca i1, i1 0
-  %nop15358 = alloca i1, i1 0
-  %nop15359 = alloca i1, i1 0
-  %nop15360 = alloca i1, i1 0
-  %nop15361 = alloca i1, i1 0
-  %nop15362 = alloca i1, i1 0
-  %nop15363 = alloca i1, i1 0
-  %nop15364 = alloca i1, i1 0
-  %nop15365 = alloca i1, i1 0
-  %nop15366 = alloca i1, i1 0
-  %nop15367 = alloca i1, i1 0
-  %nop15368 = alloca i1, i1 0
-  %nop15369 = alloca i1, i1 0
-  %nop15370 = alloca i1, i1 0
-  %nop15371 = alloca i1, i1 0
-  %nop15372 = alloca i1, i1 0
-  %nop15373 = alloca i1, i1 0
-  %nop15374 = alloca i1, i1 0
-  %nop15375 = alloca i1, i1 0
-  %nop15376 = alloca i1, i1 0
-  %nop15377 = alloca i1, i1 0
-  %nop15378 = alloca i1, i1 0
-  %nop15379 = alloca i1, i1 0
-  %nop15380 = alloca i1, i1 0
-  %nop15381 = alloca i1, i1 0
-  %nop15382 = alloca i1, i1 0
-  %nop15383 = alloca i1, i1 0
-  %nop15384 = alloca i1, i1 0
-  %nop15385 = alloca i1, i1 0
-  %nop15386 = alloca i1, i1 0
-  %nop15387 = alloca i1, i1 0
-  %nop15388 = alloca i1, i1 0
-  %nop15389 = alloca i1, i1 0
-  %nop15390 = alloca i1, i1 0
-  %nop15391 = alloca i1, i1 0
-  %nop15392 = alloca i1, i1 0
-  %nop15393 = alloca i1, i1 0
-  %nop15394 = alloca i1, i1 0
-  %nop15395 = alloca i1, i1 0
-  %nop15396 = alloca i1, i1 0
-  %nop15397 = alloca i1, i1 0
-  %nop15398 = alloca i1, i1 0
-  %nop15399 = alloca i1, i1 0
-  %nop15400 = alloca i1, i1 0
-  %nop15401 = alloca i1, i1 0
-  %nop15402 = alloca i1, i1 0
-  %nop15403 = alloca i1, i1 0
-  %nop15404 = alloca i1, i1 0
-  %nop15405 = alloca i1, i1 0
-  %nop15406 = alloca i1, i1 0
-  %nop15407 = alloca i1, i1 0
-  %nop15408 = alloca i1, i1 0
-  %nop15409 = alloca i1, i1 0
-  %nop15410 = alloca i1, i1 0
-  %nop15411 = alloca i1, i1 0
-  %nop15412 = alloca i1, i1 0
-  %nop15413 = alloca i1, i1 0
-  %nop15414 = alloca i1, i1 0
-  %nop15415 = alloca i1, i1 0
-  %nop15416 = alloca i1, i1 0
-  %nop15417 = alloca i1, i1 0
-  %nop15418 = alloca i1, i1 0
-  %nop15419 = alloca i1, i1 0
-  %nop15420 = alloca i1, i1 0
-  %nop15421 = alloca i1, i1 0
-  %nop15422 = alloca i1, i1 0
-  %nop15423 = alloca i1, i1 0
-  %nop15424 = alloca i1, i1 0
-  %nop15425 = alloca i1, i1 0
-  %nop15426 = alloca i1, i1 0
-  %nop15427 = alloca i1, i1 0
-  %nop15428 = alloca i1, i1 0
-  %nop15429 = alloca i1, i1 0
-  %nop15430 = alloca i1, i1 0
-  %nop15431 = alloca i1, i1 0
-  %nop15432 = alloca i1, i1 0
-  %nop15433 = alloca i1, i1 0
-  %nop15434 = alloca i1, i1 0
-  %nop15435 = alloca i1, i1 0
-  %nop15436 = alloca i1, i1 0
-  %nop15437 = alloca i1, i1 0
-  %nop15438 = alloca i1, i1 0
-  %nop15439 = alloca i1, i1 0
-  %nop15440 = alloca i1, i1 0
-  %nop15441 = alloca i1, i1 0
-  %nop15442 = alloca i1, i1 0
-  %nop15443 = alloca i1, i1 0
-  %nop15444 = alloca i1, i1 0
-  %nop15445 = alloca i1, i1 0
-  %nop15446 = alloca i1, i1 0
-  %nop15447 = alloca i1, i1 0
-  %nop15448 = alloca i1, i1 0
-  %nop15449 = alloca i1, i1 0
-  %nop15450 = alloca i1, i1 0
-  %nop15451 = alloca i1, i1 0
-  %nop15452 = alloca i1, i1 0
-  %nop15453 = alloca i1, i1 0
-  %nop15454 = alloca i1, i1 0
-  %nop15455 = alloca i1, i1 0
-  %nop15456 = alloca i1, i1 0
-  %nop15457 = alloca i1, i1 0
-  %nop15458 = alloca i1, i1 0
-  %nop15459 = alloca i1, i1 0
-  %nop15460 = alloca i1, i1 0
-  %nop15461 = alloca i1, i1 0
-  %nop15462 = alloca i1, i1 0
-  %nop15463 = alloca i1, i1 0
-  %nop15464 = alloca i1, i1 0
-  %nop15465 = alloca i1, i1 0
-  %nop15466 = alloca i1, i1 0
-  %nop15467 = alloca i1, i1 0
-  %nop15468 = alloca i1, i1 0
-  %nop15469 = alloca i1, i1 0
-  %nop15470 = alloca i1, i1 0
-  %nop15471 = alloca i1, i1 0
-  %nop15472 = alloca i1, i1 0
-  %nop15473 = alloca i1, i1 0
-  %nop15474 = alloca i1, i1 0
-  %nop15475 = alloca i1, i1 0
-  %nop15476 = alloca i1, i1 0
-  %nop15477 = alloca i1, i1 0
-  %nop15478 = alloca i1, i1 0
-  %nop15479 = alloca i1, i1 0
-  %nop15480 = alloca i1, i1 0
-  %nop15481 = alloca i1, i1 0
-  %nop15482 = alloca i1, i1 0
-  %nop15483 = alloca i1, i1 0
-  %nop15484 = alloca i1, i1 0
-  %nop15485 = alloca i1, i1 0
-  %nop15486 = alloca i1, i1 0
-  %nop15487 = alloca i1, i1 0
-  %nop15488 = alloca i1, i1 0
-  %nop15489 = alloca i1, i1 0
-  %nop15490 = alloca i1, i1 0
-  %nop15491 = alloca i1, i1 0
-  %nop15492 = alloca i1, i1 0
-  %nop15493 = alloca i1, i1 0
-  %nop15494 = alloca i1, i1 0
-  %nop15495 = alloca i1, i1 0
-  %nop15496 = alloca i1, i1 0
-  %nop15497 = alloca i1, i1 0
-  %nop15498 = alloca i1, i1 0
-  %nop15499 = alloca i1, i1 0
-  %nop15500 = alloca i1, i1 0
-  %nop15501 = alloca i1, i1 0
-  %nop15502 = alloca i1, i1 0
-  %nop15503 = alloca i1, i1 0
-  %nop15504 = alloca i1, i1 0
-  %nop15505 = alloca i1, i1 0
-  %nop15506 = alloca i1, i1 0
-  %nop15507 = alloca i1, i1 0
-  %nop15508 = alloca i1, i1 0
-  %nop15509 = alloca i1, i1 0
-  %nop15510 = alloca i1, i1 0
-  %nop15511 = alloca i1, i1 0
-  %nop15512 = alloca i1, i1 0
-  %nop15513 = alloca i1, i1 0
-  %nop15514 = alloca i1, i1 0
-  %nop15515 = alloca i1, i1 0
-  %nop15516 = alloca i1, i1 0
-  %nop15517 = alloca i1, i1 0
-  %nop15518 = alloca i1, i1 0
-  %nop15519 = alloca i1, i1 0
-  %nop15520 = alloca i1, i1 0
-  %nop15521 = alloca i1, i1 0
-  %nop15522 = alloca i1, i1 0
-  %nop15523 = alloca i1, i1 0
-  %nop15524 = alloca i1, i1 0
-  %nop15525 = alloca i1, i1 0
-  %nop15526 = alloca i1, i1 0
-  %nop15527 = alloca i1, i1 0
-  %nop15528 = alloca i1, i1 0
-  %nop15529 = alloca i1, i1 0
-  %nop15530 = alloca i1, i1 0
-  %nop15531 = alloca i1, i1 0
-  %nop15532 = alloca i1, i1 0
-  %nop15533 = alloca i1, i1 0
-  %nop15534 = alloca i1, i1 0
-  %nop15535 = alloca i1, i1 0
-  %nop15536 = alloca i1, i1 0
-  %nop15537 = alloca i1, i1 0
-  %nop15538 = alloca i1, i1 0
-  %nop15539 = alloca i1, i1 0
-  %nop15540 = alloca i1, i1 0
-  %nop15541 = alloca i1, i1 0
-  %nop15542 = alloca i1, i1 0
-  %nop15543 = alloca i1, i1 0
-  %nop15544 = alloca i1, i1 0
-  %nop15545 = alloca i1, i1 0
-  %nop15546 = alloca i1, i1 0
-  %nop15547 = alloca i1, i1 0
-  %nop15548 = alloca i1, i1 0
-  %nop15549 = alloca i1, i1 0
-  %nop15550 = alloca i1, i1 0
-  %nop15551 = alloca i1, i1 0
-  %nop15552 = alloca i1, i1 0
-  %nop15553 = alloca i1, i1 0
-  %nop15554 = alloca i1, i1 0
-  %nop15555 = alloca i1, i1 0
-  %nop15556 = alloca i1, i1 0
-  %nop15557 = alloca i1, i1 0
-  %nop15558 = alloca i1, i1 0
-  %nop15559 = alloca i1, i1 0
-  %nop15560 = alloca i1, i1 0
-  %nop15561 = alloca i1, i1 0
-  %nop15562 = alloca i1, i1 0
-  %nop15563 = alloca i1, i1 0
-  %nop15564 = alloca i1, i1 0
-  %nop15565 = alloca i1, i1 0
-  %nop15566 = alloca i1, i1 0
-  %nop15567 = alloca i1, i1 0
-  %nop15568 = alloca i1, i1 0
-  %nop15569 = alloca i1, i1 0
-  %nop15570 = alloca i1, i1 0
-  %nop15571 = alloca i1, i1 0
-  %nop15572 = alloca i1, i1 0
-  %nop15573 = alloca i1, i1 0
-  %nop15574 = alloca i1, i1 0
-  %nop15575 = alloca i1, i1 0
-  %nop15576 = alloca i1, i1 0
-  %nop15577 = alloca i1, i1 0
-  %nop15578 = alloca i1, i1 0
-  %nop15579 = alloca i1, i1 0
-  %nop15580 = alloca i1, i1 0
-  %nop15581 = alloca i1, i1 0
-  %nop15582 = alloca i1, i1 0
-  %nop15583 = alloca i1, i1 0
-  %nop15584 = alloca i1, i1 0
-  %nop15585 = alloca i1, i1 0
-  %nop15586 = alloca i1, i1 0
-  %nop15587 = alloca i1, i1 0
-  %nop15588 = alloca i1, i1 0
-  %nop15589 = alloca i1, i1 0
-  %nop15590 = alloca i1, i1 0
-  %nop15591 = alloca i1, i1 0
-  %nop15592 = alloca i1, i1 0
-  %nop15593 = alloca i1, i1 0
-  %nop15594 = alloca i1, i1 0
-  %nop15595 = alloca i1, i1 0
-  %nop15596 = alloca i1, i1 0
-  %nop15597 = alloca i1, i1 0
-  %nop15598 = alloca i1, i1 0
-  %nop15599 = alloca i1, i1 0
-  %nop15600 = alloca i1, i1 0
-  %nop15601 = alloca i1, i1 0
-  %nop15602 = alloca i1, i1 0
-  %nop15603 = alloca i1, i1 0
-  %nop15604 = alloca i1, i1 0
-  %nop15605 = alloca i1, i1 0
-  %nop15606 = alloca i1, i1 0
-  %nop15607 = alloca i1, i1 0
-  %nop15608 = alloca i1, i1 0
-  %nop15609 = alloca i1, i1 0
-  %nop15610 = alloca i1, i1 0
-  %nop15611 = alloca i1, i1 0
-  %nop15612 = alloca i1, i1 0
-  %nop15613 = alloca i1, i1 0
-  %nop15614 = alloca i1, i1 0
-  %nop15615 = alloca i1, i1 0
-  %nop15616 = alloca i1, i1 0
-  %nop15617 = alloca i1, i1 0
-  %nop15618 = alloca i1, i1 0
-  %nop15619 = alloca i1, i1 0
-  %nop15620 = alloca i1, i1 0
-  %nop15621 = alloca i1, i1 0
-  %nop15622 = alloca i1, i1 0
-  %nop15623 = alloca i1, i1 0
-  %nop15624 = alloca i1, i1 0
-  %nop15625 = alloca i1, i1 0
-  %nop15626 = alloca i1, i1 0
-  %nop15627 = alloca i1, i1 0
-  %nop15628 = alloca i1, i1 0
-  %nop15629 = alloca i1, i1 0
-  %nop15630 = alloca i1, i1 0
-  %nop15631 = alloca i1, i1 0
-  %nop15632 = alloca i1, i1 0
-  %nop15633 = alloca i1, i1 0
-  %nop15634 = alloca i1, i1 0
-  %nop15635 = alloca i1, i1 0
-  %nop15636 = alloca i1, i1 0
-  %nop15637 = alloca i1, i1 0
-  %nop15638 = alloca i1, i1 0
-  %nop15639 = alloca i1, i1 0
-  %nop15640 = alloca i1, i1 0
-  %nop15641 = alloca i1, i1 0
-  %nop15642 = alloca i1, i1 0
-  %nop15643 = alloca i1, i1 0
-  %nop15644 = alloca i1, i1 0
-  %nop15645 = alloca i1, i1 0
-  %nop15646 = alloca i1, i1 0
-  %nop15647 = alloca i1, i1 0
-  %nop15648 = alloca i1, i1 0
-  %nop15649 = alloca i1, i1 0
-  %nop15650 = alloca i1, i1 0
-  %nop15651 = alloca i1, i1 0
-  %nop15652 = alloca i1, i1 0
-  %nop15653 = alloca i1, i1 0
-  %nop15654 = alloca i1, i1 0
-  %nop15655 = alloca i1, i1 0
-  %nop15656 = alloca i1, i1 0
-  %nop15657 = alloca i1, i1 0
-  %nop15658 = alloca i1, i1 0
-  %nop15659 = alloca i1, i1 0
-  %nop15660 = alloca i1, i1 0
-  %nop15661 = alloca i1, i1 0
-  %nop15662 = alloca i1, i1 0
-  %nop15663 = alloca i1, i1 0
-  %nop15664 = alloca i1, i1 0
-  %nop15665 = alloca i1, i1 0
-  %nop15666 = alloca i1, i1 0
-  %nop15667 = alloca i1, i1 0
-  %nop15668 = alloca i1, i1 0
-  %nop15669 = alloca i1, i1 0
-  %nop15670 = alloca i1, i1 0
-  %nop15671 = alloca i1, i1 0
-  %nop15672 = alloca i1, i1 0
-  %nop15673 = alloca i1, i1 0
-  %nop15674 = alloca i1, i1 0
-  %nop15675 = alloca i1, i1 0
-  %nop15676 = alloca i1, i1 0
-  %nop15677 = alloca i1, i1 0
-  %nop15678 = alloca i1, i1 0
-  %nop15679 = alloca i1, i1 0
-  %nop15680 = alloca i1, i1 0
-  %nop15681 = alloca i1, i1 0
-  %nop15682 = alloca i1, i1 0
-  %nop15683 = alloca i1, i1 0
-  %nop15684 = alloca i1, i1 0
-  %nop15685 = alloca i1, i1 0
-  %nop15686 = alloca i1, i1 0
-  %nop15687 = alloca i1, i1 0
-  %nop15688 = alloca i1, i1 0
-  %nop15689 = alloca i1, i1 0
-  %nop15690 = alloca i1, i1 0
-  %nop15691 = alloca i1, i1 0
-  %nop15692 = alloca i1, i1 0
-  %nop15693 = alloca i1, i1 0
-  %nop15694 = alloca i1, i1 0
-  %nop15695 = alloca i1, i1 0
-  %nop15696 = alloca i1, i1 0
-  %nop15697 = alloca i1, i1 0
-  %nop15698 = alloca i1, i1 0
-  %nop15699 = alloca i1, i1 0
-  %nop15700 = alloca i1, i1 0
-  %nop15701 = alloca i1, i1 0
-  %nop15702 = alloca i1, i1 0
-  %nop15703 = alloca i1, i1 0
-  %nop15704 = alloca i1, i1 0
-  %nop15705 = alloca i1, i1 0
-  %nop15706 = alloca i1, i1 0
-  %nop15707 = alloca i1, i1 0
-  %nop15708 = alloca i1, i1 0
-  %nop15709 = alloca i1, i1 0
-  %nop15710 = alloca i1, i1 0
-  %nop15711 = alloca i1, i1 0
-  %nop15712 = alloca i1, i1 0
-  %nop15713 = alloca i1, i1 0
-  %nop15714 = alloca i1, i1 0
-  %nop15715 = alloca i1, i1 0
-  %nop15716 = alloca i1, i1 0
-  %nop15717 = alloca i1, i1 0
-  %nop15718 = alloca i1, i1 0
-  %nop15719 = alloca i1, i1 0
-  %nop15720 = alloca i1, i1 0
-  %nop15721 = alloca i1, i1 0
-  %nop15722 = alloca i1, i1 0
-  %nop15723 = alloca i1, i1 0
-  %nop15724 = alloca i1, i1 0
-  %nop15725 = alloca i1, i1 0
-  %nop15726 = alloca i1, i1 0
-  %nop15727 = alloca i1, i1 0
-  %nop15728 = alloca i1, i1 0
-  %nop15729 = alloca i1, i1 0
-  %nop15730 = alloca i1, i1 0
-  %nop15731 = alloca i1, i1 0
-  %nop15732 = alloca i1, i1 0
-  %nop15733 = alloca i1, i1 0
-  %nop15734 = alloca i1, i1 0
-  %nop15735 = alloca i1, i1 0
-  %nop15736 = alloca i1, i1 0
-  %nop15737 = alloca i1, i1 0
-  %nop15738 = alloca i1, i1 0
-  %nop15739 = alloca i1, i1 0
-  %nop15740 = alloca i1, i1 0
-  %nop15741 = alloca i1, i1 0
-  %nop15742 = alloca i1, i1 0
-  %nop15743 = alloca i1, i1 0
-  %nop15744 = alloca i1, i1 0
-  %nop15745 = alloca i1, i1 0
-  %nop15746 = alloca i1, i1 0
-  %nop15747 = alloca i1, i1 0
-  %nop15748 = alloca i1, i1 0
-  %nop15749 = alloca i1, i1 0
-  %nop15750 = alloca i1, i1 0
-  %nop15751 = alloca i1, i1 0
-  %nop15752 = alloca i1, i1 0
-  %nop15753 = alloca i1, i1 0
-  %nop15754 = alloca i1, i1 0
-  %nop15755 = alloca i1, i1 0
-  %nop15756 = alloca i1, i1 0
-  %nop15757 = alloca i1, i1 0
-  %nop15758 = alloca i1, i1 0
-  %nop15759 = alloca i1, i1 0
-  %nop15760 = alloca i1, i1 0
-  %nop15761 = alloca i1, i1 0
-  %nop15762 = alloca i1, i1 0
-  %nop15763 = alloca i1, i1 0
-  %nop15764 = alloca i1, i1 0
-  %nop15765 = alloca i1, i1 0
-  %nop15766 = alloca i1, i1 0
-  %nop15767 = alloca i1, i1 0
-  %nop15768 = alloca i1, i1 0
-  %nop15769 = alloca i1, i1 0
-  %nop15770 = alloca i1, i1 0
-  %nop15771 = alloca i1, i1 0
-  %nop15772 = alloca i1, i1 0
-  %nop15773 = alloca i1, i1 0
-  %nop15774 = alloca i1, i1 0
-  %nop15775 = alloca i1, i1 0
-  %nop15776 = alloca i1, i1 0
-  %nop15777 = alloca i1, i1 0
-  %nop15778 = alloca i1, i1 0
-  %nop15779 = alloca i1, i1 0
-  %nop15780 = alloca i1, i1 0
-  %nop15781 = alloca i1, i1 0
-  %nop15782 = alloca i1, i1 0
-  %nop15783 = alloca i1, i1 0
-  %nop15784 = alloca i1, i1 0
-  %nop15785 = alloca i1, i1 0
-  %nop15786 = alloca i1, i1 0
-  %nop15787 = alloca i1, i1 0
-  %nop15788 = alloca i1, i1 0
-  %nop15789 = alloca i1, i1 0
-  %nop15790 = alloca i1, i1 0
-  %nop15791 = alloca i1, i1 0
-  %nop15792 = alloca i1, i1 0
-  %nop15793 = alloca i1, i1 0
-  %nop15794 = alloca i1, i1 0
-  %nop15795 = alloca i1, i1 0
-  %nop15796 = alloca i1, i1 0
-  %nop15797 = alloca i1, i1 0
-  %nop15798 = alloca i1, i1 0
-  %nop15799 = alloca i1, i1 0
-  %nop15800 = alloca i1, i1 0
-  %nop15801 = alloca i1, i1 0
-  %nop15802 = alloca i1, i1 0
-  %nop15803 = alloca i1, i1 0
-  %nop15804 = alloca i1, i1 0
-  %nop15805 = alloca i1, i1 0
-  %nop15806 = alloca i1, i1 0
-  %nop15807 = alloca i1, i1 0
-  %nop15808 = alloca i1, i1 0
-  %nop15809 = alloca i1, i1 0
-  %nop15810 = alloca i1, i1 0
-  %nop15811 = alloca i1, i1 0
-  %nop15812 = alloca i1, i1 0
-  %nop15813 = alloca i1, i1 0
-  %nop15814 = alloca i1, i1 0
-  %nop15815 = alloca i1, i1 0
-  %nop15816 = alloca i1, i1 0
-  %nop15817 = alloca i1, i1 0
-  %nop15818 = alloca i1, i1 0
-  %nop15819 = alloca i1, i1 0
-  %nop15820 = alloca i1, i1 0
-  %nop15821 = alloca i1, i1 0
-  %nop15822 = alloca i1, i1 0
-  %nop15823 = alloca i1, i1 0
-  %nop15824 = alloca i1, i1 0
-  %nop15825 = alloca i1, i1 0
-  %nop15826 = alloca i1, i1 0
-  %nop15827 = alloca i1, i1 0
-  %nop15828 = alloca i1, i1 0
-  %nop15829 = alloca i1, i1 0
-  %nop15830 = alloca i1, i1 0
-  %nop15831 = alloca i1, i1 0
-  %nop15832 = alloca i1, i1 0
-  %nop15833 = alloca i1, i1 0
-  %nop15834 = alloca i1, i1 0
-  %nop15835 = alloca i1, i1 0
-  %nop15836 = alloca i1, i1 0
-  %nop15837 = alloca i1, i1 0
-  %nop15838 = alloca i1, i1 0
-  %nop15839 = alloca i1, i1 0
-  %nop15840 = alloca i1, i1 0
-  %nop15841 = alloca i1, i1 0
-  %nop15842 = alloca i1, i1 0
-  %nop15843 = alloca i1, i1 0
-  %nop15844 = alloca i1, i1 0
-  %nop15845 = alloca i1, i1 0
-  %nop15846 = alloca i1, i1 0
-  %nop15847 = alloca i1, i1 0
-  %nop15848 = alloca i1, i1 0
-  %nop15849 = alloca i1, i1 0
-  %nop15850 = alloca i1, i1 0
-  %nop15851 = alloca i1, i1 0
-  %nop15852 = alloca i1, i1 0
-  %nop15853 = alloca i1, i1 0
-  %nop15854 = alloca i1, i1 0
-  %nop15855 = alloca i1, i1 0
-  %nop15856 = alloca i1, i1 0
-  %nop15857 = alloca i1, i1 0
-  %nop15858 = alloca i1, i1 0
-  %nop15859 = alloca i1, i1 0
-  %nop15860 = alloca i1, i1 0
-  %nop15861 = alloca i1, i1 0
-  %nop15862 = alloca i1, i1 0
-  %nop15863 = alloca i1, i1 0
-  %nop15864 = alloca i1, i1 0
-  %nop15865 = alloca i1, i1 0
-  %nop15866 = alloca i1, i1 0
-  %nop15867 = alloca i1, i1 0
-  %nop15868 = alloca i1, i1 0
-  %nop15869 = alloca i1, i1 0
-  %nop15870 = alloca i1, i1 0
-  %nop15871 = alloca i1, i1 0
-  %nop15872 = alloca i1, i1 0
-  %nop15873 = alloca i1, i1 0
-  %nop15874 = alloca i1, i1 0
-  %nop15875 = alloca i1, i1 0
-  %nop15876 = alloca i1, i1 0
-  %nop15877 = alloca i1, i1 0
-  %nop15878 = alloca i1, i1 0
-  %nop15879 = alloca i1, i1 0
-  %nop15880 = alloca i1, i1 0
-  %nop15881 = alloca i1, i1 0
-  %nop15882 = alloca i1, i1 0
-  %nop15883 = alloca i1, i1 0
-  %nop15884 = alloca i1, i1 0
-  %nop15885 = alloca i1, i1 0
-  %nop15886 = alloca i1, i1 0
-  %nop15887 = alloca i1, i1 0
-  %nop15888 = alloca i1, i1 0
-  %nop15889 = alloca i1, i1 0
-  %nop15890 = alloca i1, i1 0
-  %nop15891 = alloca i1, i1 0
-  %nop15892 = alloca i1, i1 0
-  %nop15893 = alloca i1, i1 0
-  %nop15894 = alloca i1, i1 0
-  %nop15895 = alloca i1, i1 0
-  %nop15896 = alloca i1, i1 0
-  %nop15897 = alloca i1, i1 0
-  %nop15898 = alloca i1, i1 0
-  %nop15899 = alloca i1, i1 0
-  %nop15900 = alloca i1, i1 0
-  %nop15901 = alloca i1, i1 0
-  %nop15902 = alloca i1, i1 0
-  %nop15903 = alloca i1, i1 0
-  %nop15904 = alloca i1, i1 0
-  %nop15905 = alloca i1, i1 0
-  %nop15906 = alloca i1, i1 0
-  %nop15907 = alloca i1, i1 0
-  %nop15908 = alloca i1, i1 0
-  %nop15909 = alloca i1, i1 0
-  %nop15910 = alloca i1, i1 0
-  %nop15911 = alloca i1, i1 0
-  %nop15912 = alloca i1, i1 0
-  %nop15913 = alloca i1, i1 0
-  %nop15914 = alloca i1, i1 0
-  %nop15915 = alloca i1, i1 0
-  %nop15916 = alloca i1, i1 0
-  %nop15917 = alloca i1, i1 0
-  %nop15918 = alloca i1, i1 0
-  %nop15919 = alloca i1, i1 0
-  %nop15920 = alloca i1, i1 0
-  %nop15921 = alloca i1, i1 0
-  %nop15922 = alloca i1, i1 0
-  %nop15923 = alloca i1, i1 0
-  %nop15924 = alloca i1, i1 0
-  %nop15925 = alloca i1, i1 0
-  %nop15926 = alloca i1, i1 0
-  %nop15927 = alloca i1, i1 0
-  %nop15928 = alloca i1, i1 0
-  %nop15929 = alloca i1, i1 0
-  %nop15930 = alloca i1, i1 0
-  %nop15931 = alloca i1, i1 0
-  %nop15932 = alloca i1, i1 0
-  %nop15933 = alloca i1, i1 0
-  %nop15934 = alloca i1, i1 0
-  %nop15935 = alloca i1, i1 0
-  %nop15936 = alloca i1, i1 0
-  %nop15937 = alloca i1, i1 0
-  %nop15938 = alloca i1, i1 0
-  %nop15939 = alloca i1, i1 0
-  %nop15940 = alloca i1, i1 0
-  %nop15941 = alloca i1, i1 0
-  %nop15942 = alloca i1, i1 0
-  %nop15943 = alloca i1, i1 0
-  %nop15944 = alloca i1, i1 0
-  %nop15945 = alloca i1, i1 0
-  %nop15946 = alloca i1, i1 0
-  %nop15947 = alloca i1, i1 0
-  %nop15948 = alloca i1, i1 0
-  %nop15949 = alloca i1, i1 0
-  %nop15950 = alloca i1, i1 0
-  %nop15951 = alloca i1, i1 0
-  %nop15952 = alloca i1, i1 0
-  %nop15953 = alloca i1, i1 0
-  %nop15954 = alloca i1, i1 0
-  %nop15955 = alloca i1, i1 0
-  %nop15956 = alloca i1, i1 0
-  %nop15957 = alloca i1, i1 0
-  %nop15958 = alloca i1, i1 0
-  %nop15959 = alloca i1, i1 0
-  %nop15960 = alloca i1, i1 0
-  %nop15961 = alloca i1, i1 0
-  %nop15962 = alloca i1, i1 0
-  %nop15963 = alloca i1, i1 0
-  %nop15964 = alloca i1, i1 0
-  %nop15965 = alloca i1, i1 0
-  %nop15966 = alloca i1, i1 0
-  %nop15967 = alloca i1, i1 0
-  %nop15968 = alloca i1, i1 0
-  %nop15969 = alloca i1, i1 0
-  %nop15970 = alloca i1, i1 0
-  %nop15971 = alloca i1, i1 0
-  %nop15972 = alloca i1, i1 0
-  %nop15973 = alloca i1, i1 0
-  %nop15974 = alloca i1, i1 0
-  %nop15975 = alloca i1, i1 0
-  %nop15976 = alloca i1, i1 0
-  %nop15977 = alloca i1, i1 0
-  %nop15978 = alloca i1, i1 0
-  %nop15979 = alloca i1, i1 0
-  %nop15980 = alloca i1, i1 0
-  %nop15981 = alloca i1, i1 0
-  %nop15982 = alloca i1, i1 0
-  %nop15983 = alloca i1, i1 0
-  %nop15984 = alloca i1, i1 0
-  %nop15985 = alloca i1, i1 0
-  %nop15986 = alloca i1, i1 0
-  %nop15987 = alloca i1, i1 0
-  %nop15988 = alloca i1, i1 0
-  %nop15989 = alloca i1, i1 0
-  %nop15990 = alloca i1, i1 0
-  %nop15991 = alloca i1, i1 0
-  %nop15992 = alloca i1, i1 0
-  %nop15993 = alloca i1, i1 0
-  %nop15994 = alloca i1, i1 0
-  %nop15995 = alloca i1, i1 0
-  %nop15996 = alloca i1, i1 0
-  %nop15997 = alloca i1, i1 0
-  %nop15998 = alloca i1, i1 0
-  %nop15999 = alloca i1, i1 0
-  %nop16000 = alloca i1, i1 0
-  %nop16001 = alloca i1, i1 0
-  %nop16002 = alloca i1, i1 0
-  %nop16003 = alloca i1, i1 0
-  %nop16004 = alloca i1, i1 0
-  %nop16005 = alloca i1, i1 0
-  %nop16006 = alloca i1, i1 0
-  %nop16007 = alloca i1, i1 0
-  %nop16008 = alloca i1, i1 0
-  %nop16009 = alloca i1, i1 0
-  %nop16010 = alloca i1, i1 0
-  %nop16011 = alloca i1, i1 0
-  %nop16012 = alloca i1, i1 0
-  %nop16013 = alloca i1, i1 0
-  %nop16014 = alloca i1, i1 0
-  %nop16015 = alloca i1, i1 0
-  %nop16016 = alloca i1, i1 0
-  %nop16017 = alloca i1, i1 0
-  %nop16018 = alloca i1, i1 0
-  %nop16019 = alloca i1, i1 0
-  %nop16020 = alloca i1, i1 0
-  %nop16021 = alloca i1, i1 0
-  %nop16022 = alloca i1, i1 0
-  %nop16023 = alloca i1, i1 0
-  %nop16024 = alloca i1, i1 0
-  %nop16025 = alloca i1, i1 0
-  %nop16026 = alloca i1, i1 0
-  %nop16027 = alloca i1, i1 0
-  %nop16028 = alloca i1, i1 0
-  %nop16029 = alloca i1, i1 0
-  %nop16030 = alloca i1, i1 0
-  %nop16031 = alloca i1, i1 0
-  %nop16032 = alloca i1, i1 0
-  %nop16033 = alloca i1, i1 0
-  %nop16034 = alloca i1, i1 0
-  %nop16035 = alloca i1, i1 0
-  %nop16036 = alloca i1, i1 0
-  %nop16037 = alloca i1, i1 0
-  %nop16038 = alloca i1, i1 0
-  %nop16039 = alloca i1, i1 0
-  %nop16040 = alloca i1, i1 0
-  %nop16041 = alloca i1, i1 0
-  %nop16042 = alloca i1, i1 0
-  %nop16043 = alloca i1, i1 0
-  %nop16044 = alloca i1, i1 0
-  %nop16045 = alloca i1, i1 0
-  %nop16046 = alloca i1, i1 0
-  %nop16047 = alloca i1, i1 0
-  %nop16048 = alloca i1, i1 0
-  %nop16049 = alloca i1, i1 0
-  %nop16050 = alloca i1, i1 0
-  %nop16051 = alloca i1, i1 0
-  %nop16052 = alloca i1, i1 0
-  %nop16053 = alloca i1, i1 0
-  %nop16054 = alloca i1, i1 0
-  %nop16055 = alloca i1, i1 0
-  %nop16056 = alloca i1, i1 0
-  %nop16057 = alloca i1, i1 0
-  %nop16058 = alloca i1, i1 0
-  %nop16059 = alloca i1, i1 0
-  %nop16060 = alloca i1, i1 0
-  %nop16061 = alloca i1, i1 0
-  %nop16062 = alloca i1, i1 0
-  %nop16063 = alloca i1, i1 0
-  %nop16064 = alloca i1, i1 0
-  %nop16065 = alloca i1, i1 0
-  %nop16066 = alloca i1, i1 0
-  %nop16067 = alloca i1, i1 0
-  %nop16068 = alloca i1, i1 0
-  %nop16069 = alloca i1, i1 0
-  %nop16070 = alloca i1, i1 0
-  %nop16071 = alloca i1, i1 0
-  %nop16072 = alloca i1, i1 0
-  %nop16073 = alloca i1, i1 0
-  %nop16074 = alloca i1, i1 0
-  %nop16075 = alloca i1, i1 0
-  %nop16076 = alloca i1, i1 0
-  %nop16077 = alloca i1, i1 0
-  %nop16078 = alloca i1, i1 0
-  %nop16079 = alloca i1, i1 0
-  %nop16080 = alloca i1, i1 0
-  %nop16081 = alloca i1, i1 0
-  %nop16082 = alloca i1, i1 0
-  %nop16083 = alloca i1, i1 0
-  %nop16084 = alloca i1, i1 0
-  %nop16085 = alloca i1, i1 0
-  %nop16086 = alloca i1, i1 0
-  %nop16087 = alloca i1, i1 0
-  %nop16088 = alloca i1, i1 0
-  %nop16089 = alloca i1, i1 0
-  %nop16090 = alloca i1, i1 0
-  %nop16091 = alloca i1, i1 0
-  %nop16092 = alloca i1, i1 0
-  %nop16093 = alloca i1, i1 0
-  %nop16094 = alloca i1, i1 0
-  %nop16095 = alloca i1, i1 0
-  %nop16096 = alloca i1, i1 0
-  %nop16097 = alloca i1, i1 0
-  %nop16098 = alloca i1, i1 0
-  %nop16099 = alloca i1, i1 0
-  %nop16100 = alloca i1, i1 0
-  %nop16101 = alloca i1, i1 0
-  %nop16102 = alloca i1, i1 0
-  %nop16103 = alloca i1, i1 0
-  %nop16104 = alloca i1, i1 0
-  %nop16105 = alloca i1, i1 0
-  %nop16106 = alloca i1, i1 0
-  %nop16107 = alloca i1, i1 0
-  %nop16108 = alloca i1, i1 0
-  %nop16109 = alloca i1, i1 0
-  %nop16110 = alloca i1, i1 0
-  %nop16111 = alloca i1, i1 0
-  %nop16112 = alloca i1, i1 0
-  %nop16113 = alloca i1, i1 0
-  %nop16114 = alloca i1, i1 0
-  %nop16115 = alloca i1, i1 0
-  %nop16116 = alloca i1, i1 0
-  %nop16117 = alloca i1, i1 0
-  %nop16118 = alloca i1, i1 0
-  %nop16119 = alloca i1, i1 0
-  %nop16120 = alloca i1, i1 0
-  %nop16121 = alloca i1, i1 0
-  %nop16122 = alloca i1, i1 0
-  %nop16123 = alloca i1, i1 0
-  %nop16124 = alloca i1, i1 0
-  %nop16125 = alloca i1, i1 0
-  %nop16126 = alloca i1, i1 0
-  %nop16127 = alloca i1, i1 0
-  %nop16128 = alloca i1, i1 0
-  %nop16129 = alloca i1, i1 0
-  %nop16130 = alloca i1, i1 0
-  %nop16131 = alloca i1, i1 0
-  %nop16132 = alloca i1, i1 0
-  %nop16133 = alloca i1, i1 0
-  %nop16134 = alloca i1, i1 0
-  %nop16135 = alloca i1, i1 0
-  %nop16136 = alloca i1, i1 0
-  %nop16137 = alloca i1, i1 0
-  %nop16138 = alloca i1, i1 0
-  %nop16139 = alloca i1, i1 0
-  %nop16140 = alloca i1, i1 0
-  %nop16141 = alloca i1, i1 0
-  %nop16142 = alloca i1, i1 0
-  %nop16143 = alloca i1, i1 0
-  %nop16144 = alloca i1, i1 0
-  %nop16145 = alloca i1, i1 0
-  %nop16146 = alloca i1, i1 0
-  %nop16147 = alloca i1, i1 0
-  %nop16148 = alloca i1, i1 0
-  %nop16149 = alloca i1, i1 0
-  %nop16150 = alloca i1, i1 0
-  %nop16151 = alloca i1, i1 0
-  %nop16152 = alloca i1, i1 0
-  %nop16153 = alloca i1, i1 0
-  %nop16154 = alloca i1, i1 0
-  %nop16155 = alloca i1, i1 0
-  %nop16156 = alloca i1, i1 0
-  %nop16157 = alloca i1, i1 0
-  %nop16158 = alloca i1, i1 0
-  %nop16159 = alloca i1, i1 0
-  %nop16160 = alloca i1, i1 0
-  %nop16161 = alloca i1, i1 0
-  %nop16162 = alloca i1, i1 0
-  %nop16163 = alloca i1, i1 0
-  %nop16164 = alloca i1, i1 0
-  %nop16165 = alloca i1, i1 0
-  %nop16166 = alloca i1, i1 0
-  %nop16167 = alloca i1, i1 0
-  %nop16168 = alloca i1, i1 0
-  %nop16169 = alloca i1, i1 0
-  %nop16170 = alloca i1, i1 0
-  %nop16171 = alloca i1, i1 0
-  %nop16172 = alloca i1, i1 0
-  %nop16173 = alloca i1, i1 0
-  %nop16174 = alloca i1, i1 0
-  %nop16175 = alloca i1, i1 0
-  %nop16176 = alloca i1, i1 0
-  %nop16177 = alloca i1, i1 0
-  %nop16178 = alloca i1, i1 0
-  %nop16179 = alloca i1, i1 0
-  %nop16180 = alloca i1, i1 0
-  %nop16181 = alloca i1, i1 0
-  %nop16182 = alloca i1, i1 0
-  %nop16183 = alloca i1, i1 0
-  %nop16184 = alloca i1, i1 0
-  %nop16185 = alloca i1, i1 0
-  %nop16186 = alloca i1, i1 0
-  %nop16187 = alloca i1, i1 0
-  %nop16188 = alloca i1, i1 0
-  %nop16189 = alloca i1, i1 0
-  %nop16190 = alloca i1, i1 0
-  %nop16191 = alloca i1, i1 0
-  %nop16192 = alloca i1, i1 0
-  %nop16193 = alloca i1, i1 0
-  %nop16194 = alloca i1, i1 0
-  %nop16195 = alloca i1, i1 0
-  %nop16196 = alloca i1, i1 0
-  %nop16197 = alloca i1, i1 0
-  %nop16198 = alloca i1, i1 0
-  %nop16199 = alloca i1, i1 0
-  %nop16200 = alloca i1, i1 0
-  %nop16201 = alloca i1, i1 0
-  %nop16202 = alloca i1, i1 0
-  %nop16203 = alloca i1, i1 0
-  %nop16204 = alloca i1, i1 0
-  %nop16205 = alloca i1, i1 0
-  %nop16206 = alloca i1, i1 0
-  %nop16207 = alloca i1, i1 0
-  %nop16208 = alloca i1, i1 0
-  %nop16209 = alloca i1, i1 0
-  %nop16210 = alloca i1, i1 0
-  %nop16211 = alloca i1, i1 0
-  %nop16212 = alloca i1, i1 0
-  %nop16213 = alloca i1, i1 0
-  %nop16214 = alloca i1, i1 0
-  %nop16215 = alloca i1, i1 0
-  %nop16216 = alloca i1, i1 0
-  %nop16217 = alloca i1, i1 0
-  %nop16218 = alloca i1, i1 0
-  %nop16219 = alloca i1, i1 0
-  %nop16220 = alloca i1, i1 0
-  %nop16221 = alloca i1, i1 0
-  %nop16222 = alloca i1, i1 0
-  %nop16223 = alloca i1, i1 0
-  %nop16224 = alloca i1, i1 0
-  %nop16225 = alloca i1, i1 0
-  %nop16226 = alloca i1, i1 0
-  %nop16227 = alloca i1, i1 0
-  %nop16228 = alloca i1, i1 0
-  %nop16229 = alloca i1, i1 0
-  %nop16230 = alloca i1, i1 0
-  %nop16231 = alloca i1, i1 0
-  %nop16232 = alloca i1, i1 0
-  %nop16233 = alloca i1, i1 0
-  %nop16234 = alloca i1, i1 0
-  %nop16235 = alloca i1, i1 0
-  %nop16236 = alloca i1, i1 0
-  %nop16237 = alloca i1, i1 0
-  %nop16238 = alloca i1, i1 0
-  %nop16239 = alloca i1, i1 0
-  %nop16240 = alloca i1, i1 0
-  %nop16241 = alloca i1, i1 0
-  %nop16242 = alloca i1, i1 0
-  %nop16243 = alloca i1, i1 0
-  %nop16244 = alloca i1, i1 0
-  %nop16245 = alloca i1, i1 0
-  %nop16246 = alloca i1, i1 0
-  %nop16247 = alloca i1, i1 0
-  %nop16248 = alloca i1, i1 0
-  %nop16249 = alloca i1, i1 0
-  %nop16250 = alloca i1, i1 0
-  %nop16251 = alloca i1, i1 0
-  %nop16252 = alloca i1, i1 0
-  %nop16253 = alloca i1, i1 0
-  %nop16254 = alloca i1, i1 0
-  %nop16255 = alloca i1, i1 0
-  %nop16256 = alloca i1, i1 0
-  %nop16257 = alloca i1, i1 0
-  %nop16258 = alloca i1, i1 0
-  %nop16259 = alloca i1, i1 0
-  %nop16260 = alloca i1, i1 0
-  %nop16261 = alloca i1, i1 0
-  %nop16262 = alloca i1, i1 0
-  %nop16263 = alloca i1, i1 0
-  %nop16264 = alloca i1, i1 0
-  %nop16265 = alloca i1, i1 0
-  %nop16266 = alloca i1, i1 0
-  %nop16267 = alloca i1, i1 0
-  %nop16268 = alloca i1, i1 0
-  %nop16269 = alloca i1, i1 0
-  %nop16270 = alloca i1, i1 0
-  %nop16271 = alloca i1, i1 0
-  %nop16272 = alloca i1, i1 0
-  %nop16273 = alloca i1, i1 0
-  %nop16274 = alloca i1, i1 0
-  %nop16275 = alloca i1, i1 0
-  %nop16276 = alloca i1, i1 0
-  %nop16277 = alloca i1, i1 0
-  %nop16278 = alloca i1, i1 0
-  %nop16279 = alloca i1, i1 0
-  %nop16280 = alloca i1, i1 0
-  %nop16281 = alloca i1, i1 0
-  %nop16282 = alloca i1, i1 0
-  %nop16283 = alloca i1, i1 0
-  %nop16284 = alloca i1, i1 0
-  %nop16285 = alloca i1, i1 0
-  %nop16286 = alloca i1, i1 0
-  %nop16287 = alloca i1, i1 0
-  %nop16288 = alloca i1, i1 0
-  %nop16289 = alloca i1, i1 0
-  %nop16290 = alloca i1, i1 0
-  %nop16291 = alloca i1, i1 0
-  %nop16292 = alloca i1, i1 0
-  %nop16293 = alloca i1, i1 0
-  %nop16294 = alloca i1, i1 0
-  %nop16295 = alloca i1, i1 0
-  %nop16296 = alloca i1, i1 0
-  %nop16297 = alloca i1, i1 0
-  %nop16298 = alloca i1, i1 0
-  %nop16299 = alloca i1, i1 0
-  %nop16300 = alloca i1, i1 0
-  %nop16301 = alloca i1, i1 0
-  %nop16302 = alloca i1, i1 0
-  %nop16303 = alloca i1, i1 0
-  %nop16304 = alloca i1, i1 0
-  %nop16305 = alloca i1, i1 0
-  %nop16306 = alloca i1, i1 0
-  %nop16307 = alloca i1, i1 0
-  %nop16308 = alloca i1, i1 0
-  %nop16309 = alloca i1, i1 0
-  %nop16310 = alloca i1, i1 0
-  %nop16311 = alloca i1, i1 0
-  %nop16312 = alloca i1, i1 0
-  %nop16313 = alloca i1, i1 0
-  %nop16314 = alloca i1, i1 0
-  %nop16315 = alloca i1, i1 0
-  %nop16316 = alloca i1, i1 0
-  %nop16317 = alloca i1, i1 0
-  %nop16318 = alloca i1, i1 0
-  %nop16319 = alloca i1, i1 0
-  %nop16320 = alloca i1, i1 0
-  %nop16321 = alloca i1, i1 0
-  %nop16322 = alloca i1, i1 0
-  %nop16323 = alloca i1, i1 0
-  %nop16324 = alloca i1, i1 0
-  %nop16325 = alloca i1, i1 0
-  %nop16326 = alloca i1, i1 0
-  %nop16327 = alloca i1, i1 0
-  %nop16328 = alloca i1, i1 0
-  %nop16329 = alloca i1, i1 0
-  %nop16330 = alloca i1, i1 0
-  %nop16331 = alloca i1, i1 0
-  %nop16332 = alloca i1, i1 0
-  %nop16333 = alloca i1, i1 0
-  %nop16334 = alloca i1, i1 0
-  %nop16335 = alloca i1, i1 0
-  %nop16336 = alloca i1, i1 0
-  %nop16337 = alloca i1, i1 0
-  %nop16338 = alloca i1, i1 0
-  %nop16339 = alloca i1, i1 0
-  %nop16340 = alloca i1, i1 0
-  %nop16341 = alloca i1, i1 0
-  %nop16342 = alloca i1, i1 0
-  %nop16343 = alloca i1, i1 0
-  %nop16344 = alloca i1, i1 0
-  %nop16345 = alloca i1, i1 0
-  %nop16346 = alloca i1, i1 0
-  %nop16347 = alloca i1, i1 0
-  %nop16348 = alloca i1, i1 0
-  %nop16349 = alloca i1, i1 0
-  %nop16350 = alloca i1, i1 0
-  %nop16351 = alloca i1, i1 0
-  %nop16352 = alloca i1, i1 0
-  %nop16353 = alloca i1, i1 0
-  %nop16354 = alloca i1, i1 0
-  %nop16355 = alloca i1, i1 0
-  %nop16356 = alloca i1, i1 0
-  %nop16357 = alloca i1, i1 0
-  %nop16358 = alloca i1, i1 0
-  %nop16359 = alloca i1, i1 0
-  %nop16360 = alloca i1, i1 0
-  %nop16361 = alloca i1, i1 0
-  %nop16362 = alloca i1, i1 0
-  %nop16363 = alloca i1, i1 0
-  %nop16364 = alloca i1, i1 0
-  %nop16365 = alloca i1, i1 0
-  %nop16366 = alloca i1, i1 0
-  %nop16367 = alloca i1, i1 0
-  %nop16368 = alloca i1, i1 0
-  %nop16369 = alloca i1, i1 0
-  %nop16370 = alloca i1, i1 0
-  %nop16371 = alloca i1, i1 0
-  %nop16372 = alloca i1, i1 0
-  %nop16373 = alloca i1, i1 0
-  %nop16374 = alloca i1, i1 0
-  %nop16375 = alloca i1, i1 0
-  %nop16376 = alloca i1, i1 0
-  %nop16377 = alloca i1, i1 0
-  br label %for.inc
-
-for.inc:
-  %3 = load i32* %i, align 4
-  %inc = add nsw i32 %3, 1
-  store i32 %inc, i32* %i, align 4
-  br label %for.cond
-
-; CHECK:  addiu $sp, $sp, -8
-; CHECK:  sw  $ra, 0($sp)
-; CHECK:  lui $[[REG1:[0-9]+]], 65534
-; CHECK:  addiu $[[REG1]], $[[REG1]], -12
-; CHECK:  addu  $[[REG1]], $ra, $[[REG1]]
-; CHECK:  lw  $ra, 0($sp)
-; CHECK:  jr  $[[REG1]]
-; CHECK:  addiu $sp, $sp, 8
-
-for.end:
-  ret i32 0
-}
-
-attributes #0 = { nounwind uwtable "less-precise-fpmad"="false"
-  "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"
-  "no-infs-fp-math"="false" "no-nans-fp-math"="false"
-  "stack-protector-buffer-size"="8" "unsafe-fp-math"="false"
-  "use-soft-float"="false" }
diff --git a/test/MC/Mips/micromips-pc16-fixup.s b/test/MC/Mips/micromips-pc16-fixup.s
new file mode 100644
index 0000000..146a155
--- /dev/null
+++ b/test/MC/Mips/micromips-pc16-fixup.s
@@ -0,0 +1,10 @@
+# RUN: llvm-mc %s -triple=mips-unknown-linux -mcpu=mips32r2 -arch=mips -mattr=+micromips 2>&1 -filetype=obj | FileCheck %s
+#
+# CHECK-NOT: LLVM ERROR: out of range PC16 fixup
+
+.text
+  b foo
+  .space 65536 - 8, 1   # -8 = size of b instr plus size of automatically inserted nop
+foo:
+  add $0,$0,$0
+
diff --git a/test/MC/Mips/micromips-relocations.s b/test/MC/Mips/micromips-relocations.s
index 804dd2f..1633845 100644
--- a/test/MC/Mips/micromips-relocations.s
+++ b/test/MC/Mips/micromips-relocations.s
@@ -67,6 +67,14 @@
 # CHECK-FIXUP:        # fixup A - offset: 0,
 # CHECK-FIXUP:          value: _gp_disp@TPREL_LO,
 # CHECK-FIXUP:          kind: fixup_MICROMIPS_TLS_TPREL_LO16
+# CHECK-FIXUP: addiu $4, $gp, %tlsgd(a)
+# CHECK-FIXUP:        # encoding: [0x9c'A',0x30'A',0x00,0x00]
+# CHECK-FIXUP:        # fixup A - offset: 0,
+# CHECK-FIXUP:          value: a@TLSGD, kind: fixup_MICROMIPS_TLS_GD
+# CHECK-FIXUP: addiu $4, $gp, %tlsldm(f.i)
+# CHECK-FIXUP:        # encoding: [0x9c'A',0x30'A',0x00,0x00]
+# CHECK-FIXUP:        # fixup A - offset: 0,
+# CHECK-FIXUP:          value: f.i@TLSLDM, kind: fixup_MICROMIPS_TLS_LDM
 #------------------------------------------------------------------------------
 # Check that the appropriate relocations were created.
 #------------------------------------------------------------------------------
@@ -83,6 +91,8 @@
 # CHECK-ELF:     0x{{[0-9,A-F]+}} R_MICROMIPS_GOT_OFST
 # CHECK-ELF:     0x{{[0-9,A-F]+}} R_MICROMIPS_TLS_TPREL_HI16
 # CHECK-ELF:     0x{{[0-9,A-F]+}} R_MICROMIPS_TLS_TPREL_LO16
+# CHECK-ELF:     0x{{[0-9,A-F]+}} R_MICROMIPS_TLS_GD
+# CHECK-ELF:     0x{{[0-9,A-F]+}} R_MICROMIPS_TLS_LDM
 # CHECK-ELF: ]
 
     lui    $2, %hi(_gp_disp)
@@ -97,3 +107,5 @@
     lw     $6, %got_ofst(loop_4)($5)
     lui    $2, %tprel_hi(_gp_disp)
     addiu  $2, $2, %tprel_lo(_gp_disp)
+    addiu  $4, $gp, %tlsgd(a)
+    addiu  $4, $gp, %tlsldm(f.i)
diff --git a/test/MC/Mips/mips-alu-instructions.s b/test/MC/Mips/mips-alu-instructions.s
index 68a8da0..b25394b 100644
--- a/test/MC/Mips/mips-alu-instructions.s
+++ b/test/MC/Mips/mips-alu-instructions.s
@@ -118,3 +118,32 @@
     negu   $6,$7
     move   $7,$8
     rdhwr   $5, $29
+
+#------------------------------------------------------------------------------
+# Shortcuts for arithmetic instructions
+#------------------------------------------------------------------------------
+
+# CHECK:	add	$9, $9, $3	# encoding: [0x20,0x48,0x23,0x01]
+# CHECK:	addu	$9, $9, $3	# encoding: [0x21,0x48,0x23,0x01]
+# CHECK:	addi	$9, $9, 10	# encoding: [0x0a,0x00,0x29,0x21]
+# CHECK:	addiu	$9, $9, 10	# encoding: [0x0a,0x00,0x29,0x25]
+# CHECK:	and	$5, $5, $6	# encoding: [0x24,0x28,0xa6,0x00]
+# CHECK:	mul	$9, $9, $3	# encoding: [0x02,0x48,0x23,0x71]
+# CHECK:	or	$2, $2, $4	# encoding: [0x25,0x10,0x44,0x00]
+# CHECK:	sub	$9, $9, $3	# encoding: [0x22,0x48,0x23,0x01]
+# CHECK:	subu	$9, $9, $3	# encoding: [0x23,0x48,0x23,0x01]
+# CHECK:	addi	$9, $9, -10	# encoding: [0xf6,0xff,0x29,0x21]
+# CHECK:	addiu	$9, $9, -10	# encoding: [0xf6,0xff,0x29,0x25]
+# CHECK:	xor	$9, $9, $10	# encoding: [0x26,0x48,0x2a,0x01]
+	add	$9, $3
+	addu	$9, $3
+	add	$9, 10
+	addu	$9, 10
+	and	$5, $6
+	mul	$9, $3
+	or	$2, $4
+	sub	$9, $3
+	subu	$9, $3
+	sub	$9, 10
+	subu	$9, 10
+	xor	$9, $10
diff --git a/test/MC/Mips/mips-bad-branches.s b/test/MC/Mips/mips-bad-branches.s
new file mode 100644
index 0000000..321b3c4
--- /dev/null
+++ b/test/MC/Mips/mips-bad-branches.s
@@ -0,0 +1,409 @@
+# RUN: not llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 -arch=mips 2>&1 | FileCheck %s
+#
+# CHECK: error: branch to misaligned address
+# CHECK:        b -131069
+# CHECK: error: branch to misaligned address
+# CHECK:        b -131070
+# CHECK: error: branch to misaligned address
+# CHECK:        b -131071
+# CHECK: error: branch target out of range
+# CHECK:        b -131073
+# CHECK: error: branch to misaligned address
+# CHECK:        b 131069
+# CHECK: error: branch to misaligned address
+# CHECK:        b 131070
+# CHECK: error: branch to misaligned address
+# CHECK:        b 131071
+# CHECK: error: branch target out of range
+# CHECK:        b 131072
+
+# CHECK: error: branch to misaligned address
+# CHECK:        beq $1, $1, -131069
+# CHECK: error: branch to misaligned address
+# CHECK:        beq $1, $1, -131070
+# CHECK: error: branch to misaligned address
+# CHECK:        beq $1, $1, -131071
+# CHECK: error: branch target out of range
+# CHECK:        beq $1, $1, -131073
+# CHECK: error: branch to misaligned address
+# CHECK:        beq $1, $1, 131069
+# CHECK: error: branch to misaligned address
+# CHECK:        beq $1, $1, 131070
+# CHECK: error: branch to misaligned address
+# CHECK:        beq $1, $1, 131071
+# CHECK: error: branch target out of range
+# CHECK:        beq $1, $1, 131072
+
+# CHECK: error: branch to misaligned address
+# CHECK:        bne $1, $1, -131069
+# CHECK: error: branch to misaligned address
+# CHECK:        bne $1, $1, -131070
+# CHECK: error: branch to misaligned address
+# CHECK:        bne $1, $1, -131071
+# CHECK: error: branch target out of range
+# CHECK:        bne $1, $1, -131073
+# CHECK: error: branch to misaligned address
+# CHECK:        bne $1, $1, 131069
+# CHECK: error: branch to misaligned address
+# CHECK:        bne $1, $1, 131070
+# CHECK: error: branch to misaligned address
+# CHECK:        bne $1, $1, 131071
+# CHECK: error: branch target out of range
+# CHECK:        bne $1, $1, 131072
+
+# CHECK: error: branch to misaligned address
+# CHECK:        bal -131069
+# CHECK: error: branch to misaligned address
+# CHECK:        bal -131070
+# CHECK: error: branch to misaligned address
+# CHECK:        bal -131071
+# CHECK: error: branch target out of range
+# CHECK:        bal -131073
+# CHECK: error: branch to misaligned address
+# CHECK:        bal 131069
+# CHECK: error: branch to misaligned address
+# CHECK:        bal 131070
+# CHECK: error: branch to misaligned address
+# CHECK:        bal 131071
+# CHECK: error: branch target out of range
+# CHECK:        bal 131072
+
+# CHECK: error: branch to misaligned address
+# CHECK:        bgez $1, -131069
+# CHECK: error: branch to misaligned address
+# CHECK:        bgez $1, -131070
+# CHECK: error: branch to misaligned address
+# CHECK:        bgez $1, -131071
+# CHECK: error: branch target out of range
+# CHECK:        bgez $1, -131073
+# CHECK: error: branch to misaligned address
+# CHECK:        bgez $1, 131069
+# CHECK: error: branch to misaligned address
+# CHECK:        bgez $1, 131070
+# CHECK: error: branch to misaligned address
+# CHECK:        bgez $1, 131071
+# CHECK: error: branch target out of range
+# CHECK:        bgez $1, 131072
+
+# CHECK: error: branch to misaligned address
+# CHECK:        bgtz $1, -131069
+# CHECK: error: branch to misaligned address
+# CHECK:        bgtz $1, -131070
+# CHECK: error: branch to misaligned address
+# CHECK:        bgtz $1, -131071
+# CHECK: error: branch target out of range
+# CHECK:        bgtz $1, -131073
+# CHECK: error: branch to misaligned address
+# CHECK:        bgtz $1, 131069
+# CHECK: error: branch to misaligned address
+# CHECK:        bgtz $1, 131070
+# CHECK: error: branch to misaligned address
+# CHECK:        bgtz $1, 131071
+# CHECK: error: branch target out of range
+# CHECK:        bgtz $1, 131072
+
+# CHECK: error: branch to misaligned address
+# CHECK:        blez $1, -131069
+# CHECK: error: branch to misaligned address
+# CHECK:        blez $1, -131070
+# CHECK: error: branch to misaligned address
+# CHECK:        blez $1, -131071
+# CHECK: error: branch target out of range
+# CHECK:        blez $1, -131073
+# CHECK: error: branch to misaligned address
+# CHECK:        blez $1, 131069
+# CHECK: error: branch to misaligned address
+# CHECK:        blez $1, 131070
+# CHECK: error: branch to misaligned address
+# CHECK:        blez $1, 131071
+# CHECK: error: branch target out of range
+# CHECK:        blez $1, 131072
+
+# CHECK: error: branch to misaligned address
+# CHECK:        bltz $1, -131069
+# CHECK: error: branch to misaligned address
+# CHECK:        bltz $1, -131070
+# CHECK: error: branch to misaligned address
+# CHECK:        bltz $1, -131071
+# CHECK: error: branch target out of range
+# CHECK:        bltz $1, -131073
+# CHECK: error: branch to misaligned address
+# CHECK:        bltz $1, 131069
+# CHECK: error: branch to misaligned address
+# CHECK:        bltz $1, 131070
+# CHECK: error: branch to misaligned address
+# CHECK:        bltz $1, 131071
+# CHECK: error: branch target out of range
+# CHECK:        bltz $1, 131072
+
+# CHECK: error: branch to misaligned address
+# CHECK:        bgezal $1, -131069
+# CHECK: error: branch to misaligned address
+# CHECK:        bgezal $1, -131070
+# CHECK: error: branch to misaligned address
+# CHECK:        bgezal $1, -131071
+# CHECK: error: branch target out of range
+# CHECK:        bgezal $1, -131073
+# CHECK: error: branch to misaligned address
+# CHECK:        bgezal $1, 131069
+# CHECK: error: branch to misaligned address
+# CHECK:        bgezal $1, 131070
+# CHECK: error: branch to misaligned address
+# CHECK:        bgezal $1, 131071
+# CHECK: error: branch target out of range
+# CHECK:        bgezal $1, 131072
+
+# CHECK: error: branch to misaligned address
+# CHECK:        bltzal $1, -131069
+# CHECK: error: branch to misaligned address
+# CHECK:        bltzal $1, -131070
+# CHECK: error: branch to misaligned address
+# CHECK:        bltzal $1, -131071
+# CHECK: error: branch target out of range
+# CHECK:        bltzal $1, -131073
+# CHECK: error: branch to misaligned address
+# CHECK:        bltzal $1, 131069
+# CHECK: error: branch to misaligned address
+# CHECK:        bltzal $1, 131070
+# CHECK: error: branch to misaligned address
+# CHECK:        bltzal $1, 131071
+# CHECK: error: branch target out of range
+# CHECK:        bltzal $1, 131072
+
+# CHECK: error: branch to misaligned address
+# CHECK:        bc1f -131069
+# CHECK: error: branch to misaligned address
+# CHECK:        bc1f -131070
+# CHECK: error: branch to misaligned address
+# CHECK:        bc1f -131071
+# CHECK: error: branch target out of range
+# CHECK:        bc1f -131073
+# CHECK: error: branch to misaligned address
+# CHECK:        bc1f 131069
+# CHECK: error: branch to misaligned address
+# CHECK:        bc1f 131070
+# CHECK: error: branch to misaligned address
+# CHECK:        bc1f 131071
+# CHECK: error: branch target out of range
+# CHECK:        bc1f 131072
+
+# CHECK: error: branch to misaligned address
+# CHECK:        bc1f $fcc0, -131069
+# CHECK: error: branch to misaligned address
+# CHECK:        bc1f $fcc0, -131070
+# CHECK: error: branch to misaligned address
+# CHECK:        bc1f $fcc0, -131071
+# CHECK: error: branch target out of range
+# CHECK:        bc1f $fcc0, -131073
+# CHECK: error: branch to misaligned address
+# CHECK:        bc1f $fcc0, 131069
+# CHECK: error: branch to misaligned address
+# CHECK:        bc1f $fcc0, 131070
+# CHECK: error: branch to misaligned address
+# CHECK:        bc1f $fcc0, 131071
+# CHECK: error: branch target out of range
+# CHECK:        bc1f $fcc0, 131072
+
+# CHECK: error: branch to misaligned address
+# CHECK:        bc1t -131069
+# CHECK: error: branch to misaligned address
+# CHECK:        bc1t -131070
+# CHECK: error: branch to misaligned address
+# CHECK:        bc1t -131071
+# CHECK: error: branch target out of range
+# CHECK:        bc1t -131073
+# CHECK: error: branch to misaligned address
+# CHECK:        bc1t 131069
+# CHECK: error: branch to misaligned address
+# CHECK:        bc1t 131070
+# CHECK: error: branch to misaligned address
+# CHECK:        bc1t 131071
+# CHECK: error: branch target out of range
+# CHECK:        bc1t 131072
+
+# CHECK: error: branch to misaligned address
+# CHECK:        bc1t $fcc0, -131069
+# CHECK: error: branch to misaligned address
+# CHECK:        bc1t $fcc0, -131070
+# CHECK: error: branch to misaligned address
+# CHECK:        bc1t $fcc0, -131071
+# CHECK: error: branch target out of range
+# CHECK:        bc1t $fcc0, -131073
+# CHECK: error: branch to misaligned address
+# CHECK:        bc1t $fcc0, 131069
+# CHECK: error: branch to misaligned address
+# CHECK:        bc1t $fcc0, 131070
+# CHECK: error: branch to misaligned address
+# CHECK:        bc1t $fcc0, 131071
+# CHECK: error: branch target out of range
+# CHECK:        bc1t $fcc0, 131072
+
+.text
+.set noat
+  b -131068
+  b -131069
+  b -131070
+  b -131071
+  b -131072
+  b -131073
+  b 131068
+  b 131069
+  b 131070
+  b 131071
+  b 131072
+
+  beq $1, $1, -131068
+  beq $1, $1, -131069
+  beq $1, $1, -131070
+  beq $1, $1, -131071
+  beq $1, $1, -131072
+  beq $1, $1, -131073
+  beq $1, $1, 131068
+  beq $1, $1, 131069
+  beq $1, $1, 131070
+  beq $1, $1, 131071
+  beq $1, $1, 131072
+
+  bne $1, $1, -131068
+  bne $1, $1, -131069
+  bne $1, $1, -131070
+  bne $1, $1, -131071
+  bne $1, $1, -131072
+  bne $1, $1, -131073
+  bne $1, $1, 131068
+  bne $1, $1, 131069
+  bne $1, $1, 131070
+  bne $1, $1, 131071
+  bne $1, $1, 131072
+
+  bal -131068
+  bal -131069
+  bal -131070
+  bal -131071
+  bal -131072
+  bal -131073
+  bal 131068
+  bal 131069
+  bal 131070
+  bal 131071
+  bal 131072
+
+  bgez $1, -131068
+  bgez $1, -131069
+  bgez $1, -131070
+  bgez $1, -131071
+  bgez $1, -131072
+  bgez $1, -131073
+  bgez $1, 131068
+  bgez $1, 131069
+  bgez $1, 131070
+  bgez $1, 131071
+  bgez $1, 131072
+
+  bgtz $1, -131068
+  bgtz $1, -131069
+  bgtz $1, -131070
+  bgtz $1, -131071
+  bgtz $1, -131072
+  bgtz $1, -131073
+  bgtz $1, 131068
+  bgtz $1, 131069
+  bgtz $1, 131070
+  bgtz $1, 131071
+  bgtz $1, 131072
+
+  blez $1, -131068
+  blez $1, -131069
+  blez $1, -131070
+  blez $1, -131071
+  blez $1, -131072
+  blez $1, -131073
+  blez $1, 131068
+  blez $1, 131069
+  blez $1, 131070
+  blez $1, 131071
+  blez $1, 131072
+
+  bltz $1, -131068
+  bltz $1, -131069
+  bltz $1, -131070
+  bltz $1, -131071
+  bltz $1, -131072
+  bltz $1, -131073
+  bltz $1, 131068
+  bltz $1, 131069
+  bltz $1, 131070
+  bltz $1, 131071
+  bltz $1, 131072
+
+  bgezal $1, -131068
+  bgezal $1, -131069
+  bgezal $1, -131070
+  bgezal $1, -131071
+  bgezal $1, -131072
+  bgezal $1, -131073
+  bgezal $1, 131068
+  bgezal $1, 131069
+  bgezal $1, 131070
+  bgezal $1, 131071
+  bgezal $1, 131072
+
+  bltzal $1, -131068
+  bltzal $1, -131069
+  bltzal $1, -131070
+  bltzal $1, -131071
+  bltzal $1, -131072
+  bltzal $1, -131073
+  bltzal $1, 131068
+  bltzal $1, 131069
+  bltzal $1, 131070
+  bltzal $1, 131071
+  bltzal $1, 131072
+
+  bc1f -131068
+  bc1f -131069
+  bc1f -131070
+  bc1f -131071
+  bc1f -131072
+  bc1f -131073
+  bc1f 131068
+  bc1f 131069
+  bc1f 131070
+  bc1f 131071
+  bc1f 131072
+
+  bc1f $fcc0, -131068
+  bc1f $fcc0, -131069
+  bc1f $fcc0, -131070
+  bc1f $fcc0, -131071
+  bc1f $fcc0, -131072
+  bc1f $fcc0, -131073
+  bc1f $fcc0, 131068
+  bc1f $fcc0, 131069
+  bc1f $fcc0, 131070
+  bc1f $fcc0, 131071
+  bc1f $fcc0, 131072
+
+  bc1t -131068
+  bc1t -131069
+  bc1t -131070
+  bc1t -131071
+  bc1t -131072
+  bc1t -131073
+  bc1t 131068
+  bc1t 131069
+  bc1t 131070
+  bc1t 131071
+  bc1t 131072
+
+  bc1t $fcc0, -131068
+  bc1t $fcc0, -131069
+  bc1t $fcc0, -131070
+  bc1t $fcc0, -131071
+  bc1t $fcc0, -131072
+  bc1t $fcc0, -131073
+  bc1t $fcc0, 131068
+  bc1t $fcc0, 131069
+  bc1t $fcc0, 131070
+  bc1t $fcc0, 131071
+  bc1t $fcc0, 131072
diff --git a/test/MC/Mips/mips-data-directives.s b/test/MC/Mips/mips-data-directives.s
new file mode 100644
index 0000000..630a807
--- /dev/null
+++ b/test/MC/Mips/mips-data-directives.s
@@ -0,0 +1,36 @@
+# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 | \
+# RUN:   FileCheck %s -check-prefix=CHECK-ASM
+#
+# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -filetype=obj -o - | \
+# RUN:   llvm-readobj -sections -section-data -section-relocations - | \
+# RUN:     FileCheck %s -check-prefix=CHECK-OBJ
+
+# CHECK-ASM: .4byte 3735929054
+# CHECK-ASM: .8byte -2401050962867405073
+# CHECK-ASM: .4byte label
+# CHECK-ASM: .8byte label
+
+# Checking if the data and reloations were correctly emitted
+# CHECK-OBJ:  Section {
+# CHECK-OBJ:    Name: .data (51)
+# CHECK-OBJ:    SectionData (
+# CHECK-OBJ:      0000: DEADC0DE DEADC0DE DEADBEEF 00000000
+# CHECK-OBJ:      0010: 00000000 00000000
+# CHECK-OBJ:    )
+# CHECK-OBJ:  }
+
+# CHECK-OBJ:  Section {
+# CHECK-OBJ:    Name: .rel.data (47)
+# CHECK-OBJ:    Relocations [
+# CHECK-OBJ:      0xC R_MIPS_32 .data 0x0
+# CHECK-OBJ:      0x10 R_MIPS_64 .data 0x0
+# CHECK-OBJ:    ]
+# CHECK-OBJ:  }
+
+.data
+label:
+        .word 0xdeadc0de
+        .dword 0xdeadc0dedeadbeef
+
+        .word label
+        .dword label
diff --git a/test/MC/Mips/mips-diagnostic-fixup.s b/test/MC/Mips/mips-diagnostic-fixup.s
new file mode 100644
index 0000000..864d739
--- /dev/null
+++ b/test/MC/Mips/mips-diagnostic-fixup.s
@@ -0,0 +1,10 @@
+# RUN: not llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 -arch=mips 2>&1 -filetype=obj | FileCheck %s
+#
+# CHECK: LLVM ERROR: out of range PC16 fixup
+
+.text
+  b foo
+  .space 131072 - 8, 1  # -8 = size of b instr plus size of automatically inserted nop
+  nop                   # This instr makes the branch too long to fit into a 18-bit offset
+foo:
+  add $0,$0,$0
diff --git a/test/MC/Mips/mips-jump-instructions.s b/test/MC/Mips/mips-jump-instructions.s
index 989826a..596c8a2 100644
--- a/test/MC/Mips/mips-jump-instructions.s
+++ b/test/MC/Mips/mips-jump-instructions.s
@@ -101,12 +101,16 @@ end_of_code:
 # CHECK32:   nop                  # encoding: [0x00,0x00,0x00,0x00]
 # CHECK32:   jr $7                # encoding: [0x08,0x00,0xe0,0x00]
 # CHECK32:   nop                  # encoding: [0x00,0x00,0x00,0x00]
+# CHECK32:lab:
 # CHECK32:   jr $7                # encoding: [0x08,0x00,0xe0,0x00]
 # CHECK32:   nop                  # encoding: [0x00,0x00,0x00,0x00]
 # CHECK32:   jalr  $25            # encoding: [0x09,0xf8,0x20,0x03]
 # CHECK32:   nop                  # encoding: [0x00,0x00,0x00,0x00]
 # CHECK32:   jalr  $4, $25        # encoding: [0x09,0x20,0x20,0x03]
 # CHECK32:   nop                  # encoding: [0x00,0x00,0x00,0x00]
+# CHECK32:   jalx    lab          # encoding: [A,A,A,0b011101AA]
+# CHECK32:                        #   fixup A - offset: 0, value: lab, kind: fixup_Mips_26
+# CHECK32:   nop                  # encoding: [0x00,0x00,0x00,0x00]
 
 # CHECK64:   j 1328               # encoding: [0x4c,0x01,0x00,0x08]
 # CHECK64:   nop                  # encoding: [0x00,0x00,0x00,0x00]
@@ -120,13 +124,16 @@ end_of_code:
 # CHECK64:   nop                  # encoding: [0x00,0x00,0x00,0x00]
 # CHECK64:   jr $7                # encoding: [0x08,0x00,0xe0,0x00]
 # CHECK64:   nop                  # encoding: [0x00,0x00,0x00,0x00]
+# CHECK64:lab:
 # CHECK64:   jr $7                # encoding: [0x08,0x00,0xe0,0x00]
 # CHECK64:   nop                  # encoding: [0x00,0x00,0x00,0x00]
 # CHECK64:   jalr  $25            # encoding: [0x09,0xf8,0x20,0x03]
 # CHECK64:   nop                  # encoding: [0x00,0x00,0x00,0x00]
 # CHECK64:   jalr  $4, $25        # encoding: [0x09,0x20,0x20,0x03]
 # CHECK64:   nop                  # encoding: [0x00,0x00,0x00,0x00]
-
+# CHECK64:   jalx    lab          # encoding: [A,A,A,0b011101AA]
+# CHECK64:                        #   fixup A - offset: 0, value: lab, kind: fixup_Mips_26
+# CHECK64:   nop                  # encoding: [0x00,0x00,0x00,0x00]
 
    j 1328
    nop
@@ -140,9 +147,12 @@ end_of_code:
    nop
    jr $7
    nop
+lab:
    j $7
    nop
    jal  $25
    nop
    jal  $4,$25
    nop
+   jalx lab
+   nop
diff --git a/test/MC/Mips/mips-noat.s b/test/MC/Mips/mips-noat.s
new file mode 100644
index 0000000..b83c517
--- /dev/null
+++ b/test/MC/Mips/mips-noat.s
@@ -0,0 +1,34 @@
+# RUN: not llvm-mc %s -triple=mips-unknown-linux 2>%t0 | FileCheck %s
+# RUN: FileCheck -check-prefix=ERROR %s < %t0
+# Check that using the assembler temporary when .set noat is in effect is an error.
+
+# We start with the assembler temporary enabled
+# CHECK-LABEL: test1:
+# CHECK:  lui   $1, 1
+# CHECK:  addu  $1, $1, $2
+# CHECK:  lw    $2, 0($1)
+test1:
+        lw      $2, 65536($2)
+
+# FIXME: It would be better if the error pointed at the mnemonic instead of the newline
+# ERROR: mips-noat.s:[[@LINE+4]]:1: error: Pseudo instruction requires $at, which is not available
+test2:
+        .set noat
+        lw      $2, 65536($2)
+
+# Can we switch it back on successfully?
+# CHECK-LABEL: test3:
+# CHECK:  lui   $1, 1
+# CHECK:  addu  $1, $1, $2
+# CHECK:  lw    $2, 0($1)
+test3:
+        .set at
+        lw      $2, 65536($2)
+
+# FIXME: It would be better if the error pointed at the mnemonic instead of the newline
+# ERROR: mips-noat.s:[[@LINE+4]]:1: error: Pseudo instruction requires $at, which is not available
+test4:
+        .set at=$0
+        lw      $2, 65536($2)
+
+# ERROR-NOT: error
diff --git a/test/MC/Mips/mips-pc16-fixup.s b/test/MC/Mips/mips-pc16-fixup.s
new file mode 100644
index 0000000..5443532
--- /dev/null
+++ b/test/MC/Mips/mips-pc16-fixup.s
@@ -0,0 +1,10 @@
+# RUN: llvm-mc %s -triple=mips-unknown-linux -mcpu=mips32r2 -arch=mips 2>&1 -filetype=obj | FileCheck %s
+#
+# CHECK-NOT: LLVM ERROR: out of range PC16 fixup
+
+.text
+  b foo
+  .space 131072 - 8, 1  # -8 = size of b instr plus size of automatically inserted nop
+foo:
+  add $0,$0,$0
+
diff --git a/test/MC/Mips/mips-register-names-invalid.s b/test/MC/Mips/mips-register-names-invalid.s
new file mode 100644
index 0000000..e6f8416
--- /dev/null
+++ b/test/MC/Mips/mips-register-names-invalid.s
@@ -0,0 +1,8 @@
+# RUN: not llvm-mc %s -triple=mips-unknown-freebsd -show-encoding 2>%t0
+# RUN: FileCheck %s < %t0
+
+# $32 used to trigger an assertion instead of the usual error message due to
+# an off-by-one bug.
+
+# CHECK: :[[@LINE+1]]:17: error: invalid operand for instruction
+        add     $32, $0, $0
diff --git a/test/MC/Mips/mips-register-names-o32.s b/test/MC/Mips/mips-register-names-o32.s
new file mode 100644
index 0000000..c1e3024
--- /dev/null
+++ b/test/MC/Mips/mips-register-names-o32.s
@@ -0,0 +1,40 @@
+# RUN: llvm-mc %s -triple=mips-unknown-freebsd -show-encoding | FileCheck %s
+
+# Check that the register names are mapped to their correct numbers for o32
+# Second byte of addiu with $zero at rt contains the number of the source
+# register.
+
+.set noat
+addiu	$zero, $zero, 0 # CHECK: encoding: [0x24,0x00,0x00,0x00]
+addiu	$at, $zero, 0   # CHECK: encoding: [0x24,0x01,0x00,0x00]
+addiu	$v0, $zero, 0   # CHECK: encoding: [0x24,0x02,0x00,0x00]
+addiu	$v1, $zero, 0   # CHECK: encoding: [0x24,0x03,0x00,0x00]
+addiu	$a0, $zero, 0   # CHECK: encoding: [0x24,0x04,0x00,0x00]
+addiu	$a1, $zero, 0   # CHECK: encoding: [0x24,0x05,0x00,0x00]
+addiu	$a2, $zero, 0   # CHECK: encoding: [0x24,0x06,0x00,0x00]
+addiu	$a3, $zero, 0   # CHECK: encoding: [0x24,0x07,0x00,0x00]
+addiu	$t0, $zero, 0   # CHECK: encoding: [0x24,0x08,0x00,0x00]
+addiu	$t1, $zero, 0   # CHECK: encoding: [0x24,0x09,0x00,0x00]
+addiu	$t2, $zero, 0   # CHECK: encoding: [0x24,0x0a,0x00,0x00]
+addiu	$t3, $zero, 0   # CHECK: encoding: [0x24,0x0b,0x00,0x00]
+addiu	$t4, $zero, 0   # CHECK: encoding: [0x24,0x0c,0x00,0x00]
+addiu	$t5, $zero, 0   # CHECK: encoding: [0x24,0x0d,0x00,0x00]
+addiu	$t6, $zero, 0   # CHECK: encoding: [0x24,0x0e,0x00,0x00]
+addiu	$t7, $zero, 0   # CHECK: encoding: [0x24,0x0f,0x00,0x00]
+addiu	$s0, $zero, 0   # CHECK: encoding: [0x24,0x10,0x00,0x00]
+addiu	$s1, $zero, 0   # CHECK: encoding: [0x24,0x11,0x00,0x00]
+addiu	$s2, $zero, 0   # CHECK: encoding: [0x24,0x12,0x00,0x00]
+addiu	$s3, $zero, 0   # CHECK: encoding: [0x24,0x13,0x00,0x00]
+addiu	$s4, $zero, 0   # CHECK: encoding: [0x24,0x14,0x00,0x00]
+addiu	$s5, $zero, 0   # CHECK: encoding: [0x24,0x15,0x00,0x00]
+addiu	$s6, $zero, 0   # CHECK: encoding: [0x24,0x16,0x00,0x00]
+addiu	$s7, $zero, 0   # CHECK: encoding: [0x24,0x17,0x00,0x00]
+addiu	$t8, $zero, 0   # CHECK: encoding: [0x24,0x18,0x00,0x00]
+addiu	$t9, $zero, 0   # CHECK: encoding: [0x24,0x19,0x00,0x00]
+addiu	$k0, $zero, 0   # CHECK: encoding: [0x24,0x1a,0x00,0x00]
+addiu	$k1, $zero, 0   # CHECK: encoding: [0x24,0x1b,0x00,0x00]
+addiu	$gp, $zero, 0   # CHECK: encoding: [0x24,0x1c,0x00,0x00]
+addiu	$sp, $zero, 0   # CHECK: encoding: [0x24,0x1d,0x00,0x00]
+addiu	$fp, $zero, 0   # CHECK: encoding: [0x24,0x1e,0x00,0x00]
+addiu	$s8, $zero, 0   # CHECK: encoding: [0x24,0x1e,0x00,0x00]
+addiu	$ra, $zero, 0   # CHECK: encoding: [0x24,0x1f,0x00,0x00]
diff --git a/test/MC/Mips/mips-register-names.s b/test/MC/Mips/mips-register-names.s
deleted file mode 100644
index 26187ce..0000000
--- a/test/MC/Mips/mips-register-names.s
+++ /dev/null
@@ -1,71 +0,0 @@
-# RUN: llvm-mc %s -triple=mips-unknown-freebsd -show-encoding | FileCheck %s
-
-# Check that the register names are mapped to their correct numbers for o32
-# Second byte of addiu with $zero at rt contains the number of the source
-# register.
-
-# CHECK: encoding: [0x24,0x00,0x00,0x00]
-# CHECK: encoding: [0x24,0x01,0x00,0x00]
-# CHECK: encoding: [0x24,0x02,0x00,0x00]
-# CHECK: encoding: [0x24,0x03,0x00,0x00]
-# CHECK: encoding: [0x24,0x04,0x00,0x00]
-# CHECK: encoding: [0x24,0x05,0x00,0x00]
-# CHECK: encoding: [0x24,0x06,0x00,0x00]
-# CHECK: encoding: [0x24,0x07,0x00,0x00]
-# CHECK: encoding: [0x24,0x08,0x00,0x00]
-# CHECK: encoding: [0x24,0x09,0x00,0x00]
-# CHECK: encoding: [0x24,0x0a,0x00,0x00]
-# CHECK: encoding: [0x24,0x0b,0x00,0x00]
-# CHECK: encoding: [0x24,0x0c,0x00,0x00]
-# CHECK: encoding: [0x24,0x0d,0x00,0x00]
-# CHECK: encoding: [0x24,0x0e,0x00,0x00]
-# CHECK: encoding: [0x24,0x0f,0x00,0x00]
-# CHECK: encoding: [0x24,0x10,0x00,0x00]
-# CHECK: encoding: [0x24,0x11,0x00,0x00]
-# CHECK: encoding: [0x24,0x12,0x00,0x00]
-# CHECK: encoding: [0x24,0x13,0x00,0x00]
-# CHECK: encoding: [0x24,0x14,0x00,0x00]
-# CHECK: encoding: [0x24,0x15,0x00,0x00]
-# CHECK: encoding: [0x24,0x16,0x00,0x00]
-# CHECK: encoding: [0x24,0x17,0x00,0x00]
-# CHECK: encoding: [0x24,0x18,0x00,0x00]
-# CHECK: encoding: [0x24,0x19,0x00,0x00]
-# CHECK: encoding: [0x24,0x1a,0x00,0x00]
-# CHECK: encoding: [0x24,0x1b,0x00,0x00]
-# CHECK: encoding: [0x24,0x1c,0x00,0x00]
-# CHECK: encoding: [0x24,0x1d,0x00,0x00]
-# CHECK: encoding: [0x24,0x1e,0x00,0x00]
-# CHECK: encoding: [0x24,0x1f,0x00,0x00]
-addiu	$zero, $zero, 0
-addiu	$at, $zero, 0
-addiu	$v0, $zero, 0
-addiu	$v1, $zero, 0
-addiu	$a0, $zero, 0
-addiu	$a1, $zero, 0
-addiu	$a2, $zero, 0
-addiu	$a3, $zero, 0
-addiu	$t0, $zero, 0
-addiu	$t1, $zero, 0
-addiu	$t2, $zero, 0
-addiu	$t3, $zero, 0
-addiu	$t4, $zero, 0
-addiu	$t5, $zero, 0
-addiu	$t6, $zero, 0
-addiu	$t7, $zero, 0
-addiu	$s0, $zero, 0
-addiu	$s1, $zero, 0
-addiu	$s2, $zero, 0
-addiu	$s3, $zero, 0
-addiu	$s4, $zero, 0
-addiu	$s5, $zero, 0
-addiu	$s6, $zero, 0
-addiu	$s7, $zero, 0
-addiu	$t8, $zero, 0
-addiu	$t9, $zero, 0
-addiu	$k0, $zero, 0
-addiu	$k1, $zero, 0
-addiu	$gp, $zero, 0
-addiu	$sp, $zero, 0
-addiu	$fp, $zero, 0
-addiu	$sp, $zero, 0
-addiu	$ra, $zero, 0
diff --git a/test/MC/Mips/mips1/valid-xfail.s b/test/MC/Mips/mips1/valid-xfail.s
new file mode 100644
index 0000000..2ffeaa9
--- /dev/null
+++ b/test/MC/Mips/mips1/valid-xfail.s
@@ -0,0 +1,17 @@
+# Instructions that should be valid but currently fail for known reasons (e.g.
+# they aren't implemented yet).
+# This test is set up to XPASS if any instruction generates an encoding.
+#
+# FIXME: Test MIPS-I instead of MIPS32
+# RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32 | not FileCheck %s
+# CHECK-NOT: encoding
+# XFAIL: *
+
+	.set noat
+	tlbp
+	tlbr
+	tlbwi
+	tlbwr
+	lwc0	c0_entrylo,-7321($s2)
+	lwc3	$10,-32265($k0)
+	swc0	c0_prid,18904($s3)
diff --git a/test/MC/Mips/mips1/valid.s b/test/MC/Mips/mips1/valid.s
new file mode 100644
index 0000000..7fc866a
--- /dev/null
+++ b/test/MC/Mips/mips1/valid.s
@@ -0,0 +1,85 @@
+# Instructions that are valid
+#
+# FIXME: Test MIPS-I instead of MIPS32
+# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32 | FileCheck %s
+
+	.set noat
+	abs.d	$f7,$f25          # CHECK: encoding:
+	abs.s	$f9,$f16
+	add	$s7,$s2,$a1
+	add.d	$f1,$f7,$f29
+	add.s	$f8,$f21,$f24
+	addi	$t5,$t1,26322
+	addu	$t1,$a0,$a2
+	and	$s7,$v0,$t4
+	c.ngl.d	$f29,$f29
+	c.ngle.d	$f0,$f16
+	c.sf.d	$f30,$f0
+	c.sf.s	$f14,$f22
+	cfc1	$s1,$21
+	ctc1	$a2,$26
+	cvt.d.s	$f22,$f28
+	cvt.d.w	$f26,$f11
+	cvt.s.d	$f26,$f8
+	cvt.s.w	$f22,$f15
+	cvt.w.d	$f20,$f14
+	cvt.w.s	$f20,$f24
+	div	$zero,$t9,$t3
+	div.d	$f29,$f20,$f27
+	div.s	$f4,$f5,$f15
+	divu	$zero,$t9,$t7
+	ehb                      # CHECK: ehb # encoding:  [0x00,0x00,0x00,0xc0]
+	lb	$t8,-14515($t2)
+	lbu	$t0,30195($v1)
+	lh	$t3,-8556($s5)
+	lhu	$s3,-22851($v0)
+	li	$at,-29773
+	li	$zero,-29889
+	lw	$t0,5674($a1)
+	lwc1	$f16,10225($k0)
+	lwc2	$18,-841($a2)
+	lwl	$s4,-4231($t7)
+	lwr	$zero,-19147($gp)
+	mfc1	$a3,$f27
+	mfhi	$s3
+	mfhi	$sp
+	mflo	$s1
+	mov.d	$f20,$f14
+	mov.s	$f2,$f27
+	move	$s8,$a0
+	move	$t9,$a2
+	mtc1	$s8,$f9
+	mthi	$s1
+	mtlo	$sp
+	mtlo	$t9
+	mul.d	$f20,$f20,$f16
+	mul.s	$f30,$f10,$f2
+	mult	$sp,$s4
+	mult	$sp,$v0
+	multu	$gp,$k0
+	multu	$t1,$s2
+	neg.d	$f27,$f18
+	neg.s	$f1,$f15
+	nop
+	nor	$a3,$zero,$a3
+	or	$t4,$s0,$sp
+	sb	$s6,-19857($t6)
+	sh	$t6,-6704($t7)
+	sllv	$a3,$zero,$t1
+	slt	$s7,$t3,$k1
+	slti	$s1,$t2,9489
+	sltiu	$t9,$t9,-15531
+	sltu	$s4,$s5,$t3
+	srav	$s1,$s7,$sp
+	srlv	$t9,$s4,$a0
+	ssnop                    # CHECK: ssnop # encoding:  [0x00,0x00,0x00,0x40]
+	sub	$s6,$s3,$t4
+	sub.d	$f18,$f3,$f17
+	sub.s	$f23,$f22,$f22
+	subu	$sp,$s6,$s6
+	sw	$ra,-10160($sp)
+	swc1	$f6,-8465($t8)
+	swc2	$25,24880($s0)
+	swl	$t7,13694($s3)
+	swr	$s1,-26590($t6)
+	xor	$s2,$a0,$s8
diff --git a/test/MC/Mips/mips2/valid-xfail.s b/test/MC/Mips/mips2/valid-xfail.s
new file mode 100644
index 0000000..2f82f5c
--- /dev/null
+++ b/test/MC/Mips/mips2/valid-xfail.s
@@ -0,0 +1,17 @@
+# Instructions that should be valid but currently fail for known reasons (e.g.
+# they aren't implemented yet).
+# This test is set up to XPASS if any instruction generates an encoding.
+#
+# FIXME: Test MIPS-II instead of MIPS32
+# RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32 | not FileCheck %s
+# CHECK-NOT: encoding
+# XFAIL: *
+
+	.set noat
+	ldc3	$29,-28645($s1)
+	lwc3	$10,-32265($k0)
+	sdc3	$12,5835($t2)
+	tlbp
+	tlbr
+	tlbwi
+	tlbwr
diff --git a/test/MC/Mips/mips2/valid.s b/test/MC/Mips/mips2/valid.s
new file mode 100644
index 0000000..1a05040
--- /dev/null
+++ b/test/MC/Mips/mips2/valid.s
@@ -0,0 +1,107 @@
+# Instructions that are valid
+#
+# FIXME: Test MIPS-II instead of MIPS32
+# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32 | FileCheck %s
+
+	.set noat
+	abs.d	$f7,$f25            # CHECK: encoding
+	abs.s	$f9,$f16
+	add	$s7,$s2,$a1
+	add.d	$f1,$f7,$f29
+	add.s	$f8,$f21,$f24
+	addi	$t5,$t1,26322
+	addu	$t1,$a0,$a2
+	and	$s7,$v0,$t4
+	c.ngl.d	$f29,$f29
+	c.ngle.d	$f0,$f16
+	c.sf.d	$f30,$f0
+	c.sf.s	$f14,$f22
+	ceil.w.d	$f11,$f25
+	ceil.w.s	$f6,$f20
+	cfc1	$s1,$21
+	ctc1	$a2,$26
+	cvt.d.s	$f22,$f28
+	cvt.d.w	$f26,$f11
+	cvt.s.d	$f26,$f8
+	cvt.s.w	$f22,$f15
+	cvt.w.d	$f20,$f14
+	cvt.w.s	$f20,$f24
+	div	$zero,$t9,$t3
+	div.d	$f29,$f20,$f27
+	div.s	$f4,$f5,$f15
+	divu	$zero,$t9,$t7
+	ehb                      # CHECK: ehb # encoding:  [0x00,0x00,0x00,0xc0]
+	floor.w.d	$f14,$f11
+	floor.w.s	$f8,$f9
+	lb	$t8,-14515($t2)
+	lbu	$t0,30195($v1)
+	ldc1	$f11,16391($s0)
+	ldc2	$8,-21181($at)
+	lh	$t3,-8556($s5)
+	lhu	$s3,-22851($v0)
+	li	$at,-29773
+	li	$zero,-29889
+	ll	$v0,-7321($s2)
+	lw	$t0,5674($a1)
+	lwc1	$f16,10225($k0)
+	lwc2	$18,-841($a2)
+	lwl	$s4,-4231($t7)
+	lwr	$zero,-19147($gp)
+	mfc1	$a3,$f27
+	mfhi	$s3
+	mfhi	$sp
+	mflo	$s1
+	mov.d	$f20,$f14
+	mov.s	$f2,$f27
+	move	$s8,$a0
+	move	$t9,$a2
+	mtc1	$s8,$f9
+	mthi	$s1
+	mtlo	$sp
+	mtlo	$t9
+	mul.d	$f20,$f20,$f16
+	mul.s	$f30,$f10,$f2
+	mult	$sp,$s4
+	mult	$sp,$v0
+	multu	$gp,$k0
+	multu	$t1,$s2
+	neg.d	$f27,$f18
+	neg.s	$f1,$f15
+	nop
+	nor	$a3,$zero,$a3
+	or	$t4,$s0,$sp
+	round.w.d	$f6,$f4
+	round.w.s	$f27,$f28
+	sb	$s6,-19857($t6)
+	sc	$t7,18904($s3)
+	sdc1	$f31,30574($t5)
+	sdc2	$20,23157($s2)
+	sh	$t6,-6704($t7)
+	sllv	$a3,$zero,$t1
+	slt	$s7,$t3,$k1
+	slti	$s1,$t2,9489
+	sltiu	$t9,$t9,-15531
+	sltu	$s4,$s5,$t3
+	sqrt.d	$f17,$f22
+	sqrt.s	$f0,$f1
+	srav	$s1,$s7,$sp
+	srlv	$t9,$s4,$a0
+	ssnop                    # CHECK: ssnop # encoding:  [0x00,0x00,0x00,0x40]
+	sub	$s6,$s3,$t4
+	sub.d	$f18,$f3,$f17
+	sub.s	$f23,$f22,$f22
+	subu	$sp,$s6,$s6
+	sw	$ra,-10160($sp)
+	swc1	$f6,-8465($t8)
+	swc2	$25,24880($s0)
+	swl	$t7,13694($s3)
+	swr	$s1,-26590($t6)
+	teqi	$s5,-17504
+	tgei	$s1,5025
+	tgeiu	$sp,-28621
+	tlti	$t6,-21059
+	tltiu	$ra,-5076
+	tnei	$t4,-29647
+	trunc.w.d	$f22,$f15
+	trunc.w.s	$f28,$f30
+	xor	$s2,$a0,$s8
diff --git a/test/MC/Mips/mips3/valid-xfail.s b/test/MC/Mips/mips3/valid-xfail.s
new file mode 100644
index 0000000..740663e
--- /dev/null
+++ b/test/MC/Mips/mips3/valid-xfail.s
@@ -0,0 +1,15 @@
+# Instructions that should be valid but currently fail for known reasons (e.g.
+# they aren't implemented yet).
+# This test is set up to XPASS if any instruction generates an encoding.
+#
+# FIXME: Test MIPS-III instead of MIPS64
+# RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips64   | not FileCheck %s
+# CHECK-NOT: encoding
+# XFAIL: *
+
+	.set noat
+	lwc3	$10,-32265($k0)
+	tlbp
+	tlbr
+	tlbwi
+	tlbwr
diff --git a/test/MC/Mips/mips3/valid.s b/test/MC/Mips/mips3/valid.s
new file mode 100644
index 0000000..dc9b48c
--- /dev/null
+++ b/test/MC/Mips/mips3/valid.s
@@ -0,0 +1,145 @@
+# Instructions that are valid
+#
+# FIXME: Test MIPS-III instead of MIPS64
+# RUN: llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64   | FileCheck %s
+
+	.set noat
+	abs.d	$f7,$f25 # CHECK:encoding
+	abs.s	$f9,$f16
+	add	$s7,$s2,$a1
+	add.d	$f1,$f7,$f29
+	add.s	$f8,$f21,$f24
+	addi	$t5,$t1,26322
+	addu	$t1,$a0,$a2
+	and	$s7,$v0,$t4
+	c.ngl.d	$f29,$f29
+	c.ngle.d	$f0,$f16
+	c.sf.d	$f30,$f0
+	c.sf.s	$f14,$f22
+	ceil.l.d	$f1,$f3
+	ceil.l.s	$f18,$f13
+	ceil.w.d	$f11,$f25
+	ceil.w.s	$f6,$f20
+	cfc1	$s1,$21
+	ctc1	$a2,$26
+	cvt.d.l	$f4,$f16
+	cvt.d.s	$f22,$f28
+	cvt.d.w	$f26,$f11
+	cvt.l.d	$f24,$f15
+	cvt.l.s	$f11,$f29
+	cvt.s.d	$f26,$f8
+	cvt.s.l	$f15,$f30
+	cvt.s.w	$f22,$f15
+	cvt.w.d	$f20,$f14
+	cvt.w.s	$f20,$f24
+	dadd	$s3,$at,$ra
+	daddi	$sp,$s4,-27705
+	daddiu	$k0,$s6,-4586
+	ddiv	$zero,$k0,$s3
+	ddivu	$zero,$s0,$s1
+	div	$zero,$t9,$t3
+	div.d	$f29,$f20,$f27
+	div.s	$f4,$f5,$f15
+	divu	$zero,$t9,$t7
+	dmfc1	$t4,$f13
+	dmtc1	$s0,$f14
+	dmult	$s7,$t1
+	dmultu	$a1,$a2
+	dsllv	$zero,$s4,$t4
+	dsrav	$gp,$s2,$s3
+	dsrlv	$s3,$t6,$s4
+	dsub	$a3,$s6,$t0
+	dsubu	$a1,$a1,$k0
+	ehb                      # CHECK: ehb # encoding:  [0x00,0x00,0x00,0xc0]
+	eret
+	floor.l.d	$f26,$f7
+	floor.l.s	$f12,$f5
+	floor.w.d	$f14,$f11
+	floor.w.s	$f8,$f9
+	lb	$t8,-14515($t2)
+	lbu	$t0,30195($v1)
+	ld	$sp,-28645($s1)
+	ldc1	$f11,16391($s0)
+	ldc2	$8,-21181($at)
+	ldl	$t8,-4167($t8)
+	ldr	$t6,-30358($s4)
+	lh	$t3,-8556($s5)
+	lhu	$s3,-22851($v0)
+	li	$at,-29773
+	li	$zero,-29889
+	ll	$v0,-7321($s2)
+	lld	$zero,-14736($ra)
+	lw	$t0,5674($a1)
+	lwc1	$f16,10225($k0)
+	lwc2	$18,-841($a2)
+	lwl	$s4,-4231($t7)
+	lwr	$zero,-19147($gp)
+	lwu	$s3,-24086($v1)
+	mfc1	$a3,$f27
+	mfhi	$s3
+	mfhi	$sp
+	mflo	$s1
+	mov.d	$f20,$f14
+	mov.s	$f2,$f27
+	move	$a0,$a3
+	move	$s5,$a0
+	move	$s8,$a0
+	move	$t9,$a2
+	mtc1	$s8,$f9
+	mthi	$s1
+	mtlo	$sp
+	mtlo	$t9
+	mul.d	$f20,$f20,$f16
+	mul.s	$f30,$f10,$f2
+	mult	$sp,$s4
+	mult	$sp,$v0
+	multu	$gp,$k0
+	multu	$t1,$s2
+	neg.d	$f27,$f18
+	neg.s	$f1,$f15
+	nop
+	nor	$a3,$zero,$a3
+	or	$t4,$s0,$sp
+	round.l.d	$f12,$f1
+	round.l.s	$f25,$f5
+	round.w.d	$f6,$f4
+	round.w.s	$f27,$f28
+	sb	$s6,-19857($t6)
+	sc	$t7,18904($s3)
+	scd	$t7,-8243($sp)
+	sd	$t4,5835($t2)
+	sdc1	$f31,30574($t5)
+	sdc2	$20,23157($s2)
+	sdl	$a3,-20961($s8)
+	sdr	$t3,-20423($t4)
+	sh	$t6,-6704($t7)
+	sllv	$a3,$zero,$t1
+	slt	$s7,$t3,$k1
+	slti	$s1,$t2,9489
+	sltiu	$t9,$t9,-15531
+	sltu	$s4,$s5,$t3
+	sqrt.d	$f17,$f22
+	sqrt.s	$f0,$f1
+	srav	$s1,$s7,$sp
+	srlv	$t9,$s4,$a0
+	ssnop                    # CHECK: ssnop # encoding:  [0x00,0x00,0x00,0x40]
+	sub	$s6,$s3,$t4
+	sub.d	$f18,$f3,$f17
+	sub.s	$f23,$f22,$f22
+	subu	$sp,$s6,$s6
+	sw	$ra,-10160($sp)
+	swc1	$f6,-8465($t8)
+	swc2	$25,24880($s0)
+	swl	$t7,13694($s3)
+	swr	$s1,-26590($t6)
+	teqi	$s5,-17504
+	tgei	$s1,5025
+	tgeiu	$sp,-28621
+	tlti	$t6,-21059
+	tltiu	$ra,-5076
+	tnei	$t4,-29647
+	trunc.l.d	$f23,$f23
+	trunc.l.s	$f28,$f31
+	trunc.w.d	$f22,$f15
+	trunc.w.s	$f28,$f30
+	xor	$s2,$a0,$s8
diff --git a/test/MC/Mips/mips32/invalid-mips32r2-xfail.s b/test/MC/Mips/mips32/invalid-mips32r2-xfail.s
new file mode 100644
index 0000000..73fba94
--- /dev/null
+++ b/test/MC/Mips/mips32/invalid-mips32r2-xfail.s
@@ -0,0 +1,19 @@
+# Instructions that are supposed to be invalid but currently aren't
+# This test will XPASS if any insn stops assembling.
+#
+# RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32 \
+# RUN:     2> %t1
+# RUN: not FileCheck %s < %t1
+# XFAIL: *
+
+# CHECK-NOT: error
+        .set noat
+        cvt.l.d $f24,$f15
+        cvt.l.s $f11,$f29
+        di      $s8
+        ei      $t6
+        luxc1   $f19,$s6($s5)
+        mfhc1   $s8,$f24
+        mthc1   $zero,$f16
+        rdhwr   $sp,$11
+        suxc1   $f12,$k1($t5)
diff --git a/test/MC/Mips/mips32/invalid-mips32r2.s b/test/MC/Mips/mips32/invalid-mips32r2.s
new file mode 100644
index 0000000..881f7f1
--- /dev/null
+++ b/test/MC/Mips/mips32/invalid-mips32r2.s
@@ -0,0 +1,23 @@
+# Instructions that are invalid
+#
+# RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32 \
+# RUN:     2>%t1
+# RUN: FileCheck %s < %t1
+
+        .set noat
+        ldxc1   $f8,$s7($t7)        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+        lwxc1   $f12,$s1($s8)       # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+        madd.d  $f18,$f19,$f26,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+        madd.s  $f1,$f31,$f19,$f25  # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+        msub.d  $f10,$f1,$f31,$f18  # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+        msub.s  $f12,$f19,$f10,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+        nmadd.d $f18,$f9,$f14,$f19  # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+        nmadd.s $f0,$f5,$f25,$f12   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+        nmsub.d $f30,$f8,$f16,$f30  # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+        nmsub.s $f1,$f24,$f19,$f4   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+        pause                       # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+        sdxc1   $f11,$t2($t6)       # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+        seb     $t9,$t7             # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+        seh     $v1,$t4             # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+        swxc1   $f19,$t4($k0)       # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+        wsbh    $k1,$t1             # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
diff --git a/test/MC/Mips/mips32/valid-xfail.s b/test/MC/Mips/mips32/valid-xfail.s
new file mode 100644
index 0000000..65cebd3
--- /dev/null
+++ b/test/MC/Mips/mips32/valid-xfail.s
@@ -0,0 +1,44 @@
+# Instructions that should be valid but currently fail for known reasons (e.g.
+# they aren't implemented yet).
+# This test is set up to XPASS if any instruction generates an encoding.
+#
+# RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32   | not FileCheck %s
+# CHECK-NOT: encoding
+# XFAIL: *
+
+	.set noat
+	c.eq.d	$fcc1,$f15,$f15
+	c.eq.s	$fcc5,$f24,$f17
+	c.f.d	$fcc4,$f11,$f21
+	c.f.s	$fcc4,$f30,$f7
+	c.le.d	$fcc4,$f18,$f1
+	c.le.s	$fcc6,$f24,$f4
+	c.lt.d	$fcc3,$f9,$f3
+	c.lt.s	$fcc2,$f17,$f14
+	c.nge.d	$fcc5,$f21,$f16
+	c.nge.s	$fcc3,$f11,$f8
+	c.ngl.s	$fcc2,$f31,$f23
+	c.ngle.s	$fcc2,$f18,$f23
+	c.ngt.d	$fcc4,$f24,$f7
+	c.ngt.s	$fcc5,$f8,$f13
+	c.ole.d	$fcc2,$f16,$f31
+	c.ole.s	$fcc3,$f7,$f20
+	c.olt.d	$fcc4,$f19,$f28
+	c.olt.s	$fcc6,$f20,$f7
+	c.seq.d	$fcc4,$f31,$f7
+	c.seq.s	$fcc7,$f1,$f25
+	c.ueq.d	$fcc4,$f13,$f25
+	c.ueq.s	$fcc6,$f3,$f30
+	c.ule.d	$fcc7,$f25,$f18
+	c.ule.s	$fcc7,$f21,$f30
+	c.ult.d	$fcc6,$f6,$f17
+	c.ult.s	$fcc7,$f24,$f10
+	c.un.d	$fcc6,$f23,$f24
+	c.un.s	$fcc1,$f30,$f4
+	ldc3	$29,-28645($s1)
+	rorv	$t5,$a3,$s5
+	sdc3	$12,5835($t2)
+	tlbp
+	tlbr
+	tlbwi
+	tlbwr
diff --git a/test/MC/Mips/mips32/valid.s b/test/MC/Mips/mips32/valid.s
new file mode 100644
index 0000000..9e83c0f
--- /dev/null
+++ b/test/MC/Mips/mips32/valid.s
@@ -0,0 +1,131 @@
+# Instructions that are valid
+#
+# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32   | FileCheck %s
+
+        .set noat
+	abs.d	$f7,$f25 # CHECK: encoding
+	abs.s	$f9,$f16
+	add	$s7,$s2,$a1
+	add.d	$f1,$f7,$f29
+	add.s	$f8,$f21,$f24
+	addi	$t5,$t1,26322
+	addu	$t1,$a0,$a2
+	and	$s7,$v0,$t4
+	c.ngl.d	$f29,$f29
+	c.ngle.d	$f0,$f16
+	c.sf.d	$f30,$f0
+	c.sf.s	$f14,$f22
+	ceil.w.d	$f11,$f25
+	ceil.w.s	$f6,$f20
+	cfc1	$s1,$21
+	clo	$t3,$a1
+	clz	$sp,$gp
+	ctc1	$a2,$26
+	cvt.d.s	$f22,$f28
+	cvt.d.w	$f26,$f11
+	cvt.s.d	$f26,$f8
+	cvt.s.w	$f22,$f15
+	cvt.w.d	$f20,$f14
+	cvt.w.s	$f20,$f24
+	deret
+	div	$zero,$t9,$t3
+	div.d	$f29,$f20,$f27
+	div.s	$f4,$f5,$f15
+	divu	$zero,$t9,$t7
+	ehb                      # CHECK: ehb # encoding:  [0x00,0x00,0x00,0xc0]
+	eret
+	floor.w.d	$f14,$f11
+	floor.w.s	$f8,$f9
+	lb	$t8,-14515($t2)
+	lbu	$t0,30195($v1)
+	ldc1	$f11,16391($s0)
+	ldc2	$8,-21181($at)
+	lh	$t3,-8556($s5)
+	lhu	$s3,-22851($v0)
+	li	$at,-29773
+	li	$zero,-29889
+	ll	$v0,-7321($s2)
+	lw	$t0,5674($a1)
+	lwc1	$f16,10225($k0)
+	lwc2	$18,-841($a2)
+	lwl	$s4,-4231($t7)
+	lwr	$zero,-19147($gp)
+	madd	$s6,$t5
+	madd	$zero,$t1
+	maddu	$s3,$gp
+	maddu	$t8,$s2
+	mfc0	$a2,$14,1
+	mfc1	$a3,$f27
+	mfhi	$s3
+	mfhi	$sp
+	mflo	$s1
+	mov.d	$f20,$f14
+	mov.s	$f2,$f27
+	move	$s8,$a0
+	move	$t9,$a2
+	movf	$gp,$t0,$fcc7
+	movf.d	$f6,$f11,$fcc5
+	movf.s	$f23,$f5,$fcc6
+	movn	$v1,$s1,$s0
+	movn.d	$f27,$f21,$k0
+	movn.s	$f12,$f0,$s7
+	movt	$zero,$s4,$fcc5
+	movt.d	$f0,$f2,$fcc0
+	movt.s	$f30,$f2,$fcc1
+	movz	$a1,$s6,$t1
+	movz.d	$f12,$f29,$t1
+	movz.s	$f25,$f7,$v1
+	msub	$s7,$k1
+	msubu	$t7,$a1
+	mtc0	$t1,$29,3
+	mtc1	$s8,$f9
+	mthi	$s1
+	mtlo	$sp
+	mtlo	$t9
+	mul	$s0,$s4,$at
+	mul.d	$f20,$f20,$f16
+	mul.s	$f30,$f10,$f2
+	mult	$sp,$s4
+	mult	$sp,$v0
+	multu	$gp,$k0
+	multu	$t1,$s2
+	neg.d	$f27,$f18
+	neg.s	$f1,$f15
+	nop
+	nor	$a3,$zero,$a3
+	or	$t4,$s0,$sp
+	round.w.d	$f6,$f4
+	round.w.s	$f27,$f28
+	sb	$s6,-19857($t6)
+	sc	$t7,18904($s3)
+	sdc1	$f31,30574($t5)
+	sdc2	$20,23157($s2)
+	sh	$t6,-6704($t7)
+	sllv	$a3,$zero,$t1
+	slt	$s7,$t3,$k1
+	slti	$s1,$t2,9489
+	sltiu	$t9,$t9,-15531
+	sltu	$s4,$s5,$t3
+	sqrt.d	$f17,$f22
+	sqrt.s	$f0,$f1
+	srav	$s1,$s7,$sp
+	srlv	$t9,$s4,$a0
+	ssnop                    # CHECK: ssnop # encoding:  [0x00,0x00,0x00,0x40]
+	sub	$s6,$s3,$t4
+	sub.d	$f18,$f3,$f17
+	sub.s	$f23,$f22,$f22
+	subu	$sp,$s6,$s6
+	sw	$ra,-10160($sp)
+	swc1	$f6,-8465($t8)
+	swc2	$25,24880($s0)
+	swl	$t7,13694($s3)
+	swr	$s1,-26590($t6)
+	teqi	$s5,-17504
+	tgei	$s1,5025
+	tgeiu	$sp,-28621
+	tlti	$t6,-21059
+	tltiu	$ra,-5076
+	tnei	$t4,-29647
+	trunc.w.d	$f22,$f15
+	trunc.w.s	$f28,$f30
+	xor	$s2,$a0,$s8
diff --git a/test/MC/Mips/mips32r2/valid-xfail.s b/test/MC/Mips/mips32r2/valid-xfail.s
new file mode 100644
index 0000000..623c7f6
--- /dev/null
+++ b/test/MC/Mips/mips32r2/valid-xfail.s
@@ -0,0 +1,315 @@
+# Instructions that should be valid but currently fail for known reasons (e.g.
+# they aren't implemented yet).
+# This test is set up to XPASS if any instruction generates an encoding.
+#
+# RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r2 | not FileCheck %s
+# CHECK-NOT: encoding
+# XFAIL: *
+
+	.set noat
+	abs.ps	$f22,$f8
+	absq_s.ph	$t0,$a0
+	absq_s.qb	$t7,$s1
+	absq_s.w	$s3,$ra
+	add.ps	$f25,$f27,$f13
+	addq.ph	$s1,$t7,$at
+	addq_s.ph	$s3,$s6,$s2
+	addq_s.w	$a2,$t0,$at
+	addqh.ph	$s4,$t6,$s1
+	addqh.w	$s7,$s7,$k1
+	addqh_r.ph	$sp,$t9,$s8
+	addqh_r.w	$t0,$v1,$zero
+	addsc	$s8,$t7,$t4
+	addu.ph	$a2,$t6,$s3
+	addu.qb	$s6,$v1,$v1
+	addu_s.ph	$a3,$s3,$gp
+	addu_s.qb	$s4,$s8,$s1
+	adduh.qb	$a1,$a1,$at
+	adduh_r.qb	$a0,$t1,$t4
+	addwc	$k0,$s6,$s7
+	alnv.ps	$f12,$f18,$f30,$t4
+	and.v	$w10,$w25,$w29
+	bitrev	$t6,$at
+	bmnz.v	$w15,$w2,$w28
+	bmz.v	$w13,$w11,$w21
+	bsel.v	$w28,$w7,$w0
+	c.eq.d	$fcc1,$f15,$f15
+	c.eq.ps	$fcc5,$f0,$f9
+	c.eq.s	$fcc5,$f24,$f17
+	c.f.d	$fcc4,$f11,$f21
+	c.f.ps	$fcc6,$f11,$f11
+	c.f.s	$fcc4,$f30,$f7
+	c.le.d	$fcc4,$f18,$f1
+	c.le.ps	$fcc1,$f7,$f20
+	c.le.s	$fcc6,$f24,$f4
+	c.lt.d	$fcc3,$f9,$f3
+	c.lt.ps	$f19,$f5
+	c.lt.s	$fcc2,$f17,$f14
+	c.nge.d	$fcc5,$f21,$f16
+	c.nge.ps	$f1,$f26
+	c.nge.s	$fcc3,$f11,$f8
+	c.ngl.ps	$f21,$f30
+	c.ngl.s	$fcc2,$f31,$f23
+	c.ngle.ps	$fcc7,$f12,$f20
+	c.ngle.s	$fcc2,$f18,$f23
+	c.ngt.d	$fcc4,$f24,$f7
+	c.ngt.ps	$fcc5,$f30,$f6
+	c.ngt.s	$fcc5,$f8,$f13
+	c.ole.d	$fcc2,$f16,$f31
+	c.ole.ps	$fcc7,$f21,$f8
+	c.ole.s	$fcc3,$f7,$f20
+	c.olt.d	$fcc4,$f19,$f28
+	c.olt.ps	$fcc3,$f7,$f16
+	c.olt.s	$fcc6,$f20,$f7
+	c.seq.d	$fcc4,$f31,$f7
+	c.seq.ps	$fcc6,$f31,$f14
+	c.seq.s	$fcc7,$f1,$f25
+	c.sf.ps	$fcc6,$f4,$f6
+	c.ueq.d	$fcc4,$f13,$f25
+	c.ueq.ps	$fcc1,$f5,$f29
+	c.ueq.s	$fcc6,$f3,$f30
+	c.ule.d	$fcc7,$f25,$f18
+	c.ule.ps	$fcc6,$f17,$f3
+	c.ule.s	$fcc7,$f21,$f30
+	c.ult.d	$fcc6,$f6,$f17
+	c.ult.ps	$fcc7,$f14,$f0
+	c.ult.s	$fcc7,$f24,$f10
+	c.un.d	$fcc6,$f23,$f24
+	c.un.ps	$fcc4,$f2,$f26
+	c.un.s	$fcc1,$f30,$f4
+	ceil.l.d	$f1,$f3
+	ceil.l.s	$f18,$f13
+	cfcmsa	$s6,$19
+	cmp.eq.ph	$s7,$t6
+	cmp.le.ph	$t0,$t6
+	cmp.lt.ph	$k0,$sp
+	cmpgdu.eq.qb	$s3,$zero,$k0
+	cmpgdu.le.qb	$v1,$t7,$s2
+	cmpgdu.lt.qb	$s0,$gp,$sp
+	cmpgu.eq.qb	$t6,$s6,$s8
+	cmpgu.le.qb	$t1,$a3,$s4
+	cmpgu.lt.qb	$sp,$at,$t0
+	cmpu.eq.qb	$v0,$t8
+	cmpu.le.qb	$s1,$a1
+	cmpu.lt.qb	$at,$a3
+	ctcmsa	$31,$s7
+	cvt.d.l	$f4,$f16
+	cvt.ps.s	$f3,$f18,$f19
+	cvt.s.l	$f15,$f30
+	cvt.s.pl	$f30,$f1
+	cvt.s.pu	$f14,$f25
+	dmt	$k0
+	dpa.w.ph	$ac1,$s7,$k0
+	dpaq_s.w.ph	$ac2,$a0,$t5
+	dpaq_sa.l.w	$ac0,$a2,$t6
+	dpaqx_s.w.ph	$ac3,$a0,$t8
+	dpaqx_sa.w.ph	$ac1,$zero,$s5
+	dpau.h.qbl	$ac1,$t2,$t8
+	dpau.h.qbr	$ac1,$s7,$s6
+	dpax.w.ph	$ac3,$a0,$k0
+	dps.w.ph	$ac1,$a3,$a1
+	dpsq_s.w.ph	$ac0,$gp,$k0
+	dpsq_sa.l.w	$ac0,$a3,$t7
+	dpsqx_s.w.ph	$ac3,$t5,$a3
+	dpsqx_sa.w.ph	$ac3,$sp,$s2
+	dpsu.h.qbl	$ac2,$t6,$t2
+	dpsu.h.qbr	$ac2,$a1,$s6
+	dpsx.w.ph	$ac0,$s7,$gp
+	dvpe	$s6
+	emt	$t0
+	evpe	$v0
+	extpdpv	$s6,$ac0,$s8
+	extpv	$t5,$ac0,$t6
+	extrv.w	$t0,$ac3,$at
+	extrv_r.w	$t0,$ac1,$s6
+	extrv_rs.w	$gp,$ac1,$s6
+	extrv_s.h	$s2,$ac1,$t6
+	fclass.d	$w14,$w27
+	fclass.w	$w19,$w28
+	fexupl.d	$w10,$w29
+	fexupl.w	$w12,$w27
+	fexupr.d	$w31,$w15
+	fexupr.w	$w29,$w12
+	ffint_s.d	$w1,$w30
+	ffint_s.w	$w16,$w14
+	ffint_u.d	$w23,$w18
+	ffint_u.w	$w19,$w12
+	ffql.d	$w2,$w3
+	ffql.w	$w9,$w0
+	ffqr.d	$w25,$w24
+	ffqr.w	$w10,$w6
+	fill.b	$w9,$v1
+	fill.h	$w9,$t0
+	fill.w	$w31,$t7
+	flog2.d	$w12,$w16
+	flog2.w	$w19,$w23
+	floor.l.d	$f26,$f7
+	floor.l.s	$f12,$f5
+	fork	$s2,$t0,$a0
+	frcp.d	$w12,$w4
+	frcp.w	$w30,$w8
+	frint.d	$w20,$w8
+	frint.w	$w11,$w29
+	frsqrt.d	$w29,$w2
+	frsqrt.w	$w9,$w8
+	fsqrt.d	$w3,$w1
+	fsqrt.w	$w5,$w15
+	ftint_s.d	$w31,$w26
+	ftint_s.w	$w27,$w14
+	ftint_u.d	$w5,$w31
+	ftint_u.w	$w12,$w29
+	ftrunc_s.d	$w4,$w22
+	ftrunc_s.w	$w24,$w7
+	ftrunc_u.d	$w20,$w25
+	ftrunc_u.w	$w7,$w26
+	insv	$s2,$at
+	iret
+	lbe	$t6,122($t1)
+	lbue	$t3,-108($t2)
+	lbux	$t1,$t6($v0)
+	ldc3	$29,-28645($s1)
+	lhe	$s6,219($v1)
+	lhue	$gp,118($t3)
+	lhx	$sp,$k0($t7)
+	lle	$gp,-237($ra)
+	lwe	$ra,-145($t6)
+	lwle	$t3,-42($t3)
+	lwre	$sp,-152($t8)
+	lwx	$t4,$t4($s4)
+	madd.ps	$f22,$f3,$f14,$f3
+	maq_s.w.phl	$ac2,$t9,$t3
+	maq_s.w.phr	$ac0,$t2,$t9
+	maq_sa.w.phl	$ac3,$a1,$v1
+	maq_sa.w.phr	$ac1,$at,$t2
+	mfgc0	$s6,c0_datahi1
+	mflo	$t1,$ac2
+	modsub	$a3,$t4,$a3
+	mov.ps	$f22,$f17
+	move.v	$w8,$w17
+	movf.ps	$f10,$f28,$fcc6
+	movn.ps	$f31,$f31,$s3
+	movt.ps	$f20,$f25,$fcc2
+	movz.ps	$f18,$f17,$ra
+	msub	$ac2,$sp,$t6
+	msub.ps	$f12,$f14,$f29,$f17
+	msubu	$ac2,$a1,$t8
+	mtc0	$t1,c0_datahi1
+	mtgc0	$s4,$21,7
+	mthi	$v0,$ac1
+	mthlip	$a3,$ac0
+	mul.ph	$s4,$t8,$s0
+	mul.ps	$f14,$f0,$f16
+	mul_s.ph	$t2,$t6,$t7
+	muleq_s.w.phl	$t3,$s4,$s4
+	muleq_s.w.phr	$s6,$a0,$s8
+	muleu_s.ph.qbl	$a2,$t6,$t0
+	muleu_s.ph.qbr	$a1,$ra,$t1
+	mulq_rs.ph	$s2,$t6,$t7
+	mulq_rs.w	$at,$s4,$t9
+	mulq_s.ph	$s0,$k1,$t7
+	mulq_s.w	$t1,$a3,$s0
+	mulsa.w.ph	$ac1,$s4,$s6
+	mulsaq_s.w.ph	$ac0,$ra,$s2
+	neg.ps	$f19,$f13
+	nloc.b	$w12,$w30
+	nloc.d	$w16,$w7
+	nloc.h	$w21,$w17
+	nloc.w	$w17,$w16
+	nlzc.b	$w12,$w7
+	nlzc.d	$w14,$w14
+	nlzc.h	$w24,$w24
+	nlzc.w	$w10,$w4
+	nmadd.ps	$f27,$f4,$f9,$f25
+	nmsub.ps	$f6,$f12,$f14,$f17
+	nor.v	$w20,$w20,$w15
+	or.v	$w13,$w23,$w12
+	packrl.ph	$ra,$t8,$t6
+	pcnt.b	$w30,$w15
+	pcnt.d	$w5,$w16
+	pcnt.h	$w20,$w24
+	pcnt.w	$w22,$w20
+	pick.ph	$ra,$a2,$gp
+	pick.qb	$t3,$a0,$gp
+	pll.ps	$f25,$f9,$f30
+	plu.ps	$f1,$f26,$f29
+	preceq.w.phl	$s8,$gp
+	preceq.w.phr	$s5,$t7
+	precequ.ph.qbl	$s7,$ra
+	precequ.ph.qbla	$a0,$t1
+	precequ.ph.qbr	$ra,$s3
+	precequ.ph.qbra	$t8,$t0
+	preceu.ph.qbl	$sp,$t0
+	preceu.ph.qbla	$s6,$t3
+	preceu.ph.qbr	$gp,$s1
+	preceu.ph.qbra	$k1,$s0
+	precr.qb.ph	$v0,$t4,$s8
+	precrq.ph.w	$t6,$s8,$t8
+	precrq.qb.ph	$a2,$t4,$t4
+	precrq_rs.ph.w	$a1,$k0,$a3
+	precrqu_s.qb.ph	$zero,$gp,$s5
+	pul.ps	$f9,$f30,$f26
+	puu.ps	$f24,$f9,$f2
+	raddu.w.qb	$t9,$s3
+	rdpgpr	$s3,$t1
+	recip.d	$f19,$f6
+	recip.s	$f3,$f30
+	repl.ph	$at,-307
+	replv.ph	$v1,$s7
+	replv.qb	$t9,$t4
+	rorv	$t5,$a3,$s5
+	round.l.d	$f12,$f1
+	round.l.s	$f25,$f5
+	rsqrt.d	$f3,$f28
+	rsqrt.s	$f4,$f8
+	sbe	$s7,33($s1)
+	sce	$sp,189($t2)
+	sdc3	$12,5835($t2)
+	she	$t8,105($v0)
+	shilo	$ac1,26
+	shilov	$ac2,$t2
+	shllv.ph	$t2,$s0,$s0
+	shllv.qb	$gp,$v1,$zero
+	shllv_s.ph	$k1,$at,$t5
+	shllv_s.w	$s1,$ra,$k0
+	shrav.ph	$t9,$s2,$s1
+	shrav.qb	$zero,$t8,$t3
+	shrav_r.ph	$s3,$t3,$t9
+	shrav_r.qb	$a0,$sp,$s5
+	shrav_r.w	$s7,$s4,$s6
+	shrlv.ph	$t6,$t2,$t1
+	shrlv.qb	$a2,$s2,$t3
+	sub.ps	$f5,$f14,$f26
+	subq.ph	$ra,$t1,$s8
+	subq_s.ph	$t5,$s8,$s5
+	subq_s.w	$k1,$a2,$a3
+	subqh.ph	$t2,$at,$t1
+	subqh.w	$v0,$a2,$zero
+	subqh_r.ph	$a0,$t4,$s6
+	subqh_r.w	$t2,$a2,$gp
+	subu.ph	$t1,$s6,$s4
+	subu.qb	$s6,$a2,$s6
+	subu_s.ph	$v1,$a1,$s3
+	subu_s.qb	$s1,$at,$ra
+	subuh.qb	$zero,$gp,$gp
+	subuh_r.qb	$s4,$s8,$s6
+	swe	$t8,94($k0)
+	swle	$v1,-209($gp)
+	swre	$k0,-202($s2)
+	synci	20023($s0)
+	tlbginv
+	tlbginvf
+	tlbgp
+	tlbgr
+	tlbgwi
+	tlbgwr
+	tlbinv
+	tlbinvf
+	tlbp
+	tlbr
+	tlbwi
+	tlbwr
+	trunc.l.d	$f23,$f23
+	trunc.l.s	$f28,$f31
+	wrpgpr	$zero,$t5
+	xor.v	$w20,$w21,$w30
+	yield	$v1,$s0
diff --git a/test/MC/Mips/mips32r2/valid.s b/test/MC/Mips/mips32r2/valid.s
new file mode 100644
index 0000000..3e9a1d3
--- /dev/null
+++ b/test/MC/Mips/mips32r2/valid.s
@@ -0,0 +1,156 @@
+# Instructions that are valid
+#
+# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r2 | FileCheck %s
+
+        .set noat
+	abs.d	$f7,$f25 # CHECK: encoding
+	abs.s	$f9,$f16
+	add	$s7,$s2,$a1
+	add.d	$f1,$f7,$f29
+	add.s	$f8,$f21,$f24
+	addi	$t5,$t1,26322
+	addu	$t1,$a0,$a2
+	and	$s7,$v0,$t4
+	c.ngl.d	$f29,$f29
+	c.ngle.d	$f0,$f16
+	c.sf.d	$f30,$f0
+	c.sf.s	$f14,$f22
+	ceil.w.d	$f11,$f25
+	ceil.w.s	$f6,$f20
+	cfc1	$s1,$21
+	clo	$t3,$a1
+	clz	$sp,$gp
+	ctc1	$a2,$26
+	cvt.d.s	$f22,$f28
+	cvt.d.w	$f26,$f11
+	cvt.l.d	$f24,$f15
+	cvt.l.s	$f11,$f29
+	cvt.s.d	$f26,$f8
+	cvt.s.w	$f22,$f15
+	cvt.w.d	$f20,$f14
+	cvt.w.s	$f20,$f24
+	deret
+	di	$s8
+	div	$zero,$t9,$t3
+	div.d	$f29,$f20,$f27
+	div.s	$f4,$f5,$f15
+	divu	$zero,$t9,$t7
+	ehb                      # CHECK: ehb # encoding:  [0x00,0x00,0x00,0xc0]
+	ei	$t6
+	eret
+	floor.w.d	$f14,$f11
+	floor.w.s	$f8,$f9
+	lb	$t8,-14515($t2)
+	lbu	$t0,30195($v1)
+	ldc1	$f11,16391($s0)
+	ldc2	$8,-21181($at)
+	ldxc1	$f8,$s7($t7)
+	lh	$t3,-8556($s5)
+	lhu	$s3,-22851($v0)
+	li	$at,-29773
+	li	$zero,-29889
+	ll	$v0,-7321($s2)
+	luxc1	$f19,$s6($s5)
+	lw	$t0,5674($a1)
+	lwc1	$f16,10225($k0)
+	lwc2	$18,-841($a2)
+	lwl	$s4,-4231($t7)
+	lwr	$zero,-19147($gp)
+	lwxc1	$f12,$s1($s8)
+	madd	$s6,$t5
+	madd	$zero,$t1
+	madd.d	$f18,$f19,$f26,$f20
+	madd.s	$f1,$f31,$f19,$f25
+	maddu	$s3,$gp
+	maddu	$t8,$s2
+	mfc0	$a2,$14,1
+	mfc1	$a3,$f27
+	mfhc1	$s8,$f24
+	mfhi	$s3
+	mfhi	$sp
+	mflo	$s1
+	mov.d	$f20,$f14
+	mov.s	$f2,$f27
+	move	$s8,$a0
+	move	$t9,$a2
+	movf	$gp,$t0,$fcc7
+	movf.d	$f6,$f11,$fcc5
+	movf.s	$f23,$f5,$fcc6
+	movn	$v1,$s1,$s0
+	movn.d	$f27,$f21,$k0
+	movn.s	$f12,$f0,$s7
+	movt	$zero,$s4,$fcc5
+	movt.d	$f0,$f2,$fcc0
+	movt.s	$f30,$f2,$fcc1
+	movz	$a1,$s6,$t1
+	movz.d	$f12,$f29,$t1
+	movz.s	$f25,$f7,$v1
+	msub	$s7,$k1
+	msub.d	$f10,$f1,$f31,$f18
+	msub.s	$f12,$f19,$f10,$f16
+	msubu	$t7,$a1
+	mtc0	$t1,$29,3
+	mtc1	$s8,$f9
+	mthc1	$zero,$f16
+	mthi	$s1
+	mtlo	$sp
+	mtlo	$t9
+	mul	$s0,$s4,$at
+	mul.d	$f20,$f20,$f16
+	mul.s	$f30,$f10,$f2
+	mult	$sp,$s4
+	mult	$sp,$v0
+	multu	$gp,$k0
+	multu	$t1,$s2
+	neg.d	$f27,$f18
+	neg.s	$f1,$f15
+	nmadd.d	$f18,$f9,$f14,$f19
+	nmadd.s	$f0,$f5,$f25,$f12
+	nmsub.d	$f30,$f8,$f16,$f30
+	nmsub.s	$f1,$f24,$f19,$f4
+	nop
+	nor	$a3,$zero,$a3
+	or	$t4,$s0,$sp
+	pause                    # CHECK: pause # encoding:  [0x00,0x00,0x01,0x40]
+	rdhwr	$sp,$11
+	round.w.d	$f6,$f4
+	round.w.s	$f27,$f28
+	sb	$s6,-19857($t6)
+	sc	$t7,18904($s3)
+	sdc1	$f31,30574($t5)
+	sdc2	$20,23157($s2)
+	sdxc1	$f11,$t2($t6)
+	seb	$t9,$t7
+	seh	$v1,$t4
+	sh	$t6,-6704($t7)
+	sllv	$a3,$zero,$t1
+	slt	$s7,$t3,$k1
+	slti	$s1,$t2,9489
+	sltiu	$t9,$t9,-15531
+	sltu	$s4,$s5,$t3
+	sqrt.d	$f17,$f22
+	sqrt.s	$f0,$f1
+	srav	$s1,$s7,$sp
+	srlv	$t9,$s4,$a0
+	ssnop                    # CHECK: ssnop # encoding:  [0x00,0x00,0x00,0x40]
+	sub	$s6,$s3,$t4
+	sub.d	$f18,$f3,$f17
+	sub.s	$f23,$f22,$f22
+	subu	$sp,$s6,$s6
+	suxc1	$f12,$k1($t5)
+	sw	$ra,-10160($sp)
+	swc1	$f6,-8465($t8)
+	swc2	$25,24880($s0)
+	swl	$t7,13694($s3)
+	swr	$s1,-26590($t6)
+	swxc1	$f19,$t4($k0)
+	teqi	$s5,-17504
+	tgei	$s1,5025
+	tgeiu	$sp,-28621
+	tlti	$t6,-21059
+	tltiu	$ra,-5076
+	tnei	$t4,-29647
+	trunc.w.d	$f22,$f15
+	trunc.w.s	$f28,$f30
+	wsbh	$k1,$t1
+	xor	$s2,$a0,$s8
diff --git a/test/MC/Mips/mips4/invalid-mips64-xfail.s b/test/MC/Mips/mips4/invalid-mips64-xfail.s
new file mode 100644
index 0000000..d8ebcd3
--- /dev/null
+++ b/test/MC/Mips/mips4/invalid-mips64-xfail.s
@@ -0,0 +1,22 @@
+# Instructions that are supposed to be invalid but currently aren't
+# This test will XPASS if any insn stops assembling.
+#
+# RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips4 \
+# RUN:     2> %t1
+# RUN: not FileCheck %s < %t1
+# XFAIL: *
+
+# CHECK-NOT: error
+        .set noat
+	deret
+	luxc1	$f19,$s6($s5)
+	madd	$s6,$t5
+	madd	$zero,$t1
+	maddu	$s3,$gp
+	maddu	$t8,$s2
+	mfc0	$a2,$14,1
+	msub	$s7,$k1
+	msubu	$t7,$a1
+	mtc0	$t1,$29,3
+	mul	$s0,$s4,$at
+	suxc1	$f12,$k1($t5)
diff --git a/test/MC/Mips/mips4/invalid-mips64.s b/test/MC/Mips/mips4/invalid-mips64.s
new file mode 100644
index 0000000..e0b69f2
--- /dev/null
+++ b/test/MC/Mips/mips4/invalid-mips64.s
@@ -0,0 +1,12 @@
+# Instructions that are invalid
+#
+# FIXME: This test should be moved to the mips5 directory when mips5 is supported
+# RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips4 \
+# RUN:     2>%t1
+# RUN: FileCheck %s < %t1
+
+        .set noat
+	clo	$t3,$a1       # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+	clz	$sp,$gp       # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+	dclo	$s2,$a2       # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+	dclz	$s0,$t9       # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
diff --git a/test/MC/Mips/mips4/invalid-mips64r2-xfail.s b/test/MC/Mips/mips4/invalid-mips64r2-xfail.s
new file mode 100644
index 0000000..63edb60
--- /dev/null
+++ b/test/MC/Mips/mips4/invalid-mips64r2-xfail.s
@@ -0,0 +1,27 @@
+# Instructions that are supposed to be invalid but currently aren't
+# This test will XPASS if any insn stops assembling.
+#
+# RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips4 \
+# RUN:     2> %t1
+# RUN: not FileCheck %s < %t1
+# XFAIL: *
+
+# CHECK-NOT: error
+        .set noat
+        deret
+        di      $s8
+        ei      $t6
+        luxc1   $f19,$s6($s5)
+        madd    $s6,$t5
+        madd    $zero,$t1
+        maddu   $s3,$gp
+        maddu   $t8,$s2
+        mfc0    $a2,$14,1
+        mfhc1   $s8,$f24
+        msub    $s7,$k1
+        msubu   $t7,$a1
+        mtc0    $t1,$29,3
+        mthc1   $zero,$f16
+        mul     $s0,$s4,$at
+        rdhwr   $sp,$11
+        suxc1   $f12,$k1($t5)
diff --git a/test/MC/Mips/mips4/invalid-mips64r2.s b/test/MC/Mips/mips4/invalid-mips64r2.s
new file mode 100644
index 0000000..ed2dff8
--- /dev/null
+++ b/test/MC/Mips/mips4/invalid-mips64r2.s
@@ -0,0 +1,22 @@
+# Instructions that are invalid
+#
+# FIXME: This test should be moved to the mips5 directory when mips5 is supported
+# RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips4 \
+# RUN:     2>%t1
+# RUN: FileCheck %s < %t1
+
+        .set noat
+        clo	$t3,$a1             # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+        clz	$sp,$gp             # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+        dclo	$s2,$a2             # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+        dclz	$s0,$t9             # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+        dsbh    $v1,$t6             # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+        dshd    $v0,$sp             # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+        madd.s  $f1,$f31,$f19,$f25  # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+        msub.s  $f12,$f19,$f10,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+        nmadd.s $f0,$f5,$f25,$f12   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+        nmsub.s $f1,$f24,$f19,$f4   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+        pause                       # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+        seb     $t9,$t7             # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+        seh     $v1,$t4             # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+        wsbh    $k1,$t1             # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
diff --git a/test/MC/Mips/mips4/valid-xfail.s b/test/MC/Mips/mips4/valid-xfail.s
new file mode 100644
index 0000000..baf5c53
--- /dev/null
+++ b/test/MC/Mips/mips4/valid-xfail.s
@@ -0,0 +1,54 @@
+# Instructions that should be valid but currently fail for known reasons (e.g.
+# they aren't implemented yet).
+# This test is set up to XPASS if any instruction generates an encoding.
+#
+# FIXME: Test MIPS-IV instead of MIPS64
+# RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64   | not FileCheck %s
+# CHECK-NOT: encoding
+# XFAIL: *
+
+	.set noat
+	c.eq.d	$fcc1,$f15,$f15
+	c.eq.s	$fcc5,$f24,$f17
+	c.f.d	$fcc4,$f11,$f21
+	c.f.s	$fcc4,$f30,$f7
+	c.le.d	$fcc4,$f18,$f1
+	c.le.s	$fcc6,$f24,$f4
+	c.lt.d	$fcc3,$f9,$f3
+	c.lt.s	$fcc2,$f17,$f14
+	c.nge.d	$fcc5,$f21,$f16
+	c.nge.s	$fcc3,$f11,$f8
+	c.ngl.s	$fcc2,$f31,$f23
+	c.ngle.s	$fcc2,$f18,$f23
+	c.ngt.d	$fcc4,$f24,$f7
+	c.ngt.s	$fcc5,$f8,$f13
+	c.ole.d	$fcc2,$f16,$f31
+	c.ole.s	$fcc3,$f7,$f20
+	c.olt.d	$fcc4,$f19,$f28
+	c.olt.s	$fcc6,$f20,$f7
+	c.seq.d	$fcc4,$f31,$f7
+	c.seq.s	$fcc7,$f1,$f25
+	c.ueq.d	$fcc4,$f13,$f25
+	c.ueq.s	$fcc6,$f3,$f30
+	c.ule.d	$fcc7,$f25,$f18
+	c.ule.s	$fcc7,$f21,$f30
+	c.ult.d	$fcc6,$f6,$f17
+	c.ult.s	$fcc7,$f24,$f10
+	c.un.d	$fcc6,$f23,$f24
+	c.un.s	$fcc1,$f30,$f4
+	madd.d	$f18,$f19,$f26,$f20
+	madd.s	$f1,$f31,$f19,$f25
+	msub.d	$f10,$f1,$f31,$f18
+	msub.s	$f12,$f19,$f10,$f16
+	nmadd.d	$f18,$f9,$f14,$f19
+	nmadd.s	$f0,$f5,$f25,$f12
+	nmsub.d	$f30,$f8,$f16,$f30
+	nmsub.s	$f1,$f24,$f19,$f4
+	recip.d	$f19,$f6
+	recip.s	$f3,$f30
+	rsqrt.d	$f3,$f28
+	rsqrt.s	$f4,$f8
+	tlbp
+	tlbr
+	tlbwi
+	tlbwr
diff --git a/test/MC/Mips/mips4/valid.s b/test/MC/Mips/mips4/valid.s
new file mode 100644
index 0000000..8dc2a23
--- /dev/null
+++ b/test/MC/Mips/mips4/valid.s
@@ -0,0 +1,161 @@
+# Instructions that are valid
+#
+# FIXME: Test MIPS-IV instead of MIPS64
+# RUN: llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64   | FileCheck %s
+
+	.set noat
+	abs.d	$f7,$f25 # CHECK: encoding
+	abs.s	$f9,$f16
+	add	$s7,$s2,$a1
+	add.d	$f1,$f7,$f29
+	add.s	$f8,$f21,$f24
+	addi	$t5,$t1,26322
+	addu	$t1,$a0,$a2
+	and	$s7,$v0,$t4
+	c.ngl.d	$f29,$f29
+	c.ngle.d	$f0,$f16
+	c.sf.d	$f30,$f0
+	c.sf.s	$f14,$f22
+	ceil.l.d	$f1,$f3
+	ceil.l.s	$f18,$f13
+	ceil.w.d	$f11,$f25
+	ceil.w.s	$f6,$f20
+	cfc1	$s1,$21
+	ctc1	$a2,$26
+	cvt.d.l	$f4,$f16
+	cvt.d.s	$f22,$f28
+	cvt.d.w	$f26,$f11
+	cvt.l.d	$f24,$f15
+	cvt.l.s	$f11,$f29
+	cvt.s.d	$f26,$f8
+	cvt.s.l	$f15,$f30
+	cvt.s.w	$f22,$f15
+	cvt.w.d	$f20,$f14
+	cvt.w.s	$f20,$f24
+	dadd	$s3,$at,$ra
+	daddi	$sp,$s4,-27705
+	daddiu	$k0,$s6,-4586
+	ddiv	$zero,$k0,$s3
+	ddivu	$zero,$s0,$s1
+	div	$zero,$t9,$t3
+	div.d	$f29,$f20,$f27
+	div.s	$f4,$f5,$f15
+	divu	$zero,$t9,$t7
+	dmfc1	$t4,$f13
+	dmtc1	$s0,$f14
+	dmult	$s7,$t1
+	dmultu	$a1,$a2
+	dsllv	$zero,$s4,$t4
+	dsrav	$gp,$s2,$s3
+	dsrlv	$s3,$t6,$s4
+	dsub	$a3,$s6,$t0
+	dsubu	$a1,$a1,$k0
+	ehb                      # CHECK: ehb # encoding:  [0x00,0x00,0x00,0xc0]
+	eret
+	floor.l.d	$f26,$f7
+	floor.l.s	$f12,$f5
+	floor.w.d	$f14,$f11
+	floor.w.s	$f8,$f9
+	lb	$t8,-14515($t2)
+	lbu	$t0,30195($v1)
+	ld	$sp,-28645($s1)
+	ldc1	$f11,16391($s0)
+	ldc2	$8,-21181($at)
+	ldl	$t8,-4167($t8)
+	ldr	$t6,-30358($s4)
+	ldxc1	$f8,$s7($t7)
+	lh	$t3,-8556($s5)
+	lhu	$s3,-22851($v0)
+	li	$at,-29773
+	li	$zero,-29889
+	ll	$v0,-7321($s2)
+	lld	$zero,-14736($ra)
+	lw	$t0,5674($a1)
+	lwc1	$f16,10225($k0)
+	lwc2	$18,-841($a2)
+	lwl	$s4,-4231($t7)
+	lwr	$zero,-19147($gp)
+	lwu	$s3,-24086($v1)
+	lwxc1	$f12,$s1($s8)
+	mfc1	$a3,$f27
+	mfhi	$s3
+	mfhi	$sp
+	mflo	$s1
+	mov.d	$f20,$f14
+	mov.s	$f2,$f27
+	move	$a0,$a3
+	move	$s5,$a0
+	move	$s8,$a0
+	move	$t9,$a2
+	movf	$gp,$t0,$fcc7
+	movf.d	$f6,$f11,$fcc5
+	movf.s	$f23,$f5,$fcc6
+	movn	$v1,$s1,$s0
+	movn.d	$f27,$f21,$k0
+	movn.s	$f12,$f0,$s7
+	movt	$zero,$s4,$fcc5
+	movt.d	$f0,$f2,$fcc0
+	movt.s	$f30,$f2,$fcc1
+	movz	$a1,$s6,$t1
+	movz.d	$f12,$f29,$t1
+	movz.s	$f25,$f7,$v1
+	mtc1	$s8,$f9
+	mthi	$s1
+	mtlo	$sp
+	mtlo	$t9
+	mul.d	$f20,$f20,$f16
+	mul.s	$f30,$f10,$f2
+	mult	$sp,$s4
+	mult	$sp,$v0
+	multu	$gp,$k0
+	multu	$t1,$s2
+	neg.d	$f27,$f18
+	neg.s	$f1,$f15
+	nop
+	nor	$a3,$zero,$a3
+	or	$t4,$s0,$sp
+	round.l.d	$f12,$f1
+	round.l.s	$f25,$f5
+	round.w.d	$f6,$f4
+	round.w.s	$f27,$f28
+	sb	$s6,-19857($t6)
+	sc	$t7,18904($s3)
+	scd	$t7,-8243($sp)
+	sd	$t4,5835($t2)
+	sdc1	$f31,30574($t5)
+	sdc2	$20,23157($s2)
+	sdl	$a3,-20961($s8)
+	sdr	$t3,-20423($t4)
+	sdxc1	$f11,$t2($t6)
+	sh	$t6,-6704($t7)
+	sllv	$a3,$zero,$t1
+	slt	$s7,$t3,$k1
+	slti	$s1,$t2,9489
+	sltiu	$t9,$t9,-15531
+	sltu	$s4,$s5,$t3
+	sqrt.d	$f17,$f22
+	sqrt.s	$f0,$f1
+	srav	$s1,$s7,$sp
+	srlv	$t9,$s4,$a0
+	ssnop                    # CHECK: ssnop # encoding:  [0x00,0x00,0x00,0x40]
+	sub	$s6,$s3,$t4
+	sub.d	$f18,$f3,$f17
+	sub.s	$f23,$f22,$f22
+	subu	$sp,$s6,$s6
+	sw	$ra,-10160($sp)
+	swc1	$f6,-8465($t8)
+	swc2	$25,24880($s0)
+	swl	$t7,13694($s3)
+	swr	$s1,-26590($t6)
+	swxc1	$f19,$t4($k0)
+	teqi	$s5,-17504
+	tgei	$s1,5025
+	tgeiu	$sp,-28621
+	tlti	$t6,-21059
+	tltiu	$ra,-5076
+	tnei	$t4,-29647
+	trunc.l.d	$f23,$f23
+	trunc.l.s	$f28,$f31
+	trunc.w.d	$f22,$f15
+	trunc.w.s	$f28,$f30
+	xor	$s2,$a0,$s8
diff --git a/test/MC/Mips/mips5/valid-xfail.s b/test/MC/Mips/mips5/valid-xfail.s
new file mode 100644
index 0000000..85d961b
--- /dev/null
+++ b/test/MC/Mips/mips5/valid-xfail.s
@@ -0,0 +1,92 @@
+# Instructions that should be valid but currently fail for known reasons (e.g.
+# they aren't implemented yet).
+# This test is set up to XPASS if any instruction generates an encoding.
+#
+# FIXME: Test MIPS-V instead of MIPS64
+# RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64   | not FileCheck %s
+# CHECK-NOT: encoding
+# XFAIL: *
+
+        .set noat
+	abs.ps	$f22,$f8
+	add.ps	$f25,$f27,$f13
+	alnv.ps	$f12,$f18,$f30,$t4
+	c.eq.d	$fcc1,$f15,$f15
+	c.eq.ps	$fcc5,$f0,$f9
+	c.eq.s	$fcc5,$f24,$f17
+	c.f.d	$fcc4,$f11,$f21
+	c.f.ps	$fcc6,$f11,$f11
+	c.f.s	$fcc4,$f30,$f7
+	c.le.d	$fcc4,$f18,$f1
+	c.le.ps	$fcc1,$f7,$f20
+	c.le.s	$fcc6,$f24,$f4
+	c.lt.d	$fcc3,$f9,$f3
+	c.lt.ps	$f19,$f5
+	c.lt.s	$fcc2,$f17,$f14
+	c.nge.d	$fcc5,$f21,$f16
+	c.nge.ps	$f1,$f26
+	c.nge.s	$fcc3,$f11,$f8
+	c.ngl.ps	$f21,$f30
+	c.ngl.s	$fcc2,$f31,$f23
+	c.ngle.ps	$fcc7,$f12,$f20
+	c.ngle.s	$fcc2,$f18,$f23
+	c.ngt.d	$fcc4,$f24,$f7
+	c.ngt.ps	$fcc5,$f30,$f6
+	c.ngt.s	$fcc5,$f8,$f13
+	c.ole.d	$fcc2,$f16,$f31
+	c.ole.ps	$fcc7,$f21,$f8
+	c.ole.s	$fcc3,$f7,$f20
+	c.olt.d	$fcc4,$f19,$f28
+	c.olt.ps	$fcc3,$f7,$f16
+	c.olt.s	$fcc6,$f20,$f7
+	c.seq.d	$fcc4,$f31,$f7
+	c.seq.ps	$fcc6,$f31,$f14
+	c.seq.s	$fcc7,$f1,$f25
+	c.sf.ps	$fcc6,$f4,$f6
+	c.ueq.d	$fcc4,$f13,$f25
+	c.ueq.ps	$fcc1,$f5,$f29
+	c.ueq.s	$fcc6,$f3,$f30
+	c.ule.d	$fcc7,$f25,$f18
+	c.ule.ps	$fcc6,$f17,$f3
+	c.ule.s	$fcc7,$f21,$f30
+	c.ult.d	$fcc6,$f6,$f17
+	c.ult.ps	$fcc7,$f14,$f0
+	c.ult.s	$fcc7,$f24,$f10
+	c.un.d	$fcc6,$f23,$f24
+	c.un.ps	$fcc4,$f2,$f26
+	c.un.s	$fcc1,$f30,$f4
+	cvt.ps.s	$f3,$f18,$f19
+	cvt.s.pl	$f30,$f1
+	cvt.s.pu	$f14,$f25
+	madd.d	$f18,$f19,$f26,$f20
+	madd.ps	$f22,$f3,$f14,$f3
+	madd.s	$f1,$f31,$f19,$f25
+	mov.ps	$f22,$f17
+	movf.ps	$f10,$f28,$fcc6
+	movn.ps	$f31,$f31,$s3
+	movt.ps	$f20,$f25,$fcc2
+	movz.ps	$f18,$f17,$ra
+	msub.d	$f10,$f1,$f31,$f18
+	msub.ps	$f12,$f14,$f29,$f17
+	msub.s	$f12,$f19,$f10,$f16
+	mul.ps	$f14,$f0,$f16
+	neg.ps	$f19,$f13
+	nmadd.d	$f18,$f9,$f14,$f19
+	nmadd.ps	$f27,$f4,$f9,$f25
+	nmadd.s	$f0,$f5,$f25,$f12
+	nmsub.d	$f30,$f8,$f16,$f30
+	nmsub.ps	$f6,$f12,$f14,$f17
+	nmsub.s	$f1,$f24,$f19,$f4
+	pll.ps	$f25,$f9,$f30
+	plu.ps	$f1,$f26,$f29
+	pul.ps	$f9,$f30,$f26
+	puu.ps	$f24,$f9,$f2
+	recip.d	$f19,$f6
+	recip.s	$f3,$f30
+	rsqrt.d	$f3,$f28
+	rsqrt.s	$f4,$f8
+	sub.ps	$f5,$f14,$f26
+	tlbp
+	tlbr
+	tlbwi
+	tlbwr
diff --git a/test/MC/Mips/mips5/valid.s b/test/MC/Mips/mips5/valid.s
new file mode 100644
index 0000000..ebe2f70
--- /dev/null
+++ b/test/MC/Mips/mips5/valid.s
@@ -0,0 +1,163 @@
+# Instructions that are valid
+#
+# FIXME: Test MIPS-V instead of MIPS64
+# RUN: llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64   | FileCheck %s
+
+        .set noat
+	abs.d	$f7,$f25 # CHECK: encoding
+	abs.s	$f9,$f16
+	add	$s7,$s2,$a1
+	add.d	$f1,$f7,$f29
+	add.s	$f8,$f21,$f24
+	addi	$t5,$t1,26322
+	addu	$t1,$a0,$a2
+	and	$s7,$v0,$t4
+	c.ngl.d	$f29,$f29
+	c.ngle.d	$f0,$f16
+	c.sf.d	$f30,$f0
+	c.sf.s	$f14,$f22
+	ceil.l.d	$f1,$f3
+	ceil.l.s	$f18,$f13
+	ceil.w.d	$f11,$f25
+	ceil.w.s	$f6,$f20
+	cfc1	$s1,$21
+	ctc1	$a2,$26
+	cvt.d.l	$f4,$f16
+	cvt.d.s	$f22,$f28
+	cvt.d.w	$f26,$f11
+	cvt.l.d	$f24,$f15
+	cvt.l.s	$f11,$f29
+	cvt.s.d	$f26,$f8
+	cvt.s.l	$f15,$f30
+	cvt.s.w	$f22,$f15
+	cvt.w.d	$f20,$f14
+	cvt.w.s	$f20,$f24
+	dadd	$s3,$at,$ra
+	daddi	$sp,$s4,-27705
+	daddiu	$k0,$s6,-4586
+	ddiv	$zero,$k0,$s3
+	ddivu	$zero,$s0,$s1
+	div	$zero,$t9,$t3
+	div.d	$f29,$f20,$f27
+	div.s	$f4,$f5,$f15
+	divu	$zero,$t9,$t7
+	dmfc1	$t4,$f13
+	dmtc1	$s0,$f14
+	dmult	$s7,$t1
+	dmultu	$a1,$a2
+	dsllv	$zero,$s4,$t4
+	dsrav	$gp,$s2,$s3
+	dsrlv	$s3,$t6,$s4
+	dsub	$a3,$s6,$t0
+	dsubu	$a1,$a1,$k0
+	ehb                      # CHECK: ehb # encoding:  [0x00,0x00,0x00,0xc0]
+	eret
+	floor.l.d	$f26,$f7
+	floor.l.s	$f12,$f5
+	floor.w.d	$f14,$f11
+	floor.w.s	$f8,$f9
+	lb	$t8,-14515($t2)
+	lbu	$t0,30195($v1)
+	ld	$sp,-28645($s1)
+	ldc1	$f11,16391($s0)
+	ldc2	$8,-21181($at)
+	ldl	$t8,-4167($t8)
+	ldr	$t6,-30358($s4)
+	ldxc1	$f8,$s7($t7)
+	lh	$t3,-8556($s5)
+	lhu	$s3,-22851($v0)
+	li	$at,-29773
+	li	$zero,-29889
+	ll	$v0,-7321($s2)
+	lld	$zero,-14736($ra)
+	luxc1	$f19,$s6($s5)
+	lw	$t0,5674($a1)
+	lwc1	$f16,10225($k0)
+	lwc2	$18,-841($a2)
+	lwl	$s4,-4231($t7)
+	lwr	$zero,-19147($gp)
+	lwu	$s3,-24086($v1)
+	lwxc1	$f12,$s1($s8)
+	mfc1	$a3,$f27
+	mfhi	$s3
+	mfhi	$sp
+	mflo	$s1
+	mov.d	$f20,$f14
+	mov.s	$f2,$f27
+	move	$a0,$a3
+	move	$s5,$a0
+	move	$s8,$a0
+	move	$t9,$a2
+	movf	$gp,$t0,$fcc7
+	movf.d	$f6,$f11,$fcc5
+	movf.s	$f23,$f5,$fcc6
+	movn	$v1,$s1,$s0
+	movn.d	$f27,$f21,$k0
+	movn.s	$f12,$f0,$s7
+	movt	$zero,$s4,$fcc5
+	movt.d	$f0,$f2,$fcc0
+	movt.s	$f30,$f2,$fcc1
+	movz	$a1,$s6,$t1
+	movz.d	$f12,$f29,$t1
+	movz.s	$f25,$f7,$v1
+	mtc1	$s8,$f9
+	mthi	$s1
+	mtlo	$sp
+	mtlo	$t9
+	mul.d	$f20,$f20,$f16
+	mul.s	$f30,$f10,$f2
+	mult	$sp,$s4
+	mult	$sp,$v0
+	multu	$gp,$k0
+	multu	$t1,$s2
+	neg.d	$f27,$f18
+	neg.s	$f1,$f15
+	nop
+	nor	$a3,$zero,$a3
+	or	$t4,$s0,$sp
+	round.l.d	$f12,$f1
+	round.l.s	$f25,$f5
+	round.w.d	$f6,$f4
+	round.w.s	$f27,$f28
+	sb	$s6,-19857($t6)
+	sc	$t7,18904($s3)
+	scd	$t7,-8243($sp)
+	sd	$t4,5835($t2)
+	sdc1	$f31,30574($t5)
+	sdc2	$20,23157($s2)
+	sdl	$a3,-20961($s8)
+	sdr	$t3,-20423($t4)
+	sdxc1	$f11,$t2($t6)
+	sh	$t6,-6704($t7)
+	sllv	$a3,$zero,$t1
+	slt	$s7,$t3,$k1
+	slti	$s1,$t2,9489
+	sltiu	$t9,$t9,-15531
+	sltu	$s4,$s5,$t3
+	sqrt.d	$f17,$f22
+	sqrt.s	$f0,$f1
+	srav	$s1,$s7,$sp
+	srlv	$t9,$s4,$a0
+	ssnop                    # CHECK: ssnop # encoding:  [0x00,0x00,0x00,0x40]
+	sub	$s6,$s3,$t4
+	sub.d	$f18,$f3,$f17
+	sub.s	$f23,$f22,$f22
+	subu	$sp,$s6,$s6
+	suxc1	$f12,$k1($t5)
+	sw	$ra,-10160($sp)
+	swc1	$f6,-8465($t8)
+	swc2	$25,24880($s0)
+	swl	$t7,13694($s3)
+	swr	$s1,-26590($t6)
+	swxc1	$f19,$t4($k0)
+	teqi	$s5,-17504
+	tgei	$s1,5025
+	tgeiu	$sp,-28621
+	tlti	$t6,-21059
+	tltiu	$ra,-5076
+	tnei	$t4,-29647
+	trunc.l.d	$f23,$f23
+	trunc.l.s	$f28,$f31
+	trunc.w.d	$f22,$f15
+	trunc.w.s	$f28,$f30
+	xor	$s2,$a0,$s8
diff --git a/test/MC/Mips/mips64-alu-instructions.s b/test/MC/Mips/mips64-alu-instructions.s
index 8262a46..19ed1ff 100644
--- a/test/MC/Mips/mips64-alu-instructions.s
+++ b/test/MC/Mips/mips64-alu-instructions.s
@@ -81,7 +81,9 @@
 # CHECK:  msubu  $6, $7          # encoding: [0x05,0x00,0xc7,0x70]
 # CHECK:  mult   $3, $5          # encoding: [0x18,0x00,0x65,0x00]
 # CHECK:  multu  $3, $5          # encoding: [0x19,0x00,0x65,0x00]
+# CHECK:  dsub    $9, $6, $7     # encoding: [0x2e,0x48,0xc7,0x00]
 # CHECK:  dsubu   $4, $3, $5     # encoding: [0x2f,0x20,0x65,0x00]
+# CHECK:  daddiu  $9, $6, -17767 # encoding: [0x99,0xba,0xc9,0x64]
 # CHECK:  move    $7, $8         # encoding: [0x2d,0x38,0x00,0x01]
 # CHECK:  .set    push
 # CHECK:  .set    mips32r2
@@ -104,6 +106,47 @@
     msubu  $6,$7
     mult   $3,$5
     multu  $3,$5
+    dsub    $9,$6,$7
     dsubu   $4,$3,$5
+    dsubu   $9,$6,17767
     move   $7,$8
     rdhwr   $5, $29
+
+#------------------------------------------------------------------------------
+# Shortcuts for arithmetic instructions
+#------------------------------------------------------------------------------
+
+# CHECK:	and	$9, $9, $3	# encoding: [0x24,0x48,0x23,0x01]
+# CHECK:	dadd	$9, $9, $3	# encoding: [0x2c,0x48,0x23,0x01]
+# CHECK:	daddu	$9, $9, $3	# encoding: [0x2d,0x48,0x23,0x01]
+# CHECK:	daddi	$9, $9, 10	# encoding: [0x0a,0x00,0x29,0x61]
+# CHECK:	daddiu	$9, $9, 10	# encoding: [0x0a,0x00,0x29,0x65]
+# CHECK:	dsub	$9, $9, $3	# encoding: [0x2e,0x48,0x23,0x01]
+# CHECK:	dsubu	$9, $9, $3	# encoding: [0x2f,0x48,0x23,0x01]
+# CHECK:	daddi	$9, $9, -10	# encoding: [0xf6,0xff,0x29,0x61]
+# CHECK:	daddiu	$9, $9, -10	# encoding: [0xf6,0xff,0x29,0x65]
+# CHECK:	or	$9, $9, $3	# encoding: [0x25,0x48,0x23,0x01]
+# CHECK:	xor	$9, $9, $3	# encoding: [0x26,0x48,0x23,0x01]
+	and	$9, $3
+	dadd	$9, $3
+	daddu	$9, $3
+	dadd	$9, 10
+	daddu	$9, 10
+	dsub	$9, $3
+	dsubu	$9, $3
+	dsub	$9, 10
+	dsubu	$9, 10
+	or	$9, $3
+	xor	$9, $3
+
+#------------------------------------------------------------------------------
+# Did you know that GAS supports complex arithmetic expressions in assembly?
+#------------------------------------------------------------------------------
+# CHECK:	daddiu	$9, $3, 32	# encoding: [0x20,0x00,0x69,0x64]
+# CHECK:	daddiu	$9, $3, 32	# encoding: [0x20,0x00,0x69,0x64]
+# CHECK:	daddiu	$9, $3, -32	# encoding: [0xe0,0xff,0x69,0x64]
+# CHECK:	daddiu	$9, $3, -32	# encoding: [0xe0,0xff,0x69,0x64] 
+	daddiu	$9, $3, 8 * 4
+	daddiu	$9, $3, (8 * 4)
+	dsubu	$9, $3, 8 * 4
+	dsubu	$9, $3, (8 * 4)
diff --git a/test/MC/Mips/mips64-register-names-n32-n64.s b/test/MC/Mips/mips64-register-names-n32-n64.s
new file mode 100644
index 0000000..ee6f88f
--- /dev/null
+++ b/test/MC/Mips/mips64-register-names-n32-n64.s
@@ -0,0 +1,49 @@
+# RUN: llvm-mc %s -triple=mips64-unknown-freebsd -show-encoding | FileCheck %s
+# RUN: llvm-mc %s -triple=mips64-unknown-freebsd -show-encoding \
+# RUN:     -mattr=-n64,+n32 | FileCheck %s
+
+# Check that the register names are mapped to their correct numbers for n32/n64
+# Second byte of addiu with $zero at rt contains the number of the source
+# register.
+
+.set noat
+daddiu	$zero, $zero, 0     # CHECK: encoding: [0x64,0x00,0x00,0x00]
+daddiu	$at, $zero, 0       # CHECK: encoding: [0x64,0x01,0x00,0x00]
+daddiu	$v0, $zero, 0       # CHECK: encoding: [0x64,0x02,0x00,0x00]
+daddiu	$v1, $zero, 0       # CHECK: encoding: [0x64,0x03,0x00,0x00]
+daddiu	$a0, $zero, 0       # CHECK: encoding: [0x64,0x04,0x00,0x00]
+daddiu	$a1, $zero, 0       # CHECK: encoding: [0x64,0x05,0x00,0x00]
+daddiu	$a2, $zero, 0       # CHECK: encoding: [0x64,0x06,0x00,0x00]
+daddiu	$a3, $zero, 0       # CHECK: encoding: [0x64,0x07,0x00,0x00]
+daddiu	$a4, $zero, 0       # CHECK: encoding: [0x64,0x08,0x00,0x00]
+daddiu	$a5, $zero, 0       # CHECK: encoding: [0x64,0x09,0x00,0x00]
+daddiu	$a6, $zero, 0       # CHECK: encoding: [0x64,0x0a,0x00,0x00]
+daddiu	$a7, $zero, 0       # CHECK: encoding: [0x64,0x0b,0x00,0x00]
+daddiu	$t0, $zero, 0 # [*] # CHECK: encoding: [0x64,0x0c,0x00,0x00]
+daddiu	$t1, $zero, 0 # [*] # CHECK: encoding: [0x64,0x0d,0x00,0x00]
+daddiu	$t2, $zero, 0 # [*] # CHECK: encoding: [0x64,0x0e,0x00,0x00]
+daddiu	$t3, $zero, 0 # [*] # CHECK: encoding: [0x64,0x0f,0x00,0x00]
+daddiu	$t4, $zero, 0       # CHECK: encoding: [0x64,0x0c,0x00,0x00]
+daddiu	$t5, $zero, 0       # CHECK: encoding: [0x64,0x0d,0x00,0x00]
+daddiu	$t6, $zero, 0       # CHECK: encoding: [0x64,0x0e,0x00,0x00]
+daddiu	$t7, $zero, 0       # CHECK: encoding: [0x64,0x0f,0x00,0x00]
+daddiu	$s0, $zero, 0       # CHECK: encoding: [0x64,0x10,0x00,0x00]
+daddiu	$s1, $zero, 0       # CHECK: encoding: [0x64,0x11,0x00,0x00]
+daddiu	$s2, $zero, 0       # CHECK: encoding: [0x64,0x12,0x00,0x00]
+daddiu	$s3, $zero, 0       # CHECK: encoding: [0x64,0x13,0x00,0x00]
+daddiu	$s4, $zero, 0       # CHECK: encoding: [0x64,0x14,0x00,0x00]
+daddiu	$s5, $zero, 0       # CHECK: encoding: [0x64,0x15,0x00,0x00]
+daddiu	$s6, $zero, 0       # CHECK: encoding: [0x64,0x16,0x00,0x00]
+daddiu	$s7, $zero, 0       # CHECK: encoding: [0x64,0x17,0x00,0x00]
+daddiu	$t8, $zero, 0       # CHECK: encoding: [0x64,0x18,0x00,0x00]
+daddiu	$t9, $zero, 0       # CHECK: encoding: [0x64,0x19,0x00,0x00]
+daddiu	$kt0, $zero, 0      # CHECK: encoding: [0x64,0x1a,0x00,0x00]
+daddiu	$kt1, $zero, 0      # CHECK: encoding: [0x64,0x1b,0x00,0x00]
+daddiu	$gp, $zero, 0       # CHECK: encoding: [0x64,0x1c,0x00,0x00]
+daddiu	$sp, $zero, 0       # CHECK: encoding: [0x64,0x1d,0x00,0x00]
+daddiu	$s8, $zero, 0       # CHECK: encoding: [0x64,0x1e,0x00,0x00]
+daddiu	$fp, $zero, 0       # CHECK: encoding: [0x64,0x1e,0x00,0x00]
+daddiu	$ra, $zero, 0       # CHECK: encoding: [0x64,0x1f,0x00,0x00]
+
+# [*] - t0-t3 are aliases of t4-t7 for compatibility with both the original
+#       ABI documentation (using t4-t7) and GNU As (using t0-t3)
diff --git a/test/MC/Mips/mips64-register-names-o32.s b/test/MC/Mips/mips64-register-names-o32.s
new file mode 100644
index 0000000..c170578
--- /dev/null
+++ b/test/MC/Mips/mips64-register-names-o32.s
@@ -0,0 +1,41 @@
+# RUN: llvm-mc %s -triple=mips64-unknown-freebsd -show-encoding \
+# RUN:     -mattr=-n64,+o32 | FileCheck %s
+
+# Check that the register names are mapped to their correct numbers for o32
+# Second byte of daddiu with $zero at rt contains the number of the source
+# register.
+
+.set noat
+daddiu	$zero, $zero, 0 # CHECK: encoding: [0x64,0x00,0x00,0x00]
+daddiu	$at, $zero, 0   # CHECK: encoding: [0x64,0x01,0x00,0x00]
+daddiu	$v0, $zero, 0   # CHECK: encoding: [0x64,0x02,0x00,0x00]
+daddiu	$v1, $zero, 0   # CHECK: encoding: [0x64,0x03,0x00,0x00]
+daddiu	$a0, $zero, 0   # CHECK: encoding: [0x64,0x04,0x00,0x00]
+daddiu	$a1, $zero, 0   # CHECK: encoding: [0x64,0x05,0x00,0x00]
+daddiu	$a2, $zero, 0   # CHECK: encoding: [0x64,0x06,0x00,0x00]
+daddiu	$a3, $zero, 0   # CHECK: encoding: [0x64,0x07,0x00,0x00]
+daddiu	$t0, $zero, 0   # CHECK: encoding: [0x64,0x08,0x00,0x00]
+daddiu	$t1, $zero, 0   # CHECK: encoding: [0x64,0x09,0x00,0x00]
+daddiu	$t2, $zero, 0   # CHECK: encoding: [0x64,0x0a,0x00,0x00]
+daddiu	$t3, $zero, 0   # CHECK: encoding: [0x64,0x0b,0x00,0x00]
+daddiu	$t4, $zero, 0   # CHECK: encoding: [0x64,0x0c,0x00,0x00]
+daddiu	$t5, $zero, 0   # CHECK: encoding: [0x64,0x0d,0x00,0x00]
+daddiu	$t6, $zero, 0   # CHECK: encoding: [0x64,0x0e,0x00,0x00]
+daddiu	$t7, $zero, 0   # CHECK: encoding: [0x64,0x0f,0x00,0x00]
+daddiu	$s0, $zero, 0   # CHECK: encoding: [0x64,0x10,0x00,0x00]
+daddiu	$s1, $zero, 0   # CHECK: encoding: [0x64,0x11,0x00,0x00]
+daddiu	$s2, $zero, 0   # CHECK: encoding: [0x64,0x12,0x00,0x00]
+daddiu	$s3, $zero, 0   # CHECK: encoding: [0x64,0x13,0x00,0x00]
+daddiu	$s4, $zero, 0   # CHECK: encoding: [0x64,0x14,0x00,0x00]
+daddiu	$s5, $zero, 0   # CHECK: encoding: [0x64,0x15,0x00,0x00]
+daddiu	$s6, $zero, 0   # CHECK: encoding: [0x64,0x16,0x00,0x00]
+daddiu	$s7, $zero, 0   # CHECK: encoding: [0x64,0x17,0x00,0x00]
+daddiu	$t8, $zero, 0   # CHECK: encoding: [0x64,0x18,0x00,0x00]
+daddiu	$t9, $zero, 0   # CHECK: encoding: [0x64,0x19,0x00,0x00]
+daddiu	$k0, $zero, 0   # CHECK: encoding: [0x64,0x1a,0x00,0x00]
+daddiu	$k1, $zero, 0   # CHECK: encoding: [0x64,0x1b,0x00,0x00]
+daddiu	$gp, $zero, 0   # CHECK: encoding: [0x64,0x1c,0x00,0x00]
+daddiu	$sp, $zero, 0   # CHECK: encoding: [0x64,0x1d,0x00,0x00]
+daddiu	$fp, $zero, 0   # CHECK: encoding: [0x64,0x1e,0x00,0x00]
+daddiu	$s8, $zero, 0   # CHECK: encoding: [0x64,0x1e,0x00,0x00]
+daddiu	$ra, $zero, 0   # CHECK: encoding: [0x64,0x1f,0x00,0x00]
diff --git a/test/MC/Mips/mips64-register-names.s b/test/MC/Mips/mips64-register-names.s
deleted file mode 100644
index 16783ee..0000000
--- a/test/MC/Mips/mips64-register-names.s
+++ /dev/null
@@ -1,70 +0,0 @@
-# RUN: llvm-mc %s -triple=mips64-unknown-freebsd -show-encoding | FileCheck %s
-
-# Check that the register names are mapped to their correct numbers for n64
-# Second byte of addiu with $zero at rt contains the number of the source
-# register.
-
-# CHECK: encoding: [0x64,0x00,0x00,0x00]
-# CHECK: encoding: [0x64,0x01,0x00,0x00]
-# CHECK: encoding: [0x64,0x02,0x00,0x00]
-# CHECK: encoding: [0x64,0x03,0x00,0x00]
-# CHECK: encoding: [0x64,0x04,0x00,0x00]
-# CHECK: encoding: [0x64,0x05,0x00,0x00]
-# CHECK: encoding: [0x64,0x06,0x00,0x00]
-# CHECK: encoding: [0x64,0x07,0x00,0x00]
-# CHECK: encoding: [0x64,0x08,0x00,0x00]
-# CHECK: encoding: [0x64,0x09,0x00,0x00]
-# CHECK: encoding: [0x64,0x0a,0x00,0x00]
-# CHECK: encoding: [0x64,0x0b,0x00,0x00]
-# CHECK: encoding: [0x64,0x0c,0x00,0x00]
-# CHECK: encoding: [0x64,0x0d,0x00,0x00]
-# CHECK: encoding: [0x64,0x0e,0x00,0x00]
-# CHECK: encoding: [0x64,0x0f,0x00,0x00]
-# CHECK: encoding: [0x64,0x10,0x00,0x00]
-# CHECK: encoding: [0x64,0x11,0x00,0x00]
-# CHECK: encoding: [0x64,0x12,0x00,0x00]
-# CHECK: encoding: [0x64,0x13,0x00,0x00]
-# CHECK: encoding: [0x64,0x14,0x00,0x00]
-# CHECK: encoding: [0x64,0x15,0x00,0x00]
-# CHECK: encoding: [0x64,0x16,0x00,0x00]
-# CHECK: encoding: [0x64,0x17,0x00,0x00]
-# CHECK: encoding: [0x64,0x18,0x00,0x00]
-# CHECK: encoding: [0x64,0x19,0x00,0x00]
-# CHECK: encoding: [0x64,0x1a,0x00,0x00]
-# CHECK: encoding: [0x64,0x1b,0x00,0x00]
-# CHECK: encoding: [0x64,0x1c,0x00,0x00]
-# CHECK: encoding: [0x64,0x1d,0x00,0x00]
-# CHECK: encoding: [0x64,0x1e,0x00,0x00]
-# CHECK: encoding: [0x64,0x1f,0x00,0x00]
-daddiu	$zero, $zero, 0
-daddiu	$at, $zero, 0
-daddiu	$v0, $zero, 0
-daddiu	$v1, $zero, 0
-daddiu	$a0, $zero, 0
-daddiu	$a1, $zero, 0
-daddiu	$a2, $zero, 0
-daddiu	$a3, $zero, 0
-daddiu	$a4, $zero, 0
-daddiu	$a5, $zero, 0
-daddiu	$a6, $zero, 0
-daddiu	$a7, $zero, 0
-daddiu	$t4, $zero, 0
-daddiu	$t5, $zero, 0
-daddiu	$t6, $zero, 0
-daddiu	$t7, $zero, 0
-daddiu	$s0, $zero, 0
-daddiu	$s1, $zero, 0
-daddiu	$s2, $zero, 0
-daddiu	$s3, $zero, 0
-daddiu	$s4, $zero, 0
-daddiu	$s5, $zero, 0
-daddiu	$s6, $zero, 0
-daddiu	$s7, $zero, 0
-daddiu	$t8, $zero, 0
-daddiu	$t9, $zero, 0
-daddiu	$kt0, $zero, 0
-daddiu	$kt1, $zero, 0
-daddiu	$gp, $zero, 0
-daddiu	$sp, $zero, 0
-daddiu	$s8, $zero, 0
-daddiu	$ra, $zero, 0
diff --git a/test/MC/Mips/mips64/invalid-mips64r2-xfail.s b/test/MC/Mips/mips64/invalid-mips64r2-xfail.s
new file mode 100644
index 0000000..4baf26b
--- /dev/null
+++ b/test/MC/Mips/mips64/invalid-mips64r2-xfail.s
@@ -0,0 +1,15 @@
+# Instructions that are supposed to be invalid but currently aren't
+# This test will XPASS if any insn stops assembling.
+#
+# RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips4 \
+# RUN:     2> %t1
+# RUN: not FileCheck %s < %t1
+# XFAIL: *
+
+# CHECK-NOT: error
+        .set noat
+	di	$s8
+	ei	$t6
+	mfhc1	$s8,$f24
+	mthc1	$zero,$f16
+	rdhwr	$sp,$11
diff --git a/test/MC/Mips/mips64/invalid-mips64r2.s b/test/MC/Mips/mips64/invalid-mips64r2.s
new file mode 100644
index 0000000..41aa8ae
--- /dev/null
+++ b/test/MC/Mips/mips64/invalid-mips64r2.s
@@ -0,0 +1,17 @@
+# Instructions that are invalid
+#
+# RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64 \
+# RUN:     2>%t1
+# RUN: FileCheck %s < %t1
+
+	.set noat
+	dsbh	$v1,$t6             # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+	dshd	$v0,$sp             # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+	madd.s	$f1,$f31,$f19,$f25  # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+	msub.s	$f12,$f19,$f10,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+	nmadd.s	$f0,$f5,$f25,$f12   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+	nmsub.s	$f1,$f24,$f19,$f4   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+	pause                       # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+	seb	$t9,$t7             # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+	seh	$v1,$t4             # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+	wsbh	$k1,$t1             # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
diff --git a/test/MC/Mips/mips64/valid-xfail.s b/test/MC/Mips/mips64/valid-xfail.s
new file mode 100644
index 0000000..61bf060
--- /dev/null
+++ b/test/MC/Mips/mips64/valid-xfail.s
@@ -0,0 +1,98 @@
+# Instructions that should be valid but currently fail for known reasons (e.g.
+# they aren't implemented yet).
+# This test is set up to XPASS if any instruction generates an encoding.
+#
+# RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64 | not FileCheck %s
+# CHECK-NOT: encoding
+# XFAIL: *
+
+	.set noat
+	abs.ps	$f22,$f8
+	add.ps	$f25,$f27,$f13
+	alnv.ob	$v22,$v19,$v30,$v1
+	alnv.ob	$v31,$v23,$v30,$at
+	alnv.ob	$v8,$v17,$v30,$a1
+	alnv.ps	$f12,$f18,$f30,$t4
+	c.eq.d	$fcc1,$f15,$f15
+	c.eq.ps	$fcc5,$f0,$f9
+	c.eq.s	$fcc5,$f24,$f17
+	c.f.d	$fcc4,$f11,$f21
+	c.f.ps	$fcc6,$f11,$f11
+	c.f.s	$fcc4,$f30,$f7
+	c.le.d	$fcc4,$f18,$f1
+	c.le.ps	$fcc1,$f7,$f20
+	c.le.s	$fcc6,$f24,$f4
+	c.lt.d	$fcc3,$f9,$f3
+	c.lt.ps	$f19,$f5
+	c.lt.s	$fcc2,$f17,$f14
+	c.nge.d	$fcc5,$f21,$f16
+	c.nge.ps	$f1,$f26
+	c.nge.s	$fcc3,$f11,$f8
+	c.ngl.ps	$f21,$f30
+	c.ngl.s	$fcc2,$f31,$f23
+	c.ngle.ps	$fcc7,$f12,$f20
+	c.ngle.s	$fcc2,$f18,$f23
+	c.ngt.d	$fcc4,$f24,$f7
+	c.ngt.ps	$fcc5,$f30,$f6
+	c.ngt.s	$fcc5,$f8,$f13
+	c.ole.d	$fcc2,$f16,$f31
+	c.ole.ps	$fcc7,$f21,$f8
+	c.ole.s	$fcc3,$f7,$f20
+	c.olt.d	$fcc4,$f19,$f28
+	c.olt.ps	$fcc3,$f7,$f16
+	c.olt.s	$fcc6,$f20,$f7
+	c.seq.d	$fcc4,$f31,$f7
+	c.seq.ps	$fcc6,$f31,$f14
+	c.seq.s	$fcc7,$f1,$f25
+	c.sf.ps	$fcc6,$f4,$f6
+	c.ueq.d	$fcc4,$f13,$f25
+	c.ueq.ps	$fcc1,$f5,$f29
+	c.ueq.s	$fcc6,$f3,$f30
+	c.ule.d	$fcc7,$f25,$f18
+	c.ule.ps	$fcc6,$f17,$f3
+	c.ule.s	$fcc7,$f21,$f30
+	c.ult.d	$fcc6,$f6,$f17
+	c.ult.ps	$fcc7,$f14,$f0
+	c.ult.s	$fcc7,$f24,$f10
+	c.un.d	$fcc6,$f23,$f24
+	c.un.ps	$fcc4,$f2,$f26
+	c.un.s	$fcc1,$f30,$f4
+	cvt.ps.s	$f3,$f18,$f19
+	cvt.s.pl	$f30,$f1
+	cvt.s.pu	$f14,$f25
+	dmfc0	$t2,c0_watchhi,2
+	dmtc0	$t7,c0_datalo
+	madd.d	$f18,$f19,$f26,$f20
+	madd.ps	$f22,$f3,$f14,$f3
+	madd.s	$f1,$f31,$f19,$f25
+	mov.ps	$f22,$f17
+	movf.ps	$f10,$f28,$fcc6
+	movn.ps	$f31,$f31,$s3
+	movt.ps	$f20,$f25,$fcc2
+	movz.ps	$f18,$f17,$ra
+	msgn.qh	$v0,$v24,$v20
+	msgn.qh	$v12,$v21,$v0[1]
+	msub.d	$f10,$f1,$f31,$f18
+	msub.ps	$f12,$f14,$f29,$f17
+	msub.s	$f12,$f19,$f10,$f16
+	mul.ps	$f14,$f0,$f16
+	neg.ps	$f19,$f13
+	nmadd.d	$f18,$f9,$f14,$f19
+	nmadd.ps	$f27,$f4,$f9,$f25
+	nmadd.s	$f0,$f5,$f25,$f12
+	nmsub.d	$f30,$f8,$f16,$f30
+	nmsub.ps	$f6,$f12,$f14,$f17
+	nmsub.s	$f1,$f24,$f19,$f4
+	pll.ps	$f25,$f9,$f30
+	plu.ps	$f1,$f26,$f29
+	pul.ps	$f9,$f30,$f26
+	puu.ps	$f24,$f9,$f2
+	recip.d	$f19,$f6
+	recip.s	$f3,$f30
+	rsqrt.d	$f3,$f28
+	rsqrt.s	$f4,$f8
+	sub.ps	$f5,$f14,$f26
+	tlbp
+	tlbr
+	tlbwi
+	tlbwr
diff --git a/test/MC/Mips/mips64/valid.s b/test/MC/Mips/mips64/valid.s
new file mode 100644
index 0000000..9ccb2ff
--- /dev/null
+++ b/test/MC/Mips/mips64/valid.s
@@ -0,0 +1,176 @@
+# Instructions that are valid
+#
+# RUN: llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64 | FileCheck %s
+
+        .set noat
+	abs.d	$f7,$f25 # CHECK: encoding
+	abs.s	$f9,$f16
+	add	$s7,$s2,$a1
+	add.d	$f1,$f7,$f29
+	add.s	$f8,$f21,$f24
+	addi	$t5,$t1,26322
+	addu	$t1,$a0,$a2
+	and	$s7,$v0,$t4
+	c.ngl.d	$f29,$f29
+	c.ngle.d	$f0,$f16
+	c.sf.d	$f30,$f0
+	c.sf.s	$f14,$f22
+	ceil.l.d	$f1,$f3
+	ceil.l.s	$f18,$f13
+	ceil.w.d	$f11,$f25
+	ceil.w.s	$f6,$f20
+	cfc1	$s1,$21
+	clo	$t3,$a1
+	clz	$sp,$gp
+	ctc1	$a2,$26
+	cvt.d.l	$f4,$f16
+	cvt.d.s	$f22,$f28
+	cvt.d.w	$f26,$f11
+	cvt.l.d	$f24,$f15
+	cvt.l.s	$f11,$f29
+	cvt.s.d	$f26,$f8
+	cvt.s.l	$f15,$f30
+	cvt.s.w	$f22,$f15
+	cvt.w.d	$f20,$f14
+	cvt.w.s	$f20,$f24
+	dadd	$s3,$at,$ra
+	daddi	$sp,$s4,-27705
+	daddiu	$k0,$s6,-4586
+	dclo	$s2,$a2
+	dclz	$s0,$t9
+	deret
+	ddiv	$zero,$k0,$s3
+	ddivu	$zero,$s0,$s1
+	div	$zero,$t9,$t3
+	div.d	$f29,$f20,$f27
+	div.s	$f4,$f5,$f15
+	divu	$zero,$t9,$t7
+	dmfc1	$t4,$f13
+	dmtc1	$s0,$f14
+	dmult	$s7,$t1
+	dmultu	$a1,$a2
+	dsllv	$zero,$s4,$t4
+	dsrav	$gp,$s2,$s3
+	dsrlv	$s3,$t6,$s4
+	dsub	$a3,$s6,$t0
+	dsubu	$a1,$a1,$k0
+	ehb                      # CHECK: ehb # encoding:  [0x00,0x00,0x00,0xc0]
+	eret
+	floor.l.d	$f26,$f7
+	floor.l.s	$f12,$f5
+	floor.w.d	$f14,$f11
+	floor.w.s	$f8,$f9
+	lb	$t8,-14515($t2)
+	lbu	$t0,30195($v1)
+	ld	$sp,-28645($s1)
+	ldc1	$f11,16391($s0)
+	ldc2	$8,-21181($at)
+	ldl	$t8,-4167($t8)
+	ldr	$t6,-30358($s4)
+	ldxc1	$f8,$s7($t7)
+	lh	$t3,-8556($s5)
+	lhu	$s3,-22851($v0)
+	li	$at,-29773
+	li	$zero,-29889
+	ll	$v0,-7321($s2)
+	lld	$zero,-14736($ra)
+	luxc1	$f19,$s6($s5)
+	lw	$t0,5674($a1)
+	lwc1	$f16,10225($k0)
+	lwc2	$18,-841($a2)
+	lwl	$s4,-4231($t7)
+	lwr	$zero,-19147($gp)
+	lwu	$s3,-24086($v1)
+	lwxc1	$f12,$s1($s8)
+	madd	$s6,$t5
+	madd	$zero,$t1
+	maddu	$s3,$gp
+	maddu	$t8,$s2
+	mfc0	$a2,$14,1
+	mfc1	$a3,$f27
+	mfhi	$s3
+	mfhi	$sp
+	mflo	$s1
+	mov.d	$f20,$f14
+	mov.s	$f2,$f27
+	move	$a0,$a3
+	move	$s5,$a0
+	move	$s8,$a0
+	move	$t9,$a2
+	movf	$gp,$t0,$fcc7
+	movf.d	$f6,$f11,$fcc5
+	movf.s	$f23,$f5,$fcc6
+	movn	$v1,$s1,$s0
+	movn.d	$f27,$f21,$k0
+	movn.s	$f12,$f0,$s7
+	movt	$zero,$s4,$fcc5
+	movt.d	$f0,$f2,$fcc0
+	movt.s	$f30,$f2,$fcc1
+	movz	$a1,$s6,$t1
+	movz.d	$f12,$f29,$t1
+	movz.s	$f25,$f7,$v1
+	msub	$s7,$k1
+	msubu	$t7,$a1
+	mtc0	$t1,$29,3
+	mtc1	$s8,$f9
+	mthi	$s1
+	mtlo	$sp
+	mtlo	$t9
+	mul	$s0,$s4,$at
+	mul.d	$f20,$f20,$f16
+	mul.s	$f30,$f10,$f2
+	mult	$sp,$s4
+	mult	$sp,$v0
+	multu	$gp,$k0
+	multu	$t1,$s2
+	neg.d	$f27,$f18
+	neg.s	$f1,$f15
+	nop
+	nor	$a3,$zero,$a3
+	or	$t4,$s0,$sp
+	round.l.d	$f12,$f1
+	round.l.s	$f25,$f5
+	round.w.d	$f6,$f4
+	round.w.s	$f27,$f28
+	sb	$s6,-19857($t6)
+	sc	$t7,18904($s3)
+	scd	$t7,-8243($sp)
+	sd	$t4,5835($t2)
+	sdc1	$f31,30574($t5)
+	sdc2	$20,23157($s2)
+	sdl	$a3,-20961($s8)
+	sdr	$t3,-20423($t4)
+	sdxc1	$f11,$t2($t6)
+	sh	$t6,-6704($t7)
+	sllv	$a3,$zero,$t1
+	slt	$s7,$t3,$k1
+	slti	$s1,$t2,9489
+	sltiu	$t9,$t9,-15531
+	sltu	$s4,$s5,$t3
+	sqrt.d	$f17,$f22
+	sqrt.s	$f0,$f1
+	srav	$s1,$s7,$sp
+	srlv	$t9,$s4,$a0
+	ssnop                    # CHECK: ssnop # encoding:  [0x00,0x00,0x00,0x40]
+	sub	$s6,$s3,$t4
+	sub.d	$f18,$f3,$f17
+	sub.s	$f23,$f22,$f22
+	subu	$sp,$s6,$s6
+	suxc1	$f12,$k1($t5)
+	sw	$ra,-10160($sp)
+	swc1	$f6,-8465($t8)
+	swc2	$25,24880($s0)
+	swl	$t7,13694($s3)
+	swr	$s1,-26590($t6)
+	swxc1	$f19,$t4($k0)
+	teqi	$s5,-17504
+	tgei	$s1,5025
+	tgeiu	$sp,-28621
+	tlti	$t6,-21059
+	tltiu	$ra,-5076
+	tnei	$t4,-29647
+	trunc.l.d	$f23,$f23
+	trunc.l.s	$f28,$f31
+	trunc.w.d	$f22,$f15
+	trunc.w.s	$f28,$f30
+	xor	$s2,$a0,$s8
diff --git a/test/MC/Mips/mips64eb-fixups.s b/test/MC/Mips/mips64eb-fixups.s
new file mode 100644
index 0000000..1ca8b0a
--- /dev/null
+++ b/test/MC/Mips/mips64eb-fixups.s
@@ -0,0 +1,43 @@
+# RUN: llvm-mc -filetype=obj -triple mips64eb-unknown-freebsd %s -o - | llvm-readobj -s -sd | FileCheck %s
+
+        .section        .fixups,"",@progbits
+        .byte   0xff
+$diff0 = ($loc1)-($loc0)
+        .2byte   ($diff0)
+
+        .byte   0xff
+$diff1 = ($loc2)-($loc0)
+        .4byte  ($diff1)
+
+        .byte   0xff
+$diff2 = ($loc3)-($loc0)
+        .8byte  ($diff2)
+        .byte   0xff
+
+$loc0:
+        .byte   0xee
+$loc1:
+        .byte   0xdd
+$loc2:
+        .byte   0xcc
+$loc3:
+
+# CHECK:	AddressSize: 64bit
+# CHECK:	  Section {
+# CHECK:	    Name: .fixups (12)
+# CHECK-NEXT:	    Type: SHT_PROGBITS (0x1)
+# CHECK-NEXT:	    Flags [ (0x0)
+# CHECK-NEXT:	    ]
+# CHECK-NEXT:	    Address: 0x0
+# CHECK-NEXT:	    Offset: 0x40
+# CHECK-NEXT:	    Size: 21
+# CHECK-NEXT:	    Link: 0
+# CHECK-NEXT:	    Info: 0
+# CHECK-NEXT:	    AddressAlignment: 1
+# CHECK-NEXT:	    EntrySize: 0
+# CHECK-NEXT:	    SectionData (
+# CHECK-NEXT:	      0000: FF0001FF 00000002 FF000000 00000000  |................|
+# CHECK-NEXT:	      0010: 03FFEEDD CC                          |.....|
+# CHECK-NEXT:	    )
+# CHECK-NEXT:	  }
+# CHECK:	]
diff --git a/test/MC/Mips/mips64r2/valid-xfail.s b/test/MC/Mips/mips64r2/valid-xfail.s
new file mode 100644
index 0000000..9d9d6cd
--- /dev/null
+++ b/test/MC/Mips/mips64r2/valid-xfail.s
@@ -0,0 +1,316 @@
+# Instructions that should be valid but currently fail for known reasons (e.g.
+# they aren't implemented yet).
+# This test is set up to XPASS if any instruction generates an encoding.
+#
+# RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64r2 | not FileCheck %s
+# CHECK-NOT: encoding
+# XFAIL: *
+# REQUIRES: asserts
+
+	.set noat
+	abs.ps	$f22,$f8
+	absq_s.ph	$t0,$a0
+	absq_s.qb	$t7,$s1
+	absq_s.w	$s3,$ra
+	add.ps	$f25,$f27,$f13
+	addq.ph	$s1,$t7,$at
+	addq_s.ph	$s3,$s6,$s2
+	addq_s.w	$a2,$t0,$at
+	addqh.ph	$s4,$t6,$s1
+	addqh.w	$s7,$s7,$k1
+	addqh_r.ph	$sp,$t9,$s8
+	addqh_r.w	$t0,$v1,$zero
+	addsc	$s8,$t7,$t4
+	addu.ph	$a2,$t6,$s3
+	addu.qb	$s6,$v1,$v1
+	addu_s.ph	$a3,$s3,$gp
+	addu_s.qb	$s4,$s8,$s1
+	adduh.qb	$a1,$a1,$at
+	adduh_r.qb	$a0,$t1,$t4
+	addwc	$k0,$s6,$s7
+	alnv.ob	$v22,$v19,$v30,$v1
+	alnv.ob	$v31,$v23,$v30,$at
+	alnv.ob	$v8,$v17,$v30,$a1
+	alnv.ps	$f12,$f18,$f30,$t4
+	and.v	$w10,$w25,$w29
+	bitrev	$t6,$at
+	bmnz.v	$w15,$w2,$w28
+	bmz.v	$w13,$w11,$w21
+	bsel.v	$w28,$w7,$w0
+	c.eq.d	$fcc1,$f15,$f15
+	c.eq.ps	$fcc5,$f0,$f9
+	c.eq.s	$fcc5,$f24,$f17
+	c.f.d	$fcc4,$f11,$f21
+	c.f.ps	$fcc6,$f11,$f11
+	c.f.s	$fcc4,$f30,$f7
+	c.le.d	$fcc4,$f18,$f1
+	c.le.ps	$fcc1,$f7,$f20
+	c.le.s	$fcc6,$f24,$f4
+	c.lt.d	$fcc3,$f9,$f3
+	c.lt.ps	$f19,$f5
+	c.lt.s	$fcc2,$f17,$f14
+	c.nge.d	$fcc5,$f21,$f16
+	c.nge.ps	$f1,$f26
+	c.nge.s	$fcc3,$f11,$f8
+	c.ngl.ps	$f21,$f30
+	c.ngl.s	$fcc2,$f31,$f23
+	c.ngle.ps	$fcc7,$f12,$f20
+	c.ngle.s	$fcc2,$f18,$f23
+	c.ngt.d	$fcc4,$f24,$f7
+	c.ngt.ps	$fcc5,$f30,$f6
+	c.ngt.s	$fcc5,$f8,$f13
+	c.ole.d	$fcc2,$f16,$f31
+	c.ole.ps	$fcc7,$f21,$f8
+	c.ole.s	$fcc3,$f7,$f20
+	c.olt.d	$fcc4,$f19,$f28
+	c.olt.ps	$fcc3,$f7,$f16
+	c.olt.s	$fcc6,$f20,$f7
+	c.seq.d	$fcc4,$f31,$f7
+	c.seq.ps	$fcc6,$f31,$f14
+	c.seq.s	$fcc7,$f1,$f25
+	c.sf.ps	$fcc6,$f4,$f6
+	c.ueq.d	$fcc4,$f13,$f25
+	c.ueq.ps	$fcc1,$f5,$f29
+	c.ueq.s	$fcc6,$f3,$f30
+	c.ule.d	$fcc7,$f25,$f18
+	c.ule.ps	$fcc6,$f17,$f3
+	c.ule.s	$fcc7,$f21,$f30
+	c.ult.d	$fcc6,$f6,$f17
+	c.ult.ps	$fcc7,$f14,$f0
+	c.ult.s	$fcc7,$f24,$f10
+	c.un.d	$fcc6,$f23,$f24
+	c.un.ps	$fcc4,$f2,$f26
+	c.un.s	$fcc1,$f30,$f4
+	cvt.ps.s	$f3,$f18,$f19
+	cmp.eq.ph	$s7,$t6
+	cmp.le.ph	$t0,$t6
+	cmp.lt.ph	$k0,$sp
+	cmpgdu.eq.qb	$s3,$zero,$k0
+	cmpgdu.le.qb	$v1,$t7,$s2
+	cmpgdu.lt.qb	$s0,$gp,$sp
+	cmpgu.eq.qb	$t6,$s6,$s8
+	cmpgu.le.qb	$t1,$a3,$s4
+	cmpgu.lt.qb	$sp,$at,$t0
+	cmpu.eq.qb	$v0,$t8
+	cmpu.le.qb	$s1,$a1
+	cmpu.lt.qb	$at,$a3
+	cvt.s.pl	$f30,$f1
+	cvt.s.pu	$f14,$f25
+	dmfc0	$t2,c0_watchhi,2
+	dmfgc0	$gp,c0_perfcnt,6
+	dmt	$k0
+	dmtc0	$t7,c0_datalo
+	dmtgc0	$a2,c0_watchlo,2
+	dpa.w.ph	$ac1,$s7,$k0
+	dpaq_s.w.ph	$ac2,$a0,$t5
+	dpaq_sa.l.w	$ac0,$a2,$t6
+	dpaqx_s.w.ph	$ac3,$a0,$t8
+	dpaqx_sa.w.ph	$ac1,$zero,$s5
+	dpau.h.qbl	$ac1,$t2,$t8
+	dpau.h.qbr	$ac1,$s7,$s6
+	dpax.w.ph	$ac3,$a0,$k0
+	dps.w.ph	$ac1,$a3,$a1
+	dpsq_s.w.ph	$ac0,$gp,$k0
+	dpsq_sa.l.w	$ac0,$a3,$t7
+	dpsqx_s.w.ph	$ac3,$t5,$a3
+	dpsqx_sa.w.ph	$ac3,$sp,$s2
+	dpsu.h.qbl	$ac2,$t6,$t2
+	dpsu.h.qbr	$ac2,$a1,$s6
+	dpsx.w.ph	$ac0,$s7,$gp
+	drorv	$at,$a1,$s7
+	dvpe	$s6
+	emt	$t0
+	evpe	$v0
+	extpdpv	$s6,$ac0,$s8
+	extpv	$t5,$ac0,$t6
+	extrv.w	$t0,$ac3,$at
+	extrv_r.w	$t0,$ac1,$s6
+	extrv_rs.w	$gp,$ac1,$s6
+	extrv_s.h	$s2,$ac1,$t6
+	fclass.d	$w14,$w27
+	fclass.w	$w19,$w28
+	fexupl.d	$w10,$w29
+	fexupl.w	$w12,$w27
+	fexupr.d	$w31,$w15
+	fexupr.w	$w29,$w12
+	ffint_s.d	$w1,$w30
+	ffint_s.w	$w16,$w14
+	ffint_u.d	$w23,$w18
+	ffint_u.w	$w19,$w12
+	ffql.d	$w2,$w3
+	ffql.w	$w9,$w0
+	ffqr.d	$w25,$w24
+	ffqr.w	$w10,$w6
+	fill.b	$w9,$v1
+	fill.d	$w28,$t0
+	fill.h	$w9,$t0
+	fill.w	$w31,$t7
+	flog2.d	$w12,$w16
+	flog2.w	$w19,$w23
+	fork	$s2,$t0,$a0
+	frcp.d	$w12,$w4
+	frcp.w	$w30,$w8
+	frint.d	$w20,$w8
+	frint.w	$w11,$w29
+	frsqrt.d	$w29,$w2
+	frsqrt.w	$w9,$w8
+	fsqrt.d	$w3,$w1
+	fsqrt.w	$w5,$w15
+	ftint_s.d	$w31,$w26
+	ftint_s.w	$w27,$w14
+	ftint_u.d	$w5,$w31
+	ftint_u.w	$w12,$w29
+	ftrunc_s.d	$w4,$w22
+	ftrunc_s.w	$w24,$w7
+	ftrunc_u.d	$w20,$w25
+	ftrunc_u.w	$w7,$w26
+	insv	$s2,$at
+	iret
+	lbe	$t6,122($t1)
+	lbue	$t3,-108($t2)
+	lbux	$t1,$t6($v0)
+	lhe	$s6,219($v1)
+	lhue	$gp,118($t3)
+	lhx	$sp,$k0($t7)
+	lle	$gp,-237($ra)
+	lwe	$ra,-145($t6)
+	lwle	$t3,-42($t3)
+	lwre	$sp,-152($t8)
+	lwx	$t4,$t4($s4)
+	madd.d	$f18,$f19,$f26,$f20
+	madd.ps	$f22,$f3,$f14,$f3
+	maq_s.w.phl	$ac2,$t9,$t3
+	maq_s.w.phr	$ac0,$t2,$t9
+	maq_sa.w.phl	$ac3,$a1,$v1
+	maq_sa.w.phr	$ac1,$at,$t2
+	mfgc0	$s6,c0_datahi1
+	mflo	$t1,$ac2
+	modsub	$a3,$t4,$a3
+	mov.ps	$f22,$f17
+	movf.ps	$f10,$f28,$fcc6
+	movn.ps	$f31,$f31,$s3
+	movt.ps	$f20,$f25,$fcc2
+	movz.ps	$f18,$f17,$ra
+	msgn.qh	$v0,$v24,$v20
+	msgn.qh	$v12,$v21,$v0[1]
+	msub	$ac2,$sp,$t6
+	msub.d	$f10,$f1,$f31,$f18
+	msub.ps	$f12,$f14,$f29,$f17
+	msubu	$ac2,$a1,$t8
+	mtc0	$t1,c0_datahi1
+	mtgc0	$s4,$21,7
+	mthi	$v0,$ac1
+	mthlip	$a3,$ac0
+	mul.ph	$s4,$t8,$s0
+	mul.ps	$f14,$f0,$f16
+	mul_s.ph	$t2,$t6,$t7
+	muleq_s.w.phl	$t3,$s4,$s4
+	muleq_s.w.phr	$s6,$a0,$s8
+	muleu_s.ph.qbl	$a2,$t6,$t0
+	muleu_s.ph.qbr	$a1,$ra,$t1
+	mulq_rs.ph	$s2,$t6,$t7
+	mulq_rs.w	$at,$s4,$t9
+	mulq_s.ph	$s0,$k1,$t7
+	mulq_s.w	$t1,$a3,$s0
+	mulsa.w.ph	$ac1,$s4,$s6
+	mulsaq_s.w.ph	$ac0,$ra,$s2
+	neg.ps	$f19,$f13
+	nloc.b	$w12,$w30
+	nloc.d	$w16,$w7
+	nloc.h	$w21,$w17
+	nloc.w	$w17,$w16
+	nlzc.b	$w12,$w7
+	nlzc.d	$w14,$w14
+	nlzc.h	$w24,$w24
+	nlzc.w	$w10,$w4
+	nmadd.d	$f18,$f9,$f14,$f19
+	nmadd.ps	$f27,$f4,$f9,$f25
+	nmsub.d	$f30,$f8,$f16,$f30
+	nmsub.ps	$f6,$f12,$f14,$f17
+	nor.v	$w20,$w20,$w15
+	or.v	$w13,$w23,$w12
+	packrl.ph	$ra,$t8,$t6
+	pcnt.b	$w30,$w15
+	pcnt.d	$w5,$w16
+	pcnt.h	$w20,$w24
+	pcnt.w	$w22,$w20
+	pick.ph	$ra,$a2,$gp
+	pick.qb	$t3,$a0,$gp
+	pll.ps	$f25,$f9,$f30
+	plu.ps	$f1,$f26,$f29
+	preceq.w.phl	$s8,$gp
+	preceq.w.phr	$s5,$t7
+	precequ.ph.qbl	$s7,$ra
+	precequ.ph.qbla	$a0,$t1
+	precequ.ph.qbr	$ra,$s3
+	precequ.ph.qbra	$t8,$t0
+	preceu.ph.qbl	$sp,$t0
+	preceu.ph.qbla	$s6,$t3
+	preceu.ph.qbr	$gp,$s1
+	preceu.ph.qbra	$k1,$s0
+	precr.qb.ph	$v0,$t4,$s8
+	precrq.ph.w	$t6,$s8,$t8
+	precrq.qb.ph	$a2,$t4,$t4
+	precrq_rs.ph.w	$a1,$k0,$a3
+	precrqu_s.qb.ph	$zero,$gp,$s5
+	pul.ps	$f9,$f30,$f26
+	puu.ps	$f24,$f9,$f2
+	raddu.w.qb	$t9,$s3
+	rdpgpr	$s3,$t1
+	recip.d	$f19,$f6
+	recip.s	$f3,$f30
+	repl.ph	$at,-307
+	replv.ph	$v1,$s7
+	replv.qb	$t9,$t4
+	rorv	$t5,$a3,$s5
+	rsqrt.d	$f3,$f28
+	rsqrt.s	$f4,$f8
+	sbe	$s7,33($s1)
+	sce	$sp,189($t2)
+	she	$t8,105($v0)
+	shilo	$ac1,26
+	shilov	$ac2,$t2
+	shllv.ph	$t2,$s0,$s0
+	shllv.qb	$gp,$v1,$zero
+	shllv_s.ph	$k1,$at,$t5
+	shllv_s.w	$s1,$ra,$k0
+	shrav.ph	$t9,$s2,$s1
+	shrav.qb	$zero,$t8,$t3
+	shrav_r.ph	$s3,$t3,$t9
+	shrav_r.qb	$a0,$sp,$s5
+	shrav_r.w	$s7,$s4,$s6
+	shrlv.ph	$t6,$t2,$t1
+	shrlv.qb	$a2,$s2,$t3
+	sub.ps	$f5,$f14,$f26
+	subq.ph	$ra,$t1,$s8
+	subq_s.ph	$t5,$s8,$s5
+	subq_s.w	$k1,$a2,$a3
+	subqh.ph	$t2,$at,$t1
+	subqh.w	$v0,$a2,$zero
+	subqh_r.ph	$a0,$t4,$s6
+	subqh_r.w	$t2,$a2,$gp
+	subu.ph	$t1,$s6,$s4
+	subu.qb	$s6,$a2,$s6
+	subu_s.ph	$v1,$a1,$s3
+	subu_s.qb	$s1,$at,$ra
+	subuh.qb	$zero,$gp,$gp
+	subuh_r.qb	$s4,$s8,$s6
+	swe	$t8,94($k0)
+	swle	$v1,-209($gp)
+	swre	$k0,-202($s2)
+	synci	20023($s0)
+	tlbginv
+	tlbginvf
+	tlbgp
+	tlbgr
+	tlbgwi
+	tlbgwr
+	tlbinv
+	tlbinvf
+	tlbp
+	tlbr
+	tlbwi
+	tlbwr
+	wrpgpr	$zero,$t5
+	xor.v	$w20,$w21,$w30
+	yield	$v1,$s0
diff --git a/test/MC/Mips/mips64r2/valid.s b/test/MC/Mips/mips64r2/valid.s
new file mode 100644
index 0000000..826a6b2
--- /dev/null
+++ b/test/MC/Mips/mips64r2/valid.s
@@ -0,0 +1,191 @@
+# Instructions that are valid
+#
+# RUN: llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64r2 | FileCheck %s
+
+        .set noat
+	abs.d	$f7,$f25 # CHECK: encoding
+	abs.s	$f9,$f16
+	add	$s7,$s2,$a1
+	add.d	$f1,$f7,$f29
+	add.s	$f8,$f21,$f24
+	addi	$t5,$t1,26322
+	addu	$t1,$a0,$a2
+	and	$s7,$v0,$t4
+	c.ngl.d	$f29,$f29
+	c.ngle.d	$f0,$f16
+	c.sf.d	$f30,$f0
+	c.sf.s	$f14,$f22
+	ceil.l.d	$f1,$f3
+	ceil.l.s	$f18,$f13
+	ceil.w.d	$f11,$f25
+	ceil.w.s	$f6,$f20
+	cfc1	$s1,$21
+	clo	$t3,$a1
+	clz	$sp,$gp
+	ctc1	$a2,$26
+	cvt.d.l	$f4,$f16
+	cvt.d.s	$f22,$f28
+	cvt.d.w	$f26,$f11
+	cvt.l.d	$f24,$f15
+	cvt.l.s	$f11,$f29
+	cvt.s.d	$f26,$f8
+	cvt.s.l	$f15,$f30
+	cvt.s.w	$f22,$f15
+	cvt.w.d	$f20,$f14
+	cvt.w.s	$f20,$f24
+	dadd	$s3,$at,$ra
+	daddi	$sp,$s4,-27705
+	daddiu	$k0,$s6,-4586
+	dclo	$s2,$a2
+	dclz	$s0,$t9
+	deret
+	di	$s8
+	ddiv	$zero,$k0,$s3
+	ddivu	$zero,$s0,$s1
+	div	$zero,$t9,$t3
+	div.d	$f29,$f20,$f27
+	div.s	$f4,$f5,$f15
+	divu	$zero,$t9,$t7
+	dmfc1	$t4,$f13
+	dmtc1	$s0,$f14
+	dmult	$s7,$t1
+	dmultu	$a1,$a2
+	dsbh	$v1,$t6
+	dshd	$v0,$sp
+	dsllv	$zero,$s4,$t4
+	dsrav	$gp,$s2,$s3
+	dsrlv	$s3,$t6,$s4
+	dsub	$a3,$s6,$t0
+	dsubu	$a1,$a1,$k0
+	ehb                      # CHECK: ehb # encoding:  [0x00,0x00,0x00,0xc0]
+	ei	$t6
+	eret
+	floor.l.d	$f26,$f7
+	floor.l.s	$f12,$f5
+	floor.w.d	$f14,$f11
+	floor.w.s	$f8,$f9
+	lb	$t8,-14515($t2)
+	lbu	$t0,30195($v1)
+	ld	$sp,-28645($s1)
+	ldc1	$f11,16391($s0)
+	ldc2	$8,-21181($at)
+	ldl	$t8,-4167($t8)
+	ldr	$t6,-30358($s4)
+	ldxc1	$f8,$s7($t7)
+	lh	$t3,-8556($s5)
+	lhu	$s3,-22851($v0)
+	li	$at,-29773
+	li	$zero,-29889
+	ll	$v0,-7321($s2)
+	lld	$zero,-14736($ra)
+	luxc1	$f19,$s6($s5)
+	lw	$t0,5674($a1)
+	lwc1	$f16,10225($k0)
+	lwc2	$18,-841($a2)
+	lwl	$s4,-4231($t7)
+	lwr	$zero,-19147($gp)
+	lwu	$s3,-24086($v1)
+	lwxc1	$f12,$s1($s8)
+	madd	$s6,$t5
+	madd	$zero,$t1
+	madd.s	$f1,$f31,$f19,$f25
+	maddu	$s3,$gp
+	maddu	$t8,$s2
+	mfc0	$a2,$14,1
+	mfc1	$a3,$f27
+	mfhc1	$s8,$f24
+	mfhi	$s3
+	mfhi	$sp
+	mflo	$s1
+	mov.d	$f20,$f14
+	mov.s	$f2,$f27
+	move	$a0,$a3
+	move	$s5,$a0
+	move	$s8,$a0
+	move	$t9,$a2
+	movf	$gp,$t0,$fcc7
+	movf.d	$f6,$f11,$fcc5
+	movf.s	$f23,$f5,$fcc6
+	movn	$v1,$s1,$s0
+	movn.d	$f27,$f21,$k0
+	movn.s	$f12,$f0,$s7
+	movt	$zero,$s4,$fcc5
+	movt.d	$f0,$f2,$fcc0
+	movt.s	$f30,$f2,$fcc1
+	movz	$a1,$s6,$t1
+	movz.d	$f12,$f29,$t1
+	movz.s	$f25,$f7,$v1
+	msub	$s7,$k1
+	msub.s	$f12,$f19,$f10,$f16
+	msubu	$t7,$a1
+	mtc0	$t1,$29,3
+	mtc1	$s8,$f9
+	mthc1	$zero,$f16
+	mthi	$s1
+	mtlo	$sp
+	mtlo	$t9
+	mul	$s0,$s4,$at
+	mul.d	$f20,$f20,$f16
+	mul.s	$f30,$f10,$f2
+	mult	$sp,$s4
+	mult	$sp,$v0
+	multu	$gp,$k0
+	multu	$t1,$s2
+	neg.d	$f27,$f18
+	neg.s	$f1,$f15
+	nmadd.s	$f0,$f5,$f25,$f12
+	nmsub.s	$f1,$f24,$f19,$f4
+	nop
+	nor	$a3,$zero,$a3
+	or	$t4,$s0,$sp
+	pause                    # CHECK: pause # encoding:  [0x00,0x00,0x01,0x40]
+	rdhwr	$sp,$11
+	round.l.d	$f12,$f1
+	round.l.s	$f25,$f5
+	round.w.d	$f6,$f4
+	round.w.s	$f27,$f28
+	sb	$s6,-19857($t6)
+	sc	$t7,18904($s3)
+	scd	$t7,-8243($sp)
+	sd	$t4,5835($t2)
+	sdc1	$f31,30574($t5)
+	sdc2	$20,23157($s2)
+	sdl	$a3,-20961($s8)
+	sdr	$t3,-20423($t4)
+	sdxc1	$f11,$t2($t6)
+	seb	$t9,$t7
+	seh	$v1,$t4
+	sh	$t6,-6704($t7)
+	sllv	$a3,$zero,$t1
+	slt	$s7,$t3,$k1
+	slti	$s1,$t2,9489
+	sltiu	$t9,$t9,-15531
+	sltu	$s4,$s5,$t3
+	sqrt.d	$f17,$f22
+	sqrt.s	$f0,$f1
+	srav	$s1,$s7,$sp
+	srlv	$t9,$s4,$a0
+	ssnop                    # CHECK: ssnop # encoding:  [0x00,0x00,0x00,0x40]
+	sub	$s6,$s3,$t4
+	sub.d	$f18,$f3,$f17
+	sub.s	$f23,$f22,$f22
+	subu	$sp,$s6,$s6
+	suxc1	$f12,$k1($t5)
+	sw	$ra,-10160($sp)
+	swc1	$f6,-8465($t8)
+	swc2	$25,24880($s0)
+	swl	$t7,13694($s3)
+	swr	$s1,-26590($t6)
+	swxc1	$f19,$t4($k0)
+	teqi	$s5,-17504
+	tgei	$s1,5025
+	tgeiu	$sp,-28621
+	tlti	$t6,-21059
+	tltiu	$ra,-5076
+	tnei	$t4,-29647
+	trunc.l.d	$f23,$f23
+	trunc.l.s	$f28,$f31
+	trunc.w.d	$f22,$f15
+	trunc.w.s	$f28,$f30
+	xor	$s2,$a0,$s8
+	wsbh	$k1,$t1
diff --git a/test/MC/Mips/mips_directives.s b/test/MC/Mips/mips_directives.s
index 44e707c..6780dd0 100644
--- a/test/MC/Mips/mips_directives.s
+++ b/test/MC/Mips/mips_directives.s
@@ -1,15 +1,22 @@
-# RUN: llvm-mc -show-encoding -triple mips-unknown-unknown %s | FileCheck %s
+# RUN: llvm-mc -show-encoding -mcpu=mips32 -triple mips-unknown-unknown %s | FileCheck %s
 #
 # CHECK:  .text
 # CHECK:  $BB0_2:
+# CHECK:  .abicalls
 $BB0_2:
   .ent directives_test
+     .abicalls
     .frame    $sp,0,$ra
     .mask     0x00000000,0
     .fmask    0x00000000,0
+
+# CHECK: .set noreorder
 # CHECK:   b 1332               # encoding: [0x10,0x00,0x01,0x4d]
+# CHECK-NOT: nop
 # CHECK:   j 1328               # encoding: [0x08,0x00,0x01,0x4c]
+# CHECK-NOT: nop
 # CHECK:   jal 1328             # encoding: [0x0c,0x00,0x01,0x4c]
+# CHECK-NOT: nop
 
     .set    noreorder
      b 1332
@@ -26,6 +33,7 @@ $JTI0_0:
 # CHECK:     .4byte    2013265916
     .set  at=$12
     .set macro
+# CHECK:   .set reorder
 # CHECK:   b 1332               # encoding: [0x10,0x00,0x01,0x4d]
 # CHECK:   nop                  # encoding: [0x00,0x00,0x00,0x00]
 # CHECK:   j 1328               # encoding: [0x08,0x00,0x01,0x4c]
@@ -33,15 +41,43 @@ $JTI0_0:
 # CHECK:   jal 1328             # encoding: [0x0c,0x00,0x01,0x4c]
 # CHECK:   nop                  # encoding: [0x00,0x00,0x00,0x00]
     .set reorder
+$BB0_4:
     b 1332
     j 1328
     jal 1328
     .set  at=$a0
     .set STORE_MASK,$t7
     .set FPU_MASK,$f7
-    .set r3,$3
+    .set  $tmp7, $BB0_4-$BB0_2
     .set f6,$f6
 # CHECK:    abs.s   $f6, $f7           # encoding: [0x46,0x00,0x39,0x85]
-# CHECK:    and     $3, $15, $15       # encoding: [0x01,0xef,0x18,0x24]
+# CHECK:    lui     $1, %hi($tmp7)     # encoding: [0x3c'A',0x01'A',0x00,0x00]
+# CHECK:                               #   fixup A - offset: 0, value: ($tmp7)@ABS_HI, kind: fixup_Mips_HI16
     abs.s  f6,FPU_MASK
-    and    r3,$t7,STORE_MASK
+    lui $1, %hi($tmp7)
+
+# CHECK:    .set mips32r2
+# CHECK:    ldxc1   $f0, $zero($5)     # encoding: [0x4c,0xa0,0x00,0x01]
+# CHECK:    luxc1   $f0, $6($5)        # encoding: [0x4c,0xa6,0x00,0x05]
+# CHECK:    lwxc1   $f6, $2($5)        # encoding: [0x4c,0xa2,0x01,0x80]
+     .set mips32r2
+    ldxc1   $f0, $zero($5)
+    luxc1   $f0, $6($5)
+    lwxc1   $f6, $2($5)
+
+# CHECK: .set mips64
+# CHECK: dadd $3, $3, $3
+    .set mips64
+    dadd   $3, $3, $3                  # encoding: [0x00,0x62,0x18,0x2c]
+
+# CHECK: .set mips64r2
+# CHECK: drotr $9, $6, 30              # encoding: [0x00,0x26,0x4f,0xba]
+    .set mips64r2
+    drotr   $9, $6, 30
+
+# CHECK:   .set dsp
+# CHECK:   lbux    $7, $10($11)         # encoding: [0x7d,0x6a,0x39,0x8a]
+# CHECK:   lhx     $5, $6($7)           # encoding: [0x7c,0xe6,0x29,0x0a]
+   .set dsp
+   lbux    $7, $10($11)
+   lhx     $5, $6($7)
diff --git a/test/MC/Mips/mips_directives_bad.s b/test/MC/Mips/mips_directives_bad.s
new file mode 100644
index 0000000..c823cac
--- /dev/null
+++ b/test/MC/Mips/mips_directives_bad.s
@@ -0,0 +1,59 @@
+# Error checking for malformed directives
+# RUN: not llvm-mc -triple mips-unknown-unknown %s 2>&1 | FileCheck %s
+
+    .abicalls should have no operands
+# CHECK:    :{{[0-9]+}}:{{[0-9]+}}: error: unexpected token in directive
+# CHECK-NEXT:    .abicalls should have no operands
+# CHECK-NEXT:              ^
+
+# We don't know yet how to represent a list of options
+# pic2 will eventually be legal so we will probably want
+# to change it to something silly.
+
+# Blank option operand
+    .option 
+# CHECK-NEXT:    :{{[0-9]+}}:{{[0-9]+}}: error: unexpected token in .option directive
+# CHECK-NEXT:    .option 
+# CHECK-NEXT:            ^
+
+# Numeric option operand
+    .option 2
+# CHECK-NEXT:    :{{[0-9]+}}:{{[0-9]+}}: error: unexpected token in .option directive
+# CHECK-NEXT:    .option 2
+# CHECK-NEXT:            ^
+
+# Register option operand
+    .option $2
+# CHECK-NEXT:    :{{[0-9]+}}:{{[0-9]+}}: error: unexpected token in .option directive
+# CHECK-NEXT:    .option $2
+# CHECK-NEXT:            ^
+
+    .option WithBadOption
+# CHECK-NEXT:    :{{[0-9]+}}:{{[0-9]+}}: warning: unknown option in .option directive
+# CHECK-NEXT:    .option WithBadOption
+# CHECK-NEXT:            ^
+
+    .option pic0,
+# CHECK-NEXT:    :{{[0-9]+}}:{{[0-9]+}}: error: unexpected token in .option pic0 directive
+# CHECK-NEXT:    .option pic0,
+# CHECK-NEXT:                ^
+
+    .option pic0,pic2
+# CHECK-NEXT:    :{{[0-9]+}}:{{[0-9]+}}: error: unexpected token in .option pic0 directive
+# CHECK-NEXT:    .option pic0,pic2
+# CHECK-NEXT:                ^
+
+    .option pic0 pic2
+# CHECK-NEXT:    :{{[0-9]+}}:{{[0-9]+}}: error: unexpected token in .option pic0 directive
+# CHECK-NEXT:    .option pic0 pic2
+# CHECK-NEXT:                 ^
+
+    .option pic2,
+# CHECK-NEXT:    :{{[0-9]+}}:{{[0-9]+}}: error: unexpected token in .option pic2 directive
+# CHECK-NEXT:    .option pic2,
+# CHECK-NEXT:                ^
+
+    .option pic2 pic3
+# CHECK-NEXT:    :{{[0-9]+}}:{{[0-9]+}}: error: unexpected token in .option pic2 directive
+# CHECK-NEXT:    .option pic2 pic3
+# CHECK-NEXT:                 ^
diff --git a/test/MC/Mips/mips_gprel16.ll b/test/MC/Mips/mips_gprel16.ll
deleted file mode 100644
index b5a282d..0000000
--- a/test/MC/Mips/mips_gprel16.ll
+++ /dev/null
@@ -1,33 +0,0 @@
-; This addresses bug 14456. We were not writing
-; out the addend to the gprel16 relocation. The
-; addend is stored in the instruction immediate 
-; field.
-;llc gprel16.ll -o gprel16.o -mcpu=mips32r2 -march=mipsel -filetype=obj -relocation-model=static
-
-; RUN: llc -mcpu=mips32r2 -march=mipsel -filetype=obj -relocation-model=static %s -o - \
-; RUN: | llvm-objdump -disassemble -mattr +mips32r2 - \
-; RUN: | FileCheck %s
-
-target triple = "mipsel-sde--elf-gcc"
-
-@var1 = internal global i32 0, align 4
-@var2 = internal global i32 0, align 4
-
-define i32 @testvar1() nounwind {
-entry:
-; CHECK: lw ${{[0-9]+}}, 0($gp)
-  %0 = load i32* @var1, align 4
-  %tobool = icmp ne i32 %0, 0
-  %cond = select i1 %tobool, i32 1, i32 0
-  ret i32 %cond
-}
-
-define i32 @testvar2() nounwind {
-entry:
-; CHECK: lw ${{[0-9]+}}, 4($gp)
-  %0 = load i32* @var2, align 4
-  %tobool = icmp ne i32 %0, 0
-  %cond = select i1 %tobool, i32 1, i32 0
-  ret i32 %cond
-}
-
diff --git a/test/MC/Mips/mips_gprel16.s b/test/MC/Mips/mips_gprel16.s
new file mode 100644
index 0000000..716c75e
--- /dev/null
+++ b/test/MC/Mips/mips_gprel16.s
@@ -0,0 +1,70 @@
+// This addresses bug 14456. We were not writing
+// out the addend to the gprel16 relocation. The
+// addend is stored in the instruction immediate
+// field.
+
+// RUN: llvm-mc -mcpu=mips32r2 -triple=mipsel-pc-linux -filetype=obj -relocation-model=static %s -o - \
+// RUN: | llvm-objdump -disassemble -mattr +mips32r2 - \
+// RUN: | FileCheck %s
+
+	.text
+	.abicalls
+	.option	pic0
+	.section	.mdebug.abi32,"",@progbits
+	.file	"/home/espindola/llvm/llvm/test/MC/Mips/mips_gprel16.ll"
+	.text
+	.globl	testvar1
+	.align	2
+	.type	testvar1,@function
+	.set	nomips16
+	.ent	testvar1
+testvar1:                               # @testvar1
+	.frame	$sp,0,$ra
+	.mask 	0x00000000,0
+	.fmask	0x00000000,0
+	.set	noreorder
+	.set	nomacro
+	.set	noat
+# BB#0:                                 # %entry
+// CHECK: lw ${{[0-9]+}}, 0($gp)
+	lw	$1, %gp_rel(var1)($gp)
+	jr	$ra
+	sltu	$2, $zero, $1
+	.set	at
+	.set	macro
+	.set	reorder
+	.end	testvar1
+$tmp0:
+	.size	testvar1, ($tmp0)-testvar1
+
+	.globl	testvar2
+	.align	2
+	.type	testvar2,@function
+	.set	nomips16
+	.ent	testvar2
+testvar2:                               # @testvar2
+	.frame	$sp,0,$ra
+	.mask 	0x00000000,0
+	.fmask	0x00000000,0
+	.set	noreorder
+	.set	nomacro
+	.set	noat
+# BB#0:                                 # %entry
+// CHECK: lw ${{[0-9]+}}, 4($gp)
+	lw	$1, %gp_rel(var2)($gp)
+	jr	$ra
+	sltu	$2, $zero, $1
+	.set	at
+	.set	macro
+	.set	reorder
+	.end	testvar2
+$tmp1:
+	.size	testvar2, ($tmp1)-testvar2
+
+	.type	var1,@object            # @var1
+	.local	var1
+	.comm	var1,4,4
+	.type	var2,@object            # @var2
+	.local	var2
+	.comm	var2,4,4
+
diff --git a/test/MC/Mips/msa/test_2r.s b/test/MC/Mips/msa/test_2r.s
index 67a2b6f..b657d5f 100644
--- a/test/MC/Mips/msa/test_2r.s
+++ b/test/MC/Mips/msa/test_2r.s
@@ -1,6 +1,8 @@
-# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 -mattr=+msa -arch=mips | FileCheck %s
+# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
 #
-# RUN: llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 -mattr=+msa -arch=mips -filetype=obj -o - | llvm-objdump -d -triple=mipsel-unknown-linux -mattr=+msa -arch=mips - | FileCheck %s -check-prefix=CHECKOBJDUMP
+# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -filetype=obj -o - | \
+# RUN: llvm-objdump -d -arch=mips -mattr=+msa - | \
+# RUN: FileCheck %s -check-prefix=CHECKOBJDUMP
 #
 # CHECK:        fill.b  $w30, $9                # encoding: [0x7b,0x00,0x4f,0x9e]
 # CHECK:        fill.h  $w31, $23               # encoding: [0x7b,0x01,0xbf,0xde]
diff --git a/test/MC/Mips/msa/test_2r_msa64.s b/test/MC/Mips/msa/test_2r_msa64.s
new file mode 100644
index 0000000..743fb88
--- /dev/null
+++ b/test/MC/Mips/msa/test_2r_msa64.s
@@ -0,0 +1,11 @@
+# RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 -mattr=+msa -show-encoding | FileCheck %s
+#
+# RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 -mattr=+msa -filetype=obj -o - | \
+# RUN:   llvm-objdump -d -arch=mips64 -mattr=+msa - | \
+# RUN:     FileCheck %s -check-prefix=CHECKOBJDUMP
+#
+# CHECK:        fill.d  $w27, $9                # encoding: [0x7b,0x03,0x4e,0xde]
+
+# CHECKOBJDUMP:        fill.d  $w27, $9
+
+                fill.d  $w27, $9
diff --git a/test/MC/Mips/msa/test_2rf.s b/test/MC/Mips/msa/test_2rf.s
index 64025a4..284a7d9 100644
--- a/test/MC/Mips/msa/test_2rf.s
+++ b/test/MC/Mips/msa/test_2rf.s
@@ -1,6 +1,8 @@
-# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 -mattr=+msa -arch=mips | FileCheck %s
+# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
 #
-# RUN: llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 -mattr=+msa -arch=mips -filetype=obj -o - | llvm-objdump -d -triple=mipsel-unknown-linux -mattr=+msa -arch=mips - | FileCheck %s -check-prefix=CHECKOBJDUMP
+# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -filetype=obj -o - | \
+# RUN: llvm-objdump -d -arch=mips -mattr=+msa - | \
+# RUN: FileCheck %s -check-prefix=CHECKOBJDUMP
 #
 # CHECK:        fclass.w        $w26, $w12              # encoding: [0x7b,0x20,0x66,0x9e]
 # CHECK:        fclass.d        $w24, $w17              # encoding: [0x7b,0x21,0x8e,0x1e]
diff --git a/test/MC/Mips/msa/test_3r.s b/test/MC/Mips/msa/test_3r.s
index 3047ecb..d6b33f1 100644
--- a/test/MC/Mips/msa/test_3r.s
+++ b/test/MC/Mips/msa/test_3r.s
@@ -1,6 +1,8 @@
-# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 -mattr=+msa -arch=mips | FileCheck %s
+# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
 #
-# RUN: llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 -mattr=+msa -arch=mips -filetype=obj -o - | llvm-objdump -d -triple=mipsel-unknown-linux -mattr=+msa -arch=mips - | FileCheck %s -check-prefix=CHECKOBJDUMP
+# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -filetype=obj -o - | \
+# RUN: llvm-objdump -d -arch=mips -mattr=+msa - | \
+# RUN: FileCheck %s -check-prefix=CHECKOBJDUMP
 #
 # CHECK:        add_a.b         $w26, $w9, $w4                  # encoding: [0x78,0x04,0x4e,0x90]
 # CHECK:        add_a.h         $w23, $w27, $w31                # encoding: [0x78,0x3f,0xdd,0xd0]
diff --git a/test/MC/Mips/msa/test_3rf.s b/test/MC/Mips/msa/test_3rf.s
index f45557e..6787d85 100644
--- a/test/MC/Mips/msa/test_3rf.s
+++ b/test/MC/Mips/msa/test_3rf.s
@@ -1,6 +1,8 @@
-# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 -mattr=+msa -arch=mips | FileCheck %s
+# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
 #
-# RUN: llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 -mattr=+msa -arch=mips -filetype=obj -o - | llvm-objdump -d -triple=mipsel-unknown-linux -mattr=+msa -arch=mips - | FileCheck %s -check-prefix=CHECKOBJDUMP
+# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -filetype=obj -o - | \
+# RUN: llvm-objdump -d -arch=mips -mattr=+msa - | \
+# RUN: FileCheck %s -check-prefix=CHECKOBJDUMP
 #
 # CHECK:        fadd.w          $w28, $w19, $w28        # encoding: [0x78,0x1c,0x9f,0x1b]
 # CHECK:        fadd.d          $w13, $w2, $w29         # encoding: [0x78,0x3d,0x13,0x5b]
diff --git a/test/MC/Mips/msa/test_bit.s b/test/MC/Mips/msa/test_bit.s
index 7c23131..2e5a6a5 100644
--- a/test/MC/Mips/msa/test_bit.s
+++ b/test/MC/Mips/msa/test_bit.s
@@ -1,6 +1,8 @@
-# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 -mattr=+msa -arch=mips | FileCheck %s
+# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
 #
-# RUN: llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 -mattr=+msa -arch=mips -filetype=obj -o - | llvm-objdump -d -triple=mipsel-unknown-linux -mattr=+msa -arch=mips - | FileCheck %s -check-prefix=CHECKOBJDUMP
+# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -filetype=obj -o - | \
+# RUN: llvm-objdump -d -arch=mips -mattr=+msa - | \
+# RUN: FileCheck %s -check-prefix=CHECKOBJDUMP
 #
 # CHECK:        bclri.b         $w21, $w30, 2           # encoding: [0x79,0xf2,0xf5,0x49]
 # CHECK:        bclri.h         $w24, $w21, 0           # encoding: [0x79,0xe0,0xae,0x09]
diff --git a/test/MC/Mips/msa/test_cbranch.s b/test/MC/Mips/msa/test_cbranch.s
index 2fc65af..37b8872 100644
--- a/test/MC/Mips/msa/test_cbranch.s
+++ b/test/MC/Mips/msa/test_cbranch.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 -mattr=+msa -arch=mips | FileCheck %s
+# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
 #
 #CHECK:      bnz.b        $w0, 4        # encoding: [0x47,0x80,0x00,0x01]
 #CHECK:      nop                        # encoding: [0x00,0x00,0x00,0x00]
diff --git a/test/MC/Mips/msa/test_ctrlregs.s b/test/MC/Mips/msa/test_ctrlregs.s
index f8f4f9e..a014c03 100644
--- a/test/MC/Mips/msa/test_ctrlregs.s
+++ b/test/MC/Mips/msa/test_ctrlregs.s
@@ -1,6 +1,8 @@
-# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 -mattr=+msa -arch=mips | FileCheck %s
+# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
 #
-# RUN: llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 -mattr=+msa -arch=mips -filetype=obj -o - | llvm-objdump -d -triple=mipsel-unknown-linux -mattr=+msa -arch=mips - | FileCheck %s -check-prefix=CHECKOBJDUMP
+# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -filetype=obj -o - | \
+# RUN: llvm-objdump -d -arch=mips -mattr=+msa - | \
+# RUN: FileCheck %s -check-prefix=CHECKOBJDUMP
 #
 #CHECK:  cfcmsa       $1, $0                  # encoding: [0x78,0x7e,0x00,0x59]
 #CHECK:  cfcmsa       $1, $0                  # encoding: [0x78,0x7e,0x00,0x59]
diff --git a/test/MC/Mips/msa/test_dlsa.s b/test/MC/Mips/msa/test_dlsa.s
new file mode 100644
index 0000000..a70999d
--- /dev/null
+++ b/test/MC/Mips/msa/test_dlsa.s
@@ -0,0 +1,21 @@
+# RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 -mattr=+msa -show-encoding | \
+# RUN:   FileCheck %s
+#
+# RUN: llvm-mc %s -arch=mips -mcpu=mips64r2 -mattr=+msa -filetype=obj -o - | \
+# RUN:   llvm-objdump -d -arch=mips64 -mattr=+msa - | \
+# RUN:     FileCheck %s -check-prefix=CHECKOBJDUMP
+#
+# CHECK:        dlsa        $8, $9, $10, 1              # encoding: [0x01,0x2a,0x40,0x15]
+# CHECK:        dlsa        $8, $9, $10, 2              # encoding: [0x01,0x2a,0x40,0x55]
+# CHECK:        dlsa        $8, $9, $10, 3              # encoding: [0x01,0x2a,0x40,0x95]
+# CHECK:        dlsa        $8, $9, $10, 4              # encoding: [0x01,0x2a,0x40,0xd5]
+
+# CHECKOBJDUMP: dlsa        $8, $9, $10, 1
+# CHECKOBJDUMP: dlsa        $8, $9, $10, 2
+# CHECKOBJDUMP: dlsa        $8, $9, $10, 3
+# CHECKOBJDUMP: dlsa        $8, $9, $10, 4
+
+                dlsa        $8, $9, $10, 1
+                dlsa        $8, $9, $10, 2
+                dlsa        $8, $9, $10, 3
+                dlsa        $8, $9, $10, 4
diff --git a/test/MC/Mips/msa/test_elm.s b/test/MC/Mips/msa/test_elm.s
index 1d04838..1e45fd4 100644
--- a/test/MC/Mips/msa/test_elm.s
+++ b/test/MC/Mips/msa/test_elm.s
@@ -1,6 +1,8 @@
-# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 -mattr=+msa -arch=mips | FileCheck %s
+# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
 #
-# RUN: llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 -mattr=+msa -arch=mips -filetype=obj -o - | llvm-objdump -d -triple=mipsel-unknown-linux -mattr=+msa -arch=mips - | FileCheck %s -check-prefix=CHECKOBJDUMP
+# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -filetype=obj -o - | \
+# RUN: llvm-objdump -d -arch=mips -mattr=+msa - | \
+# RUN: FileCheck %s -check-prefix=CHECKOBJDUMP
 #
 # CHECK:        copy_s.b        $13, $w8[2]             # encoding: [0x78,0x82,0x43,0x59]
 # CHECK:        copy_s.h        $1, $w25[0]             # encoding: [0x78,0xa0,0xc8,0x59]
diff --git a/test/MC/Mips/msa/test_elm_insert.s b/test/MC/Mips/msa/test_elm_insert.s
index 5fc55f3..f66b26c 100644
--- a/test/MC/Mips/msa/test_elm_insert.s
+++ b/test/MC/Mips/msa/test_elm_insert.s
@@ -1,6 +1,8 @@
-# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 -mattr=+msa -arch=mips | FileCheck %s
+# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
 #
-# RUN: llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 -mattr=+msa -arch=mips -filetype=obj -o - | llvm-objdump -d -triple=mipsel-unknown-linux -mattr=+msa -arch=mips - | FileCheck %s -check-prefix=CHECKOBJDUMP
+# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -filetype=obj -o - | \
+# RUN: llvm-objdump -d -arch=mips -mattr=+msa - | \
+# RUN: FileCheck %s -check-prefix=CHECKOBJDUMP
 #
 # CHECK:        insert.b        $w23[3], $sp            # encoding: [0x79,0x03,0xed,0xd9]
 # CHECK:        insert.h        $w20[2], $5             # encoding: [0x79,0x22,0x2d,0x19]
diff --git a/test/MC/Mips/msa/test_elm_insert_msa64.s b/test/MC/Mips/msa/test_elm_insert_msa64.s
new file mode 100644
index 0000000..8196fd0
--- /dev/null
+++ b/test/MC/Mips/msa/test_elm_insert_msa64.s
@@ -0,0 +1,11 @@
+# RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 -mattr=+msa -show-encoding | FileCheck %s
+#
+# RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 -mattr=+msa -filetype=obj -o - | \
+# RUN:   llvm-objdump -d -arch=mips64 -mattr=+msa - | \
+# RUN:     FileCheck %s -check-prefix=CHECKOBJDUMP
+#
+# CHECK:        insert.d        $w1[1], $sp            # encoding: [0x79,0x39,0xe8,0x59]
+
+# CHECKOBJDUMP:        insert.d        $w1[1], $sp
+
+                insert.d        $w1[1], $sp
diff --git a/test/MC/Mips/msa/test_elm_insve.s b/test/MC/Mips/msa/test_elm_insve.s
index d63d687..efdf88f 100644
--- a/test/MC/Mips/msa/test_elm_insve.s
+++ b/test/MC/Mips/msa/test_elm_insve.s
@@ -1,6 +1,8 @@
-# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 -mattr=+msa -arch=mips | FileCheck %s
+# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
 #
-# RUN: llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 -mattr=+msa -arch=mips -filetype=obj -o - | llvm-objdump -d -triple=mipsel-unknown-linux -mattr=+msa -arch=mips - | FileCheck %s -check-prefix=CHECKOBJDUMP
+# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -filetype=obj -o - | \
+# RUN: llvm-objdump -d -arch=mips -mattr=+msa - | \
+# RUN: FileCheck %s -check-prefix=CHECKOBJDUMP
 #
 # CHECK:        insve.b $w25[3], $w9[0]         # encoding: [0x79,0x43,0x4e,0x59]
 # CHECK:        insve.h $w24[2], $w2[0]         # encoding: [0x79,0x62,0x16,0x19]
diff --git a/test/MC/Mips/msa/test_elm_msa64.s b/test/MC/Mips/msa/test_elm_msa64.s
new file mode 100644
index 0000000..15bfcca
--- /dev/null
+++ b/test/MC/Mips/msa/test_elm_msa64.s
@@ -0,0 +1,14 @@
+# RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 -mattr=+msa -show-encoding | FileCheck %s
+#
+# RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 -mattr=+msa -filetype=obj -o - | \
+# RUN:   llvm-objdump -d -arch=mips64 -mattr=+msa - | \
+# RUN:     FileCheck %s -check-prefix=CHECKOBJDUMP
+#
+# CHECK:        copy_s.d        $19, $w31[0]             # encoding: [0x78,0xb8,0xfc,0xd9]
+# CHECK:        copy_u.d        $18, $w29[1]             # encoding: [0x78,0xf9,0xec,0x99]
+
+# CHECKOBJDUMP:        copy_s.d        $19, $w31[0]
+# CHECKOBJDUMP:        copy_u.d        $18, $w29[1]
+
+        copy_s.d        $19, $w31[0]
+        copy_u.d        $18, $w29[1]
diff --git a/test/MC/Mips/msa/test_i10.s b/test/MC/Mips/msa/test_i10.s
index 828ebb5..e029dfd 100644
--- a/test/MC/Mips/msa/test_i10.s
+++ b/test/MC/Mips/msa/test_i10.s
@@ -1,6 +1,8 @@
-# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 -mattr=+msa -arch=mips | FileCheck %s
+# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
 #
-# RUN: llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 -mattr=+msa -arch=mips -filetype=obj -o - | llvm-objdump -d -triple=mipsel-unknown-linux -mattr=+msa -arch=mips - | FileCheck %s -check-prefix=CHECKOBJDUMP
+# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -filetype=obj -o - | \
+# RUN: llvm-objdump -d -arch=mips -mattr=+msa - | \
+# RUN: FileCheck %s -check-prefix=CHECKOBJDUMP
 #
 
 # CHECK:        ldi.b   $w8, 198                # encoding: [0x7b,0x06,0x32,0x07]
diff --git a/test/MC/Mips/msa/test_i5.s b/test/MC/Mips/msa/test_i5.s
index 992bfe1..56c4811 100644
--- a/test/MC/Mips/msa/test_i5.s
+++ b/test/MC/Mips/msa/test_i5.s
@@ -1,6 +1,8 @@
-# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 -mattr=+msa -arch=mips | FileCheck %s
+# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
 #
-# RUN: llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 -mattr=+msa -arch=mips -filetype=obj -o - | llvm-objdump -d -triple=mipsel-unknown-linux -mattr=+msa -arch=mips - | FileCheck %s -check-prefix=CHECKOBJDUMP
+# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -filetype=obj -o - | \
+# RUN: llvm-objdump -d -arch=mips -mattr=+msa - | \
+# RUN: FileCheck %s -check-prefix=CHECKOBJDUMP
 #
 # CHECK:        addvi.b         $w3, $w31, 30           # encoding: [0x78,0x1e,0xf8,0xc6]
 # CHECK:        addvi.h         $w24, $w13, 26          # encoding: [0x78,0x3a,0x6e,0x06]
diff --git a/test/MC/Mips/msa/test_i8.s b/test/MC/Mips/msa/test_i8.s
index 2604be0..d4138a1 100644
--- a/test/MC/Mips/msa/test_i8.s
+++ b/test/MC/Mips/msa/test_i8.s
@@ -1,6 +1,8 @@
-# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 -mattr=+msa -arch=mips | FileCheck %s
+# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
 #
-# RUN: llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 -mattr=+msa -arch=mips -filetype=obj -o - | llvm-objdump -d -triple=mipsel-unknown-linux -mattr=+msa -arch=mips - | FileCheck %s -check-prefix=CHECKOBJDUMP
+# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -filetype=obj -o - | \
+# RUN: llvm-objdump -d -arch=mips -mattr=+msa - | \
+# RUN: FileCheck %s -check-prefix=CHECKOBJDUMP
 #
 # CHECK:        andi.b  $w2, $w29, 48           # encoding: [0x78,0x30,0xe8,0x80]
 # CHECK:        bmnzi.b $w6, $w22, 126          # encoding: [0x78,0x7e,0xb1,0x81]
diff --git a/test/MC/Mips/msa/test_lsa.s b/test/MC/Mips/msa/test_lsa.s
index 6d1d868..9ea76f6 100644
--- a/test/MC/Mips/msa/test_lsa.s
+++ b/test/MC/Mips/msa/test_lsa.s
@@ -1,6 +1,8 @@
-# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 -mattr=+msa -arch=mips | FileCheck %s
+# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
 #
-# RUN: llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 -mattr=+msa -arch=mips -filetype=obj -o - | llvm-objdump -d -triple=mipsel-unknown-linux -mattr=+msa -arch=mips - | FileCheck %s -check-prefix=CHECKOBJDUMP
+# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -filetype=obj -o - | \
+# RUN: llvm-objdump -d -arch=mips -mattr=+msa - | \
+# RUN: FileCheck %s -check-prefix=CHECKOBJDUMP
 #
 # CHECK:        lsa        $8, $9, $10, 1              # encoding: [0x01,0x2a,0x40,0x05]
 # CHECK:        lsa        $8, $9, $10, 2              # encoding: [0x01,0x2a,0x40,0x45]
diff --git a/test/MC/Mips/msa/test_mi10.s b/test/MC/Mips/msa/test_mi10.s
index 80257cd..90baeba 100644
--- a/test/MC/Mips/msa/test_mi10.s
+++ b/test/MC/Mips/msa/test_mi10.s
@@ -1,30 +1,86 @@
-# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 -mattr=+msa -arch=mips | FileCheck %s
+# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
 #
-# RUN: llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 -mattr=+msa -arch=mips -filetype=obj -o - | llvm-objdump -d -triple=mipsel-unknown-linux -mattr=+msa -arch=mips - | FileCheck %s -check-prefix=CHECKOBJDUMP
+# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -filetype=obj -o - | \
+# RUN: llvm-objdump -d -arch=mips -mattr=+msa - | \
+# RUN: FileCheck %s -check-prefix=CHECKOBJDUMP
 #
-# CHECK:        ld.b    $w2, 1($7)              # encoding: [0x78,0x01,0x38,0xa0]
-# CHECK:        ld.h    $w16, -9($zero)         # encoding: [0x7b,0xf7,0x04,0x21]
-# CHECK:        ld.w    $w13, -6($4)            # encoding: [0x7b,0xfa,0x23,0x62]
-# CHECK:        ld.d    $w1, -5($16)            # encoding: [0x7b,0xfb,0x80,0x63]
-# CHECK:        st.b    $w29, 1($14)            # encoding: [0x78,0x01,0x77,0x64]
-# CHECK:        st.h    $w6, -1($8)             # encoding: [0x7b,0xff,0x41,0xa5]
-# CHECK:        st.w    $w18, 8($15)            # encoding: [0x78,0x08,0x7c,0xa6]
-# CHECK:        st.d    $w3, -14($18)           # encoding: [0x7b,0xf2,0x90,0xe7]
-
-# CHECKOBJDUMP:        ld.b    $w2, 1($7)
-# CHECKOBJDUMP:        ld.h    $w16, -9($zero)
-# CHECKOBJDUMP:        ld.w    $w13, -6($4)
-# CHECKOBJDUMP:        ld.d    $w1, -5($16)
-# CHECKOBJDUMP:        st.b    $w29, 1($14)
-# CHECKOBJDUMP:        st.h    $w6, -1($8)
-# CHECKOBJDUMP:        st.w    $w18, 8($15)
-# CHECKOBJDUMP:        st.d    $w3, -14($18)
-
-                ld.b    $w2, 1($7)
-                ld.h    $w16, -9($zero)
-                ld.w    $w13, -6($4)
-                ld.d    $w1, -5($16)
-                st.b    $w29, 1($14)
-                st.h    $w6, -1($8)
-                st.w    $w18, 8($15)
-                st.d    $w3, -14($18)
+# CHECK:        ld.b $w0, -512($1)              # encoding: [0x7a,0x00,0x08,0x20]
+# CHECK:        ld.b $w1, 0($2)                 # encoding: [0x78,0x00,0x10,0x60]
+# CHECK:        ld.b $w2, 511($3)               # encoding: [0x79,0xff,0x18,0xa0]
+
+# CHECK:        ld.h $w3, -1024($4)             # encoding: [0x7a,0x00,0x20,0xe1]
+# CHECK:        ld.h $w4, -512($5)              # encoding: [0x7b,0x00,0x29,0x21]
+# CHECK:        ld.h $w5, 0($6)                 # encoding: [0x78,0x00,0x31,0x61]
+# CHECK:        ld.h $w6, 512($7)               # encoding: [0x79,0x00,0x39,0xa1]
+# CHECK:        ld.h $w7, 1022($8)              # encoding: [0x79,0xff,0x41,0xe1]
+
+# CHECK:        ld.w $w8, -2048($9)             # encoding: [0x7a,0x00,0x4a,0x22]
+# CHECK:        ld.w $w9, -1024($10)            # encoding: [0x7b,0x00,0x52,0x62]
+# CHECK:        ld.w $w10, -512($11)            # encoding: [0x7b,0x80,0x5a,0xa2]
+# CHECK:        ld.w $w11, 512($12)             # encoding: [0x78,0x80,0x62,0xe2]
+# CHECK:        ld.w $w12, 1024($13)            # encoding: [0x79,0x00,0x6b,0x22]
+# CHECK:        ld.w $w13, 2044($14)            # encoding: [0x79,0xff,0x73,0x62]
+
+# CHECK:        ld.d $w14, -4096($15)           # encoding: [0x7a,0x00,0x7b,0xa3]
+# CHECK:        ld.d $w15, -2048($16)           # encoding: [0x7b,0x00,0x83,0xe3]
+# CHECK:        ld.d $w16, -1024($17)           # encoding: [0x7b,0x80,0x8c,0x23]
+# CHECK:        ld.d $w17, -512($18)            # encoding: [0x7b,0xc0,0x94,0x63]
+# CHECK:        ld.d $w18, 0($19)               # encoding: [0x78,0x00,0x9c,0xa3]
+# CHECK:        ld.d $w19, 512($20)             # encoding: [0x78,0x40,0xa4,0xe3]
+# CHECK:        ld.d $w20, 1024($21)            # encoding: [0x78,0x80,0xad,0x23]
+# CHECK:        ld.d $w21, 2048($22)            # encoding: [0x79,0x00,0xb5,0x63]
+# CHECK:        ld.d $w22, 4088($23)            # encoding: [0x79,0xff,0xbd,0xa3]
+
+# CHECKOBJDUMP:        ld.b $w0, -512($1)
+# CHECKOBJDUMP:        ld.b $w1, 0($2)
+# CHECKOBJDUMP:        ld.b $w2, 511($3)
+
+# CHECKOBJDUMP:        ld.h $w3, -1024($4)
+# CHECKOBJDUMP:        ld.h $w4, -512($5)
+# CHECKOBJDUMP:        ld.h $w5, 0($6)
+# CHECKOBJDUMP:        ld.h $w6, 512($7)
+# CHECKOBJDUMP:        ld.h $w7, 1022($8)
+
+# CHECKOBJDUMP:        ld.w $w8, -2048($9)
+# CHECKOBJDUMP:        ld.w $w9, -1024($10)
+# CHECKOBJDUMP:        ld.w $w10, -512($11)
+# CHECKOBJDUMP:        ld.w $w11, 512($12)
+# CHECKOBJDUMP:        ld.w $w12, 1024($13)
+# CHECKOBJDUMP:        ld.w $w13, 2044($14)
+
+# CHECKOBJDUMP:        ld.d $w14, -4096($15)
+# CHECKOBJDUMP:        ld.d $w15, -2048($16)
+# CHECKOBJDUMP:        ld.d $w16, -1024($17)
+# CHECKOBJDUMP:        ld.d $w17, -512($18)
+# CHECKOBJDUMP:        ld.d $w18, 0($19)
+# CHECKOBJDUMP:        ld.d $w19, 512($20)
+# CHECKOBJDUMP:        ld.d $w20, 1024($21)
+# CHECKOBJDUMP:        ld.d $w21, 2048($22)
+# CHECKOBJDUMP:        ld.d $w22, 4088($23)
+
+        ld.b $w0, -512($1)
+        ld.b $w1, 0($2)
+        ld.b $w2, 511($3)
+
+        ld.h $w3, -1024($4)
+        ld.h $w4, -512($5)
+        ld.h $w5, 0($6)
+        ld.h $w6, 512($7)
+        ld.h $w7, 1022($8)
+
+        ld.w $w8, -2048($9)
+        ld.w $w9, -1024($10)
+        ld.w $w10, -512($11)
+        ld.w $w11, 512($12)
+        ld.w $w12, 1024($13)
+        ld.w $w13, 2044($14)
+
+        ld.d $w14, -4096($15)
+        ld.d $w15, -2048($16)
+        ld.d $w16, -1024($17)
+        ld.d $w17, -512($18)
+        ld.d $w18, 0($19)
+        ld.d $w19, 512($20)
+        ld.d $w20, 1024($21)
+        ld.d $w21, 2048($22)
+        ld.d $w22, 4088($23)
diff --git a/test/MC/Mips/msa/test_vec.s b/test/MC/Mips/msa/test_vec.s
index 9294f37..b62da70 100644
--- a/test/MC/Mips/msa/test_vec.s
+++ b/test/MC/Mips/msa/test_vec.s
@@ -1,6 +1,8 @@
-# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 -mattr=+msa -arch=mips | FileCheck %s
+# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
 #
-# RUN: llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 -mattr=+msa -arch=mips -filetype=obj -o - | llvm-objdump -d -triple=mipsel-unknown-linux -mattr=+msa -arch=mips - | FileCheck %s -check-prefix=CHECKOBJDUMP
+# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -filetype=obj -o - | \
+# RUN: llvm-objdump -d -arch=mips -mattr=+msa - | \
+# RUN: FileCheck %s -check-prefix=CHECKOBJDUMP
 #
 # CHECK:        and.v   $w25, $w20, $w27        # encoding: [0x78,0x1b,0xa6,0x5e]
 # CHECK:        bmnz.v  $w17, $w6, $w7          # encoding: [0x78,0x87,0x34,0x5e]
diff --git a/test/MC/Mips/nabi-regs.s b/test/MC/Mips/nabi-regs.s
index 050fb81..d79df4e 100644
--- a/test/MC/Mips/nabi-regs.s
+++ b/test/MC/Mips/nabi-regs.s
@@ -3,10 +3,14 @@
 # for 4 more register parameters (A registers) offsetting
 # the T registers.
 #
-# For now just check N64
 # RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding \
-# RUN: -mcpu=mips64r2 -arch=mips64 | \
-# RUN: FileCheck %s
+# RUN:   -mcpu=mips64r2 -arch=mips64 | FileCheck %s
+#
+# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding \
+# RUN:   -mcpu=mips64r2 -arch=mips64 -mattr=-n64,+n32 | FileCheck %s
+#
+# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding \
+# RUN:   -mcpu=mips64r2 -arch=mips64 -mattr=-n64,+n64 | FileCheck %s
 
     .text
 foo:
diff --git a/test/MC/Mips/nacl-mask.s b/test/MC/Mips/nacl-mask.s
new file mode 100644
index 0000000..8205835
--- /dev/null
+++ b/test/MC/Mips/nacl-mask.s
@@ -0,0 +1,285 @@
+# RUN: llvm-mc -filetype=obj -triple=mipsel-unknown-nacl %s \
+# RUN:  | llvm-objdump -triple mipsel -disassemble -no-show-raw-insn - \
+# RUN:  | FileCheck %s
+
+# This test tests that address-masking sandboxing is added when given assembly
+# input.
+
+
+# Test that address-masking sandboxing is added before indirect branches and
+# returns.
+
+	.align	4
+test1:
+	.set	noreorder
+
+        jr	$a0
+        nop
+        jr	$ra
+        nop
+
+# CHECK-LABEL:   test1:
+
+# CHECK:         and     $4, $4, $14
+# CHECK-NEXT:    jr      $4
+
+# Check that additional nop is inserted, to align mask and jr to the next
+# bundle.
+
+# CHECK-NEXT:    nop
+# CHECK-NEXT:    nop
+
+# CHECK:         and     $ra, $ra, $14
+# CHECK-NEXT:    jr      $ra
+
+
+
+# Test that address-masking sandboxing is added before load instructions.
+
+	.align	4
+test2:
+	.set	noreorder
+
+        lb      $4, 0($1)
+        nop
+        lbu     $4, 0($2)
+        lh      $4, 0($3)
+        lhu     $1, 0($4)
+        lw      $4, 0($5)
+        lwc1    $f0, 0($6)
+        ldc1    $f2, 0($7)
+        ll      $4, 0($8)
+        lwl     $4, 0($9)
+        lwr     $4, 0($10)
+
+        lw      $4, 0($sp)
+        lw      $4, 0($t8)
+
+# CHECK-LABEL:   test2:
+
+# CHECK:         and     $1, $1, $15
+# CHECK-NEXT:    lb      $4, 0($1)
+
+# Check that additional nop is inserted, to align mask and load to the next
+# bundle.
+
+# CHECK:         nop
+# CHECK:         nop
+
+# CHECK:         and     $2, $2, $15
+# CHECK-NEXT:    lbu     $4, 0($2)
+
+# CHECK:         and     $3, $3, $15
+# CHECK-NEXT:    lh      $4, 0($3)
+
+# CHECK:         and     $4, $4, $15
+# CHECK-NEXT:    lhu     $1, 0($4)
+
+# CHECK:         and     $5, $5, $15
+# CHECK-NEXT:    lw      $4, 0($5)
+
+# CHECK:         and     $6, $6, $15
+# CHECK-NEXT:    lwc1    $f0, 0($6)
+
+# CHECK:         and     $7, $7, $15
+# CHECK-NEXT:    ldc1    $f2, 0($7)
+
+# CHECK:         and     $8, $8, $15
+# CHECK-NEXT:    ll      $4, 0($8)
+
+# CHECK:         and     $9, $9, $15
+# CHECK-NEXT:    lwl     $4, 0($9)
+
+# CHECK:         and     $10, $10, $15
+# CHECK-NEXT:    lwr     $4, 0($10)
+
+
+# Check that loads where base register is $sp or $t8 (thread pointer register)
+# are not masked.
+
+# CHECK-NOT:     and
+# CHECK:         lw      $4, 0($sp)
+# CHECK-NOT:     and
+# CHECK:         lw      $4, 0($24)
+
+
+
+# Test that address-masking sandboxing is added before store instructions.
+
+	.align	4
+test3:
+	.set	noreorder
+
+        sb      $4, 0($1)
+        nop
+        sh      $4, 0($2)
+        sw      $4, 0($3)
+        swc1    $f0, 0($4)
+        sdc1    $f2, 0($5)
+        swl     $4, 0($6)
+        swr     $4, 0($7)
+        sc      $4, 0($8)
+
+        sw      $4, 0($sp)
+        sw      $4, 0($t8)
+
+# CHECK-LABEL:   test3:
+
+# CHECK:         and     $1, $1, $15
+# CHECK-NEXT:    sb      $4, 0($1)
+
+# Check that additional nop is inserted, to align mask and store to the next
+# bundle.
+
+# CHECK:         nop
+# CHECK:         nop
+
+# CHECK:         and     $2, $2, $15
+# CHECK-NEXT:    sh      $4, 0($2)
+
+# CHECK:         and     $3, $3, $15
+# CHECK-NEXT:    sw      $4, 0($3)
+
+# CHECK:         and     $4, $4, $15
+# CHECK-NEXT:    swc1    $f0, 0($4)
+
+# CHECK:         and     $5, $5, $15
+# CHECK-NEXT:    sdc1    $f2, 0($5)
+
+# CHECK:         and     $6, $6, $15
+# CHECK-NEXT:    swl     $4, 0($6)
+
+# CHECK:         and     $7, $7, $15
+# CHECK-NEXT:    swr     $4, 0($7)
+
+# CHECK:         and     $8, $8, $15
+# CHECK-NEXT:    sc      $4, 0($8)
+
+
+# Check that stores where base register is $sp or $t8 (thread pointer register)
+# are not masked.
+
+# CHECK-NOT:     and
+# CHECK:         sw      $4, 0($sp)
+# CHECK-NOT:     and
+# CHECK:         sw      $4, 0($24)
+
+
+
+# Test that address-masking sandboxing is added after instructions that change
+# stack pointer.
+
+	.align	4
+test4:
+	.set	noreorder
+
+        addiu   $sp, $sp, 24
+        nop
+        addu    $sp, $sp, $1
+        lw      $sp, 0($2)
+        lw      $sp, 123($sp)
+        sw      $sp, 123($sp)
+
+# CHECK-LABEL:   test4:
+
+# CHECK:         addiu   $sp, $sp, 24
+# CHECK-NEXT:    and     $sp, $sp, $15
+
+# Check that additional nop is inserted, to align instruction and mask to the
+# next bundle.
+
+# CHECK:         nop
+# CHECK:         nop
+
+# CHECK:         addu    $sp, $sp, $1
+# CHECK-NEXT:    and     $sp, $sp, $15
+
+# Since we next check sandboxing sequence which consists of 3 instructions,
+# check that 2 additional nops are inserted, to align it to the next bundle.
+
+# CHECK:         nop
+# CHECK:         nop
+
+
+# Check that for instructions that change stack-pointer and load from memory
+# masks are added before and after the instruction.
+
+# CHECK:         and     $2, $2, $15
+# CHECK-NEXT:    lw      $sp, 0($2)
+# CHECK-NEXT:    and     $sp, $sp, $15
+
+# For loads where $sp is destination and base, check that mask is added after
+# but not before.
+
+# CHECK-NOT:     and
+# CHECK:         lw      $sp, 123($sp)
+# CHECK-NEXT:    and     $sp, $sp, $15
+
+# For stores where $sp is destination and base, check that mask is added neither
+# before nor after.
+
+# CHECK-NOT:     and
+# CHECK:         sw      $sp, 123($sp)
+# CHECK-NOT:     and
+
+
+
+# Test that call + branch delay is aligned at bundle end.  Test that mask is
+# added before indirect calls.
+
+	.align	4
+test5:
+	.set	noreorder
+
+        jal func1
+        addiu $4, $zero, 1
+
+        nop
+        bal func2
+        addiu $4, $zero, 2
+
+        nop
+        nop
+        bltzal $t1, func3
+        addiu $4, $zero, 3
+
+        nop
+        nop
+        nop
+        bgezal $t2, func4
+        addiu $4, $zero, 4
+
+        jalr $t9
+        addiu $4, $zero, 5
+
+# CHECK-LABEL:   test5:
+
+# CHECK-NEXT:        nop
+# CHECK-NEXT:        nop
+# CHECK-NEXT:        jal
+# CHECK-NEXT:        addiu   $4, $zero, 1
+
+# CHECK-NEXT:        nop
+# CHECK-NEXT:        nop
+# CHECK-NEXT:        bal
+# CHECK-NEXT:        addiu   $4, $zero, 2
+
+# CHECK-NEXT:        nop
+# CHECK-NEXT:        nop
+# CHECK-NEXT:        bltzal
+# CHECK-NEXT:        addiu   $4, $zero, 3
+
+# CHECK-NEXT:        nop
+# CHECK-NEXT:        nop
+# CHECK-NEXT:        nop
+# CHECK-NEXT:        nop
+
+# CHECK-NEXT:        nop
+# CHECK-NEXT:        nop
+# CHECK-NEXT:        bgezal
+# CHECK-NEXT:        addiu   $4, $zero, 4
+
+# CHECK-NEXT:        nop
+# CHECK-NEXT:        and     $25, $25, $14
+# CHECK-NEXT:        jalr    $25
+# CHECK-NEXT:        addiu   $4, $zero, 5
diff --git a/test/MC/Mips/octeon-instructions.s b/test/MC/Mips/octeon-instructions.s
new file mode 100644
index 0000000..0244e19
--- /dev/null
+++ b/test/MC/Mips/octeon-instructions.s
@@ -0,0 +1,65 @@
+# RUN: llvm-mc  %s -triple=mips64-unknown-linux -show-encoding -mcpu=octeon | FileCheck %s
+
+# CHECK: baddu $9, $6, $7             # encoding: [0x70,0xc7,0x48,0x28]
+# CHECK: baddu $17, $18, $19          # encoding: [0x72,0x53,0x88,0x28]
+# CHECK: baddu $2, $2, $3             # encoding: [0x70,0x43,0x10,0x28]
+# CHECK: cins  $25, $10, 22, 2        # encoding: [0x71,0x59,0x15,0xb2]
+# CHECK: cins  $9, $9, 17, 29         # encoding: [0x71,0x29,0xec,0x72]
+# CHECK: cins32 $15, $2, 18, 8        # encoding: [0x70,0x4f,0x44,0xb3]
+# CHECK: cins32 $22, $22, 9, 22       # encoding: [0x72,0xd6,0xb2,0x73]
+# CHECK: dmul  $9, $6, $7             # encoding: [0x70,0xc7,0x48,0x03]
+# CHECK: dmul  $19, $24, $25          # encoding: [0x73,0x19,0x98,0x03]
+# CHECK: dmul  $9, $9, $6             # encoding: [0x71,0x26,0x48,0x03]
+# CHECK: dmul  $21, $21, $25          # encoding: [0x72,0xb9,0xa8,0x03]
+# CHECK: dpop  $9, $6                 # encoding: [0x70,0xc0,0x48,0x2d]
+# CHECK: dpop  $15, $22               # encoding: [0x72,0xc0,0x78,0x2d]
+# CHECK: dpop  $12, $12               # encoding: [0x71,0x80,0x60,0x2d]
+# CHECK: exts  $4, $25, 27, 15        # encoding: [0x73,0x24,0x7e,0xfa]
+# CHECK: exts  $15, $15, 17, 6        # encoding: [0x71,0xef,0x34,0x7a]
+# CHECK: exts32 $4, $13, 10, 8        # encoding: [0x71,0xa4,0x42,0xbb]
+# CHECK: exts32 $15, $15, 11, 20      # encoding: [0x71,0xef,0xa2,0xfb]
+# CHECK: mtm0  $15                    # encoding: [0x71,0xe0,0x00,0x08]
+# CHECK: mtm1  $16                    # encoding: [0x72,0x00,0x00,0x0c]
+# CHECK: mtm2  $17                    # encoding: [0x72,0x20,0x00,0x0d]
+# CHECK: mtp0  $18                    # encoding: [0x72,0x40,0x00,0x09]
+# CHECK: mtp1  $19                    # encoding: [0x72,0x60,0x00,0x0a]
+# CHECK: mtp2  $20                    # encoding: [0x72,0x80,0x00,0x0b]
+# CHECK: pop   $9, $6                 # encoding: [0x70,0xc0,0x48,0x2c]
+# CHECK: pop   $8, $19                # encoding: [0x72,0x60,0x40,0x2c]
+# CHECK: pop   $2, $2                 # encoding: [0x70,0x40,0x10,0x2c]
+# CHECK: seq   $25, $23, $24          # encoding: [0x72,0xf8,0xc8,0x2a]
+# CHECK: seq   $6, $6, $24            # encoding: [0x70,0xd8,0x30,0x2a]
+# CHECK: sne   $25, $23, $24          # encoding: [0x72,0xf8,0xc8,0x2b]
+# CHECK: sne   $23, $23, $20          # encoding: [0x72,0xf4,0xb8,0x2b]
+
+  baddu $9, $6, $7
+  baddu $17, $18, $19
+  baddu $2, $3
+  cins  $25, $10, 22, 2
+  cins  $9, 17, 29
+  cins32 $15, $2, 18, 8
+  cins32 $22, 9, 22
+  dmul  $9, $6, $7
+  dmul  $19, $24, $25
+  dmul  $9, $6
+  dmul  $21, $25
+  dpop  $9, $6
+  dpop  $15, $22
+  dpop  $12
+  exts  $4, $25, 27, 15
+  exts  $15, 17, 6
+  exts32 $4, $13, 10, 8
+  exts32 $15, 11, 20
+  mtm0  $15
+  mtm1  $16
+  mtm2  $17
+  mtp0  $18
+  mtp1  $19
+  mtp2  $20
+  pop   $9, $6
+  pop   $8, $19
+  pop   $2
+  seq   $25, $23, $24
+  seq   $6, $24
+  sne   $25, $23, $24
+  sne   $23, $20
diff --git a/test/MC/Mips/r-mips-got-disp.ll b/test/MC/Mips/r-mips-got-disp.ll
deleted file mode 100644
index 7e78a46..0000000
--- a/test/MC/Mips/r-mips-got-disp.ll
+++ /dev/null
@@ -1,19 +0,0 @@
-; RUN: llc -march=mips64el -filetype=obj -mcpu=mips64r2 < %s -o - | llvm-readobj -r | FileCheck %s
-
-; Check that the R_MIPS_GOT_DISP relocations were created.
-
-; CHECK: Relocations [
-; CHECK:     0x{{[0-9,A-F]+}} R_MIPS_GOT_DISP
-
-@shl = global i64 1, align 8
-@.str = private unnamed_addr constant [8 x i8] c"0x%llx\0A\00", align 1
-
-define i32 @main() nounwind {
-entry:
-  %0 = load i64* @shl, align 8
-  %call = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([8 x i8]* @.str, i64 0, i64 0), i64 %0) nounwind
-  ret i32 0
-}
-
-declare i32 @printf(i8* nocapture, ...) nounwind
-
diff --git a/test/MC/Mips/r-mips-got-disp.s b/test/MC/Mips/r-mips-got-disp.s
new file mode 100644
index 0000000..3cadc22
--- /dev/null
+++ b/test/MC/Mips/r-mips-got-disp.s
@@ -0,0 +1,65 @@
+// RUN: llvm-mc -triple=mips64el-pc-linux -filetype=obj -mcpu=mips64r2 < %s -o - | llvm-readobj -r | FileCheck %s
+
+// Check that the R_MIPS_GOT_DISP relocations were created.
+
+//       CHECK: Relocations [
+// CHECK:     0x{{[0-9,A-F]+}} R_MIPS_GOT_DISP
+
+	.text
+	.abicalls
+	.section	.mdebug.abi64,"",@progbits
+	.file	"<stdin>"
+	.text
+	.globl	main
+	.align	3
+	.type	main,@function
+	.set	nomips16
+	.ent	main
+main:                                   # @main
+	.frame	$sp,16,$ra
+	.mask 	0x00000000,0
+	.fmask	0x90000000,-4
+	.set	noreorder
+	.set	nomacro
+	.set	noat
+# BB#0:                                 # %entry
+	daddiu	$sp, $sp, -16
+	sd	$ra, 8($sp)             # 8-byte Folded Spill
+	sd	$gp, 0($sp)             # 8-byte Folded Spill
+	lui	$1, %hi(%neg(%gp_rel(main)))
+	daddu	$1, $1, $25
+	daddiu	$gp, $1, %lo(%neg(%gp_rel(main)))
+	ld	$1, %got_disp(shl)($gp)
+	ld	$5, 0($1)
+	ld	$1, %got_page($.str)($gp)
+	ld	$25, %call16(printf)($gp)
+	jalr	$25
+	daddiu	$4, $1, %got_ofst($.str)
+	addiu	$2, $zero, 0
+	ld	$gp, 0($sp)             # 8-byte Folded Reload
+	ld	$ra, 8($sp)             # 8-byte Folded Reload
+	jr	$ra
+	daddiu	$sp, $sp, 16
+	.set	at
+	.set	macro
+	.set	reorder
+	.end	main
+$tmp0:
+	.size	main, ($tmp0)-main
+
+	.type	shl,@object             # @shl
+	.data
+	.globl	shl
+	.align	3
+shl:
+	.8byte	1                       # 0x1
+	.size	shl, 8
+
+	.type	$.str,@object           # @.str
+	.section	.rodata.str1.1,"aMS",@progbits,1
+$.str:
+	.asciz	"0x%llx\n"
+	.size	$.str, 8
+
+
+	.text
diff --git a/test/MC/Mips/set-at-directive-explicit-at.s b/test/MC/Mips/set-at-directive-explicit-at.s
new file mode 100644
index 0000000..1bd26ff
--- /dev/null
+++ b/test/MC/Mips/set-at-directive-explicit-at.s
@@ -0,0 +1,42 @@
+# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 \
+# RUN:     2>%t1 | FileCheck %s
+# RUN: FileCheck -check-prefix=WARNINGS %s < %t1
+# Check that the assembler can handle the documented syntax
+# for ".set at" and set the correct value. The correct value for $at is always
+# $1 when written by the user.
+    .text
+foo:
+# CHECK:   jr    $1                      # encoding: [0x08,0x00,0x20,0x00]
+# WARNINGS: :[[@LINE+2]]:11: warning: Used $at without ".set noat"
+    .set    at=$1
+    jr    $at
+
+# CHECK:   jr    $1                      # encoding: [0x08,0x00,0x20,0x00]
+# WARNINGS: :[[@LINE+2]]:11: warning: Used $at without ".set noat"
+    .set    at=$1
+    jr    $1
+# WARNINGS-NOT: warning: Used $at without ".set noat"
+
+# CHECK:   jr    $1                      # encoding: [0x08,0x00,0x20,0x00]
+    .set    at=$2
+    jr    $at
+# CHECK:   jr    $1                      # encoding: [0x08,0x00,0x20,0x00]
+    .set    at=$3
+    jr    $at
+# CHECK:   jr    $1                      # encoding: [0x08,0x00,0x20,0x00]
+    .set noat
+    jr    $at
+# CHECK:   jr    $1                      # encoding: [0x08,0x00,0x20,0x00]
+    .set at=$0
+    jr    $at
+
+# CHECK:   jr    $16                     # encoding: [0x08,0x00,0x00,0x02]
+# WARNINGS: :[[@LINE+2]]:11: warning: Used $16 with ".set at=$16"
+    .set    at=$16
+    jr    $s0
+
+# CHECK:   jr    $16                     # encoding: [0x08,0x00,0x00,0x02]
+# WARNINGS: :[[@LINE+2]]:11: warning: Used $16 with ".set at=$16"
+    .set    at=$16
+    jr    $16
+# WARNINGS-NOT: warning
diff --git a/test/MC/Mips/set-at-directive.s b/test/MC/Mips/set-at-directive.s
index 828175a..7e93f76 100644
--- a/test/MC/Mips/set-at-directive.s
+++ b/test/MC/Mips/set-at-directive.s
@@ -2,130 +2,160 @@
 # RUN: FileCheck %s
 # Check that the assembler can handle the documented syntax
 # for ".set at" and set the correct value.
-
     .text
 foo:
-# CHECK:   jr    $1                      # encoding: [0x08,0x00,0x20,0x00]
+# CHECK: lui  $1, 1
+# CHECK: addu $1, $1, $2
+# CHECK: lw   $2, 0($1)
     .set    at=$1
-    jr    $at
-    nop
-# CHECK:   jr    $2                      # encoding: [0x08,0x00,0x40,0x00]
+        lw      $2, 65536($2)
+# CHECK: lui  $2, 1
+# CHECK: addu $2, $2, $1
+# CHECK: lw   $1, 0($2)
     .set    at=$2
-    jr    $at
-    nop
-# CHECK:   jr    $3                      # encoding: [0x08,0x00,0x60,0x00]
+        lw      $1, 65536($1)
+# CHECK: lui  $3, 1
+# CHECK: addu $3, $3, $1
+# CHECK: lw   $1, 0($3)
     .set    at=$3
-    jr    $at
-    nop
-# CHECK:   jr    $4                      # encoding: [0x08,0x00,0x80,0x00]
+        lw      $1, 65536($1)
+# CHECK: lui  $4, 1
+# CHECK: addu $4, $4, $1
+# CHECK: lw   $1, 0($4)
     .set    at=$a0
-    jr    $at
-    nop
-# CHECK:   jr    $5                      # encoding: [0x08,0x00,0xa0,0x00]
+        lw      $1, 65536($1)
+# CHECK: lui  $5, 1
+# CHECK: addu $5, $5, $1
+# CHECK: lw   $1, 0($5)
     .set    at=$a1
-    jr    $at
-    nop
-# CHECK:   jr    $6                      # encoding: [0x08,0x00,0xc0,0x00]
+        lw      $1, 65536($1)
+# CHECK: lui  $6, 1
+# CHECK: addu $6, $6, $1
+# CHECK: lw   $1, 0($6)
     .set    at=$a2
-    jr    $at
-    nop
-# CHECK:   jr $7                # encoding: [0x08,0x00,0xe0,0x00]
+        lw      $1, 65536($1)
+# CHECK: lui  $7, 1
+# CHECK: addu $7, $7, $1
+# CHECK: lw   $1, 0($7)
     .set    at=$a3
-    jr    $at
-    nop
-# CHECK:   jr    $8                      # encoding: [0x08,0x00,0x00,0x01]
+        lw      $1, 65536($1)
+# CHECK: lui  $8, 1
+# CHECK: addu $8, $8, $1
+# CHECK: lw   $1, 0($8)
     .set    at=$8
-    jr    $at
-    nop
-# CHECK:   jr    $9                      # encoding: [0x08,0x00,0x20,0x01]
+        lw      $1, 65536($1)
+# CHECK: lui  $9, 1
+# CHECK: addu $9, $9, $1
+# CHECK: lw   $1, 0($9)
     .set    at=$9
-    jr    $at
-    nop
-# CHECK:   jr    $10                     # encoding: [0x08,0x00,0x40,0x01]
+        lw      $1, 65536($1)
+# CHECK: lui  $10, 1
+# CHECK: addu $10, $10, $1
+# CHECK: lw   $1, 0($10)
     .set    at=$10
-    jr    $at
-    nop
-# CHECK:   jr    $11                     # encoding: [0x08,0x00,0x60,0x01]
+        lw      $1, 65536($1)
+# CHECK: lui  $11, 1
+# CHECK: addu $11, $11, $1
+# CHECK: lw   $1, 0($11)
     .set    at=$11
-    jr    $at
-    nop
-# CHECK:   jr    $12                     # encoding: [0x08,0x00,0x80,0x01]
+        lw      $1, 65536($1)
+# CHECK: lui  $12, 1
+# CHECK: addu $12, $12, $1
+# CHECK: lw   $1, 0($12)
     .set    at=$12
-    jr    $at
-    nop
-# CHECK:   jr    $13                     # encoding: [0x08,0x00,0xa0,0x01]
+        lw      $1, 65536($1)
+# CHECK: lui  $13, 1
+# CHECK: addu $13, $13, $1
+# CHECK: lw   $1, 0($13)
     .set    at=$13
-    jr    $at
-    nop
-# CHECK:   jr    $14                     # encoding: [0x08,0x00,0xc0,0x01]
+        lw      $1, 65536($1)
+# CHECK: lui  $14, 1
+# CHECK: addu $14, $14, $1
+# CHECK: lw   $1, 0($14)
     .set    at=$14
-    jr    $at
-    nop
-# CHECK:   jr    $15                     # encoding: [0x08,0x00,0xe0,0x01]
+        lw      $1, 65536($1)
+# CHECK: lui  $15, 1
+# CHECK: addu $15, $15, $1
+# CHECK: lw   $1, 0($15)
     .set    at=$15
-    jr    $at
-    nop
-# CHECK:   jr    $16                     # encoding: [0x08,0x00,0x00,0x02]
+        lw      $1, 65536($1)
+# CHECK: lui  $16, 1
+# CHECK: addu $16, $16, $1
+# CHECK: lw   $1, 0($16)
     .set    at=$s0
-    jr    $at
-    nop
-# CHECK:   jr    $17                     # encoding: [0x08,0x00,0x20,0x02]
+        lw      $1, 65536($1)
+# CHECK: lui  $17, 1
+# CHECK: addu $17, $17, $1
+# CHECK: lw   $1, 0($17)
     .set    at=$s1
-    jr    $at
-    nop
-# CHECK:   jr    $18                     # encoding: [0x08,0x00,0x40,0x02]
+        lw      $1, 65536($1)
+# CHECK: lui  $18, 1
+# CHECK: addu $18, $18, $1
+# CHECK: lw   $1, 0($18)
     .set    at=$s2
-    jr    $at
-    nop
-# CHECK:   jr    $19                     # encoding: [0x08,0x00,0x60,0x02]
+        lw      $1, 65536($1)
+# CHECK: lui  $19, 1
+# CHECK: addu $19, $19, $1
+# CHECK: lw   $1, 0($19)
     .set    at=$s3
-    jr    $at
-    nop
-# CHECK:   jr    $20                     # encoding: [0x08,0x00,0x80,0x02]
+        lw      $1, 65536($1)
+# CHECK: lui  $20, 1
+# CHECK: addu $20, $20, $1
+# CHECK: lw   $1, 0($20)
     .set    at=$s4
-    jr    $at
-    nop
-# CHECK:   jr    $21                     # encoding: [0x08,0x00,0xa0,0x02]
+        lw      $1, 65536($1)
+# CHECK: lui  $21, 1
+# CHECK: addu $21, $21, $1
+# CHECK: lw   $1, 0($21)
     .set    at=$s5
-    jr    $at
-    nop
-# CHECK:   jr    $22                     # encoding: [0x08,0x00,0xc0,0x02]
+        lw      $1, 65536($1)
+# CHECK: lui  $22, 1
+# CHECK: addu $22, $22, $1
+# CHECK: lw   $1, 0($22)
     .set    at=$s6
-    jr    $at
-    nop
-# CHECK:   jr    $23                     # encoding: [0x08,0x00,0xe0,0x02]
+        lw      $1, 65536($1)
+# CHECK: lui  $23, 1
+# CHECK: addu $23, $23, $1
+# CHECK: lw   $1, 0($23)
     .set    at=$s7
-    jr    $at
-    nop
-# CHECK:   jr    $24                     # encoding: [0x08,0x00,0x00,0x03]
+        lw      $1, 65536($1)
+# CHECK: lui  $24, 1
+# CHECK: addu $24, $24, $1
+# CHECK: lw   $1, 0($24)
     .set    at=$24
-    jr    $at
-    nop
-# CHECK:   jr    $25                     # encoding: [0x08,0x00,0x20,0x03]
+        lw      $1, 65536($1)
+# CHECK: lui  $25, 1
+# CHECK: addu $25, $25, $1
+# CHECK: lw   $1, 0($25)
     .set    at=$25
-    jr    $at
-    nop
-# CHECK:   jr    $26                     # encoding: [0x08,0x00,0x40,0x03]
+        lw      $1, 65536($1)
+# CHECK: lui  $26, 1
+# CHECK: addu $26, $26, $1
+# CHECK: lw   $1, 0($26)
     .set    at=$26
-    jr    $at
-    nop
-# CHECK:   jr    $27                     # encoding: [0x08,0x00,0x60,0x03]
+        lw      $1, 65536($1)
+# CHECK: lui  $27, 1
+# CHECK: addu $27, $27, $1
+# CHECK: lw   $1, 0($27)
     .set    at=$27
-    jr    $at
-    nop
-# CHECK:   jr    $gp                     # encoding: [0x08,0x00,0x80,0x03]
+        lw      $1, 65536($1)
+# CHECK: lui  $gp, 1
+# CHECK: addu $gp, $gp, $1
+# CHECK: lw   $1, 0($gp)
     .set    at=$gp
-    jr    $at
-    nop
-# CHECK:   jr    $fp                     # encoding: [0x08,0x00,0xc0,0x03]
+        lw      $1, 65536($1)
+# CHECK: lui  $fp, 1
+# CHECK: addu $fp, $fp, $1
+# CHECK: lw   $1, 0($fp)
     .set    at=$fp
-    jr    $at
-    nop
-# CHECK:   jr    $sp                     # encoding: [0x08,0x00,0xa0,0x03]
+        lw      $1, 65536($1)
+# CHECK: lui  $sp, 1
+# CHECK: addu $sp, $sp, $1
+# CHECK: lw   $1, 0($sp)
     .set    at=$sp
-    jr    $at
-    nop
-# CHECK:   jr    $ra                     # encoding: [0x08,0x00,0xe0,0x03]
+        lw      $1, 65536($1)
+# CHECK: lui  $ra, 1
+# CHECK: addu $ra, $ra, $1
+# CHECK: lw   $1, 0($ra)
     .set    at=$ra
-    jr    $at
-    nop
+        lw      $1, 65536($1)
diff --git a/test/MC/Mips/sym-expr.s b/test/MC/Mips/sym-expr.s
new file mode 100644
index 0000000..efefb1d
--- /dev/null
+++ b/test/MC/Mips/sym-expr.s
@@ -0,0 +1,14 @@
+# Check parsing symbol expressions
+
+# RUN: llvm-mc -triple=mipsel -show-inst-operands %s 2> %t0
+# RUN: FileCheck %s < %t0
+
+    .global __start
+    .ent    __start
+__start:
+    nop
+loc:
+    jal     __start + 0x4       # CHECK: instruction: [jal, Imm<__start+4>]
+    jal     __start + (-0x10)   # CHECK: instruction: [jal, Imm<__start-16>]
+    jal     (__start + (-0x10)) # CHECK: instruction: [jal, Imm<__start-16>]
+    .end    __start
diff --git a/test/MC/Mips/xgot.ll b/test/MC/Mips/xgot.ll
deleted file mode 100644
index cc33678..0000000
--- a/test/MC/Mips/xgot.ll
+++ /dev/null
@@ -1,29 +0,0 @@
-; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux -mxgot %s -o - | llvm-readobj -r | FileCheck %s
-
-@.str = private unnamed_addr constant [16 x i8] c"ext_1=%d, i=%d\0A\00", align 1
-@ext_1 = external global i32
-
-define void @fill() nounwind {
-entry:
-
-; Check that the appropriate relocations were created. 
-; For the xgot case we want to see R_MIPS_[GOT|CALL]_[HI|LO]16.
-
-; CHECK: Relocations [
-; CHECK:     0x{{[0-9,A-F]+}} R_MIPS_HI16
-; CHECK:     0x{{[0-9,A-F]+}} R_MIPS_LO16
-; CHECK:     0x{{[0-9,A-F]+}} R_MIPS_GOT_HI16
-; CHECK:     0x{{[0-9,A-F]+}} R_MIPS_GOT_LO16
-; CHECK:     0x{{[0-9,A-F]+}} R_MIPS_CALL_HI16
-; CHECK:     0x{{[0-9,A-F]+}} R_MIPS_CALL_LO16
-; CHECK:     0x{{[0-9,A-F]+}} R_MIPS_GOT
-; CHECK:     0x{{[0-9,A-F]+}} R_MIPS_LO16
-; CHECK: ]
-
-  %0 = load i32* @ext_1, align 4
-  %call = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([16 x i8]* @.str, i32 0, i32 0), i32 %0) nounwind
-  ret void
-}
-
-declare i32 @printf(i8* nocapture, ...) nounwind
-
diff --git a/test/MC/Mips/xgot.s b/test/MC/Mips/xgot.s
new file mode 100644
index 0000000..3084806
--- /dev/null
+++ b/test/MC/Mips/xgot.s
@@ -0,0 +1,67 @@
+// RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux  %s -o - | llvm-readobj -r | FileCheck %s
+
+// Check that the appropriate relocations were created.
+// For the xgot case we want to see R_MIPS_[GOT|CALL]_[HI|LO]16.
+
+// CHECK: Relocations [
+// CHECK:   0x0 R_MIPS_HI16 _gp_disp
+// CHECK:   0x4 R_MIPS_LO16 _gp_disp
+// CHECK:   0x14 R_MIPS_GOT_HI16 ext_1
+// CHECK:   0x1C R_MIPS_GOT_LO16 ext_1
+// CHECK:   0x24 R_MIPS_CALL_HI16 printf
+// CHECK:   0x2C R_MIPS_GOT16 $.str
+// CHECK:   0x30 R_MIPS_CALL_LO16 printf
+// CHECK:   0x38 R_MIPS_LO16 $.str
+// CHECK: ]
+
+	.text
+	.abicalls
+	.section	.mdebug.abi32,"",@progbits
+	.file	"/home/espindola/llvm/llvm/test/MC/Mips/xgot.ll"
+	.text
+	.globl	fill
+	.align	2
+	.type	fill,@function
+	.set	nomips16
+	.ent	fill
+fill:                                   # @fill
+	.frame	$sp,24,$ra
+	.mask 	0x80000000,-4
+	.fmask	0x00000000,0
+	.set	noreorder
+	.set	nomacro
+	.set	noat
+# BB#0:                                 # %entry
+	lui	$2, %hi(_gp_disp)
+	addiu	$2, $2, %lo(_gp_disp)
+	addiu	$sp, $sp, -24
+	sw	$ra, 20($sp)            # 4-byte Folded Spill
+	addu	$gp, $2, $25
+	lui	$1, %got_hi(ext_1)
+	addu	$1, $1, $gp
+	lw	$1, %got_lo(ext_1)($1)
+	lw	$5, 0($1)
+	lui	$1, %call_hi(printf)
+	addu	$1, $1, $gp
+	lw	$2, %got($.str)($gp)
+	lw	$25, %call_lo(printf)($1)
+	jalr	$25
+	addiu	$4, $2, %lo($.str)
+	lw	$ra, 20($sp)            # 4-byte Folded Reload
+	jr	$ra
+	addiu	$sp, $sp, 24
+	.set	at
+	.set	macro
+	.set	reorder
+	.end	fill
+$tmp0:
+	.size	fill, ($tmp0)-fill
+
+	.type	$.str,@object           # @.str
+	.section	.rodata.str1.1,"aMS",@progbits,1
+$.str:
+	.asciz	"ext_1=%d, i=%d\n"
+	.size	$.str, 16
+
+
+	.text
diff --git a/test/MC/PowerPC/deprecated-p7.s b/test/MC/PowerPC/deprecated-p7.s
index ded9923..21ef6d2 100644
--- a/test/MC/PowerPC/deprecated-p7.s
+++ b/test/MC/PowerPC/deprecated-p7.s
@@ -1,4 +1,5 @@
 # RUN: llvm-mc -triple powerpc64-unknown-linux-gnu -mcpu=pwr7 -show-encoding < %s 2>&1 | FileCheck %s
+# RUN: llvm-mc -triple powerpc64le-unknown-linux-gnu -mcpu=pwr7 -show-encoding < %s 2>&1 | FileCheck %s
 # RUN: llvm-mc -triple powerpc-unknown-linux-gnu -mcpu=601 -show-encoding < %s 2>&1 | FileCheck -check-prefix=CHECK-OLD %s
 
          mftb 3
diff --git a/test/MC/PowerPC/ppc-llong.s b/test/MC/PowerPC/ppc-llong.s
index 0838e42..5d92fe3 100644
--- a/test/MC/PowerPC/ppc-llong.s
+++ b/test/MC/PowerPC/ppc-llong.s
@@ -3,6 +3,8 @@
 # RUN: llvm-readobj -s -sd | FileCheck %s
 # RUN: llvm-mc -triple powerpc64-unknown-unknown -filetype=obj %s | \
 # RUN: llvm-readobj -s -sd | FileCheck %s
+# RUN: llvm-mc -triple powerpc64le-unknown-unknown -filetype=obj %s | \
+# RUN: llvm-readobj -s -sd | FileCheck %s
 
 .data
 .llong 0
diff --git a/test/MC/PowerPC/ppc-machine.s b/test/MC/PowerPC/ppc-machine.s
index b8a7e3f..6b3bf31 100644
--- a/test/MC/PowerPC/ppc-machine.s
+++ b/test/MC/PowerPC/ppc-machine.s
@@ -1,5 +1,6 @@
 # RUN: llvm-mc -triple powerpc-unknown-unknown %s
 # RUN: llvm-mc -triple powerpc64-unknown-unknown %s
+# RUN: llvm-mc -triple powerpc64le-unknown-unknown %s
 
 # For now, the only thing we check is that the .machine directive
 # is accepted without syntax error.
diff --git a/test/MC/PowerPC/ppc-nop.s b/test/MC/PowerPC/ppc-nop.s
index 50afae2..29fd8e4 100644
--- a/test/MC/PowerPC/ppc-nop.s
+++ b/test/MC/PowerPC/ppc-nop.s
@@ -1,5 +1,6 @@
-# RUN: llvm-mc -filetype=obj -triple=powerpc-unknown-linux-gnu %s | llvm-readobj -s -sd - | FileCheck %s
-# RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux-gnu %s | llvm-readobj -s -sd - | FileCheck %s
+# RUN: llvm-mc -filetype=obj -triple=powerpc-unknown-linux-gnu %s | llvm-readobj -s -sd - | FileCheck -check-prefix=CHECK-BE %s
+# RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux-gnu %s | llvm-readobj -s -sd - | FileCheck -check-prefix=CHECK-BE %s
+# RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux-gnu %s | llvm-readobj -s -sd - | FileCheck -check-prefix=CHECK-LE %s
 
 blr
 .p2align 3
@@ -8,5 +9,6 @@ blr
 .byte 0x42
 .p2align 2
 
-# CHECK:  0000: 4E800020 60000000 4E800020 42000000
+# CHECK-BE:  0000: 4E800020 60000000 4E800020 42000000
+# CHECK-LE:  0000: 2000804E 00000060 2000804E 42000000
 
diff --git a/test/MC/PowerPC/ppc-word.s b/test/MC/PowerPC/ppc-word.s
index 773fa14..e69de54 100644
--- a/test/MC/PowerPC/ppc-word.s
+++ b/test/MC/PowerPC/ppc-word.s
@@ -3,6 +3,8 @@
 # RUN: llvm-readobj -s -sd | FileCheck %s
 # RUN: llvm-mc -triple powerpc64-unknown-unknown -filetype=obj %s | \
 # RUN: llvm-readobj -s -sd | FileCheck %s
+# RUN: llvm-mc -triple powerpc64le-unknown-unknown -filetype=obj %s | \
+# RUN: llvm-readobj -s -sd | FileCheck %s
 
 .data
 .word 0
diff --git a/test/MC/PowerPC/ppc64-encoding-bookII.s b/test/MC/PowerPC/ppc64-encoding-bookII.s
index 9e68a4b..99796ca 100644
--- a/test/MC/PowerPC/ppc64-encoding-bookII.s
+++ b/test/MC/PowerPC/ppc64-encoding-bookII.s
@@ -1,82 +1,107 @@
 
-# RUN: llvm-mc -triple powerpc64-unknown-unknown --show-encoding %s | FileCheck %s
+# RUN: llvm-mc -triple powerpc64-unknown-unknown --show-encoding %s | FileCheck -check-prefix=CHECK-BE %s
+# RUN: llvm-mc -triple powerpc64le-unknown-unknown --show-encoding %s | FileCheck -check-prefix=CHECK-LE %s
 
 # Cache management instruction
 
-# CHECK: icbi 2, 3                       # encoding: [0x7c,0x02,0x1f,0xac]
-         icbi 2, 3
-
-# FIXME: dcbt 2, 3, 10
-# CHECK: dcbt 2, 3                       # encoding: [0x7c,0x02,0x1a,0x2c]
-         dcbt 2, 3
-# FIXME: dcbtst 2, 3, 10
-# CHECK: dcbtst 2, 3                     # encoding: [0x7c,0x02,0x19,0xec]
-         dcbtst 2, 3
-# CHECK: dcbz 2, 3                       # encoding: [0x7c,0x02,0x1f,0xec]
-         dcbz 2, 3
-# CHECK: dcbst 2, 3                      # encoding: [0x7c,0x02,0x18,0x6c]
-         dcbst 2, 3
-# FIXME: dcbf 2, 3, 1
+# CHECK-BE: icbi 2, 3                       # encoding: [0x7c,0x02,0x1f,0xac]
+# CHECK-LE: icbi 2, 3                       # encoding: [0xac,0x1f,0x02,0x7c]
+            icbi 2, 3
+
+# FIXME:    dcbt 2, 3, 10
+# CHECK-BE: dcbt 2, 3                       # encoding: [0x7c,0x02,0x1a,0x2c]
+# CHECK-LE: dcbt 2, 3                       # encoding: [0x2c,0x1a,0x02,0x7c]
+            dcbt 2, 3
+# FIXME:    dcbtst 2, 3, 10
+# CHECK-BE: dcbtst 2, 3                     # encoding: [0x7c,0x02,0x19,0xec]
+# CHECK-LE: dcbtst 2, 3                     # encoding: [0xec,0x19,0x02,0x7c]
+            dcbtst 2, 3
+# CHECK-BE: dcbz 2, 3                       # encoding: [0x7c,0x02,0x1f,0xec]
+# CHECK-LE: dcbz 2, 3                       # encoding: [0xec,0x1f,0x02,0x7c]
+            dcbz 2, 3
+# CHECK-BE: dcbst 2, 3                      # encoding: [0x7c,0x02,0x18,0x6c]
+# CHECK-LE: dcbst 2, 3                      # encoding: [0x6c,0x18,0x02,0x7c]
+            dcbst 2, 3
+# FIXME:    dcbf 2, 3, 1
 
 # Synchronization instructions
 
-# CHECK: isync                           # encoding: [0x4c,0x00,0x01,0x2c]
-         isync
-
-# FIXME: lbarx 2, 3, 4, 1
-# FIXME: lharx 2, 3, 4, 1
-# FIXME: lwarx 2, 3, 4, 1
-# FIXME: ldarx 2, 3, 4, 1
-
-# FIXME: stbcx. 2, 3, 4
-# FIXME: sthcx. 2, 3, 4
-# CHECK: stwcx. 2, 3, 4                  # encoding: [0x7c,0x43,0x21,0x2d]
-         stwcx. 2, 3, 4
-# CHECK: stdcx. 2, 3, 4                  # encoding: [0x7c,0x43,0x21,0xad]
-         stdcx. 2, 3, 4
-
-# CHECK: sync 2                          # encoding: [0x7c,0x40,0x04,0xac]
-         sync 2
-# CHECK: eieio                           # encoding: [0x7c,0x00,0x06,0xac]
-         eieio
-# CHECK: wait 2                          # encoding: [0x7c,0x40,0x00,0x7c]
-         wait 2
+# CHECK-BE: isync                           # encoding: [0x4c,0x00,0x01,0x2c]
+# CHECK-LE: isync                           # encoding: [0x2c,0x01,0x00,0x4c]
+            isync
+
+# FIXME:    lbarx 2, 3, 4, 1
+# FIXME:    lharx 2, 3, 4, 1
+# FIXME:    lwarx 2, 3, 4, 1
+# FIXME:    ldarx 2, 3, 4, 1
+
+# FIXME:    stbcx. 2, 3, 4
+# FIXME:    sthcx. 2, 3, 4
+# CHECK-BE: stwcx. 2, 3, 4                  # encoding: [0x7c,0x43,0x21,0x2d]
+# CHECK-LE: stwcx. 2, 3, 4                  # encoding: [0x2d,0x21,0x43,0x7c]
+            stwcx. 2, 3, 4
+# CHECK-BE: stdcx. 2, 3, 4                  # encoding: [0x7c,0x43,0x21,0xad]
+# CHECK-LE: stdcx. 2, 3, 4                  # encoding: [0xad,0x21,0x43,0x7c]
+            stdcx. 2, 3, 4
+
+# CHECK-BE: sync 2                          # encoding: [0x7c,0x40,0x04,0xac]
+# CHECK-LE: sync 2                          # encoding: [0xac,0x04,0x40,0x7c]
+            sync 2
+# CHECK-BE: eieio                           # encoding: [0x7c,0x00,0x06,0xac]
+# CHECK-LE: eieio                           # encoding: [0xac,0x06,0x00,0x7c]
+            eieio
+# CHECK-BE: wait 2                          # encoding: [0x7c,0x40,0x00,0x7c]
+# CHECK-LE: wait 2                          # encoding: [0x7c,0x00,0x40,0x7c]
+            wait 2
 
 # Extended mnemonics
 
-# CHECK: dcbf 2, 3                       # encoding: [0x7c,0x02,0x18,0xac]
-         dcbf 2, 3
-# FIXME: dcbfl 2, 3
-
-# FIXME: lbarx 2, 3, 4
-# FIXME: lharx 2, 3, 4
-# CHECK: lwarx 2, 3, 4                   # encoding: [0x7c,0x43,0x20,0x28]
-         lwarx 2, 3, 4
-# CHECK: ldarx 2, 3, 4                   # encoding: [0x7c,0x43,0x20,0xa8]
-         ldarx 2, 3, 4
-
-# CHECK: sync 0                          # encoding: [0x7c,0x00,0x04,0xac]
-         sync
-# CHECK: sync 0                          # encoding: [0x7c,0x00,0x04,0xac]
-         msync
-# CHECK: sync 1                          # encoding: [0x7c,0x20,0x04,0xac]
-         lwsync
-# CHECK: sync 2                          # encoding: [0x7c,0x40,0x04,0xac]
-         ptesync
-
-# CHECK: wait 0                          # encoding: [0x7c,0x00,0x00,0x7c]
-         wait
-# CHECK: wait 1                          # encoding: [0x7c,0x20,0x00,0x7c]
-         waitrsv
-# CHECK: wait 2                          # encoding: [0x7c,0x40,0x00,0x7c]
-         waitimpl
+# CHECK-BE: dcbf 2, 3                       # encoding: [0x7c,0x02,0x18,0xac]
+# CHECK-LE: dcbf 2, 3                       # encoding: [0xac,0x18,0x02,0x7c]
+            dcbf 2, 3
+# FIXME:    dcbfl 2, 3
+
+# FIXME:    lbarx 2, 3, 4
+# FIXME:    lharx 2, 3, 4
+# CHECK-BE: lwarx 2, 3, 4                   # encoding: [0x7c,0x43,0x20,0x28]
+# CHECK-LE: lwarx 2, 3, 4                   # encoding: [0x28,0x20,0x43,0x7c]
+            lwarx 2, 3, 4
+# CHECK-BE: ldarx 2, 3, 4                   # encoding: [0x7c,0x43,0x20,0xa8]
+# CHECK-LE: ldarx 2, 3, 4                   # encoding: [0xa8,0x20,0x43,0x7c]
+            ldarx 2, 3, 4
+
+# CHECK-BE: sync 0                          # encoding: [0x7c,0x00,0x04,0xac]
+# CHECK-LE: sync 0                          # encoding: [0xac,0x04,0x00,0x7c]
+            sync
+# CHECK-BE: sync 0                          # encoding: [0x7c,0x00,0x04,0xac]
+# CHECK-LE: sync 0                          # encoding: [0xac,0x04,0x00,0x7c]
+            msync
+# CHECK-BE: sync 1                          # encoding: [0x7c,0x20,0x04,0xac]
+# CHECK-LE: sync 1                          # encoding: [0xac,0x04,0x20,0x7c]
+            lwsync
+# CHECK-BE: sync 2                          # encoding: [0x7c,0x40,0x04,0xac]
+# CHECK-LE: sync 2                          # encoding: [0xac,0x04,0x40,0x7c]
+            ptesync
+
+# CHECK-BE: wait 0                          # encoding: [0x7c,0x00,0x00,0x7c]
+# CHECK-LE: wait 0                          # encoding: [0x7c,0x00,0x00,0x7c]
+            wait
+# CHECK-BE: wait 1                          # encoding: [0x7c,0x20,0x00,0x7c]
+# CHECK-LE: wait 1                          # encoding: [0x7c,0x00,0x20,0x7c]
+            waitrsv
+# CHECK-BE: wait 2                          # encoding: [0x7c,0x40,0x00,0x7c]
+# CHECK-LE: wait 2                          # encoding: [0x7c,0x00,0x40,0x7c]
+            waitimpl
 
 # Time base instructions
 
-# CHECK: mftb 2, 123                     # encoding: [0x7c,0x5b,0x1a,0xe6]
-         mftb 2, 123
-# CHECK: mftb 2, 268                     # encoding: [0x7c,0x4c,0x42,0xe6]
-         mftb 2
-# CHECK: mftb 2, 269                     # encoding: [0x7c,0x4d,0x42,0xe6]
-         mftbu 2
+# CHECK-BE: mftb 2, 123                     # encoding: [0x7c,0x5b,0x1a,0xe6]
+# CHECK-LE: mftb 2, 123                     # encoding: [0xe6,0x1a,0x5b,0x7c]
+            mftb 2, 123
+# CHECK-BE: mftb 2, 268                     # encoding: [0x7c,0x4c,0x42,0xe6]
+# CHECK-LE: mftb 2, 268                     # encoding: [0xe6,0x42,0x4c,0x7c]
+            mftb 2
+# CHECK-BE: mftb 2, 269                     # encoding: [0x7c,0x4d,0x42,0xe6]
+# CHECK-LE: mftb 2, 269                     # encoding: [0xe6,0x42,0x4d,0x7c]
+            mftbu 2
 
diff --git a/test/MC/PowerPC/ppc64-encoding-bookIII.s b/test/MC/PowerPC/ppc64-encoding-bookIII.s
index 318c30b..dfce395 100644
--- a/test/MC/PowerPC/ppc64-encoding-bookIII.s
+++ b/test/MC/PowerPC/ppc64-encoding-bookIII.s
@@ -1,107 +1,143 @@
-# RUN: llvm-mc -triple powerpc64-unknown-unknown --show-encoding %s | FileCheck %s
+# RUN: llvm-mc -triple powerpc64-unknown-unknown --show-encoding %s | FileCheck -check-prefix=CHECK-BE %s
+# RUN: llvm-mc -triple powerpc64le-unknown-unknown --show-encoding %s | FileCheck -check-prefix=CHECK-LE %s
 
-# CHECK: mtmsr 4, 0                       # encoding: [0x7c,0x80,0x01,0x24]
-         mtmsr %r4
+# CHECK-BE: mtmsr 4, 0                       # encoding: [0x7c,0x80,0x01,0x24]
+# CHECK-LE: mtmsr 4, 0                       # encoding: [0x24,0x01,0x80,0x7c]
+            mtmsr %r4
 
-# CHECK: mtmsr 4, 1                       # encoding: [0x7c,0x81,0x01,0x24]
-         mtmsr %r4, 1
+# CHECK-BE: mtmsr 4, 1                       # encoding: [0x7c,0x81,0x01,0x24]
+# CHECK-LE: mtmsr 4, 1                       # encoding: [0x24,0x01,0x81,0x7c]
+            mtmsr %r4, 1
 
-# CHECK: mfmsr 4                         # encoding: [0x7c,0x80,0x00,0xa6]
-         mfmsr %r4
+# CHECK-BE: mfmsr 4                         # encoding: [0x7c,0x80,0x00,0xa6]
+# CHECK-LE: mfmsr 4                         # encoding: [0xa6,0x00,0x80,0x7c]
+            mfmsr %r4
 
-# CHECK: mtmsrd 4, 0                     # encoding: [0x7c,0x80,0x01,0x64]
-         mtmsrd %r4
+# CHECK-BE: mtmsrd 4, 0                     # encoding: [0x7c,0x80,0x01,0x64]
+# CHECK-LE: mtmsrd 4, 0                     # encoding: [0x64,0x01,0x80,0x7c]
+            mtmsrd %r4
 
-# CHECK: mtmsrd 4, 1                     # encoding: [0x7c,0x81,0x01,0x64]
-         mtmsrd %r4, 1
+# CHECK-BE: mtmsrd 4, 1                     # encoding: [0x7c,0x81,0x01,0x64]
+# CHECK-LE: mtmsrd 4, 1                     # encoding: [0x64,0x01,0x81,0x7c]
+            mtmsrd %r4, 1
 
-# CHECK: mfspr 4, 272                    # encoding: [0x7c,0x90,0x42,0xa6]
-         mfsprg %r4, 0
+# CHECK-BE: mfspr 4, 272                    # encoding: [0x7c,0x90,0x42,0xa6]
+# CHECK-LE: mfspr 4, 272                    # encoding: [0xa6,0x42,0x90,0x7c]
+            mfsprg %r4, 0
 
-# CHECK: mfspr 4, 273                    # encoding: [0x7c,0x91,0x42,0xa6]
-         mfsprg %r4, 1
+# CHECK-BE: mfspr 4, 273                    # encoding: [0x7c,0x91,0x42,0xa6]
+# CHECK-LE: mfspr 4, 273                    # encoding: [0xa6,0x42,0x91,0x7c]
+            mfsprg %r4, 1
 
-# CHECK: mfspr 4, 274                    # encoding: [0x7c,0x92,0x42,0xa6]
-         mfsprg %r4, 2
+# CHECK-BE: mfspr 4, 274                    # encoding: [0x7c,0x92,0x42,0xa6]
+# CHECK-LE: mfspr 4, 274                    # encoding: [0xa6,0x42,0x92,0x7c]
+            mfsprg %r4, 2
 
-# CHECK: mfspr 4, 275                    # encoding: [0x7c,0x93,0x42,0xa6]
-         mfsprg %r4, 3
+# CHECK-BE: mfspr 4, 275                    # encoding: [0x7c,0x93,0x42,0xa6]
+# CHECK-LE: mfspr 4, 275                    # encoding: [0xa6,0x42,0x93,0x7c]
+            mfsprg %r4, 3
 
-# CHECK: mtspr 272, 4                    # encoding: [0x7c,0x90,0x43,0xa6]
-         mtsprg 0, %r4
+# CHECK-BE: mtspr 272, 4                    # encoding: [0x7c,0x90,0x43,0xa6]
+# CHECK-LE: mtspr 272, 4                    # encoding: [0xa6,0x43,0x90,0x7c]
+            mtsprg 0, %r4
 
-# CHECK: mtspr 273, 4                    # encoding: [0x7c,0x91,0x43,0xa6]
-         mtsprg 1, %r4
+# CHECK-BE: mtspr 273, 4                    # encoding: [0x7c,0x91,0x43,0xa6]
+# CHECK-LE: mtspr 273, 4                    # encoding: [0xa6,0x43,0x91,0x7c]
+            mtsprg 1, %r4
 
-# CHECK: mtspr 274, 4                    # encoding: [0x7c,0x92,0x43,0xa6]
-         mtsprg 2, %r4
+# CHECK-BE: mtspr 274, 4                    # encoding: [0x7c,0x92,0x43,0xa6]
+# CHECK-LE: mtspr 274, 4                    # encoding: [0xa6,0x43,0x92,0x7c]
+            mtsprg 2, %r4
 
-# CHECK: mtspr 275, 4                    # encoding: [0x7c,0x93,0x43,0xa6]
-         mtsprg 3, %r4
+# CHECK-BE: mtspr 275, 4                    # encoding: [0x7c,0x93,0x43,0xa6]
+# CHECK-LE: mtspr 275, 4                    # encoding: [0xa6,0x43,0x93,0x7c]
+            mtsprg 3, %r4
 
-# CHECK: mtspr 272, 4                    # encoding: [0x7c,0x90,0x43,0xa6]
-         mtsprg0 %r4
+# CHECK-BE: mtspr 272, 4                    # encoding: [0x7c,0x90,0x43,0xa6]
+# CHECK-LE: mtspr 272, 4                    # encoding: [0xa6,0x43,0x90,0x7c]
+            mtsprg0 %r4
 
-# CHECK: mtspr 273, 4                    # encoding: [0x7c,0x91,0x43,0xa6]
-         mtsprg1 %r4
+# CHECK-BE: mtspr 273, 4                    # encoding: [0x7c,0x91,0x43,0xa6]
+# CHECK-LE: mtspr 273, 4                    # encoding: [0xa6,0x43,0x91,0x7c]
+            mtsprg1 %r4
 
-# CHECK: mtspr 274, 4                    # encoding: [0x7c,0x92,0x43,0xa6]
-         mtsprg2 %r4
+# CHECK-BE: mtspr 274, 4                    # encoding: [0x7c,0x92,0x43,0xa6]
+# CHECK-LE: mtspr 274, 4                    # encoding: [0xa6,0x43,0x92,0x7c]
+            mtsprg2 %r4
 
-# CHECK: mtspr 275, 4                    # encoding: [0x7c,0x93,0x43,0xa6]
-         mtsprg3 %r4
+# CHECK-BE: mtspr 275, 4                    # encoding: [0x7c,0x93,0x43,0xa6]
+# CHECK-LE: mtspr 275, 4                    # encoding: [0xa6,0x43,0x93,0x7c]
+            mtsprg3 %r4
 
-# CHECK: mtspr 280, 4                    # encoding: [0x7c,0x98,0x43,0xa6]
-         mtasr %r4
+# CHECK-BE: mtspr 280, 4                    # encoding: [0x7c,0x98,0x43,0xa6]
+# CHECK-LE: mtspr 280, 4                    # encoding: [0xa6,0x43,0x98,0x7c]
+            mtasr %r4
 
-# CHECK: mfspr 4, 22                     # encoding: [0x7c,0x96,0x02,0xa6]
-         mfdec %r4
+# CHECK-BE: mfspr 4, 22                     # encoding: [0x7c,0x96,0x02,0xa6]
+# CHECK-LE: mfspr 4, 22                     # encoding: [0xa6,0x02,0x96,0x7c]
+            mfdec %r4
 
-# CHECK: mtspr 22, 4                     # encoding: [0x7c,0x96,0x03,0xa6]
-         mtdec %r4
+# CHECK-BE: mtspr 22, 4                     # encoding: [0x7c,0x96,0x03,0xa6]
+# CHECK-LE: mtspr 22, 4                     # encoding: [0xa6,0x03,0x96,0x7c]
+            mtdec %r4
 
-# CHECK: mfspr 4, 287                    # encoding: [0x7c,0x9f,0x42,0xa6]
-         mfpvr %r4
+# CHECK-BE: mfspr 4, 287                    # encoding: [0x7c,0x9f,0x42,0xa6]
+# CHECK-LE: mfspr 4, 287                    # encoding: [0xa6,0x42,0x9f,0x7c]
+            mfpvr %r4
 
-# CHECK: mfspr 4, 25                     # encoding: [0x7c,0x99,0x02,0xa6]
-         mfsdr1 %r4
+# CHECK-BE: mfspr 4, 25                     # encoding: [0x7c,0x99,0x02,0xa6]
+# CHECK-LE: mfspr 4, 25                     # encoding: [0xa6,0x02,0x99,0x7c]
+            mfsdr1 %r4
 
-# CHECK: mtspr 25, 4                     # encoding: [0x7c,0x99,0x03,0xa6]
-         mtsdr1 %r4
+# CHECK-BE: mtspr 25, 4                     # encoding: [0x7c,0x99,0x03,0xa6]
+# CHECK-LE: mtspr 25, 4                     # encoding: [0xa6,0x03,0x99,0x7c]
+            mtsdr1 %r4
 
-# CHECK: mfspr 4, 26                     # encoding: [0x7c,0x9a,0x02,0xa6]
-         mfsrr0 %r4
+# CHECK-BE: mfspr 4, 26                     # encoding: [0x7c,0x9a,0x02,0xa6]
+# CHECK-LE: mfspr 4, 26                     # encoding: [0xa6,0x02,0x9a,0x7c]
+            mfsrr0 %r4
 
-# CHECK: mtspr 26, 4                     # encoding: [0x7c,0x9a,0x03,0xa6]
-         mtsrr0 %r4
+# CHECK-BE: mtspr 26, 4                     # encoding: [0x7c,0x9a,0x03,0xa6]
+# CHECK-LE: mtspr 26, 4                     # encoding: [0xa6,0x03,0x9a,0x7c]
+            mtsrr0 %r4
 
-# CHECK: mfspr 4, 27                     # encoding: [0x7c,0x9b,0x02,0xa6]
-         mfsrr1 %r4
+# CHECK-BE: mfspr 4, 27                     # encoding: [0x7c,0x9b,0x02,0xa6]
+# CHECK-LE: mfspr 4, 27                     # encoding: [0xa6,0x02,0x9b,0x7c]
+            mfsrr1 %r4
 
-# CHECK: mtspr 27, 4                     # encoding: [0x7c,0x9b,0x03,0xa6]
-         mtsrr1 %r4
+# CHECK-BE: mtspr 27, 4                     # encoding: [0x7c,0x9b,0x03,0xa6]
+# CHECK-LE: mtspr 27, 4                     # encoding: [0xa6,0x03,0x9b,0x7c]
+            mtsrr1 %r4
 
-# CHECK: slbie 4                         # encoding: [0x7c,0x00,0x23,0x64]
-         slbie %r4
+# CHECK-BE: slbie 4                         # encoding: [0x7c,0x00,0x23,0x64]
+# CHECK-LE: slbie 4                         # encoding: [0x64,0x23,0x00,0x7c]
+            slbie %r4
 
-# CHECK: slbmte 4, 5                     # encoding: [0x7c,0x80,0x2b,0x24]
-         slbmte %r4, %r5
+# CHECK-BE: slbmte 4, 5                     # encoding: [0x7c,0x80,0x2b,0x24]
+# CHECK-LE: slbmte 4, 5                     # encoding: [0x24,0x2b,0x80,0x7c]
+            slbmte %r4, %r5
 
-# CHECK: slbmfee 4, 5                    # encoding: [0x7c,0x80,0x2f,0x26]
-         slbmfee %r4, %r5
+# CHECK-BE: slbmfee 4, 5                    # encoding: [0x7c,0x80,0x2f,0x26]
+# CHECK-LE: slbmfee 4, 5                    # encoding: [0x26,0x2f,0x80,0x7c]
+            slbmfee %r4, %r5
 
-# CHECK: slbia                           # encoding: [0x7c,0x00,0x03,0xe4]
-         slbia
+# CHECK-BE: slbia                           # encoding: [0x7c,0x00,0x03,0xe4]
+# CHECK-LE: slbia                           # encoding: [0xe4,0x03,0x00,0x7c]
+            slbia
 
-# CHECK: tlbsync                         # encoding: [0x7c,0x00,0x04,0x6c]
-         tlbsync
+# CHECK-BE: tlbsync                         # encoding: [0x7c,0x00,0x04,0x6c]
+# CHECK-LE: tlbsync                         # encoding: [0x6c,0x04,0x00,0x7c]
+            tlbsync
 
-# CHECK: tlbiel 4                        # encoding: [0x7c,0x00,0x22,0x24]
-         tlbiel %r4
+# CHECK-BE: tlbiel 4                        # encoding: [0x7c,0x00,0x22,0x24]
+# CHECK-LE: tlbiel 4                        # encoding: [0x24,0x22,0x00,0x7c]
+            tlbiel %r4
 
-# CHECK: tlbie 4,0                       # encoding: [0x7c,0x00,0x22,0x64]
-         tlbie %r4, 0
+# CHECK-BE: tlbie 4,0                       # encoding: [0x7c,0x00,0x22,0x64]
+# CHECK-LE: tlbie 4,0                       # encoding: [0x64,0x22,0x00,0x7c]
+            tlbie %r4, 0
 
-# CHECK: tlbie 4,0                       # encoding: [0x7c,0x00,0x22,0x64]
-         tlbie %r4
+# CHECK-BE: tlbie 4,0                       # encoding: [0x7c,0x00,0x22,0x64]
+# CHECK-LE: tlbie 4,0                       # encoding: [0x64,0x22,0x00,0x7c]
+            tlbie %r4
 
diff --git a/test/MC/PowerPC/ppc64-encoding-ext.s b/test/MC/PowerPC/ppc64-encoding-ext.s
index a9c313a..2374675 100644
--- a/test/MC/PowerPC/ppc64-encoding-ext.s
+++ b/test/MC/PowerPC/ppc64-encoding-ext.s
@@ -1,2227 +1,3467 @@
 
-# RUN: llvm-mc -triple powerpc64-unknown-unknown --show-encoding %s | FileCheck %s
+# RUN: llvm-mc -triple powerpc64-unknown-unknown --show-encoding %s | FileCheck -check-prefix=CHECK-BE %s
+# RUN: llvm-mc -triple powerpc64le-unknown-unknown --show-encoding %s | FileCheck -check-prefix=CHECK-LE %s
 
 # Condition register bit symbols
 
-# CHECK: beqlr 0                         # encoding: [0x4d,0x82,0x00,0x20]
-         beqlr cr0
-# CHECK: beqlr 1                         # encoding: [0x4d,0x86,0x00,0x20]
-         beqlr cr1
-# CHECK: beqlr 2                         # encoding: [0x4d,0x8a,0x00,0x20]
-         beqlr cr2
-# CHECK: beqlr 3                         # encoding: [0x4d,0x8e,0x00,0x20]
-         beqlr cr3
-# CHECK: beqlr 4                         # encoding: [0x4d,0x92,0x00,0x20]
-         beqlr cr4
-# CHECK: beqlr 5                         # encoding: [0x4d,0x96,0x00,0x20]
-         beqlr cr5
-# CHECK: beqlr 6                         # encoding: [0x4d,0x9a,0x00,0x20]
-         beqlr cr6
-# CHECK: beqlr 7                         # encoding: [0x4d,0x9e,0x00,0x20]
-         beqlr cr7
-
-# CHECK: bclr 12, 0, 0                   # encoding: [0x4d,0x80,0x00,0x20]
-         btlr 4*cr0+lt
-# CHECK: bclr 12, 1, 0                   # encoding: [0x4d,0x81,0x00,0x20]
-         btlr 4*cr0+gt
-# CHECK: bclr 12, 2, 0                   # encoding: [0x4d,0x82,0x00,0x20]
-         btlr 4*cr0+eq
-# CHECK: bclr 12, 3, 0                   # encoding: [0x4d,0x83,0x00,0x20]
-         btlr 4*cr0+so
-# CHECK: bclr 12, 3, 0                   # encoding: [0x4d,0x83,0x00,0x20]
-         btlr 4*cr0+un
-# CHECK: bclr 12, 4, 0                   # encoding: [0x4d,0x84,0x00,0x20]
-         btlr 4*cr1+lt
-# CHECK: bclr 12, 5, 0                   # encoding: [0x4d,0x85,0x00,0x20]
-         btlr 4*cr1+gt
-# CHECK: bclr 12, 6, 0                   # encoding: [0x4d,0x86,0x00,0x20]
-         btlr 4*cr1+eq
-# CHECK: bclr 12, 7, 0                   # encoding: [0x4d,0x87,0x00,0x20]
-         btlr 4*cr1+so
-# CHECK: bclr 12, 7, 0                   # encoding: [0x4d,0x87,0x00,0x20]
-         btlr 4*cr1+un
-# CHECK: bclr 12, 8, 0                   # encoding: [0x4d,0x88,0x00,0x20]
-         btlr 4*cr2+lt
-# CHECK: bclr 12, 9, 0                   # encoding: [0x4d,0x89,0x00,0x20]
-         btlr 4*cr2+gt
-# CHECK: bclr 12, 10, 0                  # encoding: [0x4d,0x8a,0x00,0x20]
-         btlr 4*cr2+eq
-# CHECK: bclr 12, 11, 0                  # encoding: [0x4d,0x8b,0x00,0x20]
-         btlr 4*cr2+so
-# CHECK: bclr 12, 11, 0                  # encoding: [0x4d,0x8b,0x00,0x20]
-         btlr 4*cr2+un
-# CHECK: bclr 12, 12, 0                  # encoding: [0x4d,0x8c,0x00,0x20]
-         btlr 4*cr3+lt
-# CHECK: bclr 12, 13, 0                  # encoding: [0x4d,0x8d,0x00,0x20]
-         btlr 4*cr3+gt
-# CHECK: bclr 12, 14, 0                  # encoding: [0x4d,0x8e,0x00,0x20]
-         btlr 4*cr3+eq
-# CHECK: bclr 12, 15, 0                  # encoding: [0x4d,0x8f,0x00,0x20]
-         btlr 4*cr3+so
-# CHECK: bclr 12, 15, 0                  # encoding: [0x4d,0x8f,0x00,0x20]
-         btlr 4*cr3+un
-# CHECK: bclr 12, 16, 0                  # encoding: [0x4d,0x90,0x00,0x20]
-         btlr 4*cr4+lt
-# CHECK: bclr 12, 17, 0                  # encoding: [0x4d,0x91,0x00,0x20]
-         btlr 4*cr4+gt
-# CHECK: bclr 12, 18, 0                  # encoding: [0x4d,0x92,0x00,0x20]
-         btlr 4*cr4+eq
-# CHECK: bclr 12, 19, 0                  # encoding: [0x4d,0x93,0x00,0x20]
-         btlr 4*cr4+so
-# CHECK: bclr 12, 19, 0                  # encoding: [0x4d,0x93,0x00,0x20]
-         btlr 4*cr4+un
-# CHECK: bclr 12, 20, 0                  # encoding: [0x4d,0x94,0x00,0x20]
-         btlr 4*cr5+lt
-# CHECK: bclr 12, 21, 0                  # encoding: [0x4d,0x95,0x00,0x20]
-         btlr 4*cr5+gt
-# CHECK: bclr 12, 22, 0                  # encoding: [0x4d,0x96,0x00,0x20]
-         btlr 4*cr5+eq
-# CHECK: bclr 12, 23, 0                  # encoding: [0x4d,0x97,0x00,0x20]
-         btlr 4*cr5+so
-# CHECK: bclr 12, 23, 0                  # encoding: [0x4d,0x97,0x00,0x20]
-         btlr 4*cr5+un
-# CHECK: bclr 12, 24, 0                  # encoding: [0x4d,0x98,0x00,0x20]
-         btlr 4*cr6+lt
-# CHECK: bclr 12, 25, 0                  # encoding: [0x4d,0x99,0x00,0x20]
-         btlr 4*cr6+gt
-# CHECK: bclr 12, 26, 0                  # encoding: [0x4d,0x9a,0x00,0x20]
-         btlr 4*cr6+eq
-# CHECK: bclr 12, 27, 0                  # encoding: [0x4d,0x9b,0x00,0x20]
-         btlr 4*cr6+so
-# CHECK: bclr 12, 27, 0                  # encoding: [0x4d,0x9b,0x00,0x20]
-         btlr 4*cr6+un
-# CHECK: bclr 12, 28, 0                  # encoding: [0x4d,0x9c,0x00,0x20]
-         btlr 4*cr7+lt
-# CHECK: bclr 12, 29, 0                  # encoding: [0x4d,0x9d,0x00,0x20]
-         btlr 4*cr7+gt
-# CHECK: bclr 12, 30, 0                  # encoding: [0x4d,0x9e,0x00,0x20]
-         btlr 4*cr7+eq
-# CHECK: bclr 12, 31, 0                  # encoding: [0x4d,0x9f,0x00,0x20]
-         btlr 4*cr7+so
-# CHECK: bclr 12, 31, 0                  # encoding: [0x4d,0x9f,0x00,0x20]
-         btlr 4*cr7+un
+# CHECK-BE: beqlr 0                         # encoding: [0x4d,0x82,0x00,0x20]
+# CHECK-LE: beqlr 0                         # encoding: [0x20,0x00,0x82,0x4d]
+            beqlr cr0
+# CHECK-BE: beqlr 1                         # encoding: [0x4d,0x86,0x00,0x20]
+# CHECK-LE: beqlr 1                         # encoding: [0x20,0x00,0x86,0x4d]
+            beqlr cr1
+# CHECK-BE: beqlr 2                         # encoding: [0x4d,0x8a,0x00,0x20]
+# CHECK-LE: beqlr 2                         # encoding: [0x20,0x00,0x8a,0x4d]
+            beqlr cr2
+# CHECK-BE: beqlr 3                         # encoding: [0x4d,0x8e,0x00,0x20]
+# CHECK-LE: beqlr 3                         # encoding: [0x20,0x00,0x8e,0x4d]
+            beqlr cr3
+# CHECK-BE: beqlr 4                         # encoding: [0x4d,0x92,0x00,0x20]
+# CHECK-LE: beqlr 4                         # encoding: [0x20,0x00,0x92,0x4d]
+            beqlr cr4
+# CHECK-BE: beqlr 5                         # encoding: [0x4d,0x96,0x00,0x20]
+# CHECK-LE: beqlr 5                         # encoding: [0x20,0x00,0x96,0x4d]
+            beqlr cr5
+# CHECK-BE: beqlr 6                         # encoding: [0x4d,0x9a,0x00,0x20]
+# CHECK-LE: beqlr 6                         # encoding: [0x20,0x00,0x9a,0x4d]
+            beqlr cr6
+# CHECK-BE: beqlr 7                         # encoding: [0x4d,0x9e,0x00,0x20]
+# CHECK-LE: beqlr 7                         # encoding: [0x20,0x00,0x9e,0x4d]
+            beqlr cr7
+
+# CHECK-BE: bclr 12, 0, 0                   # encoding: [0x4d,0x80,0x00,0x20]
+# CHECK-LE: bclr 12, 0, 0                   # encoding: [0x20,0x00,0x80,0x4d]
+            btlr 4*cr0+lt
+# CHECK-BE: bclr 12, 1, 0                   # encoding: [0x4d,0x81,0x00,0x20]
+# CHECK-LE: bclr 12, 1, 0                   # encoding: [0x20,0x00,0x81,0x4d]
+            btlr 4*cr0+gt
+# CHECK-BE: bclr 12, 2, 0                   # encoding: [0x4d,0x82,0x00,0x20]
+# CHECK-LE: bclr 12, 2, 0                   # encoding: [0x20,0x00,0x82,0x4d]
+            btlr 4*cr0+eq
+# CHECK-BE: bclr 12, 3, 0                   # encoding: [0x4d,0x83,0x00,0x20]
+# CHECK-LE: bclr 12, 3, 0                   # encoding: [0x20,0x00,0x83,0x4d]
+            btlr 4*cr0+so
+# CHECK-BE: bclr 12, 3, 0                   # encoding: [0x4d,0x83,0x00,0x20]
+# CHECK-LE: bclr 12, 3, 0                   # encoding: [0x20,0x00,0x83,0x4d]
+            btlr 4*cr0+un
+# CHECK-BE: bclr 12, 4, 0                   # encoding: [0x4d,0x84,0x00,0x20]
+# CHECK-LE: bclr 12, 4, 0                   # encoding: [0x20,0x00,0x84,0x4d]
+            btlr 4*cr1+lt
+# CHECK-BE: bclr 12, 5, 0                   # encoding: [0x4d,0x85,0x00,0x20]
+# CHECK-LE: bclr 12, 5, 0                   # encoding: [0x20,0x00,0x85,0x4d]
+            btlr 4*cr1+gt
+# CHECK-BE: bclr 12, 6, 0                   # encoding: [0x4d,0x86,0x00,0x20]
+# CHECK-LE: bclr 12, 6, 0                   # encoding: [0x20,0x00,0x86,0x4d]
+            btlr 4*cr1+eq
+# CHECK-BE: bclr 12, 7, 0                   # encoding: [0x4d,0x87,0x00,0x20]
+# CHECK-LE: bclr 12, 7, 0                   # encoding: [0x20,0x00,0x87,0x4d]
+            btlr 4*cr1+so
+# CHECK-BE: bclr 12, 7, 0                   # encoding: [0x4d,0x87,0x00,0x20]
+# CHECK-LE: bclr 12, 7, 0                   # encoding: [0x20,0x00,0x87,0x4d]
+            btlr 4*cr1+un
+# CHECK-BE: bclr 12, 8, 0                   # encoding: [0x4d,0x88,0x00,0x20]
+# CHECK-LE: bclr 12, 8, 0                   # encoding: [0x20,0x00,0x88,0x4d]
+            btlr 4*cr2+lt
+# CHECK-BE: bclr 12, 9, 0                   # encoding: [0x4d,0x89,0x00,0x20]
+# CHECK-LE: bclr 12, 9, 0                   # encoding: [0x20,0x00,0x89,0x4d]
+            btlr 4*cr2+gt
+# CHECK-BE: bclr 12, 10, 0                  # encoding: [0x4d,0x8a,0x00,0x20]
+# CHECK-LE: bclr 12, 10, 0                  # encoding: [0x20,0x00,0x8a,0x4d]
+            btlr 4*cr2+eq
+# CHECK-BE: bclr 12, 11, 0                  # encoding: [0x4d,0x8b,0x00,0x20]
+# CHECK-LE: bclr 12, 11, 0                  # encoding: [0x20,0x00,0x8b,0x4d]
+            btlr 4*cr2+so
+# CHECK-BE: bclr 12, 11, 0                  # encoding: [0x4d,0x8b,0x00,0x20]
+# CHECK-LE: bclr 12, 11, 0                  # encoding: [0x20,0x00,0x8b,0x4d]
+            btlr 4*cr2+un
+# CHECK-BE: bclr 12, 12, 0                  # encoding: [0x4d,0x8c,0x00,0x20]
+# CHECK-LE: bclr 12, 12, 0                  # encoding: [0x20,0x00,0x8c,0x4d]
+            btlr 4*cr3+lt
+# CHECK-BE: bclr 12, 13, 0                  # encoding: [0x4d,0x8d,0x00,0x20]
+# CHECK-LE: bclr 12, 13, 0                  # encoding: [0x20,0x00,0x8d,0x4d]
+            btlr 4*cr3+gt
+# CHECK-BE: bclr 12, 14, 0                  # encoding: [0x4d,0x8e,0x00,0x20]
+# CHECK-LE: bclr 12, 14, 0                  # encoding: [0x20,0x00,0x8e,0x4d]
+            btlr 4*cr3+eq
+# CHECK-BE: bclr 12, 15, 0                  # encoding: [0x4d,0x8f,0x00,0x20]
+# CHECK-LE: bclr 12, 15, 0                  # encoding: [0x20,0x00,0x8f,0x4d]
+            btlr 4*cr3+so
+# CHECK-BE: bclr 12, 15, 0                  # encoding: [0x4d,0x8f,0x00,0x20]
+# CHECK-LE: bclr 12, 15, 0                  # encoding: [0x20,0x00,0x8f,0x4d]
+            btlr 4*cr3+un
+# CHECK-BE: bclr 12, 16, 0                  # encoding: [0x4d,0x90,0x00,0x20]
+# CHECK-LE: bclr 12, 16, 0                  # encoding: [0x20,0x00,0x90,0x4d]
+            btlr 4*cr4+lt
+# CHECK-BE: bclr 12, 17, 0                  # encoding: [0x4d,0x91,0x00,0x20]
+# CHECK-LE: bclr 12, 17, 0                  # encoding: [0x20,0x00,0x91,0x4d]
+            btlr 4*cr4+gt
+# CHECK-BE: bclr 12, 18, 0                  # encoding: [0x4d,0x92,0x00,0x20]
+# CHECK-LE: bclr 12, 18, 0                  # encoding: [0x20,0x00,0x92,0x4d]
+            btlr 4*cr4+eq
+# CHECK-BE: bclr 12, 19, 0                  # encoding: [0x4d,0x93,0x00,0x20]
+# CHECK-LE: bclr 12, 19, 0                  # encoding: [0x20,0x00,0x93,0x4d]
+            btlr 4*cr4+so
+# CHECK-BE: bclr 12, 19, 0                  # encoding: [0x4d,0x93,0x00,0x20]
+# CHECK-LE: bclr 12, 19, 0                  # encoding: [0x20,0x00,0x93,0x4d]
+            btlr 4*cr4+un
+# CHECK-BE: bclr 12, 20, 0                  # encoding: [0x4d,0x94,0x00,0x20]
+# CHECK-LE: bclr 12, 20, 0                  # encoding: [0x20,0x00,0x94,0x4d]
+            btlr 4*cr5+lt
+# CHECK-BE: bclr 12, 21, 0                  # encoding: [0x4d,0x95,0x00,0x20]
+# CHECK-LE: bclr 12, 21, 0                  # encoding: [0x20,0x00,0x95,0x4d]
+            btlr 4*cr5+gt
+# CHECK-BE: bclr 12, 22, 0                  # encoding: [0x4d,0x96,0x00,0x20]
+# CHECK-LE: bclr 12, 22, 0                  # encoding: [0x20,0x00,0x96,0x4d]
+            btlr 4*cr5+eq
+# CHECK-BE: bclr 12, 23, 0                  # encoding: [0x4d,0x97,0x00,0x20]
+# CHECK-LE: bclr 12, 23, 0                  # encoding: [0x20,0x00,0x97,0x4d]
+            btlr 4*cr5+so
+# CHECK-BE: bclr 12, 23, 0                  # encoding: [0x4d,0x97,0x00,0x20]
+# CHECK-LE: bclr 12, 23, 0                  # encoding: [0x20,0x00,0x97,0x4d]
+            btlr 4*cr5+un
+# CHECK-BE: bclr 12, 24, 0                  # encoding: [0x4d,0x98,0x00,0x20]
+# CHECK-LE: bclr 12, 24, 0                  # encoding: [0x20,0x00,0x98,0x4d]
+            btlr 4*cr6+lt
+# CHECK-BE: bclr 12, 25, 0                  # encoding: [0x4d,0x99,0x00,0x20]
+# CHECK-LE: bclr 12, 25, 0                  # encoding: [0x20,0x00,0x99,0x4d]
+            btlr 4*cr6+gt
+# CHECK-BE: bclr 12, 26, 0                  # encoding: [0x4d,0x9a,0x00,0x20]
+# CHECK-LE: bclr 12, 26, 0                  # encoding: [0x20,0x00,0x9a,0x4d]
+            btlr 4*cr6+eq
+# CHECK-BE: bclr 12, 27, 0                  # encoding: [0x4d,0x9b,0x00,0x20]
+# CHECK-LE: bclr 12, 27, 0                  # encoding: [0x20,0x00,0x9b,0x4d]
+            btlr 4*cr6+so
+# CHECK-BE: bclr 12, 27, 0                  # encoding: [0x4d,0x9b,0x00,0x20]
+# CHECK-LE: bclr 12, 27, 0                  # encoding: [0x20,0x00,0x9b,0x4d]
+            btlr 4*cr6+un
+# CHECK-BE: bclr 12, 28, 0                  # encoding: [0x4d,0x9c,0x00,0x20]
+# CHECK-LE: bclr 12, 28, 0                  # encoding: [0x20,0x00,0x9c,0x4d]
+            btlr 4*cr7+lt
+# CHECK-BE: bclr 12, 29, 0                  # encoding: [0x4d,0x9d,0x00,0x20]
+# CHECK-LE: bclr 12, 29, 0                  # encoding: [0x20,0x00,0x9d,0x4d]
+            btlr 4*cr7+gt
+# CHECK-BE: bclr 12, 30, 0                  # encoding: [0x4d,0x9e,0x00,0x20]
+# CHECK-LE: bclr 12, 30, 0                  # encoding: [0x20,0x00,0x9e,0x4d]
+            btlr 4*cr7+eq
+# CHECK-BE: bclr 12, 31, 0                  # encoding: [0x4d,0x9f,0x00,0x20]
+# CHECK-LE: bclr 12, 31, 0                  # encoding: [0x20,0x00,0x9f,0x4d]
+            btlr 4*cr7+so
+# CHECK-BE: bclr 12, 31, 0                  # encoding: [0x4d,0x9f,0x00,0x20]
+# CHECK-LE: bclr 12, 31, 0                  # encoding: [0x20,0x00,0x9f,0x4d]
+            btlr 4*cr7+un
 
 # Branch mnemonics
 
-# CHECK: blr                             # encoding: [0x4e,0x80,0x00,0x20]
-         blr
-# CHECK: bctr                            # encoding: [0x4e,0x80,0x04,0x20]
-         bctr
-# CHECK: blrl                            # encoding: [0x4e,0x80,0x00,0x21]
-         blrl
-# CHECK: bctrl                           # encoding: [0x4e,0x80,0x04,0x21]
-         bctrl
-
-# CHECK: bc 12, 2, target                # encoding: [0x41,0x82,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bt 2, target
-# CHECK: bca 12, 2, target               # encoding: [0x41,0x82,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bta 2, target
-# CHECK: bclr 12, 2, 0                   # encoding: [0x4d,0x82,0x00,0x20]
-         btlr 2
-# CHECK: bcctr 12, 2, 0                  # encoding: [0x4d,0x82,0x04,0x20]
-         btctr 2
-# CHECK: bcl 12, 2, target               # encoding: [0x41,0x82,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         btl 2, target
-# CHECK: bcla 12, 2, target              # encoding: [0x41,0x82,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         btla 2, target
-# CHECK: bclrl 12, 2, 0                  # encoding: [0x4d,0x82,0x00,0x21]
-         btlrl 2
-# CHECK: bcctrl 12, 2, 0                 # encoding: [0x4d,0x82,0x04,0x21]
-         btctrl 2
-
-# CHECK: bc 15, 2, target                # encoding: [0x41,0xe2,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bt+ 2, target
-# CHECK: bca 15, 2, target               # encoding: [0x41,0xe2,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bta+ 2, target
-# CHECK: bclr 15, 2, 0                   # encoding: [0x4d,0xe2,0x00,0x20]
-         btlr+ 2
-# CHECK: bcctr 15, 2, 0                  # encoding: [0x4d,0xe2,0x04,0x20]
-         btctr+ 2
-# CHECK: bcl 15, 2, target               # encoding: [0x41,0xe2,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         btl+ 2, target
-# CHECK: bcla 15, 2, target              # encoding: [0x41,0xe2,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         btla+ 2, target
-# CHECK: bclrl 15, 2, 0                  # encoding: [0x4d,0xe2,0x00,0x21]
-         btlrl+ 2
-# CHECK: bcctrl 15, 2, 0                 # encoding: [0x4d,0xe2,0x04,0x21]
-         btctrl+ 2
-
-# CHECK: bc 14, 2, target                # encoding: [0x41,0xc2,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bt- 2, target
-# CHECK: bca 14, 2, target               # encoding: [0x41,0xc2,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bta- 2, target
-# CHECK: bclr 14, 2, 0                   # encoding: [0x4d,0xc2,0x00,0x20]
-         btlr- 2
-# CHECK: bcctr 14, 2, 0                  # encoding: [0x4d,0xc2,0x04,0x20]
-         btctr- 2
-# CHECK: bcl 14, 2, target               # encoding: [0x41,0xc2,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         btl- 2, target
-# CHECK: bcla 14, 2, target              # encoding: [0x41,0xc2,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         btla- 2, target
-# CHECK: bclrl 14, 2, 0                  # encoding: [0x4d,0xc2,0x00,0x21]
-         btlrl- 2
-# CHECK: bcctrl 14, 2, 0                 # encoding: [0x4d,0xc2,0x04,0x21]
-         btctrl- 2
-
-# CHECK: bc 4, 2, target                 # encoding: [0x40,0x82,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bf 2, target
-# CHECK: bca 4, 2, target                # encoding: [0x40,0x82,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bfa 2, target
-# CHECK: bclr 4, 2, 0                    # encoding: [0x4c,0x82,0x00,0x20]
-         bflr 2
-# CHECK: bcctr 4, 2, 0                   # encoding: [0x4c,0x82,0x04,0x20]
-         bfctr 2
-# CHECK: bcl 4, 2, target                # encoding: [0x40,0x82,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bfl 2, target
-# CHECK: bcla 4, 2, target               # encoding: [0x40,0x82,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bfla 2, target
-# CHECK: bclrl 4, 2, 0                   # encoding: [0x4c,0x82,0x00,0x21]
-         bflrl 2
-# CHECK: bcctrl 4, 2, 0                  # encoding: [0x4c,0x82,0x04,0x21]
-         bfctrl 2
-
-# CHECK: bc 7, 2, target                 # encoding: [0x40,0xe2,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bf+ 2, target
-# CHECK: bca 7, 2, target                # encoding: [0x40,0xe2,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bfa+ 2, target
-# CHECK: bclr 7, 2, 0                    # encoding: [0x4c,0xe2,0x00,0x20]
-         bflr+ 2
-# CHECK: bcctr 7, 2, 0                   # encoding: [0x4c,0xe2,0x04,0x20]
-         bfctr+ 2
-# CHECK: bcl 7, 2, target                # encoding: [0x40,0xe2,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bfl+ 2, target
-# CHECK: bcla 7, 2, target               # encoding: [0x40,0xe2,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bfla+ 2, target
-# CHECK: bclrl 7, 2, 0                   # encoding: [0x4c,0xe2,0x00,0x21]
-         bflrl+ 2
-# CHECK: bcctrl 7, 2, 0                  # encoding: [0x4c,0xe2,0x04,0x21]
-         bfctrl+ 2
-
-# CHECK: bc 6, 2, target                 # encoding: [0x40,0xc2,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bf- 2, target
-# CHECK: bca 6, 2, target                # encoding: [0x40,0xc2,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bfa- 2, target
-# CHECK: bclr 6, 2, 0                    # encoding: [0x4c,0xc2,0x00,0x20]
-         bflr- 2
-# CHECK: bcctr 6, 2, 0                   # encoding: [0x4c,0xc2,0x04,0x20]
-         bfctr- 2
-# CHECK: bcl 6, 2, target                # encoding: [0x40,0xc2,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bfl- 2, target
-# CHECK: bcla 6, 2, target               # encoding: [0x40,0xc2,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bfla- 2, target
-# CHECK: bclrl 6, 2, 0                   # encoding: [0x4c,0xc2,0x00,0x21]
-         bflrl- 2
-# CHECK: bcctrl 6, 2, 0                  # encoding: [0x4c,0xc2,0x04,0x21]
-         bfctrl- 2
-
-# CHECK: bdnz target                     # encoding: [0x42,0x00,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bdnz target
-# CHECK: bdnza target                    # encoding: [0x42,0x00,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bdnza target
-# CHECK: bdnzlr                          # encoding: [0x4e,0x00,0x00,0x20]
-         bdnzlr
-# CHECK: bdnzl target                    # encoding: [0x42,0x00,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bdnzl target
-# CHECK: bdnzla target                   # encoding: [0x42,0x00,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bdnzla target
-# CHECK: bdnzlrl                         # encoding: [0x4e,0x00,0x00,0x21]
-         bdnzlrl
-
-# CHECK: bdnz+ target                    # encoding: [0x43,0x20,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bdnz+ target
-# CHECK: bdnza+ target                   # encoding: [0x43,0x20,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bdnza+ target
-# CHECK: bdnzlr+                         # encoding: [0x4f,0x20,0x00,0x20]
-         bdnzlr+
-# CHECK: bdnzl+ target                   # encoding: [0x43,0x20,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bdnzl+ target
-# CHECK: bdnzla+ target                  # encoding: [0x43,0x20,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bdnzla+ target
-# CHECK: bdnzlrl+                        # encoding: [0x4f,0x20,0x00,0x21]
-         bdnzlrl+
-
-# CHECK: bdnz- target                    # encoding: [0x43,0x00,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bdnz- target
-# CHECK: bdnza- target                   # encoding: [0x43,0x00,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bdnza- target
-# CHECK: bdnzlr-                         # encoding: [0x4f,0x00,0x00,0x20]
-         bdnzlr-
-# CHECK: bdnzl- target                   # encoding: [0x43,0x00,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bdnzl- target
-# CHECK: bdnzla- target                  # encoding: [0x43,0x00,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bdnzla- target
-# CHECK: bdnzlrl-                        # encoding: [0x4f,0x00,0x00,0x21]
-         bdnzlrl-
-
-# CHECK: bc 8, 2, target                 # encoding: [0x41,0x02,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bdnzt 2, target
-# CHECK: bca 8, 2, target                # encoding: [0x41,0x02,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bdnzta 2, target
-# CHECK: bclr 8, 2, 0                    # encoding: [0x4d,0x02,0x00,0x20]
-         bdnztlr 2
-# CHECK: bcl 8, 2, target                # encoding: [0x41,0x02,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bdnztl 2, target
-# CHECK: bcla 8, 2, target               # encoding: [0x41,0x02,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bdnztla 2, target
-# CHECK: bclrl 8, 2, 0                   # encoding: [0x4d,0x02,0x00,0x21]
-         bdnztlrl 2
-
-# CHECK: bc 0, 2, target                 # encoding: [0x40,0x02,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bdnzf 2, target
-# CHECK: bca 0, 2, target                # encoding: [0x40,0x02,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bdnzfa 2, target
-# CHECK: bclr 0, 2, 0                    # encoding: [0x4c,0x02,0x00,0x20]
-         bdnzflr 2
-# CHECK: bcl 0, 2, target                # encoding: [0x40,0x02,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bdnzfl 2, target
-# CHECK: bcla 0, 2, target               # encoding: [0x40,0x02,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bdnzfla 2, target
-# CHECK: bclrl 0, 2, 0                   # encoding: [0x4c,0x02,0x00,0x21]
-         bdnzflrl 2
-
-# CHECK: bdz target                      # encoding: [0x42,0x40,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bdz target
-# CHECK: bdza target                     # encoding: [0x42,0x40,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bdza target
-# CHECK: bdzlr                           # encoding: [0x4e,0x40,0x00,0x20]
-         bdzlr
-# CHECK: bdzl target                     # encoding: [0x42,0x40,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bdzl target
-# CHECK: bdzla target                    # encoding: [0x42,0x40,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bdzla target
-# CHECK: bdzlrl                          # encoding: [0x4e,0x40,0x00,0x21]
-         bdzlrl
-
-# CHECK: bdz+ target                     # encoding: [0x43,0x60,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bdz+ target
-# CHECK: bdza+ target                    # encoding: [0x43,0x60,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bdza+ target
-# CHECK: bdzlr+                          # encoding: [0x4f,0x60,0x00,0x20]
-         bdzlr+
-# CHECK: bdzl+ target                    # encoding: [0x43,0x60,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bdzl+ target
-# CHECK: bdzla+ target                   # encoding: [0x43,0x60,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bdzla+ target
-# CHECK: bdzlrl+                         # encoding: [0x4f,0x60,0x00,0x21]
-         bdzlrl+
-
-# CHECK: bdz- target                     # encoding: [0x43,0x40,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bdz- target
-# CHECK: bdza- target                    # encoding: [0x43,0x40,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bdza- target
-# CHECK: bdzlr-                          # encoding: [0x4f,0x40,0x00,0x20]
-         bdzlr-
-# CHECK: bdzl- target                    # encoding: [0x43,0x40,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bdzl- target
-# CHECK: bdzla- target                   # encoding: [0x43,0x40,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bdzla- target
-# CHECK: bdzlrl-                         # encoding: [0x4f,0x40,0x00,0x21]
-         bdzlrl-
-
-# CHECK: bc 10, 2, target                # encoding: [0x41,0x42,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bdzt 2, target
-# CHECK: bca 10, 2, target               # encoding: [0x41,0x42,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bdzta 2, target
-# CHECK: bclr 10, 2, 0                   # encoding: [0x4d,0x42,0x00,0x20]
-         bdztlr 2
-# CHECK: bcl 10, 2, target               # encoding: [0x41,0x42,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bdztl 2, target
-# CHECK: bcla 10, 2, target              # encoding: [0x41,0x42,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bdztla 2, target
-# CHECK: bclrl 10, 2, 0                  # encoding: [0x4d,0x42,0x00,0x21]
-         bdztlrl 2
-
-# CHECK: bc 2, 2, target                 # encoding: [0x40,0x42,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bdzf 2, target
-# CHECK: bca 2, 2, target                # encoding: [0x40,0x42,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bdzfa 2, target
-# CHECK: bclr 2, 2, 0                    # encoding: [0x4c,0x42,0x00,0x20]
-         bdzflr 2
-# CHECK: bcl 2, 2, target                # encoding: [0x40,0x42,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bdzfl 2, target
-# CHECK: bcla 2, 2, target               # encoding: [0x40,0x42,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bdzfla 2, target
-# CHECK: bclrl 2, 2, 0                   # encoding: [0x4c,0x42,0x00,0x21]
-         bdzflrl 2
-
-# CHECK: blt 2, target                   # encoding: [0x41,0x88,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         blt 2, target
-# CHECK: blt 0, target                   # encoding: [0x41,0x80,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         blt target
-# CHECK: blta 2, target                  # encoding: [0x41,0x88,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         blta 2, target
-# CHECK: blta 0, target                  # encoding: [0x41,0x80,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         blta target
-# CHECK: bltlr 2                         # encoding: [0x4d,0x88,0x00,0x20]
-         bltlr 2
-# CHECK: bltlr 0                         # encoding: [0x4d,0x80,0x00,0x20]
-         bltlr
-# CHECK: bltctr 2                        # encoding: [0x4d,0x88,0x04,0x20]
-         bltctr 2
-# CHECK: bltctr 0                        # encoding: [0x4d,0x80,0x04,0x20]
-         bltctr
-# CHECK: bltl 2, target                  # encoding: [0x41,0x88,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bltl 2, target
-# CHECK: bltl 0, target                  # encoding: [0x41,0x80,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bltl target
-# CHECK: bltla 2, target                 # encoding: [0x41,0x88,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bltla 2, target
-# CHECK: bltla 0, target                 # encoding: [0x41,0x80,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bltla target
-# CHECK: bltlrl 2                        # encoding: [0x4d,0x88,0x00,0x21]
-         bltlrl 2
-# CHECK: bltlrl 0                        # encoding: [0x4d,0x80,0x00,0x21]
-         bltlrl
-# CHECK: bltctrl 2                       # encoding: [0x4d,0x88,0x04,0x21]
-         bltctrl 2
-# CHECK: bltctrl 0                       # encoding: [0x4d,0x80,0x04,0x21]
-         bltctrl
-
-# CHECK: blt+ 2, target                  # encoding: [0x41,0xe8,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         blt+ 2, target
-# CHECK: blt+ 0, target                  # encoding: [0x41,0xe0,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         blt+ target
-# CHECK: blta+ 2, target                 # encoding: [0x41,0xe8,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         blta+ 2, target
-# CHECK: blta+ 0, target                 # encoding: [0x41,0xe0,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         blta+ target
-# CHECK: bltlr+ 2                        # encoding: [0x4d,0xe8,0x00,0x20]
-         bltlr+ 2
-# CHECK: bltlr+ 0                        # encoding: [0x4d,0xe0,0x00,0x20]
-         bltlr+
-# CHECK: bltctr+ 2                       # encoding: [0x4d,0xe8,0x04,0x20]
-         bltctr+ 2
-# CHECK: bltctr+ 0                       # encoding: [0x4d,0xe0,0x04,0x20]
-         bltctr+
-# CHECK: bltl+ 2, target                 # encoding: [0x41,0xe8,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bltl+ 2, target
-# CHECK: bltl+ 0, target                 # encoding: [0x41,0xe0,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bltl+ target
-# CHECK: bltla+ 2, target                # encoding: [0x41,0xe8,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bltla+ 2, target
-# CHECK: bltla+ 0, target                # encoding: [0x41,0xe0,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bltla+ target
-# CHECK: bltlrl+ 2                       # encoding: [0x4d,0xe8,0x00,0x21]
-         bltlrl+ 2
-# CHECK: bltlrl+ 0                       # encoding: [0x4d,0xe0,0x00,0x21]
-         bltlrl+
-# CHECK: bltctrl+ 2                      # encoding: [0x4d,0xe8,0x04,0x21]
-         bltctrl+ 2
-# CHECK: bltctrl+ 0                      # encoding: [0x4d,0xe0,0x04,0x21]
-         bltctrl+
-
-# CHECK: blt- 2, target                  # encoding: [0x41,0xc8,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         blt- 2, target
-# CHECK: blt- 0, target                  # encoding: [0x41,0xc0,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         blt- target
-# CHECK: blta- 2, target                 # encoding: [0x41,0xc8,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         blta- 2, target
-# CHECK: blta- 0, target                 # encoding: [0x41,0xc0,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         blta- target
-# CHECK: bltlr- 2                        # encoding: [0x4d,0xc8,0x00,0x20]
-         bltlr- 2
-# CHECK: bltlr- 0                        # encoding: [0x4d,0xc0,0x00,0x20]
-         bltlr-
-# CHECK: bltctr- 2                       # encoding: [0x4d,0xc8,0x04,0x20]
-         bltctr- 2
-# CHECK: bltctr- 0                       # encoding: [0x4d,0xc0,0x04,0x20]
-         bltctr-
-# CHECK: bltl- 2, target                 # encoding: [0x41,0xc8,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bltl- 2, target
-# CHECK: bltl- 0, target                 # encoding: [0x41,0xc0,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bltl- target
-# CHECK: bltla- 2, target                # encoding: [0x41,0xc8,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bltla- 2, target
-# CHECK: bltla- 0, target                # encoding: [0x41,0xc0,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bltla- target
-# CHECK: bltlrl- 2                       # encoding: [0x4d,0xc8,0x00,0x21]
-         bltlrl- 2
-# CHECK: bltlrl- 0                       # encoding: [0x4d,0xc0,0x00,0x21]
-         bltlrl-
-# CHECK: bltctrl- 2                      # encoding: [0x4d,0xc8,0x04,0x21]
-         bltctrl- 2
-# CHECK: bltctrl- 0                      # encoding: [0x4d,0xc0,0x04,0x21]
-         bltctrl-
-
-# CHECK: ble 2, target                   # encoding: [0x40,0x89,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         ble 2, target
-# CHECK: ble 0, target                   # encoding: [0x40,0x81,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         ble target
-# CHECK: blea 2, target                  # encoding: [0x40,0x89,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         blea 2, target
-# CHECK: blea 0, target                  # encoding: [0x40,0x81,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         blea target
-# CHECK: blelr 2                         # encoding: [0x4c,0x89,0x00,0x20]
-         blelr 2
-# CHECK: blelr 0                         # encoding: [0x4c,0x81,0x00,0x20]
-         blelr
-# CHECK: blectr 2                        # encoding: [0x4c,0x89,0x04,0x20]
-         blectr 2
-# CHECK: blectr 0                        # encoding: [0x4c,0x81,0x04,0x20]
-         blectr
-# CHECK: blel 2, target                  # encoding: [0x40,0x89,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         blel 2, target
-# CHECK: blel 0, target                  # encoding: [0x40,0x81,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         blel target
-# CHECK: blela 2, target                 # encoding: [0x40,0x89,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         blela 2, target
-# CHECK: blela 0, target                 # encoding: [0x40,0x81,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         blela target
-# CHECK: blelrl 2                        # encoding: [0x4c,0x89,0x00,0x21]
-         blelrl 2
-# CHECK: blelrl 0                        # encoding: [0x4c,0x81,0x00,0x21]
-         blelrl
-# CHECK: blectrl 2                       # encoding: [0x4c,0x89,0x04,0x21]
-         blectrl 2
-# CHECK: blectrl 0                       # encoding: [0x4c,0x81,0x04,0x21]
-         blectrl
-
-# CHECK: ble+ 2, target                  # encoding: [0x40,0xe9,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         ble+ 2, target
-# CHECK: ble+ 0, target                  # encoding: [0x40,0xe1,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         ble+ target
-# CHECK: blea+ 2, target                 # encoding: [0x40,0xe9,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         blea+ 2, target
-# CHECK: blea+ 0, target                 # encoding: [0x40,0xe1,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         blea+ target
-# CHECK: blelr+ 2                        # encoding: [0x4c,0xe9,0x00,0x20]
-         blelr+ 2
-# CHECK: blelr+ 0                        # encoding: [0x4c,0xe1,0x00,0x20]
-         blelr+
-# CHECK: blectr+ 2                       # encoding: [0x4c,0xe9,0x04,0x20]
-         blectr+ 2
-# CHECK: blectr+ 0                       # encoding: [0x4c,0xe1,0x04,0x20]
-         blectr+
-# CHECK: blel+ 2, target                 # encoding: [0x40,0xe9,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         blel+ 2, target
-# CHECK: blel+ 0, target                 # encoding: [0x40,0xe1,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         blel+ target
-# CHECK: blela+ 2, target                # encoding: [0x40,0xe9,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         blela+ 2, target
-# CHECK: blela+ 0, target                # encoding: [0x40,0xe1,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         blela+ target
-# CHECK: blelrl+ 2                       # encoding: [0x4c,0xe9,0x00,0x21]
-         blelrl+ 2
-# CHECK: blelrl+ 0                       # encoding: [0x4c,0xe1,0x00,0x21]
-         blelrl+
-# CHECK: blectrl+ 2                      # encoding: [0x4c,0xe9,0x04,0x21]
-         blectrl+ 2
-# CHECK: blectrl+ 0                      # encoding: [0x4c,0xe1,0x04,0x21]
-         blectrl+
-
-# CHECK: ble- 2, target                  # encoding: [0x40,0xc9,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         ble- 2, target
-# CHECK: ble- 0, target                  # encoding: [0x40,0xc1,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         ble- target
-# CHECK: blea- 2, target                 # encoding: [0x40,0xc9,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         blea- 2, target
-# CHECK: blea- 0, target                 # encoding: [0x40,0xc1,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         blea- target
-# CHECK: blelr- 2                        # encoding: [0x4c,0xc9,0x00,0x20]
-         blelr- 2
-# CHECK: blelr- 0                        # encoding: [0x4c,0xc1,0x00,0x20]
-         blelr-
-# CHECK: blectr- 2                       # encoding: [0x4c,0xc9,0x04,0x20]
-         blectr- 2
-# CHECK: blectr- 0                       # encoding: [0x4c,0xc1,0x04,0x20]
-         blectr-
-# CHECK: blel- 2, target                 # encoding: [0x40,0xc9,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         blel- 2, target
-# CHECK: blel- 0, target                 # encoding: [0x40,0xc1,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         blel- target
-# CHECK: blela- 2, target                # encoding: [0x40,0xc9,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         blela- 2, target
-# CHECK: blela- 0, target                # encoding: [0x40,0xc1,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         blela- target
-# CHECK: blelrl- 2                       # encoding: [0x4c,0xc9,0x00,0x21]
-         blelrl- 2
-# CHECK: blelrl- 0                       # encoding: [0x4c,0xc1,0x00,0x21]
-         blelrl-
-# CHECK: blectrl- 2                      # encoding: [0x4c,0xc9,0x04,0x21]
-         blectrl- 2
-# CHECK: blectrl- 0                      # encoding: [0x4c,0xc1,0x04,0x21]
-         blectrl-
-
-# CHECK: beq 2, target                   # encoding: [0x41,0x8a,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         beq 2, target
-# CHECK: beq 0, target                   # encoding: [0x41,0x82,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         beq target
-# CHECK: beqa 2, target                  # encoding: [0x41,0x8a,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         beqa 2, target
-# CHECK: beqa 0, target                  # encoding: [0x41,0x82,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         beqa target
-# CHECK: beqlr 2                         # encoding: [0x4d,0x8a,0x00,0x20]
-         beqlr 2
-# CHECK: beqlr 0                         # encoding: [0x4d,0x82,0x00,0x20]
-         beqlr
-# CHECK: beqctr 2                        # encoding: [0x4d,0x8a,0x04,0x20]
-         beqctr 2
-# CHECK: beqctr 0                        # encoding: [0x4d,0x82,0x04,0x20]
-         beqctr
-# CHECK: beql 2, target                  # encoding: [0x41,0x8a,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         beql 2, target
-# CHECK: beql 0, target                  # encoding: [0x41,0x82,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         beql target
-# CHECK: beqla 2, target                 # encoding: [0x41,0x8a,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         beqla 2, target
-# CHECK: beqla 0, target                 # encoding: [0x41,0x82,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         beqla target
-# CHECK: beqlrl 2                        # encoding: [0x4d,0x8a,0x00,0x21]
-         beqlrl 2
-# CHECK: beqlrl 0                        # encoding: [0x4d,0x82,0x00,0x21]
-         beqlrl
-# CHECK: beqctrl 2                       # encoding: [0x4d,0x8a,0x04,0x21]
-         beqctrl 2
-# CHECK: beqctrl 0                       # encoding: [0x4d,0x82,0x04,0x21]
-         beqctrl
-
-# CHECK: beq+ 2, target                  # encoding: [0x41,0xea,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         beq+ 2, target
-# CHECK: beq+ 0, target                  # encoding: [0x41,0xe2,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         beq+ target
-# CHECK: beqa+ 2, target                 # encoding: [0x41,0xea,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         beqa+ 2, target
-# CHECK: beqa+ 0, target                 # encoding: [0x41,0xe2,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         beqa+ target
-# CHECK: beqlr+ 2                        # encoding: [0x4d,0xea,0x00,0x20]
-         beqlr+ 2
-# CHECK: beqlr+ 0                        # encoding: [0x4d,0xe2,0x00,0x20]
-         beqlr+
-# CHECK: beqctr+ 2                       # encoding: [0x4d,0xea,0x04,0x20]
-         beqctr+ 2
-# CHECK: beqctr+ 0                       # encoding: [0x4d,0xe2,0x04,0x20]
-         beqctr+
-# CHECK: beql+ 2, target                 # encoding: [0x41,0xea,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         beql+ 2, target
-# CHECK: beql+ 0, target                 # encoding: [0x41,0xe2,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         beql+ target
-# CHECK: beqla+ 2, target                # encoding: [0x41,0xea,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         beqla+ 2, target
-# CHECK: beqla+ 0, target                # encoding: [0x41,0xe2,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         beqla+ target
-# CHECK: beqlrl+ 2                       # encoding: [0x4d,0xea,0x00,0x21]
-         beqlrl+ 2
-# CHECK: beqlrl+ 0                       # encoding: [0x4d,0xe2,0x00,0x21]
-         beqlrl+
-# CHECK: beqctrl+ 2                      # encoding: [0x4d,0xea,0x04,0x21]
-         beqctrl+ 2
-# CHECK: beqctrl+ 0                      # encoding: [0x4d,0xe2,0x04,0x21]
-         beqctrl+
-
-# CHECK: beq- 2, target                  # encoding: [0x41,0xca,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         beq- 2, target
-# CHECK: beq- 0, target                  # encoding: [0x41,0xc2,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         beq- target
-# CHECK: beqa- 2, target                 # encoding: [0x41,0xca,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         beqa- 2, target
-# CHECK: beqa- 0, target                 # encoding: [0x41,0xc2,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         beqa- target
-# CHECK: beqlr- 2                        # encoding: [0x4d,0xca,0x00,0x20]
-         beqlr- 2
-# CHECK: beqlr- 0                        # encoding: [0x4d,0xc2,0x00,0x20]
-         beqlr-
-# CHECK: beqctr- 2                       # encoding: [0x4d,0xca,0x04,0x20]
-         beqctr- 2
-# CHECK: beqctr- 0                       # encoding: [0x4d,0xc2,0x04,0x20]
-         beqctr-
-# CHECK: beql- 2, target                 # encoding: [0x41,0xca,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         beql- 2, target
-# CHECK: beql- 0, target                 # encoding: [0x41,0xc2,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         beql- target
-# CHECK: beqla- 2, target                # encoding: [0x41,0xca,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         beqla- 2, target
-# CHECK: beqla- 0, target                # encoding: [0x41,0xc2,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         beqla- target
-# CHECK: beqlrl- 2                       # encoding: [0x4d,0xca,0x00,0x21]
-         beqlrl- 2
-# CHECK: beqlrl- 0                       # encoding: [0x4d,0xc2,0x00,0x21]
-         beqlrl-
-# CHECK: beqctrl- 2                      # encoding: [0x4d,0xca,0x04,0x21]
-         beqctrl- 2
-# CHECK: beqctrl- 0                      # encoding: [0x4d,0xc2,0x04,0x21]
-         beqctrl-
-
-# CHECK: bge 2, target                   # encoding: [0x40,0x88,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bge 2, target
-# CHECK: bge 0, target                   # encoding: [0x40,0x80,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bge target
-# CHECK: bgea 2, target                  # encoding: [0x40,0x88,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bgea 2, target
-# CHECK: bgea 0, target                  # encoding: [0x40,0x80,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bgea target
-# CHECK: bgelr 2                         # encoding: [0x4c,0x88,0x00,0x20]
-         bgelr 2
-# CHECK: bgelr 0                         # encoding: [0x4c,0x80,0x00,0x20]
-         bgelr
-# CHECK: bgectr 2                        # encoding: [0x4c,0x88,0x04,0x20]
-         bgectr 2
-# CHECK: bgectr 0                        # encoding: [0x4c,0x80,0x04,0x20]
-         bgectr
-# CHECK: bgel 2, target                  # encoding: [0x40,0x88,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bgel 2, target
-# CHECK: bgel 0, target                  # encoding: [0x40,0x80,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bgel target
-# CHECK: bgela 2, target                 # encoding: [0x40,0x88,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bgela 2, target
-# CHECK: bgela 0, target                 # encoding: [0x40,0x80,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bgela target
-# CHECK: bgelrl 2                        # encoding: [0x4c,0x88,0x00,0x21]
-         bgelrl 2
-# CHECK: bgelrl 0                        # encoding: [0x4c,0x80,0x00,0x21]
-         bgelrl
-# CHECK: bgectrl 2                       # encoding: [0x4c,0x88,0x04,0x21]
-         bgectrl 2
-# CHECK: bgectrl 0                       # encoding: [0x4c,0x80,0x04,0x21]
-         bgectrl
-
-# CHECK: bge+ 2, target                   # encoding: [0x40,0xe8,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bge+ 2, target
-# CHECK: bge+ 0, target                   # encoding: [0x40,0xe0,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bge+ target
-# CHECK: bgea+ 2, target                  # encoding: [0x40,0xe8,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bgea+ 2, target
-# CHECK: bgea+ 0, target                  # encoding: [0x40,0xe0,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bgea+ target
-# CHECK: bgelr+ 2                         # encoding: [0x4c,0xe8,0x00,0x20]
-         bgelr+ 2
-# CHECK: bgelr+ 0                         # encoding: [0x4c,0xe0,0x00,0x20]
-         bgelr+
-# CHECK: bgectr+ 2                        # encoding: [0x4c,0xe8,0x04,0x20]
-         bgectr+ 2
-# CHECK: bgectr+ 0                        # encoding: [0x4c,0xe0,0x04,0x20]
-         bgectr+
-# CHECK: bgel+ 2, target                  # encoding: [0x40,0xe8,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bgel+ 2, target
-# CHECK: bgel+ 0, target                  # encoding: [0x40,0xe0,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bgel+ target
-# CHECK: bgela+ 2, target                 # encoding: [0x40,0xe8,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bgela+ 2, target
-# CHECK: bgela+ 0, target                 # encoding: [0x40,0xe0,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bgela+ target
-# CHECK: bgelrl+ 2                        # encoding: [0x4c,0xe8,0x00,0x21]
-         bgelrl+ 2
-# CHECK: bgelrl+ 0                        # encoding: [0x4c,0xe0,0x00,0x21]
-         bgelrl+
-# CHECK: bgectrl+ 2                       # encoding: [0x4c,0xe8,0x04,0x21]
-         bgectrl+ 2
-# CHECK: bgectrl+ 0                       # encoding: [0x4c,0xe0,0x04,0x21]
-         bgectrl+
-
-# CHECK: bge- 2, target                   # encoding: [0x40,0xc8,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bge- 2, target
-# CHECK: bge- 0, target                   # encoding: [0x40,0xc0,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bge- target
-# CHECK: bgea- 2, target                  # encoding: [0x40,0xc8,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bgea- 2, target
-# CHECK: bgea- 0, target                  # encoding: [0x40,0xc0,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bgea- target
-# CHECK: bgelr- 2                         # encoding: [0x4c,0xc8,0x00,0x20]
-         bgelr- 2
-# CHECK: bgelr- 0                         # encoding: [0x4c,0xc0,0x00,0x20]
-         bgelr-
-# CHECK: bgectr- 2                        # encoding: [0x4c,0xc8,0x04,0x20]
-         bgectr- 2
-# CHECK: bgectr- 0                        # encoding: [0x4c,0xc0,0x04,0x20]
-         bgectr-
-# CHECK: bgel- 2, target                  # encoding: [0x40,0xc8,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bgel- 2, target
-# CHECK: bgel- 0, target                  # encoding: [0x40,0xc0,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bgel- target
-# CHECK: bgela- 2, target                 # encoding: [0x40,0xc8,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bgela- 2, target
-# CHECK: bgela- 0, target                 # encoding: [0x40,0xc0,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bgela- target
-# CHECK: bgelrl- 2                        # encoding: [0x4c,0xc8,0x00,0x21]
-         bgelrl- 2
-# CHECK: bgelrl- 0                        # encoding: [0x4c,0xc0,0x00,0x21]
-         bgelrl-
-# CHECK: bgectrl- 2                       # encoding: [0x4c,0xc8,0x04,0x21]
-         bgectrl- 2
-# CHECK: bgectrl- 0                       # encoding: [0x4c,0xc0,0x04,0x21]
-         bgectrl-
-
-# CHECK: bgt 2, target                   # encoding: [0x41,0x89,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bgt 2, target
-# CHECK: bgt 0, target                   # encoding: [0x41,0x81,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bgt target
-# CHECK: bgta 2, target                  # encoding: [0x41,0x89,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bgta 2, target
-# CHECK: bgta 0, target                  # encoding: [0x41,0x81,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bgta target
-# CHECK: bgtlr 2                         # encoding: [0x4d,0x89,0x00,0x20]
-         bgtlr 2
-# CHECK: bgtlr 0                         # encoding: [0x4d,0x81,0x00,0x20]
-         bgtlr
-# CHECK: bgtctr 2                        # encoding: [0x4d,0x89,0x04,0x20]
-         bgtctr 2
-# CHECK: bgtctr 0                        # encoding: [0x4d,0x81,0x04,0x20]
-         bgtctr
-# CHECK: bgtl 2, target                  # encoding: [0x41,0x89,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bgtl 2, target
-# CHECK: bgtl 0, target                  # encoding: [0x41,0x81,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bgtl target
-# CHECK: bgtla 2, target                 # encoding: [0x41,0x89,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bgtla 2, target
-# CHECK: bgtla 0, target                 # encoding: [0x41,0x81,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bgtla target
-# CHECK: bgtlrl 2                        # encoding: [0x4d,0x89,0x00,0x21]
-         bgtlrl 2
-# CHECK: bgtlrl 0                        # encoding: [0x4d,0x81,0x00,0x21]
-         bgtlrl
-# CHECK: bgtctrl 2                       # encoding: [0x4d,0x89,0x04,0x21]
-         bgtctrl 2
-# CHECK: bgtctrl 0                       # encoding: [0x4d,0x81,0x04,0x21]
-         bgtctrl
-
-# CHECK: bgt+ 2, target                  # encoding: [0x41,0xe9,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bgt+ 2, target
-# CHECK: bgt+ 0, target                  # encoding: [0x41,0xe1,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bgt+ target
-# CHECK: bgta+ 2, target                 # encoding: [0x41,0xe9,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bgta+ 2, target
-# CHECK: bgta+ 0, target                 # encoding: [0x41,0xe1,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bgta+ target
-# CHECK: bgtlr+ 2                        # encoding: [0x4d,0xe9,0x00,0x20]
-         bgtlr+ 2
-# CHECK: bgtlr+ 0                        # encoding: [0x4d,0xe1,0x00,0x20]
-         bgtlr+
-# CHECK: bgtctr+ 2                       # encoding: [0x4d,0xe9,0x04,0x20]
-         bgtctr+ 2
-# CHECK: bgtctr+ 0                       # encoding: [0x4d,0xe1,0x04,0x20]
-         bgtctr+
-# CHECK: bgtl+ 2, target                 # encoding: [0x41,0xe9,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bgtl+ 2, target
-# CHECK: bgtl+ 0, target                 # encoding: [0x41,0xe1,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bgtl+ target
-# CHECK: bgtla+ 2, target                # encoding: [0x41,0xe9,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bgtla+ 2, target
-# CHECK: bgtla+ 0, target                # encoding: [0x41,0xe1,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bgtla+ target
-# CHECK: bgtlrl+ 2                       # encoding: [0x4d,0xe9,0x00,0x21]
-         bgtlrl+ 2
-# CHECK: bgtlrl+ 0                       # encoding: [0x4d,0xe1,0x00,0x21]
-         bgtlrl+
-# CHECK: bgtctrl+ 2                      # encoding: [0x4d,0xe9,0x04,0x21]
-         bgtctrl+ 2
-# CHECK: bgtctrl+ 0                      # encoding: [0x4d,0xe1,0x04,0x21]
-         bgtctrl+
-
-# CHECK: bgt- 2, target                  # encoding: [0x41,0xc9,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bgt- 2, target
-# CHECK: bgt- 0, target                  # encoding: [0x41,0xc1,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bgt- target
-# CHECK: bgta- 2, target                 # encoding: [0x41,0xc9,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bgta- 2, target
-# CHECK: bgta- 0, target                 # encoding: [0x41,0xc1,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bgta- target
-# CHECK: bgtlr- 2                        # encoding: [0x4d,0xc9,0x00,0x20]
-         bgtlr- 2
-# CHECK: bgtlr- 0                        # encoding: [0x4d,0xc1,0x00,0x20]
-         bgtlr-
-# CHECK: bgtctr- 2                       # encoding: [0x4d,0xc9,0x04,0x20]
-         bgtctr- 2
-# CHECK: bgtctr- 0                       # encoding: [0x4d,0xc1,0x04,0x20]
-         bgtctr-
-# CHECK: bgtl- 2, target                 # encoding: [0x41,0xc9,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bgtl- 2, target
-# CHECK: bgtl- 0, target                 # encoding: [0x41,0xc1,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bgtl- target
-# CHECK: bgtla- 2, target                # encoding: [0x41,0xc9,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bgtla- 2, target
-# CHECK: bgtla- 0, target                # encoding: [0x41,0xc1,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bgtla- target
-# CHECK: bgtlrl- 2                       # encoding: [0x4d,0xc9,0x00,0x21]
-         bgtlrl- 2
-# CHECK: bgtlrl- 0                       # encoding: [0x4d,0xc1,0x00,0x21]
-         bgtlrl-
-# CHECK: bgtctrl- 2                      # encoding: [0x4d,0xc9,0x04,0x21]
-         bgtctrl- 2
-# CHECK: bgtctrl- 0                      # encoding: [0x4d,0xc1,0x04,0x21]
-         bgtctrl-
-
-# CHECK: bge 2, target                   # encoding: [0x40,0x88,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bnl 2, target
-# CHECK: bge 0, target                   # encoding: [0x40,0x80,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bnl target
-# CHECK: bgea 2, target                  # encoding: [0x40,0x88,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnla 2, target
-# CHECK: bgea 0, target                  # encoding: [0x40,0x80,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnla target
-# CHECK: bgelr 2                         # encoding: [0x4c,0x88,0x00,0x20]
-         bnllr 2
-# CHECK: bgelr 0                         # encoding: [0x4c,0x80,0x00,0x20]
-         bnllr
-# CHECK: bgectr 2                        # encoding: [0x4c,0x88,0x04,0x20]
-         bnlctr 2
-# CHECK: bgectr 0                        # encoding: [0x4c,0x80,0x04,0x20]
-         bnlctr
-# CHECK: bgel 2, target                  # encoding: [0x40,0x88,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bnll 2, target
-# CHECK: bgel 0, target                  # encoding: [0x40,0x80,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bnll target
-# CHECK: bgela 2, target                  # encoding: [0x40,0x88,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnlla 2, target
-# CHECK: bgela 0, target                  # encoding: [0x40,0x80,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnlla target
-# CHECK: bgelrl 2                        # encoding: [0x4c,0x88,0x00,0x21]
-         bnllrl 2
-# CHECK: bgelrl 0                        # encoding: [0x4c,0x80,0x00,0x21]
-         bnllrl
-# CHECK: bgectrl 2                       # encoding: [0x4c,0x88,0x04,0x21]
-         bnlctrl 2
-# CHECK: bgectrl 0                       # encoding: [0x4c,0x80,0x04,0x21]
-         bnlctrl
-
-# CHECK: bge+ 2, target                  # encoding: [0x40,0xe8,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bnl+ 2, target
-# CHECK: bge+ 0, target                  # encoding: [0x40,0xe0,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bnl+ target
-# CHECK: bgea+ 2, target                 # encoding: [0x40,0xe8,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnla+ 2, target
-# CHECK: bgea+ 0, target                 # encoding: [0x40,0xe0,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnla+ target
-# CHECK: bgelr+ 2                        # encoding: [0x4c,0xe8,0x00,0x20]
-         bnllr+ 2
-# CHECK: bgelr+ 0                        # encoding: [0x4c,0xe0,0x00,0x20]
-         bnllr+
-# CHECK: bgectr+ 2                       # encoding: [0x4c,0xe8,0x04,0x20]
-         bnlctr+ 2
-# CHECK: bgectr+ 0                       # encoding: [0x4c,0xe0,0x04,0x20]
-         bnlctr+
-# CHECK: bgel+ 2, target                 # encoding: [0x40,0xe8,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bnll+ 2, target
-# CHECK: bgel+ 0, target                 # encoding: [0x40,0xe0,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bnll+ target
-# CHECK: bgela+ 2, target                # encoding: [0x40,0xe8,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnlla+ 2, target
-# CHECK: bgela+ 0, target                # encoding: [0x40,0xe0,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnlla+ target
-# CHECK: bgelrl+ 2                       # encoding: [0x4c,0xe8,0x00,0x21]
-         bnllrl+ 2
-# CHECK: bgelrl+ 0                       # encoding: [0x4c,0xe0,0x00,0x21]
-         bnllrl+
-# CHECK: bgectrl+ 2                      # encoding: [0x4c,0xe8,0x04,0x21]
-         bnlctrl+ 2
-# CHECK: bgectrl+ 0                      # encoding: [0x4c,0xe0,0x04,0x21]
-         bnlctrl+
-
-# CHECK: bge- 2, target                  # encoding: [0x40,0xc8,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bnl- 2, target
-# CHECK: bge- 0, target                  # encoding: [0x40,0xc0,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bnl- target
-# CHECK: bgea- 2, target                 # encoding: [0x40,0xc8,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnla- 2, target
-# CHECK: bgea- 0, target                 # encoding: [0x40,0xc0,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnla- target
-# CHECK: bgelr- 2                        # encoding: [0x4c,0xc8,0x00,0x20]
-         bnllr- 2
-# CHECK: bgelr- 0                        # encoding: [0x4c,0xc0,0x00,0x20]
-         bnllr-
-# CHECK: bgectr- 2                       # encoding: [0x4c,0xc8,0x04,0x20]
-         bnlctr- 2
-# CHECK: bgectr- 0                       # encoding: [0x4c,0xc0,0x04,0x20]
-         bnlctr-
-# CHECK: bgel- 2, target                 # encoding: [0x40,0xc8,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bnll- 2, target
-# CHECK: bgel- 0, target                 # encoding: [0x40,0xc0,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bnll- target
-# CHECK: bgela- 2, target                # encoding: [0x40,0xc8,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnlla- 2, target
-# CHECK: bgela- 0, target                # encoding: [0x40,0xc0,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnlla- target
-# CHECK: bgelrl- 2                       # encoding: [0x4c,0xc8,0x00,0x21]
-         bnllrl- 2
-# CHECK: bgelrl- 0                       # encoding: [0x4c,0xc0,0x00,0x21]
-         bnllrl-
-# CHECK: bgectrl- 2                      # encoding: [0x4c,0xc8,0x04,0x21]
-         bnlctrl- 2
-# CHECK: bgectrl- 0                      # encoding: [0x4c,0xc0,0x04,0x21]
-         bnlctrl-
-
-# CHECK: bne 2, target                   # encoding: [0x40,0x8a,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bne 2, target
-# CHECK: bne 0, target                   # encoding: [0x40,0x82,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bne target
-# CHECK: bnea 2, target                  # encoding: [0x40,0x8a,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnea 2, target
-# CHECK: bnea 0, target                  # encoding: [0x40,0x82,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnea target
-# CHECK: bnelr 2                         # encoding: [0x4c,0x8a,0x00,0x20]
-         bnelr 2
-# CHECK: bnelr 0                         # encoding: [0x4c,0x82,0x00,0x20]
-         bnelr
-# CHECK: bnectr 2                        # encoding: [0x4c,0x8a,0x04,0x20]
-         bnectr 2
-# CHECK: bnectr 0                        # encoding: [0x4c,0x82,0x04,0x20]
-         bnectr
-# CHECK: bnel 2, target                  # encoding: [0x40,0x8a,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bnel 2, target
-# CHECK: bnel 0, target                  # encoding: [0x40,0x82,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bnel target
-# CHECK: bnela 2, target                 # encoding: [0x40,0x8a,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnela 2, target
-# CHECK: bnela 0, target                 # encoding: [0x40,0x82,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnela target
-# CHECK: bnelrl 2                        # encoding: [0x4c,0x8a,0x00,0x21]
-         bnelrl 2
-# CHECK: bnelrl 0                        # encoding: [0x4c,0x82,0x00,0x21]
-         bnelrl
-# CHECK: bnectrl 2                       # encoding: [0x4c,0x8a,0x04,0x21]
-         bnectrl 2
-# CHECK: bnectrl 0                       # encoding: [0x4c,0x82,0x04,0x21]
-         bnectrl
-
-# CHECK: bne+ 2, target                  # encoding: [0x40,0xea,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bne+ 2, target
-# CHECK: bne+ 0, target                  # encoding: [0x40,0xe2,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bne+ target
-# CHECK: bnea+ 2, target                 # encoding: [0x40,0xea,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnea+ 2, target
-# CHECK: bnea+ 0, target                 # encoding: [0x40,0xe2,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnea+ target
-# CHECK: bnelr+ 2                        # encoding: [0x4c,0xea,0x00,0x20]
-         bnelr+ 2
-# CHECK: bnelr+ 0                        # encoding: [0x4c,0xe2,0x00,0x20]
-         bnelr+
-# CHECK: bnectr+ 2                       # encoding: [0x4c,0xea,0x04,0x20]
-         bnectr+ 2
-# CHECK: bnectr+ 0                       # encoding: [0x4c,0xe2,0x04,0x20]
-         bnectr+
-# CHECK: bnel+ 2, target                 # encoding: [0x40,0xea,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bnel+ 2, target
-# CHECK: bnel+ 0, target                 # encoding: [0x40,0xe2,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bnel+ target
-# CHECK: bnela+ 2, target                # encoding: [0x40,0xea,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnela+ 2, target
-# CHECK: bnela+ 0, target                # encoding: [0x40,0xe2,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnela+ target
-# CHECK: bnelrl+ 2                       # encoding: [0x4c,0xea,0x00,0x21]
-         bnelrl+ 2
-# CHECK: bnelrl+ 0                       # encoding: [0x4c,0xe2,0x00,0x21]
-         bnelrl+
-# CHECK: bnectrl+ 2                      # encoding: [0x4c,0xea,0x04,0x21]
-         bnectrl+ 2
-# CHECK: bnectrl+ 0                      # encoding: [0x4c,0xe2,0x04,0x21]
-         bnectrl+
-
-# CHECK: bne- 2, target                  # encoding: [0x40,0xca,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bne- 2, target
-# CHECK: bne- 0, target                  # encoding: [0x40,0xc2,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bne- target
-# CHECK: bnea- 2, target                 # encoding: [0x40,0xca,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnea- 2, target
-# CHECK: bnea- 0, target                 # encoding: [0x40,0xc2,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnea- target
-# CHECK: bnelr- 2                        # encoding: [0x4c,0xca,0x00,0x20]
-         bnelr- 2
-# CHECK: bnelr- 0                        # encoding: [0x4c,0xc2,0x00,0x20]
-         bnelr-
-# CHECK: bnectr- 2                       # encoding: [0x4c,0xca,0x04,0x20]
-         bnectr- 2
-# CHECK: bnectr- 0                       # encoding: [0x4c,0xc2,0x04,0x20]
-         bnectr-
-# CHECK: bnel- 2, target                 # encoding: [0x40,0xca,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bnel- 2, target
-# CHECK: bnel- 0, target                 # encoding: [0x40,0xc2,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bnel- target
-# CHECK: bnela- 2, target                # encoding: [0x40,0xca,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnela- 2, target
-# CHECK: bnela- 0, target                # encoding: [0x40,0xc2,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnela- target
-# CHECK: bnelrl- 2                       # encoding: [0x4c,0xca,0x00,0x21]
-         bnelrl- 2
-# CHECK: bnelrl- 0                       # encoding: [0x4c,0xc2,0x00,0x21]
-         bnelrl-
-# CHECK: bnectrl- 2                      # encoding: [0x4c,0xca,0x04,0x21]
-         bnectrl- 2
-# CHECK: bnectrl- 0                      # encoding: [0x4c,0xc2,0x04,0x21]
-         bnectrl-
-
-# CHECK: ble 2, target                   # encoding: [0x40,0x89,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bng 2, target
-# CHECK: ble 0, target                   # encoding: [0x40,0x81,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bng target
-# CHECK: blea 2, target                  # encoding: [0x40,0x89,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnga 2, target
-# CHECK: blea 0, target                  # encoding: [0x40,0x81,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnga target
-# CHECK: blelr 2                         # encoding: [0x4c,0x89,0x00,0x20]
-         bnglr 2
-# CHECK: blelr 0                         # encoding: [0x4c,0x81,0x00,0x20]
-         bnglr
-# CHECK: blectr 2                        # encoding: [0x4c,0x89,0x04,0x20]
-         bngctr 2
-# CHECK: blectr 0                        # encoding: [0x4c,0x81,0x04,0x20]
-         bngctr
-# CHECK: blel 2, target                  # encoding: [0x40,0x89,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bngl 2, target
-# CHECK: blel 0, target                  # encoding: [0x40,0x81,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bngl target
-# CHECK: blela 2, target                 # encoding: [0x40,0x89,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bngla 2, target
-# CHECK: blela 0, target                 # encoding: [0x40,0x81,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bngla target
-# CHECK: blelrl 2                        # encoding: [0x4c,0x89,0x00,0x21]
-         bnglrl 2
-# CHECK: blelrl 0                        # encoding: [0x4c,0x81,0x00,0x21]
-         bnglrl
-# CHECK: blectrl 2                       # encoding: [0x4c,0x89,0x04,0x21]
-         bngctrl 2
-# CHECK: blectrl 0                       # encoding: [0x4c,0x81,0x04,0x21]
-         bngctrl
-
-# CHECK: ble+ 2, target                   # encoding: [0x40,0xe9,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bng+ 2, target
-# CHECK: ble+ 0, target                   # encoding: [0x40,0xe1,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bng+ target
-# CHECK: blea+ 2, target                  # encoding: [0x40,0xe9,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnga+ 2, target
-# CHECK: blea+ 0, target                  # encoding: [0x40,0xe1,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnga+ target
-# CHECK: blelr+ 2                         # encoding: [0x4c,0xe9,0x00,0x20]
-         bnglr+ 2
-# CHECK: blelr+ 0                         # encoding: [0x4c,0xe1,0x00,0x20]
-         bnglr+
-# CHECK: blectr+ 2                        # encoding: [0x4c,0xe9,0x04,0x20]
-         bngctr+ 2
-# CHECK: blectr+ 0                        # encoding: [0x4c,0xe1,0x04,0x20]
-         bngctr+
-# CHECK: blel+ 2, target                  # encoding: [0x40,0xe9,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bngl+ 2, target
-# CHECK: blel+ 0, target                  # encoding: [0x40,0xe1,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bngl+ target
-# CHECK: blela+ 2, target                 # encoding: [0x40,0xe9,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bngla+ 2, target
-# CHECK: blela+ 0, target                 # encoding: [0x40,0xe1,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bngla+ target
-# CHECK: blelrl+ 2                        # encoding: [0x4c,0xe9,0x00,0x21]
-         bnglrl+ 2
-# CHECK: blelrl+ 0                        # encoding: [0x4c,0xe1,0x00,0x21]
-         bnglrl+
-# CHECK: blectrl+ 2                       # encoding: [0x4c,0xe9,0x04,0x21]
-         bngctrl+ 2
-# CHECK: blectrl+ 0                       # encoding: [0x4c,0xe1,0x04,0x21]
-         bngctrl+
-
-# CHECK: ble- 2, target                   # encoding: [0x40,0xc9,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bng- 2, target
-# CHECK: ble- 0, target                   # encoding: [0x40,0xc1,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bng- target
-# CHECK: blea- 2, target                  # encoding: [0x40,0xc9,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnga- 2, target
-# CHECK: blea- 0, target                  # encoding: [0x40,0xc1,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnga- target
-# CHECK: blelr- 2                         # encoding: [0x4c,0xc9,0x00,0x20]
-         bnglr- 2
-# CHECK: blelr- 0                         # encoding: [0x4c,0xc1,0x00,0x20]
-         bnglr-
-# CHECK: blectr- 2                        # encoding: [0x4c,0xc9,0x04,0x20]
-         bngctr- 2
-# CHECK: blectr- 0                        # encoding: [0x4c,0xc1,0x04,0x20]
-         bngctr-
-# CHECK: blel- 2, target                  # encoding: [0x40,0xc9,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bngl- 2, target
-# CHECK: blel- 0, target                  # encoding: [0x40,0xc1,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bngl- target
-# CHECK: blela- 2, target                 # encoding: [0x40,0xc9,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bngla- 2, target
-# CHECK: blela- 0, target                 # encoding: [0x40,0xc1,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bngla- target
-# CHECK: blelrl- 2                        # encoding: [0x4c,0xc9,0x00,0x21]
-         bnglrl- 2
-# CHECK: blelrl- 0                        # encoding: [0x4c,0xc1,0x00,0x21]
-         bnglrl-
-# CHECK: blectrl- 2                       # encoding: [0x4c,0xc9,0x04,0x21]
-         bngctrl- 2
-# CHECK: blectrl- 0                       # encoding: [0x4c,0xc1,0x04,0x21]
-         bngctrl-
-
-# CHECK: bun 2, target                   # encoding: [0x41,0x8b,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bso 2, target
-# CHECK: bun 0, target                   # encoding: [0x41,0x83,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bso target
-# CHECK: buna 2, target                  # encoding: [0x41,0x8b,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bsoa 2, target
-# CHECK: buna 0, target                  # encoding: [0x41,0x83,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bsoa target
-# CHECK: bunlr 2                         # encoding: [0x4d,0x8b,0x00,0x20]
-         bsolr 2
-# CHECK: bunlr 0                         # encoding: [0x4d,0x83,0x00,0x20]
-         bsolr
-# CHECK: bunctr 2                        # encoding: [0x4d,0x8b,0x04,0x20]
-         bsoctr 2
-# CHECK: bunctr 0                        # encoding: [0x4d,0x83,0x04,0x20]
-         bsoctr
-# CHECK: bunl 2, target                  # encoding: [0x41,0x8b,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bsol 2, target
-# CHECK: bunl 0, target                  # encoding: [0x41,0x83,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bsol target
-# CHECK: bunla 2, target                 # encoding: [0x41,0x8b,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bsola 2, target
-# CHECK: bunla 0, target                 # encoding: [0x41,0x83,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bsola target
-# CHECK: bunlrl 2                        # encoding: [0x4d,0x8b,0x00,0x21]
-         bsolrl 2
-# CHECK: bunlrl 0                        # encoding: [0x4d,0x83,0x00,0x21]
-         bsolrl
-# CHECK: bunctrl 2                       # encoding: [0x4d,0x8b,0x04,0x21]
-         bsoctrl 2
-# CHECK: bunctrl 0                       # encoding: [0x4d,0x83,0x04,0x21]
-         bsoctrl
-
-# CHECK: bun+ 2, target                  # encoding: [0x41,0xeb,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bso+ 2, target
-# CHECK: bun+ 0, target                  # encoding: [0x41,0xe3,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bso+ target
-# CHECK: buna+ 2, target                 # encoding: [0x41,0xeb,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bsoa+ 2, target
-# CHECK: buna+ 0, target                 # encoding: [0x41,0xe3,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bsoa+ target
-# CHECK: bunlr+ 2                        # encoding: [0x4d,0xeb,0x00,0x20]
-         bsolr+ 2
-# CHECK: bunlr+ 0                        # encoding: [0x4d,0xe3,0x00,0x20]
-         bsolr+
-# CHECK: bunctr+ 2                       # encoding: [0x4d,0xeb,0x04,0x20]
-         bsoctr+ 2
-# CHECK: bunctr+ 0                       # encoding: [0x4d,0xe3,0x04,0x20]
-         bsoctr+
-# CHECK: bunl+ 2, target                 # encoding: [0x41,0xeb,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bsol+ 2, target
-# CHECK: bunl+ 0, target                 # encoding: [0x41,0xe3,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bsol+ target
-# CHECK: bunla+ 2, target                # encoding: [0x41,0xeb,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bsola+ 2, target
-# CHECK: bunla+ 0, target                # encoding: [0x41,0xe3,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bsola+ target
-# CHECK: bunlrl+ 2                       # encoding: [0x4d,0xeb,0x00,0x21]
-         bsolrl+ 2
-# CHECK: bunlrl+ 0                       # encoding: [0x4d,0xe3,0x00,0x21]
-         bsolrl+
-# CHECK: bunctrl+ 2                      # encoding: [0x4d,0xeb,0x04,0x21]
-         bsoctrl+ 2
-# CHECK: bunctrl+ 0                      # encoding: [0x4d,0xe3,0x04,0x21]
-         bsoctrl+
-
-# CHECK: bun- 2, target                  # encoding: [0x41,0xcb,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bso- 2, target
-# CHECK: bun- 0, target                  # encoding: [0x41,0xc3,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bso- target
-# CHECK: buna- 2, target                 # encoding: [0x41,0xcb,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bsoa- 2, target
-# CHECK: buna- 0, target                 # encoding: [0x41,0xc3,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bsoa- target
-# CHECK: bunlr- 2                        # encoding: [0x4d,0xcb,0x00,0x20]
-         bsolr- 2
-# CHECK: bunlr- 0                        # encoding: [0x4d,0xc3,0x00,0x20]
-         bsolr-
-# CHECK: bunctr- 2                       # encoding: [0x4d,0xcb,0x04,0x20]
-         bsoctr- 2
-# CHECK: bunctr- 0                       # encoding: [0x4d,0xc3,0x04,0x20]
-         bsoctr-
-# CHECK: bunl- 2, target                 # encoding: [0x41,0xcb,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bsol- 2, target
-# CHECK: bunl- 0, target                 # encoding: [0x41,0xc3,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bsol- target
-# CHECK: bunla- 2, target                # encoding: [0x41,0xcb,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bsola- 2, target
-# CHECK: bunla- 0, target                # encoding: [0x41,0xc3,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bsola- target
-# CHECK: bunlrl- 2                       # encoding: [0x4d,0xcb,0x00,0x21]
-         bsolrl- 2
-# CHECK: bunlrl- 0                       # encoding: [0x4d,0xc3,0x00,0x21]
-         bsolrl-
-# CHECK: bunctrl- 2                      # encoding: [0x4d,0xcb,0x04,0x21]
-         bsoctrl- 2
-# CHECK: bunctrl- 0                      # encoding: [0x4d,0xc3,0x04,0x21]
-         bsoctrl-
-
-# CHECK: bnu 2, target                   # encoding: [0x40,0x8b,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bns 2, target
-# CHECK: bnu 0, target                   # encoding: [0x40,0x83,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bns target
-# CHECK: bnua 2, target                  # encoding: [0x40,0x8b,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnsa 2, target
-# CHECK: bnua 0, target                  # encoding: [0x40,0x83,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnsa target
-# CHECK: bnulr 2                         # encoding: [0x4c,0x8b,0x00,0x20]
-         bnslr 2
-# CHECK: bnulr 0                         # encoding: [0x4c,0x83,0x00,0x20]
-         bnslr
-# CHECK: bnuctr 2                        # encoding: [0x4c,0x8b,0x04,0x20]
-         bnsctr 2
-# CHECK: bnuctr 0                        # encoding: [0x4c,0x83,0x04,0x20]
-         bnsctr
-# CHECK: bnul 2, target                  # encoding: [0x40,0x8b,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bnsl 2, target
-# CHECK: bnul 0, target                  # encoding: [0x40,0x83,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bnsl target
-# CHECK: bnula 2, target                 # encoding: [0x40,0x8b,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnsla 2, target
-# CHECK: bnula 0, target                 # encoding: [0x40,0x83,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnsla target
-# CHECK: bnulrl 2                        # encoding: [0x4c,0x8b,0x00,0x21]
-         bnslrl 2
-# CHECK: bnulrl 0                        # encoding: [0x4c,0x83,0x00,0x21]
-         bnslrl
-# CHECK: bnuctrl 2                       # encoding: [0x4c,0x8b,0x04,0x21]
-         bnsctrl 2
-# CHECK: bnuctrl 0                       # encoding: [0x4c,0x83,0x04,0x21]
-         bnsctrl
-
-# CHECK: bnu+ 2, target                  # encoding: [0x40,0xeb,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bns+ 2, target
-# CHECK: bnu+ 0, target                  # encoding: [0x40,0xe3,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bns+ target
-# CHECK: bnua+ 2, target                 # encoding: [0x40,0xeb,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnsa+ 2, target
-# CHECK: bnua+ 0, target                 # encoding: [0x40,0xe3,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnsa+ target
-# CHECK: bnulr+ 2                        # encoding: [0x4c,0xeb,0x00,0x20]
-         bnslr+ 2
-# CHECK: bnulr+ 0                        # encoding: [0x4c,0xe3,0x00,0x20]
-         bnslr+
-# CHECK: bnuctr+ 2                       # encoding: [0x4c,0xeb,0x04,0x20]
-         bnsctr+ 2
-# CHECK: bnuctr+ 0                       # encoding: [0x4c,0xe3,0x04,0x20]
-         bnsctr+
-# CHECK: bnul+ 2, target                 # encoding: [0x40,0xeb,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bnsl+ 2, target
-# CHECK: bnul+ 0, target                 # encoding: [0x40,0xe3,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bnsl+ target
-# CHECK: bnula+ 2, target                # encoding: [0x40,0xeb,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnsla+ 2, target
-# CHECK: bnula+ 0, target                # encoding: [0x40,0xe3,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnsla+ target
-# CHECK: bnulrl+ 2                       # encoding: [0x4c,0xeb,0x00,0x21]
-         bnslrl+ 2
-# CHECK: bnulrl+ 0                       # encoding: [0x4c,0xe3,0x00,0x21]
-         bnslrl+
-# CHECK: bnuctrl+ 2                      # encoding: [0x4c,0xeb,0x04,0x21]
-         bnsctrl+ 2
-# CHECK: bnuctrl+ 0                      # encoding: [0x4c,0xe3,0x04,0x21]
-         bnsctrl+
-
-# CHECK: bnu- 2, target                  # encoding: [0x40,0xcb,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bns- 2, target
-# CHECK: bnu- 0, target                  # encoding: [0x40,0xc3,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bns- target
-# CHECK: bnua- 2, target                 # encoding: [0x40,0xcb,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnsa- 2, target
-# CHECK: bnua- 0, target                 # encoding: [0x40,0xc3,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnsa- target
-# CHECK: bnulr- 2                        # encoding: [0x4c,0xcb,0x00,0x20]
-         bnslr- 2
-# CHECK: bnulr- 0                        # encoding: [0x4c,0xc3,0x00,0x20]
-         bnslr-
-# CHECK: bnuctr- 2                       # encoding: [0x4c,0xcb,0x04,0x20]
-         bnsctr- 2
-# CHECK: bnuctr- 0                       # encoding: [0x4c,0xc3,0x04,0x20]
-         bnsctr-
-# CHECK: bnul- 2, target                 # encoding: [0x40,0xcb,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bnsl- 2, target
-# CHECK: bnul- 0, target                 # encoding: [0x40,0xc3,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bnsl- target
-# CHECK: bnula- 2, target                # encoding: [0x40,0xcb,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnsla- 2, target
-# CHECK: bnula- 0, target                # encoding: [0x40,0xc3,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnsla- target
-# CHECK: bnulrl- 2                       # encoding: [0x4c,0xcb,0x00,0x21]
-         bnslrl- 2
-# CHECK: bnulrl- 0                       # encoding: [0x4c,0xc3,0x00,0x21]
-         bnslrl-
-# CHECK: bnuctrl- 2                      # encoding: [0x4c,0xcb,0x04,0x21]
-         bnsctrl- 2
-# CHECK: bnuctrl- 0                      # encoding: [0x4c,0xc3,0x04,0x21]
-         bnsctrl-
-
-# CHECK: bun 2, target                   # encoding: [0x41,0x8b,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bun 2, target
-# CHECK: bun 0, target                   # encoding: [0x41,0x83,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bun target
-# CHECK: buna 2, target                  # encoding: [0x41,0x8b,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         buna 2, target
-# CHECK: buna 0, target                  # encoding: [0x41,0x83,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         buna target
-# CHECK: bunlr 2                         # encoding: [0x4d,0x8b,0x00,0x20]
-         bunlr 2
-# CHECK: bunlr 0                         # encoding: [0x4d,0x83,0x00,0x20]
-         bunlr
-# CHECK: bunctr 2                        # encoding: [0x4d,0x8b,0x04,0x20]
-         bunctr 2
-# CHECK: bunctr 0                        # encoding: [0x4d,0x83,0x04,0x20]
-         bunctr
-# CHECK: bunl 2, target                  # encoding: [0x41,0x8b,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bunl 2, target
-# CHECK: bunl 0, target                  # encoding: [0x41,0x83,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bunl target
-# CHECK: bunla 2, target                 # encoding: [0x41,0x8b,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bunla 2, target
-# CHECK: bunla 0, target                 # encoding: [0x41,0x83,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bunla target
-# CHECK: bunlrl 2                        # encoding: [0x4d,0x8b,0x00,0x21]
-         bunlrl 2
-# CHECK: bunlrl 0                        # encoding: [0x4d,0x83,0x00,0x21]
-         bunlrl
-# CHECK: bunctrl 2                       # encoding: [0x4d,0x8b,0x04,0x21]
-         bunctrl 2
-# CHECK: bunctrl 0                       # encoding: [0x4d,0x83,0x04,0x21]
-         bunctrl
-
-# CHECK: bun+ 2, target                  # encoding: [0x41,0xeb,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bun+ 2, target
-# CHECK: bun+ 0, target                  # encoding: [0x41,0xe3,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bun+ target
-# CHECK: buna+ 2, target                 # encoding: [0x41,0xeb,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         buna+ 2, target
-# CHECK: buna+ 0, target                 # encoding: [0x41,0xe3,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         buna+ target
-# CHECK: bunlr+ 2                        # encoding: [0x4d,0xeb,0x00,0x20]
-         bunlr+ 2
-# CHECK: bunlr+ 0                        # encoding: [0x4d,0xe3,0x00,0x20]
-         bunlr+
-# CHECK: bunctr+ 2                       # encoding: [0x4d,0xeb,0x04,0x20]
-         bunctr+ 2
-# CHECK: bunctr+ 0                       # encoding: [0x4d,0xe3,0x04,0x20]
-         bunctr+
-# CHECK: bunl+ 2, target                 # encoding: [0x41,0xeb,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bunl+ 2, target
-# CHECK: bunl+ 0, target                 # encoding: [0x41,0xe3,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bunl+ target
-# CHECK: bunla+ 2, target                # encoding: [0x41,0xeb,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bunla+ 2, target
-# CHECK: bunla+ 0, target                # encoding: [0x41,0xe3,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bunla+ target
-# CHECK: bunlrl+ 2                       # encoding: [0x4d,0xeb,0x00,0x21]
-         bunlrl+ 2
-# CHECK: bunlrl+ 0                       # encoding: [0x4d,0xe3,0x00,0x21]
-         bunlrl+
-# CHECK: bunctrl+ 2                      # encoding: [0x4d,0xeb,0x04,0x21]
-         bunctrl+ 2
-# CHECK: bunctrl+ 0                      # encoding: [0x4d,0xe3,0x04,0x21]
-         bunctrl+
-
-# CHECK: bun- 2, target                  # encoding: [0x41,0xcb,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bun- 2, target
-# CHECK: bun- 0, target                  # encoding: [0x41,0xc3,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bun- target
-# CHECK: buna- 2, target                 # encoding: [0x41,0xcb,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         buna- 2, target
-# CHECK: buna- 0, target                 # encoding: [0x41,0xc3,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         buna- target
-# CHECK: bunlr- 2                        # encoding: [0x4d,0xcb,0x00,0x20]
-         bunlr- 2
-# CHECK: bunlr- 0                        # encoding: [0x4d,0xc3,0x00,0x20]
-         bunlr-
-# CHECK: bunctr- 2                       # encoding: [0x4d,0xcb,0x04,0x20]
-         bunctr- 2
-# CHECK: bunctr- 0                       # encoding: [0x4d,0xc3,0x04,0x20]
-         bunctr-
-# CHECK: bunl- 2, target                 # encoding: [0x41,0xcb,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bunl- 2, target
-# CHECK: bunl- 0, target                 # encoding: [0x41,0xc3,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bunl- target
-# CHECK: bunla- 2, target                # encoding: [0x41,0xcb,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bunla- 2, target
-# CHECK: bunla- 0, target                # encoding: [0x41,0xc3,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bunla- target
-# CHECK: bunlrl- 2                       # encoding: [0x4d,0xcb,0x00,0x21]
-         bunlrl- 2
-# CHECK: bunlrl- 0                       # encoding: [0x4d,0xc3,0x00,0x21]
-         bunlrl-
-# CHECK: bunctrl- 2                      # encoding: [0x4d,0xcb,0x04,0x21]
-         bunctrl- 2
-# CHECK: bunctrl- 0                      # encoding: [0x4d,0xc3,0x04,0x21]
-         bunctrl-
-
-# CHECK: bnu 2, target                   # encoding: [0x40,0x8b,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bnu 2, target
-# CHECK: bnu 0, target                   # encoding: [0x40,0x83,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bnu target
-# CHECK: bnua 2, target                  # encoding: [0x40,0x8b,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnua 2, target
-# CHECK: bnua 0, target                  # encoding: [0x40,0x83,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnua target
-# CHECK: bnulr 2                         # encoding: [0x4c,0x8b,0x00,0x20]
-         bnulr 2
-# CHECK: bnulr 0                         # encoding: [0x4c,0x83,0x00,0x20]
-         bnulr
-# CHECK: bnuctr 2                        # encoding: [0x4c,0x8b,0x04,0x20]
-         bnuctr 2
-# CHECK: bnuctr 0                        # encoding: [0x4c,0x83,0x04,0x20]
-         bnuctr
-# CHECK: bnul 2, target                  # encoding: [0x40,0x8b,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bnul 2, target
-# CHECK: bnul 0, target                  # encoding: [0x40,0x83,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bnul target
-# CHECK: bnula 2, target                 # encoding: [0x40,0x8b,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnula 2, target
-# CHECK: bnula 0, target                 # encoding: [0x40,0x83,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnula target
-# CHECK: bnulrl 2                        # encoding: [0x4c,0x8b,0x00,0x21]
-         bnulrl 2
-# CHECK: bnulrl 0                        # encoding: [0x4c,0x83,0x00,0x21]
-         bnulrl
-# CHECK: bnuctrl 2                       # encoding: [0x4c,0x8b,0x04,0x21]
-         bnuctrl 2
-# CHECK: bnuctrl 0                       # encoding: [0x4c,0x83,0x04,0x21]
-         bnuctrl
-
-# CHECK: bnu+ 2, target                  # encoding: [0x40,0xeb,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bnu+ 2, target
-# CHECK: bnu+ 0, target                  # encoding: [0x40,0xe3,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bnu+ target
-# CHECK: bnua+ 2, target                 # encoding: [0x40,0xeb,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnua+ 2, target
-# CHECK: bnua+ 0, target                 # encoding: [0x40,0xe3,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnua+ target
-# CHECK: bnulr+ 2                        # encoding: [0x4c,0xeb,0x00,0x20]
-         bnulr+ 2
-# CHECK: bnulr+ 0                        # encoding: [0x4c,0xe3,0x00,0x20]
-         bnulr+
-# CHECK: bnuctr+ 2                       # encoding: [0x4c,0xeb,0x04,0x20]
-         bnuctr+ 2
-# CHECK: bnuctr+ 0                       # encoding: [0x4c,0xe3,0x04,0x20]
-         bnuctr+
-# CHECK: bnul+ 2, target                 # encoding: [0x40,0xeb,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bnul+ 2, target
-# CHECK: bnul+ 0, target                 # encoding: [0x40,0xe3,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bnul+ target
-# CHECK: bnula+ 2, target                # encoding: [0x40,0xeb,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnula+ 2, target
-# CHECK: bnula+ 0, target                # encoding: [0x40,0xe3,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnula+ target
-# CHECK: bnulrl+ 2                       # encoding: [0x4c,0xeb,0x00,0x21]
-         bnulrl+ 2
-# CHECK: bnulrl+ 0                       # encoding: [0x4c,0xe3,0x00,0x21]
-         bnulrl+
-# CHECK: bnuctrl+ 2                      # encoding: [0x4c,0xeb,0x04,0x21]
-         bnuctrl+ 2
-# CHECK: bnuctrl+ 0                      # encoding: [0x4c,0xe3,0x04,0x21]
-         bnuctrl+
-
-# CHECK: bnu- 2, target                  # encoding: [0x40,0xcb,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bnu- 2, target
-# CHECK: bnu- 0, target                  # encoding: [0x40,0xc3,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bnu- target
-# CHECK: bnua- 2, target                 # encoding: [0x40,0xcb,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnua- 2, target
-# CHECK: bnua- 0, target                 # encoding: [0x40,0xc3,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnua- target
-# CHECK: bnulr- 2                        # encoding: [0x4c,0xcb,0x00,0x20]
-         bnulr- 2
-# CHECK: bnulr- 0                        # encoding: [0x4c,0xc3,0x00,0x20]
-         bnulr-
-# CHECK: bnuctr- 2                       # encoding: [0x4c,0xcb,0x04,0x20]
-         bnuctr- 2
-# CHECK: bnuctr- 0                       # encoding: [0x4c,0xc3,0x04,0x20]
-         bnuctr-
-# CHECK: bnul- 2, target                 # encoding: [0x40,0xcb,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bnul- 2, target
-# CHECK: bnul- 0, target                 # encoding: [0x40,0xc3,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bnul- target
-# CHECK: bnula- 2, target                # encoding: [0x40,0xcb,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnula- 2, target
-# CHECK: bnula- 0, target                # encoding: [0x40,0xc3,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bnula- target
-# CHECK: bnulrl- 2                       # encoding: [0x4c,0xcb,0x00,0x21]
-         bnulrl- 2
-# CHECK: bnulrl- 0                       # encoding: [0x4c,0xc3,0x00,0x21]
-         bnulrl-
-# CHECK: bnuctrl- 2                      # encoding: [0x4c,0xcb,0x04,0x21]
-         bnuctrl- 2
-# CHECK: bnuctrl- 0                      # encoding: [0x4c,0xc3,0x04,0x21]
-         bnuctrl-
+# CHECK-BE: blr                             # encoding: [0x4e,0x80,0x00,0x20]
+# CHECK-LE: blr                             # encoding: [0x20,0x00,0x80,0x4e]
+            blr
+# CHECK-BE: bctr                            # encoding: [0x4e,0x80,0x04,0x20]
+# CHECK-LE: bctr                            # encoding: [0x20,0x04,0x80,0x4e]
+            bctr
+# CHECK-BE: blrl                            # encoding: [0x4e,0x80,0x00,0x21]
+# CHECK-LE: blrl                            # encoding: [0x21,0x00,0x80,0x4e]
+            blrl
+# CHECK-BE: bctrl                           # encoding: [0x4e,0x80,0x04,0x21]
+# CHECK-LE: bctrl                           # encoding: [0x21,0x04,0x80,0x4e]
+            bctrl
+
+# CHECK-BE: bc 12, 2, target                # encoding: [0x41,0x82,A,0bAAAAAA00]
+# CHECK-LE: bc 12, 2, target                # encoding: [0bAAAAAA00,A,0x82,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bt 2, target
+# CHECK-BE: bca 12, 2, target               # encoding: [0x41,0x82,A,0bAAAAAA10]
+# CHECK-LE: bca 12, 2, target               # encoding: [0bAAAAAA10,A,0x82,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bta 2, target
+# CHECK-BE: bclr 12, 2, 0                   # encoding: [0x4d,0x82,0x00,0x20]
+# CHECK-LE: bclr 12, 2, 0                   # encoding: [0x20,0x00,0x82,0x4d]
+            btlr 2
+# CHECK-BE: bcctr 12, 2, 0                  # encoding: [0x4d,0x82,0x04,0x20]
+# CHECK-LE: bcctr 12, 2, 0                  # encoding: [0x20,0x04,0x82,0x4d]
+            btctr 2
+# CHECK-BE: bcl 12, 2, target               # encoding: [0x41,0x82,A,0bAAAAAA01]
+# CHECK-LE: bcl 12, 2, target               # encoding: [0bAAAAAA01,A,0x82,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            btl 2, target
+# CHECK-BE: bcla 12, 2, target              # encoding: [0x41,0x82,A,0bAAAAAA11]
+# CHECK-LE: bcla 12, 2, target              # encoding: [0bAAAAAA11,A,0x82,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            btla 2, target
+# CHECK-BE: bclrl 12, 2, 0                  # encoding: [0x4d,0x82,0x00,0x21]
+# CHECK-LE: bclrl 12, 2, 0                  # encoding: [0x21,0x00,0x82,0x4d]
+            btlrl 2
+# CHECK-BE: bcctrl 12, 2, 0                 # encoding: [0x4d,0x82,0x04,0x21]
+# CHECK-LE: bcctrl 12, 2, 0                 # encoding: [0x21,0x04,0x82,0x4d]
+            btctrl 2
+
+# CHECK-BE: bc 15, 2, target                # encoding: [0x41,0xe2,A,0bAAAAAA00]
+# CHECK-LE: bc 15, 2, target                # encoding: [0bAAAAAA00,A,0xe2,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bt+ 2, target
+# CHECK-BE: bca 15, 2, target               # encoding: [0x41,0xe2,A,0bAAAAAA10]
+# CHECK-LE: bca 15, 2, target               # encoding: [0bAAAAAA10,A,0xe2,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bta+ 2, target
+# CHECK-BE: bclr 15, 2, 0                   # encoding: [0x4d,0xe2,0x00,0x20]
+# CHECK-LE: bclr 15, 2, 0                   # encoding: [0x20,0x00,0xe2,0x4d]
+            btlr+ 2
+# CHECK-BE: bcctr 15, 2, 0                  # encoding: [0x4d,0xe2,0x04,0x20]
+# CHECK-LE: bcctr 15, 2, 0                  # encoding: [0x20,0x04,0xe2,0x4d]
+            btctr+ 2
+# CHECK-BE: bcl 15, 2, target               # encoding: [0x41,0xe2,A,0bAAAAAA01]
+# CHECK-LE: bcl 15, 2, target               # encoding: [0bAAAAAA01,A,0xe2,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            btl+ 2, target
+# CHECK-BE: bcla 15, 2, target              # encoding: [0x41,0xe2,A,0bAAAAAA11]
+# CHECK-LE: bcla 15, 2, target              # encoding: [0bAAAAAA11,A,0xe2,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            btla+ 2, target
+# CHECK-BE: bclrl 15, 2, 0                  # encoding: [0x4d,0xe2,0x00,0x21]
+# CHECK-LE: bclrl 15, 2, 0                  # encoding: [0x21,0x00,0xe2,0x4d]
+            btlrl+ 2
+# CHECK-BE: bcctrl 15, 2, 0                 # encoding: [0x4d,0xe2,0x04,0x21]
+# CHECK-LE: bcctrl 15, 2, 0                 # encoding: [0x21,0x04,0xe2,0x4d]
+            btctrl+ 2
+
+# CHECK-BE: bc 14, 2, target                # encoding: [0x41,0xc2,A,0bAAAAAA00]
+# CHECK-LE: bc 14, 2, target                # encoding: [0bAAAAAA00,A,0xc2,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bt- 2, target
+# CHECK-BE: bca 14, 2, target               # encoding: [0x41,0xc2,A,0bAAAAAA10]
+# CHECK-LE: bca 14, 2, target               # encoding: [0bAAAAAA10,A,0xc2,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bta- 2, target
+# CHECK-BE: bclr 14, 2, 0                   # encoding: [0x4d,0xc2,0x00,0x20]
+# CHECK-LE: bclr 14, 2, 0                   # encoding: [0x20,0x00,0xc2,0x4d]
+            btlr- 2
+# CHECK-BE: bcctr 14, 2, 0                  # encoding: [0x4d,0xc2,0x04,0x20]
+# CHECK-LE: bcctr 14, 2, 0                  # encoding: [0x20,0x04,0xc2,0x4d]
+            btctr- 2
+# CHECK-BE: bcl 14, 2, target               # encoding: [0x41,0xc2,A,0bAAAAAA01]
+# CHECK-LE: bcl 14, 2, target               # encoding: [0bAAAAAA01,A,0xc2,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            btl- 2, target
+# CHECK-BE: bcla 14, 2, target              # encoding: [0x41,0xc2,A,0bAAAAAA11]
+# CHECK-LE: bcla 14, 2, target              # encoding: [0bAAAAAA11,A,0xc2,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            btla- 2, target
+# CHECK-BE: bclrl 14, 2, 0                  # encoding: [0x4d,0xc2,0x00,0x21]
+# CHECK-LE: bclrl 14, 2, 0                  # encoding: [0x21,0x00,0xc2,0x4d]
+            btlrl- 2
+# CHECK-BE: bcctrl 14, 2, 0                 # encoding: [0x4d,0xc2,0x04,0x21]
+# CHECK-LE: bcctrl 14, 2, 0                 # encoding: [0x21,0x04,0xc2,0x4d]
+            btctrl- 2
+
+# CHECK-BE: bc 4, 2, target                 # encoding: [0x40,0x82,A,0bAAAAAA00]
+# CHECK-LE: bc 4, 2, target                 # encoding: [0bAAAAAA00,A,0x82,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bf 2, target
+# CHECK-BE: bca 4, 2, target                # encoding: [0x40,0x82,A,0bAAAAAA10]
+# CHECK-LE: bca 4, 2, target                # encoding: [0bAAAAAA10,A,0x82,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bfa 2, target
+# CHECK-BE: bclr 4, 2, 0                    # encoding: [0x4c,0x82,0x00,0x20]
+# CHECK-LE: bclr 4, 2, 0                    # encoding: [0x20,0x00,0x82,0x4c]
+            bflr 2
+# CHECK-BE: bcctr 4, 2, 0                   # encoding: [0x4c,0x82,0x04,0x20]
+# CHECK-LE: bcctr 4, 2, 0                   # encoding: [0x20,0x04,0x82,0x4c]
+            bfctr 2
+# CHECK-BE: bcl 4, 2, target                # encoding: [0x40,0x82,A,0bAAAAAA01]
+# CHECK-LE: bcl 4, 2, target                # encoding: [0bAAAAAA01,A,0x82,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bfl 2, target
+# CHECK-BE: bcla 4, 2, target               # encoding: [0x40,0x82,A,0bAAAAAA11]
+# CHECK-LE: bcla 4, 2, target               # encoding: [0bAAAAAA11,A,0x82,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bfla 2, target
+# CHECK-BE: bclrl 4, 2, 0                   # encoding: [0x4c,0x82,0x00,0x21]
+# CHECK-LE: bclrl 4, 2, 0                   # encoding: [0x21,0x00,0x82,0x4c]
+            bflrl 2
+# CHECK-BE: bcctrl 4, 2, 0                  # encoding: [0x4c,0x82,0x04,0x21]
+# CHECK-LE: bcctrl 4, 2, 0                  # encoding: [0x21,0x04,0x82,0x4c]
+            bfctrl 2
+
+# CHECK-BE: bc 7, 2, target                 # encoding: [0x40,0xe2,A,0bAAAAAA00]
+# CHECK-LE: bc 7, 2, target                 # encoding: [0bAAAAAA00,A,0xe2,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bf+ 2, target
+# CHECK-BE: bca 7, 2, target                # encoding: [0x40,0xe2,A,0bAAAAAA10]
+# CHECK-LE: bca 7, 2, target                # encoding: [0bAAAAAA10,A,0xe2,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bfa+ 2, target
+# CHECK-BE: bclr 7, 2, 0                    # encoding: [0x4c,0xe2,0x00,0x20]
+# CHECK-LE: bclr 7, 2, 0                    # encoding: [0x20,0x00,0xe2,0x4c]
+            bflr+ 2
+# CHECK-BE: bcctr 7, 2, 0                   # encoding: [0x4c,0xe2,0x04,0x20]
+# CHECK-LE: bcctr 7, 2, 0                   # encoding: [0x20,0x04,0xe2,0x4c]
+            bfctr+ 2
+# CHECK-BE: bcl 7, 2, target                # encoding: [0x40,0xe2,A,0bAAAAAA01]
+# CHECK-LE: bcl 7, 2, target                # encoding: [0bAAAAAA01,A,0xe2,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bfl+ 2, target
+# CHECK-BE: bcla 7, 2, target               # encoding: [0x40,0xe2,A,0bAAAAAA11]
+# CHECK-LE: bcla 7, 2, target               # encoding: [0bAAAAAA11,A,0xe2,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bfla+ 2, target
+# CHECK-BE: bclrl 7, 2, 0                   # encoding: [0x4c,0xe2,0x00,0x21]
+# CHECK-LE: bclrl 7, 2, 0                   # encoding: [0x21,0x00,0xe2,0x4c]
+            bflrl+ 2
+# CHECK-BE: bcctrl 7, 2, 0                  # encoding: [0x4c,0xe2,0x04,0x21]
+# CHECK-LE: bcctrl 7, 2, 0                  # encoding: [0x21,0x04,0xe2,0x4c]
+            bfctrl+ 2
+
+# CHECK-BE: bc 6, 2, target                 # encoding: [0x40,0xc2,A,0bAAAAAA00]
+# CHECK-LE: bc 6, 2, target                 # encoding: [0bAAAAAA00,A,0xc2,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bf- 2, target
+# CHECK-BE: bca 6, 2, target                # encoding: [0x40,0xc2,A,0bAAAAAA10]
+# CHECK-LE: bca 6, 2, target                # encoding: [0bAAAAAA10,A,0xc2,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bfa- 2, target
+# CHECK-BE: bclr 6, 2, 0                    # encoding: [0x4c,0xc2,0x00,0x20]
+# CHECK-LE: bclr 6, 2, 0                    # encoding: [0x20,0x00,0xc2,0x4c]
+            bflr- 2
+# CHECK-BE: bcctr 6, 2, 0                   # encoding: [0x4c,0xc2,0x04,0x20]
+# CHECK-LE: bcctr 6, 2, 0                   # encoding: [0x20,0x04,0xc2,0x4c]
+            bfctr- 2
+# CHECK-BE: bcl 6, 2, target                # encoding: [0x40,0xc2,A,0bAAAAAA01]
+# CHECK-LE: bcl 6, 2, target                # encoding: [0bAAAAAA01,A,0xc2,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bfl- 2, target
+# CHECK-BE: bcla 6, 2, target               # encoding: [0x40,0xc2,A,0bAAAAAA11]
+# CHECK-LE: bcla 6, 2, target               # encoding: [0bAAAAAA11,A,0xc2,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bfla- 2, target
+# CHECK-BE: bclrl 6, 2, 0                   # encoding: [0x4c,0xc2,0x00,0x21]
+# CHECK-LE: bclrl 6, 2, 0                   # encoding: [0x21,0x00,0xc2,0x4c]
+            bflrl- 2
+# CHECK-BE: bcctrl 6, 2, 0                  # encoding: [0x4c,0xc2,0x04,0x21]
+# CHECK-LE: bcctrl 6, 2, 0                  # encoding: [0x21,0x04,0xc2,0x4c]
+            bfctrl- 2
+
+# CHECK-BE: bdnz target                     # encoding: [0x42,0x00,A,0bAAAAAA00]
+# CHECK-LE: bdnz target                     # encoding: [0bAAAAAA00,A,0x00,0x42]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bdnz target
+# CHECK-BE: bdnza target                    # encoding: [0x42,0x00,A,0bAAAAAA10]
+# CHECK-LE: bdnza target                    # encoding: [0bAAAAAA10,A,0x00,0x42]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bdnza target
+# CHECK-BE: bdnzlr                          # encoding: [0x4e,0x00,0x00,0x20]
+# CHECK-LE: bdnzlr                          # encoding: [0x20,0x00,0x00,0x4e]
+            bdnzlr
+# CHECK-BE: bdnzl target                    # encoding: [0x42,0x00,A,0bAAAAAA01]
+# CHECK-LE: bdnzl target                    # encoding: [0bAAAAAA01,A,0x00,0x42]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bdnzl target
+# CHECK-BE: bdnzla target                   # encoding: [0x42,0x00,A,0bAAAAAA11]
+# CHECK-LE: bdnzla target                   # encoding: [0bAAAAAA11,A,0x00,0x42]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bdnzla target
+# CHECK-BE: bdnzlrl                         # encoding: [0x4e,0x00,0x00,0x21]
+# CHECK-LE: bdnzlrl                         # encoding: [0x21,0x00,0x00,0x4e]
+            bdnzlrl
+
+# CHECK-BE: bdnz+ target                    # encoding: [0x43,0x20,A,0bAAAAAA00]
+# CHECK-LE: bdnz+ target                    # encoding: [0bAAAAAA00,A,0x20,0x43]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bdnz+ target
+# CHECK-BE: bdnza+ target                   # encoding: [0x43,0x20,A,0bAAAAAA10]
+# CHECK-LE: bdnza+ target                   # encoding: [0bAAAAAA10,A,0x20,0x43]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bdnza+ target
+# CHECK-BE: bdnzlr+                         # encoding: [0x4f,0x20,0x00,0x20]
+# CHECK-LE: bdnzlr+                         # encoding: [0x20,0x00,0x20,0x4f]
+            bdnzlr+
+# CHECK-BE: bdnzl+ target                   # encoding: [0x43,0x20,A,0bAAAAAA01]
+# CHECK-LE: bdnzl+ target                   # encoding: [0bAAAAAA01,A,0x20,0x43]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bdnzl+ target
+# CHECK-BE: bdnzla+ target                  # encoding: [0x43,0x20,A,0bAAAAAA11]
+# CHECK-LE: bdnzla+ target                  # encoding: [0bAAAAAA11,A,0x20,0x43]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bdnzla+ target
+# CHECK-BE: bdnzlrl+                        # encoding: [0x4f,0x20,0x00,0x21]
+# CHECK-LE: bdnzlrl+                        # encoding: [0x21,0x00,0x20,0x4f]
+            bdnzlrl+
+
+# CHECK-BE: bdnz- target                    # encoding: [0x43,0x00,A,0bAAAAAA00]
+# CHECK-LE: bdnz- target                    # encoding: [0bAAAAAA00,A,0x00,0x43]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bdnz- target
+# CHECK-BE: bdnza- target                   # encoding: [0x43,0x00,A,0bAAAAAA10]
+# CHECK-LE: bdnza- target                   # encoding: [0bAAAAAA10,A,0x00,0x43]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bdnza- target
+# CHECK-BE: bdnzlr-                         # encoding: [0x4f,0x00,0x00,0x20]
+# CHECK-LE: bdnzlr-                         # encoding: [0x20,0x00,0x00,0x4f]
+            bdnzlr-
+# CHECK-BE: bdnzl- target                   # encoding: [0x43,0x00,A,0bAAAAAA01]
+# CHECK-LE: bdnzl- target                   # encoding: [0bAAAAAA01,A,0x00,0x43]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bdnzl- target
+# CHECK-BE: bdnzla- target                  # encoding: [0x43,0x00,A,0bAAAAAA11]
+# CHECK-LE: bdnzla- target                  # encoding: [0bAAAAAA11,A,0x00,0x43]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bdnzla- target
+# CHECK-BE: bdnzlrl-                        # encoding: [0x4f,0x00,0x00,0x21]
+# CHECK-LE: bdnzlrl-                        # encoding: [0x21,0x00,0x00,0x4f]
+            bdnzlrl-
+
+# CHECK-BE: bc 8, 2, target                 # encoding: [0x41,0x02,A,0bAAAAAA00]
+# CHECK-LE: bc 8, 2, target                 # encoding: [0bAAAAAA00,A,0x02,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bdnzt 2, target
+# CHECK-BE: bca 8, 2, target                # encoding: [0x41,0x02,A,0bAAAAAA10]
+# CHECK-LE: bca 8, 2, target                # encoding: [0bAAAAAA10,A,0x02,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bdnzta 2, target
+# CHECK-BE: bclr 8, 2, 0                    # encoding: [0x4d,0x02,0x00,0x20]
+# CHECK-LE: bclr 8, 2, 0                    # encoding: [0x20,0x00,0x02,0x4d]
+            bdnztlr 2
+# CHECK-BE: bcl 8, 2, target                # encoding: [0x41,0x02,A,0bAAAAAA01]
+# CHECK-LE: bcl 8, 2, target                # encoding: [0bAAAAAA01,A,0x02,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bdnztl 2, target
+# CHECK-BE: bcla 8, 2, target               # encoding: [0x41,0x02,A,0bAAAAAA11]
+# CHECK-LE: bcla 8, 2, target               # encoding: [0bAAAAAA11,A,0x02,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bdnztla 2, target
+# CHECK-BE: bclrl 8, 2, 0                   # encoding: [0x4d,0x02,0x00,0x21]
+# CHECK-LE: bclrl 8, 2, 0                   # encoding: [0x21,0x00,0x02,0x4d]
+            bdnztlrl 2
+
+# CHECK-BE: bc 0, 2, target                 # encoding: [0x40,0x02,A,0bAAAAAA00]
+# CHECK-LE: bc 0, 2, target                 # encoding: [0bAAAAAA00,A,0x02,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bdnzf 2, target
+# CHECK-BE: bca 0, 2, target                # encoding: [0x40,0x02,A,0bAAAAAA10]
+# CHECK-LE: bca 0, 2, target                # encoding: [0bAAAAAA10,A,0x02,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bdnzfa 2, target
+# CHECK-BE: bclr 0, 2, 0                    # encoding: [0x4c,0x02,0x00,0x20]
+# CHECK-LE: bclr 0, 2, 0                    # encoding: [0x20,0x00,0x02,0x4c]
+            bdnzflr 2
+# CHECK-BE: bcl 0, 2, target                # encoding: [0x40,0x02,A,0bAAAAAA01]
+# CHECK-LE: bcl 0, 2, target                # encoding: [0bAAAAAA01,A,0x02,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bdnzfl 2, target
+# CHECK-BE: bcla 0, 2, target               # encoding: [0x40,0x02,A,0bAAAAAA11]
+# CHECK-LE: bcla 0, 2, target               # encoding: [0bAAAAAA11,A,0x02,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bdnzfla 2, target
+# CHECK-BE: bclrl 0, 2, 0                   # encoding: [0x4c,0x02,0x00,0x21]
+# CHECK-LE: bclrl 0, 2, 0                   # encoding: [0x21,0x00,0x02,0x4c]
+            bdnzflrl 2
+
+# CHECK-BE: bdz target                      # encoding: [0x42,0x40,A,0bAAAAAA00]
+# CHECK-LE: bdz target                      # encoding: [0bAAAAAA00,A,0x40,0x42]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bdz target
+# CHECK-BE: bdza target                     # encoding: [0x42,0x40,A,0bAAAAAA10]
+# CHECK-LE: bdza target                     # encoding: [0bAAAAAA10,A,0x40,0x42]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bdza target
+# CHECK-BE: bdzlr                           # encoding: [0x4e,0x40,0x00,0x20]
+# CHECK-LE: bdzlr                           # encoding: [0x20,0x00,0x40,0x4e]
+            bdzlr
+# CHECK-BE: bdzl target                     # encoding: [0x42,0x40,A,0bAAAAAA01]
+# CHECK-LE: bdzl target                     # encoding: [0bAAAAAA01,A,0x40,0x42]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bdzl target
+# CHECK-BE: bdzla target                    # encoding: [0x42,0x40,A,0bAAAAAA11]
+# CHECK-LE: bdzla target                    # encoding: [0bAAAAAA11,A,0x40,0x42]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bdzla target
+# CHECK-BE: bdzlrl                          # encoding: [0x4e,0x40,0x00,0x21]
+# CHECK-LE: bdzlrl                          # encoding: [0x21,0x00,0x40,0x4e]
+            bdzlrl
+
+# CHECK-BE: bdz+ target                     # encoding: [0x43,0x60,A,0bAAAAAA00]
+# CHECK-LE: bdz+ target                     # encoding: [0bAAAAAA00,A,0x60,0x43]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bdz+ target
+# CHECK-BE: bdza+ target                    # encoding: [0x43,0x60,A,0bAAAAAA10]
+# CHECK-LE: bdza+ target                    # encoding: [0bAAAAAA10,A,0x60,0x43]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bdza+ target
+# CHECK-BE: bdzlr+                          # encoding: [0x4f,0x60,0x00,0x20]
+# CHECK-LE: bdzlr+                          # encoding: [0x20,0x00,0x60,0x4f]
+            bdzlr+
+# CHECK-BE: bdzl+ target                    # encoding: [0x43,0x60,A,0bAAAAAA01]
+# CHECK-LE: bdzl+ target                    # encoding: [0bAAAAAA01,A,0x60,0x43]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bdzl+ target
+# CHECK-BE: bdzla+ target                   # encoding: [0x43,0x60,A,0bAAAAAA11]
+# CHECK-LE: bdzla+ target                   # encoding: [0bAAAAAA11,A,0x60,0x43]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bdzla+ target
+# CHECK-BE: bdzlrl+                         # encoding: [0x4f,0x60,0x00,0x21]
+# CHECK-LE: bdzlrl+                         # encoding: [0x21,0x00,0x60,0x4f]
+            bdzlrl+
+
+# CHECK-BE: bdz- target                     # encoding: [0x43,0x40,A,0bAAAAAA00]
+# CHECK-LE: bdz- target                     # encoding: [0bAAAAAA00,A,0x40,0x43]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bdz- target
+# CHECK-BE: bdza- target                    # encoding: [0x43,0x40,A,0bAAAAAA10]
+# CHECK-LE: bdza- target                    # encoding: [0bAAAAAA10,A,0x40,0x43]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bdza- target
+# CHECK-BE: bdzlr-                          # encoding: [0x4f,0x40,0x00,0x20]
+# CHECK-LE: bdzlr-                          # encoding: [0x20,0x00,0x40,0x4f]
+            bdzlr-
+# CHECK-BE: bdzl- target                    # encoding: [0x43,0x40,A,0bAAAAAA01]
+# CHECK-LE: bdzl- target                    # encoding: [0bAAAAAA01,A,0x40,0x43]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bdzl- target
+# CHECK-BE: bdzla- target                   # encoding: [0x43,0x40,A,0bAAAAAA11]
+# CHECK-LE: bdzla- target                   # encoding: [0bAAAAAA11,A,0x40,0x43]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bdzla- target
+# CHECK-BE: bdzlrl-                         # encoding: [0x4f,0x40,0x00,0x21]
+# CHECK-LE: bdzlrl-                         # encoding: [0x21,0x00,0x40,0x4f]
+            bdzlrl-
+
+# CHECK-BE: bc 10, 2, target                # encoding: [0x41,0x42,A,0bAAAAAA00]
+# CHECK-LE: bc 10, 2, target                # encoding: [0bAAAAAA00,A,0x42,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bdzt 2, target
+# CHECK-BE: bca 10, 2, target               # encoding: [0x41,0x42,A,0bAAAAAA10]
+# CHECK-LE: bca 10, 2, target               # encoding: [0bAAAAAA10,A,0x42,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bdzta 2, target
+# CHECK-BE: bclr 10, 2, 0                   # encoding: [0x4d,0x42,0x00,0x20]
+# CHECK-LE: bclr 10, 2, 0                   # encoding: [0x20,0x00,0x42,0x4d]
+            bdztlr 2
+# CHECK-BE: bcl 10, 2, target               # encoding: [0x41,0x42,A,0bAAAAAA01]
+# CHECK-LE: bcl 10, 2, target               # encoding: [0bAAAAAA01,A,0x42,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bdztl 2, target
+# CHECK-BE: bcla 10, 2, target              # encoding: [0x41,0x42,A,0bAAAAAA11]
+# CHECK-LE: bcla 10, 2, target              # encoding: [0bAAAAAA11,A,0x42,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bdztla 2, target
+# CHECK-BE: bclrl 10, 2, 0                  # encoding: [0x4d,0x42,0x00,0x21]
+# CHECK-LE: bclrl 10, 2, 0                  # encoding: [0x21,0x00,0x42,0x4d]
+            bdztlrl 2
+
+# CHECK-BE: bc 2, 2, target                 # encoding: [0x40,0x42,A,0bAAAAAA00]
+# CHECK-LE: bc 2, 2, target                 # encoding: [0bAAAAAA00,A,0x42,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bdzf 2, target
+# CHECK-BE: bca 2, 2, target                # encoding: [0x40,0x42,A,0bAAAAAA10]
+# CHECK-LE: bca 2, 2, target                # encoding: [0bAAAAAA10,A,0x42,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bdzfa 2, target
+# CHECK-BE: bclr 2, 2, 0                    # encoding: [0x4c,0x42,0x00,0x20]
+# CHECK-LE: bclr 2, 2, 0                    # encoding: [0x20,0x00,0x42,0x4c]
+            bdzflr 2
+# CHECK-BE: bcl 2, 2, target                # encoding: [0x40,0x42,A,0bAAAAAA01]
+# CHECK-LE: bcl 2, 2, target                # encoding: [0bAAAAAA01,A,0x42,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bdzfl 2, target
+# CHECK-BE: bcla 2, 2, target               # encoding: [0x40,0x42,A,0bAAAAAA11]
+# CHECK-LE: bcla 2, 2, target               # encoding: [0bAAAAAA11,A,0x42,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bdzfla 2, target
+# CHECK-BE: bclrl 2, 2, 0                   # encoding: [0x4c,0x42,0x00,0x21]
+# CHECK-LE: bclrl 2, 2, 0                   # encoding: [0x21,0x00,0x42,0x4c]
+            bdzflrl 2
+
+# CHECK-BE: blt 2, target                   # encoding: [0x41,0x88,A,0bAAAAAA00]
+# CHECK-LE: blt 2, target                   # encoding: [0bAAAAAA00,A,0x88,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            blt 2, target
+# CHECK-BE: blt 0, target                   # encoding: [0x41,0x80,A,0bAAAAAA00]
+# CHECK-LE: blt 0, target                   # encoding: [0bAAAAAA00,A,0x80,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            blt target
+# CHECK-BE: blta 2, target                  # encoding: [0x41,0x88,A,0bAAAAAA10]
+# CHECK-LE: blta 2, target                  # encoding: [0bAAAAAA10,A,0x88,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            blta 2, target
+# CHECK-BE: blta 0, target                  # encoding: [0x41,0x80,A,0bAAAAAA10]
+# CHECK-LE: blta 0, target                  # encoding: [0bAAAAAA10,A,0x80,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            blta target
+# CHECK-BE: bltlr 2                         # encoding: [0x4d,0x88,0x00,0x20]
+# CHECK-LE: bltlr 2                         # encoding: [0x20,0x00,0x88,0x4d]
+            bltlr 2
+# CHECK-BE: bltlr 0                         # encoding: [0x4d,0x80,0x00,0x20]
+# CHECK-LE: bltlr 0                         # encoding: [0x20,0x00,0x80,0x4d]
+            bltlr
+# CHECK-BE: bltctr 2                        # encoding: [0x4d,0x88,0x04,0x20]
+# CHECK-LE: bltctr 2                        # encoding: [0x20,0x04,0x88,0x4d]
+            bltctr 2
+# CHECK-BE: bltctr 0                        # encoding: [0x4d,0x80,0x04,0x20]
+# CHECK-LE: bltctr 0                        # encoding: [0x20,0x04,0x80,0x4d]
+            bltctr
+# CHECK-BE: bltl 2, target                  # encoding: [0x41,0x88,A,0bAAAAAA01]
+# CHECK-LE: bltl 2, target                  # encoding: [0bAAAAAA01,A,0x88,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bltl 2, target
+# CHECK-BE: bltl 0, target                  # encoding: [0x41,0x80,A,0bAAAAAA01]
+# CHECK-LE: bltl 0, target                  # encoding: [0bAAAAAA01,A,0x80,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bltl target
+# CHECK-BE: bltla 2, target                 # encoding: [0x41,0x88,A,0bAAAAAA11]
+# CHECK-LE: bltla 2, target                 # encoding: [0bAAAAAA11,A,0x88,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bltla 2, target
+# CHECK-BE: bltla 0, target                 # encoding: [0x41,0x80,A,0bAAAAAA11]
+# CHECK-LE: bltla 0, target                 # encoding: [0bAAAAAA11,A,0x80,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bltla target
+# CHECK-BE: bltlrl 2                        # encoding: [0x4d,0x88,0x00,0x21]
+# CHECK-LE: bltlrl 2                        # encoding: [0x21,0x00,0x88,0x4d]
+            bltlrl 2
+# CHECK-BE: bltlrl 0                        # encoding: [0x4d,0x80,0x00,0x21]
+# CHECK-LE: bltlrl 0                        # encoding: [0x21,0x00,0x80,0x4d]
+            bltlrl
+# CHECK-BE: bltctrl 2                       # encoding: [0x4d,0x88,0x04,0x21]
+# CHECK-LE: bltctrl 2                       # encoding: [0x21,0x04,0x88,0x4d]
+            bltctrl 2
+# CHECK-BE: bltctrl 0                       # encoding: [0x4d,0x80,0x04,0x21]
+# CHECK-LE: bltctrl 0                       # encoding: [0x21,0x04,0x80,0x4d]
+            bltctrl
+
+# CHECK-BE: blt+ 2, target                  # encoding: [0x41,0xe8,A,0bAAAAAA00]
+# CHECK-LE: blt+ 2, target                  # encoding: [0bAAAAAA00,A,0xe8,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            blt+ 2, target
+# CHECK-BE: blt+ 0, target                  # encoding: [0x41,0xe0,A,0bAAAAAA00]
+# CHECK-LE: blt+ 0, target                  # encoding: [0bAAAAAA00,A,0xe0,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            blt+ target
+# CHECK-BE: blta+ 2, target                 # encoding: [0x41,0xe8,A,0bAAAAAA10]
+# CHECK-LE: blta+ 2, target                 # encoding: [0bAAAAAA10,A,0xe8,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            blta+ 2, target
+# CHECK-BE: blta+ 0, target                 # encoding: [0x41,0xe0,A,0bAAAAAA10]
+# CHECK-LE: blta+ 0, target                 # encoding: [0bAAAAAA10,A,0xe0,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            blta+ target
+# CHECK-BE: bltlr+ 2                        # encoding: [0x4d,0xe8,0x00,0x20]
+# CHECK-LE: bltlr+ 2                        # encoding: [0x20,0x00,0xe8,0x4d]
+            bltlr+ 2
+# CHECK-BE: bltlr+ 0                        # encoding: [0x4d,0xe0,0x00,0x20]
+# CHECK-LE: bltlr+ 0                        # encoding: [0x20,0x00,0xe0,0x4d]
+            bltlr+
+# CHECK-BE: bltctr+ 2                       # encoding: [0x4d,0xe8,0x04,0x20]
+# CHECK-LE: bltctr+ 2                       # encoding: [0x20,0x04,0xe8,0x4d]
+            bltctr+ 2
+# CHECK-BE: bltctr+ 0                       # encoding: [0x4d,0xe0,0x04,0x20]
+# CHECK-LE: bltctr+ 0                       # encoding: [0x20,0x04,0xe0,0x4d]
+            bltctr+
+# CHECK-BE: bltl+ 2, target                 # encoding: [0x41,0xe8,A,0bAAAAAA01]
+# CHECK-LE: bltl+ 2, target                 # encoding: [0bAAAAAA01,A,0xe8,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bltl+ 2, target
+# CHECK-BE: bltl+ 0, target                 # encoding: [0x41,0xe0,A,0bAAAAAA01]
+# CHECK-LE: bltl+ 0, target                 # encoding: [0bAAAAAA01,A,0xe0,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bltl+ target
+# CHECK-BE: bltla+ 2, target                # encoding: [0x41,0xe8,A,0bAAAAAA11]
+# CHECK-LE: bltla+ 2, target                # encoding: [0bAAAAAA11,A,0xe8,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bltla+ 2, target
+# CHECK-BE: bltla+ 0, target                # encoding: [0x41,0xe0,A,0bAAAAAA11]
+# CHECK-LE: bltla+ 0, target                # encoding: [0bAAAAAA11,A,0xe0,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bltla+ target
+# CHECK-BE: bltlrl+ 2                       # encoding: [0x4d,0xe8,0x00,0x21]
+# CHECK-LE: bltlrl+ 2                       # encoding: [0x21,0x00,0xe8,0x4d]
+            bltlrl+ 2
+# CHECK-BE: bltlrl+ 0                       # encoding: [0x4d,0xe0,0x00,0x21]
+# CHECK-LE: bltlrl+ 0                       # encoding: [0x21,0x00,0xe0,0x4d]
+            bltlrl+
+# CHECK-BE: bltctrl+ 2                      # encoding: [0x4d,0xe8,0x04,0x21]
+# CHECK-LE: bltctrl+ 2                      # encoding: [0x21,0x04,0xe8,0x4d]
+            bltctrl+ 2
+# CHECK-BE: bltctrl+ 0                      # encoding: [0x4d,0xe0,0x04,0x21]
+# CHECK-LE: bltctrl+ 0                      # encoding: [0x21,0x04,0xe0,0x4d]
+            bltctrl+
+
+# CHECK-BE: blt- 2, target                  # encoding: [0x41,0xc8,A,0bAAAAAA00]
+# CHECK-LE: blt- 2, target                  # encoding: [0bAAAAAA00,A,0xc8,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            blt- 2, target
+# CHECK-BE: blt- 0, target                  # encoding: [0x41,0xc0,A,0bAAAAAA00]
+# CHECK-LE: blt- 0, target                  # encoding: [0bAAAAAA00,A,0xc0,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            blt- target
+# CHECK-BE: blta- 2, target                 # encoding: [0x41,0xc8,A,0bAAAAAA10]
+# CHECK-LE: blta- 2, target                 # encoding: [0bAAAAAA10,A,0xc8,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            blta- 2, target
+# CHECK-BE: blta- 0, target                 # encoding: [0x41,0xc0,A,0bAAAAAA10]
+# CHECK-LE: blta- 0, target                 # encoding: [0bAAAAAA10,A,0xc0,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            blta- target
+# CHECK-BE: bltlr- 2                        # encoding: [0x4d,0xc8,0x00,0x20]
+# CHECK-LE: bltlr- 2                        # encoding: [0x20,0x00,0xc8,0x4d]
+            bltlr- 2
+# CHECK-BE: bltlr- 0                        # encoding: [0x4d,0xc0,0x00,0x20]
+# CHECK-LE: bltlr- 0                        # encoding: [0x20,0x00,0xc0,0x4d]
+            bltlr-
+# CHECK-BE: bltctr- 2                       # encoding: [0x4d,0xc8,0x04,0x20]
+# CHECK-LE: bltctr- 2                       # encoding: [0x20,0x04,0xc8,0x4d]
+            bltctr- 2
+# CHECK-BE: bltctr- 0                       # encoding: [0x4d,0xc0,0x04,0x20]
+# CHECK-LE: bltctr- 0                       # encoding: [0x20,0x04,0xc0,0x4d]
+            bltctr-
+# CHECK-BE: bltl- 2, target                 # encoding: [0x41,0xc8,A,0bAAAAAA01]
+# CHECK-LE: bltl- 2, target                 # encoding: [0bAAAAAA01,A,0xc8,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bltl- 2, target
+# CHECK-BE: bltl- 0, target                 # encoding: [0x41,0xc0,A,0bAAAAAA01]
+# CHECK-LE: bltl- 0, target                 # encoding: [0bAAAAAA01,A,0xc0,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bltl- target
+# CHECK-BE: bltla- 2, target                # encoding: [0x41,0xc8,A,0bAAAAAA11]
+# CHECK-LE: bltla- 2, target                # encoding: [0bAAAAAA11,A,0xc8,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bltla- 2, target
+# CHECK-BE: bltla- 0, target                # encoding: [0x41,0xc0,A,0bAAAAAA11]
+# CHECK-LE: bltla- 0, target                # encoding: [0bAAAAAA11,A,0xc0,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bltla- target
+# CHECK-BE: bltlrl- 2                       # encoding: [0x4d,0xc8,0x00,0x21]
+# CHECK-LE: bltlrl- 2                       # encoding: [0x21,0x00,0xc8,0x4d]
+            bltlrl- 2
+# CHECK-BE: bltlrl- 0                       # encoding: [0x4d,0xc0,0x00,0x21]
+# CHECK-LE: bltlrl- 0                       # encoding: [0x21,0x00,0xc0,0x4d]
+            bltlrl-
+# CHECK-BE: bltctrl- 2                      # encoding: [0x4d,0xc8,0x04,0x21]
+# CHECK-LE: bltctrl- 2                      # encoding: [0x21,0x04,0xc8,0x4d]
+            bltctrl- 2
+# CHECK-BE: bltctrl- 0                      # encoding: [0x4d,0xc0,0x04,0x21]
+# CHECK-LE: bltctrl- 0                      # encoding: [0x21,0x04,0xc0,0x4d]
+            bltctrl-
+
+# CHECK-BE: ble 2, target                   # encoding: [0x40,0x89,A,0bAAAAAA00]
+# CHECK-LE: ble 2, target                   # encoding: [0bAAAAAA00,A,0x89,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            ble 2, target
+# CHECK-BE: ble 0, target                   # encoding: [0x40,0x81,A,0bAAAAAA00]
+# CHECK-LE: ble 0, target                   # encoding: [0bAAAAAA00,A,0x81,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            ble target
+# CHECK-BE: blea 2, target                  # encoding: [0x40,0x89,A,0bAAAAAA10]
+# CHECK-LE: blea 2, target                  # encoding: [0bAAAAAA10,A,0x89,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            blea 2, target
+# CHECK-BE: blea 0, target                  # encoding: [0x40,0x81,A,0bAAAAAA10]
+# CHECK-LE: blea 0, target                  # encoding: [0bAAAAAA10,A,0x81,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            blea target
+# CHECK-BE: blelr 2                         # encoding: [0x4c,0x89,0x00,0x20]
+# CHECK-LE: blelr 2                         # encoding: [0x20,0x00,0x89,0x4c]
+            blelr 2
+# CHECK-BE: blelr 0                         # encoding: [0x4c,0x81,0x00,0x20]
+# CHECK-LE: blelr 0                         # encoding: [0x20,0x00,0x81,0x4c]
+            blelr
+# CHECK-BE: blectr 2                        # encoding: [0x4c,0x89,0x04,0x20]
+# CHECK-LE: blectr 2                        # encoding: [0x20,0x04,0x89,0x4c]
+            blectr 2
+# CHECK-BE: blectr 0                        # encoding: [0x4c,0x81,0x04,0x20]
+# CHECK-LE: blectr 0                        # encoding: [0x20,0x04,0x81,0x4c]
+            blectr
+# CHECK-BE: blel 2, target                  # encoding: [0x40,0x89,A,0bAAAAAA01]
+# CHECK-LE: blel 2, target                  # encoding: [0bAAAAAA01,A,0x89,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            blel 2, target
+# CHECK-BE: blel 0, target                  # encoding: [0x40,0x81,A,0bAAAAAA01]
+# CHECK-LE: blel 0, target                  # encoding: [0bAAAAAA01,A,0x81,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            blel target
+# CHECK-BE: blela 2, target                 # encoding: [0x40,0x89,A,0bAAAAAA11]
+# CHECK-LE: blela 2, target                 # encoding: [0bAAAAAA11,A,0x89,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            blela 2, target
+# CHECK-BE: blela 0, target                 # encoding: [0x40,0x81,A,0bAAAAAA11]
+# CHECK-LE: blela 0, target                 # encoding: [0bAAAAAA11,A,0x81,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            blela target
+# CHECK-BE: blelrl 2                        # encoding: [0x4c,0x89,0x00,0x21]
+# CHECK-LE: blelrl 2                        # encoding: [0x21,0x00,0x89,0x4c]
+            blelrl 2
+# CHECK-BE: blelrl 0                        # encoding: [0x4c,0x81,0x00,0x21]
+# CHECK-LE: blelrl 0                        # encoding: [0x21,0x00,0x81,0x4c]
+            blelrl
+# CHECK-BE: blectrl 2                       # encoding: [0x4c,0x89,0x04,0x21]
+# CHECK-LE: blectrl 2                       # encoding: [0x21,0x04,0x89,0x4c]
+            blectrl 2
+# CHECK-BE: blectrl 0                       # encoding: [0x4c,0x81,0x04,0x21]
+# CHECK-LE: blectrl 0                       # encoding: [0x21,0x04,0x81,0x4c]
+            blectrl
+
+# CHECK-BE: ble+ 2, target                  # encoding: [0x40,0xe9,A,0bAAAAAA00]
+# CHECK-LE: ble+ 2, target                  # encoding: [0bAAAAAA00,A,0xe9,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            ble+ 2, target
+# CHECK-BE: ble+ 0, target                  # encoding: [0x40,0xe1,A,0bAAAAAA00]
+# CHECK-LE: ble+ 0, target                  # encoding: [0bAAAAAA00,A,0xe1,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            ble+ target
+# CHECK-BE: blea+ 2, target                 # encoding: [0x40,0xe9,A,0bAAAAAA10]
+# CHECK-LE: blea+ 2, target                 # encoding: [0bAAAAAA10,A,0xe9,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            blea+ 2, target
+# CHECK-BE: blea+ 0, target                 # encoding: [0x40,0xe1,A,0bAAAAAA10]
+# CHECK-LE: blea+ 0, target                 # encoding: [0bAAAAAA10,A,0xe1,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            blea+ target
+# CHECK-BE: blelr+ 2                        # encoding: [0x4c,0xe9,0x00,0x20]
+# CHECK-LE: blelr+ 2                        # encoding: [0x20,0x00,0xe9,0x4c]
+            blelr+ 2
+# CHECK-BE: blelr+ 0                        # encoding: [0x4c,0xe1,0x00,0x20]
+# CHECK-LE: blelr+ 0                        # encoding: [0x20,0x00,0xe1,0x4c]
+            blelr+
+# CHECK-BE: blectr+ 2                       # encoding: [0x4c,0xe9,0x04,0x20]
+# CHECK-LE: blectr+ 2                       # encoding: [0x20,0x04,0xe9,0x4c]
+            blectr+ 2
+# CHECK-BE: blectr+ 0                       # encoding: [0x4c,0xe1,0x04,0x20]
+# CHECK-LE: blectr+ 0                       # encoding: [0x20,0x04,0xe1,0x4c]
+            blectr+
+# CHECK-BE: blel+ 2, target                 # encoding: [0x40,0xe9,A,0bAAAAAA01]
+# CHECK-LE: blel+ 2, target                 # encoding: [0bAAAAAA01,A,0xe9,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            blel+ 2, target
+# CHECK-BE: blel+ 0, target                 # encoding: [0x40,0xe1,A,0bAAAAAA01]
+# CHECK-LE: blel+ 0, target                 # encoding: [0bAAAAAA01,A,0xe1,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            blel+ target
+# CHECK-BE: blela+ 2, target                # encoding: [0x40,0xe9,A,0bAAAAAA11]
+# CHECK-LE: blela+ 2, target                # encoding: [0bAAAAAA11,A,0xe9,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            blela+ 2, target
+# CHECK-BE: blela+ 0, target                # encoding: [0x40,0xe1,A,0bAAAAAA11]
+# CHECK-LE: blela+ 0, target                # encoding: [0bAAAAAA11,A,0xe1,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            blela+ target
+# CHECK-BE: blelrl+ 2                       # encoding: [0x4c,0xe9,0x00,0x21]
+# CHECK-LE: blelrl+ 2                       # encoding: [0x21,0x00,0xe9,0x4c]
+            blelrl+ 2
+# CHECK-BE: blelrl+ 0                       # encoding: [0x4c,0xe1,0x00,0x21]
+# CHECK-LE: blelrl+ 0                       # encoding: [0x21,0x00,0xe1,0x4c]
+            blelrl+
+# CHECK-BE: blectrl+ 2                      # encoding: [0x4c,0xe9,0x04,0x21]
+# CHECK-LE: blectrl+ 2                      # encoding: [0x21,0x04,0xe9,0x4c]
+            blectrl+ 2
+# CHECK-BE: blectrl+ 0                      # encoding: [0x4c,0xe1,0x04,0x21]
+# CHECK-LE: blectrl+ 0                      # encoding: [0x21,0x04,0xe1,0x4c]
+            blectrl+
+
+# CHECK-BE: ble- 2, target                  # encoding: [0x40,0xc9,A,0bAAAAAA00]
+# CHECK-LE: ble- 2, target                  # encoding: [0bAAAAAA00,A,0xc9,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            ble- 2, target
+# CHECK-BE: ble- 0, target                  # encoding: [0x40,0xc1,A,0bAAAAAA00]
+# CHECK-LE: ble- 0, target                  # encoding: [0bAAAAAA00,A,0xc1,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            ble- target
+# CHECK-BE: blea- 2, target                 # encoding: [0x40,0xc9,A,0bAAAAAA10]
+# CHECK-LE: blea- 2, target                 # encoding: [0bAAAAAA10,A,0xc9,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            blea- 2, target
+# CHECK-BE: blea- 0, target                 # encoding: [0x40,0xc1,A,0bAAAAAA10]
+# CHECK-LE: blea- 0, target                 # encoding: [0bAAAAAA10,A,0xc1,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            blea- target
+# CHECK-BE: blelr- 2                        # encoding: [0x4c,0xc9,0x00,0x20]
+# CHECK-LE: blelr- 2                        # encoding: [0x20,0x00,0xc9,0x4c]
+            blelr- 2
+# CHECK-BE: blelr- 0                        # encoding: [0x4c,0xc1,0x00,0x20]
+# CHECK-LE: blelr- 0                        # encoding: [0x20,0x00,0xc1,0x4c]
+            blelr-
+# CHECK-BE: blectr- 2                       # encoding: [0x4c,0xc9,0x04,0x20]
+# CHECK-LE: blectr- 2                       # encoding: [0x20,0x04,0xc9,0x4c]
+            blectr- 2
+# CHECK-BE: blectr- 0                       # encoding: [0x4c,0xc1,0x04,0x20]
+# CHECK-LE: blectr- 0                       # encoding: [0x20,0x04,0xc1,0x4c]
+            blectr-
+# CHECK-BE: blel- 2, target                 # encoding: [0x40,0xc9,A,0bAAAAAA01]
+# CHECK-LE: blel- 2, target                 # encoding: [0bAAAAAA01,A,0xc9,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            blel- 2, target
+# CHECK-BE: blel- 0, target                 # encoding: [0x40,0xc1,A,0bAAAAAA01]
+# CHECK-LE: blel- 0, target                 # encoding: [0bAAAAAA01,A,0xc1,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            blel- target
+# CHECK-BE: blela- 2, target                # encoding: [0x40,0xc9,A,0bAAAAAA11]
+# CHECK-LE: blela- 2, target                # encoding: [0bAAAAAA11,A,0xc9,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            blela- 2, target
+# CHECK-BE: blela- 0, target                # encoding: [0x40,0xc1,A,0bAAAAAA11]
+# CHECK-LE: blela- 0, target                # encoding: [0bAAAAAA11,A,0xc1,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            blela- target
+# CHECK-BE: blelrl- 2                       # encoding: [0x4c,0xc9,0x00,0x21]
+# CHECK-LE: blelrl- 2                       # encoding: [0x21,0x00,0xc9,0x4c]
+            blelrl- 2
+# CHECK-BE: blelrl- 0                       # encoding: [0x4c,0xc1,0x00,0x21]
+# CHECK-LE: blelrl- 0                       # encoding: [0x21,0x00,0xc1,0x4c]
+            blelrl-
+# CHECK-BE: blectrl- 2                      # encoding: [0x4c,0xc9,0x04,0x21]
+# CHECK-LE: blectrl- 2                      # encoding: [0x21,0x04,0xc9,0x4c]
+            blectrl- 2
+# CHECK-BE: blectrl- 0                      # encoding: [0x4c,0xc1,0x04,0x21]
+# CHECK-LE: blectrl- 0                      # encoding: [0x21,0x04,0xc1,0x4c]
+            blectrl-
+
+# CHECK-BE: beq 2, target                   # encoding: [0x41,0x8a,A,0bAAAAAA00]
+# CHECK-LE: beq 2, target                   # encoding: [0bAAAAAA00,A,0x8a,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            beq 2, target
+# CHECK-BE: beq 0, target                   # encoding: [0x41,0x82,A,0bAAAAAA00]
+# CHECK-LE: beq 0, target                   # encoding: [0bAAAAAA00,A,0x82,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            beq target
+# CHECK-BE: beqa 2, target                  # encoding: [0x41,0x8a,A,0bAAAAAA10]
+# CHECK-LE: beqa 2, target                  # encoding: [0bAAAAAA10,A,0x8a,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            beqa 2, target
+# CHECK-BE: beqa 0, target                  # encoding: [0x41,0x82,A,0bAAAAAA10]
+# CHECK-LE: beqa 0, target                  # encoding: [0bAAAAAA10,A,0x82,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            beqa target
+# CHECK-BE: beqlr 2                         # encoding: [0x4d,0x8a,0x00,0x20]
+# CHECK-LE: beqlr 2                         # encoding: [0x20,0x00,0x8a,0x4d]
+            beqlr 2
+# CHECK-BE: beqlr 0                         # encoding: [0x4d,0x82,0x00,0x20]
+# CHECK-LE: beqlr 0                         # encoding: [0x20,0x00,0x82,0x4d]
+            beqlr
+# CHECK-BE: beqctr 2                        # encoding: [0x4d,0x8a,0x04,0x20]
+# CHECK-LE: beqctr 2                        # encoding: [0x20,0x04,0x8a,0x4d]
+            beqctr 2
+# CHECK-BE: beqctr 0                        # encoding: [0x4d,0x82,0x04,0x20]
+# CHECK-LE: beqctr 0                        # encoding: [0x20,0x04,0x82,0x4d]
+            beqctr
+# CHECK-BE: beql 2, target                  # encoding: [0x41,0x8a,A,0bAAAAAA01]
+# CHECK-LE: beql 2, target                  # encoding: [0bAAAAAA01,A,0x8a,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            beql 2, target
+# CHECK-BE: beql 0, target                  # encoding: [0x41,0x82,A,0bAAAAAA01]
+# CHECK-LE: beql 0, target                  # encoding: [0bAAAAAA01,A,0x82,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            beql target
+# CHECK-BE: beqla 2, target                 # encoding: [0x41,0x8a,A,0bAAAAAA11]
+# CHECK-LE: beqla 2, target                 # encoding: [0bAAAAAA11,A,0x8a,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            beqla 2, target
+# CHECK-BE: beqla 0, target                 # encoding: [0x41,0x82,A,0bAAAAAA11]
+# CHECK-LE: beqla 0, target                 # encoding: [0bAAAAAA11,A,0x82,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            beqla target
+# CHECK-BE: beqlrl 2                        # encoding: [0x4d,0x8a,0x00,0x21]
+# CHECK-LE: beqlrl 2                        # encoding: [0x21,0x00,0x8a,0x4d]
+            beqlrl 2
+# CHECK-BE: beqlrl 0                        # encoding: [0x4d,0x82,0x00,0x21]
+# CHECK-LE: beqlrl 0                        # encoding: [0x21,0x00,0x82,0x4d]
+            beqlrl
+# CHECK-BE: beqctrl 2                       # encoding: [0x4d,0x8a,0x04,0x21]
+# CHECK-LE: beqctrl 2                       # encoding: [0x21,0x04,0x8a,0x4d]
+            beqctrl 2
+# CHECK-BE: beqctrl 0                       # encoding: [0x4d,0x82,0x04,0x21]
+# CHECK-LE: beqctrl 0                       # encoding: [0x21,0x04,0x82,0x4d]
+            beqctrl
+
+# CHECK-BE: beq+ 2, target                  # encoding: [0x41,0xea,A,0bAAAAAA00]
+# CHECK-LE: beq+ 2, target                  # encoding: [0bAAAAAA00,A,0xea,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            beq+ 2, target
+# CHECK-BE: beq+ 0, target                  # encoding: [0x41,0xe2,A,0bAAAAAA00]
+# CHECK-LE: beq+ 0, target                  # encoding: [0bAAAAAA00,A,0xe2,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            beq+ target
+# CHECK-BE: beqa+ 2, target                 # encoding: [0x41,0xea,A,0bAAAAAA10]
+# CHECK-LE: beqa+ 2, target                 # encoding: [0bAAAAAA10,A,0xea,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            beqa+ 2, target
+# CHECK-BE: beqa+ 0, target                 # encoding: [0x41,0xe2,A,0bAAAAAA10]
+# CHECK-LE: beqa+ 0, target                 # encoding: [0bAAAAAA10,A,0xe2,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            beqa+ target
+# CHECK-BE: beqlr+ 2                        # encoding: [0x4d,0xea,0x00,0x20]
+# CHECK-LE: beqlr+ 2                        # encoding: [0x20,0x00,0xea,0x4d]
+            beqlr+ 2
+# CHECK-BE: beqlr+ 0                        # encoding: [0x4d,0xe2,0x00,0x20]
+# CHECK-LE: beqlr+ 0                        # encoding: [0x20,0x00,0xe2,0x4d]
+            beqlr+
+# CHECK-BE: beqctr+ 2                       # encoding: [0x4d,0xea,0x04,0x20]
+# CHECK-LE: beqctr+ 2                       # encoding: [0x20,0x04,0xea,0x4d]
+            beqctr+ 2
+# CHECK-BE: beqctr+ 0                       # encoding: [0x4d,0xe2,0x04,0x20]
+# CHECK-LE: beqctr+ 0                       # encoding: [0x20,0x04,0xe2,0x4d]
+            beqctr+
+# CHECK-BE: beql+ 2, target                 # encoding: [0x41,0xea,A,0bAAAAAA01]
+# CHECK-LE: beql+ 2, target                 # encoding: [0bAAAAAA01,A,0xea,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            beql+ 2, target
+# CHECK-BE: beql+ 0, target                 # encoding: [0x41,0xe2,A,0bAAAAAA01]
+# CHECK-LE: beql+ 0, target                 # encoding: [0bAAAAAA01,A,0xe2,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            beql+ target
+# CHECK-BE: beqla+ 2, target                # encoding: [0x41,0xea,A,0bAAAAAA11]
+# CHECK-LE: beqla+ 2, target                # encoding: [0bAAAAAA11,A,0xea,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            beqla+ 2, target
+# CHECK-BE: beqla+ 0, target                # encoding: [0x41,0xe2,A,0bAAAAAA11]
+# CHECK-LE: beqla+ 0, target                # encoding: [0bAAAAAA11,A,0xe2,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            beqla+ target
+# CHECK-BE: beqlrl+ 2                       # encoding: [0x4d,0xea,0x00,0x21]
+# CHECK-LE: beqlrl+ 2                       # encoding: [0x21,0x00,0xea,0x4d]
+            beqlrl+ 2
+# CHECK-BE: beqlrl+ 0                       # encoding: [0x4d,0xe2,0x00,0x21]
+# CHECK-LE: beqlrl+ 0                       # encoding: [0x21,0x00,0xe2,0x4d]
+            beqlrl+
+# CHECK-BE: beqctrl+ 2                      # encoding: [0x4d,0xea,0x04,0x21]
+# CHECK-LE: beqctrl+ 2                      # encoding: [0x21,0x04,0xea,0x4d]
+            beqctrl+ 2
+# CHECK-BE: beqctrl+ 0                      # encoding: [0x4d,0xe2,0x04,0x21]
+# CHECK-LE: beqctrl+ 0                      # encoding: [0x21,0x04,0xe2,0x4d]
+            beqctrl+
+
+# CHECK-BE: beq- 2, target                  # encoding: [0x41,0xca,A,0bAAAAAA00]
+# CHECK-LE: beq- 2, target                  # encoding: [0bAAAAAA00,A,0xca,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            beq- 2, target
+# CHECK-BE: beq- 0, target                  # encoding: [0x41,0xc2,A,0bAAAAAA00]
+# CHECK-LE: beq- 0, target                  # encoding: [0bAAAAAA00,A,0xc2,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            beq- target
+# CHECK-BE: beqa- 2, target                 # encoding: [0x41,0xca,A,0bAAAAAA10]
+# CHECK-LE: beqa- 2, target                 # encoding: [0bAAAAAA10,A,0xca,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            beqa- 2, target
+# CHECK-BE: beqa- 0, target                 # encoding: [0x41,0xc2,A,0bAAAAAA10]
+# CHECK-LE: beqa- 0, target                 # encoding: [0bAAAAAA10,A,0xc2,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            beqa- target
+# CHECK-BE: beqlr- 2                        # encoding: [0x4d,0xca,0x00,0x20]
+# CHECK-LE: beqlr- 2                        # encoding: [0x20,0x00,0xca,0x4d]
+            beqlr- 2
+# CHECK-BE: beqlr- 0                        # encoding: [0x4d,0xc2,0x00,0x20]
+# CHECK-LE: beqlr- 0                        # encoding: [0x20,0x00,0xc2,0x4d]
+            beqlr-
+# CHECK-BE: beqctr- 2                       # encoding: [0x4d,0xca,0x04,0x20]
+# CHECK-LE: beqctr- 2                       # encoding: [0x20,0x04,0xca,0x4d]
+            beqctr- 2
+# CHECK-BE: beqctr- 0                       # encoding: [0x4d,0xc2,0x04,0x20]
+# CHECK-LE: beqctr- 0                       # encoding: [0x20,0x04,0xc2,0x4d]
+            beqctr-
+# CHECK-BE: beql- 2, target                 # encoding: [0x41,0xca,A,0bAAAAAA01]
+# CHECK-LE: beql- 2, target                 # encoding: [0bAAAAAA01,A,0xca,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            beql- 2, target
+# CHECK-BE: beql- 0, target                 # encoding: [0x41,0xc2,A,0bAAAAAA01]
+# CHECK-LE: beql- 0, target                 # encoding: [0bAAAAAA01,A,0xc2,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            beql- target
+# CHECK-BE: beqla- 2, target                # encoding: [0x41,0xca,A,0bAAAAAA11]
+# CHECK-LE: beqla- 2, target                # encoding: [0bAAAAAA11,A,0xca,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            beqla- 2, target
+# CHECK-BE: beqla- 0, target                # encoding: [0x41,0xc2,A,0bAAAAAA11]
+# CHECK-LE: beqla- 0, target                # encoding: [0bAAAAAA11,A,0xc2,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            beqla- target
+# CHECK-BE: beqlrl- 2                       # encoding: [0x4d,0xca,0x00,0x21]
+# CHECK-LE: beqlrl- 2                       # encoding: [0x21,0x00,0xca,0x4d]
+            beqlrl- 2
+# CHECK-BE: beqlrl- 0                       # encoding: [0x4d,0xc2,0x00,0x21]
+# CHECK-LE: beqlrl- 0                       # encoding: [0x21,0x00,0xc2,0x4d]
+            beqlrl-
+# CHECK-BE: beqctrl- 2                      # encoding: [0x4d,0xca,0x04,0x21]
+# CHECK-LE: beqctrl- 2                      # encoding: [0x21,0x04,0xca,0x4d]
+            beqctrl- 2
+# CHECK-BE: beqctrl- 0                      # encoding: [0x4d,0xc2,0x04,0x21]
+# CHECK-LE: beqctrl- 0                      # encoding: [0x21,0x04,0xc2,0x4d]
+            beqctrl-
+
+# CHECK-BE: bge 2, target                   # encoding: [0x40,0x88,A,0bAAAAAA00]
+# CHECK-LE: bge 2, target                   # encoding: [0bAAAAAA00,A,0x88,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bge 2, target
+# CHECK-BE: bge 0, target                   # encoding: [0x40,0x80,A,0bAAAAAA00]
+# CHECK-LE: bge 0, target                   # encoding: [0bAAAAAA00,A,0x80,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bge target
+# CHECK-BE: bgea 2, target                  # encoding: [0x40,0x88,A,0bAAAAAA10]
+# CHECK-LE: bgea 2, target                  # encoding: [0bAAAAAA10,A,0x88,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bgea 2, target
+# CHECK-BE: bgea 0, target                  # encoding: [0x40,0x80,A,0bAAAAAA10]
+# CHECK-LE: bgea 0, target                  # encoding: [0bAAAAAA10,A,0x80,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bgea target
+# CHECK-BE: bgelr 2                         # encoding: [0x4c,0x88,0x00,0x20]
+# CHECK-LE: bgelr 2                         # encoding: [0x20,0x00,0x88,0x4c]
+            bgelr 2
+# CHECK-BE: bgelr 0                         # encoding: [0x4c,0x80,0x00,0x20]
+# CHECK-LE: bgelr 0                         # encoding: [0x20,0x00,0x80,0x4c]
+            bgelr
+# CHECK-BE: bgectr 2                        # encoding: [0x4c,0x88,0x04,0x20]
+# CHECK-LE: bgectr 2                        # encoding: [0x20,0x04,0x88,0x4c]
+            bgectr 2
+# CHECK-BE: bgectr 0                        # encoding: [0x4c,0x80,0x04,0x20]
+# CHECK-LE: bgectr 0                        # encoding: [0x20,0x04,0x80,0x4c]
+            bgectr
+# CHECK-BE: bgel 2, target                  # encoding: [0x40,0x88,A,0bAAAAAA01]
+# CHECK-LE: bgel 2, target                  # encoding: [0bAAAAAA01,A,0x88,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bgel 2, target
+# CHECK-BE: bgel 0, target                  # encoding: [0x40,0x80,A,0bAAAAAA01]
+# CHECK-LE: bgel 0, target                  # encoding: [0bAAAAAA01,A,0x80,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bgel target
+# CHECK-BE: bgela 2, target                 # encoding: [0x40,0x88,A,0bAAAAAA11]
+# CHECK-LE: bgela 2, target                 # encoding: [0bAAAAAA11,A,0x88,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bgela 2, target
+# CHECK-BE: bgela 0, target                 # encoding: [0x40,0x80,A,0bAAAAAA11]
+# CHECK-LE: bgela 0, target                 # encoding: [0bAAAAAA11,A,0x80,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bgela target
+# CHECK-BE: bgelrl 2                        # encoding: [0x4c,0x88,0x00,0x21]
+# CHECK-LE: bgelrl 2                        # encoding: [0x21,0x00,0x88,0x4c]
+            bgelrl 2
+# CHECK-BE: bgelrl 0                        # encoding: [0x4c,0x80,0x00,0x21]
+# CHECK-LE: bgelrl 0                        # encoding: [0x21,0x00,0x80,0x4c]
+            bgelrl
+# CHECK-BE: bgectrl 2                       # encoding: [0x4c,0x88,0x04,0x21]
+# CHECK-LE: bgectrl 2                       # encoding: [0x21,0x04,0x88,0x4c]
+            bgectrl 2
+# CHECK-BE: bgectrl 0                       # encoding: [0x4c,0x80,0x04,0x21]
+# CHECK-LE: bgectrl 0                       # encoding: [0x21,0x04,0x80,0x4c]
+            bgectrl
+
+# CHECK-BE: bge+ 2, target                   # encoding: [0x40,0xe8,A,0bAAAAAA00]
+# CHECK-LE: bge+ 2, target                   # encoding: [0bAAAAAA00,A,0xe8,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bge+ 2, target
+# CHECK-BE: bge+ 0, target                   # encoding: [0x40,0xe0,A,0bAAAAAA00]
+# CHECK-LE: bge+ 0, target                   # encoding: [0bAAAAAA00,A,0xe0,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bge+ target
+# CHECK-BE: bgea+ 2, target                  # encoding: [0x40,0xe8,A,0bAAAAAA10]
+# CHECK-LE: bgea+ 2, target                  # encoding: [0bAAAAAA10,A,0xe8,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bgea+ 2, target
+# CHECK-BE: bgea+ 0, target                  # encoding: [0x40,0xe0,A,0bAAAAAA10]
+# CHECK-LE: bgea+ 0, target                  # encoding: [0bAAAAAA10,A,0xe0,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bgea+ target
+# CHECK-BE: bgelr+ 2                         # encoding: [0x4c,0xe8,0x00,0x20]
+# CHECK-LE: bgelr+ 2                         # encoding: [0x20,0x00,0xe8,0x4c]
+            bgelr+ 2
+# CHECK-BE: bgelr+ 0                         # encoding: [0x4c,0xe0,0x00,0x20]
+# CHECK-LE: bgelr+ 0                         # encoding: [0x20,0x00,0xe0,0x4c]
+            bgelr+
+# CHECK-BE: bgectr+ 2                        # encoding: [0x4c,0xe8,0x04,0x20]
+# CHECK-LE: bgectr+ 2                        # encoding: [0x20,0x04,0xe8,0x4c]
+            bgectr+ 2
+# CHECK-BE: bgectr+ 0                        # encoding: [0x4c,0xe0,0x04,0x20]
+# CHECK-LE: bgectr+ 0                        # encoding: [0x20,0x04,0xe0,0x4c]
+            bgectr+
+# CHECK-BE: bgel+ 2, target                  # encoding: [0x40,0xe8,A,0bAAAAAA01]
+# CHECK-LE: bgel+ 2, target                  # encoding: [0bAAAAAA01,A,0xe8,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bgel+ 2, target
+# CHECK-BE: bgel+ 0, target                  # encoding: [0x40,0xe0,A,0bAAAAAA01]
+# CHECK-LE: bgel+ 0, target                  # encoding: [0bAAAAAA01,A,0xe0,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bgel+ target
+# CHECK-BE: bgela+ 2, target                 # encoding: [0x40,0xe8,A,0bAAAAAA11]
+# CHECK-LE: bgela+ 2, target                 # encoding: [0bAAAAAA11,A,0xe8,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bgela+ 2, target
+# CHECK-BE: bgela+ 0, target                 # encoding: [0x40,0xe0,A,0bAAAAAA11]
+# CHECK-LE: bgela+ 0, target                 # encoding: [0bAAAAAA11,A,0xe0,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bgela+ target
+# CHECK-BE: bgelrl+ 2                        # encoding: [0x4c,0xe8,0x00,0x21]
+# CHECK-LE: bgelrl+ 2                        # encoding: [0x21,0x00,0xe8,0x4c]
+            bgelrl+ 2
+# CHECK-BE: bgelrl+ 0                        # encoding: [0x4c,0xe0,0x00,0x21]
+# CHECK-LE: bgelrl+ 0                        # encoding: [0x21,0x00,0xe0,0x4c]
+            bgelrl+
+# CHECK-BE: bgectrl+ 2                       # encoding: [0x4c,0xe8,0x04,0x21]
+# CHECK-LE: bgectrl+ 2                       # encoding: [0x21,0x04,0xe8,0x4c]
+            bgectrl+ 2
+# CHECK-BE: bgectrl+ 0                       # encoding: [0x4c,0xe0,0x04,0x21]
+# CHECK-LE: bgectrl+ 0                       # encoding: [0x21,0x04,0xe0,0x4c]
+            bgectrl+
+
+# CHECK-BE: bge- 2, target                   # encoding: [0x40,0xc8,A,0bAAAAAA00]
+# CHECK-LE: bge- 2, target                   # encoding: [0bAAAAAA00,A,0xc8,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bge- 2, target
+# CHECK-BE: bge- 0, target                   # encoding: [0x40,0xc0,A,0bAAAAAA00]
+# CHECK-LE: bge- 0, target                   # encoding: [0bAAAAAA00,A,0xc0,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bge- target
+# CHECK-BE: bgea- 2, target                  # encoding: [0x40,0xc8,A,0bAAAAAA10]
+# CHECK-LE: bgea- 2, target                  # encoding: [0bAAAAAA10,A,0xc8,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bgea- 2, target
+# CHECK-BE: bgea- 0, target                  # encoding: [0x40,0xc0,A,0bAAAAAA10]
+# CHECK-LE: bgea- 0, target                  # encoding: [0bAAAAAA10,A,0xc0,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bgea- target
+# CHECK-BE: bgelr- 2                         # encoding: [0x4c,0xc8,0x00,0x20]
+# CHECK-LE: bgelr- 2                         # encoding: [0x20,0x00,0xc8,0x4c]
+            bgelr- 2
+# CHECK-BE: bgelr- 0                         # encoding: [0x4c,0xc0,0x00,0x20]
+# CHECK-LE: bgelr- 0                         # encoding: [0x20,0x00,0xc0,0x4c]
+            bgelr-
+# CHECK-BE: bgectr- 2                        # encoding: [0x4c,0xc8,0x04,0x20]
+# CHECK-LE: bgectr- 2                        # encoding: [0x20,0x04,0xc8,0x4c]
+            bgectr- 2
+# CHECK-BE: bgectr- 0                        # encoding: [0x4c,0xc0,0x04,0x20]
+# CHECK-LE: bgectr- 0                        # encoding: [0x20,0x04,0xc0,0x4c]
+            bgectr-
+# CHECK-BE: bgel- 2, target                  # encoding: [0x40,0xc8,A,0bAAAAAA01]
+# CHECK-LE: bgel- 2, target                  # encoding: [0bAAAAAA01,A,0xc8,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bgel- 2, target
+# CHECK-BE: bgel- 0, target                  # encoding: [0x40,0xc0,A,0bAAAAAA01]
+# CHECK-LE: bgel- 0, target                  # encoding: [0bAAAAAA01,A,0xc0,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bgel- target
+# CHECK-BE: bgela- 2, target                 # encoding: [0x40,0xc8,A,0bAAAAAA11]
+# CHECK-LE: bgela- 2, target                 # encoding: [0bAAAAAA11,A,0xc8,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bgela- 2, target
+# CHECK-BE: bgela- 0, target                 # encoding: [0x40,0xc0,A,0bAAAAAA11]
+# CHECK-LE: bgela- 0, target                 # encoding: [0bAAAAAA11,A,0xc0,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bgela- target
+# CHECK-BE: bgelrl- 2                        # encoding: [0x4c,0xc8,0x00,0x21]
+# CHECK-LE: bgelrl- 2                        # encoding: [0x21,0x00,0xc8,0x4c]
+            bgelrl- 2
+# CHECK-BE: bgelrl- 0                        # encoding: [0x4c,0xc0,0x00,0x21]
+# CHECK-LE: bgelrl- 0                        # encoding: [0x21,0x00,0xc0,0x4c]
+            bgelrl-
+# CHECK-BE: bgectrl- 2                       # encoding: [0x4c,0xc8,0x04,0x21]
+# CHECK-LE: bgectrl- 2                       # encoding: [0x21,0x04,0xc8,0x4c]
+            bgectrl- 2
+# CHECK-BE: bgectrl- 0                       # encoding: [0x4c,0xc0,0x04,0x21]
+# CHECK-LE: bgectrl- 0                       # encoding: [0x21,0x04,0xc0,0x4c]
+            bgectrl-
+
+# CHECK-BE: bgt 2, target                   # encoding: [0x41,0x89,A,0bAAAAAA00]
+# CHECK-LE: bgt 2, target                   # encoding: [0bAAAAAA00,A,0x89,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bgt 2, target
+# CHECK-BE: bgt 0, target                   # encoding: [0x41,0x81,A,0bAAAAAA00]
+# CHECK-LE: bgt 0, target                   # encoding: [0bAAAAAA00,A,0x81,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bgt target
+# CHECK-BE: bgta 2, target                  # encoding: [0x41,0x89,A,0bAAAAAA10]
+# CHECK-LE: bgta 2, target                  # encoding: [0bAAAAAA10,A,0x89,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bgta 2, target
+# CHECK-BE: bgta 0, target                  # encoding: [0x41,0x81,A,0bAAAAAA10]
+# CHECK-LE: bgta 0, target                  # encoding: [0bAAAAAA10,A,0x81,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bgta target
+# CHECK-BE: bgtlr 2                         # encoding: [0x4d,0x89,0x00,0x20]
+# CHECK-LE: bgtlr 2                         # encoding: [0x20,0x00,0x89,0x4d]
+            bgtlr 2
+# CHECK-BE: bgtlr 0                         # encoding: [0x4d,0x81,0x00,0x20]
+# CHECK-LE: bgtlr 0                         # encoding: [0x20,0x00,0x81,0x4d]
+            bgtlr
+# CHECK-BE: bgtctr 2                        # encoding: [0x4d,0x89,0x04,0x20]
+# CHECK-LE: bgtctr 2                        # encoding: [0x20,0x04,0x89,0x4d]
+            bgtctr 2
+# CHECK-BE: bgtctr 0                        # encoding: [0x4d,0x81,0x04,0x20]
+# CHECK-LE: bgtctr 0                        # encoding: [0x20,0x04,0x81,0x4d]
+            bgtctr
+# CHECK-BE: bgtl 2, target                  # encoding: [0x41,0x89,A,0bAAAAAA01]
+# CHECK-LE: bgtl 2, target                  # encoding: [0bAAAAAA01,A,0x89,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bgtl 2, target
+# CHECK-BE: bgtl 0, target                  # encoding: [0x41,0x81,A,0bAAAAAA01]
+# CHECK-LE: bgtl 0, target                  # encoding: [0bAAAAAA01,A,0x81,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bgtl target
+# CHECK-BE: bgtla 2, target                 # encoding: [0x41,0x89,A,0bAAAAAA11]
+# CHECK-LE: bgtla 2, target                 # encoding: [0bAAAAAA11,A,0x89,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bgtla 2, target
+# CHECK-BE: bgtla 0, target                 # encoding: [0x41,0x81,A,0bAAAAAA11]
+# CHECK-LE: bgtla 0, target                 # encoding: [0bAAAAAA11,A,0x81,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bgtla target
+# CHECK-BE: bgtlrl 2                        # encoding: [0x4d,0x89,0x00,0x21]
+# CHECK-LE: bgtlrl 2                        # encoding: [0x21,0x00,0x89,0x4d]
+            bgtlrl 2
+# CHECK-BE: bgtlrl 0                        # encoding: [0x4d,0x81,0x00,0x21]
+# CHECK-LE: bgtlrl 0                        # encoding: [0x21,0x00,0x81,0x4d]
+            bgtlrl
+# CHECK-BE: bgtctrl 2                       # encoding: [0x4d,0x89,0x04,0x21]
+# CHECK-LE: bgtctrl 2                       # encoding: [0x21,0x04,0x89,0x4d]
+            bgtctrl 2
+# CHECK-BE: bgtctrl 0                       # encoding: [0x4d,0x81,0x04,0x21]
+# CHECK-LE: bgtctrl 0                       # encoding: [0x21,0x04,0x81,0x4d]
+            bgtctrl
+
+# CHECK-BE: bgt+ 2, target                  # encoding: [0x41,0xe9,A,0bAAAAAA00]
+# CHECK-LE: bgt+ 2, target                  # encoding: [0bAAAAAA00,A,0xe9,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bgt+ 2, target
+# CHECK-BE: bgt+ 0, target                  # encoding: [0x41,0xe1,A,0bAAAAAA00]
+# CHECK-LE: bgt+ 0, target                  # encoding: [0bAAAAAA00,A,0xe1,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bgt+ target
+# CHECK-BE: bgta+ 2, target                 # encoding: [0x41,0xe9,A,0bAAAAAA10]
+# CHECK-LE: bgta+ 2, target                 # encoding: [0bAAAAAA10,A,0xe9,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bgta+ 2, target
+# CHECK-BE: bgta+ 0, target                 # encoding: [0x41,0xe1,A,0bAAAAAA10]
+# CHECK-LE: bgta+ 0, target                 # encoding: [0bAAAAAA10,A,0xe1,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bgta+ target
+# CHECK-BE: bgtlr+ 2                        # encoding: [0x4d,0xe9,0x00,0x20]
+# CHECK-LE: bgtlr+ 2                        # encoding: [0x20,0x00,0xe9,0x4d]
+            bgtlr+ 2
+# CHECK-BE: bgtlr+ 0                        # encoding: [0x4d,0xe1,0x00,0x20]
+# CHECK-LE: bgtlr+ 0                        # encoding: [0x20,0x00,0xe1,0x4d]
+            bgtlr+
+# CHECK-BE: bgtctr+ 2                       # encoding: [0x4d,0xe9,0x04,0x20]
+# CHECK-LE: bgtctr+ 2                       # encoding: [0x20,0x04,0xe9,0x4d]
+            bgtctr+ 2
+# CHECK-BE: bgtctr+ 0                       # encoding: [0x4d,0xe1,0x04,0x20]
+# CHECK-LE: bgtctr+ 0                       # encoding: [0x20,0x04,0xe1,0x4d]
+            bgtctr+
+# CHECK-BE: bgtl+ 2, target                 # encoding: [0x41,0xe9,A,0bAAAAAA01]
+# CHECK-LE: bgtl+ 2, target                 # encoding: [0bAAAAAA01,A,0xe9,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bgtl+ 2, target
+# CHECK-BE: bgtl+ 0, target                 # encoding: [0x41,0xe1,A,0bAAAAAA01]
+# CHECK-LE: bgtl+ 0, target                 # encoding: [0bAAAAAA01,A,0xe1,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bgtl+ target
+# CHECK-BE: bgtla+ 2, target                # encoding: [0x41,0xe9,A,0bAAAAAA11]
+# CHECK-LE: bgtla+ 2, target                # encoding: [0bAAAAAA11,A,0xe9,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bgtla+ 2, target
+# CHECK-BE: bgtla+ 0, target                # encoding: [0x41,0xe1,A,0bAAAAAA11]
+# CHECK-LE: bgtla+ 0, target                # encoding: [0bAAAAAA11,A,0xe1,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bgtla+ target
+# CHECK-BE: bgtlrl+ 2                       # encoding: [0x4d,0xe9,0x00,0x21]
+# CHECK-LE: bgtlrl+ 2                       # encoding: [0x21,0x00,0xe9,0x4d]
+            bgtlrl+ 2
+# CHECK-BE: bgtlrl+ 0                       # encoding: [0x4d,0xe1,0x00,0x21]
+# CHECK-LE: bgtlrl+ 0                       # encoding: [0x21,0x00,0xe1,0x4d]
+            bgtlrl+
+# CHECK-BE: bgtctrl+ 2                      # encoding: [0x4d,0xe9,0x04,0x21]
+# CHECK-LE: bgtctrl+ 2                      # encoding: [0x21,0x04,0xe9,0x4d]
+            bgtctrl+ 2
+# CHECK-BE: bgtctrl+ 0                      # encoding: [0x4d,0xe1,0x04,0x21]
+# CHECK-LE: bgtctrl+ 0                      # encoding: [0x21,0x04,0xe1,0x4d]
+            bgtctrl+
+
+# CHECK-BE: bgt- 2, target                  # encoding: [0x41,0xc9,A,0bAAAAAA00]
+# CHECK-LE: bgt- 2, target                  # encoding: [0bAAAAAA00,A,0xc9,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bgt- 2, target
+# CHECK-BE: bgt- 0, target                  # encoding: [0x41,0xc1,A,0bAAAAAA00]
+# CHECK-LE: bgt- 0, target                  # encoding: [0bAAAAAA00,A,0xc1,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bgt- target
+# CHECK-BE: bgta- 2, target                 # encoding: [0x41,0xc9,A,0bAAAAAA10]
+# CHECK-LE: bgta- 2, target                 # encoding: [0bAAAAAA10,A,0xc9,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bgta- 2, target
+# CHECK-BE: bgta- 0, target                 # encoding: [0x41,0xc1,A,0bAAAAAA10]
+# CHECK-LE: bgta- 0, target                 # encoding: [0bAAAAAA10,A,0xc1,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bgta- target
+# CHECK-BE: bgtlr- 2                        # encoding: [0x4d,0xc9,0x00,0x20]
+# CHECK-LE: bgtlr- 2                        # encoding: [0x20,0x00,0xc9,0x4d]
+            bgtlr- 2
+# CHECK-BE: bgtlr- 0                        # encoding: [0x4d,0xc1,0x00,0x20]
+# CHECK-LE: bgtlr- 0                        # encoding: [0x20,0x00,0xc1,0x4d]
+            bgtlr-
+# CHECK-BE: bgtctr- 2                       # encoding: [0x4d,0xc9,0x04,0x20]
+# CHECK-LE: bgtctr- 2                       # encoding: [0x20,0x04,0xc9,0x4d]
+            bgtctr- 2
+# CHECK-BE: bgtctr- 0                       # encoding: [0x4d,0xc1,0x04,0x20]
+# CHECK-LE: bgtctr- 0                       # encoding: [0x20,0x04,0xc1,0x4d]
+            bgtctr-
+# CHECK-BE: bgtl- 2, target                 # encoding: [0x41,0xc9,A,0bAAAAAA01]
+# CHECK-LE: bgtl- 2, target                 # encoding: [0bAAAAAA01,A,0xc9,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bgtl- 2, target
+# CHECK-BE: bgtl- 0, target                 # encoding: [0x41,0xc1,A,0bAAAAAA01]
+# CHECK-LE: bgtl- 0, target                 # encoding: [0bAAAAAA01,A,0xc1,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bgtl- target
+# CHECK-BE: bgtla- 2, target                # encoding: [0x41,0xc9,A,0bAAAAAA11]
+# CHECK-LE: bgtla- 2, target                # encoding: [0bAAAAAA11,A,0xc9,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bgtla- 2, target
+# CHECK-BE: bgtla- 0, target                # encoding: [0x41,0xc1,A,0bAAAAAA11]
+# CHECK-LE: bgtla- 0, target                # encoding: [0bAAAAAA11,A,0xc1,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bgtla- target
+# CHECK-BE: bgtlrl- 2                       # encoding: [0x4d,0xc9,0x00,0x21]
+# CHECK-LE: bgtlrl- 2                       # encoding: [0x21,0x00,0xc9,0x4d]
+            bgtlrl- 2
+# CHECK-BE: bgtlrl- 0                       # encoding: [0x4d,0xc1,0x00,0x21]
+# CHECK-LE: bgtlrl- 0                       # encoding: [0x21,0x00,0xc1,0x4d]
+            bgtlrl-
+# CHECK-BE: bgtctrl- 2                      # encoding: [0x4d,0xc9,0x04,0x21]
+# CHECK-LE: bgtctrl- 2                      # encoding: [0x21,0x04,0xc9,0x4d]
+            bgtctrl- 2
+# CHECK-BE: bgtctrl- 0                      # encoding: [0x4d,0xc1,0x04,0x21]
+# CHECK-LE: bgtctrl- 0                      # encoding: [0x21,0x04,0xc1,0x4d]
+            bgtctrl-
+
+# CHECK-BE: bge 2, target                   # encoding: [0x40,0x88,A,0bAAAAAA00]
+# CHECK-LE: bge 2, target                   # encoding: [0bAAAAAA00,A,0x88,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bnl 2, target
+# CHECK-BE: bge 0, target                   # encoding: [0x40,0x80,A,0bAAAAAA00]
+# CHECK-LE: bge 0, target                   # encoding: [0bAAAAAA00,A,0x80,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bnl target
+# CHECK-BE: bgea 2, target                  # encoding: [0x40,0x88,A,0bAAAAAA10]
+# CHECK-LE: bgea 2, target                  # encoding: [0bAAAAAA10,A,0x88,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnla 2, target
+# CHECK-BE: bgea 0, target                  # encoding: [0x40,0x80,A,0bAAAAAA10]
+# CHECK-LE: bgea 0, target                  # encoding: [0bAAAAAA10,A,0x80,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnla target
+# CHECK-BE: bgelr 2                         # encoding: [0x4c,0x88,0x00,0x20]
+# CHECK-LE: bgelr 2                         # encoding: [0x20,0x00,0x88,0x4c]
+            bnllr 2
+# CHECK-BE: bgelr 0                         # encoding: [0x4c,0x80,0x00,0x20]
+# CHECK-LE: bgelr 0                         # encoding: [0x20,0x00,0x80,0x4c]
+            bnllr
+# CHECK-BE: bgectr 2                        # encoding: [0x4c,0x88,0x04,0x20]
+# CHECK-LE: bgectr 2                        # encoding: [0x20,0x04,0x88,0x4c]
+            bnlctr 2
+# CHECK-BE: bgectr 0                        # encoding: [0x4c,0x80,0x04,0x20]
+# CHECK-LE: bgectr 0                        # encoding: [0x20,0x04,0x80,0x4c]
+            bnlctr
+# CHECK-BE: bgel 2, target                  # encoding: [0x40,0x88,A,0bAAAAAA01]
+# CHECK-LE: bgel 2, target                  # encoding: [0bAAAAAA01,A,0x88,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bnll 2, target
+# CHECK-BE: bgel 0, target                  # encoding: [0x40,0x80,A,0bAAAAAA01]
+# CHECK-LE: bgel 0, target                  # encoding: [0bAAAAAA01,A,0x80,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bnll target
+# CHECK-BE: bgela 2, target                  # encoding: [0x40,0x88,A,0bAAAAAA11]
+# CHECK-LE: bgela 2, target                  # encoding: [0bAAAAAA11,A,0x88,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnlla 2, target
+# CHECK-BE: bgela 0, target                  # encoding: [0x40,0x80,A,0bAAAAAA11]
+# CHECK-LE: bgela 0, target                  # encoding: [0bAAAAAA11,A,0x80,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnlla target
+# CHECK-BE: bgelrl 2                        # encoding: [0x4c,0x88,0x00,0x21]
+# CHECK-LE: bgelrl 2                        # encoding: [0x21,0x00,0x88,0x4c]
+            bnllrl 2
+# CHECK-BE: bgelrl 0                        # encoding: [0x4c,0x80,0x00,0x21]
+# CHECK-LE: bgelrl 0                        # encoding: [0x21,0x00,0x80,0x4c]
+            bnllrl
+# CHECK-BE: bgectrl 2                       # encoding: [0x4c,0x88,0x04,0x21]
+# CHECK-LE: bgectrl 2                       # encoding: [0x21,0x04,0x88,0x4c]
+            bnlctrl 2
+# CHECK-BE: bgectrl 0                       # encoding: [0x4c,0x80,0x04,0x21]
+# CHECK-LE: bgectrl 0                       # encoding: [0x21,0x04,0x80,0x4c]
+            bnlctrl
+
+# CHECK-BE: bge+ 2, target                  # encoding: [0x40,0xe8,A,0bAAAAAA00]
+# CHECK-LE: bge+ 2, target                  # encoding: [0bAAAAAA00,A,0xe8,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bnl+ 2, target
+# CHECK-BE: bge+ 0, target                  # encoding: [0x40,0xe0,A,0bAAAAAA00]
+# CHECK-LE: bge+ 0, target                  # encoding: [0bAAAAAA00,A,0xe0,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bnl+ target
+# CHECK-BE: bgea+ 2, target                 # encoding: [0x40,0xe8,A,0bAAAAAA10]
+# CHECK-LE: bgea+ 2, target                 # encoding: [0bAAAAAA10,A,0xe8,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnla+ 2, target
+# CHECK-BE: bgea+ 0, target                 # encoding: [0x40,0xe0,A,0bAAAAAA10]
+# CHECK-LE: bgea+ 0, target                 # encoding: [0bAAAAAA10,A,0xe0,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnla+ target
+# CHECK-BE: bgelr+ 2                        # encoding: [0x4c,0xe8,0x00,0x20]
+# CHECK-LE: bgelr+ 2                        # encoding: [0x20,0x00,0xe8,0x4c]
+            bnllr+ 2
+# CHECK-BE: bgelr+ 0                        # encoding: [0x4c,0xe0,0x00,0x20]
+# CHECK-LE: bgelr+ 0                        # encoding: [0x20,0x00,0xe0,0x4c]
+            bnllr+
+# CHECK-BE: bgectr+ 2                       # encoding: [0x4c,0xe8,0x04,0x20]
+# CHECK-LE: bgectr+ 2                       # encoding: [0x20,0x04,0xe8,0x4c]
+            bnlctr+ 2
+# CHECK-BE: bgectr+ 0                       # encoding: [0x4c,0xe0,0x04,0x20]
+# CHECK-LE: bgectr+ 0                       # encoding: [0x20,0x04,0xe0,0x4c]
+            bnlctr+
+# CHECK-BE: bgel+ 2, target                 # encoding: [0x40,0xe8,A,0bAAAAAA01]
+# CHECK-LE: bgel+ 2, target                 # encoding: [0bAAAAAA01,A,0xe8,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bnll+ 2, target
+# CHECK-BE: bgel+ 0, target                 # encoding: [0x40,0xe0,A,0bAAAAAA01]
+# CHECK-LE: bgel+ 0, target                 # encoding: [0bAAAAAA01,A,0xe0,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bnll+ target
+# CHECK-BE: bgela+ 2, target                # encoding: [0x40,0xe8,A,0bAAAAAA11]
+# CHECK-LE: bgela+ 2, target                # encoding: [0bAAAAAA11,A,0xe8,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnlla+ 2, target
+# CHECK-BE: bgela+ 0, target                # encoding: [0x40,0xe0,A,0bAAAAAA11]
+# CHECK-LE: bgela+ 0, target                # encoding: [0bAAAAAA11,A,0xe0,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnlla+ target
+# CHECK-BE: bgelrl+ 2                       # encoding: [0x4c,0xe8,0x00,0x21]
+# CHECK-LE: bgelrl+ 2                       # encoding: [0x21,0x00,0xe8,0x4c]
+            bnllrl+ 2
+# CHECK-BE: bgelrl+ 0                       # encoding: [0x4c,0xe0,0x00,0x21]
+# CHECK-LE: bgelrl+ 0                       # encoding: [0x21,0x00,0xe0,0x4c]
+            bnllrl+
+# CHECK-BE: bgectrl+ 2                      # encoding: [0x4c,0xe8,0x04,0x21]
+# CHECK-LE: bgectrl+ 2                      # encoding: [0x21,0x04,0xe8,0x4c]
+            bnlctrl+ 2
+# CHECK-BE: bgectrl+ 0                      # encoding: [0x4c,0xe0,0x04,0x21]
+# CHECK-LE: bgectrl+ 0                      # encoding: [0x21,0x04,0xe0,0x4c]
+            bnlctrl+
+
+# CHECK-BE: bge- 2, target                  # encoding: [0x40,0xc8,A,0bAAAAAA00]
+# CHECK-LE: bge- 2, target                  # encoding: [0bAAAAAA00,A,0xc8,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bnl- 2, target
+# CHECK-BE: bge- 0, target                  # encoding: [0x40,0xc0,A,0bAAAAAA00]
+# CHECK-LE: bge- 0, target                  # encoding: [0bAAAAAA00,A,0xc0,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bnl- target
+# CHECK-BE: bgea- 2, target                 # encoding: [0x40,0xc8,A,0bAAAAAA10]
+# CHECK-LE: bgea- 2, target                 # encoding: [0bAAAAAA10,A,0xc8,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnla- 2, target
+# CHECK-BE: bgea- 0, target                 # encoding: [0x40,0xc0,A,0bAAAAAA10]
+# CHECK-LE: bgea- 0, target                 # encoding: [0bAAAAAA10,A,0xc0,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnla- target
+# CHECK-BE: bgelr- 2                        # encoding: [0x4c,0xc8,0x00,0x20]
+# CHECK-LE: bgelr- 2                        # encoding: [0x20,0x00,0xc8,0x4c]
+            bnllr- 2
+# CHECK-BE: bgelr- 0                        # encoding: [0x4c,0xc0,0x00,0x20]
+# CHECK-LE: bgelr- 0                        # encoding: [0x20,0x00,0xc0,0x4c]
+            bnllr-
+# CHECK-BE: bgectr- 2                       # encoding: [0x4c,0xc8,0x04,0x20]
+# CHECK-LE: bgectr- 2                       # encoding: [0x20,0x04,0xc8,0x4c]
+            bnlctr- 2
+# CHECK-BE: bgectr- 0                       # encoding: [0x4c,0xc0,0x04,0x20]
+# CHECK-LE: bgectr- 0                       # encoding: [0x20,0x04,0xc0,0x4c]
+            bnlctr-
+# CHECK-BE: bgel- 2, target                 # encoding: [0x40,0xc8,A,0bAAAAAA01]
+# CHECK-LE: bgel- 2, target                 # encoding: [0bAAAAAA01,A,0xc8,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bnll- 2, target
+# CHECK-BE: bgel- 0, target                 # encoding: [0x40,0xc0,A,0bAAAAAA01]
+# CHECK-LE: bgel- 0, target                 # encoding: [0bAAAAAA01,A,0xc0,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bnll- target
+# CHECK-BE: bgela- 2, target                # encoding: [0x40,0xc8,A,0bAAAAAA11]
+# CHECK-LE: bgela- 2, target                # encoding: [0bAAAAAA11,A,0xc8,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnlla- 2, target
+# CHECK-BE: bgela- 0, target                # encoding: [0x40,0xc0,A,0bAAAAAA11]
+# CHECK-LE: bgela- 0, target                # encoding: [0bAAAAAA11,A,0xc0,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnlla- target
+# CHECK-BE: bgelrl- 2                       # encoding: [0x4c,0xc8,0x00,0x21]
+# CHECK-LE: bgelrl- 2                       # encoding: [0x21,0x00,0xc8,0x4c]
+            bnllrl- 2
+# CHECK-BE: bgelrl- 0                       # encoding: [0x4c,0xc0,0x00,0x21]
+# CHECK-LE: bgelrl- 0                       # encoding: [0x21,0x00,0xc0,0x4c]
+            bnllrl-
+# CHECK-BE: bgectrl- 2                      # encoding: [0x4c,0xc8,0x04,0x21]
+# CHECK-LE: bgectrl- 2                      # encoding: [0x21,0x04,0xc8,0x4c]
+            bnlctrl- 2
+# CHECK-BE: bgectrl- 0                      # encoding: [0x4c,0xc0,0x04,0x21]
+# CHECK-LE: bgectrl- 0                      # encoding: [0x21,0x04,0xc0,0x4c]
+            bnlctrl-
+
+# CHECK-BE: bne 2, target                   # encoding: [0x40,0x8a,A,0bAAAAAA00]
+# CHECK-LE: bne 2, target                   # encoding: [0bAAAAAA00,A,0x8a,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bne 2, target
+# CHECK-BE: bne 0, target                   # encoding: [0x40,0x82,A,0bAAAAAA00]
+# CHECK-LE: bne 0, target                   # encoding: [0bAAAAAA00,A,0x82,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bne target
+# CHECK-BE: bnea 2, target                  # encoding: [0x40,0x8a,A,0bAAAAAA10]
+# CHECK-LE: bnea 2, target                  # encoding: [0bAAAAAA10,A,0x8a,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnea 2, target
+# CHECK-BE: bnea 0, target                  # encoding: [0x40,0x82,A,0bAAAAAA10]
+# CHECK-LE: bnea 0, target                  # encoding: [0bAAAAAA10,A,0x82,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnea target
+# CHECK-BE: bnelr 2                         # encoding: [0x4c,0x8a,0x00,0x20]
+# CHECK-LE: bnelr 2                         # encoding: [0x20,0x00,0x8a,0x4c]
+            bnelr 2
+# CHECK-BE: bnelr 0                         # encoding: [0x4c,0x82,0x00,0x20]
+# CHECK-LE: bnelr 0                         # encoding: [0x20,0x00,0x82,0x4c]
+            bnelr
+# CHECK-BE: bnectr 2                        # encoding: [0x4c,0x8a,0x04,0x20]
+# CHECK-LE: bnectr 2                        # encoding: [0x20,0x04,0x8a,0x4c]
+            bnectr 2
+# CHECK-BE: bnectr 0                        # encoding: [0x4c,0x82,0x04,0x20]
+# CHECK-LE: bnectr 0                        # encoding: [0x20,0x04,0x82,0x4c]
+            bnectr
+# CHECK-BE: bnel 2, target                  # encoding: [0x40,0x8a,A,0bAAAAAA01]
+# CHECK-LE: bnel 2, target                  # encoding: [0bAAAAAA01,A,0x8a,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bnel 2, target
+# CHECK-BE: bnel 0, target                  # encoding: [0x40,0x82,A,0bAAAAAA01]
+# CHECK-LE: bnel 0, target                  # encoding: [0bAAAAAA01,A,0x82,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bnel target
+# CHECK-BE: bnela 2, target                 # encoding: [0x40,0x8a,A,0bAAAAAA11]
+# CHECK-LE: bnela 2, target                 # encoding: [0bAAAAAA11,A,0x8a,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnela 2, target
+# CHECK-BE: bnela 0, target                 # encoding: [0x40,0x82,A,0bAAAAAA11]
+# CHECK-LE: bnela 0, target                 # encoding: [0bAAAAAA11,A,0x82,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnela target
+# CHECK-BE: bnelrl 2                        # encoding: [0x4c,0x8a,0x00,0x21]
+# CHECK-LE: bnelrl 2                        # encoding: [0x21,0x00,0x8a,0x4c]
+            bnelrl 2
+# CHECK-BE: bnelrl 0                        # encoding: [0x4c,0x82,0x00,0x21]
+# CHECK-LE: bnelrl 0                        # encoding: [0x21,0x00,0x82,0x4c]
+            bnelrl
+# CHECK-BE: bnectrl 2                       # encoding: [0x4c,0x8a,0x04,0x21]
+# CHECK-LE: bnectrl 2                       # encoding: [0x21,0x04,0x8a,0x4c]
+            bnectrl 2
+# CHECK-BE: bnectrl 0                       # encoding: [0x4c,0x82,0x04,0x21]
+# CHECK-LE: bnectrl 0                       # encoding: [0x21,0x04,0x82,0x4c]
+            bnectrl
+
+# CHECK-BE: bne+ 2, target                  # encoding: [0x40,0xea,A,0bAAAAAA00]
+# CHECK-LE: bne+ 2, target                  # encoding: [0bAAAAAA00,A,0xea,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bne+ 2, target
+# CHECK-BE: bne+ 0, target                  # encoding: [0x40,0xe2,A,0bAAAAAA00]
+# CHECK-LE: bne+ 0, target                  # encoding: [0bAAAAAA00,A,0xe2,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bne+ target
+# CHECK-BE: bnea+ 2, target                 # encoding: [0x40,0xea,A,0bAAAAAA10]
+# CHECK-LE: bnea+ 2, target                 # encoding: [0bAAAAAA10,A,0xea,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnea+ 2, target
+# CHECK-BE: bnea+ 0, target                 # encoding: [0x40,0xe2,A,0bAAAAAA10]
+# CHECK-LE: bnea+ 0, target                 # encoding: [0bAAAAAA10,A,0xe2,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnea+ target
+# CHECK-BE: bnelr+ 2                        # encoding: [0x4c,0xea,0x00,0x20]
+# CHECK-LE: bnelr+ 2                        # encoding: [0x20,0x00,0xea,0x4c]
+            bnelr+ 2
+# CHECK-BE: bnelr+ 0                        # encoding: [0x4c,0xe2,0x00,0x20]
+# CHECK-LE: bnelr+ 0                        # encoding: [0x20,0x00,0xe2,0x4c]
+            bnelr+
+# CHECK-BE: bnectr+ 2                       # encoding: [0x4c,0xea,0x04,0x20]
+# CHECK-LE: bnectr+ 2                       # encoding: [0x20,0x04,0xea,0x4c]
+            bnectr+ 2
+# CHECK-BE: bnectr+ 0                       # encoding: [0x4c,0xe2,0x04,0x20]
+# CHECK-LE: bnectr+ 0                       # encoding: [0x20,0x04,0xe2,0x4c]
+            bnectr+
+# CHECK-BE: bnel+ 2, target                 # encoding: [0x40,0xea,A,0bAAAAAA01]
+# CHECK-LE: bnel+ 2, target                 # encoding: [0bAAAAAA01,A,0xea,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bnel+ 2, target
+# CHECK-BE: bnel+ 0, target                 # encoding: [0x40,0xe2,A,0bAAAAAA01]
+# CHECK-LE: bnel+ 0, target                 # encoding: [0bAAAAAA01,A,0xe2,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bnel+ target
+# CHECK-BE: bnela+ 2, target                # encoding: [0x40,0xea,A,0bAAAAAA11]
+# CHECK-LE: bnela+ 2, target                # encoding: [0bAAAAAA11,A,0xea,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnela+ 2, target
+# CHECK-BE: bnela+ 0, target                # encoding: [0x40,0xe2,A,0bAAAAAA11]
+# CHECK-LE: bnela+ 0, target                # encoding: [0bAAAAAA11,A,0xe2,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnela+ target
+# CHECK-BE: bnelrl+ 2                       # encoding: [0x4c,0xea,0x00,0x21]
+# CHECK-LE: bnelrl+ 2                       # encoding: [0x21,0x00,0xea,0x4c]
+            bnelrl+ 2
+# CHECK-BE: bnelrl+ 0                       # encoding: [0x4c,0xe2,0x00,0x21]
+# CHECK-LE: bnelrl+ 0                       # encoding: [0x21,0x00,0xe2,0x4c]
+            bnelrl+
+# CHECK-BE: bnectrl+ 2                      # encoding: [0x4c,0xea,0x04,0x21]
+# CHECK-LE: bnectrl+ 2                      # encoding: [0x21,0x04,0xea,0x4c]
+            bnectrl+ 2
+# CHECK-BE: bnectrl+ 0                      # encoding: [0x4c,0xe2,0x04,0x21]
+# CHECK-LE: bnectrl+ 0                      # encoding: [0x21,0x04,0xe2,0x4c]
+            bnectrl+
+
+# CHECK-BE: bne- 2, target                  # encoding: [0x40,0xca,A,0bAAAAAA00]
+# CHECK-LE: bne- 2, target                  # encoding: [0bAAAAAA00,A,0xca,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bne- 2, target
+# CHECK-BE: bne- 0, target                  # encoding: [0x40,0xc2,A,0bAAAAAA00]
+# CHECK-LE: bne- 0, target                  # encoding: [0bAAAAAA00,A,0xc2,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bne- target
+# CHECK-BE: bnea- 2, target                 # encoding: [0x40,0xca,A,0bAAAAAA10]
+# CHECK-LE: bnea- 2, target                 # encoding: [0bAAAAAA10,A,0xca,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnea- 2, target
+# CHECK-BE: bnea- 0, target                 # encoding: [0x40,0xc2,A,0bAAAAAA10]
+# CHECK-LE: bnea- 0, target                 # encoding: [0bAAAAAA10,A,0xc2,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnea- target
+# CHECK-BE: bnelr- 2                        # encoding: [0x4c,0xca,0x00,0x20]
+# CHECK-LE: bnelr- 2                        # encoding: [0x20,0x00,0xca,0x4c]
+            bnelr- 2
+# CHECK-BE: bnelr- 0                        # encoding: [0x4c,0xc2,0x00,0x20]
+# CHECK-LE: bnelr- 0                        # encoding: [0x20,0x00,0xc2,0x4c]
+            bnelr-
+# CHECK-BE: bnectr- 2                       # encoding: [0x4c,0xca,0x04,0x20]
+# CHECK-LE: bnectr- 2                       # encoding: [0x20,0x04,0xca,0x4c]
+            bnectr- 2
+# CHECK-BE: bnectr- 0                       # encoding: [0x4c,0xc2,0x04,0x20]
+# CHECK-LE: bnectr- 0                       # encoding: [0x20,0x04,0xc2,0x4c]
+            bnectr-
+# CHECK-BE: bnel- 2, target                 # encoding: [0x40,0xca,A,0bAAAAAA01]
+# CHECK-LE: bnel- 2, target                 # encoding: [0bAAAAAA01,A,0xca,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bnel- 2, target
+# CHECK-BE: bnel- 0, target                 # encoding: [0x40,0xc2,A,0bAAAAAA01]
+# CHECK-LE: bnel- 0, target                 # encoding: [0bAAAAAA01,A,0xc2,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bnel- target
+# CHECK-BE: bnela- 2, target                # encoding: [0x40,0xca,A,0bAAAAAA11]
+# CHECK-LE: bnela- 2, target                # encoding: [0bAAAAAA11,A,0xca,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnela- 2, target
+# CHECK-BE: bnela- 0, target                # encoding: [0x40,0xc2,A,0bAAAAAA11]
+# CHECK-LE: bnela- 0, target                # encoding: [0bAAAAAA11,A,0xc2,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnela- target
+# CHECK-BE: bnelrl- 2                       # encoding: [0x4c,0xca,0x00,0x21]
+# CHECK-LE: bnelrl- 2                       # encoding: [0x21,0x00,0xca,0x4c]
+            bnelrl- 2
+# CHECK-BE: bnelrl- 0                       # encoding: [0x4c,0xc2,0x00,0x21]
+# CHECK-LE: bnelrl- 0                       # encoding: [0x21,0x00,0xc2,0x4c]
+            bnelrl-
+# CHECK-BE: bnectrl- 2                      # encoding: [0x4c,0xca,0x04,0x21]
+# CHECK-LE: bnectrl- 2                      # encoding: [0x21,0x04,0xca,0x4c]
+            bnectrl- 2
+# CHECK-BE: bnectrl- 0                      # encoding: [0x4c,0xc2,0x04,0x21]
+# CHECK-LE: bnectrl- 0                      # encoding: [0x21,0x04,0xc2,0x4c]
+            bnectrl-
+
+# CHECK-BE: ble 2, target                   # encoding: [0x40,0x89,A,0bAAAAAA00]
+# CHECK-LE: ble 2, target                   # encoding: [0bAAAAAA00,A,0x89,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bng 2, target
+# CHECK-BE: ble 0, target                   # encoding: [0x40,0x81,A,0bAAAAAA00]
+# CHECK-LE: ble 0, target                   # encoding: [0bAAAAAA00,A,0x81,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bng target
+# CHECK-BE: blea 2, target                  # encoding: [0x40,0x89,A,0bAAAAAA10]
+# CHECK-LE: blea 2, target                  # encoding: [0bAAAAAA10,A,0x89,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnga 2, target
+# CHECK-BE: blea 0, target                  # encoding: [0x40,0x81,A,0bAAAAAA10]
+# CHECK-LE: blea 0, target                  # encoding: [0bAAAAAA10,A,0x81,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnga target
+# CHECK-BE: blelr 2                         # encoding: [0x4c,0x89,0x00,0x20]
+# CHECK-LE: blelr 2                         # encoding: [0x20,0x00,0x89,0x4c]
+            bnglr 2
+# CHECK-BE: blelr 0                         # encoding: [0x4c,0x81,0x00,0x20]
+# CHECK-LE: blelr 0                         # encoding: [0x20,0x00,0x81,0x4c]
+            bnglr
+# CHECK-BE: blectr 2                        # encoding: [0x4c,0x89,0x04,0x20]
+# CHECK-LE: blectr 2                        # encoding: [0x20,0x04,0x89,0x4c]
+            bngctr 2
+# CHECK-BE: blectr 0                        # encoding: [0x4c,0x81,0x04,0x20]
+# CHECK-LE: blectr 0                        # encoding: [0x20,0x04,0x81,0x4c]
+            bngctr
+# CHECK-BE: blel 2, target                  # encoding: [0x40,0x89,A,0bAAAAAA01]
+# CHECK-LE: blel 2, target                  # encoding: [0bAAAAAA01,A,0x89,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bngl 2, target
+# CHECK-BE: blel 0, target                  # encoding: [0x40,0x81,A,0bAAAAAA01]
+# CHECK-LE: blel 0, target                  # encoding: [0bAAAAAA01,A,0x81,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bngl target
+# CHECK-BE: blela 2, target                 # encoding: [0x40,0x89,A,0bAAAAAA11]
+# CHECK-LE: blela 2, target                 # encoding: [0bAAAAAA11,A,0x89,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bngla 2, target
+# CHECK-BE: blela 0, target                 # encoding: [0x40,0x81,A,0bAAAAAA11]
+# CHECK-LE: blela 0, target                 # encoding: [0bAAAAAA11,A,0x81,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bngla target
+# CHECK-BE: blelrl 2                        # encoding: [0x4c,0x89,0x00,0x21]
+# CHECK-LE: blelrl 2                        # encoding: [0x21,0x00,0x89,0x4c]
+            bnglrl 2
+# CHECK-BE: blelrl 0                        # encoding: [0x4c,0x81,0x00,0x21]
+# CHECK-LE: blelrl 0                        # encoding: [0x21,0x00,0x81,0x4c]
+            bnglrl
+# CHECK-BE: blectrl 2                       # encoding: [0x4c,0x89,0x04,0x21]
+# CHECK-LE: blectrl 2                       # encoding: [0x21,0x04,0x89,0x4c]
+            bngctrl 2
+# CHECK-BE: blectrl 0                       # encoding: [0x4c,0x81,0x04,0x21]
+# CHECK-LE: blectrl 0                       # encoding: [0x21,0x04,0x81,0x4c]
+            bngctrl
+
+# CHECK-BE: ble+ 2, target                   # encoding: [0x40,0xe9,A,0bAAAAAA00]
+# CHECK-LE: ble+ 2, target                   # encoding: [0bAAAAAA00,A,0xe9,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bng+ 2, target
+# CHECK-BE: ble+ 0, target                   # encoding: [0x40,0xe1,A,0bAAAAAA00]
+# CHECK-LE: ble+ 0, target                   # encoding: [0bAAAAAA00,A,0xe1,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bng+ target
+# CHECK-BE: blea+ 2, target                  # encoding: [0x40,0xe9,A,0bAAAAAA10]
+# CHECK-LE: blea+ 2, target                  # encoding: [0bAAAAAA10,A,0xe9,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnga+ 2, target
+# CHECK-BE: blea+ 0, target                  # encoding: [0x40,0xe1,A,0bAAAAAA10]
+# CHECK-LE: blea+ 0, target                  # encoding: [0bAAAAAA10,A,0xe1,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnga+ target
+# CHECK-BE: blelr+ 2                         # encoding: [0x4c,0xe9,0x00,0x20]
+# CHECK-LE: blelr+ 2                         # encoding: [0x20,0x00,0xe9,0x4c]
+            bnglr+ 2
+# CHECK-BE: blelr+ 0                         # encoding: [0x4c,0xe1,0x00,0x20]
+# CHECK-LE: blelr+ 0                         # encoding: [0x20,0x00,0xe1,0x4c]
+            bnglr+
+# CHECK-BE: blectr+ 2                        # encoding: [0x4c,0xe9,0x04,0x20]
+# CHECK-LE: blectr+ 2                        # encoding: [0x20,0x04,0xe9,0x4c]
+            bngctr+ 2
+# CHECK-BE: blectr+ 0                        # encoding: [0x4c,0xe1,0x04,0x20]
+# CHECK-LE: blectr+ 0                        # encoding: [0x20,0x04,0xe1,0x4c]
+            bngctr+
+# CHECK-BE: blel+ 2, target                  # encoding: [0x40,0xe9,A,0bAAAAAA01]
+# CHECK-LE: blel+ 2, target                  # encoding: [0bAAAAAA01,A,0xe9,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bngl+ 2, target
+# CHECK-BE: blel+ 0, target                  # encoding: [0x40,0xe1,A,0bAAAAAA01]
+# CHECK-LE: blel+ 0, target                  # encoding: [0bAAAAAA01,A,0xe1,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bngl+ target
+# CHECK-BE: blela+ 2, target                 # encoding: [0x40,0xe9,A,0bAAAAAA11]
+# CHECK-LE: blela+ 2, target                 # encoding: [0bAAAAAA11,A,0xe9,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bngla+ 2, target
+# CHECK-BE: blela+ 0, target                 # encoding: [0x40,0xe1,A,0bAAAAAA11]
+# CHECK-LE: blela+ 0, target                 # encoding: [0bAAAAAA11,A,0xe1,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bngla+ target
+# CHECK-BE: blelrl+ 2                        # encoding: [0x4c,0xe9,0x00,0x21]
+# CHECK-LE: blelrl+ 2                        # encoding: [0x21,0x00,0xe9,0x4c]
+            bnglrl+ 2
+# CHECK-BE: blelrl+ 0                        # encoding: [0x4c,0xe1,0x00,0x21]
+# CHECK-LE: blelrl+ 0                        # encoding: [0x21,0x00,0xe1,0x4c]
+            bnglrl+
+# CHECK-BE: blectrl+ 2                       # encoding: [0x4c,0xe9,0x04,0x21]
+# CHECK-LE: blectrl+ 2                       # encoding: [0x21,0x04,0xe9,0x4c]
+            bngctrl+ 2
+# CHECK-BE: blectrl+ 0                       # encoding: [0x4c,0xe1,0x04,0x21]
+# CHECK-LE: blectrl+ 0                       # encoding: [0x21,0x04,0xe1,0x4c]
+            bngctrl+
+
+# CHECK-BE: ble- 2, target                   # encoding: [0x40,0xc9,A,0bAAAAAA00]
+# CHECK-LE: ble- 2, target                   # encoding: [0bAAAAAA00,A,0xc9,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bng- 2, target
+# CHECK-BE: ble- 0, target                   # encoding: [0x40,0xc1,A,0bAAAAAA00]
+# CHECK-LE: ble- 0, target                   # encoding: [0bAAAAAA00,A,0xc1,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bng- target
+# CHECK-BE: blea- 2, target                  # encoding: [0x40,0xc9,A,0bAAAAAA10]
+# CHECK-LE: blea- 2, target                  # encoding: [0bAAAAAA10,A,0xc9,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnga- 2, target
+# CHECK-BE: blea- 0, target                  # encoding: [0x40,0xc1,A,0bAAAAAA10]
+# CHECK-LE: blea- 0, target                  # encoding: [0bAAAAAA10,A,0xc1,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnga- target
+# CHECK-BE: blelr- 2                         # encoding: [0x4c,0xc9,0x00,0x20]
+# CHECK-LE: blelr- 2                         # encoding: [0x20,0x00,0xc9,0x4c]
+            bnglr- 2
+# CHECK-BE: blelr- 0                         # encoding: [0x4c,0xc1,0x00,0x20]
+# CHECK-LE: blelr- 0                         # encoding: [0x20,0x00,0xc1,0x4c]
+            bnglr-
+# CHECK-BE: blectr- 2                        # encoding: [0x4c,0xc9,0x04,0x20]
+# CHECK-LE: blectr- 2                        # encoding: [0x20,0x04,0xc9,0x4c]
+            bngctr- 2
+# CHECK-BE: blectr- 0                        # encoding: [0x4c,0xc1,0x04,0x20]
+# CHECK-LE: blectr- 0                        # encoding: [0x20,0x04,0xc1,0x4c]
+            bngctr-
+# CHECK-BE: blel- 2, target                  # encoding: [0x40,0xc9,A,0bAAAAAA01]
+# CHECK-LE: blel- 2, target                  # encoding: [0bAAAAAA01,A,0xc9,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bngl- 2, target
+# CHECK-BE: blel- 0, target                  # encoding: [0x40,0xc1,A,0bAAAAAA01]
+# CHECK-LE: blel- 0, target                  # encoding: [0bAAAAAA01,A,0xc1,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bngl- target
+# CHECK-BE: blela- 2, target                 # encoding: [0x40,0xc9,A,0bAAAAAA11]
+# CHECK-LE: blela- 2, target                 # encoding: [0bAAAAAA11,A,0xc9,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bngla- 2, target
+# CHECK-BE: blela- 0, target                 # encoding: [0x40,0xc1,A,0bAAAAAA11]
+# CHECK-LE: blela- 0, target                 # encoding: [0bAAAAAA11,A,0xc1,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bngla- target
+# CHECK-BE: blelrl- 2                        # encoding: [0x4c,0xc9,0x00,0x21]
+# CHECK-LE: blelrl- 2                        # encoding: [0x21,0x00,0xc9,0x4c]
+            bnglrl- 2
+# CHECK-BE: blelrl- 0                        # encoding: [0x4c,0xc1,0x00,0x21]
+# CHECK-LE: blelrl- 0                        # encoding: [0x21,0x00,0xc1,0x4c]
+            bnglrl-
+# CHECK-BE: blectrl- 2                       # encoding: [0x4c,0xc9,0x04,0x21]
+# CHECK-LE: blectrl- 2                       # encoding: [0x21,0x04,0xc9,0x4c]
+            bngctrl- 2
+# CHECK-BE: blectrl- 0                       # encoding: [0x4c,0xc1,0x04,0x21]
+# CHECK-LE: blectrl- 0                       # encoding: [0x21,0x04,0xc1,0x4c]
+            bngctrl-
+
+# CHECK-BE: bun 2, target                   # encoding: [0x41,0x8b,A,0bAAAAAA00]
+# CHECK-LE: bun 2, target                   # encoding: [0bAAAAAA00,A,0x8b,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bso 2, target
+# CHECK-BE: bun 0, target                   # encoding: [0x41,0x83,A,0bAAAAAA00]
+# CHECK-LE: bun 0, target                   # encoding: [0bAAAAAA00,A,0x83,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bso target
+# CHECK-BE: buna 2, target                  # encoding: [0x41,0x8b,A,0bAAAAAA10]
+# CHECK-LE: buna 2, target                  # encoding: [0bAAAAAA10,A,0x8b,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bsoa 2, target
+# CHECK-BE: buna 0, target                  # encoding: [0x41,0x83,A,0bAAAAAA10]
+# CHECK-LE: buna 0, target                  # encoding: [0bAAAAAA10,A,0x83,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bsoa target
+# CHECK-BE: bunlr 2                         # encoding: [0x4d,0x8b,0x00,0x20]
+# CHECK-LE: bunlr 2                         # encoding: [0x20,0x00,0x8b,0x4d]
+            bsolr 2
+# CHECK-BE: bunlr 0                         # encoding: [0x4d,0x83,0x00,0x20]
+# CHECK-LE: bunlr 0                         # encoding: [0x20,0x00,0x83,0x4d]
+            bsolr
+# CHECK-BE: bunctr 2                        # encoding: [0x4d,0x8b,0x04,0x20]
+# CHECK-LE: bunctr 2                        # encoding: [0x20,0x04,0x8b,0x4d]
+            bsoctr 2
+# CHECK-BE: bunctr 0                        # encoding: [0x4d,0x83,0x04,0x20]
+# CHECK-LE: bunctr 0                        # encoding: [0x20,0x04,0x83,0x4d]
+            bsoctr
+# CHECK-BE: bunl 2, target                  # encoding: [0x41,0x8b,A,0bAAAAAA01]
+# CHECK-LE: bunl 2, target                  # encoding: [0bAAAAAA01,A,0x8b,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bsol 2, target
+# CHECK-BE: bunl 0, target                  # encoding: [0x41,0x83,A,0bAAAAAA01]
+# CHECK-LE: bunl 0, target                  # encoding: [0bAAAAAA01,A,0x83,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bsol target
+# CHECK-BE: bunla 2, target                 # encoding: [0x41,0x8b,A,0bAAAAAA11]
+# CHECK-LE: bunla 2, target                 # encoding: [0bAAAAAA11,A,0x8b,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bsola 2, target
+# CHECK-BE: bunla 0, target                 # encoding: [0x41,0x83,A,0bAAAAAA11]
+# CHECK-LE: bunla 0, target                 # encoding: [0bAAAAAA11,A,0x83,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bsola target
+# CHECK-BE: bunlrl 2                        # encoding: [0x4d,0x8b,0x00,0x21]
+# CHECK-LE: bunlrl 2                        # encoding: [0x21,0x00,0x8b,0x4d]
+            bsolrl 2
+# CHECK-BE: bunlrl 0                        # encoding: [0x4d,0x83,0x00,0x21]
+# CHECK-LE: bunlrl 0                        # encoding: [0x21,0x00,0x83,0x4d]
+            bsolrl
+# CHECK-BE: bunctrl 2                       # encoding: [0x4d,0x8b,0x04,0x21]
+# CHECK-LE: bunctrl 2                       # encoding: [0x21,0x04,0x8b,0x4d]
+            bsoctrl 2
+# CHECK-BE: bunctrl 0                       # encoding: [0x4d,0x83,0x04,0x21]
+# CHECK-LE: bunctrl 0                       # encoding: [0x21,0x04,0x83,0x4d]
+            bsoctrl
+
+# CHECK-BE: bun+ 2, target                  # encoding: [0x41,0xeb,A,0bAAAAAA00]
+# CHECK-LE: bun+ 2, target                  # encoding: [0bAAAAAA00,A,0xeb,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bso+ 2, target
+# CHECK-BE: bun+ 0, target                  # encoding: [0x41,0xe3,A,0bAAAAAA00]
+# CHECK-LE: bun+ 0, target                  # encoding: [0bAAAAAA00,A,0xe3,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bso+ target
+# CHECK-BE: buna+ 2, target                 # encoding: [0x41,0xeb,A,0bAAAAAA10]
+# CHECK-LE: buna+ 2, target                 # encoding: [0bAAAAAA10,A,0xeb,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bsoa+ 2, target
+# CHECK-BE: buna+ 0, target                 # encoding: [0x41,0xe3,A,0bAAAAAA10]
+# CHECK-LE: buna+ 0, target                 # encoding: [0bAAAAAA10,A,0xe3,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bsoa+ target
+# CHECK-BE: bunlr+ 2                        # encoding: [0x4d,0xeb,0x00,0x20]
+# CHECK-LE: bunlr+ 2                        # encoding: [0x20,0x00,0xeb,0x4d]
+            bsolr+ 2
+# CHECK-BE: bunlr+ 0                        # encoding: [0x4d,0xe3,0x00,0x20]
+# CHECK-LE: bunlr+ 0                        # encoding: [0x20,0x00,0xe3,0x4d]
+            bsolr+
+# CHECK-BE: bunctr+ 2                       # encoding: [0x4d,0xeb,0x04,0x20]
+# CHECK-LE: bunctr+ 2                       # encoding: [0x20,0x04,0xeb,0x4d]
+            bsoctr+ 2
+# CHECK-BE: bunctr+ 0                       # encoding: [0x4d,0xe3,0x04,0x20]
+# CHECK-LE: bunctr+ 0                       # encoding: [0x20,0x04,0xe3,0x4d]
+            bsoctr+
+# CHECK-BE: bunl+ 2, target                 # encoding: [0x41,0xeb,A,0bAAAAAA01]
+# CHECK-LE: bunl+ 2, target                 # encoding: [0bAAAAAA01,A,0xeb,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bsol+ 2, target
+# CHECK-BE: bunl+ 0, target                 # encoding: [0x41,0xe3,A,0bAAAAAA01]
+# CHECK-LE: bunl+ 0, target                 # encoding: [0bAAAAAA01,A,0xe3,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bsol+ target
+# CHECK-BE: bunla+ 2, target                # encoding: [0x41,0xeb,A,0bAAAAAA11]
+# CHECK-LE: bunla+ 2, target                # encoding: [0bAAAAAA11,A,0xeb,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bsola+ 2, target
+# CHECK-BE: bunla+ 0, target                # encoding: [0x41,0xe3,A,0bAAAAAA11]
+# CHECK-LE: bunla+ 0, target                # encoding: [0bAAAAAA11,A,0xe3,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bsola+ target
+# CHECK-BE: bunlrl+ 2                       # encoding: [0x4d,0xeb,0x00,0x21]
+# CHECK-LE: bunlrl+ 2                       # encoding: [0x21,0x00,0xeb,0x4d]
+            bsolrl+ 2
+# CHECK-BE: bunlrl+ 0                       # encoding: [0x4d,0xe3,0x00,0x21]
+# CHECK-LE: bunlrl+ 0                       # encoding: [0x21,0x00,0xe3,0x4d]
+            bsolrl+
+# CHECK-BE: bunctrl+ 2                      # encoding: [0x4d,0xeb,0x04,0x21]
+# CHECK-LE: bunctrl+ 2                      # encoding: [0x21,0x04,0xeb,0x4d]
+            bsoctrl+ 2
+# CHECK-BE: bunctrl+ 0                      # encoding: [0x4d,0xe3,0x04,0x21]
+# CHECK-LE: bunctrl+ 0                      # encoding: [0x21,0x04,0xe3,0x4d]
+            bsoctrl+
+
+# CHECK-BE: bun- 2, target                  # encoding: [0x41,0xcb,A,0bAAAAAA00]
+# CHECK-LE: bun- 2, target                  # encoding: [0bAAAAAA00,A,0xcb,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bso- 2, target
+# CHECK-BE: bun- 0, target                  # encoding: [0x41,0xc3,A,0bAAAAAA00]
+# CHECK-LE: bun- 0, target                  # encoding: [0bAAAAAA00,A,0xc3,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bso- target
+# CHECK-BE: buna- 2, target                 # encoding: [0x41,0xcb,A,0bAAAAAA10]
+# CHECK-LE: buna- 2, target                 # encoding: [0bAAAAAA10,A,0xcb,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bsoa- 2, target
+# CHECK-BE: buna- 0, target                 # encoding: [0x41,0xc3,A,0bAAAAAA10]
+# CHECK-LE: buna- 0, target                 # encoding: [0bAAAAAA10,A,0xc3,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bsoa- target
+# CHECK-BE: bunlr- 2                        # encoding: [0x4d,0xcb,0x00,0x20]
+# CHECK-LE: bunlr- 2                        # encoding: [0x20,0x00,0xcb,0x4d]
+            bsolr- 2
+# CHECK-BE: bunlr- 0                        # encoding: [0x4d,0xc3,0x00,0x20]
+# CHECK-LE: bunlr- 0                        # encoding: [0x20,0x00,0xc3,0x4d]
+            bsolr-
+# CHECK-BE: bunctr- 2                       # encoding: [0x4d,0xcb,0x04,0x20]
+# CHECK-LE: bunctr- 2                       # encoding: [0x20,0x04,0xcb,0x4d]
+            bsoctr- 2
+# CHECK-BE: bunctr- 0                       # encoding: [0x4d,0xc3,0x04,0x20]
+# CHECK-LE: bunctr- 0                       # encoding: [0x20,0x04,0xc3,0x4d]
+            bsoctr-
+# CHECK-BE: bunl- 2, target                 # encoding: [0x41,0xcb,A,0bAAAAAA01]
+# CHECK-LE: bunl- 2, target                 # encoding: [0bAAAAAA01,A,0xcb,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bsol- 2, target
+# CHECK-BE: bunl- 0, target                 # encoding: [0x41,0xc3,A,0bAAAAAA01]
+# CHECK-LE: bunl- 0, target                 # encoding: [0bAAAAAA01,A,0xc3,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bsol- target
+# CHECK-BE: bunla- 2, target                # encoding: [0x41,0xcb,A,0bAAAAAA11]
+# CHECK-LE: bunla- 2, target                # encoding: [0bAAAAAA11,A,0xcb,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bsola- 2, target
+# CHECK-BE: bunla- 0, target                # encoding: [0x41,0xc3,A,0bAAAAAA11]
+# CHECK-LE: bunla- 0, target                # encoding: [0bAAAAAA11,A,0xc3,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bsola- target
+# CHECK-BE: bunlrl- 2                       # encoding: [0x4d,0xcb,0x00,0x21]
+# CHECK-LE: bunlrl- 2                       # encoding: [0x21,0x00,0xcb,0x4d]
+            bsolrl- 2
+# CHECK-BE: bunlrl- 0                       # encoding: [0x4d,0xc3,0x00,0x21]
+# CHECK-LE: bunlrl- 0                       # encoding: [0x21,0x00,0xc3,0x4d]
+            bsolrl-
+# CHECK-BE: bunctrl- 2                      # encoding: [0x4d,0xcb,0x04,0x21]
+# CHECK-LE: bunctrl- 2                      # encoding: [0x21,0x04,0xcb,0x4d]
+            bsoctrl- 2
+# CHECK-BE: bunctrl- 0                      # encoding: [0x4d,0xc3,0x04,0x21]
+# CHECK-LE: bunctrl- 0                      # encoding: [0x21,0x04,0xc3,0x4d]
+            bsoctrl-
+
+# CHECK-BE: bnu 2, target                   # encoding: [0x40,0x8b,A,0bAAAAAA00]
+# CHECK-LE: bnu 2, target                   # encoding: [0bAAAAAA00,A,0x8b,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bns 2, target
+# CHECK-BE: bnu 0, target                   # encoding: [0x40,0x83,A,0bAAAAAA00]
+# CHECK-LE: bnu 0, target                   # encoding: [0bAAAAAA00,A,0x83,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bns target
+# CHECK-BE: bnua 2, target                  # encoding: [0x40,0x8b,A,0bAAAAAA10]
+# CHECK-LE: bnua 2, target                  # encoding: [0bAAAAAA10,A,0x8b,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnsa 2, target
+# CHECK-BE: bnua 0, target                  # encoding: [0x40,0x83,A,0bAAAAAA10]
+# CHECK-LE: bnua 0, target                  # encoding: [0bAAAAAA10,A,0x83,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnsa target
+# CHECK-BE: bnulr 2                         # encoding: [0x4c,0x8b,0x00,0x20]
+# CHECK-LE: bnulr 2                         # encoding: [0x20,0x00,0x8b,0x4c]
+            bnslr 2
+# CHECK-BE: bnulr 0                         # encoding: [0x4c,0x83,0x00,0x20]
+# CHECK-LE: bnulr 0                         # encoding: [0x20,0x00,0x83,0x4c]
+            bnslr
+# CHECK-BE: bnuctr 2                        # encoding: [0x4c,0x8b,0x04,0x20]
+# CHECK-LE: bnuctr 2                        # encoding: [0x20,0x04,0x8b,0x4c]
+            bnsctr 2
+# CHECK-BE: bnuctr 0                        # encoding: [0x4c,0x83,0x04,0x20]
+# CHECK-LE: bnuctr 0                        # encoding: [0x20,0x04,0x83,0x4c]
+            bnsctr
+# CHECK-BE: bnul 2, target                  # encoding: [0x40,0x8b,A,0bAAAAAA01]
+# CHECK-LE: bnul 2, target                  # encoding: [0bAAAAAA01,A,0x8b,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bnsl 2, target
+# CHECK-BE: bnul 0, target                  # encoding: [0x40,0x83,A,0bAAAAAA01]
+# CHECK-LE: bnul 0, target                  # encoding: [0bAAAAAA01,A,0x83,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bnsl target
+# CHECK-BE: bnula 2, target                 # encoding: [0x40,0x8b,A,0bAAAAAA11]
+# CHECK-LE: bnula 2, target                 # encoding: [0bAAAAAA11,A,0x8b,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnsla 2, target
+# CHECK-BE: bnula 0, target                 # encoding: [0x40,0x83,A,0bAAAAAA11]
+# CHECK-LE: bnula 0, target                 # encoding: [0bAAAAAA11,A,0x83,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnsla target
+# CHECK-BE: bnulrl 2                        # encoding: [0x4c,0x8b,0x00,0x21]
+# CHECK-LE: bnulrl 2                        # encoding: [0x21,0x00,0x8b,0x4c]
+            bnslrl 2
+# CHECK-BE: bnulrl 0                        # encoding: [0x4c,0x83,0x00,0x21]
+# CHECK-LE: bnulrl 0                        # encoding: [0x21,0x00,0x83,0x4c]
+            bnslrl
+# CHECK-BE: bnuctrl 2                       # encoding: [0x4c,0x8b,0x04,0x21]
+# CHECK-LE: bnuctrl 2                       # encoding: [0x21,0x04,0x8b,0x4c]
+            bnsctrl 2
+# CHECK-BE: bnuctrl 0                       # encoding: [0x4c,0x83,0x04,0x21]
+# CHECK-LE: bnuctrl 0                       # encoding: [0x21,0x04,0x83,0x4c]
+            bnsctrl
+
+# CHECK-BE: bnu+ 2, target                  # encoding: [0x40,0xeb,A,0bAAAAAA00]
+# CHECK-LE: bnu+ 2, target                  # encoding: [0bAAAAAA00,A,0xeb,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bns+ 2, target
+# CHECK-BE: bnu+ 0, target                  # encoding: [0x40,0xe3,A,0bAAAAAA00]
+# CHECK-LE: bnu+ 0, target                  # encoding: [0bAAAAAA00,A,0xe3,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bns+ target
+# CHECK-BE: bnua+ 2, target                 # encoding: [0x40,0xeb,A,0bAAAAAA10]
+# CHECK-LE: bnua+ 2, target                 # encoding: [0bAAAAAA10,A,0xeb,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnsa+ 2, target
+# CHECK-BE: bnua+ 0, target                 # encoding: [0x40,0xe3,A,0bAAAAAA10]
+# CHECK-LE: bnua+ 0, target                 # encoding: [0bAAAAAA10,A,0xe3,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnsa+ target
+# CHECK-BE: bnulr+ 2                        # encoding: [0x4c,0xeb,0x00,0x20]
+# CHECK-LE: bnulr+ 2                        # encoding: [0x20,0x00,0xeb,0x4c]
+            bnslr+ 2
+# CHECK-BE: bnulr+ 0                        # encoding: [0x4c,0xe3,0x00,0x20]
+# CHECK-LE: bnulr+ 0                        # encoding: [0x20,0x00,0xe3,0x4c]
+            bnslr+
+# CHECK-BE: bnuctr+ 2                       # encoding: [0x4c,0xeb,0x04,0x20]
+# CHECK-LE: bnuctr+ 2                       # encoding: [0x20,0x04,0xeb,0x4c]
+            bnsctr+ 2
+# CHECK-BE: bnuctr+ 0                       # encoding: [0x4c,0xe3,0x04,0x20]
+# CHECK-LE: bnuctr+ 0                       # encoding: [0x20,0x04,0xe3,0x4c]
+            bnsctr+
+# CHECK-BE: bnul+ 2, target                 # encoding: [0x40,0xeb,A,0bAAAAAA01]
+# CHECK-LE: bnul+ 2, target                 # encoding: [0bAAAAAA01,A,0xeb,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bnsl+ 2, target
+# CHECK-BE: bnul+ 0, target                 # encoding: [0x40,0xe3,A,0bAAAAAA01]
+# CHECK-LE: bnul+ 0, target                 # encoding: [0bAAAAAA01,A,0xe3,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bnsl+ target
+# CHECK-BE: bnula+ 2, target                # encoding: [0x40,0xeb,A,0bAAAAAA11]
+# CHECK-LE: bnula+ 2, target                # encoding: [0bAAAAAA11,A,0xeb,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnsla+ 2, target
+# CHECK-BE: bnula+ 0, target                # encoding: [0x40,0xe3,A,0bAAAAAA11]
+# CHECK-LE: bnula+ 0, target                # encoding: [0bAAAAAA11,A,0xe3,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnsla+ target
+# CHECK-BE: bnulrl+ 2                       # encoding: [0x4c,0xeb,0x00,0x21]
+# CHECK-LE: bnulrl+ 2                       # encoding: [0x21,0x00,0xeb,0x4c]
+            bnslrl+ 2
+# CHECK-BE: bnulrl+ 0                       # encoding: [0x4c,0xe3,0x00,0x21]
+# CHECK-LE: bnulrl+ 0                       # encoding: [0x21,0x00,0xe3,0x4c]
+            bnslrl+
+# CHECK-BE: bnuctrl+ 2                      # encoding: [0x4c,0xeb,0x04,0x21]
+# CHECK-LE: bnuctrl+ 2                      # encoding: [0x21,0x04,0xeb,0x4c]
+            bnsctrl+ 2
+# CHECK-BE: bnuctrl+ 0                      # encoding: [0x4c,0xe3,0x04,0x21]
+# CHECK-LE: bnuctrl+ 0                      # encoding: [0x21,0x04,0xe3,0x4c]
+            bnsctrl+
+
+# CHECK-BE: bnu- 2, target                  # encoding: [0x40,0xcb,A,0bAAAAAA00]
+# CHECK-LE: bnu- 2, target                  # encoding: [0bAAAAAA00,A,0xcb,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bns- 2, target
+# CHECK-BE: bnu- 0, target                  # encoding: [0x40,0xc3,A,0bAAAAAA00]
+# CHECK-LE: bnu- 0, target                  # encoding: [0bAAAAAA00,A,0xc3,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bns- target
+# CHECK-BE: bnua- 2, target                 # encoding: [0x40,0xcb,A,0bAAAAAA10]
+# CHECK-LE: bnua- 2, target                 # encoding: [0bAAAAAA10,A,0xcb,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnsa- 2, target
+# CHECK-BE: bnua- 0, target                 # encoding: [0x40,0xc3,A,0bAAAAAA10]
+# CHECK-LE: bnua- 0, target                 # encoding: [0bAAAAAA10,A,0xc3,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnsa- target
+# CHECK-BE: bnulr- 2                        # encoding: [0x4c,0xcb,0x00,0x20]
+# CHECK-LE: bnulr- 2                        # encoding: [0x20,0x00,0xcb,0x4c]
+            bnslr- 2
+# CHECK-BE: bnulr- 0                        # encoding: [0x4c,0xc3,0x00,0x20]
+# CHECK-LE: bnulr- 0                        # encoding: [0x20,0x00,0xc3,0x4c]
+            bnslr-
+# CHECK-BE: bnuctr- 2                       # encoding: [0x4c,0xcb,0x04,0x20]
+# CHECK-LE: bnuctr- 2                       # encoding: [0x20,0x04,0xcb,0x4c]
+            bnsctr- 2
+# CHECK-BE: bnuctr- 0                       # encoding: [0x4c,0xc3,0x04,0x20]
+# CHECK-LE: bnuctr- 0                       # encoding: [0x20,0x04,0xc3,0x4c]
+            bnsctr-
+# CHECK-BE: bnul- 2, target                 # encoding: [0x40,0xcb,A,0bAAAAAA01]
+# CHECK-LE: bnul- 2, target                 # encoding: [0bAAAAAA01,A,0xcb,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bnsl- 2, target
+# CHECK-BE: bnul- 0, target                 # encoding: [0x40,0xc3,A,0bAAAAAA01]
+# CHECK-LE: bnul- 0, target                 # encoding: [0bAAAAAA01,A,0xc3,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bnsl- target
+# CHECK-BE: bnula- 2, target                # encoding: [0x40,0xcb,A,0bAAAAAA11]
+# CHECK-LE: bnula- 2, target                # encoding: [0bAAAAAA11,A,0xcb,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnsla- 2, target
+# CHECK-BE: bnula- 0, target                # encoding: [0x40,0xc3,A,0bAAAAAA11]
+# CHECK-LE: bnula- 0, target                # encoding: [0bAAAAAA11,A,0xc3,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnsla- target
+# CHECK-BE: bnulrl- 2                       # encoding: [0x4c,0xcb,0x00,0x21]
+# CHECK-LE: bnulrl- 2                       # encoding: [0x21,0x00,0xcb,0x4c]
+            bnslrl- 2
+# CHECK-BE: bnulrl- 0                       # encoding: [0x4c,0xc3,0x00,0x21]
+# CHECK-LE: bnulrl- 0                       # encoding: [0x21,0x00,0xc3,0x4c]
+            bnslrl-
+# CHECK-BE: bnuctrl- 2                      # encoding: [0x4c,0xcb,0x04,0x21]
+# CHECK-LE: bnuctrl- 2                      # encoding: [0x21,0x04,0xcb,0x4c]
+            bnsctrl- 2
+# CHECK-BE: bnuctrl- 0                      # encoding: [0x4c,0xc3,0x04,0x21]
+# CHECK-LE: bnuctrl- 0                      # encoding: [0x21,0x04,0xc3,0x4c]
+            bnsctrl-
+
+# CHECK-BE: bun 2, target                   # encoding: [0x41,0x8b,A,0bAAAAAA00]
+# CHECK-LE: bun 2, target                   # encoding: [0bAAAAAA00,A,0x8b,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bun 2, target
+# CHECK-BE: bun 0, target                   # encoding: [0x41,0x83,A,0bAAAAAA00]
+# CHECK-LE: bun 0, target                   # encoding: [0bAAAAAA00,A,0x83,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bun target
+# CHECK-BE: buna 2, target                  # encoding: [0x41,0x8b,A,0bAAAAAA10]
+# CHECK-LE: buna 2, target                  # encoding: [0bAAAAAA10,A,0x8b,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            buna 2, target
+# CHECK-BE: buna 0, target                  # encoding: [0x41,0x83,A,0bAAAAAA10]
+# CHECK-LE: buna 0, target                  # encoding: [0bAAAAAA10,A,0x83,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            buna target
+# CHECK-BE: bunlr 2                         # encoding: [0x4d,0x8b,0x00,0x20]
+# CHECK-LE: bunlr 2                         # encoding: [0x20,0x00,0x8b,0x4d]
+            bunlr 2
+# CHECK-BE: bunlr 0                         # encoding: [0x4d,0x83,0x00,0x20]
+# CHECK-LE: bunlr 0                         # encoding: [0x20,0x00,0x83,0x4d]
+            bunlr
+# CHECK-BE: bunctr 2                        # encoding: [0x4d,0x8b,0x04,0x20]
+# CHECK-LE: bunctr 2                        # encoding: [0x20,0x04,0x8b,0x4d]
+            bunctr 2
+# CHECK-BE: bunctr 0                        # encoding: [0x4d,0x83,0x04,0x20]
+# CHECK-LE: bunctr 0                        # encoding: [0x20,0x04,0x83,0x4d]
+            bunctr
+# CHECK-BE: bunl 2, target                  # encoding: [0x41,0x8b,A,0bAAAAAA01]
+# CHECK-LE: bunl 2, target                  # encoding: [0bAAAAAA01,A,0x8b,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bunl 2, target
+# CHECK-BE: bunl 0, target                  # encoding: [0x41,0x83,A,0bAAAAAA01]
+# CHECK-LE: bunl 0, target                  # encoding: [0bAAAAAA01,A,0x83,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bunl target
+# CHECK-BE: bunla 2, target                 # encoding: [0x41,0x8b,A,0bAAAAAA11]
+# CHECK-LE: bunla 2, target                 # encoding: [0bAAAAAA11,A,0x8b,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bunla 2, target
+# CHECK-BE: bunla 0, target                 # encoding: [0x41,0x83,A,0bAAAAAA11]
+# CHECK-LE: bunla 0, target                 # encoding: [0bAAAAAA11,A,0x83,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bunla target
+# CHECK-BE: bunlrl 2                        # encoding: [0x4d,0x8b,0x00,0x21]
+# CHECK-LE: bunlrl 2                        # encoding: [0x21,0x00,0x8b,0x4d]
+            bunlrl 2
+# CHECK-BE: bunlrl 0                        # encoding: [0x4d,0x83,0x00,0x21]
+# CHECK-LE: bunlrl 0                        # encoding: [0x21,0x00,0x83,0x4d]
+            bunlrl
+# CHECK-BE: bunctrl 2                       # encoding: [0x4d,0x8b,0x04,0x21]
+# CHECK-LE: bunctrl 2                       # encoding: [0x21,0x04,0x8b,0x4d]
+            bunctrl 2
+# CHECK-BE: bunctrl 0                       # encoding: [0x4d,0x83,0x04,0x21]
+# CHECK-LE: bunctrl 0                       # encoding: [0x21,0x04,0x83,0x4d]
+            bunctrl
+
+# CHECK-BE: bun+ 2, target                  # encoding: [0x41,0xeb,A,0bAAAAAA00]
+# CHECK-LE: bun+ 2, target                  # encoding: [0bAAAAAA00,A,0xeb,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bun+ 2, target
+# CHECK-BE: bun+ 0, target                  # encoding: [0x41,0xe3,A,0bAAAAAA00]
+# CHECK-LE: bun+ 0, target                  # encoding: [0bAAAAAA00,A,0xe3,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bun+ target
+# CHECK-BE: buna+ 2, target                 # encoding: [0x41,0xeb,A,0bAAAAAA10]
+# CHECK-LE: buna+ 2, target                 # encoding: [0bAAAAAA10,A,0xeb,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            buna+ 2, target
+# CHECK-BE: buna+ 0, target                 # encoding: [0x41,0xe3,A,0bAAAAAA10]
+# CHECK-LE: buna+ 0, target                 # encoding: [0bAAAAAA10,A,0xe3,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            buna+ target
+# CHECK-BE: bunlr+ 2                        # encoding: [0x4d,0xeb,0x00,0x20]
+# CHECK-LE: bunlr+ 2                        # encoding: [0x20,0x00,0xeb,0x4d]
+            bunlr+ 2
+# CHECK-BE: bunlr+ 0                        # encoding: [0x4d,0xe3,0x00,0x20]
+# CHECK-LE: bunlr+ 0                        # encoding: [0x20,0x00,0xe3,0x4d]
+            bunlr+
+# CHECK-BE: bunctr+ 2                       # encoding: [0x4d,0xeb,0x04,0x20]
+# CHECK-LE: bunctr+ 2                       # encoding: [0x20,0x04,0xeb,0x4d]
+            bunctr+ 2
+# CHECK-BE: bunctr+ 0                       # encoding: [0x4d,0xe3,0x04,0x20]
+# CHECK-LE: bunctr+ 0                       # encoding: [0x20,0x04,0xe3,0x4d]
+            bunctr+
+# CHECK-BE: bunl+ 2, target                 # encoding: [0x41,0xeb,A,0bAAAAAA01]
+# CHECK-LE: bunl+ 2, target                 # encoding: [0bAAAAAA01,A,0xeb,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bunl+ 2, target
+# CHECK-BE: bunl+ 0, target                 # encoding: [0x41,0xe3,A,0bAAAAAA01]
+# CHECK-LE: bunl+ 0, target                 # encoding: [0bAAAAAA01,A,0xe3,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bunl+ target
+# CHECK-BE: bunla+ 2, target                # encoding: [0x41,0xeb,A,0bAAAAAA11]
+# CHECK-LE: bunla+ 2, target                # encoding: [0bAAAAAA11,A,0xeb,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bunla+ 2, target
+# CHECK-BE: bunla+ 0, target                # encoding: [0x41,0xe3,A,0bAAAAAA11]
+# CHECK-LE: bunla+ 0, target                # encoding: [0bAAAAAA11,A,0xe3,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bunla+ target
+# CHECK-BE: bunlrl+ 2                       # encoding: [0x4d,0xeb,0x00,0x21]
+# CHECK-LE: bunlrl+ 2                       # encoding: [0x21,0x00,0xeb,0x4d]
+            bunlrl+ 2
+# CHECK-BE: bunlrl+ 0                       # encoding: [0x4d,0xe3,0x00,0x21]
+# CHECK-LE: bunlrl+ 0                       # encoding: [0x21,0x00,0xe3,0x4d]
+            bunlrl+
+# CHECK-BE: bunctrl+ 2                      # encoding: [0x4d,0xeb,0x04,0x21]
+# CHECK-LE: bunctrl+ 2                      # encoding: [0x21,0x04,0xeb,0x4d]
+            bunctrl+ 2
+# CHECK-BE: bunctrl+ 0                      # encoding: [0x4d,0xe3,0x04,0x21]
+# CHECK-LE: bunctrl+ 0                      # encoding: [0x21,0x04,0xe3,0x4d]
+            bunctrl+
+
+# CHECK-BE: bun- 2, target                  # encoding: [0x41,0xcb,A,0bAAAAAA00]
+# CHECK-LE: bun- 2, target                  # encoding: [0bAAAAAA00,A,0xcb,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bun- 2, target
+# CHECK-BE: bun- 0, target                  # encoding: [0x41,0xc3,A,0bAAAAAA00]
+# CHECK-LE: bun- 0, target                  # encoding: [0bAAAAAA00,A,0xc3,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bun- target
+# CHECK-BE: buna- 2, target                 # encoding: [0x41,0xcb,A,0bAAAAAA10]
+# CHECK-LE: buna- 2, target                 # encoding: [0bAAAAAA10,A,0xcb,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            buna- 2, target
+# CHECK-BE: buna- 0, target                 # encoding: [0x41,0xc3,A,0bAAAAAA10]
+# CHECK-LE: buna- 0, target                 # encoding: [0bAAAAAA10,A,0xc3,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            buna- target
+# CHECK-BE: bunlr- 2                        # encoding: [0x4d,0xcb,0x00,0x20]
+# CHECK-LE: bunlr- 2                        # encoding: [0x20,0x00,0xcb,0x4d]
+            bunlr- 2
+# CHECK-BE: bunlr- 0                        # encoding: [0x4d,0xc3,0x00,0x20]
+# CHECK-LE: bunlr- 0                        # encoding: [0x20,0x00,0xc3,0x4d]
+            bunlr-
+# CHECK-BE: bunctr- 2                       # encoding: [0x4d,0xcb,0x04,0x20]
+# CHECK-LE: bunctr- 2                       # encoding: [0x20,0x04,0xcb,0x4d]
+            bunctr- 2
+# CHECK-BE: bunctr- 0                       # encoding: [0x4d,0xc3,0x04,0x20]
+# CHECK-LE: bunctr- 0                       # encoding: [0x20,0x04,0xc3,0x4d]
+            bunctr-
+# CHECK-BE: bunl- 2, target                 # encoding: [0x41,0xcb,A,0bAAAAAA01]
+# CHECK-LE: bunl- 2, target                 # encoding: [0bAAAAAA01,A,0xcb,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bunl- 2, target
+# CHECK-BE: bunl- 0, target                 # encoding: [0x41,0xc3,A,0bAAAAAA01]
+# CHECK-LE: bunl- 0, target                 # encoding: [0bAAAAAA01,A,0xc3,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bunl- target
+# CHECK-BE: bunla- 2, target                # encoding: [0x41,0xcb,A,0bAAAAAA11]
+# CHECK-LE: bunla- 2, target                # encoding: [0bAAAAAA11,A,0xcb,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bunla- 2, target
+# CHECK-BE: bunla- 0, target                # encoding: [0x41,0xc3,A,0bAAAAAA11]
+# CHECK-LE: bunla- 0, target                # encoding: [0bAAAAAA11,A,0xc3,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bunla- target
+# CHECK-BE: bunlrl- 2                       # encoding: [0x4d,0xcb,0x00,0x21]
+# CHECK-LE: bunlrl- 2                       # encoding: [0x21,0x00,0xcb,0x4d]
+            bunlrl- 2
+# CHECK-BE: bunlrl- 0                       # encoding: [0x4d,0xc3,0x00,0x21]
+# CHECK-LE: bunlrl- 0                       # encoding: [0x21,0x00,0xc3,0x4d]
+            bunlrl-
+# CHECK-BE: bunctrl- 2                      # encoding: [0x4d,0xcb,0x04,0x21]
+# CHECK-LE: bunctrl- 2                      # encoding: [0x21,0x04,0xcb,0x4d]
+            bunctrl- 2
+# CHECK-BE: bunctrl- 0                      # encoding: [0x4d,0xc3,0x04,0x21]
+# CHECK-LE: bunctrl- 0                      # encoding: [0x21,0x04,0xc3,0x4d]
+            bunctrl-
+
+# CHECK-BE: bnu 2, target                   # encoding: [0x40,0x8b,A,0bAAAAAA00]
+# CHECK-LE: bnu 2, target                   # encoding: [0bAAAAAA00,A,0x8b,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bnu 2, target
+# CHECK-BE: bnu 0, target                   # encoding: [0x40,0x83,A,0bAAAAAA00]
+# CHECK-LE: bnu 0, target                   # encoding: [0bAAAAAA00,A,0x83,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bnu target
+# CHECK-BE: bnua 2, target                  # encoding: [0x40,0x8b,A,0bAAAAAA10]
+# CHECK-LE: bnua 2, target                  # encoding: [0bAAAAAA10,A,0x8b,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnua 2, target
+# CHECK-BE: bnua 0, target                  # encoding: [0x40,0x83,A,0bAAAAAA10]
+# CHECK-LE: bnua 0, target                  # encoding: [0bAAAAAA10,A,0x83,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnua target
+# CHECK-BE: bnulr 2                         # encoding: [0x4c,0x8b,0x00,0x20]
+# CHECK-LE: bnulr 2                         # encoding: [0x20,0x00,0x8b,0x4c]
+            bnulr 2
+# CHECK-BE: bnulr 0                         # encoding: [0x4c,0x83,0x00,0x20]
+# CHECK-LE: bnulr 0                         # encoding: [0x20,0x00,0x83,0x4c]
+            bnulr
+# CHECK-BE: bnuctr 2                        # encoding: [0x4c,0x8b,0x04,0x20]
+# CHECK-LE: bnuctr 2                        # encoding: [0x20,0x04,0x8b,0x4c]
+            bnuctr 2
+# CHECK-BE: bnuctr 0                        # encoding: [0x4c,0x83,0x04,0x20]
+# CHECK-LE: bnuctr 0                        # encoding: [0x20,0x04,0x83,0x4c]
+            bnuctr
+# CHECK-BE: bnul 2, target                  # encoding: [0x40,0x8b,A,0bAAAAAA01]
+# CHECK-LE: bnul 2, target                  # encoding: [0bAAAAAA01,A,0x8b,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bnul 2, target
+# CHECK-BE: bnul 0, target                  # encoding: [0x40,0x83,A,0bAAAAAA01]
+# CHECK-LE: bnul 0, target                  # encoding: [0bAAAAAA01,A,0x83,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bnul target
+# CHECK-BE: bnula 2, target                 # encoding: [0x40,0x8b,A,0bAAAAAA11]
+# CHECK-LE: bnula 2, target                 # encoding: [0bAAAAAA11,A,0x8b,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnula 2, target
+# CHECK-BE: bnula 0, target                 # encoding: [0x40,0x83,A,0bAAAAAA11]
+# CHECK-LE: bnula 0, target                 # encoding: [0bAAAAAA11,A,0x83,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnula target
+# CHECK-BE: bnulrl 2                        # encoding: [0x4c,0x8b,0x00,0x21]
+# CHECK-LE: bnulrl 2                        # encoding: [0x21,0x00,0x8b,0x4c]
+            bnulrl 2
+# CHECK-BE: bnulrl 0                        # encoding: [0x4c,0x83,0x00,0x21]
+# CHECK-LE: bnulrl 0                        # encoding: [0x21,0x00,0x83,0x4c]
+            bnulrl
+# CHECK-BE: bnuctrl 2                       # encoding: [0x4c,0x8b,0x04,0x21]
+# CHECK-LE: bnuctrl 2                       # encoding: [0x21,0x04,0x8b,0x4c]
+            bnuctrl 2
+# CHECK-BE: bnuctrl 0                       # encoding: [0x4c,0x83,0x04,0x21]
+# CHECK-LE: bnuctrl 0                       # encoding: [0x21,0x04,0x83,0x4c]
+            bnuctrl
+
+# CHECK-BE: bnu+ 2, target                  # encoding: [0x40,0xeb,A,0bAAAAAA00]
+# CHECK-LE: bnu+ 2, target                  # encoding: [0bAAAAAA00,A,0xeb,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bnu+ 2, target
+# CHECK-BE: bnu+ 0, target                  # encoding: [0x40,0xe3,A,0bAAAAAA00]
+# CHECK-LE: bnu+ 0, target                  # encoding: [0bAAAAAA00,A,0xe3,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bnu+ target
+# CHECK-BE: bnua+ 2, target                 # encoding: [0x40,0xeb,A,0bAAAAAA10]
+# CHECK-LE: bnua+ 2, target                 # encoding: [0bAAAAAA10,A,0xeb,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnua+ 2, target
+# CHECK-BE: bnua+ 0, target                 # encoding: [0x40,0xe3,A,0bAAAAAA10]
+# CHECK-LE: bnua+ 0, target                 # encoding: [0bAAAAAA10,A,0xe3,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnua+ target
+# CHECK-BE: bnulr+ 2                        # encoding: [0x4c,0xeb,0x00,0x20]
+# CHECK-LE: bnulr+ 2                        # encoding: [0x20,0x00,0xeb,0x4c]
+            bnulr+ 2
+# CHECK-BE: bnulr+ 0                        # encoding: [0x4c,0xe3,0x00,0x20]
+# CHECK-LE: bnulr+ 0                        # encoding: [0x20,0x00,0xe3,0x4c]
+            bnulr+
+# CHECK-BE: bnuctr+ 2                       # encoding: [0x4c,0xeb,0x04,0x20]
+# CHECK-LE: bnuctr+ 2                       # encoding: [0x20,0x04,0xeb,0x4c]
+            bnuctr+ 2
+# CHECK-BE: bnuctr+ 0                       # encoding: [0x4c,0xe3,0x04,0x20]
+# CHECK-LE: bnuctr+ 0                       # encoding: [0x20,0x04,0xe3,0x4c]
+            bnuctr+
+# CHECK-BE: bnul+ 2, target                 # encoding: [0x40,0xeb,A,0bAAAAAA01]
+# CHECK-LE: bnul+ 2, target                 # encoding: [0bAAAAAA01,A,0xeb,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bnul+ 2, target
+# CHECK-BE: bnul+ 0, target                 # encoding: [0x40,0xe3,A,0bAAAAAA01]
+# CHECK-LE: bnul+ 0, target                 # encoding: [0bAAAAAA01,A,0xe3,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bnul+ target
+# CHECK-BE: bnula+ 2, target                # encoding: [0x40,0xeb,A,0bAAAAAA11]
+# CHECK-LE: bnula+ 2, target                # encoding: [0bAAAAAA11,A,0xeb,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnula+ 2, target
+# CHECK-BE: bnula+ 0, target                # encoding: [0x40,0xe3,A,0bAAAAAA11]
+# CHECK-LE: bnula+ 0, target                # encoding: [0bAAAAAA11,A,0xe3,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnula+ target
+# CHECK-BE: bnulrl+ 2                       # encoding: [0x4c,0xeb,0x00,0x21]
+# CHECK-LE: bnulrl+ 2                       # encoding: [0x21,0x00,0xeb,0x4c]
+            bnulrl+ 2
+# CHECK-BE: bnulrl+ 0                       # encoding: [0x4c,0xe3,0x00,0x21]
+# CHECK-LE: bnulrl+ 0                       # encoding: [0x21,0x00,0xe3,0x4c]
+            bnulrl+
+# CHECK-BE: bnuctrl+ 2                      # encoding: [0x4c,0xeb,0x04,0x21]
+# CHECK-LE: bnuctrl+ 2                      # encoding: [0x21,0x04,0xeb,0x4c]
+            bnuctrl+ 2
+# CHECK-BE: bnuctrl+ 0                      # encoding: [0x4c,0xe3,0x04,0x21]
+# CHECK-LE: bnuctrl+ 0                      # encoding: [0x21,0x04,0xe3,0x4c]
+            bnuctrl+
+
+# CHECK-BE: bnu- 2, target                  # encoding: [0x40,0xcb,A,0bAAAAAA00]
+# CHECK-LE: bnu- 2, target                  # encoding: [0bAAAAAA00,A,0xcb,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bnu- 2, target
+# CHECK-BE: bnu- 0, target                  # encoding: [0x40,0xc3,A,0bAAAAAA00]
+# CHECK-LE: bnu- 0, target                  # encoding: [0bAAAAAA00,A,0xc3,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bnu- target
+# CHECK-BE: bnua- 2, target                 # encoding: [0x40,0xcb,A,0bAAAAAA10]
+# CHECK-LE: bnua- 2, target                 # encoding: [0bAAAAAA10,A,0xcb,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnua- 2, target
+# CHECK-BE: bnua- 0, target                 # encoding: [0x40,0xc3,A,0bAAAAAA10]
+# CHECK-LE: bnua- 0, target                 # encoding: [0bAAAAAA10,A,0xc3,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnua- target
+# CHECK-BE: bnulr- 2                        # encoding: [0x4c,0xcb,0x00,0x20]
+# CHECK-LE: bnulr- 2                        # encoding: [0x20,0x00,0xcb,0x4c]
+            bnulr- 2
+# CHECK-BE: bnulr- 0                        # encoding: [0x4c,0xc3,0x00,0x20]
+# CHECK-LE: bnulr- 0                        # encoding: [0x20,0x00,0xc3,0x4c]
+            bnulr-
+# CHECK-BE: bnuctr- 2                       # encoding: [0x4c,0xcb,0x04,0x20]
+# CHECK-LE: bnuctr- 2                       # encoding: [0x20,0x04,0xcb,0x4c]
+            bnuctr- 2
+# CHECK-BE: bnuctr- 0                       # encoding: [0x4c,0xc3,0x04,0x20]
+# CHECK-LE: bnuctr- 0                       # encoding: [0x20,0x04,0xc3,0x4c]
+            bnuctr-
+# CHECK-BE: bnul- 2, target                 # encoding: [0x40,0xcb,A,0bAAAAAA01]
+# CHECK-LE: bnul- 2, target                 # encoding: [0bAAAAAA01,A,0xcb,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bnul- 2, target
+# CHECK-BE: bnul- 0, target                 # encoding: [0x40,0xc3,A,0bAAAAAA01]
+# CHECK-LE: bnul- 0, target                 # encoding: [0bAAAAAA01,A,0xc3,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bnul- target
+# CHECK-BE: bnula- 2, target                # encoding: [0x40,0xcb,A,0bAAAAAA11]
+# CHECK-LE: bnula- 2, target                # encoding: [0bAAAAAA11,A,0xcb,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnula- 2, target
+# CHECK-BE: bnula- 0, target                # encoding: [0x40,0xc3,A,0bAAAAAA11]
+# CHECK-LE: bnula- 0, target                # encoding: [0bAAAAAA11,A,0xc3,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bnula- target
+# CHECK-BE: bnulrl- 2                       # encoding: [0x4c,0xcb,0x00,0x21]
+# CHECK-LE: bnulrl- 2                       # encoding: [0x21,0x00,0xcb,0x4c]
+            bnulrl- 2
+# CHECK-BE: bnulrl- 0                       # encoding: [0x4c,0xc3,0x00,0x21]
+# CHECK-LE: bnulrl- 0                       # encoding: [0x21,0x00,0xc3,0x4c]
+            bnulrl-
+# CHECK-BE: bnuctrl- 2                      # encoding: [0x4c,0xcb,0x04,0x21]
+# CHECK-LE: bnuctrl- 2                      # encoding: [0x21,0x04,0xcb,0x4c]
+            bnuctrl- 2
+# CHECK-BE: bnuctrl- 0                      # encoding: [0x4c,0xc3,0x04,0x21]
+# CHECK-LE: bnuctrl- 0                      # encoding: [0x21,0x04,0xc3,0x4c]
+            bnuctrl-
 
 # Condition register logical mnemonics
 
-# CHECK: creqv 2, 2, 2                   # encoding: [0x4c,0x42,0x12,0x42]
-         crset 2
-# CHECK: crxor 2, 2, 2                   # encoding: [0x4c,0x42,0x11,0x82]
-         crclr 2
-# CHECK: cror 2, 3, 3                    # encoding: [0x4c,0x43,0x1b,0x82]
-         crmove 2, 3
-# CHECK: crnor 2, 3, 3                   # encoding: [0x4c,0x43,0x18,0x42]
-         crnot 2, 3
+# CHECK-BE: creqv 2, 2, 2                   # encoding: [0x4c,0x42,0x12,0x42]
+# CHECK-LE: creqv 2, 2, 2                   # encoding: [0x42,0x12,0x42,0x4c]
+            crset 2
+# CHECK-BE: crxor 2, 2, 2                   # encoding: [0x4c,0x42,0x11,0x82]
+# CHECK-LE: crxor 2, 2, 2                   # encoding: [0x82,0x11,0x42,0x4c]
+            crclr 2
+# CHECK-BE: cror 2, 3, 3                    # encoding: [0x4c,0x43,0x1b,0x82]
+# CHECK-LE: cror 2, 3, 3                    # encoding: [0x82,0x1b,0x43,0x4c]
+            crmove 2, 3
+# CHECK-BE: crnor 2, 3, 3                   # encoding: [0x4c,0x43,0x18,0x42]
+# CHECK-LE: crnor 2, 3, 3                   # encoding: [0x42,0x18,0x43,0x4c]
+            crnot 2, 3
 
 # Subtract mnemonics
 
-# CHECK: addi 2, 3, -128                 # encoding: [0x38,0x43,0xff,0x80]
-         subi 2, 3, 128
-# CHECK: addis 2, 3, -128                # encoding: [0x3c,0x43,0xff,0x80]
-         subis 2, 3, 128
-# CHECK: addic 2, 3, -128                # encoding: [0x30,0x43,0xff,0x80]
-         subic 2, 3, 128
-# CHECK: addic. 2, 3, -128               # encoding: [0x34,0x43,0xff,0x80]
-         subic. 2, 3, 128
-
-# CHECK: subf 2, 4, 3                    # encoding: [0x7c,0x44,0x18,0x50]
-         sub 2, 3, 4
-# CHECK: subf. 2, 4, 3                   # encoding: [0x7c,0x44,0x18,0x51]
-         sub. 2, 3, 4
-# CHECK: subfc 2, 4, 3                   # encoding: [0x7c,0x44,0x18,0x10]
-         subc 2, 3, 4
-# CHECK: subfc. 2, 4, 3                  # encoding: [0x7c,0x44,0x18,0x11]
-         subc. 2, 3, 4
+# CHECK-BE: addi 2, 3, -128                 # encoding: [0x38,0x43,0xff,0x80]
+# CHECK-LE: addi 2, 3, -128                 # encoding: [0x80,0xff,0x43,0x38]
+            subi 2, 3, 128
+# CHECK-BE: addis 2, 3, -128                # encoding: [0x3c,0x43,0xff,0x80]
+# CHECK-LE: addis 2, 3, -128                # encoding: [0x80,0xff,0x43,0x3c]
+            subis 2, 3, 128
+# CHECK-BE: addic 2, 3, -128                # encoding: [0x30,0x43,0xff,0x80]
+# CHECK-LE: addic 2, 3, -128                # encoding: [0x80,0xff,0x43,0x30]
+            subic 2, 3, 128
+# CHECK-BE: addic. 2, 3, -128               # encoding: [0x34,0x43,0xff,0x80]
+# CHECK-LE: addic. 2, 3, -128               # encoding: [0x80,0xff,0x43,0x34]
+            subic. 2, 3, 128
+
+# CHECK-BE: subf 2, 4, 3                    # encoding: [0x7c,0x44,0x18,0x50]
+# CHECK-LE: subf 2, 4, 3                    # encoding: [0x50,0x18,0x44,0x7c]
+            sub 2, 3, 4
+# CHECK-BE: subf. 2, 4, 3                   # encoding: [0x7c,0x44,0x18,0x51]
+# CHECK-LE: subf. 2, 4, 3                   # encoding: [0x51,0x18,0x44,0x7c]
+            sub. 2, 3, 4
+# CHECK-BE: subfc 2, 4, 3                   # encoding: [0x7c,0x44,0x18,0x10]
+# CHECK-LE: subfc 2, 4, 3                   # encoding: [0x10,0x18,0x44,0x7c]
+            subc 2, 3, 4
+# CHECK-BE: subfc. 2, 4, 3                  # encoding: [0x7c,0x44,0x18,0x11]
+# CHECK-LE: subfc. 2, 4, 3                  # encoding: [0x11,0x18,0x44,0x7c]
+            subc. 2, 3, 4
 
 # Compare mnemonics
 
-# CHECK: cmpdi 2, 3, 128                 # encoding: [0x2d,0x23,0x00,0x80]
-         cmpdi 2, 3, 128
-# CHECK: cmpdi 0, 3, 128                 # encoding: [0x2c,0x23,0x00,0x80]
-         cmpdi 3, 128
-# CHECK: cmpd 2, 3, 4                    # encoding: [0x7d,0x23,0x20,0x00]
-         cmpd 2, 3, 4
-# CHECK: cmpd 0, 3, 4                    # encoding: [0x7c,0x23,0x20,0x00]
-         cmpd 3, 4
-# CHECK: cmpldi 2, 3, 128                # encoding: [0x29,0x23,0x00,0x80]
-         cmpldi 2, 3, 128
-# CHECK: cmpldi 0, 3, 128                # encoding: [0x28,0x23,0x00,0x80]
-         cmpldi 3, 128
-# CHECK: cmpld 2, 3, 4                   # encoding: [0x7d,0x23,0x20,0x40]
-         cmpld 2, 3, 4
-# CHECK: cmpld 0, 3, 4                   # encoding: [0x7c,0x23,0x20,0x40]
-         cmpld 3, 4
-
-# CHECK: cmpwi 2, 3, 128                 # encoding: [0x2d,0x03,0x00,0x80]
-         cmpwi 2, 3, 128
-# CHECK: cmpwi 0, 3, 128                 # encoding: [0x2c,0x03,0x00,0x80]
-         cmpwi 3, 128
-# CHECK: cmpw 2, 3, 4                    # encoding: [0x7d,0x03,0x20,0x00]
-         cmpw 2, 3, 4
-# CHECK: cmpw 0, 3, 4                    # encoding: [0x7c,0x03,0x20,0x00]
-         cmpw 3, 4
-# CHECK: cmplwi 2, 3, 128                # encoding: [0x29,0x03,0x00,0x80]
-         cmplwi 2, 3, 128
-# CHECK: cmplwi 0, 3, 128                # encoding: [0x28,0x03,0x00,0x80]
-         cmplwi 3, 128
-# CHECK: cmplw 2, 3, 4                   # encoding: [0x7d,0x03,0x20,0x40]
-         cmplw 2, 3, 4
-# CHECK: cmplw 0, 3, 4                   # encoding: [0x7c,0x03,0x20,0x40]
-         cmplw 3, 4
+# CHECK-BE: cmpdi 2, 3, 128                 # encoding: [0x2d,0x23,0x00,0x80]
+# CHECK-LE: cmpdi 2, 3, 128                 # encoding: [0x80,0x00,0x23,0x2d]
+            cmpdi 2, 3, 128
+# CHECK-BE: cmpdi 0, 3, 128                 # encoding: [0x2c,0x23,0x00,0x80]
+# CHECK-LE: cmpdi 0, 3, 128                 # encoding: [0x80,0x00,0x23,0x2c]
+            cmpdi 3, 128
+# CHECK-BE: cmpd 2, 3, 4                    # encoding: [0x7d,0x23,0x20,0x00]
+# CHECK-LE: cmpd 2, 3, 4                    # encoding: [0x00,0x20,0x23,0x7d]
+            cmpd 2, 3, 4
+# CHECK-BE: cmpd 0, 3, 4                    # encoding: [0x7c,0x23,0x20,0x00]
+# CHECK-LE: cmpd 0, 3, 4                    # encoding: [0x00,0x20,0x23,0x7c]
+            cmpd 3, 4
+# CHECK-BE: cmpldi 2, 3, 128                # encoding: [0x29,0x23,0x00,0x80]
+# CHECK-LE: cmpldi 2, 3, 128                # encoding: [0x80,0x00,0x23,0x29]
+            cmpldi 2, 3, 128
+# CHECK-BE: cmpldi 0, 3, 128                # encoding: [0x28,0x23,0x00,0x80]
+# CHECK-LE: cmpldi 0, 3, 128                # encoding: [0x80,0x00,0x23,0x28]
+            cmpldi 3, 128
+# CHECK-BE: cmpld 2, 3, 4                   # encoding: [0x7d,0x23,0x20,0x40]
+# CHECK-LE: cmpld 2, 3, 4                   # encoding: [0x40,0x20,0x23,0x7d]
+            cmpld 2, 3, 4
+# CHECK-BE: cmpld 0, 3, 4                   # encoding: [0x7c,0x23,0x20,0x40]
+# CHECK-LE: cmpld 0, 3, 4                   # encoding: [0x40,0x20,0x23,0x7c]
+            cmpld 3, 4
+
+# CHECK-BE: cmpwi 2, 3, 128                 # encoding: [0x2d,0x03,0x00,0x80]
+# CHECK-LE: cmpwi 2, 3, 128                 # encoding: [0x80,0x00,0x03,0x2d]
+            cmpwi 2, 3, 128
+# CHECK-BE: cmpwi 0, 3, 128                 # encoding: [0x2c,0x03,0x00,0x80]
+# CHECK-LE: cmpwi 0, 3, 128                 # encoding: [0x80,0x00,0x03,0x2c]
+            cmpwi 3, 128
+# CHECK-BE: cmpw 2, 3, 4                    # encoding: [0x7d,0x03,0x20,0x00]
+# CHECK-LE: cmpw 2, 3, 4                    # encoding: [0x00,0x20,0x03,0x7d]
+            cmpw 2, 3, 4
+# CHECK-BE: cmpw 0, 3, 4                    # encoding: [0x7c,0x03,0x20,0x00]
+# CHECK-LE: cmpw 0, 3, 4                    # encoding: [0x00,0x20,0x03,0x7c]
+            cmpw 3, 4
+# CHECK-BE: cmplwi 2, 3, 128                # encoding: [0x29,0x03,0x00,0x80]
+# CHECK-LE: cmplwi 2, 3, 128                # encoding: [0x80,0x00,0x03,0x29]
+            cmplwi 2, 3, 128
+# CHECK-BE: cmplwi 0, 3, 128                # encoding: [0x28,0x03,0x00,0x80]
+# CHECK-LE: cmplwi 0, 3, 128                # encoding: [0x80,0x00,0x03,0x28]
+            cmplwi 3, 128
+# CHECK-BE: cmplw 2, 3, 4                   # encoding: [0x7d,0x03,0x20,0x40]
+# CHECK-LE: cmplw 2, 3, 4                   # encoding: [0x40,0x20,0x03,0x7d]
+            cmplw 2, 3, 4
+# CHECK-BE: cmplw 0, 3, 4                   # encoding: [0x7c,0x03,0x20,0x40]
+# CHECK-LE: cmplw 0, 3, 4                   # encoding: [0x40,0x20,0x03,0x7c]
+            cmplw 3, 4
 
 # Trap mnemonics
 
-# CHECK: twi 16, 3, 4                    # encoding: [0x0e,0x03,0x00,0x04]
-         twlti 3, 4
-# CHECK: tw 16, 3, 4                     # encoding: [0x7e,0x03,0x20,0x08]
-         twlt 3, 4
-# CHECK: tdi 16, 3, 4                    # encoding: [0x0a,0x03,0x00,0x04]
-         tdlti 3, 4
-# CHECK: td 16, 3, 4                     # encoding: [0x7e,0x03,0x20,0x88]
-         tdlt 3, 4
-
-# CHECK: twi 20, 3, 4                    # encoding: [0x0e,0x83,0x00,0x04]
-         twlei 3, 4
-# CHECK: tw 20, 3, 4                     # encoding: [0x7e,0x83,0x20,0x08]
-         twle 3, 4
-# CHECK: tdi 20, 3, 4                    # encoding: [0x0a,0x83,0x00,0x04]
-         tdlei 3, 4
-# CHECK: td 20, 3, 4                     # encoding: [0x7e,0x83,0x20,0x88]
-         tdle 3, 4
-
-# CHECK: twi 4, 3, 4                     # encoding: [0x0c,0x83,0x00,0x04]
-         tweqi 3, 4
-# CHECK: tw 4, 3, 4                      # encoding: [0x7c,0x83,0x20,0x08]
-         tweq 3, 4
-# CHECK: tdi 4, 3, 4                     # encoding: [0x08,0x83,0x00,0x04]
-         tdeqi 3, 4
-# CHECK: td 4, 3, 4                      # encoding: [0x7c,0x83,0x20,0x88]
-         tdeq 3, 4
-
-# CHECK: twi 12, 3, 4                    # encoding: [0x0d,0x83,0x00,0x04]
-         twgei 3, 4
-# CHECK: tw 12, 3, 4                     # encoding: [0x7d,0x83,0x20,0x08]
-         twge 3, 4
-# CHECK: tdi 12, 3, 4                    # encoding: [0x09,0x83,0x00,0x04]
-         tdgei 3, 4
-# CHECK: td 12, 3, 4                     # encoding: [0x7d,0x83,0x20,0x88]
-         tdge 3, 4
-
-# CHECK: twi 8, 3, 4                     # encoding: [0x0d,0x03,0x00,0x04]
-         twgti 3, 4
-# CHECK: tw 8, 3, 4                      # encoding: [0x7d,0x03,0x20,0x08]
-         twgt 3, 4
-# CHECK: tdi 8, 3, 4                     # encoding: [0x09,0x03,0x00,0x04]
-         tdgti 3, 4
-# CHECK: td 8, 3, 4                      # encoding: [0x7d,0x03,0x20,0x88]
-         tdgt 3, 4
-
-# CHECK: twi 12, 3, 4                    # encoding: [0x0d,0x83,0x00,0x04]
-         twnli 3, 4
-# CHECK: tw 12, 3, 4                     # encoding: [0x7d,0x83,0x20,0x08]
-         twnl 3, 4
-# CHECK: tdi 12, 3, 4                    # encoding: [0x09,0x83,0x00,0x04]
-         tdnli 3, 4
-# CHECK: td 12, 3, 4                     # encoding: [0x7d,0x83,0x20,0x88]
-         tdnl 3, 4
-
-# CHECK: twi 24, 3, 4                    # encoding: [0x0f,0x03,0x00,0x04]
-         twnei 3, 4
-# CHECK: tw 24, 3, 4                     # encoding: [0x7f,0x03,0x20,0x08]
-         twne 3, 4
-# CHECK: tdi 24, 3, 4                    # encoding: [0x0b,0x03,0x00,0x04]
-         tdnei 3, 4
-# CHECK: td 24, 3, 4                     # encoding: [0x7f,0x03,0x20,0x88]
-         tdne 3, 4
-
-# CHECK: twi 20, 3, 4                    # encoding: [0x0e,0x83,0x00,0x04]
-         twngi 3, 4
-# CHECK: tw 20, 3, 4                     # encoding: [0x7e,0x83,0x20,0x08]
-         twng 3, 4
-# CHECK: tdi 20, 3, 4                    # encoding: [0x0a,0x83,0x00,0x04]
-         tdngi 3, 4
-# CHECK: td 20, 3, 4                     # encoding: [0x7e,0x83,0x20,0x88]
-         tdng 3, 4
-
-# CHECK: twi 2, 3, 4                     # encoding: [0x0c,0x43,0x00,0x04]
-         twllti 3, 4
-# CHECK: tw 2, 3, 4                      # encoding: [0x7c,0x43,0x20,0x08]
-         twllt 3, 4
-# CHECK: tdi 2, 3, 4                     # encoding: [0x08,0x43,0x00,0x04]
-         tdllti 3, 4
-# CHECK: td 2, 3, 4                      # encoding: [0x7c,0x43,0x20,0x88]
-         tdllt 3, 4
-
-# CHECK: twi 6, 3, 4                     # encoding: [0x0c,0xc3,0x00,0x04]
-         twllei 3, 4
-# CHECK: tw 6, 3, 4                      # encoding: [0x7c,0xc3,0x20,0x08]
-         twlle 3, 4
-# CHECK: tdi 6, 3, 4                     # encoding: [0x08,0xc3,0x00,0x04]
-         tdllei 3, 4
-# CHECK: td 6, 3, 4                      # encoding: [0x7c,0xc3,0x20,0x88]
-         tdlle 3, 4
-
-# CHECK: twi 5, 3, 4                     # encoding: [0x0c,0xa3,0x00,0x04]
-         twlgei 3, 4
-# CHECK: tw 5, 3, 4                      # encoding: [0x7c,0xa3,0x20,0x08]
-         twlge 3, 4
-# CHECK: tdi 5, 3, 4                     # encoding: [0x08,0xa3,0x00,0x04]
-         tdlgei 3, 4
-# CHECK: td 5, 3, 4                      # encoding: [0x7c,0xa3,0x20,0x88]
-         tdlge 3, 4
-
-# CHECK: twi 1, 3, 4                     # encoding: [0x0c,0x23,0x00,0x04]
-         twlgti 3, 4
-# CHECK: tw 1, 3, 4                      # encoding: [0x7c,0x23,0x20,0x08]
-         twlgt 3, 4
-# CHECK: tdi 1, 3, 4                     # encoding: [0x08,0x23,0x00,0x04]
-         tdlgti 3, 4
-# CHECK: td 1, 3, 4                      # encoding: [0x7c,0x23,0x20,0x88]
-         tdlgt 3, 4
-
-# CHECK: twi 5, 3, 4                     # encoding: [0x0c,0xa3,0x00,0x04]
-         twlnli 3, 4
-# CHECK: tw 5, 3, 4                      # encoding: [0x7c,0xa3,0x20,0x08]
-         twlnl 3, 4
-# CHECK: tdi 5, 3, 4                     # encoding: [0x08,0xa3,0x00,0x04]
-         tdlnli 3, 4
-# CHECK: td 5, 3, 4                      # encoding: [0x7c,0xa3,0x20,0x88]
-         tdlnl 3, 4
-
-# CHECK: twi 6, 3, 4                     # encoding: [0x0c,0xc3,0x00,0x04]
-         twlngi 3, 4
-# CHECK: tw 6, 3, 4                      # encoding: [0x7c,0xc3,0x20,0x08]
-         twlng 3, 4
-# CHECK: tdi 6, 3, 4                     # encoding: [0x08,0xc3,0x00,0x04]
-         tdlngi 3, 4
-# CHECK: td 6, 3, 4                      # encoding: [0x7c,0xc3,0x20,0x88]
-         tdlng 3, 4
-
-# CHECK: twi 31, 3, 4                    # encoding: [0x0f,0xe3,0x00,0x04]
-         twui 3, 4
-# CHECK: tw 31, 3, 4                     # encoding: [0x7f,0xe3,0x20,0x08]
-         twu 3, 4
-# CHECK: tdi 31, 3, 4                    # encoding: [0x0b,0xe3,0x00,0x04]
-         tdui 3, 4
-# CHECK: td 31, 3, 4                     # encoding: [0x7f,0xe3,0x20,0x88]
-         tdu 3, 4
-
-# CHECK: trap                            # encoding: [0x7f,0xe0,0x00,0x08]
-         trap
+# CHECK-BE: twi 16, 3, 4                    # encoding: [0x0e,0x03,0x00,0x04]
+# CHECK-LE: twi 16, 3, 4                    # encoding: [0x04,0x00,0x03,0x0e]
+            twlti 3, 4
+# CHECK-BE: tw 16, 3, 4                     # encoding: [0x7e,0x03,0x20,0x08]
+# CHECK-LE: tw 16, 3, 4                     # encoding: [0x08,0x20,0x03,0x7e]
+            twlt 3, 4
+# CHECK-BE: tdi 16, 3, 4                    # encoding: [0x0a,0x03,0x00,0x04]
+# CHECK-LE: tdi 16, 3, 4                    # encoding: [0x04,0x00,0x03,0x0a]
+            tdlti 3, 4
+# CHECK-BE: td 16, 3, 4                     # encoding: [0x7e,0x03,0x20,0x88]
+# CHECK-LE: td 16, 3, 4                     # encoding: [0x88,0x20,0x03,0x7e]
+            tdlt 3, 4
+
+# CHECK-BE: twi 20, 3, 4                    # encoding: [0x0e,0x83,0x00,0x04]
+# CHECK-LE: twi 20, 3, 4                    # encoding: [0x04,0x00,0x83,0x0e]
+            twlei 3, 4
+# CHECK-BE: tw 20, 3, 4                     # encoding: [0x7e,0x83,0x20,0x08]
+# CHECK-LE: tw 20, 3, 4                     # encoding: [0x08,0x20,0x83,0x7e]
+            twle 3, 4
+# CHECK-BE: tdi 20, 3, 4                    # encoding: [0x0a,0x83,0x00,0x04]
+# CHECK-LE: tdi 20, 3, 4                    # encoding: [0x04,0x00,0x83,0x0a]
+            tdlei 3, 4
+# CHECK-BE: td 20, 3, 4                     # encoding: [0x7e,0x83,0x20,0x88]
+# CHECK-LE: td 20, 3, 4                     # encoding: [0x88,0x20,0x83,0x7e]
+            tdle 3, 4
+
+# CHECK-BE: twi 4, 3, 4                     # encoding: [0x0c,0x83,0x00,0x04]
+# CHECK-LE: twi 4, 3, 4                     # encoding: [0x04,0x00,0x83,0x0c]
+            tweqi 3, 4
+# CHECK-BE: tw 4, 3, 4                      # encoding: [0x7c,0x83,0x20,0x08]
+# CHECK-LE: tw 4, 3, 4                      # encoding: [0x08,0x20,0x83,0x7c]
+            tweq 3, 4
+# CHECK-BE: tdi 4, 3, 4                     # encoding: [0x08,0x83,0x00,0x04]
+# CHECK-LE: tdi 4, 3, 4                     # encoding: [0x04,0x00,0x83,0x08]
+            tdeqi 3, 4
+# CHECK-BE: td 4, 3, 4                      # encoding: [0x7c,0x83,0x20,0x88]
+# CHECK-LE: td 4, 3, 4                      # encoding: [0x88,0x20,0x83,0x7c]
+            tdeq 3, 4
+
+# CHECK-BE: twi 12, 3, 4                    # encoding: [0x0d,0x83,0x00,0x04]
+# CHECK-LE: twi 12, 3, 4                    # encoding: [0x04,0x00,0x83,0x0d]
+            twgei 3, 4
+# CHECK-BE: tw 12, 3, 4                     # encoding: [0x7d,0x83,0x20,0x08]
+# CHECK-LE: tw 12, 3, 4                     # encoding: [0x08,0x20,0x83,0x7d]
+            twge 3, 4
+# CHECK-BE: tdi 12, 3, 4                    # encoding: [0x09,0x83,0x00,0x04]
+# CHECK-LE: tdi 12, 3, 4                    # encoding: [0x04,0x00,0x83,0x09]
+            tdgei 3, 4
+# CHECK-BE: td 12, 3, 4                     # encoding: [0x7d,0x83,0x20,0x88]
+# CHECK-LE: td 12, 3, 4                     # encoding: [0x88,0x20,0x83,0x7d]
+            tdge 3, 4
+
+# CHECK-BE: twi 8, 3, 4                     # encoding: [0x0d,0x03,0x00,0x04]
+# CHECK-LE: twi 8, 3, 4                     # encoding: [0x04,0x00,0x03,0x0d]
+            twgti 3, 4
+# CHECK-BE: tw 8, 3, 4                      # encoding: [0x7d,0x03,0x20,0x08]
+# CHECK-LE: tw 8, 3, 4                      # encoding: [0x08,0x20,0x03,0x7d]
+            twgt 3, 4
+# CHECK-BE: tdi 8, 3, 4                     # encoding: [0x09,0x03,0x00,0x04]
+# CHECK-LE: tdi 8, 3, 4                     # encoding: [0x04,0x00,0x03,0x09]
+            tdgti 3, 4
+# CHECK-BE: td 8, 3, 4                      # encoding: [0x7d,0x03,0x20,0x88]
+# CHECK-LE: td 8, 3, 4                      # encoding: [0x88,0x20,0x03,0x7d]
+            tdgt 3, 4
+
+# CHECK-BE: twi 12, 3, 4                    # encoding: [0x0d,0x83,0x00,0x04]
+# CHECK-LE: twi 12, 3, 4                    # encoding: [0x04,0x00,0x83,0x0d]
+            twnli 3, 4
+# CHECK-BE: tw 12, 3, 4                     # encoding: [0x7d,0x83,0x20,0x08]
+# CHECK-LE: tw 12, 3, 4                     # encoding: [0x08,0x20,0x83,0x7d]
+            twnl 3, 4
+# CHECK-BE: tdi 12, 3, 4                    # encoding: [0x09,0x83,0x00,0x04]
+# CHECK-LE: tdi 12, 3, 4                    # encoding: [0x04,0x00,0x83,0x09]
+            tdnli 3, 4
+# CHECK-BE: td 12, 3, 4                     # encoding: [0x7d,0x83,0x20,0x88]
+# CHECK-LE: td 12, 3, 4                     # encoding: [0x88,0x20,0x83,0x7d]
+            tdnl 3, 4
+
+# CHECK-BE: twi 24, 3, 4                    # encoding: [0x0f,0x03,0x00,0x04]
+# CHECK-LE: twi 24, 3, 4                    # encoding: [0x04,0x00,0x03,0x0f]
+            twnei 3, 4
+# CHECK-BE: tw 24, 3, 4                     # encoding: [0x7f,0x03,0x20,0x08]
+# CHECK-LE: tw 24, 3, 4                     # encoding: [0x08,0x20,0x03,0x7f]
+            twne 3, 4
+# CHECK-BE: tdi 24, 3, 4                    # encoding: [0x0b,0x03,0x00,0x04]
+# CHECK-LE: tdi 24, 3, 4                    # encoding: [0x04,0x00,0x03,0x0b]
+            tdnei 3, 4
+# CHECK-BE: td 24, 3, 4                     # encoding: [0x7f,0x03,0x20,0x88]
+# CHECK-LE: td 24, 3, 4                     # encoding: [0x88,0x20,0x03,0x7f]
+            tdne 3, 4
+
+# CHECK-BE: twi 20, 3, 4                    # encoding: [0x0e,0x83,0x00,0x04]
+# CHECK-LE: twi 20, 3, 4                    # encoding: [0x04,0x00,0x83,0x0e]
+            twngi 3, 4
+# CHECK-BE: tw 20, 3, 4                     # encoding: [0x7e,0x83,0x20,0x08]
+# CHECK-LE: tw 20, 3, 4                     # encoding: [0x08,0x20,0x83,0x7e]
+            twng 3, 4
+# CHECK-BE: tdi 20, 3, 4                    # encoding: [0x0a,0x83,0x00,0x04]
+# CHECK-LE: tdi 20, 3, 4                    # encoding: [0x04,0x00,0x83,0x0a]
+            tdngi 3, 4
+# CHECK-BE: td 20, 3, 4                     # encoding: [0x7e,0x83,0x20,0x88]
+# CHECK-LE: td 20, 3, 4                     # encoding: [0x88,0x20,0x83,0x7e]
+            tdng 3, 4
+
+# CHECK-BE: twi 2, 3, 4                     # encoding: [0x0c,0x43,0x00,0x04]
+# CHECK-LE: twi 2, 3, 4                     # encoding: [0x04,0x00,0x43,0x0c]
+            twllti 3, 4
+# CHECK-BE: tw 2, 3, 4                      # encoding: [0x7c,0x43,0x20,0x08]
+# CHECK-LE: tw 2, 3, 4                      # encoding: [0x08,0x20,0x43,0x7c]
+            twllt 3, 4
+# CHECK-BE: tdi 2, 3, 4                     # encoding: [0x08,0x43,0x00,0x04]
+# CHECK-LE: tdi 2, 3, 4                     # encoding: [0x04,0x00,0x43,0x08]
+            tdllti 3, 4
+# CHECK-BE: td 2, 3, 4                      # encoding: [0x7c,0x43,0x20,0x88]
+# CHECK-LE: td 2, 3, 4                      # encoding: [0x88,0x20,0x43,0x7c]
+            tdllt 3, 4
+
+# CHECK-BE: twi 6, 3, 4                     # encoding: [0x0c,0xc3,0x00,0x04]
+# CHECK-LE: twi 6, 3, 4                     # encoding: [0x04,0x00,0xc3,0x0c]
+            twllei 3, 4
+# CHECK-BE: tw 6, 3, 4                      # encoding: [0x7c,0xc3,0x20,0x08]
+# CHECK-LE: tw 6, 3, 4                      # encoding: [0x08,0x20,0xc3,0x7c]
+            twlle 3, 4
+# CHECK-BE: tdi 6, 3, 4                     # encoding: [0x08,0xc3,0x00,0x04]
+# CHECK-LE: tdi 6, 3, 4                     # encoding: [0x04,0x00,0xc3,0x08]
+            tdllei 3, 4
+# CHECK-BE: td 6, 3, 4                      # encoding: [0x7c,0xc3,0x20,0x88]
+# CHECK-LE: td 6, 3, 4                      # encoding: [0x88,0x20,0xc3,0x7c]
+            tdlle 3, 4
+
+# CHECK-BE: twi 5, 3, 4                     # encoding: [0x0c,0xa3,0x00,0x04]
+# CHECK-LE: twi 5, 3, 4                     # encoding: [0x04,0x00,0xa3,0x0c]
+            twlgei 3, 4
+# CHECK-BE: tw 5, 3, 4                      # encoding: [0x7c,0xa3,0x20,0x08]
+# CHECK-LE: tw 5, 3, 4                      # encoding: [0x08,0x20,0xa3,0x7c]
+            twlge 3, 4
+# CHECK-BE: tdi 5, 3, 4                     # encoding: [0x08,0xa3,0x00,0x04]
+# CHECK-LE: tdi 5, 3, 4                     # encoding: [0x04,0x00,0xa3,0x08]
+            tdlgei 3, 4
+# CHECK-BE: td 5, 3, 4                      # encoding: [0x7c,0xa3,0x20,0x88]
+# CHECK-LE: td 5, 3, 4                      # encoding: [0x88,0x20,0xa3,0x7c]
+            tdlge 3, 4
+
+# CHECK-BE: twi 1, 3, 4                     # encoding: [0x0c,0x23,0x00,0x04]
+# CHECK-LE: twi 1, 3, 4                     # encoding: [0x04,0x00,0x23,0x0c]
+            twlgti 3, 4
+# CHECK-BE: tw 1, 3, 4                      # encoding: [0x7c,0x23,0x20,0x08]
+# CHECK-LE: tw 1, 3, 4                      # encoding: [0x08,0x20,0x23,0x7c]
+            twlgt 3, 4
+# CHECK-BE: tdi 1, 3, 4                     # encoding: [0x08,0x23,0x00,0x04]
+# CHECK-LE: tdi 1, 3, 4                     # encoding: [0x04,0x00,0x23,0x08]
+            tdlgti 3, 4
+# CHECK-BE: td 1, 3, 4                      # encoding: [0x7c,0x23,0x20,0x88]
+# CHECK-LE: td 1, 3, 4                      # encoding: [0x88,0x20,0x23,0x7c]
+            tdlgt 3, 4
+
+# CHECK-BE: twi 5, 3, 4                     # encoding: [0x0c,0xa3,0x00,0x04]
+# CHECK-LE: twi 5, 3, 4                     # encoding: [0x04,0x00,0xa3,0x0c]
+            twlnli 3, 4
+# CHECK-BE: tw 5, 3, 4                      # encoding: [0x7c,0xa3,0x20,0x08]
+# CHECK-LE: tw 5, 3, 4                      # encoding: [0x08,0x20,0xa3,0x7c]
+            twlnl 3, 4
+# CHECK-BE: tdi 5, 3, 4                     # encoding: [0x08,0xa3,0x00,0x04]
+# CHECK-LE: tdi 5, 3, 4                     # encoding: [0x04,0x00,0xa3,0x08]
+            tdlnli 3, 4
+# CHECK-BE: td 5, 3, 4                      # encoding: [0x7c,0xa3,0x20,0x88]
+# CHECK-LE: td 5, 3, 4                      # encoding: [0x88,0x20,0xa3,0x7c]
+            tdlnl 3, 4
+
+# CHECK-BE: twi 6, 3, 4                     # encoding: [0x0c,0xc3,0x00,0x04]
+# CHECK-LE: twi 6, 3, 4                     # encoding: [0x04,0x00,0xc3,0x0c]
+            twlngi 3, 4
+# CHECK-BE: tw 6, 3, 4                      # encoding: [0x7c,0xc3,0x20,0x08]
+# CHECK-LE: tw 6, 3, 4                      # encoding: [0x08,0x20,0xc3,0x7c]
+            twlng 3, 4
+# CHECK-BE: tdi 6, 3, 4                     # encoding: [0x08,0xc3,0x00,0x04]
+# CHECK-LE: tdi 6, 3, 4                     # encoding: [0x04,0x00,0xc3,0x08]
+            tdlngi 3, 4
+# CHECK-BE: td 6, 3, 4                      # encoding: [0x7c,0xc3,0x20,0x88]
+# CHECK-LE: td 6, 3, 4                      # encoding: [0x88,0x20,0xc3,0x7c]
+            tdlng 3, 4
+
+# CHECK-BE: twi 31, 3, 4                    # encoding: [0x0f,0xe3,0x00,0x04]
+# CHECK-LE: twi 31, 3, 4                    # encoding: [0x04,0x00,0xe3,0x0f]
+            twui 3, 4
+# CHECK-BE: tw 31, 3, 4                     # encoding: [0x7f,0xe3,0x20,0x08]
+# CHECK-LE: tw 31, 3, 4                     # encoding: [0x08,0x20,0xe3,0x7f]
+            twu 3, 4
+# CHECK-BE: tdi 31, 3, 4                    # encoding: [0x0b,0xe3,0x00,0x04]
+# CHECK-LE: tdi 31, 3, 4                    # encoding: [0x04,0x00,0xe3,0x0b]
+            tdui 3, 4
+# CHECK-BE: td 31, 3, 4                     # encoding: [0x7f,0xe3,0x20,0x88]
+# CHECK-LE: td 31, 3, 4                     # encoding: [0x88,0x20,0xe3,0x7f]
+            tdu 3, 4
+
+# CHECK-BE: trap                            # encoding: [0x7f,0xe0,0x00,0x08]
+# CHECK-LE: trap                            # encoding: [0x08,0x00,0xe0,0x7f]
+            trap
 
 # Rotate and shift mnemonics
 
-# CHECK: rldicr 2, 3, 5, 3               # encoding: [0x78,0x62,0x28,0xc4]
-         extldi 2, 3, 4, 5
-# CHECK: rldicr. 2, 3, 5, 3              # encoding: [0x78,0x62,0x28,0xc5]
-         extldi. 2, 3, 4, 5
-# CHECK: rldicl 2, 3, 9, 60              # encoding: [0x78,0x62,0x4f,0x20]
-         extrdi 2, 3, 4, 5
-# CHECK: rldicl. 2, 3, 9, 60             # encoding: [0x78,0x62,0x4f,0x21]
-         extrdi. 2, 3, 4, 5
-# CHECK: rldimi 2, 3, 55, 5              # encoding: [0x78,0x62,0xb9,0x4e]
-         insrdi 2, 3, 4, 5
-# CHECK: rldimi. 2, 3, 55, 5             # encoding: [0x78,0x62,0xb9,0x4f]
-         insrdi. 2, 3, 4, 5
-# CHECK: rldicl 2, 3, 4, 0               # encoding: [0x78,0x62,0x20,0x00]
-         rotldi 2, 3, 4
-# CHECK: rldicl. 2, 3, 4, 0              # encoding: [0x78,0x62,0x20,0x01]
-         rotldi. 2, 3, 4
-# CHECK: rldicl 2, 3, 60, 0              # encoding: [0x78,0x62,0xe0,0x02]
-         rotrdi 2, 3, 4
-# CHECK: rldicl. 2, 3, 60, 0             # encoding: [0x78,0x62,0xe0,0x03]
-         rotrdi. 2, 3, 4
-# CHECK: rldcl 2, 3, 4, 0                # encoding: [0x78,0x62,0x20,0x10]
-         rotld 2, 3, 4
-# CHECK: rldcl. 2, 3, 4, 0               # encoding: [0x78,0x62,0x20,0x11]
-         rotld. 2, 3, 4
-# CHECK: sldi 2, 3, 4                    # encoding: [0x78,0x62,0x26,0xe4]
-         sldi 2, 3, 4
-# CHECK: rldicr. 2, 3, 4, 59             # encoding: [0x78,0x62,0x26,0xe5]
-         sldi. 2, 3, 4
-# CHECK: rldicl 2, 3, 60, 4              # encoding: [0x78,0x62,0xe1,0x02]
-         srdi 2, 3, 4
-# CHECK: rldicl. 2, 3, 60, 4             # encoding: [0x78,0x62,0xe1,0x03]
-         srdi. 2, 3, 4
-# CHECK: rldicl 2, 3, 0, 4               # encoding: [0x78,0x62,0x01,0x00]
-         clrldi 2, 3, 4
-# CHECK: rldicl. 2, 3, 0, 4              # encoding: [0x78,0x62,0x01,0x01]
-         clrldi. 2, 3, 4
-# CHECK: rldicr 2, 3, 0, 59              # encoding: [0x78,0x62,0x06,0xe4]
-         clrrdi 2, 3, 4
-# CHECK: rldicr. 2, 3, 0, 59             # encoding: [0x78,0x62,0x06,0xe5]
-         clrrdi. 2, 3, 4
-# CHECK: rldic 2, 3, 4, 1                # encoding: [0x78,0x62,0x20,0x48]
-         clrlsldi 2, 3, 5, 4
-# CHECK: rldic. 2, 3, 4, 1               # encoding: [0x78,0x62,0x20,0x49]
-         clrlsldi. 2, 3, 5, 4
-
-# CHECK: rlwinm 2, 3, 5, 0, 3            # encoding: [0x54,0x62,0x28,0x06]
-         extlwi 2, 3, 4, 5
-# CHECK: rlwinm. 2, 3, 5, 0, 3           # encoding: [0x54,0x62,0x28,0x07]
-         extlwi. 2, 3, 4, 5
-# CHECK: rlwinm 2, 3, 9, 28, 31          # encoding: [0x54,0x62,0x4f,0x3e]
-         extrwi 2, 3, 4, 5
-# CHECK: rlwinm. 2, 3, 9, 28, 31         # encoding: [0x54,0x62,0x4f,0x3f]
-         extrwi. 2, 3, 4, 5
-# CHECK: rlwimi 2, 3, 27, 5, 8           # encoding: [0x50,0x62,0xd9,0x50]
-         inslwi 2, 3, 4, 5
-# CHECK: rlwimi. 2, 3, 27, 5, 8          # encoding: [0x50,0x62,0xd9,0x51]
-         inslwi. 2, 3, 4, 5
-# CHECK: rlwimi 2, 3, 23, 5, 8           # encoding: [0x50,0x62,0xb9,0x50]
-         insrwi 2, 3, 4, 5
-# CHECK: rlwimi. 2, 3, 23, 5, 8          # encoding: [0x50,0x62,0xb9,0x51]
-         insrwi. 2, 3, 4, 5
-# CHECK: rlwinm 2, 3, 4, 0, 31           # encoding: [0x54,0x62,0x20,0x3e]
-         rotlwi 2, 3, 4
-# CHECK: rlwinm. 2, 3, 4, 0, 31          # encoding: [0x54,0x62,0x20,0x3f]
-         rotlwi. 2, 3, 4
-# CHECK: rlwinm 2, 3, 28, 0, 31          # encoding: [0x54,0x62,0xe0,0x3e]
-         rotrwi 2, 3, 4
-# CHECK: rlwinm. 2, 3, 28, 0, 31         # encoding: [0x54,0x62,0xe0,0x3f]
-         rotrwi. 2, 3, 4
-# CHECK: rlwnm 2, 3, 4, 0, 31            # encoding: [0x5c,0x62,0x20,0x3e]
-         rotlw 2, 3, 4
-# CHECK: rlwnm. 2, 3, 4, 0, 31           # encoding: [0x5c,0x62,0x20,0x3f]
-         rotlw. 2, 3, 4
-# CHECK: slwi 2, 3, 4                    # encoding: [0x54,0x62,0x20,0x36]
-         slwi 2, 3, 4
-# CHECK: rlwinm. 2, 3, 4, 0, 27          # encoding: [0x54,0x62,0x20,0x37]
-         slwi. 2, 3, 4
-# CHECK: srwi 2, 3, 4                    # encoding: [0x54,0x62,0xe1,0x3e]
-         srwi 2, 3, 4
-# CHECK: rlwinm. 2, 3, 28, 4, 31         # encoding: [0x54,0x62,0xe1,0x3f]
-         srwi. 2, 3, 4
-# CHECK: rlwinm 2, 3, 0, 4, 31           # encoding: [0x54,0x62,0x01,0x3e]
-         clrlwi 2, 3, 4
-# CHECK: rlwinm. 2, 3, 0, 4, 31          # encoding: [0x54,0x62,0x01,0x3f]
-         clrlwi. 2, 3, 4
-# CHECK: rlwinm 2, 3, 0, 0, 27           # encoding: [0x54,0x62,0x00,0x36]
-         clrrwi 2, 3, 4
-# CHECK: rlwinm. 2, 3, 0, 0, 27          # encoding: [0x54,0x62,0x00,0x37]
-         clrrwi. 2, 3, 4
-# CHECK: rlwinm 2, 3, 4, 1, 27           # encoding: [0x54,0x62,0x20,0x76]
-         clrlslwi 2, 3, 5, 4
-# CHECK: rlwinm. 2, 3, 4, 1, 27          # encoding: [0x54,0x62,0x20,0x77]
-         clrlslwi. 2, 3, 5, 4
+# CHECK-BE: rldicr 2, 3, 5, 3               # encoding: [0x78,0x62,0x28,0xc4]
+# CHECK-LE: rldicr 2, 3, 5, 3               # encoding: [0xc4,0x28,0x62,0x78]
+            extldi 2, 3, 4, 5
+# CHECK-BE: rldicr. 2, 3, 5, 3              # encoding: [0x78,0x62,0x28,0xc5]
+# CHECK-LE: rldicr. 2, 3, 5, 3              # encoding: [0xc5,0x28,0x62,0x78]
+            extldi. 2, 3, 4, 5
+# CHECK-BE: rldicl 2, 3, 9, 60              # encoding: [0x78,0x62,0x4f,0x20]
+# CHECK-LE: rldicl 2, 3, 9, 60              # encoding: [0x20,0x4f,0x62,0x78]
+            extrdi 2, 3, 4, 5
+# CHECK-BE: rldicl. 2, 3, 9, 60             # encoding: [0x78,0x62,0x4f,0x21]
+# CHECK-LE: rldicl. 2, 3, 9, 60             # encoding: [0x21,0x4f,0x62,0x78]
+            extrdi. 2, 3, 4, 5
+# CHECK-BE: rldimi 2, 3, 55, 5              # encoding: [0x78,0x62,0xb9,0x4e]
+# CHECK-LE: rldimi 2, 3, 55, 5              # encoding: [0x4e,0xb9,0x62,0x78]
+            insrdi 2, 3, 4, 5
+# CHECK-BE: rldimi. 2, 3, 55, 5             # encoding: [0x78,0x62,0xb9,0x4f]
+# CHECK-LE: rldimi. 2, 3, 55, 5             # encoding: [0x4f,0xb9,0x62,0x78]
+            insrdi. 2, 3, 4, 5
+# CHECK-BE: rldicl 2, 3, 4, 0               # encoding: [0x78,0x62,0x20,0x00]
+# CHECK-LE: rldicl 2, 3, 4, 0               # encoding: [0x00,0x20,0x62,0x78]
+            rotldi 2, 3, 4
+# CHECK-BE: rldicl. 2, 3, 4, 0              # encoding: [0x78,0x62,0x20,0x01]
+# CHECK-LE: rldicl. 2, 3, 4, 0              # encoding: [0x01,0x20,0x62,0x78]
+            rotldi. 2, 3, 4
+# CHECK-BE: rldicl 2, 3, 60, 0              # encoding: [0x78,0x62,0xe0,0x02]
+# CHECK-LE: rldicl 2, 3, 60, 0              # encoding: [0x02,0xe0,0x62,0x78]
+            rotrdi 2, 3, 4
+# CHECK-BE: rldicl. 2, 3, 60, 0             # encoding: [0x78,0x62,0xe0,0x03]
+# CHECK-LE: rldicl. 2, 3, 60, 0             # encoding: [0x03,0xe0,0x62,0x78]
+            rotrdi. 2, 3, 4
+# CHECK-BE: rldcl 2, 3, 4, 0                # encoding: [0x78,0x62,0x20,0x10]
+# CHECK-LE: rldcl 2, 3, 4, 0                # encoding: [0x10,0x20,0x62,0x78]
+            rotld 2, 3, 4
+# CHECK-BE: rldcl. 2, 3, 4, 0               # encoding: [0x78,0x62,0x20,0x11]
+# CHECK-LE: rldcl. 2, 3, 4, 0               # encoding: [0x11,0x20,0x62,0x78]
+            rotld. 2, 3, 4
+# CHECK-BE: sldi 2, 3, 4                    # encoding: [0x78,0x62,0x26,0xe4]
+# CHECK-LE: sldi 2, 3, 4                    # encoding: [0xe4,0x26,0x62,0x78]
+            sldi 2, 3, 4
+# CHECK-BE: rldicr. 2, 3, 4, 59             # encoding: [0x78,0x62,0x26,0xe5]
+# CHECK-LE: rldicr. 2, 3, 4, 59             # encoding: [0xe5,0x26,0x62,0x78]
+            sldi. 2, 3, 4
+# CHECK-BE: rldicl 2, 3, 60, 4              # encoding: [0x78,0x62,0xe1,0x02]
+# CHECK-LE: rldicl 2, 3, 60, 4              # encoding: [0x02,0xe1,0x62,0x78]
+            srdi 2, 3, 4
+# CHECK-BE: rldicl. 2, 3, 60, 4             # encoding: [0x78,0x62,0xe1,0x03]
+# CHECK-LE: rldicl. 2, 3, 60, 4             # encoding: [0x03,0xe1,0x62,0x78]
+            srdi. 2, 3, 4
+# CHECK-BE: rldicl 2, 3, 0, 4               # encoding: [0x78,0x62,0x01,0x00]
+# CHECK-LE: rldicl 2, 3, 0, 4               # encoding: [0x00,0x01,0x62,0x78]
+            clrldi 2, 3, 4
+# CHECK-BE: rldicl. 2, 3, 0, 4              # encoding: [0x78,0x62,0x01,0x01]
+# CHECK-LE: rldicl. 2, 3, 0, 4              # encoding: [0x01,0x01,0x62,0x78]
+            clrldi. 2, 3, 4
+# CHECK-BE: rldicr 2, 3, 0, 59              # encoding: [0x78,0x62,0x06,0xe4]
+# CHECK-LE: rldicr 2, 3, 0, 59              # encoding: [0xe4,0x06,0x62,0x78]
+            clrrdi 2, 3, 4
+# CHECK-BE: rldicr. 2, 3, 0, 59             # encoding: [0x78,0x62,0x06,0xe5]
+# CHECK-LE: rldicr. 2, 3, 0, 59             # encoding: [0xe5,0x06,0x62,0x78]
+            clrrdi. 2, 3, 4
+# CHECK-BE: rldic 2, 3, 4, 1                # encoding: [0x78,0x62,0x20,0x48]
+# CHECK-LE: rldic 2, 3, 4, 1                # encoding: [0x48,0x20,0x62,0x78]
+            clrlsldi 2, 3, 5, 4
+# CHECK-BE: rldic. 2, 3, 4, 1               # encoding: [0x78,0x62,0x20,0x49]
+# CHECK-LE: rldic. 2, 3, 4, 1               # encoding: [0x49,0x20,0x62,0x78]
+            clrlsldi. 2, 3, 5, 4
+
+# CHECK-BE: rlwinm 2, 3, 5, 0, 3            # encoding: [0x54,0x62,0x28,0x06]
+# CHECK-LE: rlwinm 2, 3, 5, 0, 3            # encoding: [0x06,0x28,0x62,0x54]
+            extlwi 2, 3, 4, 5
+# CHECK-BE: rlwinm. 2, 3, 5, 0, 3           # encoding: [0x54,0x62,0x28,0x07]
+# CHECK-LE: rlwinm. 2, 3, 5, 0, 3           # encoding: [0x07,0x28,0x62,0x54]
+            extlwi. 2, 3, 4, 5
+# CHECK-BE: rlwinm 2, 3, 9, 28, 31          # encoding: [0x54,0x62,0x4f,0x3e]
+# CHECK-LE: rlwinm 2, 3, 9, 28, 31          # encoding: [0x3e,0x4f,0x62,0x54]
+            extrwi 2, 3, 4, 5
+# CHECK-BE: rlwinm. 2, 3, 9, 28, 31         # encoding: [0x54,0x62,0x4f,0x3f]
+# CHECK-LE: rlwinm. 2, 3, 9, 28, 31         # encoding: [0x3f,0x4f,0x62,0x54]
+            extrwi. 2, 3, 4, 5
+# CHECK-BE: rlwimi 2, 3, 27, 5, 8           # encoding: [0x50,0x62,0xd9,0x50]
+# CHECK-LE: rlwimi 2, 3, 27, 5, 8           # encoding: [0x50,0xd9,0x62,0x50]
+            inslwi 2, 3, 4, 5
+# CHECK-BE: rlwimi. 2, 3, 27, 5, 8          # encoding: [0x50,0x62,0xd9,0x51]
+# CHECK-LE: rlwimi. 2, 3, 27, 5, 8          # encoding: [0x51,0xd9,0x62,0x50]
+            inslwi. 2, 3, 4, 5
+# CHECK-BE: rlwimi 2, 3, 23, 5, 8           # encoding: [0x50,0x62,0xb9,0x50]
+# CHECK-LE: rlwimi 2, 3, 23, 5, 8           # encoding: [0x50,0xb9,0x62,0x50]
+            insrwi 2, 3, 4, 5
+# CHECK-BE: rlwimi. 2, 3, 23, 5, 8          # encoding: [0x50,0x62,0xb9,0x51]
+# CHECK-LE: rlwimi. 2, 3, 23, 5, 8          # encoding: [0x51,0xb9,0x62,0x50]
+            insrwi. 2, 3, 4, 5
+# CHECK-BE: rlwinm 2, 3, 4, 0, 31           # encoding: [0x54,0x62,0x20,0x3e]
+# CHECK-LE: rlwinm 2, 3, 4, 0, 31           # encoding: [0x3e,0x20,0x62,0x54]
+            rotlwi 2, 3, 4
+# CHECK-BE: rlwinm. 2, 3, 4, 0, 31          # encoding: [0x54,0x62,0x20,0x3f]
+# CHECK-LE: rlwinm. 2, 3, 4, 0, 31          # encoding: [0x3f,0x20,0x62,0x54]
+            rotlwi. 2, 3, 4
+# CHECK-BE: rlwinm 2, 3, 28, 0, 31          # encoding: [0x54,0x62,0xe0,0x3e]
+# CHECK-LE: rlwinm 2, 3, 28, 0, 31          # encoding: [0x3e,0xe0,0x62,0x54]
+            rotrwi 2, 3, 4
+# CHECK-BE: rlwinm. 2, 3, 28, 0, 31         # encoding: [0x54,0x62,0xe0,0x3f]
+# CHECK-LE: rlwinm. 2, 3, 28, 0, 31         # encoding: [0x3f,0xe0,0x62,0x54]
+            rotrwi. 2, 3, 4
+# CHECK-BE: rlwnm 2, 3, 4, 0, 31            # encoding: [0x5c,0x62,0x20,0x3e]
+# CHECK-LE: rlwnm 2, 3, 4, 0, 31            # encoding: [0x3e,0x20,0x62,0x5c]
+            rotlw 2, 3, 4
+# CHECK-BE: rlwnm. 2, 3, 4, 0, 31           # encoding: [0x5c,0x62,0x20,0x3f]
+# CHECK-LE: rlwnm. 2, 3, 4, 0, 31           # encoding: [0x3f,0x20,0x62,0x5c]
+            rotlw. 2, 3, 4
+# CHECK-BE: slwi 2, 3, 4                    # encoding: [0x54,0x62,0x20,0x36]
+# CHECK-LE: slwi 2, 3, 4                    # encoding: [0x36,0x20,0x62,0x54]
+            slwi 2, 3, 4
+# CHECK-BE: rlwinm. 2, 3, 4, 0, 27          # encoding: [0x54,0x62,0x20,0x37]
+# CHECK-LE: rlwinm. 2, 3, 4, 0, 27          # encoding: [0x37,0x20,0x62,0x54]
+            slwi. 2, 3, 4
+# CHECK-BE: srwi 2, 3, 4                    # encoding: [0x54,0x62,0xe1,0x3e]
+# CHECK-LE: srwi 2, 3, 4                    # encoding: [0x3e,0xe1,0x62,0x54]
+            srwi 2, 3, 4
+# CHECK-BE: rlwinm. 2, 3, 28, 4, 31         # encoding: [0x54,0x62,0xe1,0x3f]
+# CHECK-LE: rlwinm. 2, 3, 28, 4, 31         # encoding: [0x3f,0xe1,0x62,0x54]
+            srwi. 2, 3, 4
+# CHECK-BE: rlwinm 2, 3, 0, 4, 31           # encoding: [0x54,0x62,0x01,0x3e]
+# CHECK-LE: rlwinm 2, 3, 0, 4, 31           # encoding: [0x3e,0x01,0x62,0x54]
+            clrlwi 2, 3, 4
+# CHECK-BE: rlwinm. 2, 3, 0, 4, 31          # encoding: [0x54,0x62,0x01,0x3f]
+# CHECK-LE: rlwinm. 2, 3, 0, 4, 31          # encoding: [0x3f,0x01,0x62,0x54]
+            clrlwi. 2, 3, 4
+# CHECK-BE: rlwinm 2, 3, 0, 0, 27           # encoding: [0x54,0x62,0x00,0x36]
+# CHECK-LE: rlwinm 2, 3, 0, 0, 27           # encoding: [0x36,0x00,0x62,0x54]
+            clrrwi 2, 3, 4
+# CHECK-BE: rlwinm. 2, 3, 0, 0, 27          # encoding: [0x54,0x62,0x00,0x37]
+# CHECK-LE: rlwinm. 2, 3, 0, 0, 27          # encoding: [0x37,0x00,0x62,0x54]
+            clrrwi. 2, 3, 4
+# CHECK-BE: rlwinm 2, 3, 4, 1, 27           # encoding: [0x54,0x62,0x20,0x76]
+# CHECK-LE: rlwinm 2, 3, 4, 1, 27           # encoding: [0x76,0x20,0x62,0x54]
+            clrlslwi 2, 3, 5, 4
+# CHECK-BE: rlwinm. 2, 3, 4, 1, 27          # encoding: [0x54,0x62,0x20,0x77]
+# CHECK-LE: rlwinm. 2, 3, 4, 1, 27          # encoding: [0x77,0x20,0x62,0x54]
+            clrlslwi. 2, 3, 5, 4
 
 # Move to/from special purpose register mnemonics
 
-# CHECK: mtspr 1, 2                      # encoding: [0x7c,0x41,0x03,0xa6]
-         mtxer 2
-# CHECK: mfspr 2, 1                      # encoding: [0x7c,0x41,0x02,0xa6]
-         mfxer 2
-# CHECK: mtlr 2                          # encoding: [0x7c,0x48,0x03,0xa6]
-         mtlr 2
-# CHECK: mflr 2                          # encoding: [0x7c,0x48,0x02,0xa6]
-         mflr 2
-# CHECK: mtctr 2                         # encoding: [0x7c,0x49,0x03,0xa6]
-         mtctr 2
-# CHECK: mfctr 2                         # encoding: [0x7c,0x49,0x02,0xa6]
-         mfctr 2
+# CHECK-BE: mtspr 1, 2                      # encoding: [0x7c,0x41,0x03,0xa6]
+# CHECK-LE: mtspr 1, 2                      # encoding: [0xa6,0x03,0x41,0x7c]
+            mtxer 2
+# CHECK-BE: mfspr 2, 1                      # encoding: [0x7c,0x41,0x02,0xa6]
+# CHECK-LE: mfspr 2, 1                      # encoding: [0xa6,0x02,0x41,0x7c]
+            mfxer 2
+# CHECK-BE: mtlr 2                          # encoding: [0x7c,0x48,0x03,0xa6]
+# CHECK-LE: mtlr 2                          # encoding: [0xa6,0x03,0x48,0x7c]
+            mtlr 2
+# CHECK-BE: mflr 2                          # encoding: [0x7c,0x48,0x02,0xa6]
+# CHECK-LE: mflr 2                          # encoding: [0xa6,0x02,0x48,0x7c]
+            mflr 2
+# CHECK-BE: mtctr 2                         # encoding: [0x7c,0x49,0x03,0xa6]
+# CHECK-LE: mtctr 2                         # encoding: [0xa6,0x03,0x49,0x7c]
+            mtctr 2
+# CHECK-BE: mfctr 2                         # encoding: [0x7c,0x49,0x02,0xa6]
+# CHECK-LE: mfctr 2                         # encoding: [0xa6,0x02,0x49,0x7c]
+            mfctr 2
 
 # Miscellaneous mnemonics
 
-# CHECK: nop                             # encoding: [0x60,0x00,0x00,0x00]
-         nop
-# CHECK: xori 0, 0, 0                    # encoding: [0x68,0x00,0x00,0x00]
-         xnop
-# CHECK: li 2, 128                       # encoding: [0x38,0x40,0x00,0x80]
-         li 2, 128
-# CHECK: lis 2, 128                      # encoding: [0x3c,0x40,0x00,0x80]
-         lis 2, 128
-# CHECK: la 2, 128(4)
-         la 2, 128(4)
-# CHECK: mr 2, 3                         # encoding: [0x7c,0x62,0x1b,0x78]
-         mr 2, 3
-# CHECK: or. 2, 3, 3                     # encoding: [0x7c,0x62,0x1b,0x79]
-         mr. 2, 3
-# CHECK: nor 2, 3, 3                     # encoding: [0x7c,0x62,0x18,0xf8]
-         not 2, 3
-# CHECK: nor. 2, 3, 3                    # encoding: [0x7c,0x62,0x18,0xf9]
-         not. 2, 3
-# CHECK: mtcrf 255, 2                    # encoding: [0x7c,0x4f,0xf1,0x20]
-         mtcr 2
+# CHECK-BE: nop                             # encoding: [0x60,0x00,0x00,0x00]
+# CHECK-LE: nop                             # encoding: [0x00,0x00,0x00,0x60]
+            nop
+# CHECK-BE: xori 0, 0, 0                    # encoding: [0x68,0x00,0x00,0x00]
+# CHECK-LE: xori 0, 0, 0                    # encoding: [0x00,0x00,0x00,0x68]
+            xnop
+# CHECK-BE: li 2, 128                       # encoding: [0x38,0x40,0x00,0x80]
+# CHECK-LE: li 2, 128                       # encoding: [0x80,0x00,0x40,0x38]
+            li 2, 128
+# CHECK-BE: lis 2, 128                      # encoding: [0x3c,0x40,0x00,0x80]
+# CHECK-LE: lis 2, 128                      # encoding: [0x80,0x00,0x40,0x3c]
+            lis 2, 128
+# CHECK-BE: la 2, 128(4)
+# CHECK-LE: la 2, 128(4)
+            la 2, 128(4)
+# CHECK-BE: mr 2, 3                         # encoding: [0x7c,0x62,0x1b,0x78]
+# CHECK-LE: mr 2, 3                         # encoding: [0x78,0x1b,0x62,0x7c]
+            mr 2, 3
+# CHECK-BE: or. 2, 3, 3                     # encoding: [0x7c,0x62,0x1b,0x79]
+# CHECK-LE: or. 2, 3, 3                     # encoding: [0x79,0x1b,0x62,0x7c]
+            mr. 2, 3
+# CHECK-BE: nor 2, 3, 3                     # encoding: [0x7c,0x62,0x18,0xf8]
+# CHECK-LE: nor 2, 3, 3                     # encoding: [0xf8,0x18,0x62,0x7c]
+            not 2, 3
+# CHECK-BE: nor. 2, 3, 3                    # encoding: [0x7c,0x62,0x18,0xf9]
+# CHECK-LE: nor. 2, 3, 3                    # encoding: [0xf9,0x18,0x62,0x7c]
+            not. 2, 3
+# CHECK-BE: mtcrf 255, 2                    # encoding: [0x7c,0x4f,0xf1,0x20]
+# CHECK-LE: mtcrf 255, 2                    # encoding: [0x20,0xf1,0x4f,0x7c]
+            mtcr 2
 
diff --git a/test/MC/PowerPC/ppc64-encoding-fp.s b/test/MC/PowerPC/ppc64-encoding-fp.s
index f9bdee1..c19f9b3 100644
--- a/test/MC/PowerPC/ppc64-encoding-fp.s
+++ b/test/MC/PowerPC/ppc64-encoding-fp.s
@@ -1,269 +1,379 @@
 
-# RUN: llvm-mc -triple powerpc64-unknown-unknown --show-encoding %s | FileCheck %s
+# RUN: llvm-mc -triple powerpc64-unknown-unknown --show-encoding %s | FileCheck -check-prefix=CHECK-BE %s
+# RUN: llvm-mc -triple powerpc64le-unknown-unknown --show-encoding %s | FileCheck -check-prefix=CHECK-LE %s
 
 # Floating-point facility
 
 # Floating-point load instructions
 
-# CHECK: lfs 2, 128(4)                   # encoding: [0xc0,0x44,0x00,0x80]
-         lfs 2, 128(4)
-# CHECK: lfsx 2, 3, 4                    # encoding: [0x7c,0x43,0x24,0x2e]
-         lfsx 2, 3, 4
-# CHECK: lfsu 2, 128(4)                  # encoding: [0xc4,0x44,0x00,0x80]
-         lfsu 2, 128(4)
-# CHECK: lfsux 2, 3, 4                   # encoding: [0x7c,0x43,0x24,0x6e]
-         lfsux 2, 3, 4
-# CHECK: lfd 2, 128(4)                   # encoding: [0xc8,0x44,0x00,0x80]
-         lfd 2, 128(4)
-# CHECK: lfdx 2, 3, 4                    # encoding: [0x7c,0x43,0x24,0xae]
-         lfdx 2, 3, 4
-# CHECK: lfdu 2, 128(4)                  # encoding: [0xcc,0x44,0x00,0x80]
-         lfdu 2, 128(4)
-# CHECK: lfdux 2, 3, 4                   # encoding: [0x7c,0x43,0x24,0xee]
-         lfdux 2, 3, 4
-# CHECK: lfiwax 2, 3, 4                  # encoding: [0x7c,0x43,0x26,0xae]
-         lfiwax 2, 3, 4
-# CHECK: lfiwzx 2, 3, 4                  # encoding: [0x7c,0x43,0x26,0xee]
-         lfiwzx 2, 3, 4
+# CHECK-BE: lfs 2, 128(4)                   # encoding: [0xc0,0x44,0x00,0x80]
+# CHECK-LE: lfs 2, 128(4)                   # encoding: [0x80,0x00,0x44,0xc0]
+            lfs 2, 128(4)
+# CHECK-BE: lfsx 2, 3, 4                    # encoding: [0x7c,0x43,0x24,0x2e]
+# CHECK-LE: lfsx 2, 3, 4                    # encoding: [0x2e,0x24,0x43,0x7c]
+            lfsx 2, 3, 4
+# CHECK-BE: lfsu 2, 128(4)                  # encoding: [0xc4,0x44,0x00,0x80]
+# CHECK-LE: lfsu 2, 128(4)                  # encoding: [0x80,0x00,0x44,0xc4]
+            lfsu 2, 128(4)
+# CHECK-BE: lfsux 2, 3, 4                   # encoding: [0x7c,0x43,0x24,0x6e]
+# CHECK-LE: lfsux 2, 3, 4                   # encoding: [0x6e,0x24,0x43,0x7c]
+            lfsux 2, 3, 4
+# CHECK-BE: lfd 2, 128(4)                   # encoding: [0xc8,0x44,0x00,0x80]
+# CHECK-LE: lfd 2, 128(4)                   # encoding: [0x80,0x00,0x44,0xc8]
+            lfd 2, 128(4)
+# CHECK-BE: lfdx 2, 3, 4                    # encoding: [0x7c,0x43,0x24,0xae]
+# CHECK-LE: lfdx 2, 3, 4                    # encoding: [0xae,0x24,0x43,0x7c]
+            lfdx 2, 3, 4
+# CHECK-BE: lfdu 2, 128(4)                  # encoding: [0xcc,0x44,0x00,0x80]
+# CHECK-LE: lfdu 2, 128(4)                  # encoding: [0x80,0x00,0x44,0xcc]
+            lfdu 2, 128(4)
+# CHECK-BE: lfdux 2, 3, 4                   # encoding: [0x7c,0x43,0x24,0xee]
+# CHECK-LE: lfdux 2, 3, 4                   # encoding: [0xee,0x24,0x43,0x7c]
+            lfdux 2, 3, 4
+# CHECK-BE: lfiwax 2, 3, 4                  # encoding: [0x7c,0x43,0x26,0xae]
+# CHECK-LE: lfiwax 2, 3, 4                  # encoding: [0xae,0x26,0x43,0x7c]
+            lfiwax 2, 3, 4
+# CHECK-BE: lfiwzx 2, 3, 4                  # encoding: [0x7c,0x43,0x26,0xee]
+# CHECK-LE: lfiwzx 2, 3, 4                  # encoding: [0xee,0x26,0x43,0x7c]
+            lfiwzx 2, 3, 4
 
 # Floating-point store instructions
 
-# CHECK: stfs 2, 128(4)                  # encoding: [0xd0,0x44,0x00,0x80]
-         stfs 2, 128(4)
-# CHECK: stfsx 2, 3, 4                   # encoding: [0x7c,0x43,0x25,0x2e]
-         stfsx 2, 3, 4
-# CHECK: stfsu 2, 128(4)                 # encoding: [0xd4,0x44,0x00,0x80]
-         stfsu 2, 128(4)
-# CHECK: stfsux 2, 3, 4                  # encoding: [0x7c,0x43,0x25,0x6e]
-         stfsux 2, 3, 4
-# CHECK: stfd 2, 128(4)                  # encoding: [0xd8,0x44,0x00,0x80]
-         stfd 2, 128(4)
-# CHECK: stfdx 2, 3, 4                   # encoding: [0x7c,0x43,0x25,0xae]
-         stfdx 2, 3, 4
-# CHECK: stfdu 2, 128(4)                 # encoding: [0xdc,0x44,0x00,0x80]
-         stfdu 2, 128(4)
-# CHECK: stfdux 2, 3, 4                  # encoding: [0x7c,0x43,0x25,0xee]
-         stfdux 2, 3, 4
-# CHECK: stfiwx 2, 3, 4                  # encoding: [0x7c,0x43,0x27,0xae]
-         stfiwx 2, 3, 4
+# CHECK-BE: stfs 2, 128(4)                  # encoding: [0xd0,0x44,0x00,0x80]
+# CHECK-LE: stfs 2, 128(4)                  # encoding: [0x80,0x00,0x44,0xd0]
+            stfs 2, 128(4)
+# CHECK-BE: stfsx 2, 3, 4                   # encoding: [0x7c,0x43,0x25,0x2e]
+# CHECK-LE: stfsx 2, 3, 4                   # encoding: [0x2e,0x25,0x43,0x7c]
+            stfsx 2, 3, 4
+# CHECK-BE: stfsu 2, 128(4)                 # encoding: [0xd4,0x44,0x00,0x80]
+# CHECK-LE: stfsu 2, 128(4)                 # encoding: [0x80,0x00,0x44,0xd4]
+            stfsu 2, 128(4)
+# CHECK-BE: stfsux 2, 3, 4                  # encoding: [0x7c,0x43,0x25,0x6e]
+# CHECK-LE: stfsux 2, 3, 4                  # encoding: [0x6e,0x25,0x43,0x7c]
+            stfsux 2, 3, 4
+# CHECK-BE: stfd 2, 128(4)                  # encoding: [0xd8,0x44,0x00,0x80]
+# CHECK-LE: stfd 2, 128(4)                  # encoding: [0x80,0x00,0x44,0xd8]
+            stfd 2, 128(4)
+# CHECK-BE: stfdx 2, 3, 4                   # encoding: [0x7c,0x43,0x25,0xae]
+# CHECK-LE: stfdx 2, 3, 4                   # encoding: [0xae,0x25,0x43,0x7c]
+            stfdx 2, 3, 4
+# CHECK-BE: stfdu 2, 128(4)                 # encoding: [0xdc,0x44,0x00,0x80]
+# CHECK-LE: stfdu 2, 128(4)                 # encoding: [0x80,0x00,0x44,0xdc]
+            stfdu 2, 128(4)
+# CHECK-BE: stfdux 2, 3, 4                  # encoding: [0x7c,0x43,0x25,0xee]
+# CHECK-LE: stfdux 2, 3, 4                  # encoding: [0xee,0x25,0x43,0x7c]
+            stfdux 2, 3, 4
+# CHECK-BE: stfiwx 2, 3, 4                  # encoding: [0x7c,0x43,0x27,0xae]
+# CHECK-LE: stfiwx 2, 3, 4                  # encoding: [0xae,0x27,0x43,0x7c]
+            stfiwx 2, 3, 4
 
 # Floating-point move instructions
 
-# CHECK: fmr 2, 3                        # encoding: [0xfc,0x40,0x18,0x90]
-         fmr 2, 3
-# CHECK: fmr. 2, 3                       # encoding: [0xfc,0x40,0x18,0x91]
-         fmr. 2, 3
-# CHECK: fneg 2, 3                       # encoding: [0xfc,0x40,0x18,0x50]
-         fneg 2, 3
-# CHECK: fneg. 2, 3                      # encoding: [0xfc,0x40,0x18,0x51]
-         fneg. 2, 3
-# CHECK: fabs 2, 3                       # encoding: [0xfc,0x40,0x1a,0x10]
-         fabs 2, 3
-# CHECK: fabs. 2, 3                      # encoding: [0xfc,0x40,0x1a,0x11]
-         fabs. 2, 3
-# CHECK: fnabs 2, 3                      # encoding: [0xfc,0x40,0x19,0x10]
-         fnabs 2, 3
-# CHECK: fnabs. 2, 3                     # encoding: [0xfc,0x40,0x19,0x11]
-         fnabs. 2, 3
-# CHECK: fcpsgn 2, 3, 4                  # encoding: [0xfc,0x43,0x20,0x10]
-         fcpsgn 2, 3, 4
-# CHECK: fcpsgn. 2, 3, 4                 # encoding: [0xfc,0x43,0x20,0x11]
-         fcpsgn. 2, 3, 4
+# CHECK-BE: fmr 2, 3                        # encoding: [0xfc,0x40,0x18,0x90]
+# CHECK-LE: fmr 2, 3                        # encoding: [0x90,0x18,0x40,0xfc]
+            fmr 2, 3
+# CHECK-BE: fmr. 2, 3                       # encoding: [0xfc,0x40,0x18,0x91]
+# CHECK-LE: fmr. 2, 3                       # encoding: [0x91,0x18,0x40,0xfc]
+            fmr. 2, 3
+# CHECK-BE: fneg 2, 3                       # encoding: [0xfc,0x40,0x18,0x50]
+# CHECK-LE: fneg 2, 3                       # encoding: [0x50,0x18,0x40,0xfc]
+            fneg 2, 3
+# CHECK-BE: fneg. 2, 3                      # encoding: [0xfc,0x40,0x18,0x51]
+# CHECK-LE: fneg. 2, 3                      # encoding: [0x51,0x18,0x40,0xfc]
+            fneg. 2, 3
+# CHECK-BE: fabs 2, 3                       # encoding: [0xfc,0x40,0x1a,0x10]
+# CHECK-LE: fabs 2, 3                       # encoding: [0x10,0x1a,0x40,0xfc]
+            fabs 2, 3
+# CHECK-BE: fabs. 2, 3                      # encoding: [0xfc,0x40,0x1a,0x11]
+# CHECK-LE: fabs. 2, 3                      # encoding: [0x11,0x1a,0x40,0xfc]
+            fabs. 2, 3
+# CHECK-BE: fnabs 2, 3                      # encoding: [0xfc,0x40,0x19,0x10]
+# CHECK-LE: fnabs 2, 3                      # encoding: [0x10,0x19,0x40,0xfc]
+            fnabs 2, 3
+# CHECK-BE: fnabs. 2, 3                     # encoding: [0xfc,0x40,0x19,0x11]
+# CHECK-LE: fnabs. 2, 3                     # encoding: [0x11,0x19,0x40,0xfc]
+            fnabs. 2, 3
+# CHECK-BE: fcpsgn 2, 3, 4                  # encoding: [0xfc,0x43,0x20,0x10]
+# CHECK-LE: fcpsgn 2, 3, 4                  # encoding: [0x10,0x20,0x43,0xfc]
+            fcpsgn 2, 3, 4
+# CHECK-BE: fcpsgn. 2, 3, 4                 # encoding: [0xfc,0x43,0x20,0x11]
+# CHECK-LE: fcpsgn. 2, 3, 4                 # encoding: [0x11,0x20,0x43,0xfc]
+            fcpsgn. 2, 3, 4
 
 # Floating-point arithmetic instructions
 
-# CHECK: fadd 2, 3, 4                    # encoding: [0xfc,0x43,0x20,0x2a]
-         fadd 2, 3, 4
-# CHECK: fadd. 2, 3, 4                   # encoding: [0xfc,0x43,0x20,0x2b]
-         fadd. 2, 3, 4
-# CHECK: fadds 2, 3, 4                   # encoding: [0xec,0x43,0x20,0x2a]
-         fadds 2, 3, 4
-# CHECK: fadds. 2, 3, 4                  # encoding: [0xec,0x43,0x20,0x2b]
-         fadds. 2, 3, 4
-# CHECK: fsub 2, 3, 4                    # encoding: [0xfc,0x43,0x20,0x28]
-         fsub 2, 3, 4
-# CHECK: fsub. 2, 3, 4                   # encoding: [0xfc,0x43,0x20,0x29]
-         fsub. 2, 3, 4
-# CHECK: fsubs 2, 3, 4                   # encoding: [0xec,0x43,0x20,0x28]
-         fsubs 2, 3, 4
-# CHECK: fsubs. 2, 3, 4                  # encoding: [0xec,0x43,0x20,0x29]
-         fsubs. 2, 3, 4
+# CHECK-BE: fadd 2, 3, 4                    # encoding: [0xfc,0x43,0x20,0x2a]
+# CHECK-LE: fadd 2, 3, 4                    # encoding: [0x2a,0x20,0x43,0xfc]
+            fadd 2, 3, 4
+# CHECK-BE: fadd. 2, 3, 4                   # encoding: [0xfc,0x43,0x20,0x2b]
+# CHECK-LE: fadd. 2, 3, 4                   # encoding: [0x2b,0x20,0x43,0xfc]
+            fadd. 2, 3, 4
+# CHECK-BE: fadds 2, 3, 4                   # encoding: [0xec,0x43,0x20,0x2a]
+# CHECK-LE: fadds 2, 3, 4                   # encoding: [0x2a,0x20,0x43,0xec]
+            fadds 2, 3, 4
+# CHECK-BE: fadds. 2, 3, 4                  # encoding: [0xec,0x43,0x20,0x2b]
+# CHECK-LE: fadds. 2, 3, 4                  # encoding: [0x2b,0x20,0x43,0xec]
+            fadds. 2, 3, 4
+# CHECK-BE: fsub 2, 3, 4                    # encoding: [0xfc,0x43,0x20,0x28]
+# CHECK-LE: fsub 2, 3, 4                    # encoding: [0x28,0x20,0x43,0xfc]
+            fsub 2, 3, 4
+# CHECK-BE: fsub. 2, 3, 4                   # encoding: [0xfc,0x43,0x20,0x29]
+# CHECK-LE: fsub. 2, 3, 4                   # encoding: [0x29,0x20,0x43,0xfc]
+            fsub. 2, 3, 4
+# CHECK-BE: fsubs 2, 3, 4                   # encoding: [0xec,0x43,0x20,0x28]
+# CHECK-LE: fsubs 2, 3, 4                   # encoding: [0x28,0x20,0x43,0xec]
+            fsubs 2, 3, 4
+# CHECK-BE: fsubs. 2, 3, 4                  # encoding: [0xec,0x43,0x20,0x29]
+# CHECK-LE: fsubs. 2, 3, 4                  # encoding: [0x29,0x20,0x43,0xec]
+            fsubs. 2, 3, 4
 
-# CHECK: fmul 2, 3, 4                    # encoding: [0xfc,0x43,0x01,0x32]
-         fmul 2, 3, 4
-# CHECK: fmul. 2, 3, 4                   # encoding: [0xfc,0x43,0x01,0x33]
-         fmul. 2, 3, 4
-# CHECK: fmuls 2, 3, 4                   # encoding: [0xec,0x43,0x01,0x32]
-         fmuls 2, 3, 4
-# CHECK: fmuls. 2, 3, 4                  # encoding: [0xec,0x43,0x01,0x33]
-         fmuls. 2, 3, 4
-# CHECK: fdiv 2, 3, 4                    # encoding: [0xfc,0x43,0x20,0x24]
-         fdiv 2, 3, 4
-# CHECK: fdiv. 2, 3, 4                   # encoding: [0xfc,0x43,0x20,0x25]
-         fdiv. 2, 3, 4
-# CHECK: fdivs 2, 3, 4                   # encoding: [0xec,0x43,0x20,0x24]
-         fdivs 2, 3, 4
-# CHECK: fdivs. 2, 3, 4                  # encoding: [0xec,0x43,0x20,0x25]
-         fdivs. 2, 3, 4
-# CHECK: fsqrt 2, 3                      # encoding: [0xfc,0x40,0x18,0x2c]
-         fsqrt 2, 3
-# CHECK: fsqrt. 2, 3                     # encoding: [0xfc,0x40,0x18,0x2d]
-         fsqrt. 2, 3
-# CHECK: fsqrts 2, 3                     # encoding: [0xec,0x40,0x18,0x2c]
-         fsqrts 2, 3
-# CHECK: fsqrts. 2, 3                    # encoding: [0xec,0x40,0x18,0x2d]
-         fsqrts. 2, 3
+# CHECK-BE: fmul 2, 3, 4                    # encoding: [0xfc,0x43,0x01,0x32]
+# CHECK-LE: fmul 2, 3, 4                    # encoding: [0x32,0x01,0x43,0xfc]
+            fmul 2, 3, 4
+# CHECK-BE: fmul. 2, 3, 4                   # encoding: [0xfc,0x43,0x01,0x33]
+# CHECK-LE: fmul. 2, 3, 4                   # encoding: [0x33,0x01,0x43,0xfc]
+            fmul. 2, 3, 4
+# CHECK-BE: fmuls 2, 3, 4                   # encoding: [0xec,0x43,0x01,0x32]
+# CHECK-LE: fmuls 2, 3, 4                   # encoding: [0x32,0x01,0x43,0xec]
+            fmuls 2, 3, 4
+# CHECK-BE: fmuls. 2, 3, 4                  # encoding: [0xec,0x43,0x01,0x33]
+# CHECK-LE: fmuls. 2, 3, 4                  # encoding: [0x33,0x01,0x43,0xec]
+            fmuls. 2, 3, 4
+# CHECK-BE: fdiv 2, 3, 4                    # encoding: [0xfc,0x43,0x20,0x24]
+# CHECK-LE: fdiv 2, 3, 4                    # encoding: [0x24,0x20,0x43,0xfc]
+            fdiv 2, 3, 4
+# CHECK-BE: fdiv. 2, 3, 4                   # encoding: [0xfc,0x43,0x20,0x25]
+# CHECK-LE: fdiv. 2, 3, 4                   # encoding: [0x25,0x20,0x43,0xfc]
+            fdiv. 2, 3, 4
+# CHECK-BE: fdivs 2, 3, 4                   # encoding: [0xec,0x43,0x20,0x24]
+# CHECK-LE: fdivs 2, 3, 4                   # encoding: [0x24,0x20,0x43,0xec]
+            fdivs 2, 3, 4
+# CHECK-BE: fdivs. 2, 3, 4                  # encoding: [0xec,0x43,0x20,0x25]
+# CHECK-LE: fdivs. 2, 3, 4                  # encoding: [0x25,0x20,0x43,0xec]
+            fdivs. 2, 3, 4
+# CHECK-BE: fsqrt 2, 3                      # encoding: [0xfc,0x40,0x18,0x2c]
+# CHECK-LE: fsqrt 2, 3                      # encoding: [0x2c,0x18,0x40,0xfc]
+            fsqrt 2, 3
+# CHECK-BE: fsqrt. 2, 3                     # encoding: [0xfc,0x40,0x18,0x2d]
+# CHECK-LE: fsqrt. 2, 3                     # encoding: [0x2d,0x18,0x40,0xfc]
+            fsqrt. 2, 3
+# CHECK-BE: fsqrts 2, 3                     # encoding: [0xec,0x40,0x18,0x2c]
+# CHECK-LE: fsqrts 2, 3                     # encoding: [0x2c,0x18,0x40,0xec]
+            fsqrts 2, 3
+# CHECK-BE: fsqrts. 2, 3                    # encoding: [0xec,0x40,0x18,0x2d]
+# CHECK-LE: fsqrts. 2, 3                    # encoding: [0x2d,0x18,0x40,0xec]
+            fsqrts. 2, 3
 
-# CHECK: fre 2, 3                        # encoding: [0xfc,0x40,0x18,0x30]
-         fre 2, 3
-# CHECK: fre. 2, 3                       # encoding: [0xfc,0x40,0x18,0x31]
-         fre. 2, 3
-# CHECK: fres 2, 3                       # encoding: [0xec,0x40,0x18,0x30]
-         fres 2, 3
-# CHECK: fres. 2, 3                      # encoding: [0xec,0x40,0x18,0x31]
-         fres. 2, 3
-# CHECK: frsqrte 2, 3                    # encoding: [0xfc,0x40,0x18,0x34]
-         frsqrte 2, 3
-# CHECK: frsqrte. 2, 3                   # encoding: [0xfc,0x40,0x18,0x35]
-         frsqrte. 2, 3
-# CHECK: frsqrtes 2, 3                   # encoding: [0xec,0x40,0x18,0x34]
-         frsqrtes 2, 3
-# CHECK: frsqrtes. 2, 3                  # encoding: [0xec,0x40,0x18,0x35]
-         frsqrtes. 2, 3
-# FIXME: ftdiv 2, 3, 4
-# FIXME: ftsqrt 2, 3, 4
+# CHECK-BE: fre 2, 3                        # encoding: [0xfc,0x40,0x18,0x30]
+# CHECK-LE: fre 2, 3                        # encoding: [0x30,0x18,0x40,0xfc]
+            fre 2, 3
+# CHECK-BE: fre. 2, 3                       # encoding: [0xfc,0x40,0x18,0x31]
+# CHECK-LE: fre. 2, 3                       # encoding: [0x31,0x18,0x40,0xfc]
+            fre. 2, 3
+# CHECK-BE: fres 2, 3                       # encoding: [0xec,0x40,0x18,0x30]
+# CHECK-LE: fres 2, 3                       # encoding: [0x30,0x18,0x40,0xec]
+            fres 2, 3
+# CHECK-BE: fres. 2, 3                      # encoding: [0xec,0x40,0x18,0x31]
+# CHECK-LE: fres. 2, 3                      # encoding: [0x31,0x18,0x40,0xec]
+            fres. 2, 3
+# CHECK-BE: frsqrte 2, 3                    # encoding: [0xfc,0x40,0x18,0x34]
+# CHECK-LE: frsqrte 2, 3                    # encoding: [0x34,0x18,0x40,0xfc]
+            frsqrte 2, 3
+# CHECK-BE: frsqrte. 2, 3                   # encoding: [0xfc,0x40,0x18,0x35]
+# CHECK-LE: frsqrte. 2, 3                   # encoding: [0x35,0x18,0x40,0xfc]
+            frsqrte. 2, 3
+# CHECK-BE: frsqrtes 2, 3                   # encoding: [0xec,0x40,0x18,0x34]
+# CHECK-LE: frsqrtes 2, 3                   # encoding: [0x34,0x18,0x40,0xec]
+            frsqrtes 2, 3
+# CHECK-BE: frsqrtes. 2, 3                  # encoding: [0xec,0x40,0x18,0x35]
+# CHECK-LE: frsqrtes. 2, 3                  # encoding: [0x35,0x18,0x40,0xec]
+            frsqrtes. 2, 3
+# FIXME:    ftdiv 2, 3, 4
+# FIXME:    ftsqrt 2, 3, 4
 
-# CHECK: fmadd 2, 3, 4, 5                # encoding: [0xfc,0x43,0x29,0x3a]
-         fmadd 2, 3, 4, 5
-# CHECK: fmadd. 2, 3, 4, 5               # encoding: [0xfc,0x43,0x29,0x3b]
-         fmadd. 2, 3, 4, 5
-# CHECK: fmadds 2, 3, 4, 5               # encoding: [0xec,0x43,0x29,0x3a]
-         fmadds 2, 3, 4, 5
-# CHECK: fmadds. 2, 3, 4, 5              # encoding: [0xec,0x43,0x29,0x3b]
-         fmadds. 2, 3, 4, 5
-# CHECK: fmsub 2, 3, 4, 5                # encoding: [0xfc,0x43,0x29,0x38]
-         fmsub 2, 3, 4, 5
-# CHECK: fmsub. 2, 3, 4, 5               # encoding: [0xfc,0x43,0x29,0x39]
-         fmsub. 2, 3, 4, 5
-# CHECK: fmsubs 2, 3, 4, 5               # encoding: [0xec,0x43,0x29,0x38]
-         fmsubs 2, 3, 4, 5
-# CHECK: fmsubs. 2, 3, 4, 5              # encoding: [0xec,0x43,0x29,0x39]
-         fmsubs. 2, 3, 4, 5
-# CHECK: fnmadd 2, 3, 4, 5               # encoding: [0xfc,0x43,0x29,0x3e]
-         fnmadd 2, 3, 4, 5
-# CHECK: fnmadd. 2, 3, 4, 5              # encoding: [0xfc,0x43,0x29,0x3f]
-         fnmadd. 2, 3, 4, 5
-# CHECK: fnmadds 2, 3, 4, 5              # encoding: [0xec,0x43,0x29,0x3e]
-         fnmadds 2, 3, 4, 5
-# CHECK: fnmadds. 2, 3, 4, 5             # encoding: [0xec,0x43,0x29,0x3f]
-         fnmadds. 2, 3, 4, 5
-# CHECK: fnmsub 2, 3, 4, 5               # encoding: [0xfc,0x43,0x29,0x3c]
-         fnmsub 2, 3, 4, 5
-# CHECK: fnmsub. 2, 3, 4, 5              # encoding: [0xfc,0x43,0x29,0x3d]
-         fnmsub. 2, 3, 4, 5
-# CHECK: fnmsubs 2, 3, 4, 5              # encoding: [0xec,0x43,0x29,0x3c]
-         fnmsubs 2, 3, 4, 5
-# CHECK: fnmsubs. 2, 3, 4, 5             # encoding: [0xec,0x43,0x29,0x3d]
-         fnmsubs. 2, 3, 4, 5
+# CHECK-BE: fmadd 2, 3, 4, 5                # encoding: [0xfc,0x43,0x29,0x3a]
+# CHECK-LE: fmadd 2, 3, 4, 5                # encoding: [0x3a,0x29,0x43,0xfc]
+            fmadd 2, 3, 4, 5
+# CHECK-BE: fmadd. 2, 3, 4, 5               # encoding: [0xfc,0x43,0x29,0x3b]
+# CHECK-LE: fmadd. 2, 3, 4, 5               # encoding: [0x3b,0x29,0x43,0xfc]
+            fmadd. 2, 3, 4, 5
+# CHECK-BE: fmadds 2, 3, 4, 5               # encoding: [0xec,0x43,0x29,0x3a]
+# CHECK-LE: fmadds 2, 3, 4, 5               # encoding: [0x3a,0x29,0x43,0xec]
+            fmadds 2, 3, 4, 5
+# CHECK-BE: fmadds. 2, 3, 4, 5              # encoding: [0xec,0x43,0x29,0x3b]
+# CHECK-LE: fmadds. 2, 3, 4, 5              # encoding: [0x3b,0x29,0x43,0xec]
+            fmadds. 2, 3, 4, 5
+# CHECK-BE: fmsub 2, 3, 4, 5                # encoding: [0xfc,0x43,0x29,0x38]
+# CHECK-LE: fmsub 2, 3, 4, 5                # encoding: [0x38,0x29,0x43,0xfc]
+            fmsub 2, 3, 4, 5
+# CHECK-BE: fmsub. 2, 3, 4, 5               # encoding: [0xfc,0x43,0x29,0x39]
+# CHECK-LE: fmsub. 2, 3, 4, 5               # encoding: [0x39,0x29,0x43,0xfc]
+            fmsub. 2, 3, 4, 5
+# CHECK-BE: fmsubs 2, 3, 4, 5               # encoding: [0xec,0x43,0x29,0x38]
+# CHECK-LE: fmsubs 2, 3, 4, 5               # encoding: [0x38,0x29,0x43,0xec]
+            fmsubs 2, 3, 4, 5
+# CHECK-BE: fmsubs. 2, 3, 4, 5              # encoding: [0xec,0x43,0x29,0x39]
+# CHECK-LE: fmsubs. 2, 3, 4, 5              # encoding: [0x39,0x29,0x43,0xec]
+            fmsubs. 2, 3, 4, 5
+# CHECK-BE: fnmadd 2, 3, 4, 5               # encoding: [0xfc,0x43,0x29,0x3e]
+# CHECK-LE: fnmadd 2, 3, 4, 5               # encoding: [0x3e,0x29,0x43,0xfc]
+            fnmadd 2, 3, 4, 5
+# CHECK-BE: fnmadd. 2, 3, 4, 5              # encoding: [0xfc,0x43,0x29,0x3f]
+# CHECK-LE: fnmadd. 2, 3, 4, 5              # encoding: [0x3f,0x29,0x43,0xfc]
+            fnmadd. 2, 3, 4, 5
+# CHECK-BE: fnmadds 2, 3, 4, 5              # encoding: [0xec,0x43,0x29,0x3e]
+# CHECK-LE: fnmadds 2, 3, 4, 5              # encoding: [0x3e,0x29,0x43,0xec]
+            fnmadds 2, 3, 4, 5
+# CHECK-BE: fnmadds. 2, 3, 4, 5             # encoding: [0xec,0x43,0x29,0x3f]
+# CHECK-LE: fnmadds. 2, 3, 4, 5             # encoding: [0x3f,0x29,0x43,0xec]
+            fnmadds. 2, 3, 4, 5
+# CHECK-BE: fnmsub 2, 3, 4, 5               # encoding: [0xfc,0x43,0x29,0x3c]
+# CHECK-LE: fnmsub 2, 3, 4, 5               # encoding: [0x3c,0x29,0x43,0xfc]
+            fnmsub 2, 3, 4, 5
+# CHECK-BE: fnmsub. 2, 3, 4, 5              # encoding: [0xfc,0x43,0x29,0x3d]
+# CHECK-LE: fnmsub. 2, 3, 4, 5              # encoding: [0x3d,0x29,0x43,0xfc]
+            fnmsub. 2, 3, 4, 5
+# CHECK-BE: fnmsubs 2, 3, 4, 5              # encoding: [0xec,0x43,0x29,0x3c]
+# CHECK-LE: fnmsubs 2, 3, 4, 5              # encoding: [0x3c,0x29,0x43,0xec]
+            fnmsubs 2, 3, 4, 5
+# CHECK-BE: fnmsubs. 2, 3, 4, 5             # encoding: [0xec,0x43,0x29,0x3d]
+# CHECK-LE: fnmsubs. 2, 3, 4, 5             # encoding: [0x3d,0x29,0x43,0xec]
+            fnmsubs. 2, 3, 4, 5
 
 # Floating-point rounding and conversion instructions
 
-# CHECK: frsp 2, 3                       # encoding: [0xfc,0x40,0x18,0x18]
-         frsp 2, 3
-# CHECK: frsp. 2, 3                      # encoding: [0xfc,0x40,0x18,0x19]
-         frsp. 2, 3
+# CHECK-BE: frsp 2, 3                       # encoding: [0xfc,0x40,0x18,0x18]
+# CHECK-LE: frsp 2, 3                       # encoding: [0x18,0x18,0x40,0xfc]
+            frsp 2, 3
+# CHECK-BE: frsp. 2, 3                      # encoding: [0xfc,0x40,0x18,0x19]
+# CHECK-LE: frsp. 2, 3                      # encoding: [0x19,0x18,0x40,0xfc]
+            frsp. 2, 3
 
-# CHECK: fctid 2, 3                      # encoding: [0xfc,0x40,0x1e,0x5c]
-         fctid 2, 3
-# CHECK: fctid. 2, 3                     # encoding: [0xfc,0x40,0x1e,0x5d]
-         fctid. 2, 3
-# CHECK: fctidz 2, 3                     # encoding: [0xfc,0x40,0x1e,0x5e]
-         fctidz 2, 3
-# CHECK: fctidz. 2, 3                    # encoding: [0xfc,0x40,0x1e,0x5f]
-         fctidz. 2, 3
-# FIXME: fctidu 2, 3
-# FIXME: fctidu. 2, 3
-# CHECK: fctiduz 2, 3                    # encoding: [0xfc,0x40,0x1f,0x5e]
-         fctiduz 2, 3
-# CHECK: fctiduz. 2, 3                   # encoding: [0xfc,0x40,0x1f,0x5f]
-         fctiduz. 2, 3
-# CHECK: fctiw 2, 3                      # encoding: [0xfc,0x40,0x18,0x1c]
-         fctiw 2, 3
-# CHECK: fctiw. 2, 3                     # encoding: [0xfc,0x40,0x18,0x1d]
-         fctiw. 2, 3
-# CHECK: fctiwz 2, 3                     # encoding: [0xfc,0x40,0x18,0x1e]
-         fctiwz 2, 3
-# CHECK: fctiwz. 2, 3                    # encoding: [0xfc,0x40,0x18,0x1f]
-         fctiwz. 2, 3
-# FIXME: fctiwu 2, 3
-# FIXME: fctiwu. 2, 3
-# CHECK: fctiwuz 2, 3                    # encoding: [0xfc,0x40,0x19,0x1e]
-         fctiwuz 2, 3
-# CHECK: fctiwuz. 2, 3                   # encoding: [0xfc,0x40,0x19,0x1f]
-         fctiwuz. 2, 3
-# CHECK: fcfid 2, 3                      # encoding: [0xfc,0x40,0x1e,0x9c]
-         fcfid 2, 3
-# CHECK: fcfid. 2, 3                     # encoding: [0xfc,0x40,0x1e,0x9d]
-         fcfid. 2, 3
-# CHECK: fcfidu 2, 3                     # encoding: [0xfc,0x40,0x1f,0x9c]
-         fcfidu 2, 3
-# CHECK: fcfidu. 2, 3                    # encoding: [0xfc,0x40,0x1f,0x9d]
-         fcfidu. 2, 3
-# CHECK: fcfids 2, 3                     # encoding: [0xec,0x40,0x1e,0x9c]
-         fcfids 2, 3
-# CHECK: fcfids. 2, 3                    # encoding: [0xec,0x40,0x1e,0x9d]
-         fcfids. 2, 3
-# CHECK: fcfidus 2, 3                    # encoding: [0xec,0x40,0x1f,0x9c]
-         fcfidus 2, 3
-# CHECK: fcfidus. 2, 3                   # encoding: [0xec,0x40,0x1f,0x9d]
-         fcfidus. 2, 3
-# CHECK: frin 2, 3                       # encoding: [0xfc,0x40,0x1b,0x10]
-         frin 2, 3
-# CHECK: frin. 2, 3                      # encoding: [0xfc,0x40,0x1b,0x11]
-         frin. 2, 3
-# CHECK: frip 2, 3                       # encoding: [0xfc,0x40,0x1b,0x90]
-         frip 2, 3
-# CHECK: frip. 2, 3                      # encoding: [0xfc,0x40,0x1b,0x91]
-         frip. 2, 3
-# CHECK: friz 2, 3                       # encoding: [0xfc,0x40,0x1b,0x50]
-         friz 2, 3
-# CHECK: friz. 2, 3                      # encoding: [0xfc,0x40,0x1b,0x51]
-         friz. 2, 3
-# CHECK: frim 2, 3                       # encoding: [0xfc,0x40,0x1b,0xd0]
-         frim 2, 3
-# CHECK: frim. 2, 3                      # encoding: [0xfc,0x40,0x1b,0xd1]
-         frim. 2, 3
+# CHECK-BE: fctid 2, 3                      # encoding: [0xfc,0x40,0x1e,0x5c]
+# CHECK-LE: fctid 2, 3                      # encoding: [0x5c,0x1e,0x40,0xfc]
+            fctid 2, 3
+# CHECK-BE: fctid. 2, 3                     # encoding: [0xfc,0x40,0x1e,0x5d]
+# CHECK-LE: fctid. 2, 3                     # encoding: [0x5d,0x1e,0x40,0xfc]
+            fctid. 2, 3
+# CHECK-BE: fctidz 2, 3                     # encoding: [0xfc,0x40,0x1e,0x5e]
+# CHECK-LE: fctidz 2, 3                     # encoding: [0x5e,0x1e,0x40,0xfc]
+            fctidz 2, 3
+# CHECK-BE: fctidz. 2, 3                    # encoding: [0xfc,0x40,0x1e,0x5f]
+# CHECK-LE: fctidz. 2, 3                    # encoding: [0x5f,0x1e,0x40,0xfc]
+            fctidz. 2, 3
+# FIXME:    fctidu 2, 3
+# FIXME:    fctidu. 2, 3
+# CHECK-BE: fctiduz 2, 3                    # encoding: [0xfc,0x40,0x1f,0x5e]
+# CHECK-LE: fctiduz 2, 3                    # encoding: [0x5e,0x1f,0x40,0xfc]
+            fctiduz 2, 3
+# CHECK-BE: fctiduz. 2, 3                   # encoding: [0xfc,0x40,0x1f,0x5f]
+# CHECK-LE: fctiduz. 2, 3                   # encoding: [0x5f,0x1f,0x40,0xfc]
+            fctiduz. 2, 3
+# CHECK-BE: fctiw 2, 3                      # encoding: [0xfc,0x40,0x18,0x1c]
+# CHECK-LE: fctiw 2, 3                      # encoding: [0x1c,0x18,0x40,0xfc]
+            fctiw 2, 3
+# CHECK-BE: fctiw. 2, 3                     # encoding: [0xfc,0x40,0x18,0x1d]
+# CHECK-LE: fctiw. 2, 3                     # encoding: [0x1d,0x18,0x40,0xfc]
+            fctiw. 2, 3
+# CHECK-BE: fctiwz 2, 3                     # encoding: [0xfc,0x40,0x18,0x1e]
+# CHECK-LE: fctiwz 2, 3                     # encoding: [0x1e,0x18,0x40,0xfc]
+            fctiwz 2, 3
+# CHECK-BE: fctiwz. 2, 3                    # encoding: [0xfc,0x40,0x18,0x1f]
+# CHECK-LE: fctiwz. 2, 3                    # encoding: [0x1f,0x18,0x40,0xfc]
+            fctiwz. 2, 3
+# FIXME:    fctiwu 2, 3
+# FIXME:    fctiwu. 2, 3
+# CHECK-BE: fctiwuz 2, 3                    # encoding: [0xfc,0x40,0x19,0x1e]
+# CHECK-LE: fctiwuz 2, 3                    # encoding: [0x1e,0x19,0x40,0xfc]
+            fctiwuz 2, 3
+# CHECK-BE: fctiwuz. 2, 3                   # encoding: [0xfc,0x40,0x19,0x1f]
+# CHECK-LE: fctiwuz. 2, 3                   # encoding: [0x1f,0x19,0x40,0xfc]
+            fctiwuz. 2, 3
+# CHECK-BE: fcfid 2, 3                      # encoding: [0xfc,0x40,0x1e,0x9c]
+# CHECK-LE: fcfid 2, 3                      # encoding: [0x9c,0x1e,0x40,0xfc]
+            fcfid 2, 3
+# CHECK-BE: fcfid. 2, 3                     # encoding: [0xfc,0x40,0x1e,0x9d]
+# CHECK-LE: fcfid. 2, 3                     # encoding: [0x9d,0x1e,0x40,0xfc]
+            fcfid. 2, 3
+# CHECK-BE: fcfidu 2, 3                     # encoding: [0xfc,0x40,0x1f,0x9c]
+# CHECK-LE: fcfidu 2, 3                     # encoding: [0x9c,0x1f,0x40,0xfc]
+            fcfidu 2, 3
+# CHECK-BE: fcfidu. 2, 3                    # encoding: [0xfc,0x40,0x1f,0x9d]
+# CHECK-LE: fcfidu. 2, 3                    # encoding: [0x9d,0x1f,0x40,0xfc]
+            fcfidu. 2, 3
+# CHECK-BE: fcfids 2, 3                     # encoding: [0xec,0x40,0x1e,0x9c]
+# CHECK-LE: fcfids 2, 3                     # encoding: [0x9c,0x1e,0x40,0xec]
+            fcfids 2, 3
+# CHECK-BE: fcfids. 2, 3                    # encoding: [0xec,0x40,0x1e,0x9d]
+# CHECK-LE: fcfids. 2, 3                    # encoding: [0x9d,0x1e,0x40,0xec]
+            fcfids. 2, 3
+# CHECK-BE: fcfidus 2, 3                    # encoding: [0xec,0x40,0x1f,0x9c]
+# CHECK-LE: fcfidus 2, 3                    # encoding: [0x9c,0x1f,0x40,0xec]
+            fcfidus 2, 3
+# CHECK-BE: fcfidus. 2, 3                   # encoding: [0xec,0x40,0x1f,0x9d]
+# CHECK-LE: fcfidus. 2, 3                   # encoding: [0x9d,0x1f,0x40,0xec]
+            fcfidus. 2, 3
+# CHECK-BE: frin 2, 3                       # encoding: [0xfc,0x40,0x1b,0x10]
+# CHECK-LE: frin 2, 3                       # encoding: [0x10,0x1b,0x40,0xfc]
+            frin 2, 3
+# CHECK-BE: frin. 2, 3                      # encoding: [0xfc,0x40,0x1b,0x11]
+# CHECK-LE: frin. 2, 3                      # encoding: [0x11,0x1b,0x40,0xfc]
+            frin. 2, 3
+# CHECK-BE: frip 2, 3                       # encoding: [0xfc,0x40,0x1b,0x90]
+# CHECK-LE: frip 2, 3                       # encoding: [0x90,0x1b,0x40,0xfc]
+            frip 2, 3
+# CHECK-BE: frip. 2, 3                      # encoding: [0xfc,0x40,0x1b,0x91]
+# CHECK-LE: frip. 2, 3                      # encoding: [0x91,0x1b,0x40,0xfc]
+            frip. 2, 3
+# CHECK-BE: friz 2, 3                       # encoding: [0xfc,0x40,0x1b,0x50]
+# CHECK-LE: friz 2, 3                       # encoding: [0x50,0x1b,0x40,0xfc]
+            friz 2, 3
+# CHECK-BE: friz. 2, 3                      # encoding: [0xfc,0x40,0x1b,0x51]
+# CHECK-LE: friz. 2, 3                      # encoding: [0x51,0x1b,0x40,0xfc]
+            friz. 2, 3
+# CHECK-BE: frim 2, 3                       # encoding: [0xfc,0x40,0x1b,0xd0]
+# CHECK-LE: frim 2, 3                       # encoding: [0xd0,0x1b,0x40,0xfc]
+            frim 2, 3
+# CHECK-BE: frim. 2, 3                      # encoding: [0xfc,0x40,0x1b,0xd1]
+# CHECK-LE: frim. 2, 3                      # encoding: [0xd1,0x1b,0x40,0xfc]
+            frim. 2, 3
 
 # Floating-point compare instructions
 
-# CHECK: fcmpu 2, 3, 4                   # encoding: [0xfd,0x03,0x20,0x00]
-         fcmpu 2, 3, 4
-# FIXME: fcmpo 2, 3, 4
+# CHECK-BE: fcmpu 2, 3, 4                   # encoding: [0xfd,0x03,0x20,0x00]
+# CHECK-LE: fcmpu 2, 3, 4                   # encoding: [0x00,0x20,0x03,0xfd]
+            fcmpu 2, 3, 4
+# FIXME:    fcmpo 2, 3, 4
 
 # Floating-point select instruction
 
-# CHECK: fsel 2, 3, 4, 5                 # encoding: [0xfc,0x43,0x29,0x2e]
-         fsel 2, 3, 4, 5
-# CHECK: fsel. 2, 3, 4, 5                # encoding: [0xfc,0x43,0x29,0x2f]
-         fsel. 2, 3, 4, 5
+# CHECK-BE: fsel 2, 3, 4, 5                 # encoding: [0xfc,0x43,0x29,0x2e]
+# CHECK-LE: fsel 2, 3, 4, 5                 # encoding: [0x2e,0x29,0x43,0xfc]
+            fsel 2, 3, 4, 5
+# CHECK-BE: fsel. 2, 3, 4, 5                # encoding: [0xfc,0x43,0x29,0x2f]
+# CHECK-LE: fsel. 2, 3, 4, 5                # encoding: [0x2f,0x29,0x43,0xfc]
+            fsel. 2, 3, 4, 5
 
 # Floating-point status and control register instructions
 
-# CHECK: mffs 2                          # encoding: [0xfc,0x40,0x04,0x8e]
-         mffs 2
-# FIXME: mffs. 2
+# CHECK-BE: mffs 2                          # encoding: [0xfc,0x40,0x04,0x8e]
+# CHECK-LE: mffs 2                          # encoding: [0x8e,0x04,0x40,0xfc]
+            mffs 2
+# FIXME:    mffs. 2
 
-# FIXME: mcrfs 2, 3
+# FIXME:    mcrfs 2, 3
 
-# FIXME: mtfsfi 2, 3, 1
-# FIXME: mtfsfi. 2, 3, 1
-# FIXME: mtfsf 2, 3, 1, 1
-# FIXME: mtfsf. 2, 3, 1, 1
+# FIXME:    mtfsfi 2, 3, 1
+# FIXME:    mtfsfi. 2, 3, 1
+# FIXME:    mtfsf 2, 3, 1, 1
+# FIXME:    mtfsf. 2, 3, 1, 1
 
-# CHECK: mtfsb0 31                       # encoding: [0xff,0xe0,0x00,0x8c]
-         mtfsb0 31
-# FIXME: mtfsb0. 31
-# CHECK: mtfsb1 31                       # encoding: [0xff,0xe0,0x00,0x4c]
-         mtfsb1 31
-# FIXME: mtfsb1. 31
+# CHECK-BE: mtfsb0 31                       # encoding: [0xff,0xe0,0x00,0x8c]
+# CHECK-LE: mtfsb0 31                       # encoding: [0x8c,0x00,0xe0,0xff]
+            mtfsb0 31
+# FIXME:    mtfsb0. 31
+# CHECK-BE: mtfsb1 31                       # encoding: [0xff,0xe0,0x00,0x4c]
+# CHECK-LE: mtfsb1 31                       # encoding: [0x4c,0x00,0xe0,0xff]
+            mtfsb1 31
+# FIXME:    mtfsb1. 31
 
diff --git a/test/MC/PowerPC/ppc64-encoding-vmx.s b/test/MC/PowerPC/ppc64-encoding-vmx.s
index 0154076..3d2df84 100644
--- a/test/MC/PowerPC/ppc64-encoding-vmx.s
+++ b/test/MC/PowerPC/ppc64-encoding-vmx.s
@@ -1,384 +1,554 @@
 
-# RUN: llvm-mc -triple powerpc64-unknown-unknown --show-encoding %s | FileCheck %s
+# RUN: llvm-mc -triple powerpc64-unknown-unknown --show-encoding %s | FileCheck -check-prefix=CHECK-BE %s
+# RUN: llvm-mc -triple powerpc64le-unknown-unknown --show-encoding %s | FileCheck -check-prefix=CHECK-LE %s
 
 # Vector facility
 
 # Vector storage access instructions
 
-# CHECK: lvebx 2, 3, 4                   # encoding: [0x7c,0x43,0x20,0x0e]
-         lvebx 2, 3, 4
-# CHECK: lvehx 2, 3, 4                   # encoding: [0x7c,0x43,0x20,0x4e]
-         lvehx 2, 3, 4
-# CHECK: lvewx 2, 3, 4                   # encoding: [0x7c,0x43,0x20,0x8e]
-         lvewx 2, 3, 4
-# CHECK: lvx 2, 3, 4                     # encoding: [0x7c,0x43,0x20,0xce]
-         lvx 2, 3, 4
-# CHECK: lvxl 2, 3, 4                    # encoding: [0x7c,0x43,0x22,0xce]
-         lvxl 2, 3, 4
-# CHECK: stvebx 2, 3, 4                  # encoding: [0x7c,0x43,0x21,0x0e]
-         stvebx 2, 3, 4
-# CHECK: stvehx 2, 3, 4                  # encoding: [0x7c,0x43,0x21,0x4e]
-         stvehx 2, 3, 4
-# CHECK: stvewx 2, 3, 4                  # encoding: [0x7c,0x43,0x21,0x8e]
-         stvewx 2, 3, 4
-# CHECK: stvx 2, 3, 4                    # encoding: [0x7c,0x43,0x21,0xce]
-         stvx 2, 3, 4
-# CHECK: stvxl 2, 3, 4                   # encoding: [0x7c,0x43,0x23,0xce]
-         stvxl 2, 3, 4
-# CHECK: lvsl 2, 3, 4                    # encoding: [0x7c,0x43,0x20,0x0c]
-         lvsl 2, 3, 4
-# CHECK: lvsr 2, 3, 4                    # encoding: [0x7c,0x43,0x20,0x4c]
-         lvsr 2, 3, 4
+# CHECK-BE: lvebx 2, 3, 4                   # encoding: [0x7c,0x43,0x20,0x0e]
+# CHECK-LE: lvebx 2, 3, 4                   # encoding: [0x0e,0x20,0x43,0x7c]
+            lvebx 2, 3, 4
+# CHECK-BE: lvehx 2, 3, 4                   # encoding: [0x7c,0x43,0x20,0x4e]
+# CHECK-LE: lvehx 2, 3, 4                   # encoding: [0x4e,0x20,0x43,0x7c]
+            lvehx 2, 3, 4
+# CHECK-BE: lvewx 2, 3, 4                   # encoding: [0x7c,0x43,0x20,0x8e]
+# CHECK-LE: lvewx 2, 3, 4                   # encoding: [0x8e,0x20,0x43,0x7c]
+            lvewx 2, 3, 4
+# CHECK-BE: lvx 2, 3, 4                     # encoding: [0x7c,0x43,0x20,0xce]
+# CHECK-LE: lvx 2, 3, 4                     # encoding: [0xce,0x20,0x43,0x7c]
+            lvx 2, 3, 4
+# CHECK-BE: lvxl 2, 3, 4                    # encoding: [0x7c,0x43,0x22,0xce]
+# CHECK-LE: lvxl 2, 3, 4                    # encoding: [0xce,0x22,0x43,0x7c]
+            lvxl 2, 3, 4
+# CHECK-BE: stvebx 2, 3, 4                  # encoding: [0x7c,0x43,0x21,0x0e]
+# CHECK-LE: stvebx 2, 3, 4                  # encoding: [0x0e,0x21,0x43,0x7c]
+            stvebx 2, 3, 4
+# CHECK-BE: stvehx 2, 3, 4                  # encoding: [0x7c,0x43,0x21,0x4e]
+# CHECK-LE: stvehx 2, 3, 4                  # encoding: [0x4e,0x21,0x43,0x7c]
+            stvehx 2, 3, 4
+# CHECK-BE: stvewx 2, 3, 4                  # encoding: [0x7c,0x43,0x21,0x8e]
+# CHECK-LE: stvewx 2, 3, 4                  # encoding: [0x8e,0x21,0x43,0x7c]
+            stvewx 2, 3, 4
+# CHECK-BE: stvx 2, 3, 4                    # encoding: [0x7c,0x43,0x21,0xce]
+# CHECK-LE: stvx 2, 3, 4                    # encoding: [0xce,0x21,0x43,0x7c]
+            stvx 2, 3, 4
+# CHECK-BE: stvxl 2, 3, 4                   # encoding: [0x7c,0x43,0x23,0xce]
+# CHECK-LE: stvxl 2, 3, 4                   # encoding: [0xce,0x23,0x43,0x7c]
+            stvxl 2, 3, 4
+# CHECK-BE: lvsl 2, 3, 4                    # encoding: [0x7c,0x43,0x20,0x0c]
+# CHECK-LE: lvsl 2, 3, 4                    # encoding: [0x0c,0x20,0x43,0x7c]
+            lvsl 2, 3, 4
+# CHECK-BE: lvsr 2, 3, 4                    # encoding: [0x7c,0x43,0x20,0x4c]
+# CHECK-LE: lvsr 2, 3, 4                    # encoding: [0x4c,0x20,0x43,0x7c]
+            lvsr 2, 3, 4
 
 # Vector permute and formatting instructions
 
-# CHECK: vpkpx 2, 3, 4                   # encoding: [0x10,0x43,0x23,0x0e]
-         vpkpx 2, 3, 4
-# CHECK: vpkshss 2, 3, 4                 # encoding: [0x10,0x43,0x21,0x8e]
-         vpkshss 2, 3, 4
-# CHECK: vpkshus 2, 3, 4                 # encoding: [0x10,0x43,0x21,0x0e]
-         vpkshus 2, 3, 4
-# CHECK: vpkswss 2, 3, 4                 # encoding: [0x10,0x43,0x21,0xce]
-         vpkswss 2, 3, 4
-# CHECK: vpkswus 2, 3, 4                 # encoding: [0x10,0x43,0x21,0x4e]
-         vpkswus 2, 3, 4
-# CHECK: vpkuhum 2, 3, 4                 # encoding: [0x10,0x43,0x20,0x0e]
-         vpkuhum 2, 3, 4
-# CHECK: vpkuhus 2, 3, 4                 # encoding: [0x10,0x43,0x20,0x8e]
-         vpkuhus 2, 3, 4
-# CHECK: vpkuwum 2, 3, 4                 # encoding: [0x10,0x43,0x20,0x4e]
-         vpkuwum 2, 3, 4
-# CHECK: vpkuwus 2, 3, 4                 # encoding: [0x10,0x43,0x20,0xce]
-         vpkuwus 2, 3, 4
-
-# CHECK: vupkhpx 2, 3                    # encoding: [0x10,0x40,0x1b,0x4e]
-         vupkhpx 2, 3
-# CHECK: vupkhsb 2, 3                    # encoding: [0x10,0x40,0x1a,0x0e]
-         vupkhsb 2, 3
-# CHECK: vupkhsh 2, 3                    # encoding: [0x10,0x40,0x1a,0x4e]
-         vupkhsh 2, 3
-# CHECK: vupklpx 2, 3                    # encoding: [0x10,0x40,0x1b,0xce]
-         vupklpx 2, 3
-# CHECK: vupklsb 2, 3                    # encoding: [0x10,0x40,0x1a,0x8e]
-         vupklsb 2, 3
-# CHECK: vupklsh 2, 3                    # encoding: [0x10,0x40,0x1a,0xce]
-         vupklsh 2, 3
-
-# CHECK: vmrghb 2, 3, 4                  # encoding: [0x10,0x43,0x20,0x0c]
-         vmrghb 2, 3, 4
-# CHECK: vmrghh 2, 3, 4                  # encoding: [0x10,0x43,0x20,0x4c]
-         vmrghh 2, 3, 4
-# CHECK: vmrghw 2, 3, 4                  # encoding: [0x10,0x43,0x20,0x8c]
-         vmrghw 2, 3, 4
-# CHECK: vmrglb 2, 3, 4                  # encoding: [0x10,0x43,0x21,0x0c]
-         vmrglb 2, 3, 4
-# CHECK: vmrglh 2, 3, 4                  # encoding: [0x10,0x43,0x21,0x4c]
-         vmrglh 2, 3, 4
-# CHECK: vmrglw 2, 3, 4                  # encoding: [0x10,0x43,0x21,0x8c]
-         vmrglw 2, 3, 4
-
-# CHECK: vspltb 2, 3, 1                  # encoding: [0x10,0x41,0x1a,0x0c]
-         vspltb 2, 3, 1
-# CHECK: vsplth 2, 3, 1                  # encoding: [0x10,0x41,0x1a,0x4c]
-         vsplth 2, 3, 1
-# CHECK: vspltw 2, 3, 1                  # encoding: [0x10,0x41,0x1a,0x8c]
-         vspltw 2, 3, 1
-# CHECK: vspltisb 2, 3                   # encoding: [0x10,0x43,0x03,0x0c]
-         vspltisb 2, 3
-# CHECK: vspltish 2, 3                   # encoding: [0x10,0x43,0x03,0x4c]
-         vspltish 2, 3
-# CHECK: vspltisw 2, 3                   # encoding: [0x10,0x43,0x03,0x8c]
-         vspltisw 2, 3
-
-# CHECK: vperm 2, 3, 4, 5                # encoding: [0x10,0x43,0x21,0x6b]
-         vperm 2, 3, 4, 5
-# CHECK: vsel 2, 3, 4, 5                 # encoding: [0x10,0x43,0x21,0x6a]
-         vsel 2, 3, 4, 5
-
-# CHECK: vsl 2, 3, 4                     # encoding: [0x10,0x43,0x21,0xc4]
-         vsl 2, 3, 4
-# CHECK: vsldoi 2, 3, 4, 5               # encoding: [0x10,0x43,0x21,0x6c]
-         vsldoi 2, 3, 4, 5
-# CHECK: vslo 2, 3, 4                    # encoding: [0x10,0x43,0x24,0x0c]
-         vslo 2, 3, 4
-# CHECK: vsr 2, 3, 4                     # encoding: [0x10,0x43,0x22,0xc4]
-         vsr 2, 3, 4
-# CHECK: vsro 2, 3, 4                    # encoding: [0x10,0x43,0x24,0x4c]
-         vsro 2, 3, 4
+# CHECK-BE: vpkpx 2, 3, 4                   # encoding: [0x10,0x43,0x23,0x0e]
+# CHECK-LE: vpkpx 2, 3, 4                   # encoding: [0x0e,0x23,0x43,0x10]
+            vpkpx 2, 3, 4
+# CHECK-BE: vpkshss 2, 3, 4                 # encoding: [0x10,0x43,0x21,0x8e]
+# CHECK-LE: vpkshss 2, 3, 4                 # encoding: [0x8e,0x21,0x43,0x10]
+            vpkshss 2, 3, 4
+# CHECK-BE: vpkshus 2, 3, 4                 # encoding: [0x10,0x43,0x21,0x0e]
+# CHECK-LE: vpkshus 2, 3, 4                 # encoding: [0x0e,0x21,0x43,0x10]
+            vpkshus 2, 3, 4
+# CHECK-BE: vpkswss 2, 3, 4                 # encoding: [0x10,0x43,0x21,0xce]
+# CHECK-LE: vpkswss 2, 3, 4                 # encoding: [0xce,0x21,0x43,0x10]
+            vpkswss 2, 3, 4
+# CHECK-BE: vpkswus 2, 3, 4                 # encoding: [0x10,0x43,0x21,0x4e]
+# CHECK-LE: vpkswus 2, 3, 4                 # encoding: [0x4e,0x21,0x43,0x10]
+            vpkswus 2, 3, 4
+# CHECK-BE: vpkuhum 2, 3, 4                 # encoding: [0x10,0x43,0x20,0x0e]
+# CHECK-LE: vpkuhum 2, 3, 4                 # encoding: [0x0e,0x20,0x43,0x10]
+            vpkuhum 2, 3, 4
+# CHECK-BE: vpkuhus 2, 3, 4                 # encoding: [0x10,0x43,0x20,0x8e]
+# CHECK-LE: vpkuhus 2, 3, 4                 # encoding: [0x8e,0x20,0x43,0x10]
+            vpkuhus 2, 3, 4
+# CHECK-BE: vpkuwum 2, 3, 4                 # encoding: [0x10,0x43,0x20,0x4e]
+# CHECK-LE: vpkuwum 2, 3, 4                 # encoding: [0x4e,0x20,0x43,0x10]
+            vpkuwum 2, 3, 4
+# CHECK-BE: vpkuwus 2, 3, 4                 # encoding: [0x10,0x43,0x20,0xce]
+# CHECK-LE: vpkuwus 2, 3, 4                 # encoding: [0xce,0x20,0x43,0x10]
+            vpkuwus 2, 3, 4
+
+# CHECK-BE: vupkhpx 2, 3                    # encoding: [0x10,0x40,0x1b,0x4e]
+# CHECK-LE: vupkhpx 2, 3                    # encoding: [0x4e,0x1b,0x40,0x10]
+            vupkhpx 2, 3
+# CHECK-BE: vupkhsb 2, 3                    # encoding: [0x10,0x40,0x1a,0x0e]
+# CHECK-LE: vupkhsb 2, 3                    # encoding: [0x0e,0x1a,0x40,0x10]
+            vupkhsb 2, 3
+# CHECK-BE: vupkhsh 2, 3                    # encoding: [0x10,0x40,0x1a,0x4e]
+# CHECK-LE: vupkhsh 2, 3                    # encoding: [0x4e,0x1a,0x40,0x10]
+            vupkhsh 2, 3
+# CHECK-BE: vupklpx 2, 3                    # encoding: [0x10,0x40,0x1b,0xce]
+# CHECK-LE: vupklpx 2, 3                    # encoding: [0xce,0x1b,0x40,0x10]
+            vupklpx 2, 3
+# CHECK-BE: vupklsb 2, 3                    # encoding: [0x10,0x40,0x1a,0x8e]
+# CHECK-LE: vupklsb 2, 3                    # encoding: [0x8e,0x1a,0x40,0x10]
+            vupklsb 2, 3
+# CHECK-BE: vupklsh 2, 3                    # encoding: [0x10,0x40,0x1a,0xce]
+# CHECK-LE: vupklsh 2, 3                    # encoding: [0xce,0x1a,0x40,0x10]
+            vupklsh 2, 3
+
+# CHECK-BE: vmrghb 2, 3, 4                  # encoding: [0x10,0x43,0x20,0x0c]
+# CHECK-LE: vmrghb 2, 3, 4                  # encoding: [0x0c,0x20,0x43,0x10]
+            vmrghb 2, 3, 4
+# CHECK-BE: vmrghh 2, 3, 4                  # encoding: [0x10,0x43,0x20,0x4c]
+# CHECK-LE: vmrghh 2, 3, 4                  # encoding: [0x4c,0x20,0x43,0x10]
+            vmrghh 2, 3, 4
+# CHECK-BE: vmrghw 2, 3, 4                  # encoding: [0x10,0x43,0x20,0x8c]
+# CHECK-LE: vmrghw 2, 3, 4                  # encoding: [0x8c,0x20,0x43,0x10]
+            vmrghw 2, 3, 4
+# CHECK-BE: vmrglb 2, 3, 4                  # encoding: [0x10,0x43,0x21,0x0c]
+# CHECK-LE: vmrglb 2, 3, 4                  # encoding: [0x0c,0x21,0x43,0x10]
+            vmrglb 2, 3, 4
+# CHECK-BE: vmrglh 2, 3, 4                  # encoding: [0x10,0x43,0x21,0x4c]
+# CHECK-LE: vmrglh 2, 3, 4                  # encoding: [0x4c,0x21,0x43,0x10]
+            vmrglh 2, 3, 4
+# CHECK-BE: vmrglw 2, 3, 4                  # encoding: [0x10,0x43,0x21,0x8c]
+# CHECK-LE: vmrglw 2, 3, 4                  # encoding: [0x8c,0x21,0x43,0x10]
+            vmrglw 2, 3, 4
+
+# CHECK-BE: vspltb 2, 3, 1                  # encoding: [0x10,0x41,0x1a,0x0c]
+# CHECK-LE: vspltb 2, 3, 1                  # encoding: [0x0c,0x1a,0x41,0x10]
+            vspltb 2, 3, 1
+# CHECK-BE: vsplth 2, 3, 1                  # encoding: [0x10,0x41,0x1a,0x4c]
+# CHECK-LE: vsplth 2, 3, 1                  # encoding: [0x4c,0x1a,0x41,0x10]
+            vsplth 2, 3, 1
+# CHECK-BE: vspltw 2, 3, 1                  # encoding: [0x10,0x41,0x1a,0x8c]
+# CHECK-LE: vspltw 2, 3, 1                  # encoding: [0x8c,0x1a,0x41,0x10]
+            vspltw 2, 3, 1
+# CHECK-BE: vspltisb 2, 3                   # encoding: [0x10,0x43,0x03,0x0c]
+# CHECK-LE: vspltisb 2, 3                   # encoding: [0x0c,0x03,0x43,0x10]
+            vspltisb 2, 3
+# CHECK-BE: vspltish 2, 3                   # encoding: [0x10,0x43,0x03,0x4c]
+# CHECK-LE: vspltish 2, 3                   # encoding: [0x4c,0x03,0x43,0x10]
+            vspltish 2, 3
+# CHECK-BE: vspltisw 2, 3                   # encoding: [0x10,0x43,0x03,0x8c]
+# CHECK-LE: vspltisw 2, 3                   # encoding: [0x8c,0x03,0x43,0x10]
+            vspltisw 2, 3
+
+# CHECK-BE: vperm 2, 3, 4, 5                # encoding: [0x10,0x43,0x21,0x6b]
+# CHECK-LE: vperm 2, 3, 4, 5                # encoding: [0x6b,0x21,0x43,0x10]
+            vperm 2, 3, 4, 5
+# CHECK-BE: vsel 2, 3, 4, 5                 # encoding: [0x10,0x43,0x21,0x6a]
+# CHECK-LE: vsel 2, 3, 4, 5                 # encoding: [0x6a,0x21,0x43,0x10]
+            vsel 2, 3, 4, 5
+
+# CHECK-BE: vsl 2, 3, 4                     # encoding: [0x10,0x43,0x21,0xc4]
+# CHECK-LE: vsl 2, 3, 4                     # encoding: [0xc4,0x21,0x43,0x10]
+            vsl 2, 3, 4
+# CHECK-BE: vsldoi 2, 3, 4, 5               # encoding: [0x10,0x43,0x21,0x6c]
+# CHECK-LE: vsldoi 2, 3, 4, 5               # encoding: [0x6c,0x21,0x43,0x10]
+            vsldoi 2, 3, 4, 5
+# CHECK-BE: vslo 2, 3, 4                    # encoding: [0x10,0x43,0x24,0x0c]
+# CHECK-LE: vslo 2, 3, 4                    # encoding: [0x0c,0x24,0x43,0x10]
+            vslo 2, 3, 4
+# CHECK-BE: vsr 2, 3, 4                     # encoding: [0x10,0x43,0x22,0xc4]
+# CHECK-LE: vsr 2, 3, 4                     # encoding: [0xc4,0x22,0x43,0x10]
+            vsr 2, 3, 4
+# CHECK-BE: vsro 2, 3, 4                    # encoding: [0x10,0x43,0x24,0x4c]
+# CHECK-LE: vsro 2, 3, 4                    # encoding: [0x4c,0x24,0x43,0x10]
+            vsro 2, 3, 4
 
 # Vector integer arithmetic instructions
 
-# CHECK: vaddcuw 2, 3, 4                 # encoding: [0x10,0x43,0x21,0x80]
-         vaddcuw 2, 3, 4
-# CHECK: vaddsbs 2, 3, 4                 # encoding: [0x10,0x43,0x23,0x00]
-         vaddsbs 2, 3, 4
-# CHECK: vaddshs 2, 3, 4                 # encoding: [0x10,0x43,0x23,0x40]
-         vaddshs 2, 3, 4
-# CHECK: vaddsws 2, 3, 4                 # encoding: [0x10,0x43,0x23,0x80]
-         vaddsws 2, 3, 4
-# CHECK: vaddubm 2, 3, 4                 # encoding: [0x10,0x43,0x20,0x00]
-         vaddubm 2, 3, 4
-# CHECK: vadduhm 2, 3, 4                 # encoding: [0x10,0x43,0x20,0x40]
-         vadduhm 2, 3, 4
-# CHECK: vadduwm 2, 3, 4                 # encoding: [0x10,0x43,0x20,0x80]
-         vadduwm 2, 3, 4
-# CHECK: vaddubs 2, 3, 4                 # encoding: [0x10,0x43,0x22,0x00]
-         vaddubs 2, 3, 4
-# CHECK: vadduhs 2, 3, 4                 # encoding: [0x10,0x43,0x22,0x40]
-         vadduhs 2, 3, 4
-# CHECK: vadduws 2, 3, 4                 # encoding: [0x10,0x43,0x22,0x80]
-         vadduws 2, 3, 4
-
-# CHECK: vsubcuw 2, 3, 4                 # encoding: [0x10,0x43,0x25,0x80]
-         vsubcuw 2, 3, 4
-# CHECK: vsubsbs 2, 3, 4                 # encoding: [0x10,0x43,0x27,0x00]
-         vsubsbs 2, 3, 4
-# CHECK: vsubshs 2, 3, 4                 # encoding: [0x10,0x43,0x27,0x40]
-         vsubshs 2, 3, 4
-# CHECK: vsubsws 2, 3, 4                 # encoding: [0x10,0x43,0x27,0x80]
-         vsubsws 2, 3, 4
-# CHECK: vsububm 2, 3, 4                 # encoding: [0x10,0x43,0x24,0x00]
-         vsububm 2, 3, 4
-# CHECK: vsubuhm 2, 3, 4                 # encoding: [0x10,0x43,0x24,0x40]
-         vsubuhm 2, 3, 4
-# CHECK: vsubuwm 2, 3, 4                 # encoding: [0x10,0x43,0x24,0x80]
-         vsubuwm 2, 3, 4
-# CHECK: vsububs 2, 3, 4                 # encoding: [0x10,0x43,0x26,0x00]
-         vsububs 2, 3, 4
-# CHECK: vsubuhs 2, 3, 4                 # encoding: [0x10,0x43,0x26,0x40]
-         vsubuhs 2, 3, 4
-# CHECK: vsubuws 2, 3, 4                 # encoding: [0x10,0x43,0x26,0x80]
-         vsubuws 2, 3, 4
-
-# CHECK: vmulesb 2, 3, 4                 # encoding: [0x10,0x43,0x23,0x08]
-         vmulesb 2, 3, 4
-# CHECK: vmulesh 2, 3, 4                 # encoding: [0x10,0x43,0x23,0x48]
-         vmulesh 2, 3, 4
-# CHECK: vmuleub 2, 3, 4                 # encoding: [0x10,0x43,0x22,0x08]
-         vmuleub 2, 3, 4
-# CHECK: vmuleuh 2, 3, 4                 # encoding: [0x10,0x43,0x22,0x48]
-         vmuleuh 2, 3, 4
-# CHECK: vmulosb 2, 3, 4                 # encoding: [0x10,0x43,0x21,0x08]
-         vmulosb 2, 3, 4
-# CHECK: vmulosh 2, 3, 4                 # encoding: [0x10,0x43,0x21,0x48]
-         vmulosh 2, 3, 4
-# CHECK: vmuloub 2, 3, 4                 # encoding: [0x10,0x43,0x20,0x08]
-         vmuloub 2, 3, 4
-# CHECK: vmulouh 2, 3, 4                 # encoding: [0x10,0x43,0x20,0x48]
-         vmulouh 2, 3, 4
-
-# CHECK: vmhaddshs 2, 3, 4, 5            # encoding: [0x10,0x43,0x21,0x60]
-         vmhaddshs 2, 3, 4, 5
-# CHECK: vmhraddshs 2, 3, 4, 5           # encoding: [0x10,0x43,0x21,0x61]
-         vmhraddshs 2, 3, 4, 5
-# CHECK: vmladduhm 2, 3, 4, 5            # encoding: [0x10,0x43,0x21,0x62]
-         vmladduhm 2, 3, 4, 5
-# CHECK: vmsumubm 2, 3, 4, 5             # encoding: [0x10,0x43,0x21,0x64]
-         vmsumubm 2, 3, 4, 5
-# CHECK: vmsummbm 2, 3, 4, 5             # encoding: [0x10,0x43,0x21,0x65]
-         vmsummbm 2, 3, 4, 5
-# CHECK: vmsumshm 2, 3, 4, 5             # encoding: [0x10,0x43,0x21,0x68]
-         vmsumshm 2, 3, 4, 5
-# CHECK: vmsumshs 2, 3, 4, 5             # encoding: [0x10,0x43,0x21,0x69]
-         vmsumshs 2, 3, 4, 5
-# CHECK: vmsumuhm 2, 3, 4, 5             # encoding: [0x10,0x43,0x21,0x66]
-         vmsumuhm 2, 3, 4, 5
-# CHECK: vmsumuhs 2, 3, 4, 5             # encoding: [0x10,0x43,0x21,0x67]
-         vmsumuhs 2, 3, 4, 5
-
-# CHECK: vsumsws 2, 3, 4                 # encoding: [0x10,0x43,0x27,0x88]
-         vsumsws 2, 3, 4
-# CHECK: vsum2sws 2, 3, 4                # encoding: [0x10,0x43,0x26,0x88]
-         vsum2sws 2, 3, 4
-# CHECK: vsum4sbs 2, 3, 4                # encoding: [0x10,0x43,0x27,0x08]
-         vsum4sbs 2, 3, 4
-# CHECK: vsum4shs 2, 3, 4                # encoding: [0x10,0x43,0x26,0x48]
-         vsum4shs 2, 3, 4
-# CHECK: vsum4ubs 2, 3, 4                # encoding: [0x10,0x43,0x26,0x08]
-         vsum4ubs 2, 3, 4
-
-# CHECK: vavgsb 2, 3, 4                  # encoding: [0x10,0x43,0x25,0x02]
-         vavgsb 2, 3, 4
-# CHECK: vavgsh 2, 3, 4                  # encoding: [0x10,0x43,0x25,0x42]
-         vavgsh 2, 3, 4
-# CHECK: vavgsw 2, 3, 4                  # encoding: [0x10,0x43,0x25,0x82]
-         vavgsw 2, 3, 4
-# CHECK: vavgub 2, 3, 4                  # encoding: [0x10,0x43,0x24,0x02]
-         vavgub 2, 3, 4
-# CHECK: vavguh 2, 3, 4                  # encoding: [0x10,0x43,0x24,0x42]
-         vavguh 2, 3, 4
-# CHECK: vavguw 2, 3, 4                  # encoding: [0x10,0x43,0x24,0x82]
-         vavguw 2, 3, 4
-
-# CHECK: vmaxsb 2, 3, 4                  # encoding: [0x10,0x43,0x21,0x02]
-         vmaxsb 2, 3, 4
-# CHECK: vmaxsh 2, 3, 4                  # encoding: [0x10,0x43,0x21,0x42]
-         vmaxsh 2, 3, 4
-# CHECK: vmaxsw 2, 3, 4                  # encoding: [0x10,0x43,0x21,0x82]
-         vmaxsw 2, 3, 4
-# CHECK: vmaxub 2, 3, 4                  # encoding: [0x10,0x43,0x20,0x02]
-         vmaxub 2, 3, 4
-# CHECK: vmaxuh 2, 3, 4                  # encoding: [0x10,0x43,0x20,0x42]
-         vmaxuh 2, 3, 4
-# CHECK: vmaxuw 2, 3, 4                  # encoding: [0x10,0x43,0x20,0x82]
-         vmaxuw 2, 3, 4
-
-# CHECK: vminsb 2, 3, 4                  # encoding: [0x10,0x43,0x23,0x02]
-         vminsb 2, 3, 4
-# CHECK: vminsh 2, 3, 4                  # encoding: [0x10,0x43,0x23,0x42]
-         vminsh 2, 3, 4
-# CHECK: vminsw 2, 3, 4                  # encoding: [0x10,0x43,0x23,0x82]
-         vminsw 2, 3, 4
-# CHECK: vminub 2, 3, 4                  # encoding: [0x10,0x43,0x22,0x02]
-         vminub 2, 3, 4
-# CHECK: vminuh 2, 3, 4                  # encoding: [0x10,0x43,0x22,0x42]
-         vminuh 2, 3, 4
-# CHECK: vminuw 2, 3, 4                  # encoding: [0x10,0x43,0x22,0x82]
-         vminuw 2, 3, 4
+# CHECK-BE: vaddcuw 2, 3, 4                 # encoding: [0x10,0x43,0x21,0x80]
+# CHECK-LE: vaddcuw 2, 3, 4                 # encoding: [0x80,0x21,0x43,0x10]
+            vaddcuw 2, 3, 4
+# CHECK-BE: vaddsbs 2, 3, 4                 # encoding: [0x10,0x43,0x23,0x00]
+# CHECK-LE: vaddsbs 2, 3, 4                 # encoding: [0x00,0x23,0x43,0x10]
+            vaddsbs 2, 3, 4
+# CHECK-BE: vaddshs 2, 3, 4                 # encoding: [0x10,0x43,0x23,0x40]
+# CHECK-LE: vaddshs 2, 3, 4                 # encoding: [0x40,0x23,0x43,0x10]
+            vaddshs 2, 3, 4
+# CHECK-BE: vaddsws 2, 3, 4                 # encoding: [0x10,0x43,0x23,0x80]
+# CHECK-LE: vaddsws 2, 3, 4                 # encoding: [0x80,0x23,0x43,0x10]
+            vaddsws 2, 3, 4
+# CHECK-BE: vaddubm 2, 3, 4                 # encoding: [0x10,0x43,0x20,0x00]
+# CHECK-LE: vaddubm 2, 3, 4                 # encoding: [0x00,0x20,0x43,0x10]
+            vaddubm 2, 3, 4
+# CHECK-BE: vadduhm 2, 3, 4                 # encoding: [0x10,0x43,0x20,0x40]
+# CHECK-LE: vadduhm 2, 3, 4                 # encoding: [0x40,0x20,0x43,0x10]
+            vadduhm 2, 3, 4
+# CHECK-BE: vadduwm 2, 3, 4                 # encoding: [0x10,0x43,0x20,0x80]
+# CHECK-LE: vadduwm 2, 3, 4                 # encoding: [0x80,0x20,0x43,0x10]
+            vadduwm 2, 3, 4
+# CHECK-BE: vaddubs 2, 3, 4                 # encoding: [0x10,0x43,0x22,0x00]
+# CHECK-LE: vaddubs 2, 3, 4                 # encoding: [0x00,0x22,0x43,0x10]
+            vaddubs 2, 3, 4
+# CHECK-BE: vadduhs 2, 3, 4                 # encoding: [0x10,0x43,0x22,0x40]
+# CHECK-LE: vadduhs 2, 3, 4                 # encoding: [0x40,0x22,0x43,0x10]
+            vadduhs 2, 3, 4
+# CHECK-BE: vadduws 2, 3, 4                 # encoding: [0x10,0x43,0x22,0x80]
+# CHECK-LE: vadduws 2, 3, 4                 # encoding: [0x80,0x22,0x43,0x10]
+            vadduws 2, 3, 4
+
+# CHECK-BE: vsubcuw 2, 3, 4                 # encoding: [0x10,0x43,0x25,0x80]
+# CHECK-LE: vsubcuw 2, 3, 4                 # encoding: [0x80,0x25,0x43,0x10]
+            vsubcuw 2, 3, 4
+# CHECK-BE: vsubsbs 2, 3, 4                 # encoding: [0x10,0x43,0x27,0x00]
+# CHECK-LE: vsubsbs 2, 3, 4                 # encoding: [0x00,0x27,0x43,0x10]
+            vsubsbs 2, 3, 4
+# CHECK-BE: vsubshs 2, 3, 4                 # encoding: [0x10,0x43,0x27,0x40]
+# CHECK-LE: vsubshs 2, 3, 4                 # encoding: [0x40,0x27,0x43,0x10]
+            vsubshs 2, 3, 4
+# CHECK-BE: vsubsws 2, 3, 4                 # encoding: [0x10,0x43,0x27,0x80]
+# CHECK-LE: vsubsws 2, 3, 4                 # encoding: [0x80,0x27,0x43,0x10]
+            vsubsws 2, 3, 4
+# CHECK-BE: vsububm 2, 3, 4                 # encoding: [0x10,0x43,0x24,0x00]
+# CHECK-LE: vsububm 2, 3, 4                 # encoding: [0x00,0x24,0x43,0x10]
+            vsububm 2, 3, 4
+# CHECK-BE: vsubuhm 2, 3, 4                 # encoding: [0x10,0x43,0x24,0x40]
+# CHECK-LE: vsubuhm 2, 3, 4                 # encoding: [0x40,0x24,0x43,0x10]
+            vsubuhm 2, 3, 4
+# CHECK-BE: vsubuwm 2, 3, 4                 # encoding: [0x10,0x43,0x24,0x80]
+# CHECK-LE: vsubuwm 2, 3, 4                 # encoding: [0x80,0x24,0x43,0x10]
+            vsubuwm 2, 3, 4
+# CHECK-BE: vsububs 2, 3, 4                 # encoding: [0x10,0x43,0x26,0x00]
+# CHECK-LE: vsububs 2, 3, 4                 # encoding: [0x00,0x26,0x43,0x10]
+            vsububs 2, 3, 4
+# CHECK-BE: vsubuhs 2, 3, 4                 # encoding: [0x10,0x43,0x26,0x40]
+# CHECK-LE: vsubuhs 2, 3, 4                 # encoding: [0x40,0x26,0x43,0x10]
+            vsubuhs 2, 3, 4
+# CHECK-BE: vsubuws 2, 3, 4                 # encoding: [0x10,0x43,0x26,0x80]
+# CHECK-LE: vsubuws 2, 3, 4                 # encoding: [0x80,0x26,0x43,0x10]
+            vsubuws 2, 3, 4
+
+# CHECK-BE: vmulesb 2, 3, 4                 # encoding: [0x10,0x43,0x23,0x08]
+# CHECK-LE: vmulesb 2, 3, 4                 # encoding: [0x08,0x23,0x43,0x10]
+            vmulesb 2, 3, 4
+# CHECK-BE: vmulesh 2, 3, 4                 # encoding: [0x10,0x43,0x23,0x48]
+# CHECK-LE: vmulesh 2, 3, 4                 # encoding: [0x48,0x23,0x43,0x10]
+            vmulesh 2, 3, 4
+# CHECK-BE: vmuleub 2, 3, 4                 # encoding: [0x10,0x43,0x22,0x08]
+# CHECK-LE: vmuleub 2, 3, 4                 # encoding: [0x08,0x22,0x43,0x10]
+            vmuleub 2, 3, 4
+# CHECK-BE: vmuleuh 2, 3, 4                 # encoding: [0x10,0x43,0x22,0x48]
+# CHECK-LE: vmuleuh 2, 3, 4                 # encoding: [0x48,0x22,0x43,0x10]
+            vmuleuh 2, 3, 4
+# CHECK-BE: vmulosb 2, 3, 4                 # encoding: [0x10,0x43,0x21,0x08]
+# CHECK-LE: vmulosb 2, 3, 4                 # encoding: [0x08,0x21,0x43,0x10]
+            vmulosb 2, 3, 4
+# CHECK-BE: vmulosh 2, 3, 4                 # encoding: [0x10,0x43,0x21,0x48]
+# CHECK-LE: vmulosh 2, 3, 4                 # encoding: [0x48,0x21,0x43,0x10]
+            vmulosh 2, 3, 4
+# CHECK-BE: vmuloub 2, 3, 4                 # encoding: [0x10,0x43,0x20,0x08]
+# CHECK-LE: vmuloub 2, 3, 4                 # encoding: [0x08,0x20,0x43,0x10]
+            vmuloub 2, 3, 4
+# CHECK-BE: vmulouh 2, 3, 4                 # encoding: [0x10,0x43,0x20,0x48]
+# CHECK-LE: vmulouh 2, 3, 4                 # encoding: [0x48,0x20,0x43,0x10]
+            vmulouh 2, 3, 4
+
+# CHECK-BE: vmhaddshs 2, 3, 4, 5            # encoding: [0x10,0x43,0x21,0x60]
+# CHECK-LE: vmhaddshs 2, 3, 4, 5            # encoding: [0x60,0x21,0x43,0x10]
+            vmhaddshs 2, 3, 4, 5
+# CHECK-BE: vmhraddshs 2, 3, 4, 5           # encoding: [0x10,0x43,0x21,0x61]
+# CHECK-LE: vmhraddshs 2, 3, 4, 5           # encoding: [0x61,0x21,0x43,0x10]
+            vmhraddshs 2, 3, 4, 5
+# CHECK-BE: vmladduhm 2, 3, 4, 5            # encoding: [0x10,0x43,0x21,0x62]
+# CHECK-LE: vmladduhm 2, 3, 4, 5            # encoding: [0x62,0x21,0x43,0x10]
+            vmladduhm 2, 3, 4, 5
+# CHECK-BE: vmsumubm 2, 3, 4, 5             # encoding: [0x10,0x43,0x21,0x64]
+# CHECK-LE: vmsumubm 2, 3, 4, 5             # encoding: [0x64,0x21,0x43,0x10]
+            vmsumubm 2, 3, 4, 5
+# CHECK-BE: vmsummbm 2, 3, 4, 5             # encoding: [0x10,0x43,0x21,0x65]
+# CHECK-LE: vmsummbm 2, 3, 4, 5             # encoding: [0x65,0x21,0x43,0x10]
+            vmsummbm 2, 3, 4, 5
+# CHECK-BE: vmsumshm 2, 3, 4, 5             # encoding: [0x10,0x43,0x21,0x68]
+# CHECK-LE: vmsumshm 2, 3, 4, 5             # encoding: [0x68,0x21,0x43,0x10]
+            vmsumshm 2, 3, 4, 5
+# CHECK-BE: vmsumshs 2, 3, 4, 5             # encoding: [0x10,0x43,0x21,0x69]
+# CHECK-LE: vmsumshs 2, 3, 4, 5             # encoding: [0x69,0x21,0x43,0x10]
+            vmsumshs 2, 3, 4, 5
+# CHECK-BE: vmsumuhm 2, 3, 4, 5             # encoding: [0x10,0x43,0x21,0x66]
+# CHECK-LE: vmsumuhm 2, 3, 4, 5             # encoding: [0x66,0x21,0x43,0x10]
+            vmsumuhm 2, 3, 4, 5
+# CHECK-BE: vmsumuhs 2, 3, 4, 5             # encoding: [0x10,0x43,0x21,0x67]
+# CHECK-LE: vmsumuhs 2, 3, 4, 5             # encoding: [0x67,0x21,0x43,0x10]
+            vmsumuhs 2, 3, 4, 5
+
+# CHECK-BE: vsumsws 2, 3, 4                 # encoding: [0x10,0x43,0x27,0x88]
+# CHECK-LE: vsumsws 2, 3, 4                 # encoding: [0x88,0x27,0x43,0x10]
+            vsumsws 2, 3, 4
+# CHECK-BE: vsum2sws 2, 3, 4                # encoding: [0x10,0x43,0x26,0x88]
+# CHECK-LE: vsum2sws 2, 3, 4                # encoding: [0x88,0x26,0x43,0x10]
+            vsum2sws 2, 3, 4
+# CHECK-BE: vsum4sbs 2, 3, 4                # encoding: [0x10,0x43,0x27,0x08]
+# CHECK-LE: vsum4sbs 2, 3, 4                # encoding: [0x08,0x27,0x43,0x10]
+            vsum4sbs 2, 3, 4
+# CHECK-BE: vsum4shs 2, 3, 4                # encoding: [0x10,0x43,0x26,0x48]
+# CHECK-LE: vsum4shs 2, 3, 4                # encoding: [0x48,0x26,0x43,0x10]
+            vsum4shs 2, 3, 4
+# CHECK-BE: vsum4ubs 2, 3, 4                # encoding: [0x10,0x43,0x26,0x08]
+# CHECK-LE: vsum4ubs 2, 3, 4                # encoding: [0x08,0x26,0x43,0x10]
+            vsum4ubs 2, 3, 4
+
+# CHECK-BE: vavgsb 2, 3, 4                  # encoding: [0x10,0x43,0x25,0x02]
+# CHECK-LE: vavgsb 2, 3, 4                  # encoding: [0x02,0x25,0x43,0x10]
+            vavgsb 2, 3, 4
+# CHECK-BE: vavgsh 2, 3, 4                  # encoding: [0x10,0x43,0x25,0x42]
+# CHECK-LE: vavgsh 2, 3, 4                  # encoding: [0x42,0x25,0x43,0x10]
+            vavgsh 2, 3, 4
+# CHECK-BE: vavgsw 2, 3, 4                  # encoding: [0x10,0x43,0x25,0x82]
+# CHECK-LE: vavgsw 2, 3, 4                  # encoding: [0x82,0x25,0x43,0x10]
+            vavgsw 2, 3, 4
+# CHECK-BE: vavgub 2, 3, 4                  # encoding: [0x10,0x43,0x24,0x02]
+# CHECK-LE: vavgub 2, 3, 4                  # encoding: [0x02,0x24,0x43,0x10]
+            vavgub 2, 3, 4
+# CHECK-BE: vavguh 2, 3, 4                  # encoding: [0x10,0x43,0x24,0x42]
+# CHECK-LE: vavguh 2, 3, 4                  # encoding: [0x42,0x24,0x43,0x10]
+            vavguh 2, 3, 4
+# CHECK-BE: vavguw 2, 3, 4                  # encoding: [0x10,0x43,0x24,0x82]
+# CHECK-LE: vavguw 2, 3, 4                  # encoding: [0x82,0x24,0x43,0x10]
+            vavguw 2, 3, 4
+
+# CHECK-BE: vmaxsb 2, 3, 4                  # encoding: [0x10,0x43,0x21,0x02]
+# CHECK-LE: vmaxsb 2, 3, 4                  # encoding: [0x02,0x21,0x43,0x10]
+            vmaxsb 2, 3, 4
+# CHECK-BE: vmaxsh 2, 3, 4                  # encoding: [0x10,0x43,0x21,0x42]
+# CHECK-LE: vmaxsh 2, 3, 4                  # encoding: [0x42,0x21,0x43,0x10]
+            vmaxsh 2, 3, 4
+# CHECK-BE: vmaxsw 2, 3, 4                  # encoding: [0x10,0x43,0x21,0x82]
+# CHECK-LE: vmaxsw 2, 3, 4                  # encoding: [0x82,0x21,0x43,0x10]
+            vmaxsw 2, 3, 4
+# CHECK-BE: vmaxub 2, 3, 4                  # encoding: [0x10,0x43,0x20,0x02]
+# CHECK-LE: vmaxub 2, 3, 4                  # encoding: [0x02,0x20,0x43,0x10]
+            vmaxub 2, 3, 4
+# CHECK-BE: vmaxuh 2, 3, 4                  # encoding: [0x10,0x43,0x20,0x42]
+# CHECK-LE: vmaxuh 2, 3, 4                  # encoding: [0x42,0x20,0x43,0x10]
+            vmaxuh 2, 3, 4
+# CHECK-BE: vmaxuw 2, 3, 4                  # encoding: [0x10,0x43,0x20,0x82]
+# CHECK-LE: vmaxuw 2, 3, 4                  # encoding: [0x82,0x20,0x43,0x10]
+            vmaxuw 2, 3, 4
+
+# CHECK-BE: vminsb 2, 3, 4                  # encoding: [0x10,0x43,0x23,0x02]
+# CHECK-LE: vminsb 2, 3, 4                  # encoding: [0x02,0x23,0x43,0x10]
+            vminsb 2, 3, 4
+# CHECK-BE: vminsh 2, 3, 4                  # encoding: [0x10,0x43,0x23,0x42]
+# CHECK-LE: vminsh 2, 3, 4                  # encoding: [0x42,0x23,0x43,0x10]
+            vminsh 2, 3, 4
+# CHECK-BE: vminsw 2, 3, 4                  # encoding: [0x10,0x43,0x23,0x82]
+# CHECK-LE: vminsw 2, 3, 4                  # encoding: [0x82,0x23,0x43,0x10]
+            vminsw 2, 3, 4
+# CHECK-BE: vminub 2, 3, 4                  # encoding: [0x10,0x43,0x22,0x02]
+# CHECK-LE: vminub 2, 3, 4                  # encoding: [0x02,0x22,0x43,0x10]
+            vminub 2, 3, 4
+# CHECK-BE: vminuh 2, 3, 4                  # encoding: [0x10,0x43,0x22,0x42]
+# CHECK-LE: vminuh 2, 3, 4                  # encoding: [0x42,0x22,0x43,0x10]
+            vminuh 2, 3, 4
+# CHECK-BE: vminuw 2, 3, 4                  # encoding: [0x10,0x43,0x22,0x82]
+# CHECK-LE: vminuw 2, 3, 4                  # encoding: [0x82,0x22,0x43,0x10]
+            vminuw 2, 3, 4
 
 # Vector integer compare instructions
 
-# CHECK: vcmpequb 2, 3, 4                # encoding: [0x10,0x43,0x20,0x06]
-         vcmpequb 2, 3, 4
-# CHECK: vcmpequb. 2, 3, 4               # encoding: [0x10,0x43,0x24,0x06]
-         vcmpequb. 2, 3, 4
-# CHECK: vcmpequh 2, 3, 4                # encoding: [0x10,0x43,0x20,0x46]
-         vcmpequh 2, 3, 4
-# CHECK: vcmpequh. 2, 3, 4               # encoding: [0x10,0x43,0x24,0x46]
-         vcmpequh. 2, 3, 4
-# CHECK: vcmpequw 2, 3, 4                # encoding: [0x10,0x43,0x20,0x86]
-         vcmpequw 2, 3, 4
-# CHECK: vcmpequw. 2, 3, 4               # encoding: [0x10,0x43,0x24,0x86]
-         vcmpequw. 2, 3, 4
-# CHECK: vcmpgtsb 2, 3, 4                # encoding: [0x10,0x43,0x23,0x06]
-         vcmpgtsb 2, 3, 4
-# CHECK: vcmpgtsb. 2, 3, 4               # encoding: [0x10,0x43,0x27,0x06]
-         vcmpgtsb. 2, 3, 4
-# CHECK: vcmpgtsh 2, 3, 4                # encoding: [0x10,0x43,0x23,0x46]
-         vcmpgtsh 2, 3, 4
-# CHECK: vcmpgtsh. 2, 3, 4               # encoding: [0x10,0x43,0x27,0x46]
-         vcmpgtsh. 2, 3, 4
-# CHECK: vcmpgtsw 2, 3, 4                # encoding: [0x10,0x43,0x23,0x86]
-         vcmpgtsw 2, 3, 4
-# CHECK: vcmpgtsw. 2, 3, 4               # encoding: [0x10,0x43,0x27,0x86]
-         vcmpgtsw. 2, 3, 4
-# CHECK: vcmpgtub 2, 3, 4                # encoding: [0x10,0x43,0x22,0x06]
-         vcmpgtub 2, 3, 4
-# CHECK: vcmpgtub. 2, 3, 4               # encoding: [0x10,0x43,0x26,0x06]
-         vcmpgtub. 2, 3, 4
-# CHECK: vcmpgtuh 2, 3, 4                # encoding: [0x10,0x43,0x22,0x46]
-         vcmpgtuh 2, 3, 4
-# CHECK: vcmpgtuh. 2, 3, 4               # encoding: [0x10,0x43,0x26,0x46]
-         vcmpgtuh. 2, 3, 4
-# CHECK: vcmpgtuw 2, 3, 4                # encoding: [0x10,0x43,0x22,0x86]
-         vcmpgtuw 2, 3, 4
-# CHECK: vcmpgtuw. 2, 3, 4               # encoding: [0x10,0x43,0x26,0x86]
-         vcmpgtuw. 2, 3, 4
+# CHECK-BE: vcmpequb 2, 3, 4                # encoding: [0x10,0x43,0x20,0x06]
+# CHECK-LE: vcmpequb 2, 3, 4                # encoding: [0x06,0x20,0x43,0x10]
+            vcmpequb 2, 3, 4
+# CHECK-BE: vcmpequb. 2, 3, 4               # encoding: [0x10,0x43,0x24,0x06]
+# CHECK-LE: vcmpequb. 2, 3, 4               # encoding: [0x06,0x24,0x43,0x10]
+            vcmpequb. 2, 3, 4
+# CHECK-BE: vcmpequh 2, 3, 4                # encoding: [0x10,0x43,0x20,0x46]
+# CHECK-LE: vcmpequh 2, 3, 4                # encoding: [0x46,0x20,0x43,0x10]
+            vcmpequh 2, 3, 4
+# CHECK-BE: vcmpequh. 2, 3, 4               # encoding: [0x10,0x43,0x24,0x46]
+# CHECK-LE: vcmpequh. 2, 3, 4               # encoding: [0x46,0x24,0x43,0x10]
+            vcmpequh. 2, 3, 4
+# CHECK-BE: vcmpequw 2, 3, 4                # encoding: [0x10,0x43,0x20,0x86]
+# CHECK-LE: vcmpequw 2, 3, 4                # encoding: [0x86,0x20,0x43,0x10]
+            vcmpequw 2, 3, 4
+# CHECK-BE: vcmpequw. 2, 3, 4               # encoding: [0x10,0x43,0x24,0x86]
+# CHECK-LE: vcmpequw. 2, 3, 4               # encoding: [0x86,0x24,0x43,0x10]
+            vcmpequw. 2, 3, 4
+# CHECK-BE: vcmpgtsb 2, 3, 4                # encoding: [0x10,0x43,0x23,0x06]
+# CHECK-LE: vcmpgtsb 2, 3, 4                # encoding: [0x06,0x23,0x43,0x10]
+            vcmpgtsb 2, 3, 4
+# CHECK-BE: vcmpgtsb. 2, 3, 4               # encoding: [0x10,0x43,0x27,0x06]
+# CHECK-LE: vcmpgtsb. 2, 3, 4               # encoding: [0x06,0x27,0x43,0x10]
+            vcmpgtsb. 2, 3, 4
+# CHECK-BE: vcmpgtsh 2, 3, 4                # encoding: [0x10,0x43,0x23,0x46]
+# CHECK-LE: vcmpgtsh 2, 3, 4                # encoding: [0x46,0x23,0x43,0x10]
+            vcmpgtsh 2, 3, 4
+# CHECK-BE: vcmpgtsh. 2, 3, 4               # encoding: [0x10,0x43,0x27,0x46]
+# CHECK-LE: vcmpgtsh. 2, 3, 4               # encoding: [0x46,0x27,0x43,0x10]
+            vcmpgtsh. 2, 3, 4
+# CHECK-BE: vcmpgtsw 2, 3, 4                # encoding: [0x10,0x43,0x23,0x86]
+# CHECK-LE: vcmpgtsw 2, 3, 4                # encoding: [0x86,0x23,0x43,0x10]
+            vcmpgtsw 2, 3, 4
+# CHECK-BE: vcmpgtsw. 2, 3, 4               # encoding: [0x10,0x43,0x27,0x86]
+# CHECK-LE: vcmpgtsw. 2, 3, 4               # encoding: [0x86,0x27,0x43,0x10]
+            vcmpgtsw. 2, 3, 4
+# CHECK-BE: vcmpgtub 2, 3, 4                # encoding: [0x10,0x43,0x22,0x06]
+# CHECK-LE: vcmpgtub 2, 3, 4                # encoding: [0x06,0x22,0x43,0x10]
+            vcmpgtub 2, 3, 4
+# CHECK-BE: vcmpgtub. 2, 3, 4               # encoding: [0x10,0x43,0x26,0x06]
+# CHECK-LE: vcmpgtub. 2, 3, 4               # encoding: [0x06,0x26,0x43,0x10]
+            vcmpgtub. 2, 3, 4
+# CHECK-BE: vcmpgtuh 2, 3, 4                # encoding: [0x10,0x43,0x22,0x46]
+# CHECK-LE: vcmpgtuh 2, 3, 4                # encoding: [0x46,0x22,0x43,0x10]
+            vcmpgtuh 2, 3, 4
+# CHECK-BE: vcmpgtuh. 2, 3, 4               # encoding: [0x10,0x43,0x26,0x46]
+# CHECK-LE: vcmpgtuh. 2, 3, 4               # encoding: [0x46,0x26,0x43,0x10]
+            vcmpgtuh. 2, 3, 4
+# CHECK-BE: vcmpgtuw 2, 3, 4                # encoding: [0x10,0x43,0x22,0x86]
+# CHECK-LE: vcmpgtuw 2, 3, 4                # encoding: [0x86,0x22,0x43,0x10]
+            vcmpgtuw 2, 3, 4
+# CHECK-BE: vcmpgtuw. 2, 3, 4               # encoding: [0x10,0x43,0x26,0x86]
+# CHECK-LE: vcmpgtuw. 2, 3, 4               # encoding: [0x86,0x26,0x43,0x10]
+            vcmpgtuw. 2, 3, 4
 
 # Vector integer logical instructions
 
-# CHECK: vand 2, 3, 4                    # encoding: [0x10,0x43,0x24,0x04]
-         vand 2, 3, 4
-# CHECK: vandc 2, 3, 4                   # encoding: [0x10,0x43,0x24,0x44]
-         vandc 2, 3, 4
-# CHECK: vnor 2, 3, 4                    # encoding: [0x10,0x43,0x25,0x04]
-         vnor 2, 3, 4
-# CHECK: vor 2, 3, 4                     # encoding: [0x10,0x43,0x24,0x84]
-         vor 2, 3, 4
-# CHECK: vxor 2, 3, 4                    # encoding: [0x10,0x43,0x24,0xc4]
-         vxor 2, 3, 4
+# CHECK-BE: vand 2, 3, 4                    # encoding: [0x10,0x43,0x24,0x04]
+# CHECK-LE: vand 2, 3, 4                    # encoding: [0x04,0x24,0x43,0x10]
+            vand 2, 3, 4
+# CHECK-BE: vandc 2, 3, 4                   # encoding: [0x10,0x43,0x24,0x44]
+# CHECK-LE: vandc 2, 3, 4                   # encoding: [0x44,0x24,0x43,0x10]
+            vandc 2, 3, 4
+# CHECK-BE: vnor 2, 3, 4                    # encoding: [0x10,0x43,0x25,0x04]
+# CHECK-LE: vnor 2, 3, 4                    # encoding: [0x04,0x25,0x43,0x10]
+            vnor 2, 3, 4
+# CHECK-BE: vor 2, 3, 4                     # encoding: [0x10,0x43,0x24,0x84]
+# CHECK-LE: vor 2, 3, 4                     # encoding: [0x84,0x24,0x43,0x10]
+            vor 2, 3, 4
+# CHECK-BE: vxor 2, 3, 4                    # encoding: [0x10,0x43,0x24,0xc4]
+# CHECK-LE: vxor 2, 3, 4                    # encoding: [0xc4,0x24,0x43,0x10]
+            vxor 2, 3, 4
 
 # Vector integer rotate and shift instructions
 
-# CHECK: vrlb 2, 3, 4                    # encoding: [0x10,0x43,0x20,0x04]
-         vrlb 2, 3, 4
-# CHECK: vrlh 2, 3, 4                    # encoding: [0x10,0x43,0x20,0x44]
-         vrlh 2, 3, 4
-# CHECK: vrlw 2, 3, 4                    # encoding: [0x10,0x43,0x20,0x84]
-         vrlw 2, 3, 4
-
-# CHECK: vslb 2, 3, 4                    # encoding: [0x10,0x43,0x21,0x04]
-         vslb 2, 3, 4
-# CHECK: vslh 2, 3, 4                    # encoding: [0x10,0x43,0x21,0x44]
-         vslh 2, 3, 4
-# CHECK: vslw 2, 3, 4                    # encoding: [0x10,0x43,0x21,0x84]
-         vslw 2, 3, 4
-# CHECK: vsrb 2, 3, 4                    # encoding: [0x10,0x43,0x22,0x04]
-         vsrb 2, 3, 4
-# CHECK: vsrh 2, 3, 4                    # encoding: [0x10,0x43,0x22,0x44]
-         vsrh 2, 3, 4
-# CHECK: vsrw 2, 3, 4                    # encoding: [0x10,0x43,0x22,0x84]
-         vsrw 2, 3, 4
-# CHECK: vsrab 2, 3, 4                   # encoding: [0x10,0x43,0x23,0x04]
-         vsrab 2, 3, 4
-# CHECK: vsrah 2, 3, 4                   # encoding: [0x10,0x43,0x23,0x44]
-         vsrah 2, 3, 4
-# CHECK: vsraw 2, 3, 4                   # encoding: [0x10,0x43,0x23,0x84]
-         vsraw 2, 3, 4
+# CHECK-BE: vrlb 2, 3, 4                    # encoding: [0x10,0x43,0x20,0x04]
+# CHECK-LE: vrlb 2, 3, 4                    # encoding: [0x04,0x20,0x43,0x10]
+            vrlb 2, 3, 4
+# CHECK-BE: vrlh 2, 3, 4                    # encoding: [0x10,0x43,0x20,0x44]
+# CHECK-LE: vrlh 2, 3, 4                    # encoding: [0x44,0x20,0x43,0x10]
+            vrlh 2, 3, 4
+# CHECK-BE: vrlw 2, 3, 4                    # encoding: [0x10,0x43,0x20,0x84]
+# CHECK-LE: vrlw 2, 3, 4                    # encoding: [0x84,0x20,0x43,0x10]
+            vrlw 2, 3, 4
+
+# CHECK-BE: vslb 2, 3, 4                    # encoding: [0x10,0x43,0x21,0x04]
+# CHECK-LE: vslb 2, 3, 4                    # encoding: [0x04,0x21,0x43,0x10]
+            vslb 2, 3, 4
+# CHECK-BE: vslh 2, 3, 4                    # encoding: [0x10,0x43,0x21,0x44]
+# CHECK-LE: vslh 2, 3, 4                    # encoding: [0x44,0x21,0x43,0x10]
+            vslh 2, 3, 4
+# CHECK-BE: vslw 2, 3, 4                    # encoding: [0x10,0x43,0x21,0x84]
+# CHECK-LE: vslw 2, 3, 4                    # encoding: [0x84,0x21,0x43,0x10]
+            vslw 2, 3, 4
+# CHECK-BE: vsrb 2, 3, 4                    # encoding: [0x10,0x43,0x22,0x04]
+# CHECK-LE: vsrb 2, 3, 4                    # encoding: [0x04,0x22,0x43,0x10]
+            vsrb 2, 3, 4
+# CHECK-BE: vsrh 2, 3, 4                    # encoding: [0x10,0x43,0x22,0x44]
+# CHECK-LE: vsrh 2, 3, 4                    # encoding: [0x44,0x22,0x43,0x10]
+            vsrh 2, 3, 4
+# CHECK-BE: vsrw 2, 3, 4                    # encoding: [0x10,0x43,0x22,0x84]
+# CHECK-LE: vsrw 2, 3, 4                    # encoding: [0x84,0x22,0x43,0x10]
+            vsrw 2, 3, 4
+# CHECK-BE: vsrab 2, 3, 4                   # encoding: [0x10,0x43,0x23,0x04]
+# CHECK-LE: vsrab 2, 3, 4                   # encoding: [0x04,0x23,0x43,0x10]
+            vsrab 2, 3, 4
+# CHECK-BE: vsrah 2, 3, 4                   # encoding: [0x10,0x43,0x23,0x44]
+# CHECK-LE: vsrah 2, 3, 4                   # encoding: [0x44,0x23,0x43,0x10]
+            vsrah 2, 3, 4
+# CHECK-BE: vsraw 2, 3, 4                   # encoding: [0x10,0x43,0x23,0x84]
+# CHECK-LE: vsraw 2, 3, 4                   # encoding: [0x84,0x23,0x43,0x10]
+            vsraw 2, 3, 4
 
 # Vector floating-point instructions
 
-# CHECK: vaddfp 2, 3, 4                  # encoding: [0x10,0x43,0x20,0x0a]
-         vaddfp 2, 3, 4
-# CHECK: vsubfp 2, 3, 4                  # encoding: [0x10,0x43,0x20,0x4a]
-         vsubfp 2, 3, 4
-# CHECK: vmaddfp 2, 3, 4, 5              # encoding: [0x10,0x43,0x29,0x2e]
-         vmaddfp 2, 3, 4, 5
-# CHECK: vnmsubfp 2, 3, 4, 5             # encoding: [0x10,0x43,0x29,0x2f]
-         vnmsubfp 2, 3, 4, 5
-
-# CHECK: vmaxfp 2, 3, 4                  # encoding: [0x10,0x43,0x24,0x0a]
-         vmaxfp 2, 3, 4
-# CHECK: vminfp 2, 3, 4                  # encoding: [0x10,0x43,0x24,0x4a]
-         vminfp 2, 3, 4
-
-# CHECK: vctsxs 2, 3, 4                  # encoding: [0x10,0x44,0x1b,0xca]
-         vctsxs 2, 3, 4
-# CHECK: vctuxs 2, 3, 4                  # encoding: [0x10,0x44,0x1b,0x8a]
-         vctuxs 2, 3, 4
-# CHECK: vcfsx 2, 3, 4                   # encoding: [0x10,0x44,0x1b,0x4a]
-         vcfsx 2, 3, 4
-# CHECK: vcfux 2, 3, 4                   # encoding: [0x10,0x44,0x1b,0x0a]
-         vcfux 2, 3, 4
-# CHECK: vrfim 2, 3                      # encoding: [0x10,0x40,0x1a,0xca]
-         vrfim 2, 3
-# CHECK: vrfin 2, 3                      # encoding: [0x10,0x40,0x1a,0x0a]
-         vrfin 2, 3
-# CHECK: vrfip 2, 3                      # encoding: [0x10,0x40,0x1a,0x8a]
-         vrfip 2, 3
-# CHECK: vrfiz 2, 3                      # encoding: [0x10,0x40,0x1a,0x4a]
-         vrfiz 2, 3
-
-# CHECK: vcmpbfp 2, 3, 4                 # encoding: [0x10,0x43,0x23,0xc6]
-         vcmpbfp 2, 3, 4
-# CHECK: vcmpbfp. 2, 3, 4                # encoding: [0x10,0x43,0x27,0xc6]
-         vcmpbfp. 2, 3, 4
-# CHECK: vcmpeqfp 2, 3, 4                # encoding: [0x10,0x43,0x20,0xc6]
-         vcmpeqfp 2, 3, 4
-# CHECK: vcmpeqfp. 2, 3, 4               # encoding: [0x10,0x43,0x24,0xc6]
-         vcmpeqfp. 2, 3, 4
-# CHECK: vcmpgefp 2, 3, 4                # encoding: [0x10,0x43,0x21,0xc6]
-         vcmpgefp 2, 3, 4
-# CHECK: vcmpgefp. 2, 3, 4               # encoding: [0x10,0x43,0x25,0xc6]
-         vcmpgefp. 2, 3, 4
-# CHECK: vcmpgtfp 2, 3, 4                # encoding: [0x10,0x43,0x22,0xc6]
-         vcmpgtfp 2, 3, 4
-# CHECK: vcmpgtfp. 2, 3, 4               # encoding: [0x10,0x43,0x26,0xc6]
-         vcmpgtfp. 2, 3, 4
-
-# CHECK: vexptefp 2, 3                   # encoding: [0x10,0x40,0x19,0x8a]
-         vexptefp 2, 3
-# CHECK: vlogefp 2, 3                    # encoding: [0x10,0x40,0x19,0xca]
-         vlogefp 2, 3
-# CHECK: vrefp 2, 3                      # encoding: [0x10,0x40,0x19,0x0a]
-         vrefp 2, 3
-# CHECK: vrsqrtefp 2, 3                  # encoding: [0x10,0x40,0x19,0x4a]
-         vrsqrtefp 2, 3
+# CHECK-BE: vaddfp 2, 3, 4                  # encoding: [0x10,0x43,0x20,0x0a]
+# CHECK-LE: vaddfp 2, 3, 4                  # encoding: [0x0a,0x20,0x43,0x10]
+            vaddfp 2, 3, 4
+# CHECK-BE: vsubfp 2, 3, 4                  # encoding: [0x10,0x43,0x20,0x4a]
+# CHECK-LE: vsubfp 2, 3, 4                  # encoding: [0x4a,0x20,0x43,0x10]
+            vsubfp 2, 3, 4
+# CHECK-BE: vmaddfp 2, 3, 4, 5              # encoding: [0x10,0x43,0x29,0x2e]
+# CHECK-LE: vmaddfp 2, 3, 4, 5              # encoding: [0x2e,0x29,0x43,0x10]
+            vmaddfp 2, 3, 4, 5
+# CHECK-BE: vnmsubfp 2, 3, 4, 5             # encoding: [0x10,0x43,0x29,0x2f]
+# CHECK-LE: vnmsubfp 2, 3, 4, 5             # encoding: [0x2f,0x29,0x43,0x10]
+            vnmsubfp 2, 3, 4, 5
+
+# CHECK-BE: vmaxfp 2, 3, 4                  # encoding: [0x10,0x43,0x24,0x0a]
+# CHECK-LE: vmaxfp 2, 3, 4                  # encoding: [0x0a,0x24,0x43,0x10]
+            vmaxfp 2, 3, 4
+# CHECK-BE: vminfp 2, 3, 4                  # encoding: [0x10,0x43,0x24,0x4a]
+# CHECK-LE: vminfp 2, 3, 4                  # encoding: [0x4a,0x24,0x43,0x10]
+            vminfp 2, 3, 4
+
+# CHECK-BE: vctsxs 2, 3, 4                  # encoding: [0x10,0x44,0x1b,0xca]
+# CHECK-LE: vctsxs 2, 3, 4                  # encoding: [0xca,0x1b,0x44,0x10]
+            vctsxs 2, 3, 4
+# CHECK-BE: vctuxs 2, 3, 4                  # encoding: [0x10,0x44,0x1b,0x8a]
+# CHECK-LE: vctuxs 2, 3, 4                  # encoding: [0x8a,0x1b,0x44,0x10]
+            vctuxs 2, 3, 4
+# CHECK-BE: vcfsx 2, 3, 4                   # encoding: [0x10,0x44,0x1b,0x4a]
+# CHECK-LE: vcfsx 2, 3, 4                   # encoding: [0x4a,0x1b,0x44,0x10]
+            vcfsx 2, 3, 4
+# CHECK-BE: vcfux 2, 3, 4                   # encoding: [0x10,0x44,0x1b,0x0a]
+# CHECK-LE: vcfux 2, 3, 4                   # encoding: [0x0a,0x1b,0x44,0x10]
+            vcfux 2, 3, 4
+# CHECK-BE: vrfim 2, 3                      # encoding: [0x10,0x40,0x1a,0xca]
+# CHECK-LE: vrfim 2, 3                      # encoding: [0xca,0x1a,0x40,0x10]
+            vrfim 2, 3
+# CHECK-BE: vrfin 2, 3                      # encoding: [0x10,0x40,0x1a,0x0a]
+# CHECK-LE: vrfin 2, 3                      # encoding: [0x0a,0x1a,0x40,0x10]
+            vrfin 2, 3
+# CHECK-BE: vrfip 2, 3                      # encoding: [0x10,0x40,0x1a,0x8a]
+# CHECK-LE: vrfip 2, 3                      # encoding: [0x8a,0x1a,0x40,0x10]
+            vrfip 2, 3
+# CHECK-BE: vrfiz 2, 3                      # encoding: [0x10,0x40,0x1a,0x4a]
+# CHECK-LE: vrfiz 2, 3                      # encoding: [0x4a,0x1a,0x40,0x10]
+            vrfiz 2, 3
+
+# CHECK-BE: vcmpbfp 2, 3, 4                 # encoding: [0x10,0x43,0x23,0xc6]
+# CHECK-LE: vcmpbfp 2, 3, 4                 # encoding: [0xc6,0x23,0x43,0x10]
+            vcmpbfp 2, 3, 4
+# CHECK-BE: vcmpbfp. 2, 3, 4                # encoding: [0x10,0x43,0x27,0xc6]
+# CHECK-LE: vcmpbfp. 2, 3, 4                # encoding: [0xc6,0x27,0x43,0x10]
+            vcmpbfp. 2, 3, 4
+# CHECK-BE: vcmpeqfp 2, 3, 4                # encoding: [0x10,0x43,0x20,0xc6]
+# CHECK-LE: vcmpeqfp 2, 3, 4                # encoding: [0xc6,0x20,0x43,0x10]
+            vcmpeqfp 2, 3, 4
+# CHECK-BE: vcmpeqfp. 2, 3, 4               # encoding: [0x10,0x43,0x24,0xc6]
+# CHECK-LE: vcmpeqfp. 2, 3, 4               # encoding: [0xc6,0x24,0x43,0x10]
+            vcmpeqfp. 2, 3, 4
+# CHECK-BE: vcmpgefp 2, 3, 4                # encoding: [0x10,0x43,0x21,0xc6]
+# CHECK-LE: vcmpgefp 2, 3, 4                # encoding: [0xc6,0x21,0x43,0x10]
+            vcmpgefp 2, 3, 4
+# CHECK-BE: vcmpgefp. 2, 3, 4               # encoding: [0x10,0x43,0x25,0xc6]
+# CHECK-LE: vcmpgefp. 2, 3, 4               # encoding: [0xc6,0x25,0x43,0x10]
+            vcmpgefp. 2, 3, 4
+# CHECK-BE: vcmpgtfp 2, 3, 4                # encoding: [0x10,0x43,0x22,0xc6]
+# CHECK-LE: vcmpgtfp 2, 3, 4                # encoding: [0xc6,0x22,0x43,0x10]
+            vcmpgtfp 2, 3, 4
+# CHECK-BE: vcmpgtfp. 2, 3, 4               # encoding: [0x10,0x43,0x26,0xc6]
+# CHECK-LE: vcmpgtfp. 2, 3, 4               # encoding: [0xc6,0x26,0x43,0x10]
+            vcmpgtfp. 2, 3, 4
+
+# CHECK-BE: vexptefp 2, 3                   # encoding: [0x10,0x40,0x19,0x8a]
+# CHECK-LE: vexptefp 2, 3                   # encoding: [0x8a,0x19,0x40,0x10]
+            vexptefp 2, 3
+# CHECK-BE: vlogefp 2, 3                    # encoding: [0x10,0x40,0x19,0xca]
+# CHECK-LE: vlogefp 2, 3                    # encoding: [0xca,0x19,0x40,0x10]
+            vlogefp 2, 3
+# CHECK-BE: vrefp 2, 3                      # encoding: [0x10,0x40,0x19,0x0a]
+# CHECK-LE: vrefp 2, 3                      # encoding: [0x0a,0x19,0x40,0x10]
+            vrefp 2, 3
+# CHECK-BE: vrsqrtefp 2, 3                  # encoding: [0x10,0x40,0x19,0x4a]
+# CHECK-LE: vrsqrtefp 2, 3                  # encoding: [0x4a,0x19,0x40,0x10]
+            vrsqrtefp 2, 3
 
 # Vector status and control register instructions
 
-# CHECK: mtvscr 2                        # encoding: [0x10,0x00,0x16,0x44]
-         mtvscr 2
-# CHECK: mfvscr 2                        # encoding: [0x10,0x40,0x06,0x04]
-         mfvscr 2
+# CHECK-BE: mtvscr 2                        # encoding: [0x10,0x00,0x16,0x44]
+# CHECK-LE: mtvscr 2                        # encoding: [0x44,0x16,0x00,0x10]
+            mtvscr 2
+# CHECK-BE: mfvscr 2                        # encoding: [0x10,0x40,0x06,0x04]
+# CHECK-LE: mfvscr 2                        # encoding: [0x04,0x06,0x40,0x10]
+            mfvscr 2
 
diff --git a/test/MC/PowerPC/ppc64-encoding.s b/test/MC/PowerPC/ppc64-encoding.s
index d82d86f..4c3530d 100644
--- a/test/MC/PowerPC/ppc64-encoding.s
+++ b/test/MC/PowerPC/ppc64-encoding.s
@@ -1,551 +1,769 @@
 
-# RUN: llvm-mc -triple powerpc64-unknown-unknown --show-encoding %s | FileCheck %s
+# RUN: llvm-mc -triple powerpc64-unknown-unknown --show-encoding %s | FileCheck -check-prefix=CHECK-BE %s
+# RUN: llvm-mc -triple powerpc64le-unknown-unknown --show-encoding %s | FileCheck -check-prefix=CHECK-LE %s
 
 # Branch facility
 
 # Branch instructions
 
-# CHECK: b target                        # encoding: [0b010010AA,A,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_br24
-         b target
-# CHECK: ba target                       # encoding: [0b010010AA,A,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_br24abs
-         ba target
-# CHECK: bl target                       # encoding: [0b010010AA,A,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_br24
-         bl target
-# CHECK: bla target                      # encoding: [0b010010AA,A,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_br24abs
-         bla target
-
-# CHECK: bc 4, 10, target                # encoding: [0x40,0x8a,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bc 4, 10, target
-# CHECK: bca 4, 10, target               # encoding: [0x40,0x8a,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bca 4, 10, target
-# CHECK: bcl 4, 10, target               # encoding: [0x40,0x8a,A,0bAAAAAA01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-         bcl 4, 10, target
-# CHECK: bcla 4, 10, target              # encoding: [0x40,0x8a,A,0bAAAAAA11]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-         bcla 4, 10, target
-
-# CHECK: bclr 4, 10, 3                   # encoding: [0x4c,0x8a,0x18,0x20]
-         bclr 4, 10, 3
-# CHECK: bclr 4, 10, 0                   # encoding: [0x4c,0x8a,0x00,0x20]
-         bclr 4, 10
-# CHECK: bclrl 4, 10, 3                  # encoding: [0x4c,0x8a,0x18,0x21]
-         bclrl 4, 10, 3
-# CHECK: bclrl 4, 10, 0                  # encoding: [0x4c,0x8a,0x00,0x21]
-         bclrl 4, 10
-# CHECK: bcctr 4, 10, 3                  # encoding: [0x4c,0x8a,0x1c,0x20]
-         bcctr 4, 10, 3
-# CHECK: bcctr 4, 10, 0                  # encoding: [0x4c,0x8a,0x04,0x20]
-         bcctr 4, 10
-# CHECK: bcctrl 4, 10, 3                 # encoding: [0x4c,0x8a,0x1c,0x21]
-         bcctrl 4, 10, 3
-# CHECK: bcctrl 4, 10, 0                 # encoding: [0x4c,0x8a,0x04,0x21]
-         bcctrl 4, 10
+# CHECK-BE: b target                        # encoding: [0b010010AA,A,A,0bAAAAAA00]
+# CHECK-LE: b target                        # encoding: [0bAAAAAA00,A,A,0b010010AA]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_br24
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_br24
+            b target
+# CHECK-BE: ba target                       # encoding: [0b010010AA,A,A,0bAAAAAA10]
+# CHECK-LE: ba target                       # encoding: [0bAAAAAA10,A,A,0b010010AA]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_br24abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_br24abs
+            ba target
+# CHECK-BE: bl target                       # encoding: [0b010010AA,A,A,0bAAAAAA01]
+# CHECK-LE: bl target                       # encoding: [0bAAAAAA01,A,A,0b010010AA]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_br24
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_br24
+            bl target
+# CHECK-BE: bla target                      # encoding: [0b010010AA,A,A,0bAAAAAA11]
+# CHECK-LE: bla target                      # encoding: [0bAAAAAA11,A,A,0b010010AA]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_br24abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_br24abs
+            bla target
+
+# CHECK-BE: bc 4, 10, target                # encoding: [0x40,0x8a,A,0bAAAAAA00]
+# CHECK-LE: bc 4, 10, target                # encoding: [0bAAAAAA00,A,0x8a,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bc 4, 10, target
+# CHECK-BE: bca 4, 10, target               # encoding: [0x40,0x8a,A,0bAAAAAA10]
+# CHECK-LE: bca 4, 10, target               # encoding: [0bAAAAAA10,A,0x8a,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bca 4, 10, target
+# CHECK-BE: bcl 4, 10, target               # encoding: [0x40,0x8a,A,0bAAAAAA01]
+# CHECK-LE: bcl 4, 10, target               # encoding: [0bAAAAAA01,A,0x8a,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+            bcl 4, 10, target
+# CHECK-BE: bcla 4, 10, target              # encoding: [0x40,0x8a,A,0bAAAAAA11]
+# CHECK-LE: bcla 4, 10, target              # encoding: [0bAAAAAA11,A,0x8a,0x40]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+            bcla 4, 10, target
+
+# CHECK-BE: bclr 4, 10, 3                   # encoding: [0x4c,0x8a,0x18,0x20]
+# CHECK-LE: bclr 4, 10, 3                   # encoding: [0x20,0x18,0x8a,0x4c]
+            bclr 4, 10, 3
+# CHECK-BE: bclr 4, 10, 0                   # encoding: [0x4c,0x8a,0x00,0x20]
+# CHECK-LE: bclr 4, 10, 0                   # encoding: [0x20,0x00,0x8a,0x4c]
+            bclr 4, 10
+# CHECK-BE: bclrl 4, 10, 3                  # encoding: [0x4c,0x8a,0x18,0x21]
+# CHECK-LE: bclrl 4, 10, 3                  # encoding: [0x21,0x18,0x8a,0x4c]
+            bclrl 4, 10, 3
+# CHECK-BE: bclrl 4, 10, 0                  # encoding: [0x4c,0x8a,0x00,0x21]
+# CHECK-LE: bclrl 4, 10, 0                  # encoding: [0x21,0x00,0x8a,0x4c]
+            bclrl 4, 10
+# CHECK-BE: bcctr 4, 10, 3                  # encoding: [0x4c,0x8a,0x1c,0x20]
+# CHECK-LE: bcctr 4, 10, 3                  # encoding: [0x20,0x1c,0x8a,0x4c]
+            bcctr 4, 10, 3
+# CHECK-BE: bcctr 4, 10, 0                  # encoding: [0x4c,0x8a,0x04,0x20]
+# CHECK-LE: bcctr 4, 10, 0                  # encoding: [0x20,0x04,0x8a,0x4c]
+            bcctr 4, 10
+# CHECK-BE: bcctrl 4, 10, 3                 # encoding: [0x4c,0x8a,0x1c,0x21]
+# CHECK-LE: bcctrl 4, 10, 3                 # encoding: [0x21,0x1c,0x8a,0x4c]
+            bcctrl 4, 10, 3
+# CHECK-BE: bcctrl 4, 10, 0                 # encoding: [0x4c,0x8a,0x04,0x21]
+# CHECK-LE: bcctrl 4, 10, 0                 # encoding: [0x21,0x04,0x8a,0x4c]
+            bcctrl 4, 10
 
 # Condition register instructions
 
-# CHECK: crand 2, 3, 4                   # encoding: [0x4c,0x43,0x22,0x02]
-         crand 2, 3, 4
-# CHECK: crnand 2, 3, 4                  # encoding: [0x4c,0x43,0x21,0xc2]
-         crnand 2, 3, 4
-# CHECK: cror 2, 3, 4                    # encoding: [0x4c,0x43,0x23,0x82]
-         cror 2, 3, 4
-# CHECK: crxor 2, 3, 4                   # encoding: [0x4c,0x43,0x21,0x82]
-         crxor 2, 3, 4
-# CHECK: crnor 2, 3, 4                   # encoding: [0x4c,0x43,0x20,0x42]
-         crnor 2, 3, 4
-# CHECK: creqv 2, 3, 4                   # encoding: [0x4c,0x43,0x22,0x42]
-         creqv 2, 3, 4
-# CHECK: crandc 2, 3, 4                  # encoding: [0x4c,0x43,0x21,0x02]
-         crandc 2, 3, 4
-# CHECK: crorc 2, 3, 4                   # encoding: [0x4c,0x43,0x23,0x42]
-         crorc 2, 3, 4
-# CHECK: mcrf 2, 3                       # encoding: [0x4d,0x0c,0x00,0x00]
-         mcrf 2, 3
+# CHECK-BE: crand 2, 3, 4                   # encoding: [0x4c,0x43,0x22,0x02]
+# CHECK-LE: crand 2, 3, 4                   # encoding: [0x02,0x22,0x43,0x4c]
+            crand 2, 3, 4
+# CHECK-BE: crnand 2, 3, 4                  # encoding: [0x4c,0x43,0x21,0xc2]
+# CHECK-LE: crnand 2, 3, 4                  # encoding: [0xc2,0x21,0x43,0x4c]
+            crnand 2, 3, 4
+# CHECK-BE: cror 2, 3, 4                    # encoding: [0x4c,0x43,0x23,0x82]
+# CHECK-LE: cror 2, 3, 4                    # encoding: [0x82,0x23,0x43,0x4c]
+            cror 2, 3, 4
+# CHECK-BE: crxor 2, 3, 4                   # encoding: [0x4c,0x43,0x21,0x82]
+# CHECK-LE: crxor 2, 3, 4                   # encoding: [0x82,0x21,0x43,0x4c]
+            crxor 2, 3, 4
+# CHECK-BE: crnor 2, 3, 4                   # encoding: [0x4c,0x43,0x20,0x42]
+# CHECK-LE: crnor 2, 3, 4                   # encoding: [0x42,0x20,0x43,0x4c]
+            crnor 2, 3, 4
+# CHECK-BE: creqv 2, 3, 4                   # encoding: [0x4c,0x43,0x22,0x42]
+# CHECK-LE: creqv 2, 3, 4                   # encoding: [0x42,0x22,0x43,0x4c]
+            creqv 2, 3, 4
+# CHECK-BE: crandc 2, 3, 4                  # encoding: [0x4c,0x43,0x21,0x02]
+# CHECK-LE: crandc 2, 3, 4                  # encoding: [0x02,0x21,0x43,0x4c]
+            crandc 2, 3, 4
+# CHECK-BE: crorc 2, 3, 4                   # encoding: [0x4c,0x43,0x23,0x42]
+# CHECK-LE: crorc 2, 3, 4                   # encoding: [0x42,0x23,0x43,0x4c]
+            crorc 2, 3, 4
+# CHECK-BE: mcrf 2, 3                       # encoding: [0x4d,0x0c,0x00,0x00]
+# CHECK-LE: mcrf 2, 3                       # encoding: [0x00,0x00,0x0c,0x4d]
+            mcrf 2, 3
 
 # System call instruction
 
-# CHECK: sc 1                            # encoding: [0x44,0x00,0x00,0x22]
-         sc 1
-# CHECK: sc 0                            # encoding: [0x44,0x00,0x00,0x02]
-         sc
+# CHECK-BE: sc 1                            # encoding: [0x44,0x00,0x00,0x22]
+# CHECK-LE: sc 1                            # encoding: [0x22,0x00,0x00,0x44]
+            sc 1
+# CHECK-BE: sc 0                            # encoding: [0x44,0x00,0x00,0x02]
+# CHECK-LE: sc 0                            # encoding: [0x02,0x00,0x00,0x44]
+            sc
 
 # Fixed-point facility
 
 # Fixed-point load instructions
 
-# CHECK: lbz 2, 128(4)                   # encoding: [0x88,0x44,0x00,0x80]
-         lbz 2, 128(4)
-# CHECK: lbzx 2, 3, 4                    # encoding: [0x7c,0x43,0x20,0xae]
-         lbzx 2, 3, 4
-# CHECK: lbzu 2, 128(4)                  # encoding: [0x8c,0x44,0x00,0x80]
-         lbzu 2, 128(4)
-# CHECK: lbzux 2, 3, 4                   # encoding: [0x7c,0x43,0x20,0xee]
-         lbzux 2, 3, 4
-# CHECK: lhz 2, 128(4)                   # encoding: [0xa0,0x44,0x00,0x80]
-         lhz 2, 128(4)
-# CHECK: lhzx 2, 3, 4                    # encoding: [0x7c,0x43,0x22,0x2e]
-         lhzx 2, 3, 4
-# CHECK: lhzu 2, 128(4)                  # encoding: [0xa4,0x44,0x00,0x80]
-         lhzu 2, 128(4)
-# CHECK: lhzux 2, 3, 4                   # encoding: [0x7c,0x43,0x22,0x6e]
-         lhzux 2, 3, 4
-# CHECK: lha 2, 128(4)                   # encoding: [0xa8,0x44,0x00,0x80]
-         lha 2, 128(4)
-# CHECK: lhax 2, 3, 4                    # encoding: [0x7c,0x43,0x22,0xae]
-         lhax 2, 3, 4
-# CHECK: lhau 2, 128(4)                  # encoding: [0xac,0x44,0x00,0x80]
-         lhau 2, 128(4)
-# CHECK: lhaux 2, 3, 4                   # encoding: [0x7c,0x43,0x22,0xee]
-         lhaux 2, 3, 4
-# CHECK: lwz 2, 128(4)                   # encoding: [0x80,0x44,0x00,0x80]
-         lwz 2, 128(4)
-# CHECK: lwzx 2, 3, 4                    # encoding: [0x7c,0x43,0x20,0x2e]
-         lwzx 2, 3, 4
-# CHECK: lwzu 2, 128(4)                  # encoding: [0x84,0x44,0x00,0x80]
-         lwzu 2, 128(4)
-# CHECK: lwzux 2, 3, 4                   # encoding: [0x7c,0x43,0x20,0x6e]
-         lwzux 2, 3, 4
-# CHECK: lwa 2, 128(4)                   # encoding: [0xe8,0x44,0x00,0x82]
-         lwa 2, 128(4)
-# CHECK: lwax 2, 3, 4                    # encoding: [0x7c,0x43,0x22,0xaa]
-         lwax 2, 3, 4
-# CHECK: lwaux 2, 3, 4                   # encoding: [0x7c,0x43,0x22,0xea]
-         lwaux 2, 3, 4
-# CHECK: ld 2, 128(4)                    # encoding: [0xe8,0x44,0x00,0x80]
-         ld 2, 128(4)
-# CHECK: ldx 2, 3, 4                     # encoding: [0x7c,0x43,0x20,0x2a]
-         ldx 2, 3, 4
-# CHECK: ldu 2, 128(4)                   # encoding: [0xe8,0x44,0x00,0x81]
-         ldu 2, 128(4)
-# CHECK: ldux 2, 3, 4                    # encoding: [0x7c,0x43,0x20,0x6a]
-         ldux 2, 3, 4
+# CHECK-BE: lbz 2, 128(4)                   # encoding: [0x88,0x44,0x00,0x80]
+# CHECK-LE: lbz 2, 128(4)                   # encoding: [0x80,0x00,0x44,0x88]
+            lbz 2, 128(4)
+# CHECK-BE: lbzx 2, 3, 4                    # encoding: [0x7c,0x43,0x20,0xae]
+# CHECK-LE: lbzx 2, 3, 4                    # encoding: [0xae,0x20,0x43,0x7c]
+            lbzx 2, 3, 4
+# CHECK-BE: lbzu 2, 128(4)                  # encoding: [0x8c,0x44,0x00,0x80]
+# CHECK-LE: lbzu 2, 128(4)                  # encoding: [0x80,0x00,0x44,0x8c]
+            lbzu 2, 128(4)
+# CHECK-BE: lbzux 2, 3, 4                   # encoding: [0x7c,0x43,0x20,0xee]
+# CHECK-LE: lbzux 2, 3, 4                   # encoding: [0xee,0x20,0x43,0x7c]
+            lbzux 2, 3, 4
+# CHECK-BE: lhz 2, 128(4)                   # encoding: [0xa0,0x44,0x00,0x80]
+# CHECK-LE: lhz 2, 128(4)                   # encoding: [0x80,0x00,0x44,0xa0]
+            lhz 2, 128(4)
+# CHECK-BE: lhzx 2, 3, 4                    # encoding: [0x7c,0x43,0x22,0x2e]
+# CHECK-LE: lhzx 2, 3, 4                    # encoding: [0x2e,0x22,0x43,0x7c]
+            lhzx 2, 3, 4
+# CHECK-BE: lhzu 2, 128(4)                  # encoding: [0xa4,0x44,0x00,0x80]
+# CHECK-LE: lhzu 2, 128(4)                  # encoding: [0x80,0x00,0x44,0xa4]
+            lhzu 2, 128(4)
+# CHECK-BE: lhzux 2, 3, 4                   # encoding: [0x7c,0x43,0x22,0x6e]
+# CHECK-LE: lhzux 2, 3, 4                   # encoding: [0x6e,0x22,0x43,0x7c]
+            lhzux 2, 3, 4
+# CHECK-BE: lha 2, 128(4)                   # encoding: [0xa8,0x44,0x00,0x80]
+# CHECK-LE: lha 2, 128(4)                   # encoding: [0x80,0x00,0x44,0xa8]
+            lha 2, 128(4)
+# CHECK-BE: lhax 2, 3, 4                    # encoding: [0x7c,0x43,0x22,0xae]
+# CHECK-LE: lhax 2, 3, 4                    # encoding: [0xae,0x22,0x43,0x7c]
+            lhax 2, 3, 4
+# CHECK-BE: lhau 2, 128(4)                  # encoding: [0xac,0x44,0x00,0x80]
+# CHECK-LE: lhau 2, 128(4)                  # encoding: [0x80,0x00,0x44,0xac]
+            lhau 2, 128(4)
+# CHECK-BE: lhaux 2, 3, 4                   # encoding: [0x7c,0x43,0x22,0xee]
+# CHECK-LE: lhaux 2, 3, 4                   # encoding: [0xee,0x22,0x43,0x7c]
+            lhaux 2, 3, 4
+# CHECK-BE: lwz 2, 128(4)                   # encoding: [0x80,0x44,0x00,0x80]
+# CHECK-LE: lwz 2, 128(4)                   # encoding: [0x80,0x00,0x44,0x80]
+            lwz 2, 128(4)
+# CHECK-BE: lwzx 2, 3, 4                    # encoding: [0x7c,0x43,0x20,0x2e]
+# CHECK-LE: lwzx 2, 3, 4                    # encoding: [0x2e,0x20,0x43,0x7c]
+            lwzx 2, 3, 4
+# CHECK-BE: lwzu 2, 128(4)                  # encoding: [0x84,0x44,0x00,0x80]
+# CHECK-LE: lwzu 2, 128(4)                  # encoding: [0x80,0x00,0x44,0x84]
+            lwzu 2, 128(4)
+# CHECK-BE: lwzux 2, 3, 4                   # encoding: [0x7c,0x43,0x20,0x6e]
+# CHECK-LE: lwzux 2, 3, 4                   # encoding: [0x6e,0x20,0x43,0x7c]
+            lwzux 2, 3, 4
+# CHECK-BE: lwa 2, 128(4)                   # encoding: [0xe8,0x44,0x00,0x82]
+# CHECK-LE: lwa 2, 128(4)                   # encoding: [0x82,0x00,0x44,0xe8]
+            lwa 2, 128(4)
+# CHECK-BE: lwax 2, 3, 4                    # encoding: [0x7c,0x43,0x22,0xaa]
+# CHECK-LE: lwax 2, 3, 4                    # encoding: [0xaa,0x22,0x43,0x7c]
+            lwax 2, 3, 4
+# CHECK-BE: lwaux 2, 3, 4                   # encoding: [0x7c,0x43,0x22,0xea]
+# CHECK-LE: lwaux 2, 3, 4                   # encoding: [0xea,0x22,0x43,0x7c]
+            lwaux 2, 3, 4
+# CHECK-BE: ld 2, 128(4)                    # encoding: [0xe8,0x44,0x00,0x80]
+# CHECK-LE: ld 2, 128(4)                    # encoding: [0x80,0x00,0x44,0xe8]
+            ld 2, 128(4)
+# CHECK-BE: ldx 2, 3, 4                     # encoding: [0x7c,0x43,0x20,0x2a]
+# CHECK-LE: ldx 2, 3, 4                     # encoding: [0x2a,0x20,0x43,0x7c]
+            ldx 2, 3, 4
+# CHECK-BE: ldu 2, 128(4)                   # encoding: [0xe8,0x44,0x00,0x81]
+# CHECK-LE: ldu 2, 128(4)                   # encoding: [0x81,0x00,0x44,0xe8]
+            ldu 2, 128(4)
+# CHECK-BE: ldux 2, 3, 4                    # encoding: [0x7c,0x43,0x20,0x6a]
+# CHECK-LE: ldux 2, 3, 4                    # encoding: [0x6a,0x20,0x43,0x7c]
+            ldux 2, 3, 4
 
 # Fixed-point store instructions
 
-# CHECK: stb 2, 128(4)                   # encoding: [0x98,0x44,0x00,0x80]
-         stb 2, 128(4)
-# CHECK: stbx 2, 3, 4                    # encoding: [0x7c,0x43,0x21,0xae]
-         stbx 2, 3, 4
-# CHECK: stbu 2, 128(4)                  # encoding: [0x9c,0x44,0x00,0x80]
-         stbu 2, 128(4)
-# CHECK: stbux 2, 3, 4                   # encoding: [0x7c,0x43,0x21,0xee]
-         stbux 2, 3, 4
-# CHECK: sth 2, 128(4)                   # encoding: [0xb0,0x44,0x00,0x80]
-         sth 2, 128(4)
-# CHECK: sthx 2, 3, 4                    # encoding: [0x7c,0x43,0x23,0x2e]
-         sthx 2, 3, 4
-# CHECK: sthu 2, 128(4)                  # encoding: [0xb4,0x44,0x00,0x80]
-         sthu 2, 128(4)
-# CHECK: sthux 2, 3, 4                   # encoding: [0x7c,0x43,0x23,0x6e]
-         sthux 2, 3, 4
-# CHECK: stw 2, 128(4)                   # encoding: [0x90,0x44,0x00,0x80]
-         stw 2, 128(4)
-# CHECK: stwx 2, 3, 4                    # encoding: [0x7c,0x43,0x21,0x2e]
-         stwx 2, 3, 4
-# CHECK: stwu 2, 128(4)                  # encoding: [0x94,0x44,0x00,0x80]
-         stwu 2, 128(4)
-# CHECK: stwux 2, 3, 4                   # encoding: [0x7c,0x43,0x21,0x6e]
-         stwux 2, 3, 4
-# CHECK: std 2, 128(4)                   # encoding: [0xf8,0x44,0x00,0x80]
-         std 2, 128(4)
-# CHECK: stdx 2, 3, 4                    # encoding: [0x7c,0x43,0x21,0x2a]
-         stdx 2, 3, 4
-# CHECK: stdu 2, 128(4)                  # encoding: [0xf8,0x44,0x00,0x81]
-         stdu 2, 128(4)
-# CHECK: stdux 2, 3, 4                   # encoding: [0x7c,0x43,0x21,0x6a]
-         stdux 2, 3, 4
+# CHECK-BE: stb 2, 128(4)                   # encoding: [0x98,0x44,0x00,0x80]
+# CHECK-LE: stb 2, 128(4)                   # encoding: [0x80,0x00,0x44,0x98]
+            stb 2, 128(4)
+# CHECK-BE: stbx 2, 3, 4                    # encoding: [0x7c,0x43,0x21,0xae]
+# CHECK-LE: stbx 2, 3, 4                    # encoding: [0xae,0x21,0x43,0x7c]
+            stbx 2, 3, 4
+# CHECK-BE: stbu 2, 128(4)                  # encoding: [0x9c,0x44,0x00,0x80]
+# CHECK-LE: stbu 2, 128(4)                  # encoding: [0x80,0x00,0x44,0x9c]
+            stbu 2, 128(4)
+# CHECK-BE: stbux 2, 3, 4                   # encoding: [0x7c,0x43,0x21,0xee]
+# CHECK-LE: stbux 2, 3, 4                   # encoding: [0xee,0x21,0x43,0x7c]
+            stbux 2, 3, 4
+# CHECK-BE: sth 2, 128(4)                   # encoding: [0xb0,0x44,0x00,0x80]
+# CHECK-LE: sth 2, 128(4)                   # encoding: [0x80,0x00,0x44,0xb0]
+            sth 2, 128(4)
+# CHECK-BE: sthx 2, 3, 4                    # encoding: [0x7c,0x43,0x23,0x2e]
+# CHECK-LE: sthx 2, 3, 4                    # encoding: [0x2e,0x23,0x43,0x7c]
+            sthx 2, 3, 4
+# CHECK-BE: sthu 2, 128(4)                  # encoding: [0xb4,0x44,0x00,0x80]
+# CHECK-LE: sthu 2, 128(4)                  # encoding: [0x80,0x00,0x44,0xb4]
+            sthu 2, 128(4)
+# CHECK-BE: sthux 2, 3, 4                   # encoding: [0x7c,0x43,0x23,0x6e]
+# CHECK-LE: sthux 2, 3, 4                   # encoding: [0x6e,0x23,0x43,0x7c]
+            sthux 2, 3, 4
+# CHECK-BE: stw 2, 128(4)                   # encoding: [0x90,0x44,0x00,0x80]
+# CHECK-LE: stw 2, 128(4)                   # encoding: [0x80,0x00,0x44,0x90]
+            stw 2, 128(4)
+# CHECK-BE: stwx 2, 3, 4                    # encoding: [0x7c,0x43,0x21,0x2e]
+# CHECK-LE: stwx 2, 3, 4                    # encoding: [0x2e,0x21,0x43,0x7c]
+            stwx 2, 3, 4
+# CHECK-BE: stwu 2, 128(4)                  # encoding: [0x94,0x44,0x00,0x80]
+# CHECK-LE: stwu 2, 128(4)                  # encoding: [0x80,0x00,0x44,0x94]
+            stwu 2, 128(4)
+# CHECK-BE: stwux 2, 3, 4                   # encoding: [0x7c,0x43,0x21,0x6e]
+# CHECK-LE: stwux 2, 3, 4                   # encoding: [0x6e,0x21,0x43,0x7c]
+            stwux 2, 3, 4
+# CHECK-BE: std 2, 128(4)                   # encoding: [0xf8,0x44,0x00,0x80]
+# CHECK-LE: std 2, 128(4)                   # encoding: [0x80,0x00,0x44,0xf8]
+            std 2, 128(4)
+# CHECK-BE: stdx 2, 3, 4                    # encoding: [0x7c,0x43,0x21,0x2a]
+# CHECK-LE: stdx 2, 3, 4                    # encoding: [0x2a,0x21,0x43,0x7c]
+            stdx 2, 3, 4
+# CHECK-BE: stdu 2, 128(4)                  # encoding: [0xf8,0x44,0x00,0x81]
+# CHECK-LE: stdu 2, 128(4)                  # encoding: [0x81,0x00,0x44,0xf8]
+            stdu 2, 128(4)
+# CHECK-BE: stdux 2, 3, 4                   # encoding: [0x7c,0x43,0x21,0x6a]
+# CHECK-LE: stdux 2, 3, 4                   # encoding: [0x6a,0x21,0x43,0x7c]
+            stdux 2, 3, 4
 
 # Fixed-point load and store with byte reversal instructions
 
-# CHECK: lhbrx 2, 3, 4                   # encoding: [0x7c,0x43,0x26,0x2c]
-         lhbrx 2, 3, 4
-# CHECK: sthbrx 2, 3, 4                  # encoding: [0x7c,0x43,0x27,0x2c]
-         sthbrx 2, 3, 4
-# CHECK: lwbrx 2, 3, 4                   # encoding: [0x7c,0x43,0x24,0x2c]
-         lwbrx 2, 3, 4
-# CHECK: stwbrx 2, 3, 4                  # encoding: [0x7c,0x43,0x25,0x2c]
-         stwbrx 2, 3, 4
-# CHECK: ldbrx 2, 3, 4                   # encoding: [0x7c,0x43,0x24,0x28]
-         ldbrx 2, 3, 4
-# CHECK: stdbrx 2, 3, 4                  # encoding: [0x7c,0x43,0x25,0x28]
-         stdbrx 2, 3, 4
+# CHECK-BE: lhbrx 2, 3, 4                   # encoding: [0x7c,0x43,0x26,0x2c]
+# CHECK-LE: lhbrx 2, 3, 4                   # encoding: [0x2c,0x26,0x43,0x7c]
+            lhbrx 2, 3, 4
+# CHECK-BE: sthbrx 2, 3, 4                  # encoding: [0x7c,0x43,0x27,0x2c]
+# CHECK-LE: sthbrx 2, 3, 4                  # encoding: [0x2c,0x27,0x43,0x7c]
+            sthbrx 2, 3, 4
+# CHECK-BE: lwbrx 2, 3, 4                   # encoding: [0x7c,0x43,0x24,0x2c]
+# CHECK-LE: lwbrx 2, 3, 4                   # encoding: [0x2c,0x24,0x43,0x7c]
+            lwbrx 2, 3, 4
+# CHECK-BE: stwbrx 2, 3, 4                  # encoding: [0x7c,0x43,0x25,0x2c]
+# CHECK-LE: stwbrx 2, 3, 4                  # encoding: [0x2c,0x25,0x43,0x7c]
+            stwbrx 2, 3, 4
+# CHECK-BE: ldbrx 2, 3, 4                   # encoding: [0x7c,0x43,0x24,0x28]
+# CHECK-LE: ldbrx 2, 3, 4                   # encoding: [0x28,0x24,0x43,0x7c]
+            ldbrx 2, 3, 4
+# CHECK-BE: stdbrx 2, 3, 4                  # encoding: [0x7c,0x43,0x25,0x28]
+# CHECK-LE: stdbrx 2, 3, 4                  # encoding: [0x28,0x25,0x43,0x7c]
+            stdbrx 2, 3, 4
 
 # Fixed-point load and store multiple instructions
 
-# CHECK: lmw 2, 128(1)                   # encoding: [0xb8,0x41,0x00,0x80]
-         lmw 2, 128(1)
-# CHECK: stmw 2, 128(1)                  # encoding: [0xbc,0x41,0x00,0x80]
-         stmw 2, 128(1)
+# CHECK-BE: lmw 2, 128(1)                   # encoding: [0xb8,0x41,0x00,0x80]
+# CHECK-LE: lmw 2, 128(1)                   # encoding: [0x80,0x00,0x41,0xb8]
+            lmw 2, 128(1)
+# CHECK-BE: stmw 2, 128(1)                  # encoding: [0xbc,0x41,0x00,0x80]
+# CHECK-LE: stmw 2, 128(1)                  # encoding: [0x80,0x00,0x41,0xbc]
+            stmw 2, 128(1)
 
 # FIXME: Fixed-point move assist instructions
 
 # Fixed-point arithmetic instructions
 
-# CHECK: addi 2, 3, 128                  # encoding: [0x38,0x43,0x00,0x80]
-         addi 2, 3, 128
-# CHECK: addis 2, 3, 128                 # encoding: [0x3c,0x43,0x00,0x80]
-         addis 2, 3, 128
-# CHECK: add 2, 3, 4                     # encoding: [0x7c,0x43,0x22,0x14]
-         add 2, 3, 4
-# CHECK: add. 2, 3, 4                    # encoding: [0x7c,0x43,0x22,0x15]
-         add. 2, 3, 4
-# FIXME: addo 2, 3, 4
-# FIXME: addo. 2, 3, 4
-# CHECK: subf 2, 3, 4                    # encoding: [0x7c,0x43,0x20,0x50]
-         subf 2, 3, 4
-# CHECK: subf. 2, 3, 4                   # encoding: [0x7c,0x43,0x20,0x51]
-         subf. 2, 3, 4
-# FIXME: subfo 2, 3, 4
-# FIXME: subfo. 2, 3, 4
-# CHECK: addic 2, 3, 128                 # encoding: [0x30,0x43,0x00,0x80]
-         addic 2, 3, 128
-# CHECK: addic. 2, 3, 128                # encoding: [0x34,0x43,0x00,0x80]
-         addic. 2, 3, 128
-# CHECK: subfic 2, 3, 4                  # encoding: [0x20,0x43,0x00,0x04]
-         subfic 2, 3, 4
-
-# CHECK: addc 2, 3, 4                    # encoding: [0x7c,0x43,0x20,0x14]
-         addc 2, 3, 4
-# CHECK: addc. 2, 3, 4                   # encoding: [0x7c,0x43,0x20,0x15]
-         addc. 2, 3, 4
-# FIXME: addco 2, 3, 4
-# FIXME: addco. 2, 3, 4
-# CHECK: subfc 2, 3, 4                   # encoding: [0x7c,0x43,0x20,0x10]
-         subfc 2, 3, 4
-# CHECK: subfc 2, 3, 4                   # encoding: [0x7c,0x43,0x20,0x10]
-         subfc 2, 3, 4
-# FIXME: subfco 2, 3, 4
-# FIXME: subfco. 2, 3, 4
-
-# CHECK: adde 2, 3, 4                    # encoding: [0x7c,0x43,0x21,0x14]
-         adde 2, 3, 4
-# CHECK: adde. 2, 3, 4                   # encoding: [0x7c,0x43,0x21,0x15]
-         adde. 2, 3, 4
-# FIXME: addeo 2, 3, 4
-# FIXME: addeo. 2, 3, 4
-# CHECK: subfe 2, 3, 4                   # encoding: [0x7c,0x43,0x21,0x10]
-         subfe 2, 3, 4
-# CHECK: subfe. 2, 3, 4                  # encoding: [0x7c,0x43,0x21,0x11]
-         subfe. 2, 3, 4
-# FIXME: subfeo 2, 3, 4
-# FIXME: subfeo. 2, 3, 4
-
-# CHECK: addme 2, 3                      # encoding: [0x7c,0x43,0x01,0xd4]
-         addme 2, 3
-# CHECK: addme. 2, 3                     # encoding: [0x7c,0x43,0x01,0xd5]
-         addme. 2, 3
-# FIXME: addmeo 2, 3
-# FIXME: addmeo. 2, 3
-# CHECK: subfme 2, 3                     # encoding: [0x7c,0x43,0x01,0xd0]
-         subfme 2, 3
-# CHECK: subfme. 2, 3                    # encoding: [0x7c,0x43,0x01,0xd1]
-         subfme. 2, 3
-# FIXME: subfmeo 2, 3
-# FIXME: subfmeo. 2, 3
-
-# CHECK: addze 2, 3                      # encoding: [0x7c,0x43,0x01,0x94]
-         addze 2, 3
-# CHECK: addze. 2, 3                     # encoding: [0x7c,0x43,0x01,0x95]
-         addze. 2, 3
-# FIXME: addzeo 2, 3
-# FIXME: addzeo. 2, 3
-# CHECK: subfze 2, 3                     # encoding: [0x7c,0x43,0x01,0x90]
-         subfze 2, 3
-# CHECK: subfze. 2, 3                    # encoding: [0x7c,0x43,0x01,0x91]
-         subfze. 2, 3
-# FIXME: subfzeo 2, 3
-# FIXME: subfzeo. 2, 3
-
-# CHECK: neg 2, 3                        # encoding: [0x7c,0x43,0x00,0xd0]
-         neg 2, 3
-# CHECK: neg. 2, 3                       # encoding: [0x7c,0x43,0x00,0xd1]
-         neg. 2, 3
-# FIXME: nego 2, 3
-# FIXME: nego. 2, 3
-
-# CHECK: mulli 2, 3, 128                 # encoding: [0x1c,0x43,0x00,0x80]
-         mulli 2, 3, 128
-# CHECK: mulhw 2, 3, 4                   # encoding: [0x7c,0x43,0x20,0x96]
-         mulhw 2, 3, 4
-# CHECK: mulhw. 2, 3, 4                  # encoding: [0x7c,0x43,0x20,0x97]
-         mulhw. 2, 3, 4
-# CHECK: mullw 2, 3, 4                   # encoding: [0x7c,0x43,0x21,0xd6]
-         mullw 2, 3, 4
-# CHECK: mullw. 2, 3, 4                  # encoding: [0x7c,0x43,0x21,0xd7]
-         mullw. 2, 3, 4
-# FIXME: mullwo 2, 3, 4
-# FIXME: mullwo. 2, 3, 4
-# CHECK: mulhwu 2, 3, 4                  # encoding: [0x7c,0x43,0x20,0x16]
-         mulhwu 2, 3, 4
-# CHECK: mulhwu. 2, 3, 4                 # encoding: [0x7c,0x43,0x20,0x17]
-         mulhwu. 2, 3, 4
-
-# CHECK: divw 2, 3, 4                    # encoding: [0x7c,0x43,0x23,0xd6]
-         divw 2, 3, 4
-# CHECK: divw. 2, 3, 4                   # encoding: [0x7c,0x43,0x23,0xd7]
-         divw. 2, 3, 4
-# FIXME: divwo 2, 3, 4
-# FIXME: divwo. 2, 3, 4
-# CHECK: divwu 2, 3, 4                   # encoding: [0x7c,0x43,0x23,0x96]
-         divwu 2, 3, 4
-# CHECK: divwu. 2, 3, 4                  # encoding: [0x7c,0x43,0x23,0x97]
-         divwu. 2, 3, 4
-# FIXME: divwuo 2, 3, 4
-# FIXME: divwuo. 2, 3, 4
-# FIXME: divwe 2, 3, 4
-# FIXME: divwe. 2, 3, 4
-# FIXME: divweo 2, 3, 4
-# FIXME: divweo. 2, 3, 4
-# FIXME: divweu 2, 3, 4
-# FIXME: divweu. 2, 3, 4
-# FIXME: divweuo 2, 3, 4
-# FIXME: divweuo. 2, 3, 4
-
-# CHECK: mulld 2, 3, 4                   # encoding: [0x7c,0x43,0x21,0xd2]
-         mulld 2, 3, 4
-# CHECK: mulld. 2, 3, 4                  # encoding: [0x7c,0x43,0x21,0xd3]
-         mulld. 2, 3, 4
-# FIXME: mulldo 2, 3, 4
-# FIXME: mulldo. 2, 3, 4
-# CHECK: mulhd 2, 3, 4                   # encoding: [0x7c,0x43,0x20,0x92]
-         mulhd 2, 3, 4
-# CHECK: mulhd. 2, 3, 4                  # encoding: [0x7c,0x43,0x20,0x93]
-         mulhd. 2, 3, 4
-# CHECK: mulhdu 2, 3, 4                  # encoding: [0x7c,0x43,0x20,0x12]
-         mulhdu 2, 3, 4
-# CHECK: mulhdu. 2, 3, 4                 # encoding: [0x7c,0x43,0x20,0x13]
-         mulhdu. 2, 3, 4
-
-# CHECK: divd 2, 3, 4                    # encoding: [0x7c,0x43,0x23,0xd2]
-         divd 2, 3, 4
-# CHECK: divd. 2, 3, 4                   # encoding: [0x7c,0x43,0x23,0xd3]
-         divd. 2, 3, 4
-# FIXME: divdo 2, 3, 4
-# FIXME: divdo. 2, 3, 4
-# CHECK: divdu 2, 3, 4                   # encoding: [0x7c,0x43,0x23,0x92]
-         divdu 2, 3, 4
-# CHECK: divdu. 2, 3, 4                  # encoding: [0x7c,0x43,0x23,0x93]
-         divdu. 2, 3, 4
-# FIXME: divduo 2, 3, 4
-# FIXME: divduo. 2, 3, 4
-# FIXME: divde 2, 3, 4
-# FIXME: divde. 2, 3, 4
-# FIXME: divdeo 2, 3, 4
-# FIXME: divdeo. 2, 3, 4
-# FIXME: divdeu 2, 3, 4
-# FIXME: divdeu. 2, 3, 4
-# FIXME: divdeuo 2, 3, 4
-# FIXME: divdeuo. 2, 3, 4
+# CHECK-BE: addi 2, 3, 128                  # encoding: [0x38,0x43,0x00,0x80]
+# CHECK-LE: addi 2, 3, 128                  # encoding: [0x80,0x00,0x43,0x38]
+            addi 2, 3, 128
+# CHECK-BE: addis 2, 3, 128                 # encoding: [0x3c,0x43,0x00,0x80]
+# CHECK-LE: addis 2, 3, 128                 # encoding: [0x80,0x00,0x43,0x3c]
+            addis 2, 3, 128
+# CHECK-BE: add 2, 3, 4                     # encoding: [0x7c,0x43,0x22,0x14]
+# CHECK-LE: add 2, 3, 4                     # encoding: [0x14,0x22,0x43,0x7c]
+            add 2, 3, 4
+# CHECK-BE: add. 2, 3, 4                    # encoding: [0x7c,0x43,0x22,0x15]
+# CHECK-LE: add. 2, 3, 4                    # encoding: [0x15,0x22,0x43,0x7c]
+            add. 2, 3, 4
+# FIXME:    addo 2, 3, 4
+# FIXME:    addo. 2, 3, 4
+# CHECK-BE: subf 2, 3, 4                    # encoding: [0x7c,0x43,0x20,0x50]
+# CHECK-LE: subf 2, 3, 4                    # encoding: [0x50,0x20,0x43,0x7c]
+            subf 2, 3, 4
+# CHECK-BE: subf. 2, 3, 4                   # encoding: [0x7c,0x43,0x20,0x51]
+# CHECK-LE: subf. 2, 3, 4                   # encoding: [0x51,0x20,0x43,0x7c]
+            subf. 2, 3, 4
+# FIXME:    subfo 2, 3, 4
+# FIXME:    subfo. 2, 3, 4
+# CHECK-BE: addic 2, 3, 128                 # encoding: [0x30,0x43,0x00,0x80]
+# CHECK-LE: addic 2, 3, 128                 # encoding: [0x80,0x00,0x43,0x30]
+            addic 2, 3, 128
+# CHECK-BE: addic. 2, 3, 128                # encoding: [0x34,0x43,0x00,0x80]
+# CHECK-LE: addic. 2, 3, 128                # encoding: [0x80,0x00,0x43,0x34]
+            addic. 2, 3, 128
+# CHECK-BE: subfic 2, 3, 4                  # encoding: [0x20,0x43,0x00,0x04]
+# CHECK-LE: subfic 2, 3, 4                  # encoding: [0x04,0x00,0x43,0x20]
+            subfic 2, 3, 4
+
+# CHECK-BE: addc 2, 3, 4                    # encoding: [0x7c,0x43,0x20,0x14]
+# CHECK-LE: addc 2, 3, 4                    # encoding: [0x14,0x20,0x43,0x7c]
+            addc 2, 3, 4
+# CHECK-BE: addc. 2, 3, 4                   # encoding: [0x7c,0x43,0x20,0x15]
+# CHECK-LE: addc. 2, 3, 4                   # encoding: [0x15,0x20,0x43,0x7c]
+            addc. 2, 3, 4
+# FIXME:    addco 2, 3, 4
+# FIXME:    addco. 2, 3, 4
+# CHECK-BE: subfc 2, 3, 4                   # encoding: [0x7c,0x43,0x20,0x10]
+# CHECK-LE: subfc 2, 3, 4                   # encoding: [0x10,0x20,0x43,0x7c]
+            subfc 2, 3, 4
+# CHECK-BE: subfc 2, 3, 4                   # encoding: [0x7c,0x43,0x20,0x10]
+# CHECK-LE: subfc 2, 3, 4                   # encoding: [0x10,0x20,0x43,0x7c]
+            subfc 2, 3, 4
+# FIXME:    subfco 2, 3, 4
+# FIXME:    subfco. 2, 3, 4
+
+# CHECK-BE: adde 2, 3, 4                    # encoding: [0x7c,0x43,0x21,0x14]
+# CHECK-LE: adde 2, 3, 4                    # encoding: [0x14,0x21,0x43,0x7c]
+            adde 2, 3, 4
+# CHECK-BE: adde. 2, 3, 4                   # encoding: [0x7c,0x43,0x21,0x15]
+# CHECK-LE: adde. 2, 3, 4                   # encoding: [0x15,0x21,0x43,0x7c]
+            adde. 2, 3, 4
+# FIXME:    addeo 2, 3, 4
+# FIXME:    addeo. 2, 3, 4
+# CHECK-BE: subfe 2, 3, 4                   # encoding: [0x7c,0x43,0x21,0x10]
+# CHECK-LE: subfe 2, 3, 4                   # encoding: [0x10,0x21,0x43,0x7c]
+            subfe 2, 3, 4
+# CHECK-BE: subfe. 2, 3, 4                  # encoding: [0x7c,0x43,0x21,0x11]
+# CHECK-LE: subfe. 2, 3, 4                  # encoding: [0x11,0x21,0x43,0x7c]
+            subfe. 2, 3, 4
+# FIXME:    subfeo 2, 3, 4
+# FIXME:    subfeo. 2, 3, 4
+
+# CHECK-BE: addme 2, 3                      # encoding: [0x7c,0x43,0x01,0xd4]
+# CHECK-LE: addme 2, 3                      # encoding: [0xd4,0x01,0x43,0x7c]
+            addme 2, 3
+# CHECK-BE: addme. 2, 3                     # encoding: [0x7c,0x43,0x01,0xd5]
+# CHECK-LE: addme. 2, 3                     # encoding: [0xd5,0x01,0x43,0x7c]
+            addme. 2, 3
+# FIXME:    addmeo 2, 3
+# FIXME:    addmeo. 2, 3
+# CHECK-BE: subfme 2, 3                     # encoding: [0x7c,0x43,0x01,0xd0]
+# CHECK-LE: subfme 2, 3                     # encoding: [0xd0,0x01,0x43,0x7c]
+            subfme 2, 3
+# CHECK-BE: subfme. 2, 3                    # encoding: [0x7c,0x43,0x01,0xd1]
+# CHECK-LE: subfme. 2, 3                    # encoding: [0xd1,0x01,0x43,0x7c]
+            subfme. 2, 3
+# FIXME:    subfmeo 2, 3
+# FIXME:    subfmeo. 2, 3
+
+# CHECK-BE: addze 2, 3                      # encoding: [0x7c,0x43,0x01,0x94]
+# CHECK-LE: addze 2, 3                      # encoding: [0x94,0x01,0x43,0x7c]
+            addze 2, 3
+# CHECK-BE: addze. 2, 3                     # encoding: [0x7c,0x43,0x01,0x95]
+# CHECK-LE: addze. 2, 3                     # encoding: [0x95,0x01,0x43,0x7c]
+            addze. 2, 3
+# FIXME:    addzeo 2, 3
+# FIXME:    addzeo. 2, 3
+# CHECK-BE: subfze 2, 3                     # encoding: [0x7c,0x43,0x01,0x90]
+# CHECK-LE: subfze 2, 3                     # encoding: [0x90,0x01,0x43,0x7c]
+            subfze 2, 3
+# CHECK-BE: subfze. 2, 3                    # encoding: [0x7c,0x43,0x01,0x91]
+# CHECK-LE: subfze. 2, 3                    # encoding: [0x91,0x01,0x43,0x7c]
+            subfze. 2, 3
+# FIXME:    subfzeo 2, 3
+# FIXME:    subfzeo. 2, 3
+
+# CHECK-BE: neg 2, 3                        # encoding: [0x7c,0x43,0x00,0xd0]
+# CHECK-LE: neg 2, 3                        # encoding: [0xd0,0x00,0x43,0x7c]
+            neg 2, 3
+# CHECK-BE: neg. 2, 3                       # encoding: [0x7c,0x43,0x00,0xd1]
+# CHECK-LE: neg. 2, 3                       # encoding: [0xd1,0x00,0x43,0x7c]
+            neg. 2, 3
+# FIXME:    nego 2, 3
+# FIXME:    nego. 2, 3
+
+# CHECK-BE: mulli 2, 3, 128                 # encoding: [0x1c,0x43,0x00,0x80]
+# CHECK-LE: mulli 2, 3, 128                 # encoding: [0x80,0x00,0x43,0x1c]
+            mulli 2, 3, 128
+# CHECK-BE: mulhw 2, 3, 4                   # encoding: [0x7c,0x43,0x20,0x96]
+# CHECK-LE: mulhw 2, 3, 4                   # encoding: [0x96,0x20,0x43,0x7c]
+            mulhw 2, 3, 4
+# CHECK-BE: mulhw. 2, 3, 4                  # encoding: [0x7c,0x43,0x20,0x97]
+# CHECK-LE: mulhw. 2, 3, 4                  # encoding: [0x97,0x20,0x43,0x7c]
+            mulhw. 2, 3, 4
+# CHECK-BE: mullw 2, 3, 4                   # encoding: [0x7c,0x43,0x21,0xd6]
+# CHECK-LE: mullw 2, 3, 4                   # encoding: [0xd6,0x21,0x43,0x7c]
+            mullw 2, 3, 4
+# CHECK-BE: mullw. 2, 3, 4                  # encoding: [0x7c,0x43,0x21,0xd7]
+# CHECK-LE: mullw. 2, 3, 4                  # encoding: [0xd7,0x21,0x43,0x7c]
+            mullw. 2, 3, 4
+# FIXME:    mullwo 2, 3, 4
+# FIXME:    mullwo. 2, 3, 4
+# CHECK-BE: mulhwu 2, 3, 4                  # encoding: [0x7c,0x43,0x20,0x16]
+# CHECK-LE: mulhwu 2, 3, 4                  # encoding: [0x16,0x20,0x43,0x7c]
+            mulhwu 2, 3, 4
+# CHECK-BE: mulhwu. 2, 3, 4                 # encoding: [0x7c,0x43,0x20,0x17]
+# CHECK-LE: mulhwu. 2, 3, 4                 # encoding: [0x17,0x20,0x43,0x7c]
+            mulhwu. 2, 3, 4
+
+# CHECK-BE: divw 2, 3, 4                    # encoding: [0x7c,0x43,0x23,0xd6]
+# CHECK-LE: divw 2, 3, 4                    # encoding: [0xd6,0x23,0x43,0x7c]
+            divw 2, 3, 4
+# CHECK-BE: divw. 2, 3, 4                   # encoding: [0x7c,0x43,0x23,0xd7]
+# CHECK-LE: divw. 2, 3, 4                   # encoding: [0xd7,0x23,0x43,0x7c]
+            divw. 2, 3, 4
+# FIXME:    divwo 2, 3, 4
+# FIXME:    divwo. 2, 3, 4
+# CHECK-BE: divwu 2, 3, 4                   # encoding: [0x7c,0x43,0x23,0x96]
+# CHECK-LE: divwu 2, 3, 4                   # encoding: [0x96,0x23,0x43,0x7c]
+            divwu 2, 3, 4
+# CHECK-BE: divwu. 2, 3, 4                  # encoding: [0x7c,0x43,0x23,0x97]
+# CHECK-LE: divwu. 2, 3, 4                  # encoding: [0x97,0x23,0x43,0x7c]
+            divwu. 2, 3, 4
+# FIXME:    divwuo 2, 3, 4
+# FIXME:    divwuo. 2, 3, 4
+# FIXME:    divwe 2, 3, 4
+# FIXME:    divwe. 2, 3, 4
+# FIXME:    divweo 2, 3, 4
+# FIXME:    divweo. 2, 3, 4
+# FIXME:    divweu 2, 3, 4
+# FIXME:    divweu. 2, 3, 4
+# FIXME:    divweuo 2, 3, 4
+# FIXME:    divweuo. 2, 3, 4
+
+# CHECK-BE: mulld 2, 3, 4                   # encoding: [0x7c,0x43,0x21,0xd2]
+# CHECK-LE: mulld 2, 3, 4                   # encoding: [0xd2,0x21,0x43,0x7c]
+            mulld 2, 3, 4
+# CHECK-BE: mulld. 2, 3, 4                  # encoding: [0x7c,0x43,0x21,0xd3]
+# CHECK-LE: mulld. 2, 3, 4                  # encoding: [0xd3,0x21,0x43,0x7c]
+            mulld. 2, 3, 4
+# FIXME:    mulldo 2, 3, 4
+# FIXME:    mulldo. 2, 3, 4
+# CHECK-BE: mulhd 2, 3, 4                   # encoding: [0x7c,0x43,0x20,0x92]
+# CHECK-LE: mulhd 2, 3, 4                   # encoding: [0x92,0x20,0x43,0x7c]
+            mulhd 2, 3, 4
+# CHECK-BE: mulhd. 2, 3, 4                  # encoding: [0x7c,0x43,0x20,0x93]
+# CHECK-LE: mulhd. 2, 3, 4                  # encoding: [0x93,0x20,0x43,0x7c]
+            mulhd. 2, 3, 4
+# CHECK-BE: mulhdu 2, 3, 4                  # encoding: [0x7c,0x43,0x20,0x12]
+# CHECK-LE: mulhdu 2, 3, 4                  # encoding: [0x12,0x20,0x43,0x7c]
+            mulhdu 2, 3, 4
+# CHECK-BE: mulhdu. 2, 3, 4                 # encoding: [0x7c,0x43,0x20,0x13]
+# CHECK-LE: mulhdu. 2, 3, 4                 # encoding: [0x13,0x20,0x43,0x7c]
+            mulhdu. 2, 3, 4
+
+# CHECK-BE: divd 2, 3, 4                    # encoding: [0x7c,0x43,0x23,0xd2]
+# CHECK-LE: divd 2, 3, 4                    # encoding: [0xd2,0x23,0x43,0x7c]
+            divd 2, 3, 4
+# CHECK-BE: divd. 2, 3, 4                   # encoding: [0x7c,0x43,0x23,0xd3]
+# CHECK-LE: divd. 2, 3, 4                   # encoding: [0xd3,0x23,0x43,0x7c]
+            divd. 2, 3, 4
+# FIXME:    divdo 2, 3, 4
+# FIXME:    divdo. 2, 3, 4
+# CHECK-BE: divdu 2, 3, 4                   # encoding: [0x7c,0x43,0x23,0x92]
+# CHECK-LE: divdu 2, 3, 4                   # encoding: [0x92,0x23,0x43,0x7c]
+            divdu 2, 3, 4
+# CHECK-BE: divdu. 2, 3, 4                  # encoding: [0x7c,0x43,0x23,0x93]
+# CHECK-LE: divdu. 2, 3, 4                  # encoding: [0x93,0x23,0x43,0x7c]
+            divdu. 2, 3, 4
+# FIXME:    divduo 2, 3, 4
+# FIXME:    divduo. 2, 3, 4
+# FIXME:    divde 2, 3, 4
+# FIXME:    divde. 2, 3, 4
+# FIXME:    divdeo 2, 3, 4
+# FIXME:    divdeo. 2, 3, 4
+# FIXME:    divdeu 2, 3, 4
+# FIXME:    divdeu. 2, 3, 4
+# FIXME:    divdeuo 2, 3, 4
+# FIXME:    divdeuo. 2, 3, 4
 
 # Fixed-point compare instructions
 
-# CHECK: cmpdi 2, 3, 128                 # encoding: [0x2d,0x23,0x00,0x80]
-         cmpi 2, 1, 3, 128
-# CHECK: cmpd 2, 3, 4                    # encoding: [0x7d,0x23,0x20,0x00]
-         cmp 2, 1, 3, 4
-# CHECK: cmpldi 2, 3, 128                # encoding: [0x29,0x23,0x00,0x80]
-         cmpli 2, 1, 3, 128
-# CHECK: cmpld 2, 3, 4                   # encoding: [0x7d,0x23,0x20,0x40]
-         cmpl 2, 1, 3, 4
-
-# CHECK: cmpwi 2, 3, 128                 # encoding: [0x2d,0x03,0x00,0x80]
-         cmpi 2, 0, 3, 128
-# CHECK: cmpw 2, 3, 4                    # encoding: [0x7d,0x03,0x20,0x00]
-         cmp 2, 0, 3, 4
-# CHECK: cmplwi 2, 3, 128                # encoding: [0x29,0x03,0x00,0x80]
-         cmpli 2, 0, 3, 128
-# CHECK: cmplw 2, 3, 4                   # encoding: [0x7d,0x03,0x20,0x40]
-         cmpl 2, 0, 3, 4
+# CHECK-BE: cmpdi 2, 3, 128                 # encoding: [0x2d,0x23,0x00,0x80]
+# CHECK-LE: cmpdi 2, 3, 128                 # encoding: [0x80,0x00,0x23,0x2d]
+            cmpi 2, 1, 3, 128
+# CHECK-BE: cmpd 2, 3, 4                    # encoding: [0x7d,0x23,0x20,0x00]
+# CHECK-LE: cmpd 2, 3, 4                    # encoding: [0x00,0x20,0x23,0x7d]
+            cmp 2, 1, 3, 4
+# CHECK-BE: cmpldi 2, 3, 128                # encoding: [0x29,0x23,0x00,0x80]
+# CHECK-LE: cmpldi 2, 3, 128                # encoding: [0x80,0x00,0x23,0x29]
+            cmpli 2, 1, 3, 128
+# CHECK-BE: cmpld 2, 3, 4                   # encoding: [0x7d,0x23,0x20,0x40]
+# CHECK-LE: cmpld 2, 3, 4                   # encoding: [0x40,0x20,0x23,0x7d]
+            cmpl 2, 1, 3, 4
+
+# CHECK-BE: cmpwi 2, 3, 128                 # encoding: [0x2d,0x03,0x00,0x80]
+# CHECK-LE: cmpwi 2, 3, 128                 # encoding: [0x80,0x00,0x03,0x2d]
+            cmpi 2, 0, 3, 128
+# CHECK-BE: cmpw 2, 3, 4                    # encoding: [0x7d,0x03,0x20,0x00]
+# CHECK-LE: cmpw 2, 3, 4                    # encoding: [0x00,0x20,0x03,0x7d]
+            cmp 2, 0, 3, 4
+# CHECK-BE: cmplwi 2, 3, 128                # encoding: [0x29,0x03,0x00,0x80]
+# CHECK-LE: cmplwi 2, 3, 128                # encoding: [0x80,0x00,0x03,0x29]
+            cmpli 2, 0, 3, 128
+# CHECK-BE: cmplw 2, 3, 4                   # encoding: [0x7d,0x03,0x20,0x40]
+# CHECK-LE: cmplw 2, 3, 4                   # encoding: [0x40,0x20,0x03,0x7d]
+            cmpl 2, 0, 3, 4
 
 # Fixed-point trap instructions
 
-# CHECK: twi 2, 3, 4                     # encoding: [0x0c,0x43,0x00,0x04]
-         twi 2, 3, 4
-# CHECK: tw 2, 3, 4                      # encoding: [0x7c,0x43,0x20,0x08]
-         tw 2, 3, 4
-# CHECK: tdi 2, 3, 4                     # encoding: [0x08,0x43,0x00,0x04]
-         tdi 2, 3, 4
-# CHECK: td 2, 3, 4                      # encoding: [0x7c,0x43,0x20,0x88]
-         td 2, 3, 4
+# CHECK-BE: twi 2, 3, 4                     # encoding: [0x0c,0x43,0x00,0x04]
+# CHECK-LE: twi 2, 3, 4                     # encoding: [0x04,0x00,0x43,0x0c]
+            twi 2, 3, 4
+# CHECK-BE: tw 2, 3, 4                      # encoding: [0x7c,0x43,0x20,0x08]
+# CHECK-LE: tw 2, 3, 4                      # encoding: [0x08,0x20,0x43,0x7c]
+            tw 2, 3, 4
+# CHECK-BE: tdi 2, 3, 4                     # encoding: [0x08,0x43,0x00,0x04]
+# CHECK-LE: tdi 2, 3, 4                     # encoding: [0x04,0x00,0x43,0x08]
+            tdi 2, 3, 4
+# CHECK-BE: td 2, 3, 4                      # encoding: [0x7c,0x43,0x20,0x88]
+# CHECK-LE: td 2, 3, 4                      # encoding: [0x88,0x20,0x43,0x7c]
+            td 2, 3, 4
 
 # Fixed-point select
 
-# CHECK: isel 2, 3, 4, 5                 # encoding: [0x7c,0x43,0x21,0x5e]
-         isel 2, 3, 4, 5
+# CHECK-BE: isel 2, 3, 4, 5                 # encoding: [0x7c,0x43,0x21,0x5e]
+# CHECK-LE: isel 2, 3, 4, 5                 # encoding: [0x5e,0x21,0x43,0x7c]
+            isel 2, 3, 4, 5
 
 # Fixed-point logical instructions
 
-# CHECK: andi. 2, 3, 128                 # encoding: [0x70,0x62,0x00,0x80]
-         andi. 2, 3, 128
-# CHECK: andis. 2, 3, 128                # encoding: [0x74,0x62,0x00,0x80]
-         andis. 2, 3, 128
-# CHECK: ori 2, 3, 128                   # encoding: [0x60,0x62,0x00,0x80]
-         ori 2, 3, 128
-# CHECK: oris 2, 3, 128                  # encoding: [0x64,0x62,0x00,0x80]
-         oris 2, 3, 128
-# CHECK: xori 2, 3, 128                  # encoding: [0x68,0x62,0x00,0x80]
-         xori 2, 3, 128
-# CHECK: xoris 2, 3, 128                 # encoding: [0x6c,0x62,0x00,0x80]
-         xoris 2, 3, 128
-# CHECK: and 2, 3, 4                     # encoding: [0x7c,0x62,0x20,0x38]
-         and 2, 3, 4
-# CHECK: and. 2, 3, 4                    # encoding: [0x7c,0x62,0x20,0x39]
-         and. 2, 3, 4
-# CHECK: xor 2, 3, 4                     # encoding: [0x7c,0x62,0x22,0x78]
-         xor 2, 3, 4
-# CHECK: xor. 2, 3, 4                    # encoding: [0x7c,0x62,0x22,0x79]
-         xor. 2, 3, 4
-# CHECK: nand 2, 3, 4                    # encoding: [0x7c,0x62,0x23,0xb8]
-         nand 2, 3, 4
-# CHECK: nand. 2, 3, 4                   # encoding: [0x7c,0x62,0x23,0xb9]
-         nand. 2, 3, 4
-# CHECK: or 2, 3, 4                      # encoding: [0x7c,0x62,0x23,0x78]
-         or 2, 3, 4
-# CHECK: or. 2, 3, 4                     # encoding: [0x7c,0x62,0x23,0x79]
-         or. 2, 3, 4
-# CHECK: nor 2, 3, 4                     # encoding: [0x7c,0x62,0x20,0xf8]
-         nor 2, 3, 4
-# CHECK: nor. 2, 3, 4                    # encoding: [0x7c,0x62,0x20,0xf9]
-         nor. 2, 3, 4
-# CHECK: eqv 2, 3, 4                     # encoding: [0x7c,0x62,0x22,0x38]
-         eqv 2, 3, 4
-# CHECK: eqv. 2, 3, 4                    # encoding: [0x7c,0x62,0x22,0x39]
-         eqv. 2, 3, 4
-# CHECK: andc 2, 3, 4                    # encoding: [0x7c,0x62,0x20,0x78]
-         andc 2, 3, 4
-# CHECK: andc. 2, 3, 4                   # encoding: [0x7c,0x62,0x20,0x79]
-         andc. 2, 3, 4
-# CHECK: orc 2, 3, 4                     # encoding: [0x7c,0x62,0x23,0x38]
-         orc 2, 3, 4
-# CHECK: orc. 2, 3, 4                    # encoding: [0x7c,0x62,0x23,0x39]
-         orc. 2, 3, 4
-
-# CHECK: extsb 2, 3                      # encoding: [0x7c,0x62,0x07,0x74]
-         extsb 2, 3
-# CHECK: extsb. 2, 3                     # encoding: [0x7c,0x62,0x07,0x75]
-         extsb. 2, 3
-# CHECK: extsh 2, 3                      # encoding: [0x7c,0x62,0x07,0x34]
-         extsh 2, 3
-# CHECK: extsh. 2, 3                     # encoding: [0x7c,0x62,0x07,0x35]
-         extsh. 2, 3
-
-# CHECK: cntlzw 2, 3                     # encoding: [0x7c,0x62,0x00,0x34]
-         cntlzw 2, 3
-# CHECK: cntlzw. 2, 3                    # encoding: [0x7c,0x62,0x00,0x35]
-         cntlzw. 2, 3
-# FIXME: cmpb 2, 3, 4
-# FIXME: popcntb 2, 3
-# CHECK: popcntw 2, 3                    # encoding: [0x7c,0x62,0x02,0xf4]
-         popcntw 2, 3
-# FIXME: prtyd 2, 3
-# FIXME: prtyw 2, 3
-
-# CHECK: extsw 2, 3                      # encoding: [0x7c,0x62,0x07,0xb4]
-         extsw 2, 3
-# CHECK: extsw. 2, 3                     # encoding: [0x7c,0x62,0x07,0xb5]
-         extsw. 2, 3
-
-# CHECK: cntlzd 2, 3                     # encoding: [0x7c,0x62,0x00,0x74]
-         cntlzd 2, 3
-# CHECK: cntlzd. 2, 3                    # encoding: [0x7c,0x62,0x00,0x75]
-         cntlzd. 2, 3
-# CHECK: popcntd 2, 3                    # encoding: [0x7c,0x62,0x03,0xf4]
-         popcntd 2, 3
-# FIXME: bpermd 2, 3, 4
+# CHECK-BE: andi. 2, 3, 128                 # encoding: [0x70,0x62,0x00,0x80]
+# CHECK-LE: andi. 2, 3, 128                 # encoding: [0x80,0x00,0x62,0x70]
+            andi. 2, 3, 128
+# CHECK-BE: andis. 2, 3, 128                # encoding: [0x74,0x62,0x00,0x80]
+# CHECK-LE: andis. 2, 3, 128                # encoding: [0x80,0x00,0x62,0x74]
+            andis. 2, 3, 128
+# CHECK-BE: ori 2, 3, 128                   # encoding: [0x60,0x62,0x00,0x80]
+# CHECK-LE: ori 2, 3, 128                   # encoding: [0x80,0x00,0x62,0x60]
+            ori 2, 3, 128
+# CHECK-BE: oris 2, 3, 128                  # encoding: [0x64,0x62,0x00,0x80]
+# CHECK-LE: oris 2, 3, 128                  # encoding: [0x80,0x00,0x62,0x64]
+            oris 2, 3, 128
+# CHECK-BE: xori 2, 3, 128                  # encoding: [0x68,0x62,0x00,0x80]
+# CHECK-LE: xori 2, 3, 128                  # encoding: [0x80,0x00,0x62,0x68]
+            xori 2, 3, 128
+# CHECK-BE: xoris 2, 3, 128                 # encoding: [0x6c,0x62,0x00,0x80]
+# CHECK-LE: xoris 2, 3, 128                 # encoding: [0x80,0x00,0x62,0x6c]
+            xoris 2, 3, 128
+# CHECK-BE: and 2, 3, 4                     # encoding: [0x7c,0x62,0x20,0x38]
+# CHECK-LE: and 2, 3, 4                     # encoding: [0x38,0x20,0x62,0x7c]
+            and 2, 3, 4
+# CHECK-BE: and. 2, 3, 4                    # encoding: [0x7c,0x62,0x20,0x39]
+# CHECK-LE: and. 2, 3, 4                    # encoding: [0x39,0x20,0x62,0x7c]
+            and. 2, 3, 4
+# CHECK-BE: xor 2, 3, 4                     # encoding: [0x7c,0x62,0x22,0x78]
+# CHECK-LE: xor 2, 3, 4                     # encoding: [0x78,0x22,0x62,0x7c]
+            xor 2, 3, 4
+# CHECK-BE: xor. 2, 3, 4                    # encoding: [0x7c,0x62,0x22,0x79]
+# CHECK-LE: xor. 2, 3, 4                    # encoding: [0x79,0x22,0x62,0x7c]
+            xor. 2, 3, 4
+# CHECK-BE: nand 2, 3, 4                    # encoding: [0x7c,0x62,0x23,0xb8]
+# CHECK-LE: nand 2, 3, 4                    # encoding: [0xb8,0x23,0x62,0x7c]
+            nand 2, 3, 4
+# CHECK-BE: nand. 2, 3, 4                   # encoding: [0x7c,0x62,0x23,0xb9]
+# CHECK-LE: nand. 2, 3, 4                   # encoding: [0xb9,0x23,0x62,0x7c]
+            nand. 2, 3, 4
+# CHECK-BE: or 2, 3, 4                      # encoding: [0x7c,0x62,0x23,0x78]
+# CHECK-LE: or 2, 3, 4                      # encoding: [0x78,0x23,0x62,0x7c]
+            or 2, 3, 4
+# CHECK-BE: or. 2, 3, 4                     # encoding: [0x7c,0x62,0x23,0x79]
+# CHECK-LE: or. 2, 3, 4                     # encoding: [0x79,0x23,0x62,0x7c]
+            or. 2, 3, 4
+# CHECK-BE: nor 2, 3, 4                     # encoding: [0x7c,0x62,0x20,0xf8]
+# CHECK-LE: nor 2, 3, 4                     # encoding: [0xf8,0x20,0x62,0x7c]
+            nor 2, 3, 4
+# CHECK-BE: nor. 2, 3, 4                    # encoding: [0x7c,0x62,0x20,0xf9]
+# CHECK-LE: nor. 2, 3, 4                    # encoding: [0xf9,0x20,0x62,0x7c]
+            nor. 2, 3, 4
+# CHECK-BE: eqv 2, 3, 4                     # encoding: [0x7c,0x62,0x22,0x38]
+# CHECK-LE: eqv 2, 3, 4                     # encoding: [0x38,0x22,0x62,0x7c]
+            eqv 2, 3, 4
+# CHECK-BE: eqv. 2, 3, 4                    # encoding: [0x7c,0x62,0x22,0x39]
+# CHECK-LE: eqv. 2, 3, 4                    # encoding: [0x39,0x22,0x62,0x7c]
+            eqv. 2, 3, 4
+# CHECK-BE: andc 2, 3, 4                    # encoding: [0x7c,0x62,0x20,0x78]
+# CHECK-LE: andc 2, 3, 4                    # encoding: [0x78,0x20,0x62,0x7c]
+            andc 2, 3, 4
+# CHECK-BE: andc. 2, 3, 4                   # encoding: [0x7c,0x62,0x20,0x79]
+# CHECK-LE: andc. 2, 3, 4                   # encoding: [0x79,0x20,0x62,0x7c]
+            andc. 2, 3, 4
+# CHECK-BE: orc 2, 3, 4                     # encoding: [0x7c,0x62,0x23,0x38]
+# CHECK-LE: orc 2, 3, 4                     # encoding: [0x38,0x23,0x62,0x7c]
+            orc 2, 3, 4
+# CHECK-BE: orc. 2, 3, 4                    # encoding: [0x7c,0x62,0x23,0x39]
+# CHECK-LE: orc. 2, 3, 4                    # encoding: [0x39,0x23,0x62,0x7c]
+            orc. 2, 3, 4
+
+# CHECK-BE: extsb 2, 3                      # encoding: [0x7c,0x62,0x07,0x74]
+# CHECK-LE: extsb 2, 3                      # encoding: [0x74,0x07,0x62,0x7c]
+            extsb 2, 3
+# CHECK-BE: extsb. 2, 3                     # encoding: [0x7c,0x62,0x07,0x75]
+# CHECK-LE: extsb. 2, 3                     # encoding: [0x75,0x07,0x62,0x7c]
+            extsb. 2, 3
+# CHECK-BE: extsh 2, 3                      # encoding: [0x7c,0x62,0x07,0x34]
+# CHECK-LE: extsh 2, 3                      # encoding: [0x34,0x07,0x62,0x7c]
+            extsh 2, 3
+# CHECK-BE: extsh. 2, 3                     # encoding: [0x7c,0x62,0x07,0x35]
+# CHECK-LE: extsh. 2, 3                     # encoding: [0x35,0x07,0x62,0x7c]
+            extsh. 2, 3
+
+# CHECK-BE: cntlzw 2, 3                     # encoding: [0x7c,0x62,0x00,0x34]
+# CHECK-LE: cntlzw 2, 3                     # encoding: [0x34,0x00,0x62,0x7c]
+            cntlzw 2, 3
+# CHECK-BE: cntlzw. 2, 3                    # encoding: [0x7c,0x62,0x00,0x35]
+# CHECK-LE: cntlzw. 2, 3                    # encoding: [0x35,0x00,0x62,0x7c]
+            cntlzw. 2, 3
+# FIXME:    cmpb 2, 3, 4
+# FIXME:    popcntb 2, 3
+# CHECK-BE: popcntw 2, 3                    # encoding: [0x7c,0x62,0x02,0xf4]
+# CHECK-LE: popcntw 2, 3                    # encoding: [0xf4,0x02,0x62,0x7c]
+            popcntw 2, 3
+# FIXME:    prtyd 2, 3
+# FIXME:    prtyw 2, 3
+
+# CHECK-BE: extsw 2, 3                      # encoding: [0x7c,0x62,0x07,0xb4]
+# CHECK-LE: extsw 2, 3                      # encoding: [0xb4,0x07,0x62,0x7c]
+            extsw 2, 3
+# CHECK-BE: extsw. 2, 3                     # encoding: [0x7c,0x62,0x07,0xb5]
+# CHECK-LE: extsw. 2, 3                     # encoding: [0xb5,0x07,0x62,0x7c]
+            extsw. 2, 3
+
+# CHECK-BE: cntlzd 2, 3                     # encoding: [0x7c,0x62,0x00,0x74]
+# CHECK-LE: cntlzd 2, 3                     # encoding: [0x74,0x00,0x62,0x7c]
+            cntlzd 2, 3
+# CHECK-BE: cntlzd. 2, 3                    # encoding: [0x7c,0x62,0x00,0x75]
+# CHECK-LE: cntlzd. 2, 3                    # encoding: [0x75,0x00,0x62,0x7c]
+            cntlzd. 2, 3
+# CHECK-BE: popcntd 2, 3                    # encoding: [0x7c,0x62,0x03,0xf4]
+# CHECK-LE: popcntd 2, 3                    # encoding: [0xf4,0x03,0x62,0x7c]
+            popcntd 2, 3
+# FIXME:    bpermd 2, 3, 4
 
 # Fixed-point rotate and shift instructions
 
-# CHECK: rlwinm 2, 3, 4, 5, 6            # encoding: [0x54,0x62,0x21,0x4c]
-         rlwinm 2, 3, 4, 5, 6
-# CHECK: rlwinm. 2, 3, 4, 5, 6           # encoding: [0x54,0x62,0x21,0x4d]
-         rlwinm. 2, 3, 4, 5, 6
-# CHECK: rlwnm 2, 3, 4, 5, 6             # encoding: [0x5c,0x62,0x21,0x4c]
-         rlwnm 2, 3, 4, 5, 6
-# CHECK: rlwnm. 2, 3, 4, 5, 6            # encoding: [0x5c,0x62,0x21,0x4d]
-         rlwnm. 2, 3, 4, 5, 6
-# CHECK: rlwimi 2, 3, 4, 5, 6            # encoding: [0x50,0x62,0x21,0x4c]
-         rlwimi 2, 3, 4, 5, 6
-# CHECK: rlwimi. 2, 3, 4, 5, 6           # encoding: [0x50,0x62,0x21,0x4d]
-         rlwimi. 2, 3, 4, 5, 6
-# CHECK: rldicl 2, 3, 4, 5               # encoding: [0x78,0x62,0x21,0x40]
-         rldicl 2, 3, 4, 5
-# CHECK: rldicl. 2, 3, 4, 5              # encoding: [0x78,0x62,0x21,0x41]
-         rldicl. 2, 3, 4, 5
-# CHECK: rldicr 2, 3, 4, 5               # encoding: [0x78,0x62,0x21,0x44]
-         rldicr 2, 3, 4, 5
-# CHECK: rldicr. 2, 3, 4, 5              # encoding: [0x78,0x62,0x21,0x45]
-         rldicr. 2, 3, 4, 5
-# CHECK: rldic 2, 3, 4, 5                # encoding: [0x78,0x62,0x21,0x48]
-         rldic 2, 3, 4, 5
-# CHECK: rldic. 2, 3, 4, 5               # encoding: [0x78,0x62,0x21,0x49]
-         rldic. 2, 3, 4, 5
-# CHECK: rldcl 2, 3, 4, 5                # encoding: [0x78,0x62,0x21,0x50]
-         rldcl 2, 3, 4, 5
-# CHECK: rldcl. 2, 3, 4, 5               # encoding: [0x78,0x62,0x21,0x51]
-         rldcl. 2, 3, 4, 5
-# CHECK: rldcr 2, 3, 4, 5                # encoding: [0x78,0x62,0x21,0x52]
-         rldcr 2, 3, 4, 5
-# CHECK: rldcr. 2, 3, 4, 5               # encoding: [0x78,0x62,0x21,0x53]
-         rldcr. 2, 3, 4, 5
-# CHECK: rldimi 2, 3, 4, 5               # encoding: [0x78,0x62,0x21,0x4c]
-         rldimi 2, 3, 4, 5
-# CHECK: rldimi. 2, 3, 4, 5              # encoding: [0x78,0x62,0x21,0x4d]
-         rldimi. 2, 3, 4, 5
-
-# CHECK: slw 2, 3, 4                     # encoding: [0x7c,0x62,0x20,0x30]
-         slw 2, 3, 4
-# CHECK: slw. 2, 3, 4                    # encoding: [0x7c,0x62,0x20,0x31]
-         slw. 2, 3, 4
-# CHECK: srw 2, 3, 4                     # encoding: [0x7c,0x62,0x24,0x30]
-         srw 2, 3, 4
-# CHECK: srw. 2, 3, 4                    # encoding: [0x7c,0x62,0x24,0x31]
-         srw. 2, 3, 4
-# CHECK: srawi 2, 3, 4                   # encoding: [0x7c,0x62,0x26,0x70]
-         srawi 2, 3, 4
-# CHECK: srawi. 2, 3, 4                  # encoding: [0x7c,0x62,0x26,0x71]
-         srawi. 2, 3, 4
-# CHECK: sraw 2, 3, 4                    # encoding: [0x7c,0x62,0x26,0x30]
-         sraw 2, 3, 4
-# CHECK: sraw. 2, 3, 4                   # encoding: [0x7c,0x62,0x26,0x31]
-         sraw. 2, 3, 4
-# CHECK: sld 2, 3, 4                     # encoding: [0x7c,0x62,0x20,0x36]
-         sld 2, 3, 4
-# CHECK: sld. 2, 3, 4                    # encoding: [0x7c,0x62,0x20,0x37]
-         sld. 2, 3, 4
-# CHECK: srd 2, 3, 4                     # encoding: [0x7c,0x62,0x24,0x36]
-         srd 2, 3, 4
-# CHECK: srd. 2, 3, 4                    # encoding: [0x7c,0x62,0x24,0x37]
-         srd. 2, 3, 4
-# CHECK: sradi 2, 3, 4                   # encoding: [0x7c,0x62,0x26,0x74]
-         sradi 2, 3, 4
-# CHECK: sradi. 2, 3, 4                  # encoding: [0x7c,0x62,0x26,0x75]
-         sradi. 2, 3, 4
-# CHECK: srad 2, 3, 4                    # encoding: [0x7c,0x62,0x26,0x34]
-         srad 2, 3, 4
-# CHECK: srad. 2, 3, 4                   # encoding: [0x7c,0x62,0x26,0x35]
-         srad. 2, 3, 4
+# CHECK-BE: rlwinm 2, 3, 4, 5, 6            # encoding: [0x54,0x62,0x21,0x4c]
+# CHECK-LE: rlwinm 2, 3, 4, 5, 6            # encoding: [0x4c,0x21,0x62,0x54]
+            rlwinm 2, 3, 4, 5, 6
+# CHECK-BE: rlwinm. 2, 3, 4, 5, 6           # encoding: [0x54,0x62,0x21,0x4d]
+# CHECK-LE: rlwinm. 2, 3, 4, 5, 6           # encoding: [0x4d,0x21,0x62,0x54]
+            rlwinm. 2, 3, 4, 5, 6
+# CHECK-BE: rlwnm 2, 3, 4, 5, 6             # encoding: [0x5c,0x62,0x21,0x4c]
+# CHECK-LE: rlwnm 2, 3, 4, 5, 6             # encoding: [0x4c,0x21,0x62,0x5c]
+            rlwnm 2, 3, 4, 5, 6
+# CHECK-BE: rlwnm. 2, 3, 4, 5, 6            # encoding: [0x5c,0x62,0x21,0x4d]
+# CHECK-LE: rlwnm. 2, 3, 4, 5, 6            # encoding: [0x4d,0x21,0x62,0x5c]
+            rlwnm. 2, 3, 4, 5, 6
+# CHECK-BE: rlwimi 2, 3, 4, 5, 6            # encoding: [0x50,0x62,0x21,0x4c]
+# CHECK-LE: rlwimi 2, 3, 4, 5, 6            # encoding: [0x4c,0x21,0x62,0x50]
+            rlwimi 2, 3, 4, 5, 6
+# CHECK-BE: rlwimi. 2, 3, 4, 5, 6           # encoding: [0x50,0x62,0x21,0x4d]
+# CHECK-LE: rlwimi. 2, 3, 4, 5, 6           # encoding: [0x4d,0x21,0x62,0x50]
+            rlwimi. 2, 3, 4, 5, 6
+# CHECK-BE: rldicl 2, 3, 4, 5               # encoding: [0x78,0x62,0x21,0x40]
+# CHECK-LE: rldicl 2, 3, 4, 5               # encoding: [0x40,0x21,0x62,0x78]
+            rldicl 2, 3, 4, 5
+# CHECK-BE: rldicl. 2, 3, 4, 5              # encoding: [0x78,0x62,0x21,0x41]
+# CHECK-LE: rldicl. 2, 3, 4, 5              # encoding: [0x41,0x21,0x62,0x78]
+            rldicl. 2, 3, 4, 5
+# CHECK-BE: rldicr 2, 3, 4, 5               # encoding: [0x78,0x62,0x21,0x44]
+# CHECK-LE: rldicr 2, 3, 4, 5               # encoding: [0x44,0x21,0x62,0x78]
+            rldicr 2, 3, 4, 5
+# CHECK-BE: rldicr. 2, 3, 4, 5              # encoding: [0x78,0x62,0x21,0x45]
+# CHECK-LE: rldicr. 2, 3, 4, 5              # encoding: [0x45,0x21,0x62,0x78]
+            rldicr. 2, 3, 4, 5
+# CHECK-BE: rldic 2, 3, 4, 5                # encoding: [0x78,0x62,0x21,0x48]
+# CHECK-LE: rldic 2, 3, 4, 5                # encoding: [0x48,0x21,0x62,0x78]
+            rldic 2, 3, 4, 5
+# CHECK-BE: rldic. 2, 3, 4, 5               # encoding: [0x78,0x62,0x21,0x49]
+# CHECK-LE: rldic. 2, 3, 4, 5               # encoding: [0x49,0x21,0x62,0x78]
+            rldic. 2, 3, 4, 5
+# CHECK-BE: rldcl 2, 3, 4, 5                # encoding: [0x78,0x62,0x21,0x50]
+# CHECK-LE: rldcl 2, 3, 4, 5                # encoding: [0x50,0x21,0x62,0x78]
+            rldcl 2, 3, 4, 5
+# CHECK-BE: rldcl. 2, 3, 4, 5               # encoding: [0x78,0x62,0x21,0x51]
+# CHECK-LE: rldcl. 2, 3, 4, 5               # encoding: [0x51,0x21,0x62,0x78]
+            rldcl. 2, 3, 4, 5
+# CHECK-BE: rldcr 2, 3, 4, 5                # encoding: [0x78,0x62,0x21,0x52]
+# CHECK-LE: rldcr 2, 3, 4, 5                # encoding: [0x52,0x21,0x62,0x78]
+            rldcr 2, 3, 4, 5
+# CHECK-BE: rldcr. 2, 3, 4, 5               # encoding: [0x78,0x62,0x21,0x53]
+# CHECK-LE: rldcr. 2, 3, 4, 5               # encoding: [0x53,0x21,0x62,0x78]
+            rldcr. 2, 3, 4, 5
+# CHECK-BE: rldimi 2, 3, 4, 5               # encoding: [0x78,0x62,0x21,0x4c]
+# CHECK-LE: rldimi 2, 3, 4, 5               # encoding: [0x4c,0x21,0x62,0x78]
+            rldimi 2, 3, 4, 5
+# CHECK-BE: rldimi. 2, 3, 4, 5              # encoding: [0x78,0x62,0x21,0x4d]
+# CHECK-LE: rldimi. 2, 3, 4, 5              # encoding: [0x4d,0x21,0x62,0x78]
+            rldimi. 2, 3, 4, 5
+
+# CHECK-BE: slw 2, 3, 4                     # encoding: [0x7c,0x62,0x20,0x30]
+# CHECK-LE: slw 2, 3, 4                     # encoding: [0x30,0x20,0x62,0x7c]
+            slw 2, 3, 4
+# CHECK-BE: slw. 2, 3, 4                    # encoding: [0x7c,0x62,0x20,0x31]
+# CHECK-LE: slw. 2, 3, 4                    # encoding: [0x31,0x20,0x62,0x7c]
+            slw. 2, 3, 4
+# CHECK-BE: srw 2, 3, 4                     # encoding: [0x7c,0x62,0x24,0x30]
+# CHECK-LE: srw 2, 3, 4                     # encoding: [0x30,0x24,0x62,0x7c]
+            srw 2, 3, 4
+# CHECK-BE: srw. 2, 3, 4                    # encoding: [0x7c,0x62,0x24,0x31]
+# CHECK-LE: srw. 2, 3, 4                    # encoding: [0x31,0x24,0x62,0x7c]
+            srw. 2, 3, 4
+# CHECK-BE: srawi 2, 3, 4                   # encoding: [0x7c,0x62,0x26,0x70]
+# CHECK-LE: srawi 2, 3, 4                   # encoding: [0x70,0x26,0x62,0x7c]
+            srawi 2, 3, 4
+# CHECK-BE: srawi. 2, 3, 4                  # encoding: [0x7c,0x62,0x26,0x71]
+# CHECK-LE: srawi. 2, 3, 4                  # encoding: [0x71,0x26,0x62,0x7c]
+            srawi. 2, 3, 4
+# CHECK-BE: sraw 2, 3, 4                    # encoding: [0x7c,0x62,0x26,0x30]
+# CHECK-LE: sraw 2, 3, 4                    # encoding: [0x30,0x26,0x62,0x7c]
+            sraw 2, 3, 4
+# CHECK-BE: sraw. 2, 3, 4                   # encoding: [0x7c,0x62,0x26,0x31]
+# CHECK-LE: sraw. 2, 3, 4                   # encoding: [0x31,0x26,0x62,0x7c]
+            sraw. 2, 3, 4
+# CHECK-BE: sld 2, 3, 4                     # encoding: [0x7c,0x62,0x20,0x36]
+# CHECK-LE: sld 2, 3, 4                     # encoding: [0x36,0x20,0x62,0x7c]
+            sld 2, 3, 4
+# CHECK-BE: sld. 2, 3, 4                    # encoding: [0x7c,0x62,0x20,0x37]
+# CHECK-LE: sld. 2, 3, 4                    # encoding: [0x37,0x20,0x62,0x7c]
+            sld. 2, 3, 4
+# CHECK-BE: srd 2, 3, 4                     # encoding: [0x7c,0x62,0x24,0x36]
+# CHECK-LE: srd 2, 3, 4                     # encoding: [0x36,0x24,0x62,0x7c]
+            srd 2, 3, 4
+# CHECK-BE: srd. 2, 3, 4                    # encoding: [0x7c,0x62,0x24,0x37]
+# CHECK-LE: srd. 2, 3, 4                    # encoding: [0x37,0x24,0x62,0x7c]
+            srd. 2, 3, 4
+# CHECK-BE: sradi 2, 3, 4                   # encoding: [0x7c,0x62,0x26,0x74]
+# CHECK-LE: sradi 2, 3, 4                   # encoding: [0x74,0x26,0x62,0x7c]
+            sradi 2, 3, 4
+# CHECK-BE: sradi. 2, 3, 4                  # encoding: [0x7c,0x62,0x26,0x75]
+# CHECK-LE: sradi. 2, 3, 4                  # encoding: [0x75,0x26,0x62,0x7c]
+            sradi. 2, 3, 4
+# CHECK-BE: srad 2, 3, 4                    # encoding: [0x7c,0x62,0x26,0x34]
+# CHECK-LE: srad 2, 3, 4                    # encoding: [0x34,0x26,0x62,0x7c]
+            srad 2, 3, 4
+# CHECK-BE: srad. 2, 3, 4                   # encoding: [0x7c,0x62,0x26,0x35]
+# CHECK-LE: srad. 2, 3, 4                   # encoding: [0x35,0x26,0x62,0x7c]
+            srad. 2, 3, 4
 
 # FIXME: BCD assist instructions
 
 # Move to/from system register instructions
 
-# CHECK: mtspr 600, 2                    # encoding: [0x7c,0x58,0x93,0xa6]
-         mtspr 600, 2
-# CHECK: mfspr 2, 600                    # encoding: [0x7c,0x58,0x92,0xa6]
-         mfspr 2, 600
-# CHECK: mtcrf 123, 2                    # encoding: [0x7c,0x47,0xb1,0x20]
-         mtcrf 123, 2
-# CHECK: mfcr 2                          # encoding: [0x7c,0x40,0x00,0x26]
-         mfcr 2
-# CHECK: mtocrf 16, 2                    # encoding: [0x7c,0x51,0x01,0x20]
-         mtocrf 16, 2
-# CHECK: mfocrf 16, 8                    # encoding: [0x7e,0x10,0x80,0x26]
-         mfocrf 16, 8
+# CHECK-BE: mtspr 600, 2                    # encoding: [0x7c,0x58,0x93,0xa6]
+# CHECK-LE: mtspr 600, 2                    # encoding: [0xa6,0x93,0x58,0x7c]
+            mtspr 600, 2
+# CHECK-BE: mfspr 2, 600                    # encoding: [0x7c,0x58,0x92,0xa6]
+# CHECK-LE: mfspr 2, 600                    # encoding: [0xa6,0x92,0x58,0x7c]
+            mfspr 2, 600
+# CHECK-BE: mtcrf 123, 2                    # encoding: [0x7c,0x47,0xb1,0x20]
+# CHECK-LE: mtcrf 123, 2                    # encoding: [0x20,0xb1,0x47,0x7c]
+            mtcrf 123, 2
+# CHECK-BE: mfcr 2                          # encoding: [0x7c,0x40,0x00,0x26]
+# CHECK-LE: mfcr 2                          # encoding: [0x26,0x00,0x40,0x7c]
+            mfcr 2
+# CHECK-BE: mtocrf 16, 2                    # encoding: [0x7c,0x51,0x01,0x20]
+# CHECK-LE: mtocrf 16, 2                    # encoding: [0x20,0x01,0x51,0x7c]
+            mtocrf 16, 2
+# CHECK-BE: mfocrf 16, 8                    # encoding: [0x7e,0x10,0x80,0x26]
+# CHECK-LE: mfocrf 16, 8                    # encoding: [0x26,0x80,0x10,0x7e]
+            mfocrf 16, 8
 
diff --git a/test/MC/PowerPC/ppc64-errors.s b/test/MC/PowerPC/ppc64-errors.s
index 53197ba..ef5d9e8 100644
--- a/test/MC/PowerPC/ppc64-errors.s
+++ b/test/MC/PowerPC/ppc64-errors.s
@@ -1,6 +1,8 @@
 
 # RUN: not llvm-mc -triple powerpc64-unknown-unknown < %s 2> %t
 # RUN: FileCheck < %t %s
+# RUN: not llvm-mc -triple powerpc64le-unknown-unknown < %s 2> %t
+# RUN: FileCheck < %t %s
 
 # Register operands
 
diff --git a/test/MC/PowerPC/ppc64-fixup-apply.s b/test/MC/PowerPC/ppc64-fixup-apply.s
index ba141e4..1693405 100644
--- a/test/MC/PowerPC/ppc64-fixup-apply.s
+++ b/test/MC/PowerPC/ppc64-fixup-apply.s
@@ -1,6 +1,8 @@
 
 # RUN: llvm-mc -triple powerpc64-unknown-unknown -filetype=obj %s | \
-# RUN: llvm-readobj -s -sd | FileCheck %s
+# RUN: llvm-readobj -s -sd | FileCheck -check-prefix=CHECK -check-prefix=CHECK-BE %s
+# RUN: llvm-mc -triple powerpc64le-unknown-unknown -filetype=obj %s | \
+# RUN: llvm-readobj -s -sd | FileCheck -check-prefix=CHECK -check-prefix=CHECK-LE %s
 
 # This checks that fixups that can be resolved within the same
 # object file are applied correctly.
@@ -72,10 +74,14 @@ addis 1, 1, target7@highesta
 # CHECK-NEXT:    AddressAlignment: 4
 # CHECK-NEXT:    EntrySize: 0
 # CHECK-NEXT:    SectionData (
-# CHECK-NEXT:      0000: 38211234 3C211234 38215678 3C211234
-# CHECK-NEXT:      0010: 38214444 3C211111 38218001 3C211001
-# CHECK-NEXT:      0020: 38210008 3C210000 38214321 3C214321
-# CHECK-NEXT:      0030: 3821FFFF 3C211234 38210000 3C211235
+# CHECK-BE-NEXT:   0000: 38211234 3C211234 38215678 3C211234
+# CHECK-LE-NEXT:   0000: 34122138 3412213C 78562138 3412213C
+# CHECK-BE-NEXT:   0010: 38214444 3C211111 38218001 3C211001
+# CHECK-LE-NEXT:   0010: 44442138 1111213C 01802138 0110213C
+# CHECK-BE-NEXT:   0020: 38210008 3C210000 38214321 3C214321
+# CHECK-LE-NEXT:   0020: 08002138 0000213C 21432138 2143213C
+# CHECK-BE-NEXT:   0030: 3821FFFF 3C211234 38210000 3C211235
+# CHECK-LE-NEXT:   0030: FFFF2138 3412213C 00002138 3512213C
 # CHECK-NEXT:    )
 # CHECK-NEXT:  }
 
@@ -94,7 +100,8 @@ addis 1, 1, target7@highesta
 # CHECK-NEXT:     AddressAlignment: 4
 # CHECK-NEXT:     EntrySize: 0
 # CHECK-NEXT:     SectionData (
-# CHECK-NEXT:       0000: 12345678 9ABCDEF0 87654321 BEEF42
+# CHECK-BE-NEXT:    0000: 12345678 9ABCDEF0 87654321 BEEF42
+# CHECK-LE-NEXT:    0000: F0DEBC9A 78563412 21436587 EFBE42
 # CHECK-NEXT:     )
 # CHECK-NEXT:   }
 
diff --git a/test/MC/PowerPC/ppc64-fixup-explicit.s b/test/MC/PowerPC/ppc64-fixup-explicit.s
index 7c56fe8..e0720ab 100644
--- a/test/MC/PowerPC/ppc64-fixup-explicit.s
+++ b/test/MC/PowerPC/ppc64-fixup-explicit.s
@@ -1,46 +1,70 @@
 
-# RUN: llvm-mc -triple powerpc64-unknown-unknown --show-encoding %s | FileCheck %s
+# RUN: llvm-mc -triple powerpc64-unknown-unknown --show-encoding %s | FileCheck -check-prefix=CHECK-BE %s
+# RUN: llvm-mc -triple powerpc64le-unknown-unknown --show-encoding %s | FileCheck -check-prefix=CHECK-LE %s
 
 # RUN: llvm-mc -triple powerpc64-unknown-unknown -filetype=obj %s | \
-# RUN: llvm-readobj -r | FileCheck %s -check-prefix=CHECK-REL
+# RUN: llvm-readobj -r | FileCheck %s -check-prefix=CHECK-BE-REL
+# RUN: llvm-mc -triple powerpc64le-unknown-unknown -filetype=obj %s | \
+# RUN: llvm-readobj -r | FileCheck %s -check-prefix=CHECK-LE-REL
 
 # GOT references must result in explicit relocations
 # even if the target symbol is local.
 
 target:
 
-# CHECK: addi 4, 3, target@GOT           # encoding: [0x38,0x83,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@GOT, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16 target 0x0
-         addi 4, 3, target@got  
-
-# CHECK: ld 1, target@GOT(2)             # encoding: [0xe8,0x22,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@GOT, kind: fixup_ppc_half16ds
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_DS target 0x0
-         ld 1, target@got(2)
-
-# CHECK: addis 3, 2, target@got@ha       # encoding: [0x3c,0x62,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@got@ha, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_HA target 0x0
-         addis 3, 2, target@got@ha
-
-# CHECK: addi 4, 3, target@got@l         # encoding: [0x38,0x83,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@got@l, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_LO target 0x0
-         addi 4, 3, target@got@l
-
-# CHECK: addis 3, 2, target@got@h        # encoding: [0x3c,0x62,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@got@h, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_HI target 0x0
-         addis 3, 2, target@got@h
-
-# CHECK: lwz 1, target@got@l(3)          # encoding: [0x80,0x23,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@got@l, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_LO target 0x0
-         lwz 1, target@got@l(3)
-
-# CHECK: ld 1, target@got@l(3)           # encoding: [0xe8,0x23,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@got@l, kind: fixup_ppc_half16ds
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_LO_DS target 0x0
-         ld 1, target@got@l(3)
+# CHECK-BE: addi 4, 3, target@GOT           # encoding: [0x38,0x83,A,A]
+# CHECK-LE: addi 4, 3, target@GOT           # encoding: [A,A,0x83,0x38]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@GOT, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@GOT, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16 target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_GOT16 target 0x0
+            addi 4, 3, target@got
+
+# CHECK-BE: ld 1, target@GOT(2)             # encoding: [0xe8,0x22,A,0bAAAAAA00]
+# CHECK-LE: ld 1, target@GOT(2)             # encoding: [0bAAAAAA00,A,0x22,0xe8]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@GOT, kind: fixup_ppc_half16ds
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@GOT, kind: fixup_ppc_half16ds
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_DS target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_GOT16_DS target 0x0
+            ld 1, target@got(2)
+
+# CHECK-BE: addis 3, 2, target@got@ha       # encoding: [0x3c,0x62,A,A]
+# CHECK-LE: addis 3, 2, target@got@ha       # encoding: [A,A,0x62,0x3c]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@got@ha, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@got@ha, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_HA target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_GOT16_HA target 0x0
+            addis 3, 2, target@got@ha
+
+# CHECK-BE: addi 4, 3, target@got@l         # encoding: [0x38,0x83,A,A]
+# CHECK-LE: addi 4, 3, target@got@l         # encoding: [A,A,0x83,0x38]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@got@l, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@got@l, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_LO target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_GOT16_LO target 0x0
+            addi 4, 3, target@got@l
+
+# CHECK-BE: addis 3, 2, target@got@h        # encoding: [0x3c,0x62,A,A]
+# CHECK-LE: addis 3, 2, target@got@h        # encoding: [A,A,0x62,0x3c]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@got@h, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@got@h, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_HI target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_GOT16_HI target 0x0
+            addis 3, 2, target@got@h
+
+# CHECK-BE: lwz 1, target@got@l(3)          # encoding: [0x80,0x23,A,A]
+# CHECK-LE: lwz 1, target@got@l(3)          # encoding: [A,A,0x23,0x80]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@got@l, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@got@l, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_LO target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_GOT16_LO target 0x0
+            lwz 1, target@got@l(3)
+
+# CHECK-BE: ld 1, target@got@l(3)           # encoding: [0xe8,0x23,A,0bAAAAAA00]
+# CHECK-LE: ld 1, target@got@l(3)           # encoding: [0bAAAAAA00,A,0x23,0xe8]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@got@l, kind: fixup_ppc_half16ds
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@got@l, kind: fixup_ppc_half16ds
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_LO_DS target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_GOT16_LO_DS target 0x0
+            ld 1, target@got@l(3)
 
diff --git a/test/MC/PowerPC/ppc64-fixups.s b/test/MC/PowerPC/ppc64-fixups.s
index a075066..d3769f5 100644
--- a/test/MC/PowerPC/ppc64-fixups.s
+++ b/test/MC/PowerPC/ppc64-fixups.s
@@ -1,448 +1,713 @@
 
-# RUN: llvm-mc -triple powerpc64-unknown-unknown --show-encoding %s | FileCheck %s
+# RUN: llvm-mc -triple powerpc64-unknown-unknown --show-encoding %s | FileCheck -check-prefix=CHECK-BE %s
+# RUN: llvm-mc -triple powerpc64le-unknown-unknown --show-encoding %s | FileCheck -check-prefix=CHECK-LE %s
 
 # RUN: llvm-mc -triple powerpc64-unknown-unknown -filetype=obj %s | \
-# RUN: llvm-readobj -r | FileCheck %s -check-prefix=CHECK-REL
-
-# CHECK: b target                        # encoding: [0b010010AA,A,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_br24
-# CHECK-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_REL24 target 0x0
-         b target
-
-# CHECK: ba target                       # encoding: [0b010010AA,A,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_br24abs
-# CHECK-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_ADDR24 target 0x0
-         ba target
-
-# CHECK: beq 0, target                   # encoding: [0x41,0x82,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
-# CHECK-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_REL14 target 0x0
-         beq target
-
-# CHECK: beqa 0, target                  # encoding: [0x41,0x82,A,0bAAAAAA10]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
-# CHECK-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_ADDR14 target 0x0
-         beqa target
-
-
-# CHECK: li 3, target@l                  # encoding: [0x38,0x60,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@l, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO target 0x0
-         li 3, target@l
-
-# CHECK: addis 3, 3, target@ha           # encoding: [0x3c,0x63,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@ha, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HA target 0x0
-         addis 3, 3, target@ha
-
-# CHECK: lis 3, target@ha                # encoding: [0x3c,0x60,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@ha, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HA target 0x0
-         lis 3, target@ha
-
-# CHECK: addi 4, 3, target@l             # encoding: [0x38,0x83,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@l, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO target 0x0
-         addi 4, 3, target@l
-
-# CHECK: li 3, target@ha                 # encoding: [0x38,0x60,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@ha, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HA target 0x0
-         li 3, target@ha
-
-# CHECK: lis 3, target@l                 # encoding: [0x3c,0x60,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@l, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO target 0x0
-         lis 3, target@l
-
-# CHECK: li 3, target@h                  # encoding: [0x38,0x60,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@h, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HI target 0x0
-         li 3, target@h
-
-# CHECK: lis 3, target@h                  # encoding: [0x3c,0x60,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@h, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HI target 0x0
-         lis 3, target@h
-
-# CHECK: li 3, target@higher             # encoding: [0x38,0x60,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@higher, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HIGHER target 0x0
-         li 3, target@higher
-
-# CHECK: lis 3, target@highest           # encoding: [0x3c,0x60,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@highest, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HIGHEST target 0x0
-         lis 3, target@highest
-
-# CHECK: li 3, target@highera            # encoding: [0x38,0x60,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@highera, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HIGHERA target 0x0
-         li 3, target@highera
-
-# CHECK: lis 3, target@highesta          # encoding: [0x3c,0x60,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@highesta, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HIGHESTA target 0x0
-         lis 3, target@highesta
-
-# CHECK: lwz 1, target@l(3)              # encoding: [0x80,0x23,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@l, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO target 0x0
-         lwz 1, target@l(3)
-
-# CHECK: lwz 1, target(3)                # encoding: [0x80,0x23,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16 target 0x0
-         lwz 1, target(3)
-
-# CHECK: ld 1, target@l(3)               # encoding: [0xe8,0x23,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@l, kind: fixup_ppc_half16ds
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO_DS target 0x0
-         ld 1, target@l(3)
-
-# CHECK: ld 1, target(3)                 # encoding: [0xe8,0x23,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target, kind: fixup_ppc_half16ds
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_DS target 0x0
-         ld 1, target(3)
+# RUN: llvm-readobj -r | FileCheck %s -check-prefix=CHECK-BE-REL
+# RUN: llvm-mc -triple powerpc64le-unknown-unknown -filetype=obj %s | \
+# RUN: llvm-readobj -r | FileCheck %s -check-prefix=CHECK-LE-REL
+
+# CHECK-BE: b target                        # encoding: [0b010010AA,A,A,0bAAAAAA00]
+# CHECK-LE: b target                        # encoding: [0bAAAAAA00,A,A,0b010010AA]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_br24
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_br24
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_REL24 target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_REL24 target 0x0
+            b target
+
+# CHECK-BE: ba target                       # encoding: [0b010010AA,A,A,0bAAAAAA10]
+# CHECK-LE: ba target                       # encoding: [0bAAAAAA10,A,A,0b010010AA]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_br24abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_br24abs
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_ADDR24 target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_ADDR24 target 0x0
+            ba target
+
+# CHECK-BE: beq 0, target                   # encoding: [0x41,0x82,A,0bAAAAAA00]
+# CHECK-LE: beq 0, target                   # encoding: [0bAAAAAA00,A,0x82,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_REL14 target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_REL14 target 0x0
+            beq target
+
+# CHECK-BE: beqa 0, target                  # encoding: [0x41,0x82,A,0bAAAAAA10]
+# CHECK-LE: beqa 0, target                  # encoding: [0bAAAAAA10,A,0x82,0x41]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_ADDR14 target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_ADDR14 target 0x0
+            beqa target
+
+
+# CHECK-BE: li 3, target@l                  # encoding: [0x38,0x60,A,A]
+# CHECK-LE: li 3, target@l                  # encoding: [A,A,0x60,0x38]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@l, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@l, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_ADDR16_LO target 0x0
+            li 3, target@l
+
+# CHECK-BE: addis 3, 3, target@ha           # encoding: [0x3c,0x63,A,A]
+# CHECK-LE: addis 3, 3, target@ha           # encoding: [A,A,0x63,0x3c]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@ha, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@ha, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HA target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_ADDR16_HA target 0x0
+            addis 3, 3, target@ha
+
+# CHECK-BE: lis 3, target@ha                # encoding: [0x3c,0x60,A,A]
+# CHECK-LE: lis 3, target@ha                # encoding: [A,A,0x60,0x3c]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@ha, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@ha, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HA target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_ADDR16_HA target 0x0
+            lis 3, target@ha
+
+# CHECK-BE: addi 4, 3, target@l             # encoding: [0x38,0x83,A,A]
+# CHECK-LE: addi 4, 3, target@l             # encoding: [A,A,0x83,0x38]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@l, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@l, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_ADDR16_LO target 0x0
+            addi 4, 3, target@l
+
+# CHECK-BE: li 3, target@ha                 # encoding: [0x38,0x60,A,A]
+# CHECK-LE: li 3, target@ha                 # encoding: [A,A,0x60,0x38]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@ha, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@ha, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HA target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_ADDR16_HA target 0x0
+            li 3, target@ha
+
+# CHECK-BE: lis 3, target@l                 # encoding: [0x3c,0x60,A,A]
+# CHECK-LE: lis 3, target@l                 # encoding: [A,A,0x60,0x3c]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@l, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@l, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_ADDR16_LO target 0x0
+            lis 3, target@l
+
+# CHECK-BE: li 3, target@h                  # encoding: [0x38,0x60,A,A]
+# CHECK-LE: li 3, target@h                  # encoding: [A,A,0x60,0x38]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@h, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@h, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HI target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_ADDR16_HI target 0x0
+            li 3, target@h
+
+# CHECK-BE: lis 3, target@h                  # encoding: [0x3c,0x60,A,A]
+# CHECK-LE: lis 3, target@h                  # encoding: [A,A,0x60,0x3c]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@h, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@h, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HI target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_ADDR16_HI target 0x0
+            lis 3, target@h
+
+# CHECK-BE: li 3, target@higher             # encoding: [0x38,0x60,A,A]
+# CHECK-LE: li 3, target@higher             # encoding: [A,A,0x60,0x38]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@higher, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@higher, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HIGHER target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_ADDR16_HIGHER target 0x0
+            li 3, target@higher
+
+# CHECK-BE: lis 3, target@highest           # encoding: [0x3c,0x60,A,A]
+# CHECK-LE: lis 3, target@highest           # encoding: [A,A,0x60,0x3c]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@highest, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@highest, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HIGHEST target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_ADDR16_HIGHEST target 0x0
+            lis 3, target@highest
+
+# CHECK-BE: li 3, target@highera            # encoding: [0x38,0x60,A,A]
+# CHECK-LE: li 3, target@highera            # encoding: [A,A,0x60,0x38]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@highera, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@highera, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HIGHERA target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_ADDR16_HIGHERA target 0x0
+            li 3, target@highera
+
+# CHECK-BE: lis 3, target@highesta          # encoding: [0x3c,0x60,A,A]
+# CHECK-LE: lis 3, target@highesta          # encoding: [A,A,0x60,0x3c]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@highesta, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@highesta, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HIGHESTA target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_ADDR16_HIGHESTA target 0x0
+            lis 3, target@highesta
+
+# CHECK-BE: lwz 1, target@l(3)              # encoding: [0x80,0x23,A,A]
+# CHECK-LE: lwz 1, target@l(3)              # encoding: [A,A,0x23,0x80]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@l, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@l, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_ADDR16_LO target 0x0
+            lwz 1, target@l(3)
+
+# CHECK-BE: lwz 1, target(3)                # encoding: [0x80,0x23,A,A]
+# CHECK-LE: lwz 1, target(3)                # encoding: [A,A,0x23,0x80]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16 target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_ADDR16 target 0x0
+            lwz 1, target(3)
+
+# CHECK-BE: ld 1, target@l(3)               # encoding: [0xe8,0x23,A,0bAAAAAA00]
+# CHECK-LE: ld 1, target@l(3)               # encoding: [0bAAAAAA00,A,0x23,0xe8]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@l, kind: fixup_ppc_half16ds
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@l, kind: fixup_ppc_half16ds
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO_DS target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_ADDR16_LO_DS target 0x0
+            ld 1, target@l(3)
+
+# CHECK-BE: ld 1, target(3)                 # encoding: [0xe8,0x23,A,0bAAAAAA00]
+# CHECK-LE: ld 1, target(3)                 # encoding: [0bAAAAAA00,A,0x23,0xe8]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target, kind: fixup_ppc_half16ds
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target, kind: fixup_ppc_half16ds
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_DS target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_ADDR16_DS target 0x0
+            ld 1, target(3)
 
 base:
-# CHECK: lwz 1, target-base(3)           # encoding: [0x80,0x23,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target-base, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_REL16 target 0x2
-         lwz 1, target-base(3)
-
-# CHECK: li 3, target-base@h             # encoding: [0x38,0x60,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target-base@h, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_REL16_HI target 0x6
-         li 3, target-base@h
-
-# CHECK: li 3, target-base@l             # encoding: [0x38,0x60,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target-base@l, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_REL16_LO target 0xA
-         li 3, target-base@l
-
-# CHECK: li 3, target-base@ha            # encoding: [0x38,0x60,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target-base@ha, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_REL16_HA target 0xE
-         li 3, target-base@ha
-
-# CHECK: ori 3, 3, target@l              # encoding: [0x60,0x63,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@l, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO target 0x0
-         ori 3, 3, target@l
-
-# CHECK: oris 3, 3, target@h             # encoding: [0x64,0x63,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@h, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HI target 0x0
-         oris 3, 3, target@h
-
-# CHECK: ld 1, target@toc(2)             # encoding: [0xe8,0x22,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@toc, kind: fixup_ppc_half16ds
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_TOC16_DS target 0x0
-         ld 1, target@toc(2)
-
-# CHECK: addis 3, 2, target@toc@ha       # encoding: [0x3c,0x62,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@toc@ha, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_TOC16_HA target 0x0
-         addis 3, 2, target@toc@ha
-
-# CHECK: addi 4, 3, target@toc@l         # encoding: [0x38,0x83,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@toc@l, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_TOC16_LO target 0x0
-         addi 4, 3, target@toc@l
-
-# CHECK: addis 3, 2, target@toc@h        # encoding: [0x3c,0x62,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@toc@h, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_TOC16_HI target 0x0
-         addis 3, 2, target@toc@h
-
-# CHECK: lwz 1, target@toc@l(3)          # encoding: [0x80,0x23,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@toc@l, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_TOC16_LO target 0x0
-         lwz 1, target@toc@l(3)
-
-# CHECK: ld 1, target@toc@l(3)           # encoding: [0xe8,0x23,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@toc@l, kind: fixup_ppc_half16ds
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_TOC16_LO_DS target 0x0
-         ld 1, target@toc@l(3)
-
-# CHECK: addi 4, 3, target@GOT           # encoding: [0x38,0x83,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@GOT, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16 target 0x0
-         addi 4, 3, target@got  
-
-# CHECK: ld 1, target@GOT(2)             # encoding: [0xe8,0x22,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@GOT, kind: fixup_ppc_half16ds
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_DS target 0x0
-         ld 1, target@got(2)
-
-# CHECK: addis 3, 2, target@got@ha       # encoding: [0x3c,0x62,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@got@ha, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_HA target 0x0
-         addis 3, 2, target@got@ha
-
-# CHECK: addi 4, 3, target@got@l         # encoding: [0x38,0x83,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@got@l, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_LO target 0x0
-         addi 4, 3, target@got@l
-
-# CHECK: addis 3, 2, target@got@h        # encoding: [0x3c,0x62,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@got@h, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_HI target 0x0
-         addis 3, 2, target@got@h
-
-# CHECK: lwz 1, target@got@l(3)          # encoding: [0x80,0x23,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@got@l, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_LO target 0x0
-         lwz 1, target@got@l(3)
-
-# CHECK: ld 1, target@got@l(3)           # encoding: [0xe8,0x23,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@got@l, kind: fixup_ppc_half16ds
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_LO_DS target 0x0
-         ld 1, target@got@l(3)
-
-
-# CHECK: addis 3, 2, target@tprel@ha     # encoding: [0x3c,0x62,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@tprel@ha, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_HA target 0x0
-         addis 3, 2, target@tprel@ha
-
-# CHECK: addi 3, 3, target@tprel@l       # encoding: [0x38,0x63,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@tprel@l, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_LO target 0x0
-         addi 3, 3, target@tprel@l
-
-# CHECK: addi 3, 3, target@tprel         # encoding: [0x38,0x63,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@tprel, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16 target 0x0
-         addi 3, 3, target@tprel
-
-# CHECK: addi 3, 3, target@tprel@h       # encoding: [0x38,0x63,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@tprel@h, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_HI target 0x0
-         addi 3, 3, target@tprel@h
-
-# CHECK: addi 3, 3, target@tprel@higher  # encoding: [0x38,0x63,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@tprel@higher, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_HIGHER target 0x0
-         addi 3, 3, target@tprel@higher
-
-# CHECK: addis 3, 2, target@tprel@highest # encoding: [0x3c,0x62,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@tprel@highest, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_HIGHEST target 0x0
-         addis 3, 2, target@tprel@highest
-
-# CHECK: addi 3, 3, target@tprel@highera  # encoding: [0x38,0x63,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@tprel@highera, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_HIGHERA target 0x0
-         addi 3, 3, target@tprel@highera
-
-# CHECK: addis 3, 2, target@tprel@highesta # encoding: [0x3c,0x62,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@tprel@highesta, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_HIGHESTA target 0x0
-         addis 3, 2, target@tprel@highesta
-
-# CHECK: ld 1, target@tprel@l(3)         # encoding: [0xe8,0x23,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@tprel@l, kind: fixup_ppc_half16ds
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_LO_DS target 0x0
-         ld 1, target@tprel@l(3)
-
-# CHECK: ld 1, target@tprel(3)           # encoding: [0xe8,0x23,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@tprel, kind: fixup_ppc_half16ds
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_DS target 0x0
-         ld 1, target@tprel(3)
-
-# CHECK: addis 3, 2, target@dtprel@ha    # encoding: [0x3c,0x62,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@dtprel@ha, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_HA target 0x0
-         addis 3, 2, target@dtprel@ha
-
-# CHECK: addi 3, 3, target@dtprel@l      # encoding: [0x38,0x63,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@dtprel@l, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_LO target 0x0
-         addi 3, 3, target@dtprel@l
-
-# CHECK: addi 3, 3, target@dtprel         # encoding: [0x38,0x63,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@dtprel, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16 target 0x0
-         addi 3, 3, target@dtprel
-
-# CHECK: addi 3, 3, target@dtprel@h       # encoding: [0x38,0x63,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@dtprel@h, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_HI target 0x0
-         addi 3, 3, target@dtprel@h
-
-# CHECK: addi 3, 3, target@dtprel@higher  # encoding: [0x38,0x63,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@dtprel@higher, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_HIGHER target 0x0
-         addi 3, 3, target@dtprel@higher
-
-# CHECK: addis 3, 2, target@dtprel@highest # encoding: [0x3c,0x62,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@dtprel@highest, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_HIGHEST target 0x0
-         addis 3, 2, target@dtprel@highest
-
-# CHECK: addi 3, 3, target@dtprel@highera  # encoding: [0x38,0x63,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@dtprel@highera, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_HIGHERA target 0x0
-         addi 3, 3, target@dtprel@highera
-
-# CHECK: addis 3, 2, target@dtprel@highesta # encoding: [0x3c,0x62,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@dtprel@highesta, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_HIGHESTA target 0x0
-         addis 3, 2, target@dtprel@highesta
-
-# CHECK: ld 1, target@dtprel@l(3)        # encoding: [0xe8,0x23,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@dtprel@l, kind: fixup_ppc_half16ds
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_LO_DS target 0x0
-         ld 1, target@dtprel@l(3)
-
-# CHECK: ld 1, target@dtprel(3)          # encoding: [0xe8,0x23,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@dtprel, kind: fixup_ppc_half16ds
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_DS target 0x0
-         ld 1, target@dtprel(3)
-
-
-# CHECK: addis 3, 2, target@got@tprel@ha # encoding: [0x3c,0x62,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@got@tprel@ha, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TPREL16_HA target 0x0
-         addis 3, 2, target@got@tprel@ha
-
-# CHECK: ld 1, target@got@tprel@l(3)     # encoding: [0xe8,0x23,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@got@tprel@l, kind: fixup_ppc_half16ds
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TPREL16_LO_DS target 0x0
-         ld 1, target@got@tprel@l(3)
-
-# CHECK: addis 3, 2, target@got@tprel@h  # encoding: [0x3c,0x62,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@got@tprel@h, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TPREL16_HI target 0x0
-         addis 3, 2, target@got@tprel@h
-
-# CHECK: addis 3, 2, target@got@tprel@l  # encoding: [0x3c,0x62,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@got@tprel@l, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TPREL16_LO_DS target 0x0
-         addis 3, 2, target@got@tprel@l
-
-# CHECK: addis 3, 2, target@got@tprel    # encoding: [0x3c,0x62,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@got@tprel, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TPREL16_DS target 0x0
-         addis 3, 2, target@got@tprel
-
-# CHECK: ld 1, target@got@tprel(3)       # encoding: [0xe8,0x23,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@got@tprel, kind: fixup_ppc_half16ds
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TPREL16_DS target 0x0
-         ld 1, target@got@tprel(3)
-
-# CHECK: addis 3, 2, target@got@dtprel@ha # encoding: [0x3c,0x62,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@got@dtprel@ha, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_DTPREL16_HA target 0x0
-         addis 3, 2, target@got@dtprel@ha
-
-# CHECK: ld 1, target@got@dtprel@l(3)    # encoding: [0xe8,0x23,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@got@dtprel@l, kind: fixup_ppc_half16ds
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_DTPREL16_LO_DS target 0x0
-         ld 1, target@got@dtprel@l(3)
-
-# CHECK: addis 3, 2, target@got@dtprel@h # encoding: [0x3c,0x62,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@got@dtprel@h, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_DTPREL16_HI target 0x0
-         addis 3, 2, target@got@dtprel@h
-
-# CHECK: addis 3, 2, target@got@dtprel@l # encoding: [0x3c,0x62,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@got@dtprel@l, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_DTPREL16_LO_DS target 0x0
-         addis 3, 2, target@got@dtprel@l
-
-# CHECK: addis 3, 2, target@got@dtprel   # encoding: [0x3c,0x62,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@got@dtprel, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_DTPREL16_DS target 0x0
-         addis 3, 2, target@got@dtprel
-
-# CHECK: ld 1, target@got@dtprel(3)      # encoding: [0xe8,0x23,A,0bAAAAAA00]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@got@dtprel, kind: fixup_ppc_half16ds
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_DTPREL16_DS target 0x0
-         ld 1, target@got@dtprel(3)
-
-# CHECK: addis 3, 2, target@got@tlsgd@ha # encoding: [0x3c,0x62,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@got@tlsgd@ha, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSGD16_HA target 0x0
-         addis 3, 2, target@got@tlsgd@ha
-
-# CHECK: addi 3, 3, target@got@tlsgd@l   # encoding: [0x38,0x63,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@got@tlsgd@l, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSGD16_LO target 0x0
-         addi 3, 3, target@got@tlsgd@l
-
-# CHECK: addi 3, 3, target@got@tlsgd@h   # encoding: [0x38,0x63,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@got@tlsgd@h, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSGD16_HI target 0x0
-         addi 3, 3, target@got@tlsgd@h
-
-# CHECK: addi 3, 3, target@got@tlsgd     # encoding: [0x38,0x63,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@got@tlsgd, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSGD16 target 0x0
-         addi 3, 3, target@got@tlsgd
-
-
-# CHECK: addis 3, 2, target@got@tlsld@ha # encoding: [0x3c,0x62,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@got@tlsld@ha, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSLD16_HA target 0x0
-         addis 3, 2, target@got@tlsld@ha
-
-# CHECK: addi 3, 3, target@got@tlsld@l   # encoding: [0x38,0x63,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@got@tlsld@l, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSLD16_LO target 0x0
-         addi 3, 3, target@got@tlsld@l
-
-# CHECK: addi 3, 3, target@got@tlsld@h   # encoding: [0x38,0x63,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@got@tlsld@h, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSLD16_HI target 0x0
-         addi 3, 3, target@got@tlsld@h
-
-# CHECK: addi 3, 3, target@got@tlsld     # encoding: [0x38,0x63,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@got@tlsld, kind: fixup_ppc_half16
-# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSLD16 target 0x0
-         addi 3, 3, target@got@tlsld
-
-# CHECK: bl __tls_get_addr(target@tlsgd) # encoding: [0b010010BB,B,B,0bBBBBBB01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target@tlsgd, kind: fixup_ppc_nofixup
-# CHECK-NEXT:                            #   fixup B - offset: 0, value: __tls_get_addr, kind: fixup_ppc_br24
-# CHECK-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_TLSGD target 0x0
-# CHECK-REL-NEXT:                        0x{{[0-9A-F]*[048C]}} R_PPC64_REL24 __tls_get_addr 0x0
-         bl __tls_get_addr(target@tlsgd)
-
-# CHECK: bl __tls_get_addr(target@tlsld) # encoding: [0b010010BB,B,B,0bBBBBBB01]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target@tlsld, kind: fixup_ppc_nofixup
-# CHECK-NEXT:                            #   fixup B - offset: 0, value: __tls_get_addr, kind: fixup_ppc_br24
-# CHECK-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_TLSLD target 0x0
-# CHECK-REL-NEXT:                        0x{{[0-9A-F]*[048C]}} R_PPC64_REL24 __tls_get_addr 0x0
-         bl __tls_get_addr(target@tlsld)
-
-# CHECK: add 3, 4, target@tls            # encoding: [0x7c,0x64,0x6a,0x14]
-# CHECK-NEXT:                            #   fixup A - offset: 0, value: target@tls, kind: fixup_ppc_nofixup
-# CHECK-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_TLS target 0x0
-         add 3, 4, target@tls
-
+# CHECK-BE: lwz 1, target-base(3)           # encoding: [0x80,0x23,A,A]
+# CHECK-LE: lwz 1, target-base(3)           # encoding: [A,A,0x23,0x80]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target-base, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target-base, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_REL16 target 0x2
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_REL16 target 0x0
+            lwz 1, target-base(3)
+
+# CHECK-BE: li 3, target-base@h             # encoding: [0x38,0x60,A,A]
+# CHECK-LE: li 3, target-base@h             # encoding: [A,A,0x60,0x38]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target-base@h, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target-base@h, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_REL16_HI target 0x6
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_REL16_HI target 0x4
+            li 3, target-base@h
+
+# CHECK-BE: li 3, target-base@l             # encoding: [0x38,0x60,A,A]
+# CHECK-LE: li 3, target-base@l             # encoding: [A,A,0x60,0x38]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target-base@l, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target-base@l, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_REL16_LO target 0xA
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_REL16_LO target 0x8
+            li 3, target-base@l
+
+# CHECK-BE: li 3, target-base@ha            # encoding: [0x38,0x60,A,A]
+# CHECK-LE: li 3, target-base@ha            # encoding: [A,A,0x60,0x38]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target-base@ha, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target-base@ha, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_REL16_HA target 0xE
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_REL16_HA target 0xC
+            li 3, target-base@ha
+
+# CHECK-BE: ori 3, 3, target@l              # encoding: [0x60,0x63,A,A]
+# CHECK-LE: ori 3, 3, target@l              # encoding: [A,A,0x63,0x60]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@l, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@l, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_ADDR16_LO target 0x0
+            ori 3, 3, target@l
+
+# CHECK-BE: oris 3, 3, target@h             # encoding: [0x64,0x63,A,A]
+# CHECK-LE: oris 3, 3, target@h             # encoding: [A,A,0x63,0x64]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@h, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@h, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HI target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_ADDR16_HI target 0x0
+            oris 3, 3, target@h
+
+# CHECK-BE: ld 1, target@toc(2)             # encoding: [0xe8,0x22,A,0bAAAAAA00]
+# CHECK-LE: ld 1, target@toc(2)             # encoding: [0bAAAAAA00,A,0x22,0xe8]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@toc, kind: fixup_ppc_half16ds
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@toc, kind: fixup_ppc_half16ds
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_TOC16_DS target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_TOC16_DS target 0x0
+            ld 1, target@toc(2)
+
+# CHECK-BE: addis 3, 2, target@toc@ha       # encoding: [0x3c,0x62,A,A]
+# CHECK-LE: addis 3, 2, target@toc@ha       # encoding: [A,A,0x62,0x3c]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@toc@ha, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@toc@ha, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_TOC16_HA target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_TOC16_HA target 0x0
+            addis 3, 2, target@toc@ha
+
+# CHECK-BE: addi 4, 3, target@toc@l         # encoding: [0x38,0x83,A,A]
+# CHECK-LE: addi 4, 3, target@toc@l         # encoding: [A,A,0x83,0x38]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@toc@l, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@toc@l, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_TOC16_LO target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_TOC16_LO target 0x0
+            addi 4, 3, target@toc@l
+
+# CHECK-BE: addis 3, 2, target@toc@h        # encoding: [0x3c,0x62,A,A]
+# CHECK-LE: addis 3, 2, target@toc@h        # encoding: [A,A,0x62,0x3c]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@toc@h, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@toc@h, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_TOC16_HI target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_TOC16_HI target 0x0
+            addis 3, 2, target@toc@h
+
+# CHECK-BE: lwz 1, target@toc@l(3)          # encoding: [0x80,0x23,A,A]
+# CHECK-LE: lwz 1, target@toc@l(3)          # encoding: [A,A,0x23,0x80]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@toc@l, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@toc@l, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_TOC16_LO target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_TOC16_LO target 0x0
+            lwz 1, target@toc@l(3)
+
+# CHECK-BE: ld 1, target@toc@l(3)           # encoding: [0xe8,0x23,A,0bAAAAAA00]
+# CHECK-LE: ld 1, target@toc@l(3)           # encoding: [0bAAAAAA00,A,0x23,0xe8]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@toc@l, kind: fixup_ppc_half16ds
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@toc@l, kind: fixup_ppc_half16ds
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_TOC16_LO_DS target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_TOC16_LO_DS target 0x0
+            ld 1, target@toc@l(3)
+
+# CHECK-BE: addi 4, 3, target@GOT           # encoding: [0x38,0x83,A,A]
+# CHECK-LE: addi 4, 3, target@GOT           # encoding: [A,A,0x83,0x38]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@GOT, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@GOT, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16 target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_GOT16 target 0x0
+            addi 4, 3, target@got
+
+# CHECK-BE: ld 1, target@GOT(2)             # encoding: [0xe8,0x22,A,0bAAAAAA00]
+# CHECK-LE: ld 1, target@GOT(2)             # encoding: [0bAAAAAA00,A,0x22,0xe8]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@GOT, kind: fixup_ppc_half16ds
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@GOT, kind: fixup_ppc_half16ds
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_DS target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_GOT16_DS target 0x0
+            ld 1, target@got(2)
+
+# CHECK-BE: addis 3, 2, target@got@ha       # encoding: [0x3c,0x62,A,A]
+# CHECK-LE: addis 3, 2, target@got@ha       # encoding: [A,A,0x62,0x3c]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@got@ha, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@got@ha, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_HA target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_GOT16_HA target 0x0
+            addis 3, 2, target@got@ha
+
+# CHECK-BE: addi 4, 3, target@got@l         # encoding: [0x38,0x83,A,A]
+# CHECK-LE: addi 4, 3, target@got@l         # encoding: [A,A,0x83,0x38]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@got@l, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@got@l, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_LO target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_GOT16_LO target 0x0
+            addi 4, 3, target@got@l
+
+# CHECK-BE: addis 3, 2, target@got@h        # encoding: [0x3c,0x62,A,A]
+# CHECK-LE: addis 3, 2, target@got@h        # encoding: [A,A,0x62,0x3c]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@got@h, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@got@h, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_HI target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_GOT16_HI target 0x0
+            addis 3, 2, target@got@h
+
+# CHECK-BE: lwz 1, target@got@l(3)          # encoding: [0x80,0x23,A,A]
+# CHECK-LE: lwz 1, target@got@l(3)          # encoding: [A,A,0x23,0x80]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@got@l, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@got@l, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_LO target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_GOT16_LO target 0x0
+            lwz 1, target@got@l(3)
+
+# CHECK-BE: ld 1, target@got@l(3)           # encoding: [0xe8,0x23,A,0bAAAAAA00]
+# CHECK-LE: ld 1, target@got@l(3)           # encoding: [0bAAAAAA00,A,0x23,0xe8]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@got@l, kind: fixup_ppc_half16ds
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@got@l, kind: fixup_ppc_half16ds
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_LO_DS target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_GOT16_LO_DS target 0x0
+            ld 1, target@got@l(3)
+
+
+# CHECK-BE: addis 3, 2, target@tprel@ha     # encoding: [0x3c,0x62,A,A]
+# CHECK-LE: addis 3, 2, target@tprel@ha     # encoding: [A,A,0x62,0x3c]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@tprel@ha, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@tprel@ha, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_HA target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_TPREL16_HA target 0x0
+            addis 3, 2, target@tprel@ha
+
+# CHECK-BE: addi 3, 3, target@tprel@l       # encoding: [0x38,0x63,A,A]
+# CHECK-LE: addi 3, 3, target@tprel@l       # encoding: [A,A,0x63,0x38]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@tprel@l, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@tprel@l, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_LO target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_TPREL16_LO target 0x0
+            addi 3, 3, target@tprel@l
+
+# CHECK-BE: addi 3, 3, target@tprel         # encoding: [0x38,0x63,A,A]
+# CHECK-LE: addi 3, 3, target@tprel         # encoding: [A,A,0x63,0x38]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@tprel, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@tprel, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16 target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_TPREL16 target 0x0
+            addi 3, 3, target@tprel
+
+# CHECK-BE: addi 3, 3, target@tprel@h       # encoding: [0x38,0x63,A,A]
+# CHECK-LE: addi 3, 3, target@tprel@h       # encoding: [A,A,0x63,0x38]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@tprel@h, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@tprel@h, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_HI target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_TPREL16_HI target 0x0
+            addi 3, 3, target@tprel@h
+
+# CHECK-BE: addi 3, 3, target@tprel@higher  # encoding: [0x38,0x63,A,A]
+# CHECK-LE: addi 3, 3, target@tprel@higher  # encoding: [A,A,0x63,0x38]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@tprel@higher, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@tprel@higher, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_HIGHER target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_TPREL16_HIGHER target 0x0
+            addi 3, 3, target@tprel@higher
+
+# CHECK-BE: addis 3, 2, target@tprel@highest # encoding: [0x3c,0x62,A,A]
+# CHECK-LE: addis 3, 2, target@tprel@highest # encoding: [A,A,0x62,0x3c]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@tprel@highest, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@tprel@highest, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_HIGHEST target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_TPREL16_HIGHEST target 0x0
+            addis 3, 2, target@tprel@highest
+
+# CHECK-BE: addi 3, 3, target@tprel@highera  # encoding: [0x38,0x63,A,A]
+# CHECK-LE: addi 3, 3, target@tprel@highera  # encoding: [A,A,0x63,0x38]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@tprel@highera, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@tprel@highera, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_HIGHERA target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_TPREL16_HIGHERA target 0x0
+            addi 3, 3, target@tprel@highera
+
+# CHECK-BE: addis 3, 2, target@tprel@highesta # encoding: [0x3c,0x62,A,A]
+# CHECK-LE: addis 3, 2, target@tprel@highesta # encoding: [A,A,0x62,0x3c]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@tprel@highesta, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@tprel@highesta, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_HIGHESTA target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_TPREL16_HIGHESTA target 0x0
+            addis 3, 2, target@tprel@highesta
+
+# CHECK-BE: ld 1, target@tprel@l(3)         # encoding: [0xe8,0x23,A,0bAAAAAA00]
+# CHECK-LE: ld 1, target@tprel@l(3)         # encoding: [0bAAAAAA00,A,0x23,0xe8]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@tprel@l, kind: fixup_ppc_half16ds
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@tprel@l, kind: fixup_ppc_half16ds
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_LO_DS target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_TPREL16_LO_DS target 0x0
+            ld 1, target@tprel@l(3)
+
+# CHECK-BE: ld 1, target@tprel(3)           # encoding: [0xe8,0x23,A,0bAAAAAA00]
+# CHECK-LE: ld 1, target@tprel(3)           # encoding: [0bAAAAAA00,A,0x23,0xe8]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@tprel, kind: fixup_ppc_half16ds
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@tprel, kind: fixup_ppc_half16ds
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_DS target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_TPREL16_DS target 0x0
+            ld 1, target@tprel(3)
+
+# CHECK-BE: addis 3, 2, target@dtprel@ha    # encoding: [0x3c,0x62,A,A]
+# CHECK-LE: addis 3, 2, target@dtprel@ha    # encoding: [A,A,0x62,0x3c]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@dtprel@ha, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@dtprel@ha, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_HA target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_DTPREL16_HA target 0x0
+            addis 3, 2, target@dtprel@ha
+
+# CHECK-BE: addi 3, 3, target@dtprel@l      # encoding: [0x38,0x63,A,A]
+# CHECK-LE: addi 3, 3, target@dtprel@l      # encoding: [A,A,0x63,0x38]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@dtprel@l, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@dtprel@l, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_LO target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_DTPREL16_LO target 0x0
+            addi 3, 3, target@dtprel@l
+
+# CHECK-BE: addi 3, 3, target@dtprel         # encoding: [0x38,0x63,A,A]
+# CHECK-LE: addi 3, 3, target@dtprel         # encoding: [A,A,0x63,0x38]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@dtprel, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@dtprel, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16 target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_DTPREL16 target 0x0
+            addi 3, 3, target@dtprel
+
+# CHECK-BE: addi 3, 3, target@dtprel@h       # encoding: [0x38,0x63,A,A]
+# CHECK-LE: addi 3, 3, target@dtprel@h       # encoding: [A,A,0x63,0x38]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@dtprel@h, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@dtprel@h, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_HI target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_DTPREL16_HI target 0x0
+            addi 3, 3, target@dtprel@h
+
+# CHECK-BE: addi 3, 3, target@dtprel@higher  # encoding: [0x38,0x63,A,A]
+# CHECK-LE: addi 3, 3, target@dtprel@higher  # encoding: [A,A,0x63,0x38]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@dtprel@higher, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@dtprel@higher, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_HIGHER target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_DTPREL16_HIGHER target 0x0
+            addi 3, 3, target@dtprel@higher
+
+# CHECK-BE: addis 3, 2, target@dtprel@highest # encoding: [0x3c,0x62,A,A]
+# CHECK-LE: addis 3, 2, target@dtprel@highest # encoding: [A,A,0x62,0x3c]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@dtprel@highest, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@dtprel@highest, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_HIGHEST target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_DTPREL16_HIGHEST target 0x0
+            addis 3, 2, target@dtprel@highest
+
+# CHECK-BE: addi 3, 3, target@dtprel@highera  # encoding: [0x38,0x63,A,A]
+# CHECK-LE: addi 3, 3, target@dtprel@highera  # encoding: [A,A,0x63,0x38]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@dtprel@highera, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@dtprel@highera, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_HIGHERA target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_DTPREL16_HIGHERA target 0x0
+            addi 3, 3, target@dtprel@highera
+
+# CHECK-BE: addis 3, 2, target@dtprel@highesta # encoding: [0x3c,0x62,A,A]
+# CHECK-LE: addis 3, 2, target@dtprel@highesta # encoding: [A,A,0x62,0x3c]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@dtprel@highesta, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@dtprel@highesta, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_HIGHESTA target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_DTPREL16_HIGHESTA target 0x0
+            addis 3, 2, target@dtprel@highesta
+
+# CHECK-BE: ld 1, target@dtprel@l(3)        # encoding: [0xe8,0x23,A,0bAAAAAA00]
+# CHECK-LE: ld 1, target@dtprel@l(3)        # encoding: [0bAAAAAA00,A,0x23,0xe8]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@dtprel@l, kind: fixup_ppc_half16ds
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@dtprel@l, kind: fixup_ppc_half16ds
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_LO_DS target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_DTPREL16_LO_DS target 0x0
+            ld 1, target@dtprel@l(3)
+
+# CHECK-BE: ld 1, target@dtprel(3)          # encoding: [0xe8,0x23,A,0bAAAAAA00]
+# CHECK-LE: ld 1, target@dtprel(3)          # encoding: [0bAAAAAA00,A,0x23,0xe8]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@dtprel, kind: fixup_ppc_half16ds
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@dtprel, kind: fixup_ppc_half16ds
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_DS target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_DTPREL16_DS target 0x0
+            ld 1, target@dtprel(3)
+
+
+# CHECK-BE: addis 3, 2, target@got@tprel@ha # encoding: [0x3c,0x62,A,A]
+# CHECK-LE: addis 3, 2, target@got@tprel@ha # encoding: [A,A,0x62,0x3c]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@got@tprel@ha, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@got@tprel@ha, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TPREL16_HA target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_GOT_TPREL16_HA target 0x0
+            addis 3, 2, target@got@tprel@ha
+
+# CHECK-BE: ld 1, target@got@tprel@l(3)     # encoding: [0xe8,0x23,A,0bAAAAAA00]
+# CHECK-LE: ld 1, target@got@tprel@l(3)     # encoding: [0bAAAAAA00,A,0x23,0xe8]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@got@tprel@l, kind: fixup_ppc_half16ds
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@got@tprel@l, kind: fixup_ppc_half16ds
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TPREL16_LO_DS target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_GOT_TPREL16_LO_DS target 0x0
+            ld 1, target@got@tprel@l(3)
+
+# CHECK-BE: addis 3, 2, target@got@tprel@h  # encoding: [0x3c,0x62,A,A]
+# CHECK-LE: addis 3, 2, target@got@tprel@h  # encoding: [A,A,0x62,0x3c]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@got@tprel@h, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@got@tprel@h, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TPREL16_HI target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_GOT_TPREL16_HI target 0x0
+            addis 3, 2, target@got@tprel@h
+
+# CHECK-BE: addis 3, 2, target@got@tprel@l  # encoding: [0x3c,0x62,A,A]
+# CHECK-LE: addis 3, 2, target@got@tprel@l  # encoding: [A,A,0x62,0x3c]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@got@tprel@l, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@got@tprel@l, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TPREL16_LO_DS target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_GOT_TPREL16_LO_DS target 0x0
+            addis 3, 2, target@got@tprel@l
+
+# CHECK-BE: addis 3, 2, target@got@tprel    # encoding: [0x3c,0x62,A,A]
+# CHECK-LE: addis 3, 2, target@got@tprel    # encoding: [A,A,0x62,0x3c]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@got@tprel, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@got@tprel, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TPREL16_DS target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_GOT_TPREL16_DS target 0x0
+            addis 3, 2, target@got@tprel
+
+# CHECK-BE: ld 1, target@got@tprel(3)       # encoding: [0xe8,0x23,A,0bAAAAAA00]
+# CHECK-LE: ld 1, target@got@tprel(3)       # encoding: [0bAAAAAA00,A,0x23,0xe8]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@got@tprel, kind: fixup_ppc_half16ds
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@got@tprel, kind: fixup_ppc_half16ds
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TPREL16_DS target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_GOT_TPREL16_DS target 0x0
+            ld 1, target@got@tprel(3)
+
+# CHECK-BE: addis 3, 2, target@got@dtprel@ha # encoding: [0x3c,0x62,A,A]
+# CHECK-LE: addis 3, 2, target@got@dtprel@ha # encoding: [A,A,0x62,0x3c]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@got@dtprel@ha, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@got@dtprel@ha, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_DTPREL16_HA target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_GOT_DTPREL16_HA target 0x0
+            addis 3, 2, target@got@dtprel@ha
+
+# CHECK-BE: ld 1, target@got@dtprel@l(3)    # encoding: [0xe8,0x23,A,0bAAAAAA00]
+# CHECK-LE: ld 1, target@got@dtprel@l(3)    # encoding: [0bAAAAAA00,A,0x23,0xe8]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@got@dtprel@l, kind: fixup_ppc_half16ds
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@got@dtprel@l, kind: fixup_ppc_half16ds
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_DTPREL16_LO_DS target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_GOT_DTPREL16_LO_DS target 0x0
+            ld 1, target@got@dtprel@l(3)
+
+# CHECK-BE: addis 3, 2, target@got@dtprel@h # encoding: [0x3c,0x62,A,A]
+# CHECK-LE: addis 3, 2, target@got@dtprel@h # encoding: [A,A,0x62,0x3c]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@got@dtprel@h, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@got@dtprel@h, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_DTPREL16_HI target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_GOT_DTPREL16_HI target 0x0
+            addis 3, 2, target@got@dtprel@h
+
+# CHECK-BE: addis 3, 2, target@got@dtprel@l # encoding: [0x3c,0x62,A,A]
+# CHECK-LE: addis 3, 2, target@got@dtprel@l # encoding: [A,A,0x62,0x3c]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@got@dtprel@l, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@got@dtprel@l, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_DTPREL16_LO_DS target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_GOT_DTPREL16_LO_DS target 0x0
+            addis 3, 2, target@got@dtprel@l
+
+# CHECK-BE: addis 3, 2, target@got@dtprel   # encoding: [0x3c,0x62,A,A]
+# CHECK-LE: addis 3, 2, target@got@dtprel   # encoding: [A,A,0x62,0x3c]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@got@dtprel, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@got@dtprel, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_DTPREL16_DS target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_GOT_DTPREL16_DS target 0x0
+            addis 3, 2, target@got@dtprel
+
+# CHECK-BE: ld 1, target@got@dtprel(3)      # encoding: [0xe8,0x23,A,0bAAAAAA00]
+# CHECK-LE: ld 1, target@got@dtprel(3)      # encoding: [0bAAAAAA00,A,0x23,0xe8]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@got@dtprel, kind: fixup_ppc_half16ds
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@got@dtprel, kind: fixup_ppc_half16ds
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_DTPREL16_DS target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_GOT_DTPREL16_DS target 0x0
+            ld 1, target@got@dtprel(3)
+
+# CHECK-BE: addis 3, 2, target@got@tlsgd@ha # encoding: [0x3c,0x62,A,A]
+# CHECK-LE: addis 3, 2, target@got@tlsgd@ha # encoding: [A,A,0x62,0x3c]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@got@tlsgd@ha, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@got@tlsgd@ha, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSGD16_HA target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_GOT_TLSGD16_HA target 0x0
+            addis 3, 2, target@got@tlsgd@ha
+
+# CHECK-BE: addi 3, 3, target@got@tlsgd@l   # encoding: [0x38,0x63,A,A]
+# CHECK-LE: addi 3, 3, target@got@tlsgd@l   # encoding: [A,A,0x63,0x38]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@got@tlsgd@l, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@got@tlsgd@l, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSGD16_LO target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_GOT_TLSGD16_LO target 0x0
+            addi 3, 3, target@got@tlsgd@l
+
+# CHECK-BE: addi 3, 3, target@got@tlsgd@h   # encoding: [0x38,0x63,A,A]
+# CHECK-LE: addi 3, 3, target@got@tlsgd@h   # encoding: [A,A,0x63,0x38]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@got@tlsgd@h, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@got@tlsgd@h, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSGD16_HI target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_GOT_TLSGD16_HI target 0x0
+            addi 3, 3, target@got@tlsgd@h
+
+# CHECK-BE: addi 3, 3, target@got@tlsgd     # encoding: [0x38,0x63,A,A]
+# CHECK-LE: addi 3, 3, target@got@tlsgd     # encoding: [A,A,0x63,0x38]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@got@tlsgd, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@got@tlsgd, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSGD16 target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_GOT_TLSGD16 target 0x0
+            addi 3, 3, target@got@tlsgd
+
+
+# CHECK-BE: addis 3, 2, target@got@tlsld@ha # encoding: [0x3c,0x62,A,A]
+# CHECK-LE: addis 3, 2, target@got@tlsld@ha # encoding: [A,A,0x62,0x3c]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@got@tlsld@ha, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@got@tlsld@ha, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSLD16_HA target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_GOT_TLSLD16_HA target 0x0
+            addis 3, 2, target@got@tlsld@ha
+
+# CHECK-BE: addi 3, 3, target@got@tlsld@l   # encoding: [0x38,0x63,A,A]
+# CHECK-LE: addi 3, 3, target@got@tlsld@l   # encoding: [A,A,0x63,0x38]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@got@tlsld@l, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@got@tlsld@l, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSLD16_LO target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_GOT_TLSLD16_LO target 0x0
+            addi 3, 3, target@got@tlsld@l
+
+# CHECK-BE: addi 3, 3, target@got@tlsld@h   # encoding: [0x38,0x63,A,A]
+# CHECK-LE: addi 3, 3, target@got@tlsld@h   # encoding: [A,A,0x63,0x38]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@got@tlsld@h, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@got@tlsld@h, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSLD16_HI target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_GOT_TLSLD16_HI target 0x0
+            addi 3, 3, target@got@tlsld@h
+
+# CHECK-BE: addi 3, 3, target@got@tlsld     # encoding: [0x38,0x63,A,A]
+# CHECK-LE: addi 3, 3, target@got@tlsld     # encoding: [A,A,0x63,0x38]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 2, value: target@got@tlsld, kind: fixup_ppc_half16
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@got@tlsld, kind: fixup_ppc_half16
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSLD16 target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_GOT_TLSLD16 target 0x0
+            addi 3, 3, target@got@tlsld
+
+# CHECK-BE: bl __tls_get_addr(target@tlsgd) # encoding: [0b010010BB,B,B,0bBBBBBB01]
+# CHECK-LE: bl __tls_get_addr(target@tlsgd) # encoding: [0bBBBBBB01,B,B,0b010010BB]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target@tlsgd, kind: fixup_ppc_nofixup
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@tlsgd, kind: fixup_ppc_nofixup
+# CHECK-BE-NEXT:                            #   fixup B - offset: 0, value: __tls_get_addr, kind: fixup_ppc_br24
+# CHECK-LE-NEXT:                            #   fixup B - offset: 0, value: __tls_get_addr, kind: fixup_ppc_br24
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_TLSGD target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_TLSGD target 0x0
+# CHECK-BE-REL-NEXT:                        0x{{[0-9A-F]*[048C]}} R_PPC64_REL24 __tls_get_addr 0x0
+# CHECK-LE-REL-NEXT:                        0x{{[0-9A-F]*[048C]}} R_PPC64_REL24 __tls_get_addr 0x0
+            bl __tls_get_addr(target@tlsgd)
+
+# CHECK-BE: bl __tls_get_addr(target@tlsld) # encoding: [0b010010BB,B,B,0bBBBBBB01]
+# CHECK-LE: bl __tls_get_addr(target@tlsld) # encoding: [0bBBBBBB01,B,B,0b010010BB]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target@tlsld, kind: fixup_ppc_nofixup
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@tlsld, kind: fixup_ppc_nofixup
+# CHECK-BE-NEXT:                            #   fixup B - offset: 0, value: __tls_get_addr, kind: fixup_ppc_br24
+# CHECK-LE-NEXT:                            #   fixup B - offset: 0, value: __tls_get_addr, kind: fixup_ppc_br24
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_TLSLD target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_TLSLD target 0x0
+# CHECK-BE-REL-NEXT:                        0x{{[0-9A-F]*[048C]}} R_PPC64_REL24 __tls_get_addr 0x0
+# CHECK-LE-REL-NEXT:                        0x{{[0-9A-F]*[048C]}} R_PPC64_REL24 __tls_get_addr 0x0
+            bl __tls_get_addr(target@tlsld)
+
+# CHECK-BE: add 3, 4, target@tls            # encoding: [0x7c,0x64,0x6a,0x14]
+# CHECK-LE: add 3, 4, target@tls            # encoding: [0x14,0x6a,0x64,0x7c]
+# CHECK-BE-NEXT:                            #   fixup A - offset: 0, value: target@tls, kind: fixup_ppc_nofixup
+# CHECK-LE-NEXT:                            #   fixup A - offset: 0, value: target@tls, kind: fixup_ppc_nofixup
+# CHECK-BE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_TLS target 0x0
+# CHECK-LE-REL:                             0x{{[0-9A-F]*[048C]}} R_PPC64_TLS target 0x0
+            add 3, 4, target@tls
+
+# Verify that fixups on constants are resolved at assemble time
+
+# CHECK-BE: ori 1, 2, 65535              # encoding: [0x60,0x41,0xff,0xff]
+# CHECK-LE: ori 1, 2, 65535              # encoding: [0xff,0xff,0x41,0x60]
+            ori 1, 2, 131071@l
+# CHECK-BE: ori 1, 2, 1                  # encoding: [0x60,0x41,0x00,0x01]
+# CHECK-LE: ori 1, 2, 1                  # encoding: [0x01,0x00,0x41,0x60]
+            ori 1, 2, 131071@h
+# CHECK-BE: ori 1, 2, 2                  # encoding: [0x60,0x41,0x00,0x02]
+# CHECK-LE: ori 1, 2, 2                  # encoding: [0x02,0x00,0x41,0x60]
+            ori 1, 2, 131071@ha
 
 # Data relocs
 # llvm-mc does not show any "encoding" string for data, so we just check the relocs
 
-# CHECK-REL: .rela.data
+# CHECK-BE-REL: .rela.data
+# CHECK-LE-REL: .rela.data
 	.data
 
-# CHECK-REL: 0x{{[0-9A-F]*[08]}} R_PPC64_TOC - 0x0
+# CHECK-BE-REL: 0x{{[0-9A-F]*[08]}} R_PPC64_TOC - 0x0
+# CHECK-LE-REL: 0x{{[0-9A-F]*[08]}} R_PPC64_TOC - 0x0
 	.quad .TOC.@tocbase
 
-# CHECK-REL: 0x{{[0-9A-F]*[08]}} R_PPC64_DTPMOD64 target 0x0
+# CHECK-BE-REL: 0x{{[0-9A-F]*[08]}} R_PPC64_DTPMOD64 target 0x0
+# CHECK-LE-REL: 0x{{[0-9A-F]*[08]}} R_PPC64_DTPMOD64 target 0x0
 	.quad target@dtpmod
 
-# CHECK-REL: 0x{{[0-9A-F]*[08]}} R_PPC64_TPREL64 target 0x0
+# CHECK-BE-REL: 0x{{[0-9A-F]*[08]}} R_PPC64_TPREL64 target 0x0
+# CHECK-LE-REL: 0x{{[0-9A-F]*[08]}} R_PPC64_TPREL64 target 0x0
 	.quad target@tprel
 
-# CHECK-REL: 0x{{[0-9A-F]*[08]}} R_PPC64_DTPREL64 target 0x0
+# CHECK-BE-REL: 0x{{[0-9A-F]*[08]}} R_PPC64_DTPREL64 target 0x0
+# CHECK-LE-REL: 0x{{[0-9A-F]*[08]}} R_PPC64_DTPREL64 target 0x0
 	.quad target@dtprel
 
-# Constant fixup
-        ori 1, 2, 131071@l
-# CHECK: ori 1, 2, 131071@l              # encoding: [0x60,0x41,A,A]
-# CHECK-NEXT:                            #   fixup A - offset: 2, value: 131071@l, kind: fixup_ppc_half16
diff --git a/test/MC/PowerPC/ppc64-initial-cfa.s b/test/MC/PowerPC/ppc64-initial-cfa.s
index f976ae9..b890b30 100644
--- a/test/MC/PowerPC/ppc64-initial-cfa.s
+++ b/test/MC/PowerPC/ppc64-initial-cfa.s
@@ -1,7 +1,11 @@
 # RUN: llvm-mc -triple=powerpc64-unknown-linux-gnu -filetype=obj -relocation-model=static %s | \
-# RUN: llvm-readobj -s -sr -sd | FileCheck %s -check-prefix=STATIC
+# RUN: llvm-readobj -s -sr -sd | FileCheck %s -check-prefix=STATIC -check-prefix=STATIC-BE
 # RUN: llvm-mc -triple=powerpc64-unknown-linux-gnu -filetype=obj -relocation-model=pic %s | \
-# RUN: llvm-readobj -s -sr -sd | FileCheck %s -check-prefix=PIC
+# RUN: llvm-readobj -s -sr -sd | FileCheck %s -check-prefix=PIC -check-prefix=PIC-BE
+# RUN: llvm-mc -triple=powerpc64le-unknown-linux-gnu -filetype=obj -relocation-model=static %s | \
+# RUN: llvm-readobj -s -sr -sd | FileCheck %s -check-prefix=STATIC -check-prefix=STATIC-LE
+# RUN: llvm-mc -triple=powerpc64le-unknown-linux-gnu -filetype=obj -relocation-model=pic %s | \
+# RUN: llvm-readobj -s -sr -sd | FileCheck %s -check-prefix=PIC -check-prefix=PIC-LE
 
         .cfi_startproc
         nop
@@ -23,9 +27,12 @@
 # STATIC-NEXT:   Relocations [
 # STATIC-NEXT:   ]
 # STATIC-NEXT:   SectionData (
-# STATIC-NEXT:     0000: 00000010 00000000 017A5200 04784101
-# STATIC-NEXT:     0010: 1B0C0100 00000010 00000018 00000000
-# STATIC-NEXT:     0020: 00000004 00000000
+# STATIC-BE-NEXT:  0000: 00000010 00000000 017A5200 04784101
+# STATIC-LE-NEXT:  0000: 10000000 00000000 017A5200 04784101
+# STATIC-BE-NEXT:  0010: 1B0C0100 00000010 00000018 00000000
+# STATIC-LE-NEXT:  0010: 1B0C0100 10000000 18000000 00000000
+# STATIC-BE-NEXT:  0020: 00000004 00000000
+# STATIC-LE-NEXT:  0020: 04000000 00000000
 # STATIC-NEXT:   )
 # STATIC-NEXT: }
 
@@ -61,9 +68,12 @@
 # PIC-NEXT:   Relocations [
 # PIC-NEXT:   ]
 # PIC-NEXT:   SectionData (
-# PIC-NEXT:     0000: 00000010 00000000 017A5200 04784101
-# PIC-NEXT:     0010: 1B0C0100 00000010 00000018 00000000
-# PIC-NEXT:     0020: 00000004 00000000
+# PIC-BE-NEXT:  0000: 00000010 00000000 017A5200 04784101
+# PIC-LE-NEXT:  0000: 10000000 00000000 017A5200 04784101
+# PIC-BE-NEXT:  0010: 1B0C0100 00000010 00000018 00000000
+# PIC-LE-NEXT:  0010: 1B0C0100 10000000 18000000 00000000
+# PIC-BE-NEXT:  0020: 00000004 00000000
+# PIC-LE-NEXT:  0020: 04000000 00000000
 # PIC-NEXT:   )
 # PIC-NEXT: }
 
diff --git a/test/MC/PowerPC/ppc64-operands.s b/test/MC/PowerPC/ppc64-operands.s
index fc1cbeb..392b3b7 100644
--- a/test/MC/PowerPC/ppc64-operands.s
+++ b/test/MC/PowerPC/ppc64-operands.s
@@ -1,115 +1,158 @@
 
-# RUN: llvm-mc -triple powerpc64-unknown-unknown --show-encoding %s | FileCheck %s
+# RUN: llvm-mc -triple powerpc64-unknown-unknown --show-encoding %s | FileCheck -check-prefix=CHECK-BE %s
+# RUN: llvm-mc -triple powerpc64le-unknown-unknown --show-encoding %s | FileCheck -check-prefix=CHECK-LE %s
 
 # Register operands
 
-# CHECK: add 1, 2, 3                     # encoding: [0x7c,0x22,0x1a,0x14]
-         add 1, 2, 3
+# CHECK-BE: add 1, 2, 3                     # encoding: [0x7c,0x22,0x1a,0x14]
+# CHECK-LE: add 1, 2, 3                     # encoding: [0x14,0x1a,0x22,0x7c]
+            add 1, 2, 3
 
-# CHECK: add 1, 2, 3                     # encoding: [0x7c,0x22,0x1a,0x14]
-         add %r1, %r2, %r3
+# CHECK-BE: add 1, 2, 3                     # encoding: [0x7c,0x22,0x1a,0x14]
+# CHECK-LE: add 1, 2, 3                     # encoding: [0x14,0x1a,0x22,0x7c]
+            add %r1, %r2, %r3
 
-# CHECK: add 0, 0, 0                     # encoding: [0x7c,0x00,0x02,0x14]
-         add 0, 0, 0
+# CHECK-BE: add 0, 0, 0                     # encoding: [0x7c,0x00,0x02,0x14]
+# CHECK-LE: add 0, 0, 0                     # encoding: [0x14,0x02,0x00,0x7c]
+            add 0, 0, 0
 
-# CHECK: add 31, 31, 31                  # encoding: [0x7f,0xff,0xfa,0x14]
-         add 31, 31, 31
+# CHECK-BE: add 31, 31, 31                  # encoding: [0x7f,0xff,0xfa,0x14]
+# CHECK-LE: add 31, 31, 31                  # encoding: [0x14,0xfa,0xff,0x7f]
+            add 31, 31, 31
 
-# CHECK: addi 1, 0, 0                    # encoding: [0x38,0x20,0x00,0x00]
-         addi 1, 0, 0
+# CHECK-BE: addi 1, 0, 0                    # encoding: [0x38,0x20,0x00,0x00]
+# CHECK-LE: addi 1, 0, 0                    # encoding: [0x00,0x00,0x20,0x38]
+            addi 1, 0, 0
 
-# CHECK: addi 1, 0, 0                    # encoding: [0x38,0x20,0x00,0x00]
-         addi 1, %r0, 0
+# CHECK-BE: addi 1, 0, 0                    # encoding: [0x38,0x20,0x00,0x00]
+# CHECK-LE: addi 1, 0, 0                    # encoding: [0x00,0x00,0x20,0x38]
+            addi 1, %r0, 0
 
 # Signed 16-bit immediate operands
 
-# CHECK: addi 1, 2, 0                    # encoding: [0x38,0x22,0x00,0x00]
-         addi 1, 2, 0
+# CHECK-BE: addi 1, 2, 0                    # encoding: [0x38,0x22,0x00,0x00]
+# CHECK-LE: addi 1, 2, 0                    # encoding: [0x00,0x00,0x22,0x38]
+            addi 1, 2, 0
 
-# CHECK: addi 1, 0, -32768               # encoding: [0x38,0x20,0x80,0x00]
-         addi 1, 0, -32768
+# CHECK-BE: addi 1, 0, -32768               # encoding: [0x38,0x20,0x80,0x00]
+# CHECK-LE: addi 1, 0, -32768               # encoding: [0x00,0x80,0x20,0x38]
+            addi 1, 0, -32768
 
-# CHECK: addi 1, 0, 32767                # encoding: [0x38,0x20,0x7f,0xff]
-         addi 1, 0, 32767
+# CHECK-BE: addi 1, 0, 32767                # encoding: [0x38,0x20,0x7f,0xff]
+# CHECK-LE: addi 1, 0, 32767                # encoding: [0xff,0x7f,0x20,0x38]
+            addi 1, 0, 32767
 
 # Unsigned 16-bit immediate operands
 
-# CHECK: ori 1, 2, 0                     # encoding: [0x60,0x41,0x00,0x00]
-         ori 1, 2, 0
+# CHECK-BE: ori 1, 2, 0                     # encoding: [0x60,0x41,0x00,0x00]
+# CHECK-LE: ori 1, 2, 0                     # encoding: [0x00,0x00,0x41,0x60]
+            ori 1, 2, 0
 
-# CHECK: ori 1, 2, 65535                 # encoding: [0x60,0x41,0xff,0xff]
-         ori 1, 2, 65535
+# CHECK-BE: ori 1, 2, 65535                 # encoding: [0x60,0x41,0xff,0xff]
+# CHECK-LE: ori 1, 2, 65535                 # encoding: [0xff,0xff,0x41,0x60]
+            ori 1, 2, 65535
 
 # Signed 16-bit immediate operands (extended range for addis)
 
-# CHECK: addis 1, 0, 0                   # encoding: [0x3c,0x20,0x00,0x00]
-         addis 1, 0, -65536
+# CHECK-BE: addis 1, 0, 0                   # encoding: [0x3c,0x20,0x00,0x00]
+# CHECK-LE: addis 1, 0, 0                   # encoding: [0x00,0x00,0x20,0x3c]
+            addis 1, 0, -65536
 
-# CHECK: addis 1, 0, -1                  # encoding: [0x3c,0x20,0xff,0xff]
-         addis 1, 0, 65535
+# CHECK-BE: addis 1, 0, -1                  # encoding: [0x3c,0x20,0xff,0xff]
+# CHECK-LE: addis 1, 0, -1                  # encoding: [0xff,0xff,0x20,0x3c]
+            addis 1, 0, 65535
 
 # D-Form memory operands
 
-# CHECK: lwz 1, 0(0)                     # encoding: [0x80,0x20,0x00,0x00]
-         lwz 1, 0(0)
+# CHECK-BE: lwz 1, 0(0)                     # encoding: [0x80,0x20,0x00,0x00]
+# CHECK-LE: lwz 1, 0(0)                     # encoding: [0x00,0x00,0x20,0x80]
+            lwz 1, 0(0)
 
-# CHECK: lwz 1, 0(0)                     # encoding: [0x80,0x20,0x00,0x00]
-         lwz 1, 0(%r0)
+# CHECK-BE: lwz 1, 0(0)                     # encoding: [0x80,0x20,0x00,0x00]
+# CHECK-LE: lwz 1, 0(0)                     # encoding: [0x00,0x00,0x20,0x80]
+            lwz 1, 0(%r0)
 
-# CHECK: lwz 1, 0(31)                    # encoding: [0x80,0x3f,0x00,0x00]
-         lwz 1, 0(31)
+# CHECK-BE: lwz 1, 0(31)                    # encoding: [0x80,0x3f,0x00,0x00]
+# CHECK-LE: lwz 1, 0(31)                    # encoding: [0x00,0x00,0x3f,0x80]
+            lwz 1, 0(31)
 
-# CHECK: lwz 1, 0(31)                    # encoding: [0x80,0x3f,0x00,0x00]
-         lwz 1, 0(%r31)
+# CHECK-BE: lwz 1, 0(31)                    # encoding: [0x80,0x3f,0x00,0x00]
+# CHECK-LE: lwz 1, 0(31)                    # encoding: [0x00,0x00,0x3f,0x80]
+            lwz 1, 0(%r31)
 
-# CHECK: lwz 1, -32768(2)                # encoding: [0x80,0x22,0x80,0x00]
-         lwz 1, -32768(2)
+# CHECK-BE: lwz 1, -32768(2)                # encoding: [0x80,0x22,0x80,0x00]
+# CHECK-LE: lwz 1, -32768(2)                # encoding: [0x00,0x80,0x22,0x80]
+            lwz 1, -32768(2)
 
-# CHECK: lwz 1, 32767(2)                 # encoding: [0x80,0x22,0x7f,0xff]
-         lwz 1, 32767(2)
+# CHECK-BE: lwz 1, 32767(2)                 # encoding: [0x80,0x22,0x7f,0xff]
+# CHECK-LE: lwz 1, 32767(2)                 # encoding: [0xff,0x7f,0x22,0x80]
+            lwz 1, 32767(2)
 
 
-# CHECK: ld 1, 0(0)                      # encoding: [0xe8,0x20,0x00,0x00]
-         ld 1, 0(0)
+# CHECK-BE: ld 1, 0(0)                      # encoding: [0xe8,0x20,0x00,0x00]
+# CHECK-LE: ld 1, 0(0)                      # encoding: [0x00,0x00,0x20,0xe8]
+            ld 1, 0(0)
 
-# CHECK: ld 1, 0(0)                      # encoding: [0xe8,0x20,0x00,0x00]
-         ld 1, 0(%r0)
+# CHECK-BE: ld 1, 0(0)                      # encoding: [0xe8,0x20,0x00,0x00]
+# CHECK-LE: ld 1, 0(0)                      # encoding: [0x00,0x00,0x20,0xe8]
+            ld 1, 0(%r0)
 
-# CHECK: ld 1, 0(31)                     # encoding: [0xe8,0x3f,0x00,0x00]
-         ld 1, 0(31)
+# CHECK-BE: ld 1, 0(31)                     # encoding: [0xe8,0x3f,0x00,0x00]
+# CHECK-LE: ld 1, 0(31)                     # encoding: [0x00,0x00,0x3f,0xe8]
+            ld 1, 0(31)
 
-# CHECK: ld 1, 0(31)                     # encoding: [0xe8,0x3f,0x00,0x00]
-         ld 1, 0(%r31)
+# CHECK-BE: ld 1, 0(31)                     # encoding: [0xe8,0x3f,0x00,0x00]
+# CHECK-LE: ld 1, 0(31)                     # encoding: [0x00,0x00,0x3f,0xe8]
+            ld 1, 0(%r31)
 
-# CHECK: ld 1, -32768(2)                 # encoding: [0xe8,0x22,0x80,0x00]
-         ld 1, -32768(2)
+# CHECK-BE: ld 1, -32768(2)                 # encoding: [0xe8,0x22,0x80,0x00]
+# CHECK-LE: ld 1, -32768(2)                 # encoding: [0x00,0x80,0x22,0xe8]
+            ld 1, -32768(2)
 
-# CHECK: ld 1, 32764(2)                  # encoding: [0xe8,0x22,0x7f,0xfc]
-         ld 1, 32764(2)
+# CHECK-BE: ld 1, 32764(2)                  # encoding: [0xe8,0x22,0x7f,0xfc]
+# CHECK-LE: ld 1, 32764(2)                  # encoding: [0xfc,0x7f,0x22,0xe8]
+            ld 1, 32764(2)
 
-# CHECK: ld 1, 4(2)                      # encoding: [0xe8,0x22,0x00,0x04]
-         ld 1, 4(2)
+# CHECK-BE: ld 1, 4(2)                      # encoding: [0xe8,0x22,0x00,0x04]
+# CHECK-LE: ld 1, 4(2)                      # encoding: [0x04,0x00,0x22,0xe8]
+            ld 1, 4(2)
 
-# CHECK: ld 1, -4(2)                     # encoding: [0xe8,0x22,0xff,0xfc]
-         ld 1, -4(2)
+# CHECK-BE: ld 1, -4(2)                     # encoding: [0xe8,0x22,0xff,0xfc]
+# CHECK-LE: ld 1, -4(2)                     # encoding: [0xfc,0xff,0x22,0xe8]
+            ld 1, -4(2)
 
 
 # Immediate branch operands
 
-# CHECK: b .+1024                        # encoding: [0x48,0x00,0x04,0x00]
-         b 1024
+# CHECK-BE: b .+1024                        # encoding: [0x48,0x00,0x04,0x00]
+# CHECK-LE: b .+1024                        # encoding: [0x00,0x04,0x00,0x48]
+            b 1024
 
-# CHECK: ba 1024                         # encoding: [0x48,0x00,0x04,0x02]
-         ba 1024
+# CHECK-BE: ba 1024                         # encoding: [0x48,0x00,0x04,0x02]
+# CHECK-LE: ba 1024                         # encoding: [0x02,0x04,0x00,0x48]
+            ba 1024
 
-# CHECK: beq 0, .+1024                   # encoding: [0x41,0x82,0x04,0x00]
-         beq 1024
+# CHECK-BE: beq 0, .+1024                   # encoding: [0x41,0x82,0x04,0x00]
+# CHECK-LE: beq 0, .+1024                   # encoding: [0x00,0x04,0x82,0x41]
+            beq 1024
 
-# CHECK: beqa 0, 1024                    # encoding: [0x41,0x82,0x04,0x02]
-         beqa 1024
+# CHECK-BE: beqa 0, 1024                    # encoding: [0x41,0x82,0x04,0x02]
+# CHECK-LE: beqa 0, 1024                    # encoding: [0x02,0x04,0x82,0x41]
+            beqa 1024
 
-# CHECK:                                 # encoding: [0x42,0x9f,A,0bAAAAAA01]
-         bcl 20, 31, $+4
+# CHECK-BE:                                 # encoding: [0x42,0x9f,A,0bAAAAAA01]
+# CHECK-LE:                                 # encoding: [0bAAAAAA01,A,0x9f,0x42]
+            bcl 20, 31, $+4
+
+# CHECK-BE:                                 # encoding: [0x42,0x00,A,0bAAAAAA00]
+# CHECK-LE:                                 # encoding: [0bAAAAAA00,A,0x00,0x42]
+            bdnz $-8
+
+# CHECK-BE: andi. 0, 3, 32767               # encoding: [0x70,0x60,0x7f,0xff]
+# CHECK-LE: andi. 0, 3, 32767               # encoding: [0xff,0x7f,0x60,0x70]
+            andi. %r0,%r3,~0x8000@l
+
+# CHECK-BE: andi. 0, 3, 0                   # encoding: [0x70,0x60,0x00,0x00]
+# CHECK-LE: andi. 0, 3, 0                   # encoding: [0x00,0x00,0x60,0x70]
+            andi. %r0,%r3,!0x8000@l
 
-# CHECK:                                 # encoding: [0x42,0x00,A,0bAAAAAA00]
-         bdnz $-8
diff --git a/test/MC/PowerPC/ppc64-regs.s b/test/MC/PowerPC/ppc64-regs.s
index 02b1fc5..fb1775c 100644
--- a/test/MC/PowerPC/ppc64-regs.s
+++ b/test/MC/PowerPC/ppc64-regs.s
@@ -1,4 +1,5 @@
 # RUN: llvm-mc -triple powerpc64-unknown-unknown --show-encoding %s | FileCheck %s
+# RUN: llvm-mc -triple powerpc64le-unknown-unknown --show-encoding %s | FileCheck %s
 
 #CHECK: .cfi_startproc
 #CHECK: .cfi_offset r0, 0
diff --git a/test/MC/PowerPC/vsx.s b/test/MC/PowerPC/vsx.s
new file mode 100644
index 0000000..d292dda
--- /dev/null
+++ b/test/MC/PowerPC/vsx.s
@@ -0,0 +1,447 @@
+# RUN: llvm-mc -triple powerpc64-unknown-linux-gnu --show-encoding %s | FileCheck -check-prefix=CHECK-BE %s
+# RUN: llvm-mc -triple powerpc64le-unknown-linux-gnu --show-encoding %s | FileCheck -check-prefix=CHECK-LE %s
+
+# CHECK-BE: lxsdx 7, 5, 31                     # encoding: [0x7c,0xe5,0xfc,0x98]
+# CHECK-LE: lxsdx 7, 5, 31                     # encoding: [0x98,0xfc,0xe5,0x7c]
+            lxsdx 7, 5, 31
+# CHECK-BE: lxvd2x 7, 5, 31                    # encoding: [0x7c,0xe5,0xfe,0x98]
+# CHECK-LE: lxvd2x 7, 5, 31                    # encoding: [0x98,0xfe,0xe5,0x7c]
+            lxvd2x 7, 5, 31
+# CHECK-BE: lxvdsx 7, 5, 31                    # encoding: [0x7c,0xe5,0xfa,0x98]
+# CHECK-LE: lxvdsx 7, 5, 31                    # encoding: [0x98,0xfa,0xe5,0x7c]
+            lxvdsx 7, 5, 31
+# CHECK-BE: lxvw4x 7, 5, 31                    # encoding: [0x7c,0xe5,0xfe,0x18]
+# CHECK-LE: lxvw4x 7, 5, 31                    # encoding: [0x18,0xfe,0xe5,0x7c]
+            lxvw4x 7, 5, 31
+# CHECK-BE: stxsdx 8, 5, 31                    # encoding: [0x7d,0x05,0xfd,0x98]
+# CHECK-LE: stxsdx 8, 5, 31                    # encoding: [0x98,0xfd,0x05,0x7d]
+            stxsdx 8, 5, 31
+# CHECK-BE: stxvd2x 8, 5, 31                   # encoding: [0x7d,0x05,0xff,0x98]
+# CHECK-LE: stxvd2x 8, 5, 31                   # encoding: [0x98,0xff,0x05,0x7d]
+            stxvd2x 8, 5, 31
+# CHECK-BE: stxvw4x 8, 5, 31                   # encoding: [0x7d,0x05,0xff,0x18]
+# CHECK-LE: stxvw4x 8, 5, 31                   # encoding: [0x18,0xff,0x05,0x7d]
+            stxvw4x 8, 5, 31
+# CHECK-BE: xsabsdp 7, 27                      # encoding: [0xf0,0xe0,0xdd,0x64]
+# CHECK-LE: xsabsdp 7, 27                      # encoding: [0x64,0xdd,0xe0,0xf0]
+            xsabsdp 7, 27
+# CHECK-BE: xsadddp 7, 63, 27                  # encoding: [0xf0,0xff,0xd9,0x04]
+# CHECK-LE: xsadddp 7, 63, 27                  # encoding: [0x04,0xd9,0xff,0xf0]
+            xsadddp 7, 63, 27
+# CHECK-BE: xscmpodp 6, 63, 27                 # encoding: [0xf3,0x1f,0xd9,0x5c]
+# CHECK-LE: xscmpodp 6, 63, 27                 # encoding: [0x5c,0xd9,0x1f,0xf3]
+            xscmpodp 6, 63, 27
+# CHECK-BE: xscmpudp 6, 63, 27                 # encoding: [0xf3,0x1f,0xd9,0x1c]
+# CHECK-LE: xscmpudp 6, 63, 27                 # encoding: [0x1c,0xd9,0x1f,0xf3]
+            xscmpudp 6, 63, 27
+# CHECK-BE: xscpsgndp 7, 63, 27                # encoding: [0xf0,0xff,0xdd,0x84]
+# CHECK-LE: xscpsgndp 7, 63, 27                # encoding: [0x84,0xdd,0xff,0xf0]
+            xscpsgndp 7, 63, 27
+# CHECK-BE: xscvdpsp 7, 27                     # encoding: [0xf0,0xe0,0xdc,0x24]
+# CHECK-LE: xscvdpsp 7, 27                     # encoding: [0x24,0xdc,0xe0,0xf0]
+            xscvdpsp 7, 27
+# CHECK-BE: xscvdpsxds 7, 27                   # encoding: [0xf0,0xe0,0xdd,0x60]
+# CHECK-LE: xscvdpsxds 7, 27                   # encoding: [0x60,0xdd,0xe0,0xf0]
+            xscvdpsxds 7, 27
+# CHECK-BE: xscvdpsxws 7, 27                   # encoding: [0xf0,0xe0,0xd9,0x60]
+# CHECK-LE: xscvdpsxws 7, 27                   # encoding: [0x60,0xd9,0xe0,0xf0]
+            xscvdpsxws 7, 27
+# CHECK-BE: xscvdpuxds 7, 27                   # encoding: [0xf0,0xe0,0xdd,0x20]
+# CHECK-LE: xscvdpuxds 7, 27                   # encoding: [0x20,0xdd,0xe0,0xf0]
+            xscvdpuxds 7, 27
+# CHECK-BE: xscvdpuxws 7, 27                   # encoding: [0xf0,0xe0,0xd9,0x20]
+# CHECK-LE: xscvdpuxws 7, 27                   # encoding: [0x20,0xd9,0xe0,0xf0]
+            xscvdpuxws 7, 27
+# CHECK-BE: xscvspdp 7, 27                     # encoding: [0xf0,0xe0,0xdd,0x24]
+# CHECK-LE: xscvspdp 7, 27                     # encoding: [0x24,0xdd,0xe0,0xf0]
+            xscvspdp 7, 27
+# CHECK-BE: xscvsxddp 7, 27                    # encoding: [0xf0,0xe0,0xdd,0xe0]
+# CHECK-LE: xscvsxddp 7, 27                    # encoding: [0xe0,0xdd,0xe0,0xf0]
+            xscvsxddp 7, 27
+# CHECK-BE: xscvuxddp 7, 27                    # encoding: [0xf0,0xe0,0xdd,0xa0]
+# CHECK-LE: xscvuxddp 7, 27                    # encoding: [0xa0,0xdd,0xe0,0xf0]
+            xscvuxddp 7, 27
+# CHECK-BE: xsdivdp 7, 63, 27                  # encoding: [0xf0,0xff,0xd9,0xc4]
+# CHECK-LE: xsdivdp 7, 63, 27                  # encoding: [0xc4,0xd9,0xff,0xf0]
+            xsdivdp 7, 63, 27
+# CHECK-BE: xsmaddadp 7, 63, 27                # encoding: [0xf0,0xff,0xd9,0x0c]
+# CHECK-LE: xsmaddadp 7, 63, 27                # encoding: [0x0c,0xd9,0xff,0xf0]
+            xsmaddadp 7, 63, 27
+# CHECK-BE: xsmaddmdp 7, 63, 27                # encoding: [0xf0,0xff,0xd9,0x4c]
+# CHECK-LE: xsmaddmdp 7, 63, 27                # encoding: [0x4c,0xd9,0xff,0xf0]
+            xsmaddmdp 7, 63, 27
+# CHECK-BE: xsmaxdp 7, 63, 27                  # encoding: [0xf0,0xff,0xdd,0x04]
+# CHECK-LE: xsmaxdp 7, 63, 27                  # encoding: [0x04,0xdd,0xff,0xf0]
+            xsmaxdp 7, 63, 27
+# CHECK-BE: xsmindp 7, 63, 27                  # encoding: [0xf0,0xff,0xdd,0x44]
+# CHECK-LE: xsmindp 7, 63, 27                  # encoding: [0x44,0xdd,0xff,0xf0]
+            xsmindp 7, 63, 27
+# CHECK-BE: xsmsubadp 7, 63, 27                # encoding: [0xf0,0xff,0xd9,0x8c]
+# CHECK-LE: xsmsubadp 7, 63, 27                # encoding: [0x8c,0xd9,0xff,0xf0]
+            xsmsubadp 7, 63, 27
+# CHECK-BE: xsmsubmdp 7, 63, 27                # encoding: [0xf0,0xff,0xd9,0xcc]
+# CHECK-LE: xsmsubmdp 7, 63, 27                # encoding: [0xcc,0xd9,0xff,0xf0]
+            xsmsubmdp 7, 63, 27
+# CHECK-BE: xsmuldp 7, 63, 27                  # encoding: [0xf0,0xff,0xd9,0x84]
+# CHECK-LE: xsmuldp 7, 63, 27                  # encoding: [0x84,0xd9,0xff,0xf0]
+            xsmuldp 7, 63, 27
+# CHECK-BE: xsnabsdp 7, 27                     # encoding: [0xf0,0xe0,0xdd,0xa4]
+# CHECK-LE: xsnabsdp 7, 27                     # encoding: [0xa4,0xdd,0xe0,0xf0]
+            xsnabsdp 7, 27
+# CHECK-BE: xsnegdp 7, 27                      # encoding: [0xf0,0xe0,0xdd,0xe4]
+# CHECK-LE: xsnegdp 7, 27                      # encoding: [0xe4,0xdd,0xe0,0xf0]
+            xsnegdp 7, 27
+# CHECK-BE: xsnmaddadp 7, 63, 27               # encoding: [0xf0,0xff,0xdd,0x0c]
+# CHECK-LE: xsnmaddadp 7, 63, 27               # encoding: [0x0c,0xdd,0xff,0xf0]
+            xsnmaddadp 7, 63, 27
+# CHECK-BE: xsnmaddmdp 7, 63, 27               # encoding: [0xf0,0xff,0xdd,0x4c]
+# CHECK-LE: xsnmaddmdp 7, 63, 27               # encoding: [0x4c,0xdd,0xff,0xf0]
+            xsnmaddmdp 7, 63, 27
+# CHECK-BE: xsnmsubadp 7, 63, 27               # encoding: [0xf0,0xff,0xdd,0x8c]
+# CHECK-LE: xsnmsubadp 7, 63, 27               # encoding: [0x8c,0xdd,0xff,0xf0]
+            xsnmsubadp 7, 63, 27
+# CHECK-BE: xsnmsubmdp 7, 63, 27               # encoding: [0xf0,0xff,0xdd,0xcc]
+# CHECK-LE: xsnmsubmdp 7, 63, 27               # encoding: [0xcc,0xdd,0xff,0xf0]
+            xsnmsubmdp 7, 63, 27
+# CHECK-BE: xsrdpi 7, 27                       # encoding: [0xf0,0xe0,0xd9,0x24]
+# CHECK-LE: xsrdpi 7, 27                       # encoding: [0x24,0xd9,0xe0,0xf0]
+            xsrdpi 7, 27
+# CHECK-BE: xsrdpic 7, 27                      # encoding: [0xf0,0xe0,0xd9,0xac]
+# CHECK-LE: xsrdpic 7, 27                      # encoding: [0xac,0xd9,0xe0,0xf0]
+            xsrdpic 7, 27
+# CHECK-BE: xsrdpim 7, 27                      # encoding: [0xf0,0xe0,0xd9,0xe4]
+# CHECK-LE: xsrdpim 7, 27                      # encoding: [0xe4,0xd9,0xe0,0xf0]
+            xsrdpim 7, 27
+# CHECK-BE: xsrdpip 7, 27                      # encoding: [0xf0,0xe0,0xd9,0xa4]
+# CHECK-LE: xsrdpip 7, 27                      # encoding: [0xa4,0xd9,0xe0,0xf0]
+            xsrdpip 7, 27
+# CHECK-BE: xsrdpiz 7, 27                      # encoding: [0xf0,0xe0,0xd9,0x64]
+# CHECK-LE: xsrdpiz 7, 27                      # encoding: [0x64,0xd9,0xe0,0xf0]
+            xsrdpiz 7, 27
+# CHECK-BE: xsredp 7, 27                       # encoding: [0xf0,0xe0,0xd9,0x68]
+# CHECK-LE: xsredp 7, 27                       # encoding: [0x68,0xd9,0xe0,0xf0]
+            xsredp 7, 27
+# CHECK-BE: xsrsqrtedp 7, 27                   # encoding: [0xf0,0xe0,0xd9,0x28]
+# CHECK-LE: xsrsqrtedp 7, 27                   # encoding: [0x28,0xd9,0xe0,0xf0]
+            xsrsqrtedp 7, 27
+# CHECK-BE: xssqrtdp 7, 27                     # encoding: [0xf0,0xe0,0xd9,0x2c]
+# CHECK-LE: xssqrtdp 7, 27                     # encoding: [0x2c,0xd9,0xe0,0xf0]
+            xssqrtdp 7, 27
+# CHECK-BE: xssubdp 7, 63, 27                  # encoding: [0xf0,0xff,0xd9,0x44]
+# CHECK-LE: xssubdp 7, 63, 27                  # encoding: [0x44,0xd9,0xff,0xf0]
+            xssubdp 7, 63, 27
+# CHECK-BE: xstdivdp 6, 63, 27                 # encoding: [0xf3,0x1f,0xd9,0xec]
+# CHECK-LE: xstdivdp 6, 63, 27                 # encoding: [0xec,0xd9,0x1f,0xf3]
+            xstdivdp 6, 63, 27
+# CHECK-BE: xstsqrtdp 6, 27                    # encoding: [0xf3,0x00,0xd9,0xa8]
+# CHECK-LE: xstsqrtdp 6, 27                    # encoding: [0xa8,0xd9,0x00,0xf3]
+            xstsqrtdp 6, 27
+# CHECK-BE: xvabsdp 7, 27                      # encoding: [0xf0,0xe0,0xdf,0x64]
+# CHECK-LE: xvabsdp 7, 27                      # encoding: [0x64,0xdf,0xe0,0xf0]
+            xvabsdp 7, 27
+# CHECK-BE: xvabssp 7, 27                      # encoding: [0xf0,0xe0,0xde,0x64]
+# CHECK-LE: xvabssp 7, 27                      # encoding: [0x64,0xde,0xe0,0xf0]
+            xvabssp 7, 27
+# CHECK-BE: xvadddp 7, 63, 27                  # encoding: [0xf0,0xff,0xdb,0x04]
+# CHECK-LE: xvadddp 7, 63, 27                  # encoding: [0x04,0xdb,0xff,0xf0]
+            xvadddp 7, 63, 27
+# CHECK-BE: xvaddsp 7, 63, 27                  # encoding: [0xf0,0xff,0xda,0x04]
+# CHECK-LE: xvaddsp 7, 63, 27                  # encoding: [0x04,0xda,0xff,0xf0]
+            xvaddsp 7, 63, 27
+# CHECK-BE: xvcmpeqdp 7, 63, 27                # encoding: [0xf0,0xff,0xdb,0x1c]
+# CHECK-LE: xvcmpeqdp 7, 63, 27                # encoding: [0x1c,0xdb,0xff,0xf0]
+            xvcmpeqdp 7, 63, 27
+# CHECK-BE: xvcmpeqdp. 7, 63, 27               # encoding: [0xf0,0xff,0xdf,0x1c]
+# CHECK-LE: xvcmpeqdp. 7, 63, 27               # encoding: [0x1c,0xdf,0xff,0xf0]
+            xvcmpeqdp. 7, 63, 27
+# CHECK-BE: xvcmpeqsp 7, 63, 27                # encoding: [0xf0,0xff,0xda,0x1c]
+# CHECK-LE: xvcmpeqsp 7, 63, 27                # encoding: [0x1c,0xda,0xff,0xf0]
+            xvcmpeqsp 7, 63, 27
+# CHECK-BE: xvcmpeqsp. 7, 63, 27               # encoding: [0xf0,0xff,0xde,0x1c]
+# CHECK-LE: xvcmpeqsp. 7, 63, 27               # encoding: [0x1c,0xde,0xff,0xf0]
+            xvcmpeqsp. 7, 63, 27
+# CHECK-BE: xvcmpgedp 7, 63, 27                # encoding: [0xf0,0xff,0xdb,0x9c]
+# CHECK-LE: xvcmpgedp 7, 63, 27                # encoding: [0x9c,0xdb,0xff,0xf0]
+            xvcmpgedp 7, 63, 27
+# CHECK-BE: xvcmpgedp. 7, 63, 27               # encoding: [0xf0,0xff,0xdf,0x9c]
+# CHECK-LE: xvcmpgedp. 7, 63, 27               # encoding: [0x9c,0xdf,0xff,0xf0]
+            xvcmpgedp. 7, 63, 27
+# CHECK-BE: xvcmpgesp 7, 63, 27                # encoding: [0xf0,0xff,0xda,0x9c]
+# CHECK-LE: xvcmpgesp 7, 63, 27                # encoding: [0x9c,0xda,0xff,0xf0]
+            xvcmpgesp 7, 63, 27
+# CHECK-BE: xvcmpgesp. 7, 63, 27               # encoding: [0xf0,0xff,0xde,0x9c]
+# CHECK-LE: xvcmpgesp. 7, 63, 27               # encoding: [0x9c,0xde,0xff,0xf0]
+            xvcmpgesp. 7, 63, 27
+# CHECK-BE: xvcmpgtdp 7, 63, 27                # encoding: [0xf0,0xff,0xdb,0x5c]
+# CHECK-LE: xvcmpgtdp 7, 63, 27                # encoding: [0x5c,0xdb,0xff,0xf0]
+            xvcmpgtdp 7, 63, 27
+# CHECK-BE: xvcmpgtdp. 7, 63, 27               # encoding: [0xf0,0xff,0xdf,0x5c]
+# CHECK-LE: xvcmpgtdp. 7, 63, 27               # encoding: [0x5c,0xdf,0xff,0xf0]
+            xvcmpgtdp. 7, 63, 27
+# CHECK-BE: xvcmpgtsp 7, 63, 27                # encoding: [0xf0,0xff,0xda,0x5c]
+# CHECK-LE: xvcmpgtsp 7, 63, 27                # encoding: [0x5c,0xda,0xff,0xf0]
+            xvcmpgtsp 7, 63, 27
+# CHECK-BE: xvcmpgtsp. 7, 63, 27               # encoding: [0xf0,0xff,0xde,0x5c]
+# CHECK-LE: xvcmpgtsp. 7, 63, 27               # encoding: [0x5c,0xde,0xff,0xf0]
+            xvcmpgtsp. 7, 63, 27
+# CHECK-BE: xvcpsgndp 7, 63, 27                # encoding: [0xf0,0xff,0xdf,0x84]
+# CHECK-LE: xvcpsgndp 7, 63, 27                # encoding: [0x84,0xdf,0xff,0xf0]
+            xvcpsgndp 7, 63, 27
+# CHECK-BE: xvcpsgnsp 7, 63, 27                # encoding: [0xf0,0xff,0xde,0x84]
+# CHECK-LE: xvcpsgnsp 7, 63, 27                # encoding: [0x84,0xde,0xff,0xf0]
+            xvcpsgnsp 7, 63, 27
+# CHECK-BE: xvcvdpsp 7, 27                     # encoding: [0xf0,0xe0,0xde,0x24]
+# CHECK-LE: xvcvdpsp 7, 27                     # encoding: [0x24,0xde,0xe0,0xf0]
+            xvcvdpsp 7, 27
+# CHECK-BE: xvcvdpsxds 7, 27                   # encoding: [0xf0,0xe0,0xdf,0x60]
+# CHECK-LE: xvcvdpsxds 7, 27                   # encoding: [0x60,0xdf,0xe0,0xf0]
+            xvcvdpsxds 7, 27
+# CHECK-BE: xvcvdpsxws 7, 27                   # encoding: [0xf0,0xe0,0xdb,0x60]
+# CHECK-LE: xvcvdpsxws 7, 27                   # encoding: [0x60,0xdb,0xe0,0xf0]
+            xvcvdpsxws 7, 27
+# CHECK-BE: xvcvdpuxds 7, 27                   # encoding: [0xf0,0xe0,0xdf,0x20]
+# CHECK-LE: xvcvdpuxds 7, 27                   # encoding: [0x20,0xdf,0xe0,0xf0]
+            xvcvdpuxds 7, 27
+# CHECK-BE: xvcvdpuxws 7, 27                   # encoding: [0xf0,0xe0,0xdb,0x20]
+# CHECK-LE: xvcvdpuxws 7, 27                   # encoding: [0x20,0xdb,0xe0,0xf0]
+            xvcvdpuxws 7, 27
+# CHECK-BE: xvcvspdp 7, 27                     # encoding: [0xf0,0xe0,0xdf,0x24]
+# CHECK-LE: xvcvspdp 7, 27                     # encoding: [0x24,0xdf,0xe0,0xf0]
+            xvcvspdp 7, 27
+# CHECK-BE: xvcvspsxds 7, 27                   # encoding: [0xf0,0xe0,0xde,0x60]
+# CHECK-LE: xvcvspsxds 7, 27                   # encoding: [0x60,0xde,0xe0,0xf0]
+            xvcvspsxds 7, 27
+# CHECK-BE: xvcvspsxws 7, 27                   # encoding: [0xf0,0xe0,0xda,0x60]
+# CHECK-LE: xvcvspsxws 7, 27                   # encoding: [0x60,0xda,0xe0,0xf0]
+            xvcvspsxws 7, 27
+# CHECK-BE: xvcvspuxds 7, 27                   # encoding: [0xf0,0xe0,0xde,0x20]
+# CHECK-LE: xvcvspuxds 7, 27                   # encoding: [0x20,0xde,0xe0,0xf0]
+            xvcvspuxds 7, 27
+# CHECK-BE: xvcvspuxws 7, 27                   # encoding: [0xf0,0xe0,0xda,0x20]
+# CHECK-LE: xvcvspuxws 7, 27                   # encoding: [0x20,0xda,0xe0,0xf0]
+            xvcvspuxws 7, 27
+# CHECK-BE: xvcvsxddp 7, 27                    # encoding: [0xf0,0xe0,0xdf,0xe0]
+# CHECK-LE: xvcvsxddp 7, 27                    # encoding: [0xe0,0xdf,0xe0,0xf0]
+            xvcvsxddp 7, 27
+# CHECK-BE: xvcvsxdsp 7, 27                    # encoding: [0xf0,0xe0,0xde,0xe0]
+# CHECK-LE: xvcvsxdsp 7, 27                    # encoding: [0xe0,0xde,0xe0,0xf0]
+            xvcvsxdsp 7, 27
+# CHECK-BE: xvcvsxwdp 7, 27                    # encoding: [0xf0,0xe0,0xdb,0xe0]
+# CHECK-LE: xvcvsxwdp 7, 27                    # encoding: [0xe0,0xdb,0xe0,0xf0]
+            xvcvsxwdp 7, 27
+# CHECK-BE: xvcvsxwsp 7, 27                    # encoding: [0xf0,0xe0,0xda,0xe0]
+# CHECK-LE: xvcvsxwsp 7, 27                    # encoding: [0xe0,0xda,0xe0,0xf0]
+            xvcvsxwsp 7, 27
+# CHECK-BE: xvcvuxddp 7, 27                    # encoding: [0xf0,0xe0,0xdf,0xa0]
+# CHECK-LE: xvcvuxddp 7, 27                    # encoding: [0xa0,0xdf,0xe0,0xf0]
+            xvcvuxddp 7, 27
+# CHECK-BE: xvcvuxdsp 7, 27                    # encoding: [0xf0,0xe0,0xde,0xa0]
+# CHECK-LE: xvcvuxdsp 7, 27                    # encoding: [0xa0,0xde,0xe0,0xf0]
+            xvcvuxdsp 7, 27
+# CHECK-BE: xvcvuxwdp 7, 27                    # encoding: [0xf0,0xe0,0xdb,0xa0]
+# CHECK-LE: xvcvuxwdp 7, 27                    # encoding: [0xa0,0xdb,0xe0,0xf0]
+            xvcvuxwdp 7, 27
+# CHECK-BE: xvcvuxwsp 7, 27                    # encoding: [0xf0,0xe0,0xda,0xa0]
+# CHECK-LE: xvcvuxwsp 7, 27                    # encoding: [0xa0,0xda,0xe0,0xf0]
+            xvcvuxwsp 7, 27
+# CHECK-BE: xvdivdp 7, 63, 27                  # encoding: [0xf0,0xff,0xdb,0xc4]
+# CHECK-LE: xvdivdp 7, 63, 27                  # encoding: [0xc4,0xdb,0xff,0xf0]
+            xvdivdp 7, 63, 27
+# CHECK-BE: xvdivsp 7, 63, 27                  # encoding: [0xf0,0xff,0xda,0xc4]
+# CHECK-LE: xvdivsp 7, 63, 27                  # encoding: [0xc4,0xda,0xff,0xf0]
+            xvdivsp 7, 63, 27
+# CHECK-BE: xvmaddadp 7, 63, 27                # encoding: [0xf0,0xff,0xdb,0x0c]
+# CHECK-LE: xvmaddadp 7, 63, 27                # encoding: [0x0c,0xdb,0xff,0xf0]
+            xvmaddadp 7, 63, 27
+# CHECK-BE: xvmaddasp 7, 63, 27                # encoding: [0xf0,0xff,0xda,0x0c]
+# CHECK-LE: xvmaddasp 7, 63, 27                # encoding: [0x0c,0xda,0xff,0xf0]
+            xvmaddasp 7, 63, 27
+# CHECK-BE: xvmaddmdp 7, 63, 27                # encoding: [0xf0,0xff,0xdb,0x4c]
+# CHECK-LE: xvmaddmdp 7, 63, 27                # encoding: [0x4c,0xdb,0xff,0xf0]
+            xvmaddmdp 7, 63, 27
+# CHECK-BE: xvmaddmsp 7, 63, 27                # encoding: [0xf0,0xff,0xda,0x4c]
+# CHECK-LE: xvmaddmsp 7, 63, 27                # encoding: [0x4c,0xda,0xff,0xf0]
+            xvmaddmsp 7, 63, 27
+# CHECK-BE: xvmaxdp 7, 63, 27                  # encoding: [0xf0,0xff,0xdf,0x04]
+# CHECK-LE: xvmaxdp 7, 63, 27                  # encoding: [0x04,0xdf,0xff,0xf0]
+            xvmaxdp 7, 63, 27
+# CHECK-BE: xvmaxsp 7, 63, 27                  # encoding: [0xf0,0xff,0xde,0x04]
+# CHECK-LE: xvmaxsp 7, 63, 27                  # encoding: [0x04,0xde,0xff,0xf0]
+            xvmaxsp 7, 63, 27
+# CHECK-BE: xvmindp 7, 63, 27                  # encoding: [0xf0,0xff,0xdf,0x44]
+# CHECK-LE: xvmindp 7, 63, 27                  # encoding: [0x44,0xdf,0xff,0xf0]
+            xvmindp 7, 63, 27
+# CHECK-BE: xvminsp 7, 63, 27                  # encoding: [0xf0,0xff,0xde,0x44]
+# CHECK-LE: xvminsp 7, 63, 27                  # encoding: [0x44,0xde,0xff,0xf0]
+            xvminsp 7, 63, 27
+# CHECK-BE: xvcpsgndp 7, 63, 63                # encoding: [0xf0,0xff,0xff,0x86]
+# CHECK-LE: xvcpsgndp 7, 63, 63                # encoding: [0x86,0xff,0xff,0xf0]
+            xvmovdp 7, 63
+# CHECK-BE: xvcpsgnsp 7, 63, 63                # encoding: [0xf0,0xff,0xfe,0x86]
+# CHECK-LE: xvcpsgnsp 7, 63, 63                # encoding: [0x86,0xfe,0xff,0xf0]
+            xvmovsp 7, 63
+# CHECK-BE: xvmsubadp 7, 63, 27                # encoding: [0xf0,0xff,0xdb,0x8c]
+# CHECK-LE: xvmsubadp 7, 63, 27                # encoding: [0x8c,0xdb,0xff,0xf0]
+            xvmsubadp 7, 63, 27
+# CHECK-BE: xvmsubasp 7, 63, 27                # encoding: [0xf0,0xff,0xda,0x8c]
+# CHECK-LE: xvmsubasp 7, 63, 27                # encoding: [0x8c,0xda,0xff,0xf0]
+            xvmsubasp 7, 63, 27
+# CHECK-BE: xvmsubmdp 7, 63, 27                # encoding: [0xf0,0xff,0xdb,0xcc]
+# CHECK-LE: xvmsubmdp 7, 63, 27                # encoding: [0xcc,0xdb,0xff,0xf0]
+            xvmsubmdp 7, 63, 27
+# CHECK-BE: xvmsubmsp 7, 63, 27                # encoding: [0xf0,0xff,0xda,0xcc]
+# CHECK-LE: xvmsubmsp 7, 63, 27                # encoding: [0xcc,0xda,0xff,0xf0]
+            xvmsubmsp 7, 63, 27
+# CHECK-BE: xvmuldp 7, 63, 27                  # encoding: [0xf0,0xff,0xdb,0x84]
+# CHECK-LE: xvmuldp 7, 63, 27                  # encoding: [0x84,0xdb,0xff,0xf0]
+            xvmuldp 7, 63, 27
+# CHECK-BE: xvmulsp 7, 63, 27                  # encoding: [0xf0,0xff,0xda,0x84]
+# CHECK-LE: xvmulsp 7, 63, 27                  # encoding: [0x84,0xda,0xff,0xf0]
+            xvmulsp 7, 63, 27
+# CHECK-BE: xvnabsdp 7, 27                     # encoding: [0xf0,0xe0,0xdf,0xa4]
+# CHECK-LE: xvnabsdp 7, 27                     # encoding: [0xa4,0xdf,0xe0,0xf0]
+            xvnabsdp 7, 27
+# CHECK-BE: xvnabssp 7, 27                     # encoding: [0xf0,0xe0,0xde,0xa4]
+# CHECK-LE: xvnabssp 7, 27                     # encoding: [0xa4,0xde,0xe0,0xf0]
+            xvnabssp 7, 27
+# CHECK-BE: xvnegdp 7, 27                      # encoding: [0xf0,0xe0,0xdf,0xe4]
+# CHECK-LE: xvnegdp 7, 27                      # encoding: [0xe4,0xdf,0xe0,0xf0]
+            xvnegdp 7, 27
+# CHECK-BE: xvnegsp 7, 27                      # encoding: [0xf0,0xe0,0xde,0xe4]
+# CHECK-LE: xvnegsp 7, 27                      # encoding: [0xe4,0xde,0xe0,0xf0]
+            xvnegsp 7, 27
+# CHECK-BE: xvnmaddadp 7, 63, 27               # encoding: [0xf0,0xff,0xdf,0x0c]
+# CHECK-LE: xvnmaddadp 7, 63, 27               # encoding: [0x0c,0xdf,0xff,0xf0]
+            xvnmaddadp 7, 63, 27
+# CHECK-BE: xvnmaddasp 7, 63, 27               # encoding: [0xf0,0xff,0xde,0x0c]
+# CHECK-LE: xvnmaddasp 7, 63, 27               # encoding: [0x0c,0xde,0xff,0xf0]
+            xvnmaddasp 7, 63, 27
+# CHECK-BE: xvnmaddmdp 7, 63, 27               # encoding: [0xf0,0xff,0xdf,0x4c]
+# CHECK-LE: xvnmaddmdp 7, 63, 27               # encoding: [0x4c,0xdf,0xff,0xf0]
+            xvnmaddmdp 7, 63, 27
+# CHECK-BE: xvnmaddmsp 7, 63, 27               # encoding: [0xf0,0xff,0xde,0x4c]
+# CHECK-LE: xvnmaddmsp 7, 63, 27               # encoding: [0x4c,0xde,0xff,0xf0]
+            xvnmaddmsp 7, 63, 27
+# CHECK-BE: xvnmsubadp 7, 63, 27               # encoding: [0xf0,0xff,0xdf,0x8c]
+# CHECK-LE: xvnmsubadp 7, 63, 27               # encoding: [0x8c,0xdf,0xff,0xf0]
+            xvnmsubadp 7, 63, 27
+# CHECK-BE: xvnmsubasp 7, 63, 27               # encoding: [0xf0,0xff,0xde,0x8c]
+# CHECK-LE: xvnmsubasp 7, 63, 27               # encoding: [0x8c,0xde,0xff,0xf0]
+            xvnmsubasp 7, 63, 27
+# CHECK-BE: xvnmsubmdp 7, 63, 27               # encoding: [0xf0,0xff,0xdf,0xcc]
+# CHECK-LE: xvnmsubmdp 7, 63, 27               # encoding: [0xcc,0xdf,0xff,0xf0]
+            xvnmsubmdp 7, 63, 27
+# CHECK-BE: xvnmsubmsp 7, 63, 27               # encoding: [0xf0,0xff,0xde,0xcc]
+# CHECK-LE: xvnmsubmsp 7, 63, 27               # encoding: [0xcc,0xde,0xff,0xf0]
+            xvnmsubmsp 7, 63, 27
+# CHECK-BE: xvrdpi 7, 27                       # encoding: [0xf0,0xe0,0xdb,0x24]
+# CHECK-LE: xvrdpi 7, 27                       # encoding: [0x24,0xdb,0xe0,0xf0]
+            xvrdpi 7, 27
+# CHECK-BE: xvrdpic 7, 27                      # encoding: [0xf0,0xe0,0xdb,0xac]
+# CHECK-LE: xvrdpic 7, 27                      # encoding: [0xac,0xdb,0xe0,0xf0]
+            xvrdpic 7, 27
+# CHECK-BE: xvrdpim 7, 27                      # encoding: [0xf0,0xe0,0xdb,0xe4]
+# CHECK-LE: xvrdpim 7, 27                      # encoding: [0xe4,0xdb,0xe0,0xf0]
+            xvrdpim 7, 27
+# CHECK-BE: xvrdpip 7, 27                      # encoding: [0xf0,0xe0,0xdb,0xa4]
+# CHECK-LE: xvrdpip 7, 27                      # encoding: [0xa4,0xdb,0xe0,0xf0]
+            xvrdpip 7, 27
+# CHECK-BE: xvrdpiz 7, 27                      # encoding: [0xf0,0xe0,0xdb,0x64]
+# CHECK-LE: xvrdpiz 7, 27                      # encoding: [0x64,0xdb,0xe0,0xf0]
+            xvrdpiz 7, 27
+# CHECK-BE: xvredp 7, 27                       # encoding: [0xf0,0xe0,0xdb,0x68]
+# CHECK-LE: xvredp 7, 27                       # encoding: [0x68,0xdb,0xe0,0xf0]
+            xvredp 7, 27
+# CHECK-BE: xvresp 7, 27                       # encoding: [0xf0,0xe0,0xda,0x68]
+# CHECK-LE: xvresp 7, 27                       # encoding: [0x68,0xda,0xe0,0xf0]
+            xvresp 7, 27
+# CHECK-BE: xvrspi 7, 27                       # encoding: [0xf0,0xe0,0xda,0x24]
+# CHECK-LE: xvrspi 7, 27                       # encoding: [0x24,0xda,0xe0,0xf0]
+            xvrspi 7, 27
+# CHECK-BE: xvrspic 7, 27                      # encoding: [0xf0,0xe0,0xda,0xac]
+# CHECK-LE: xvrspic 7, 27                      # encoding: [0xac,0xda,0xe0,0xf0]
+            xvrspic 7, 27
+# CHECK-BE: xvrspim 7, 27                      # encoding: [0xf0,0xe0,0xda,0xe4]
+# CHECK-LE: xvrspim 7, 27                      # encoding: [0xe4,0xda,0xe0,0xf0]
+            xvrspim 7, 27
+# CHECK-BE: xvrspip 7, 27                      # encoding: [0xf0,0xe0,0xda,0xa4]
+# CHECK-LE: xvrspip 7, 27                      # encoding: [0xa4,0xda,0xe0,0xf0]
+            xvrspip 7, 27
+# CHECK-BE: xvrspiz 7, 27                      # encoding: [0xf0,0xe0,0xda,0x64]
+# CHECK-LE: xvrspiz 7, 27                      # encoding: [0x64,0xda,0xe0,0xf0]
+            xvrspiz 7, 27
+# CHECK-BE: xvrsqrtedp 7, 27                   # encoding: [0xf0,0xe0,0xdb,0x28]
+# CHECK-LE: xvrsqrtedp 7, 27                   # encoding: [0x28,0xdb,0xe0,0xf0]
+            xvrsqrtedp 7, 27
+# CHECK-BE: xvrsqrtesp 7, 27                   # encoding: [0xf0,0xe0,0xda,0x28]
+# CHECK-LE: xvrsqrtesp 7, 27                   # encoding: [0x28,0xda,0xe0,0xf0]
+            xvrsqrtesp 7, 27
+# CHECK-BE: xvsqrtdp 7, 27                     # encoding: [0xf0,0xe0,0xdb,0x2c]
+# CHECK-LE: xvsqrtdp 7, 27                     # encoding: [0x2c,0xdb,0xe0,0xf0]
+            xvsqrtdp 7, 27
+# CHECK-BE: xvsqrtsp 7, 27                     # encoding: [0xf0,0xe0,0xda,0x2c]
+# CHECK-LE: xvsqrtsp 7, 27                     # encoding: [0x2c,0xda,0xe0,0xf0]
+            xvsqrtsp 7, 27
+# CHECK-BE: xvsubdp 7, 63, 27                  # encoding: [0xf0,0xff,0xdb,0x44]
+# CHECK-LE: xvsubdp 7, 63, 27                  # encoding: [0x44,0xdb,0xff,0xf0]
+            xvsubdp 7, 63, 27
+# CHECK-BE: xvsubsp 7, 63, 27                  # encoding: [0xf0,0xff,0xda,0x44]
+# CHECK-LE: xvsubsp 7, 63, 27                  # encoding: [0x44,0xda,0xff,0xf0]
+            xvsubsp 7, 63, 27
+# CHECK-BE: xvtdivdp 6, 63, 27                 # encoding: [0xf3,0x1f,0xdb,0xec]
+# CHECK-LE: xvtdivdp 6, 63, 27                 # encoding: [0xec,0xdb,0x1f,0xf3]
+            xvtdivdp 6, 63, 27
+# CHECK-BE: xvtdivsp 6, 63, 27                 # encoding: [0xf3,0x1f,0xda,0xec]
+# CHECK-LE: xvtdivsp 6, 63, 27                 # encoding: [0xec,0xda,0x1f,0xf3]
+            xvtdivsp 6, 63, 27
+# CHECK-BE: xvtsqrtdp 6, 27                    # encoding: [0xf3,0x00,0xdb,0xa8]
+# CHECK-LE: xvtsqrtdp 6, 27                    # encoding: [0xa8,0xdb,0x00,0xf3]
+            xvtsqrtdp 6, 27
+# CHECK-BE: xvtsqrtsp 6, 27                    # encoding: [0xf3,0x00,0xda,0xa8]
+# CHECK-LE: xvtsqrtsp 6, 27                    # encoding: [0xa8,0xda,0x00,0xf3]
+            xvtsqrtsp 6, 27
+# CHECK-BE: xxland 7, 63, 27                   # encoding: [0xf0,0xff,0xdc,0x14]
+# CHECK-LE: xxland 7, 63, 27                   # encoding: [0x14,0xdc,0xff,0xf0]
+            xxland 7, 63, 27
+# CHECK-BE: xxlandc 7, 63, 27                  # encoding: [0xf0,0xff,0xdc,0x54]
+# CHECK-LE: xxlandc 7, 63, 27                  # encoding: [0x54,0xdc,0xff,0xf0]
+            xxlandc 7, 63, 27
+# CHECK-BE: xxlnor 7, 63, 27                   # encoding: [0xf0,0xff,0xdd,0x14]
+# CHECK-LE: xxlnor 7, 63, 27                   # encoding: [0x14,0xdd,0xff,0xf0]
+            xxlnor 7, 63, 27
+# CHECK-BE: xxlor 7, 63, 27                    # encoding: [0xf0,0xff,0xdc,0x94]
+# CHECK-LE: xxlor 7, 63, 27                    # encoding: [0x94,0xdc,0xff,0xf0]
+            xxlor 7, 63, 27
+# CHECK-BE: xxlxor 7, 63, 27                   # encoding: [0xf0,0xff,0xdc,0xd4]
+# CHECK-LE: xxlxor 7, 63, 27                   # encoding: [0xd4,0xdc,0xff,0xf0]
+            xxlxor 7, 63, 27
+# CHECK-BE: xxpermdi 7, 63, 27, 0              # encoding: [0xf0,0xff,0xd8,0x54]
+# CHECK-LE: xxpermdi 7, 63, 27, 0              # encoding: [0x54,0xd8,0xff,0xf0]
+            xxmrghd 7, 63, 27
+# CHECK-BE: xxmrghw 7, 63, 27                  # encoding: [0xf0,0xff,0xd8,0x94]
+# CHECK-LE: xxmrghw 7, 63, 27                  # encoding: [0x94,0xd8,0xff,0xf0]
+            xxmrghw 7, 63, 27
+# CHECK-BE: xxpermdi 7, 63, 27, 3              # encoding: [0xf0,0xff,0xdb,0x54]
+# CHECK-LE: xxpermdi 7, 63, 27, 3              # encoding: [0x54,0xdb,0xff,0xf0]
+            xxmrgld 7, 63, 27
+# CHECK-BE: xxmrglw 7, 63, 27                  # encoding: [0xf0,0xff,0xd9,0x94]
+# CHECK-LE: xxmrglw 7, 63, 27                  # encoding: [0x94,0xd9,0xff,0xf0]
+            xxmrglw 7, 63, 27
+# CHECK-BE: xxpermdi 7, 63, 27, 2              # encoding: [0xf0,0xff,0xda,0x54]
+# CHECK-LE: xxpermdi 7, 63, 27, 2              # encoding: [0x54,0xda,0xff,0xf0]
+            xxpermdi 7, 63, 27, 2
+# CHECK-BE: xxsel 7, 63, 27, 14                # encoding: [0xf0,0xff,0xdb,0xb4]
+# CHECK-LE: xxsel 7, 63, 27, 14                # encoding: [0xb4,0xdb,0xff,0xf0]
+            xxsel 7, 63, 27, 14
+# CHECK-BE: xxsldwi 7, 63, 27, 1               # encoding: [0xf0,0xff,0xd9,0x14]
+# CHECK-LE: xxsldwi 7, 63, 27, 1               # encoding: [0x14,0xd9,0xff,0xf0]
+            xxsldwi 7, 63, 27, 1
+# CHECK-BE: xxpermdi 7, 63, 63, 3              # encoding: [0xf0,0xff,0xfb,0x56]
+# CHECK-LE: xxpermdi 7, 63, 63, 3              # encoding: [0x56,0xfb,0xff,0xf0]
+            xxspltd 7, 63, 1
+# CHECK-BE: xxspltw 7, 27, 3                   # encoding: [0xf0,0xe3,0xda,0x90]
+# CHECK-LE: xxspltw 7, 27, 3                   # encoding: [0x90,0xda,0xe3,0xf0]
+            xxspltw 7, 27, 3
+# CHECK-BE: xxpermdi 7, 63, 63, 2              # encoding: [0xf0,0xff,0xfa,0x56]
+# CHECK-LE: xxpermdi 7, 63, 63, 2              # encoding: [0x56,0xfa,0xff,0xf0]
+            xxswapd 7, 63
diff --git a/test/MC/Sparc/lit.local.cfg b/test/MC/Sparc/lit.local.cfg
new file mode 100644
index 0000000..4d344fa
--- /dev/null
+++ b/test/MC/Sparc/lit.local.cfg
@@ -0,0 +1,4 @@
+targets = set(config.root.targets_to_build.split())
+if not 'Sparc' in targets:
+    config.unsupported = True
+
diff --git a/test/MC/Sparc/sparc-alu-instructions.s b/test/MC/Sparc/sparc-alu-instructions.s
new file mode 100644
index 0000000..afebf64
--- /dev/null
+++ b/test/MC/Sparc/sparc-alu-instructions.s
@@ -0,0 +1,128 @@
+! RUN: llvm-mc %s -arch=sparc   -show-encoding | FileCheck %s
+! RUN: llvm-mc %s -arch=sparcv9 -show-encoding | FileCheck %s
+
+        ! CHECK: add %g0, %g0, %g0    ! encoding: [0x80,0x00,0x00,0x00]
+        add %g0, %g0, %g0
+        ! CHECK: add %g1, %g2, %g3    ! encoding: [0x86,0x00,0x40,0x02]
+        add %g1, %g2, %g3
+        ! CHECK: add %o0, %o1, %l0    ! encoding: [0xa0,0x02,0x00,0x09]
+        add %r8, %r9, %l0
+        ! CHECK: add %o0, 10,  %l0    ! encoding: [0xa0,0x02,0x20,0x0a]
+        add %o0, 10, %l0
+
+        ! CHECK: addcc %g1, %g2, %g3  ! encoding: [0x86,0x80,0x40,0x02]
+        addcc %g1, %g2, %g3
+
+        ! CHECK: addxcc %g1, %g2, %g3 ! encoding: [0x86,0xc0,0x40,0x02]
+        addxcc %g1, %g2, %g3
+
+        ! CHECK: udiv %g1, %g2, %g3   ! encoding: [0x86,0x70,0x40,0x02]
+        udiv %g1, %g2, %g3
+
+        ! CHECK: sdiv %g1, %g2, %g3   ! encoding: [0x86,0x78,0x40,0x02]
+        sdiv %g1, %g2, %g3
+
+        ! CHECK: and %g1, %g2, %g3    ! encoding: [0x86,0x08,0x40,0x02]
+        and %g1, %g2, %g3
+        ! CHECK: andn %g1, %g2, %g3   ! encoding: [0x86,0x28,0x40,0x02]
+        andn %g1, %g2, %g3
+        ! CHECK: or %g1, %g2, %g3     ! encoding: [0x86,0x10,0x40,0x02]
+        or  %g1, %g2, %g3
+        ! CHECK: orn %g1, %g2, %g3    ! encoding: [0x86,0x30,0x40,0x02]
+        orn %g1, %g2, %g3
+        ! CHECK: xor %g1, %g2, %g3    ! encoding: [0x86,0x18,0x40,0x02]
+        xor %g1, %g2, %g3
+        ! CHECK: xnor %g1, %g2, %g3   ! encoding: [0x86,0x38,0x40,0x02]
+        xnor %g1, %g2, %g3
+
+        ! CHECK: umul %g1, %g2, %g3   ! encoding: [0x86,0x50,0x40,0x02]
+        umul %g1, %g2, %g3
+
+        ! CHECK: smul %g1, %g2, %g3   ! encoding: [0x86,0x58,0x40,0x02]
+        smul %g1, %g2, %g3
+
+        ! CHECK: nop                  ! encoding: [0x01,0x00,0x00,0x00]
+        nop
+
+        ! CHECK: sethi 10, %l0        ! encoding: [0x21,0x00,0x00,0x0a]
+        sethi 10, %l0
+
+        ! CHECK: sll %g1, %g2, %g3    ! encoding: [0x87,0x28,0x40,0x02]
+        sll %g1, %g2, %g3
+        ! CHECK: sll %g1, 31, %g3     ! encoding: [0x87,0x28,0x60,0x1f]
+        sll %g1, 31, %g3
+
+        ! CHECK: srl %g1, %g2, %g3    ! encoding: [0x87,0x30,0x40,0x02]
+        srl %g1, %g2, %g3
+        ! CHECK: srl %g1, 31, %g3     ! encoding: [0x87,0x30,0x60,0x1f]
+        srl %g1, 31, %g3
+
+        ! CHECK: sra %g1, %g2, %g3    ! encoding: [0x87,0x38,0x40,0x02]
+        sra %g1, %g2, %g3
+        ! CHECK: sra %g1, 31, %g3     ! encoding: [0x87,0x38,0x60,0x1f]
+        sra %g1, 31, %g3
+
+        ! CHECK: sub %g1, %g2, %g3    ! encoding: [0x86,0x20,0x40,0x02]
+        sub %g1, %g2, %g3
+        ! CHECK: subcc %g1, %g2, %g3  ! encoding: [0x86,0xa0,0x40,0x02]
+        subcc %g1, %g2, %g3
+
+        ! CHECK: subxcc %g1, %g2, %g3 ! encoding: [0x86,0xe0,0x40,0x02]
+        subxcc %g1, %g2, %g3
+
+        ! CHECK: or %g0, %g1, %g3     ! encoding: [0x86,0x10,0x00,0x01]
+        mov %g1, %g3
+
+        ! CHECK: or %g0, 255, %g3     ! encoding: [0x86,0x10,0x20,0xff]
+        mov 0xff, %g3
+
+        ! CHECK: restore              ! encoding: [0x81,0xe8,0x00,0x00]
+        restore %g0, %g0, %g0
+
+        ! CHECK: addx %g2, %g1, %g3              ! encoding: [0x86,0x40,0x80,0x01]
+        addx %g2, %g1, %g3
+
+        ! CHECK:  subx %g2, %g1, %g3              ! encoding: [0x86,0x60,0x80,0x01]
+        subx %g2, %g1, %g3
+
+        ! CHECK:  umulcc %g2, %g1, %g3            ! encoding: [0x86,0xd0,0x80,0x01]
+        umulcc %g2, %g1, %g3
+
+        ! CHECK:  smulcc %g2, %g1, %g3            ! encoding: [0x86,0xd8,0x80,0x01]
+        smulcc %g2, %g1, %g3
+
+        ! CHECK:  udivcc %g2, %g1, %g3            ! encoding: [0x86,0xf0,0x80,0x01]
+        udivcc %g2, %g1, %g3
+
+        ! CHECK:  sdivcc %g2, %g1, %g3            ! encoding: [0x86,0xf8,0x80,0x01]
+        sdivcc %g2, %g1, %g3
+
+        ! CHECK:  andcc %g2, %g1, %g3             ! encoding: [0x86,0x88,0x80,0x01]
+        andcc %g2, %g1, %g3
+
+        ! CHECK:  andncc %g2, %g1, %g3            ! encoding: [0x86,0xa8,0x80,0x01]
+        andncc %g2, %g1, %g3
+
+        ! CHECK:  orcc %g2, %g1, %g3              ! encoding: [0x86,0x90,0x80,0x01]
+        orcc %g2, %g1, %g3
+
+        ! CHECK:  orncc %g2, %g1, %g3             ! encoding: [0x86,0xb0,0x80,0x01]
+        orncc %g2, %g1, %g3
+
+        ! CHECK:  xorcc %g2, %g1, %g3             ! encoding: [0x86,0x98,0x80,0x01]
+        xorcc %g2, %g1, %g3
+
+        ! CHECK:  xnorcc %g2, %g1, %g3            ! encoding: [0x86,0xb8,0x80,0x01]
+        xnorcc %g2, %g1, %g3
+
+        ! CHECK:  taddcc %g2, %g1, %g3            ! encoding: [0x87,0x00,0x80,0x01]
+        taddcc %g2, %g1, %g3
+
+        ! CHECK:  tsubcc %g2, %g1, %g3            ! encoding: [0x87,0x08,0x80,0x01]
+        tsubcc %g2, %g1, %g3
+
+        ! CHECK:  taddcctv %g2, %g1, %g3          ! encoding: [0x87,0x10,0x80,0x01]
+        taddcctv %g2, %g1, %g3
+
+        ! CHECK:  tsubcctv %g2, %g1, %g3          ! encoding: [0x87,0x18,0x80,0x01]
+        tsubcctv %g2, %g1, %g3
diff --git a/test/MC/Sparc/sparc-atomic-instructions.s b/test/MC/Sparc/sparc-atomic-instructions.s
new file mode 100644
index 0000000..5c46067
--- /dev/null
+++ b/test/MC/Sparc/sparc-atomic-instructions.s
@@ -0,0 +1,19 @@
+! RUN: llvm-mc %s -arch=sparcv9 -show-encoding | FileCheck %s
+
+        ! CHECK: membar 15             ! encoding: [0x81,0x43,0xe0,0x0f]
+        membar 15
+
+        ! CHECK: stbar                 ! encoding: [0x81,0x43,0xc0,0x00]
+        stbar
+
+        ! CHECK: swap [%i0+%l6], %o2   ! encoding: [0xd4,0x7e,0x00,0x16]
+        swap [%i0+%l6], %o2
+
+        ! CHECK: swap [%i0+32], %o2    ! encoding: [0xd4,0x7e,0x20,0x20]
+        swap [%i0+32], %o2
+
+        ! CHECK: cas [%i0], %l6, %o2   ! encoding: [0xd5,0xe6,0x10,0x16]
+        cas [%i0], %l6, %o2
+
+        ! CHECK: casx [%i0], %l6, %o2  ! encoding: [0xd5,0xf6,0x10,0x16]
+        casx [%i0], %l6, %o2
diff --git a/test/MC/Sparc/sparc-ctrl-instructions.s b/test/MC/Sparc/sparc-ctrl-instructions.s
new file mode 100644
index 0000000..cf92e70
--- /dev/null
+++ b/test/MC/Sparc/sparc-ctrl-instructions.s
@@ -0,0 +1,278 @@
+! RUN: llvm-mc %s -arch=sparc   -show-encoding | FileCheck %s
+! RUN: llvm-mc %s -arch=sparcv9 -show-encoding | FileCheck %s
+
+        ! CHECK: call foo     ! encoding: [0b01AAAAAA,A,A,A]
+        ! CHECK:              !   fixup A - offset: 0, value: foo, kind: fixup_sparc_call30
+        call foo
+
+        ! CHECK: call %g1+%i2 ! encoding: [0x9f,0xc0,0x40,0x1a]
+        call %g1 + %i2
+
+        ! CHECK: call %o1+8   ! encoding: [0x9f,0xc2,0x60,0x08]
+        call %o1 + 8
+
+        ! CHECK: call %g1     ! encoding: [0x9f,0xc0,0x60,0x00]
+        call %g1
+
+        ! CHECK: call %g1+%lo(sym)   ! encoding: [0x9f,0xc0,0b011000AA,A]
+        ! CHECK-NEXT:                ! fixup A - offset: 0, value: %lo(sym), kind: fixup_sparc_lo10
+        call %g1+%lo(sym)
+
+        ! CHECK: jmp %g1+%i2  ! encoding: [0x81,0xc0,0x40,0x1a]
+        jmp %g1 + %i2
+
+        ! CHECK: jmp %o1+8    ! encoding: [0x81,0xc2,0x60,0x08]
+        jmp %o1 + 8
+
+        ! CHECK: jmp %g1      ! encoding: [0x81,0xc0,0x60,0x00]
+        jmp %g1
+
+        ! CHECK: jmp %g1+%lo(sym)   ! encoding: [0x81,0xc0,0b011000AA,A]
+        ! CHECK-NEXT:                ! fixup A - offset: 0, value: %lo(sym), kind: fixup_sparc_lo10
+        jmp %g1+%lo(sym)
+
+        ! CHECK: jmpl %g1+%i2, %g2  ! encoding: [0x85,0xc0,0x40,0x1a]
+        jmpl %g1 + %i2, %g2
+
+        ! CHECK: jmpl %o1+8, %g2    ! encoding: [0x85,0xc2,0x60,0x08]
+        jmpl %o1 + 8, %g2
+
+        ! CHECK: jmpl %g1, %g2      ! encoding: [0x85,0xc0,0x60,0x00]
+        jmpl %g1, %g2
+
+        ! CHECK: jmpl %g1+%lo(sym), %g2   ! encoding: [0x85,0xc0,0b011000AA,A]
+        ! CHECK-NEXT:                     ! fixup A - offset: 0, value: %lo(sym), kind: fixup_sparc_lo10
+        jmpl %g1+%lo(sym), %g2
+
+        ! CHECK: ba .BB0      ! encoding: [0x10,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        ba .BB0
+
+        ! CHECK: bne .BB0     ! encoding: [0x12,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        bne .BB0
+
+        ! CHECK: be .BB0      ! encoding: [0x02,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        be .BB0
+
+        ! CHECK: bg .BB0      ! encoding: [0x14,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        bg .BB0
+
+        ! CHECK: ble .BB0      ! encoding: [0x04,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        ble .BB0
+
+        ! CHECK: bge .BB0      ! encoding: [0x16,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        bge .BB0
+
+        ! CHECK: bl .BB0      ! encoding: [0x06,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        bl .BB0
+
+        ! CHECK: bgu .BB0      ! encoding: [0x18,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        bgu .BB0
+
+        ! CHECK: bleu .BB0      ! encoding: [0x08,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        bleu .BB0
+
+        ! CHECK: bcc .BB0      ! encoding: [0x1a,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        bcc .BB0
+
+        ! CHECK: bcs .BB0      ! encoding: [0x0a,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        bcs .BB0
+
+        ! CHECK: bpos .BB0      ! encoding: [0x1c,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        bpos .BB0
+
+        ! CHECK: bneg .BB0      ! encoding: [0x0c,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        bneg .BB0
+
+        ! CHECK: bvc .BB0      ! encoding: [0x1e,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        bvc .BB0
+
+        ! CHECK: bvs .BB0      ! encoding: [0x0e,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        bvs .BB0
+
+        ! CHECK:             fbu .BB0                        ! encoding: [0x0f,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        fbu .BB0
+
+        ! CHECK:             fbg .BB0                        ! encoding: [0x0d,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        fbg .BB0
+        ! CHECK:             fbug .BB0                       ! encoding: [0x0b,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        fbug .BB0
+
+        ! CHECK:             fbl .BB0                        ! encoding: [0x09,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        fbl .BB0
+
+        ! CHECK:             fbul .BB0                       ! encoding: [0x07,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        fbul .BB0
+
+        ! CHECK:             fblg .BB0                       ! encoding: [0x05,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        fblg .BB0
+
+        ! CHECK:             fbne .BB0                       ! encoding: [0x03,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        fbne .BB0
+
+        ! CHECK:             fbe .BB0                        ! encoding: [0x13,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        fbe .BB0
+
+        ! CHECK:             fbue .BB0                       ! encoding: [0x15,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        fbue .BB0
+
+        ! CHECK:             fbge .BB0                       ! encoding: [0x17,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        fbge .BB0
+
+        ! CHECK:             fbuge .BB0                      ! encoding: [0x19,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        fbuge .BB0
+
+        ! CHECK:             fble .BB0                       ! encoding: [0x1b,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        fble .BB0
+
+        ! CHECK:             fbule .BB0                      ! encoding: [0x1d,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        fbule .BB0
+
+        ! CHECK:             fbo .BB0                        ! encoding: [0x1f,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        fbo .BB0
+
+        ! CHECK: ba,a .BB0    ! encoding: [0x30,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        ba,a .BB0
+
+        ! CHECK: bne,a .BB0   ! encoding: [0x32,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        bne,a .BB0
+
+        ! CHECK: be,a .BB0    ! encoding: [0x22,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        be,a .BB0
+
+        ! CHECK: bg,a .BB0    ! encoding: [0x34,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        bg,a .BB0
+
+        ! CHECK: ble,a .BB0   ! encoding: [0x24,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        ble,a .BB0
+
+        ! CHECK: bge,a .BB0   ! encoding: [0x36,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        bge,a .BB0
+
+        ! CHECK: bl,a .BB0    ! encoding: [0x26,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        bl,a .BB0
+
+        ! CHECK: bgu,a .BB0   ! encoding: [0x38,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        bgu,a .BB0
+
+        ! CHECK: bleu,a .BB0  ! encoding: [0x28,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        bleu,a .BB0
+
+        ! CHECK: bcc,a .BB0   ! encoding: [0x3a,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        bcc,a .BB0
+
+        ! CHECK: bcs,a .BB0   ! encoding: [0x2a,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        bcs,a .BB0
+
+        ! CHECK: bpos,a .BB0  ! encoding: [0x3c,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        bpos,a .BB0
+
+        ! CHECK: bneg,a .BB0  ! encoding: [0x2c,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        bneg,a .BB0
+
+        ! CHECK: bvc,a .BB0   ! encoding: [0x3e,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        bvc,a .BB0
+
+        ! CHECK: bvs,a .BB0   ! encoding: [0x2e,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        bvs,a .BB0
+
+        ! CHECK:             fbu,a .BB0                      ! encoding: [0x2f,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        fbu,a .BB0
+
+        ! CHECK:             fbg,a .BB0                      ! encoding: [0x2d,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        fbg,a .BB0
+        ! CHECK:             fbug,a .BB0                     ! encoding: [0x2b,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        fbug,a .BB0
+
+        ! CHECK:             fbl,a .BB0                      ! encoding: [0x29,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        fbl,a .BB0
+
+        ! CHECK:             fbul,a .BB0                     ! encoding: [0x27,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        fbul,a .BB0
+
+        ! CHECK:             fblg,a .BB0                     ! encoding: [0x25,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        fblg,a .BB0
+
+        ! CHECK:             fbne,a .BB0                     ! encoding: [0x23,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        fbne,a .BB0
+
+        ! CHECK:             fbe,a .BB0                      ! encoding: [0x33,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        fbe,a .BB0
+
+        ! CHECK:             fbue,a .BB0                     ! encoding: [0x35,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        fbue,a .BB0
+
+        ! CHECK:             fbge,a .BB0                     ! encoding: [0x37,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        fbge,a .BB0
+
+        ! CHECK:             fbuge,a .BB0                    ! encoding: [0x39,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        fbuge,a .BB0
+
+        ! CHECK:             fble,a .BB0                     ! encoding: [0x3b,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        fble,a .BB0
+
+        ! CHECK:             fbule,a .BB0                    ! encoding: [0x3d,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        fbule,a .BB0
+
+        ! CHECK:             fbo,a .BB0                      ! encoding: [0x3f,0b10AAAAAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
+        fbo,a .BB0
+
+        ! CHECK:  rett %i7+8   ! encoding: [0x81,0xcf,0xe0,0x08]
+        rett %i7 + 8
diff --git a/test/MC/Sparc/sparc-directive-xword.s b/test/MC/Sparc/sparc-directive-xword.s
new file mode 100644
index 0000000..0c9e249
--- /dev/null
+++ b/test/MC/Sparc/sparc-directive-xword.s
@@ -0,0 +1,10 @@
+! RUN: not llvm-mc %s -arch=sparc   -show-encoding 2>&1 | FileCheck %s --check-prefix=SPARC32
+! RUN: llvm-mc %s -arch=sparcv9 -show-encoding | FileCheck %s --check-prefix=SPARC64
+
+        ! SPARC32:       error: unknown directive
+        ! SPARC32-NEXT:  .xword 65536
+        ! SPARC32-NEXT:  ^
+
+        ! SPARC64:  .xword 65536
+        .xword 65536
+
diff --git a/test/MC/Sparc/sparc-directives.s b/test/MC/Sparc/sparc-directives.s
new file mode 100644
index 0000000..9185e4b
--- /dev/null
+++ b/test/MC/Sparc/sparc-directives.s
@@ -0,0 +1,19 @@
+! RUN: llvm-mc %s -arch=sparc   -show-encoding | FileCheck %s --check-prefix=SPARC32
+! RUN: llvm-mc %s -arch=sparcv9 -show-encoding | FileCheck %s --check-prefix=SPARC64
+
+        ! SPARC32: .byte 24
+        ! SPARC64: .byte 24
+        .byte 24
+
+        ! SPARC32: .half 1024
+        ! SPARC64: .half 1024
+        .half 1024
+
+        ! SPARC32: .word 65536
+        ! SPARC64: .word 65536
+        .word 65536
+
+        ! SPARC32: .word 65536
+        ! SPARC64: .xword 65536
+        .nword 65536
+
diff --git a/test/MC/Sparc/sparc-fp-instructions.s b/test/MC/Sparc/sparc-fp-instructions.s
new file mode 100644
index 0000000..fdeaa8c
--- /dev/null
+++ b/test/MC/Sparc/sparc-fp-instructions.s
@@ -0,0 +1,140 @@
+! RUN: llvm-mc %s -arch=sparcv9 -show-encoding | FileCheck %s
+
+        ! CHECK: fitos %f0, %f4                  ! encoding: [0x89,0xa0,0x18,0x80]
+        ! CHECK: fitod %f0, %f4                  ! encoding: [0x89,0xa0,0x19,0x00]
+        ! CHECK: fitoq %f0, %f4                  ! encoding: [0x89,0xa0,0x19,0x80]
+        fitos %f0, %f4
+        fitod %f0, %f4
+        fitoq %f0, %f4
+
+        ! CHECK: fstoi %f0, %f4                  ! encoding: [0x89,0xa0,0x1a,0x20]
+        ! CHECK: fdtoi %f0, %f4                  ! encoding: [0x89,0xa0,0x1a,0x40]
+        ! CHECK: fqtoi %f0, %f4                  ! encoding: [0x89,0xa0,0x1a,0x60]
+        fstoi %f0, %f4
+        fdtoi %f0, %f4
+        fqtoi %f0, %f4
+
+        ! CHECK: fstod %f0, %f4                  ! encoding: [0x89,0xa0,0x19,0x20]
+        ! CHECK: fstoq %f0, %f4                  ! encoding: [0x89,0xa0,0x19,0xa0]
+        fstod %f0, %f4
+        fstoq %f0, %f4
+
+        ! CHECK: fdtos %f0, %f4                  ! encoding: [0x89,0xa0,0x18,0xc0]
+        ! CHECK: fdtoq %f0, %f4                  ! encoding: [0x89,0xa0,0x19,0xc0]
+        fdtos %f0, %f4
+        fdtoq %f0, %f4
+
+        ! CHECK: fqtos %f0, %f4                  ! encoding: [0x89,0xa0,0x18,0xe0]
+        ! CHECK: fqtod %f0, %f4                  ! encoding: [0x89,0xa0,0x19,0x60]
+        fqtos %f0, %f4
+        fqtod %f0, %f4
+
+        ! CHECK: fmovs %f0, %f4                  ! encoding: [0x89,0xa0,0x00,0x20]
+        ! CHECK: fmovd %f0, %f4                  ! encoding: [0x89,0xa0,0x00,0x40]
+        ! CHECK: fmovq %f0, %f4                  ! encoding: [0x89,0xa0,0x00,0x60]
+        fmovs %f0, %f4
+        fmovd %f0, %f4
+        fmovq %f0, %f4
+
+        ! CHECK: fnegs %f0, %f4                  ! encoding: [0x89,0xa0,0x00,0xa0]
+        ! CHECK: fnegd %f0, %f4                  ! encoding: [0x89,0xa0,0x00,0xc0]
+        ! CHECK: fnegq %f0, %f4                  ! encoding: [0x89,0xa0,0x00,0xe0]
+        fnegs %f0, %f4
+        fnegd %f0, %f4
+        fnegq %f0, %f4
+
+        ! CHECK: fabss %f0, %f4                  ! encoding: [0x89,0xa0,0x01,0x20]
+        ! CHECK: fabsd %f0, %f4                  ! encoding: [0x89,0xa0,0x01,0x40]
+        ! CHECK: fabsq %f0, %f4                  ! encoding: [0x89,0xa0,0x01,0x60]
+        fabss %f0, %f4
+        fabsd %f0, %f4
+        fabsq %f0, %f4
+
+        ! CHECK: fsqrts %f0, %f4                 ! encoding: [0x89,0xa0,0x05,0x20]
+        ! CHECK: fsqrtd %f0, %f4                 ! encoding: [0x89,0xa0,0x05,0x40]
+        ! CHECK: fsqrtq %f0, %f4                 ! encoding: [0x89,0xa0,0x05,0x60]
+        fsqrts %f0, %f4
+        fsqrtd %f0, %f4
+        fsqrtq %f0, %f4
+
+        ! CHECK: fadds %f0, %f4, %f8             ! encoding: [0x91,0xa0,0x08,0x24]
+        ! CHECK: faddd %f0, %f4, %f8             ! encoding: [0x91,0xa0,0x08,0x44]
+        ! CHECK: faddq %f0, %f4, %f8             ! encoding: [0x91,0xa0,0x08,0x64]
+        fadds %f0, %f4, %f8
+        faddd %f0, %f4, %f8
+        faddq %f0, %f4, %f8
+
+        ! make sure we can handle V9 double registers and their aliased quad registers.
+        ! CHECK: faddd %f32, %f34, %f62           ! encoding: [0xbf,0xa0,0x48,0x43]
+        ! CHECK: faddq %f32, %f36, %f60           ! encoding: [0xbb,0xa0,0x48,0x65]
+        faddd %f32, %f34, %f62
+        faddq %f32, %f36, %f60
+
+        ! CHECK: fsubs %f0, %f4, %f8             ! encoding: [0x91,0xa0,0x08,0xa4]
+        ! CHECK: fsubd %f0, %f4, %f8             ! encoding: [0x91,0xa0,0x08,0xc4]
+        ! CHECK: fsubq %f0, %f4, %f8             ! encoding: [0x91,0xa0,0x08,0xe4]
+        fsubs %f0, %f4, %f8
+        fsubd %f0, %f4, %f8
+        fsubq %f0, %f4, %f8
+
+        ! CHECK: fmuls %f0, %f4, %f8             ! encoding: [0x91,0xa0,0x09,0x24]
+        ! CHECK: fmuld %f0, %f4, %f8             ! encoding: [0x91,0xa0,0x09,0x44]
+        ! CHECK: fmulq %f0, %f4, %f8             ! encoding: [0x91,0xa0,0x09,0x64]
+        fmuls %f0, %f4, %f8
+        fmuld %f0, %f4, %f8
+        fmulq %f0, %f4, %f8
+
+        ! CHECK: fsmuld %f0, %f4, %f8            ! encoding: [0x91,0xa0,0x0d,0x24]
+        ! CHECK: fdmulq %f0, %f4, %f8            ! encoding: [0x91,0xa0,0x0d,0xc4]
+        fsmuld %f0, %f4, %f8
+        fdmulq %f0, %f4, %f8
+
+        ! CHECK: fdivs %f0, %f4, %f8             ! encoding: [0x91,0xa0,0x09,0xa4]
+        ! CHECK: fdivd %f0, %f4, %f8             ! encoding: [0x91,0xa0,0x09,0xc4]
+        ! CHECK: fdivq %f0, %f4, %f8             ! encoding: [0x91,0xa0,0x09,0xe4]
+        fdivs %f0, %f4, %f8
+        fdivd %f0, %f4, %f8
+        fdivq %f0, %f4, %f8
+
+        ! CHECK: fcmps %fcc0, %f0, %f4                  ! encoding: [0x81,0xa8,0x0a,0x24]
+        ! CHECK: fcmpd %fcc0, %f0, %f4                  ! encoding: [0x81,0xa8,0x0a,0x44]
+        ! CHECK: fcmpq %fcc0, %f0, %f4                  ! encoding: [0x81,0xa8,0x0a,0x64]
+        fcmps %f0, %f4
+        fcmpd %f0, %f4
+        fcmpq %f0, %f4
+
+        ! CHECK: fcmpes %fcc0, %f0, %f4                  ! encoding: [0x81,0xa8,0x0a,0xa4]
+        ! CHECK: fcmped %fcc0, %f0, %f4                  ! encoding: [0x81,0xa8,0x0a,0xc4]
+        ! CHECK: fcmpeq %fcc0, %f0, %f4                  ! encoding: [0x81,0xa8,0x0a,0xe4]
+        fcmpes %f0, %f4
+        fcmped %f0, %f4
+        fcmpeq %f0, %f4
+
+        ! CHECK: fcmps %fcc2, %f0, %f4                  ! encoding: [0x85,0xa8,0x0a,0x24]
+        ! CHECK: fcmpd %fcc2, %f0, %f4                  ! encoding: [0x85,0xa8,0x0a,0x44]
+        ! CHECK: fcmpq %fcc2, %f0, %f4                  ! encoding: [0x85,0xa8,0x0a,0x64]
+        fcmps %fcc2, %f0, %f4
+        fcmpd %fcc2, %f0, %f4
+        fcmpq %fcc2, %f0, %f4
+
+        ! CHECK: fcmpes %fcc2, %f0, %f4                  ! encoding: [0x85,0xa8,0x0a,0xa4]
+        ! CHECK: fcmped %fcc2, %f0, %f4                  ! encoding: [0x85,0xa8,0x0a,0xc4]
+        ! CHECK: fcmpeq %fcc2, %f0, %f4                  ! encoding: [0x85,0xa8,0x0a,0xe4]
+        fcmpes %fcc2, %f0, %f4
+        fcmped %fcc2, %f0, %f4
+        fcmpeq %fcc2, %f0, %f4
+
+        ! CHECK: fxtos %f0, %f4                  ! encoding: [0x89,0xa0,0x10,0x80]
+        ! CHECK: fxtod %f0, %f4                  ! encoding: [0x89,0xa0,0x11,0x00]
+        ! CHECK: fxtoq %f0, %f4                  ! encoding: [0x89,0xa0,0x11,0x80]
+        fxtos %f0, %f4
+        fxtod %f0, %f4
+        fxtoq %f0, %f4
+
+        ! CHECK: fstox %f0, %f4                  ! encoding: [0x89,0xa0,0x10,0x20]
+        ! CHECK: fdtox %f0, %f4                  ! encoding: [0x89,0xa0,0x10,0x40]
+        ! CHECK: fqtox %f0, %f4                  ! encoding: [0x89,0xa0,0x10,0x60]
+        fstox %f0, %f4
+        fdtox %f0, %f4
+        fqtox %f0, %f4
+
diff --git a/test/MC/Sparc/sparc-mem-instructions.s b/test/MC/Sparc/sparc-mem-instructions.s
new file mode 100644
index 0000000..e8eb593
--- /dev/null
+++ b/test/MC/Sparc/sparc-mem-instructions.s
@@ -0,0 +1,58 @@
+! RUN: llvm-mc %s -arch=sparc   -show-encoding | FileCheck %s
+! RUN: llvm-mc %s -arch=sparcv9 -show-encoding | FileCheck %s
+
+        ! CHECK: ldsb [%i0+%l6], %o2  ! encoding: [0xd4,0x4e,0x00,0x16]
+        ldsb [%i0 + %l6], %o2
+        ! CHECK: ldsb [%i0+32], %o2   ! encoding: [0xd4,0x4e,0x20,0x20]
+        ldsb [%i0 + 32], %o2
+        ! CHECK: ldsb [%g1], %o4      ! encoding: [0xd8,0x48,0x60,0x00]
+        ldsb [%g1], %o4
+
+        ! CHECK: ldsh [%i0+%l6], %o2  ! encoding: [0xd4,0x56,0x00,0x16]
+        ldsh [%i0 + %l6], %o2
+        ! CHECK: ldsh [%i0+32], %o2   ! encoding: [0xd4,0x56,0x20,0x20]
+        ldsh [%i0 + 32], %o2
+        ! CHECK: ldsh [%g1], %o4      ! encoding: [0xd8,0x50,0x60,0x00]
+        ldsh [%g1], %o4
+
+        ! CHECK: ldub [%i0+%l6], %o2  ! encoding: [0xd4,0x0e,0x00,0x16]
+        ldub [%i0 + %l6], %o2
+        ! CHECK: ldub [%i0+32], %o2   ! encoding: [0xd4,0x0e,0x20,0x20]
+        ldub [%i0 + 32], %o2
+        ! CHECK: ldub [%g1], %o2      ! encoding: [0xd4,0x08,0x60,0x00]
+        ldub [%g1], %o2
+
+        ! CHECK: lduh [%i0+%l6], %o2  ! encoding: [0xd4,0x16,0x00,0x16]
+        lduh [%i0 + %l6], %o2
+        ! CHECK: lduh [%i0+32], %o2   ! encoding: [0xd4,0x16,0x20,0x20]
+        lduh [%i0 + 32], %o2
+        ! CHECK: lduh [%g1], %o2      ! encoding: [0xd4,0x10,0x60,0x00]
+        lduh [%g1], %o2
+
+        ! CHECK: ld [%i0+%l6], %o2    ! encoding: [0xd4,0x06,0x00,0x16]
+        ld [%i0 + %l6], %o2
+        ! CHECK: ld [%i0+32], %o2     ! encoding: [0xd4,0x06,0x20,0x20]
+        ld [%i0 + 32], %o2
+        ! CHECK: ld [%g1], %o2        ! encoding: [0xd4,0x00,0x60,0x00]
+        ld [%g1], %o2
+
+        ! CHECK: stb %o2, [%i0+%l6]   ! encoding: [0xd4,0x2e,0x00,0x16]
+        stb %o2, [%i0 + %l6]
+        ! CHECK: stb %o2, [%i0+32]    ! encoding: [0xd4,0x2e,0x20,0x20]
+        stb %o2, [%i0 + 32]
+        ! CHECK: stb %o2, [%g1]       ! encoding: [0xd4,0x28,0x60,0x00]
+        stb %o2, [%g1]
+
+        ! CHECK: sth %o2, [%i0+%l6]   ! encoding: [0xd4,0x36,0x00,0x16]
+        sth %o2, [%i0 + %l6]
+        ! CHECK: sth %o2, [%i0+32]    ! encoding: [0xd4,0x36,0x20,0x20]
+        sth %o2, [%i0 + 32]
+        ! CHECK: sth %o2, [%g1]       ! encoding: [0xd4,0x30,0x60,0x00]
+        sth %o2, [%g1]
+
+        ! CHECK: st %o2, [%i0+%l6]    ! encoding: [0xd4,0x26,0x00,0x16]
+        st %o2, [%i0 + %l6]
+        ! CHECK: st %o2, [%i0+32]     ! encoding: [0xd4,0x26,0x20,0x20]
+        st %o2, [%i0 + 32]
+        ! CHECK: st %o2, [%g1]        ! encoding: [0xd4,0x20,0x60,0x00]
+        st %o2, [%g1]
diff --git a/test/MC/Sparc/sparc-nop-data.s b/test/MC/Sparc/sparc-nop-data.s
new file mode 100644
index 0000000..1538505
--- /dev/null
+++ b/test/MC/Sparc/sparc-nop-data.s
@@ -0,0 +1,11 @@
+! RUN: llvm-mc %s -arch=sparc  -filetype=obj | llvm-readobj -s -sd | FileCheck %s
+! RUN: llvm-mc %s -arch=sparcv9  -filetype=obj | llvm-readobj -s -sd | FileCheck %s
+
+! CHECK: 0000: BA1F401D 01000000 01000000 01000000
+! CHECK: 0010: BA1F401D
+
+foo:
+        xor %i5, %i5, %i5
+        .align 16
+        xor %i5, %i5, %i5
+
diff --git a/test/MC/Sparc/sparc-pic.s b/test/MC/Sparc/sparc-pic.s
new file mode 100644
index 0000000..5a34d30
--- /dev/null
+++ b/test/MC/Sparc/sparc-pic.s
@@ -0,0 +1,49 @@
+! RUN: llvm-mc %s -arch=sparcv9 --relocation-model=pic -filetype=obj | llvm-readobj -r | FileCheck %s
+
+
+! CHECK:      Relocations [
+! CHECK-NOT:    0x{{[0-9,A-F]+}} R_SPARC_WPLT30 .text 0xC
+! CHECK:        0x{{[0-9,A-F]+}} R_SPARC_PC22 _GLOBAL_OFFSET_TABLE_ 0x4
+! CHECK-NEXT:   0x{{[0-9,A-F]+}} R_SPARC_PC10 _GLOBAL_OFFSET_TABLE_ 0x8
+! CHECK-NEXT:   0x{{[0-9,A-F]+}} R_SPARC_GOT22 AGlobalVar 0x0
+! CHECK-NEXT:   0x{{[0-9,A-F]+}} R_SPARC_GOT10 AGlobalVar 0x0
+! CHECK-NEXT:   0x{{[0-9,A-F]+}} R_SPARC_WPLT30 bar 0x0
+! CHECK:      ]
+
+        .text
+        .globl  foo
+        .align  4
+        .type   foo,@function
+foo:
+        .cfi_startproc
+        save %sp, -176, %sp
+        .cfi_def_cfa_register %fp
+        .cfi_window_save
+        .cfi_register 15, 31
+.Ltmp4:
+        call .Ltmp5
+.Ltmp6:
+        sethi %hi(_GLOBAL_OFFSET_TABLE_+(.Ltmp6-.Ltmp4)), %i1
+.Ltmp5:
+        or %i1, %lo(_GLOBAL_OFFSET_TABLE_+(.Ltmp5-.Ltmp4)), %i1
+        add %i1, %o7, %i1
+        sethi %hi(AGlobalVar), %i2
+        add %i2, %lo(AGlobalVar), %i2
+        ldx [%i1+%i2], %i1
+        ldx [%i1], %i1
+        call bar
+        add %i0, %i1, %o0
+        ret
+        restore %g0, %o0, %o0
+.Ltmp7:
+        .size   foo, .Ltmp7-foo
+        .cfi_endproc
+
+        .type   AGlobalVar,@object      ! @AGlobalVar
+        .section        .bss,#alloc,#write
+        .globl  AGlobalVar
+        .align  8
+AGlobalVar:
+        .xword  0                       ! 0x0
+        .size   AGlobalVar, 8
+
diff --git a/test/MC/Sparc/sparc-relocations.s b/test/MC/Sparc/sparc-relocations.s
new file mode 100644
index 0000000..a5b7baf
--- /dev/null
+++ b/test/MC/Sparc/sparc-relocations.s
@@ -0,0 +1,46 @@
+! RUN: llvm-mc %s -arch=sparcv9 -show-encoding | FileCheck %s
+! RUN: llvm-mc %s -arch=sparcv9 -filetype=obj | llvm-readobj -r | FileCheck %s --check-prefix=CHECK-OBJ
+
+        ! CHECK-OBJ: Format: ELF64-sparc
+        ! CHECK-OBJ: Relocations [
+        ! CHECK-OBJ: 0x{{[0-9,A-F]+}} R_SPARC_WDISP30 foo
+        ! CHECK-OBJ: 0x{{[0-9,A-F]+}} R_SPARC_LO10 sym
+        ! CHECK-OBJ: 0x{{[0-9,A-F]+}} R_SPARC_HI22 sym
+        ! CHECK-OBJ: 0x{{[0-9,A-F]+}} R_SPARC_H44 sym
+        ! CHECK-OBJ: 0x{{[0-9,A-F]+}} R_SPARC_M44 sym
+        ! CHECK-OBJ: 0x{{[0-9,A-F]+}} R_SPARC_L44 sym
+        ! CHECK-OBJ: 0x{{[0-9,A-F]+}} R_SPARC_HH22 sym
+        ! CHECK-OBJ: 0x{{[0-9,A-F]+}} R_SPARC_HM10 sym
+        ! CHECK-ELF: ]
+
+        ! CHECK: call foo     ! encoding: [0b01AAAAAA,A,A,A]
+        ! CHECK:              !   fixup A - offset: 0, value: foo, kind: fixup_sparc_call30
+        call foo
+
+        ! CHECK: or %g1, %lo(sym), %g3 ! encoding: [0x86,0x10,0b011000AA,A]
+        ! CHECK-NEXT                   !   fixup A - offset: 0, value: %lo(sym), kind: fixup_sparc_lo10
+        or %g1, %lo(sym), %g3
+
+        ! CHECK: sethi %hi(sym), %l0  ! encoding: [0x21,0b00AAAAAA,A,A]
+        ! CHECK-NEXT:                 !   fixup A - offset: 0, value: %hi(sym), kind: fixup_sparc_hi22
+        sethi %hi(sym), %l0
+
+        ! CHECK: sethi %h44(sym), %l0  ! encoding: [0x21,0b00AAAAAA,A,A]
+        ! CHECK-NEXT:                 !   fixup A - offset: 0, value: %h44(sym), kind: fixup_sparc_h44
+        sethi %h44(sym), %l0
+
+        ! CHECK: or %g1, %m44(sym), %g3 ! encoding: [0x86,0x10,0b011000AA,A]
+        ! CHECK-NEXT                   !   fixup A - offset: 0, value: %m44(sym), kind: fixup_sparc_m44
+        or %g1, %m44(sym), %g3
+
+        ! CHECK: or %g1, %l44(sym), %g3 ! encoding: [0x86,0x10,0b0110AAAA,A]
+        ! CHECK-NEXT                   !   fixup A - offset: 0, value: %l44(sym), kind: fixup_sparc_l44
+        or %g1, %l44(sym), %g3
+
+        ! CHECK: sethi %hh(sym), %l0  ! encoding: [0x21,0b00AAAAAA,A,A]
+        ! CHECK-NEXT:                 !   fixup A - offset: 0, value: %hh(sym), kind: fixup_sparc_hh
+        sethi %hh(sym), %l0
+
+        ! CHECK: or %g1, %hm(sym), %g3 ! encoding: [0x86,0x10,0b011000AA,A]
+        ! CHECK-NEXT                   !   fixup A - offset: 0, value: %hm(sym), kind: fixup_sparc_hm
+        or %g1, %hm(sym), %g3
diff --git a/test/MC/Sparc/sparc-vis.s b/test/MC/Sparc/sparc-vis.s
new file mode 100644
index 0000000..11ca564
--- /dev/null
+++ b/test/MC/Sparc/sparc-vis.s
@@ -0,0 +1,4 @@
+! RUN: llvm-mc %s -arch=sparcv9 -mcpu=niagara -show-encoding | FileCheck %s
+
+        ! CHECK: fzeros %f31   ! encoding: [0xbf,0xb0,0x0c,0x20]
+        fzeros %f31
diff --git a/test/MC/Sparc/sparc64-alu-instructions.s b/test/MC/Sparc/sparc64-alu-instructions.s
new file mode 100644
index 0000000..d4acea4
--- /dev/null
+++ b/test/MC/Sparc/sparc64-alu-instructions.s
@@ -0,0 +1,38 @@
+! RUN: llvm-mc %s -triple=sparc64-unknown-linux-gnu -show-encoding | FileCheck %s
+
+        ! CHECK: sllx %g1, %i2, %i0  ! encoding: [0xb1,0x28,0x50,0x1a]
+        sllx %g1, %i2, %i0
+
+        ! CHECK: sllx %g1, 63, %i0   ! encoding: [0xb1,0x28,0x70,0x3f]
+        sllx %g1, 63, %i0
+
+        ! CHECK: srlx %g1, %i2, %i0  ! encoding: [0xb1,0x30,0x50,0x1a]
+        srlx %g1, %i2, %i0
+
+        ! CHECK: srlx %g1, 63, %i0   ! encoding: [0xb1,0x30,0x70,0x3f]
+        srlx %g1, 63, %i0
+
+        ! CHECK: srax %g1, %i2, %i0  ! encoding: [0xb1,0x38,0x50,0x1a]
+        srax %g1, %i2, %i0
+
+        ! CHECK: srax %g1, 63, %i0   ! encoding: [0xb1,0x38,0x70,0x3f]
+        srax %g1, 63, %i0
+
+        ! CHECK: mulx %g1, %i2, %i0  ! encoding: [0xb0,0x48,0x40,0x1a]
+        mulx %g1, %i2, %i0
+
+        ! CHECK: mulx %g1, 63, %i0   ! encoding: [0xb0,0x48,0x60,0x3f]
+        mulx %g1, 63, %i0
+
+        ! CHECK: sdivx %g1, %i2, %i0 ! encoding: [0xb1,0x68,0x40,0x1a]
+        sdivx %g1, %i2, %i0
+
+        ! CHECK: sdivx %g1, 63, %i0  ! encoding: [0xb1,0x68,0x60,0x3f]
+        sdivx %g1, 63, %i0
+
+        ! CHECK: udivx %g1, %i2, %i0 ! encoding: [0xb0,0x68,0x40,0x1a]
+        udivx %g1, %i2, %i0
+
+        ! CHECK: udivx %g1, 63, %i0  ! encoding: [0xb0,0x68,0x60,0x3f]
+        udivx %g1, 63, %i0
+
diff --git a/test/MC/Sparc/sparc64-ctrl-instructions.s b/test/MC/Sparc/sparc64-ctrl-instructions.s
new file mode 100644
index 0000000..65bca29
--- /dev/null
+++ b/test/MC/Sparc/sparc64-ctrl-instructions.s
@@ -0,0 +1,1226 @@
+! RUN: llvm-mc %s -triple=sparc64-unknown-linux-gnu -show-encoding | FileCheck %s
+
+
+        ! CHECK: bne %xcc, .BB0     ! encoding: [0x12,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bne %xcc, .BB0
+
+        ! CHECK: be %xcc, .BB0      ! encoding: [0x02,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        be %xcc, .BB0
+
+        ! CHECK: bg %xcc, .BB0      ! encoding: [0x14,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bg %xcc, .BB0
+
+        ! CHECK: ble %xcc, .BB0      ! encoding: [0x04,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        ble %xcc, .BB0
+
+        ! CHECK: bge %xcc, .BB0      ! encoding: [0x16,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bge %xcc, .BB0
+
+        ! CHECK: bl %xcc, .BB0      ! encoding: [0x06,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bl %xcc, .BB0
+
+        ! CHECK: bgu %xcc, .BB0      ! encoding: [0x18,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bgu %xcc, .BB0
+
+        ! CHECK: bleu %xcc, .BB0      ! encoding: [0x08,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bleu %xcc, .BB0
+
+        ! CHECK: bcc %xcc, .BB0      ! encoding: [0x1a,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bcc %xcc, .BB0
+
+        ! CHECK: bcs %xcc, .BB0      ! encoding: [0x0a,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bcs %xcc, .BB0
+
+        ! CHECK: bpos %xcc, .BB0      ! encoding: [0x1c,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bpos %xcc, .BB0
+
+        ! CHECK: bneg %xcc, .BB0      ! encoding: [0x0c,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bneg %xcc, .BB0
+
+        ! CHECK: bvc %xcc, .BB0      ! encoding: [0x1e,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bvc %xcc, .BB0
+
+        ! CHECK: bvs %xcc, .BB0      ! encoding: [0x0e,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bvs %xcc, .BB0
+
+
+        ! CHECK: movne %icc, %g1, %g2            ! encoding: [0x85,0x66,0x40,0x01]
+        ! CHECK: move %icc, %g1, %g2             ! encoding: [0x85,0x64,0x40,0x01]
+        ! CHECK: movg %icc, %g1, %g2             ! encoding: [0x85,0x66,0x80,0x01]
+        ! CHECK: movle %icc, %g1, %g2            ! encoding: [0x85,0x64,0x80,0x01]
+        ! CHECK: movge %icc, %g1, %g2            ! encoding: [0x85,0x66,0xc0,0x01]
+        ! CHECK: movl %icc, %g1, %g2             ! encoding: [0x85,0x64,0xc0,0x01]
+        ! CHECK: movgu %icc, %g1, %g2            ! encoding: [0x85,0x67,0x00,0x01]
+        ! CHECK: movleu %icc, %g1, %g2           ! encoding: [0x85,0x65,0x00,0x01]
+        ! CHECK: movcc %icc, %g1, %g2            ! encoding: [0x85,0x67,0x40,0x01]
+        ! CHECK: movcs %icc, %g1, %g2            ! encoding: [0x85,0x65,0x40,0x01]
+        ! CHECK: movpos %icc, %g1, %g2           ! encoding: [0x85,0x67,0x80,0x01]
+        ! CHECK: movneg %icc, %g1, %g2           ! encoding: [0x85,0x65,0x80,0x01]
+        ! CHECK: movvc %icc, %g1, %g2            ! encoding: [0x85,0x67,0xc0,0x01]
+        ! CHECK: movvs %icc, %g1, %g2            ! encoding: [0x85,0x65,0xc0,0x01]
+        movne  %icc, %g1, %g2
+        move   %icc, %g1, %g2
+        movg   %icc, %g1, %g2
+        movle  %icc, %g1, %g2
+        movge  %icc, %g1, %g2
+        movl   %icc, %g1, %g2
+        movgu  %icc, %g1, %g2
+        movleu %icc, %g1, %g2
+        movcc  %icc, %g1, %g2
+        movcs  %icc, %g1, %g2
+        movpos %icc, %g1, %g2
+        movneg %icc, %g1, %g2
+        movvc  %icc, %g1, %g2
+        movvs  %icc, %g1, %g2
+
+        ! CHECK: movne %xcc, %g1, %g2            ! encoding: [0x85,0x66,0x50,0x01]
+        ! CHECK: move %xcc, %g1, %g2             ! encoding: [0x85,0x64,0x50,0x01]
+        ! CHECK: movg %xcc, %g1, %g2             ! encoding: [0x85,0x66,0x90,0x01]
+        ! CHECK: movle %xcc, %g1, %g2            ! encoding: [0x85,0x64,0x90,0x01]
+        ! CHECK: movge %xcc, %g1, %g2            ! encoding: [0x85,0x66,0xd0,0x01]
+        ! CHECK: movl %xcc, %g1, %g2             ! encoding: [0x85,0x64,0xd0,0x01]
+        ! CHECK: movgu %xcc, %g1, %g2            ! encoding: [0x85,0x67,0x10,0x01]
+        ! CHECK: movleu %xcc, %g1, %g2           ! encoding: [0x85,0x65,0x10,0x01]
+        ! CHECK: movcc %xcc, %g1, %g2            ! encoding: [0x85,0x67,0x50,0x01]
+        ! CHECK: movcs %xcc, %g1, %g2            ! encoding: [0x85,0x65,0x50,0x01]
+        ! CHECK: movpos %xcc, %g1, %g2           ! encoding: [0x85,0x67,0x90,0x01]
+        ! CHECK: movneg %xcc, %g1, %g2           ! encoding: [0x85,0x65,0x90,0x01]
+        ! CHECK: movvc %xcc, %g1, %g2            ! encoding: [0x85,0x67,0xd0,0x01]
+        ! CHECK: movvs %xcc, %g1, %g2            ! encoding: [0x85,0x65,0xd0,0x01]
+        movne  %xcc, %g1, %g2
+        move   %xcc, %g1, %g2
+        movg   %xcc, %g1, %g2
+        movle  %xcc, %g1, %g2
+        movge  %xcc, %g1, %g2
+        movl   %xcc, %g1, %g2
+        movgu  %xcc, %g1, %g2
+        movleu %xcc, %g1, %g2
+        movcc  %xcc, %g1, %g2
+        movcs  %xcc, %g1, %g2
+        movpos %xcc, %g1, %g2
+        movneg %xcc, %g1, %g2
+        movvc  %xcc, %g1, %g2
+        movvs  %xcc, %g1, %g2
+
+        ! CHECK: movu %fcc0, %g1, %g2            ! encoding: [0x85,0x61,0xc0,0x01]
+        ! CHECK: movg %fcc0, %g1, %g2            ! encoding: [0x85,0x61,0x80,0x01]
+        ! CHECK: movug %fcc0, %g1, %g2           ! encoding: [0x85,0x61,0x40,0x01]
+        ! CHECK: movl %fcc0, %g1, %g2            ! encoding: [0x85,0x61,0x00,0x01]
+        ! CHECK: movul %fcc0, %g1, %g2           ! encoding: [0x85,0x60,0xc0,0x01]
+        ! CHECK: movlg %fcc0, %g1, %g2           ! encoding: [0x85,0x60,0x80,0x01]
+        ! CHECK: movne %fcc0, %g1, %g2           ! encoding: [0x85,0x60,0x40,0x01]
+        ! CHECK: move %fcc0, %g1, %g2            ! encoding: [0x85,0x62,0x40,0x01]
+        ! CHECK: movue %fcc0, %g1, %g2           ! encoding: [0x85,0x62,0x80,0x01]
+        ! CHECK: movge %fcc0, %g1, %g2           ! encoding: [0x85,0x62,0xc0,0x01]
+        ! CHECK: movuge %fcc0, %g1, %g2          ! encoding: [0x85,0x63,0x00,0x01]
+        ! CHECK: movle %fcc0, %g1, %g2           ! encoding: [0x85,0x63,0x40,0x01]
+        ! CHECK: movule %fcc0, %g1, %g2          ! encoding: [0x85,0x63,0x80,0x01]
+        ! CHECK: movo %fcc0, %g1, %g2            ! encoding: [0x85,0x63,0xc0,0x01]
+        movu   %fcc0, %g1, %g2
+        movg   %fcc0, %g1, %g2
+        movug  %fcc0, %g1, %g2
+        movl   %fcc0, %g1, %g2
+        movul  %fcc0, %g1, %g2
+        movlg  %fcc0, %g1, %g2
+        movne  %fcc0, %g1, %g2
+        move   %fcc0, %g1, %g2
+        movue  %fcc0, %g1, %g2
+        movge  %fcc0, %g1, %g2
+        movuge %fcc0, %g1, %g2
+        movle  %fcc0, %g1, %g2
+        movule %fcc0, %g1, %g2
+        movo   %fcc0, %g1, %g2
+
+
+        ! CHECK: fmovsne %icc, %f1, %f2          ! encoding: [0x85,0xaa,0x60,0x21]
+        ! CHECK: fmovse %icc, %f1, %f2           ! encoding: [0x85,0xa8,0x60,0x21]
+        ! CHECK: fmovsg %icc, %f1, %f2           ! encoding: [0x85,0xaa,0xa0,0x21]
+        ! CHECK: fmovsle %icc, %f1, %f2          ! encoding: [0x85,0xa8,0xa0,0x21]
+        ! CHECK: fmovsge %icc, %f1, %f2          ! encoding: [0x85,0xaa,0xe0,0x21]
+        ! CHECK: fmovsl %icc, %f1, %f2           ! encoding: [0x85,0xa8,0xe0,0x21]
+        ! CHECK: fmovsgu %icc, %f1, %f2          ! encoding: [0x85,0xab,0x20,0x21]
+        ! CHECK: fmovsleu %icc, %f1, %f2         ! encoding: [0x85,0xa9,0x20,0x21]
+        ! CHECK: fmovscc %icc, %f1, %f2          ! encoding: [0x85,0xab,0x60,0x21]
+        ! CHECK: fmovscs %icc, %f1, %f2          ! encoding: [0x85,0xa9,0x60,0x21]
+        ! CHECK: fmovspos %icc, %f1, %f2         ! encoding: [0x85,0xab,0xa0,0x21]
+        ! CHECK: fmovsneg %icc, %f1, %f2         ! encoding: [0x85,0xa9,0xa0,0x21]
+        ! CHECK: fmovsvc %icc, %f1, %f2          ! encoding: [0x85,0xab,0xe0,0x21]
+        ! CHECK: fmovsvs %icc, %f1, %f2          ! encoding: [0x85,0xa9,0xe0,0x21]
+        fmovsne  %icc, %f1, %f2
+        fmovse   %icc, %f1, %f2
+        fmovsg   %icc, %f1, %f2
+        fmovsle  %icc, %f1, %f2
+        fmovsge  %icc, %f1, %f2
+        fmovsl   %icc, %f1, %f2
+        fmovsgu  %icc, %f1, %f2
+        fmovsleu %icc, %f1, %f2
+        fmovscc  %icc, %f1, %f2
+        fmovscs  %icc, %f1, %f2
+        fmovspos %icc, %f1, %f2
+        fmovsneg %icc, %f1, %f2
+        fmovsvc  %icc, %f1, %f2
+        fmovsvs  %icc, %f1, %f2
+
+        ! CHECK: fmovsne %xcc, %f1, %f2          ! encoding: [0x85,0xaa,0x70,0x21]
+        ! CHECK: fmovse %xcc, %f1, %f2           ! encoding: [0x85,0xa8,0x70,0x21]
+        ! CHECK: fmovsg %xcc, %f1, %f2           ! encoding: [0x85,0xaa,0xb0,0x21]
+        ! CHECK: fmovsle %xcc, %f1, %f2          ! encoding: [0x85,0xa8,0xb0,0x21]
+        ! CHECK: fmovsge %xcc, %f1, %f2          ! encoding: [0x85,0xaa,0xf0,0x21]
+        ! CHECK: fmovsl %xcc, %f1, %f2           ! encoding: [0x85,0xa8,0xf0,0x21]
+        ! CHECK: fmovsgu %xcc, %f1, %f2          ! encoding: [0x85,0xab,0x30,0x21]
+        ! CHECK: fmovsleu %xcc, %f1, %f2         ! encoding: [0x85,0xa9,0x30,0x21]
+        ! CHECK: fmovscc %xcc, %f1, %f2          ! encoding: [0x85,0xab,0x70,0x21]
+        ! CHECK: fmovscs %xcc, %f1, %f2          ! encoding: [0x85,0xa9,0x70,0x21]
+        ! CHECK: fmovspos %xcc, %f1, %f2         ! encoding: [0x85,0xab,0xb0,0x21]
+        ! CHECK: fmovsneg %xcc, %f1, %f2         ! encoding: [0x85,0xa9,0xb0,0x21]
+        ! CHECK: fmovsvc %xcc, %f1, %f2          ! encoding: [0x85,0xab,0xf0,0x21]
+        ! CHECK: fmovsvs %xcc, %f1, %f2          ! encoding: [0x85,0xa9,0xf0,0x21]
+        fmovsne  %xcc, %f1, %f2
+        fmovse   %xcc, %f1, %f2
+        fmovsg   %xcc, %f1, %f2
+        fmovsle  %xcc, %f1, %f2
+        fmovsge  %xcc, %f1, %f2
+        fmovsl   %xcc, %f1, %f2
+        fmovsgu  %xcc, %f1, %f2
+        fmovsleu %xcc, %f1, %f2
+        fmovscc  %xcc, %f1, %f2
+        fmovscs  %xcc, %f1, %f2
+        fmovspos %xcc, %f1, %f2
+        fmovsneg %xcc, %f1, %f2
+        fmovsvc  %xcc, %f1, %f2
+        fmovsvs  %xcc, %f1, %f2
+
+        ! CHECK: fmovsu %fcc0, %f1, %f2          ! encoding: [0x85,0xa9,0xc0,0x21]
+        ! CHECK: fmovsg %fcc0, %f1, %f2          ! encoding: [0x85,0xa9,0x80,0x21]
+        ! CHECK: fmovsug %fcc0, %f1, %f2         ! encoding: [0x85,0xa9,0x40,0x21]
+        ! CHECK: fmovsl %fcc0, %f1, %f2          ! encoding: [0x85,0xa9,0x00,0x21]
+        ! CHECK: fmovsul %fcc0, %f1, %f2         ! encoding: [0x85,0xa8,0xc0,0x21]
+        ! CHECK: fmovslg %fcc0, %f1, %f2         ! encoding: [0x85,0xa8,0x80,0x21]
+        ! CHECK: fmovsne %fcc0, %f1, %f2         ! encoding: [0x85,0xa8,0x40,0x21]
+        ! CHECK: fmovse %fcc0, %f1, %f2          ! encoding: [0x85,0xaa,0x40,0x21]
+        ! CHECK: fmovsue %fcc0, %f1, %f2         ! encoding: [0x85,0xaa,0x80,0x21]
+        ! CHECK: fmovsge %fcc0, %f1, %f2         ! encoding: [0x85,0xaa,0xc0,0x21]
+        ! CHECK: fmovsuge %fcc0, %f1, %f2        ! encoding: [0x85,0xab,0x00,0x21]
+        ! CHECK: fmovsle %fcc0, %f1, %f2         ! encoding: [0x85,0xab,0x40,0x21]
+        ! CHECK: fmovsule %fcc0, %f1, %f2        ! encoding: [0x85,0xab,0x80,0x21]
+        ! CHECK: fmovso %fcc0, %f1, %f2          ! encoding: [0x85,0xab,0xc0,0x21]
+        fmovsu   %fcc0, %f1, %f2
+        fmovsg   %fcc0, %f1, %f2
+        fmovsug  %fcc0, %f1, %f2
+        fmovsl   %fcc0, %f1, %f2
+        fmovsul  %fcc0, %f1, %f2
+        fmovslg  %fcc0, %f1, %f2
+        fmovsne  %fcc0, %f1, %f2
+        fmovse   %fcc0, %f1, %f2
+        fmovsue  %fcc0, %f1, %f2
+        fmovsge  %fcc0, %f1, %f2
+        fmovsuge %fcc0, %f1, %f2
+        fmovsle  %fcc0, %f1, %f2
+        fmovsule %fcc0, %f1, %f2
+        fmovso   %fcc0, %f1, %f2
+
+        ! CHECK: bne,a %icc, .BB0     ! encoding: [0x32,0b01001AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bne,a %icc, .BB0
+
+        ! CHECK: be,a %icc, .BB0      ! encoding: [0x22,0b01001AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        be,a %icc, .BB0
+
+        ! CHECK: bg,a %icc, .BB0      ! encoding: [0x34,0b01001AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bg,a %icc, .BB0
+
+        ! CHECK: ble,a %icc, .BB0      ! encoding: [0x24,0b01001AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        ble,a %icc, .BB0
+
+        ! CHECK: bge,a %icc, .BB0      ! encoding: [0x36,0b01001AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bge,a %icc, .BB0
+
+        ! CHECK: bl,a %icc, .BB0      ! encoding: [0x26,0b01001AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bl,a %icc, .BB0
+
+        ! CHECK: bgu,a %icc, .BB0      ! encoding: [0x38,0b01001AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bgu,a %icc, .BB0
+
+        ! CHECK: bleu,a %icc, .BB0      ! encoding: [0x28,0b01001AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bleu,a %icc, .BB0
+
+        ! CHECK: bcc,a %icc, .BB0      ! encoding: [0x3a,0b01001AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bcc,a %icc, .BB0
+
+        ! CHECK: bcs,a %icc, .BB0      ! encoding: [0x2a,0b01001AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bcs,a %icc, .BB0
+
+        ! CHECK: bpos,a %icc, .BB0      ! encoding: [0x3c,0b01001AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bpos,a %icc, .BB0
+
+        ! CHECK: bneg,a %icc, .BB0      ! encoding: [0x2c,0b01001AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bneg,a %icc, .BB0
+
+        ! CHECK: bvc,a %icc, .BB0      ! encoding: [0x3e,0b01001AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bvc,a %icc, .BB0
+
+        ! CHECK: bvs,a %icc, .BB0      ! encoding: [0x2e,0b01001AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bvs,a %icc, .BB0
+
+        ! CHECK: bne,pn %icc, .BB0     ! encoding: [0x12,0b01000AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bne,pn %icc, .BB0
+
+        ! CHECK: be,pn %icc, .BB0      ! encoding: [0x02,0b01000AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        be,pn %icc, .BB0
+
+        ! CHECK: bg,pn %icc, .BB0      ! encoding: [0x14,0b01000AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bg,pn %icc, .BB0
+
+        ! CHECK: ble,pn %icc, .BB0      ! encoding: [0x04,0b01000AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        ble,pn %icc, .BB0
+
+        ! CHECK: bge,pn %icc, .BB0      ! encoding: [0x16,0b01000AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bge,pn %icc, .BB0
+
+        ! CHECK: bl,pn %icc, .BB0      ! encoding: [0x06,0b01000AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bl,pn %icc, .BB0
+
+        ! CHECK: bgu,pn %icc, .BB0      ! encoding: [0x18,0b01000AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bgu,pn %icc, .BB0
+
+        ! CHECK: bleu,pn %icc, .BB0      ! encoding: [0x08,0b01000AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bleu,pn %icc, .BB0
+
+        ! CHECK: bcc,pn %icc, .BB0      ! encoding: [0x1a,0b01000AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bcc,pn %icc, .BB0
+
+        ! CHECK: bcs,pn %icc, .BB0      ! encoding: [0x0a,0b01000AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bcs,pn %icc, .BB0
+
+        ! CHECK: bpos,pn %icc, .BB0      ! encoding: [0x1c,0b01000AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bpos,pn %icc, .BB0
+
+        ! CHECK: bneg,pn %icc, .BB0      ! encoding: [0x0c,0b01000AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bneg,pn %icc, .BB0
+
+        ! CHECK: bvc,pn %icc, .BB0      ! encoding: [0x1e,0b01000AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bvc,pn %icc, .BB0
+
+        ! CHECK: bvs,pn %icc, .BB0      ! encoding: [0x0e,0b01000AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bvs,pn %icc, .BB0
+
+        ! CHECK: bne,a,pn %icc, .BB0     ! encoding: [0x32,0b01000AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bne,a,pn %icc, .BB0
+
+        ! CHECK: be,a,pn %icc, .BB0      ! encoding: [0x22,0b01000AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        be,a,pn %icc, .BB0
+
+        ! CHECK: bg,a,pn %icc, .BB0      ! encoding: [0x34,0b01000AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bg,a,pn %icc, .BB0
+
+        ! CHECK: ble,a,pn %icc, .BB0      ! encoding: [0x24,0b01000AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        ble,a,pn %icc, .BB0
+
+        ! CHECK: bge,a,pn %icc, .BB0      ! encoding: [0x36,0b01000AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bge,a,pn %icc, .BB0
+
+        ! CHECK: bl,a,pn %icc, .BB0      ! encoding: [0x26,0b01000AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bl,a,pn %icc, .BB0
+
+        ! CHECK: bgu,a,pn %icc, .BB0      ! encoding: [0x38,0b01000AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bgu,a,pn %icc, .BB0
+
+        ! CHECK: bleu,a,pn %icc, .BB0      ! encoding: [0x28,0b01000AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bleu,a,pn %icc, .BB0
+
+        ! CHECK: bcc,a,pn %icc, .BB0      ! encoding: [0x3a,0b01000AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bcc,a,pn %icc, .BB0
+
+        ! CHECK: bcs,a,pn %icc, .BB0      ! encoding: [0x2a,0b01000AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bcs,a,pn %icc, .BB0
+
+        ! CHECK: bpos,a,pn %icc, .BB0      ! encoding: [0x3c,0b01000AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bpos,a,pn %icc, .BB0
+
+        ! CHECK: bneg,a,pn %icc, .BB0      ! encoding: [0x2c,0b01000AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bneg,a,pn %icc, .BB0
+
+        ! CHECK: bvc,a,pn %icc, .BB0      ! encoding: [0x3e,0b01000AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bvc,a,pn %icc, .BB0
+
+        ! CHECK: bvs,a,pn %icc, .BB0      ! encoding: [0x2e,0b01000AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bvs,a,pn %icc, .BB0
+
+        ! CHECK: bne %icc, .BB0     ! encoding: [0x12,0b01001AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bne,pt %icc, .BB0
+
+        ! CHECK: be %icc, .BB0      ! encoding: [0x02,0b01001AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        be,pt %icc, .BB0
+
+        ! CHECK: bg %icc, .BB0      ! encoding: [0x14,0b01001AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bg,pt %icc, .BB0
+
+        ! CHECK: ble %icc, .BB0      ! encoding: [0x04,0b01001AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        ble,pt %icc, .BB0
+
+        ! CHECK: bge %icc, .BB0      ! encoding: [0x16,0b01001AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bge,pt %icc, .BB0
+
+        ! CHECK: bl %icc, .BB0      ! encoding: [0x06,0b01001AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bl,pt %icc, .BB0
+
+        ! CHECK: bgu %icc, .BB0      ! encoding: [0x18,0b01001AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bgu,pt %icc, .BB0
+
+        ! CHECK: bleu %icc, .BB0      ! encoding: [0x08,0b01001AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bleu,pt %icc, .BB0
+
+        ! CHECK: bcc %icc, .BB0      ! encoding: [0x1a,0b01001AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bcc,pt %icc, .BB0
+
+        ! CHECK: bcs %icc, .BB0      ! encoding: [0x0a,0b01001AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bcs,pt %icc, .BB0
+
+        ! CHECK: bpos %icc, .BB0      ! encoding: [0x1c,0b01001AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bpos,pt %icc, .BB0
+
+        ! CHECK: bneg %icc, .BB0      ! encoding: [0x0c,0b01001AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bneg,pt %icc, .BB0
+
+        ! CHECK: bvc %icc, .BB0      ! encoding: [0x1e,0b01001AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bvc,pt %icc, .BB0
+
+        ! CHECK: bvs %icc, .BB0      ! encoding: [0x0e,0b01001AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bvs,pt %icc, .BB0
+
+        ! CHECK: bne,a %icc, .BB0     ! encoding: [0x32,0b01001AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bne,a,pt %icc, .BB0
+
+        ! CHECK: be,a %icc, .BB0      ! encoding: [0x22,0b01001AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        be,a,pt %icc, .BB0
+
+        ! CHECK: bg,a %icc, .BB0      ! encoding: [0x34,0b01001AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bg,a,pt %icc, .BB0
+
+        ! CHECK: ble,a %icc, .BB0      ! encoding: [0x24,0b01001AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        ble,a,pt %icc, .BB0
+
+        ! CHECK: bge,a %icc, .BB0      ! encoding: [0x36,0b01001AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bge,a,pt %icc, .BB0
+
+        ! CHECK: bl,a %icc, .BB0      ! encoding: [0x26,0b01001AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bl,a,pt %icc, .BB0
+
+        ! CHECK: bgu,a %icc, .BB0      ! encoding: [0x38,0b01001AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bgu,a,pt %icc, .BB0
+
+        ! CHECK: bleu,a %icc, .BB0      ! encoding: [0x28,0b01001AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bleu,a,pt %icc, .BB0
+
+        ! CHECK: bcc,a %icc, .BB0      ! encoding: [0x3a,0b01001AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bcc,a,pt %icc, .BB0
+
+        ! CHECK: bcs,a %icc, .BB0      ! encoding: [0x2a,0b01001AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bcs,a,pt %icc, .BB0
+
+        ! CHECK: bpos,a %icc, .BB0      ! encoding: [0x3c,0b01001AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bpos,a,pt %icc, .BB0
+
+
+        ! CHECK: bne,a %xcc, .BB0     ! encoding: [0x32,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bne,a %xcc, .BB0
+
+        ! CHECK: be,a %xcc, .BB0      ! encoding: [0x22,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        be,a %xcc, .BB0
+
+        ! CHECK: bg,a %xcc, .BB0      ! encoding: [0x34,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bg,a %xcc, .BB0
+
+        ! CHECK: ble,a %xcc, .BB0      ! encoding: [0x24,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        ble,a %xcc, .BB0
+
+        ! CHECK: bge,a %xcc, .BB0      ! encoding: [0x36,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bge,a %xcc, .BB0
+
+        ! CHECK: bl,a %xcc, .BB0      ! encoding: [0x26,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bl,a %xcc, .BB0
+
+        ! CHECK: bgu,a %xcc, .BB0      ! encoding: [0x38,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bgu,a %xcc, .BB0
+
+        ! CHECK: bleu,a %xcc, .BB0      ! encoding: [0x28,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bleu,a %xcc, .BB0
+
+        ! CHECK: bcc,a %xcc, .BB0      ! encoding: [0x3a,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bcc,a %xcc, .BB0
+
+        ! CHECK: bcs,a %xcc, .BB0      ! encoding: [0x2a,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bcs,a %xcc, .BB0
+
+        ! CHECK: bpos,a %xcc, .BB0      ! encoding: [0x3c,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bpos,a %xcc, .BB0
+
+        ! CHECK: bneg,a %xcc, .BB0      ! encoding: [0x2c,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bneg,a %xcc, .BB0
+
+        ! CHECK: bvc,a %xcc, .BB0      ! encoding: [0x3e,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bvc,a %xcc, .BB0
+
+        ! CHECK: bvs,a %xcc, .BB0      ! encoding: [0x2e,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bvs,a %xcc, .BB0
+
+        ! CHECK: bne,pn %xcc, .BB0     ! encoding: [0x12,0b01100AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bne,pn %xcc, .BB0
+
+        ! CHECK: be,pn %xcc, .BB0      ! encoding: [0x02,0b01100AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        be,pn %xcc, .BB0
+
+        ! CHECK: bg,pn %xcc, .BB0      ! encoding: [0x14,0b01100AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bg,pn %xcc, .BB0
+
+        ! CHECK: ble,pn %xcc, .BB0      ! encoding: [0x04,0b01100AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        ble,pn %xcc, .BB0
+
+        ! CHECK: bge,pn %xcc, .BB0      ! encoding: [0x16,0b01100AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bge,pn %xcc, .BB0
+
+        ! CHECK: bl,pn %xcc, .BB0      ! encoding: [0x06,0b01100AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bl,pn %xcc, .BB0
+
+        ! CHECK: bgu,pn %xcc, .BB0      ! encoding: [0x18,0b01100AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bgu,pn %xcc, .BB0
+
+        ! CHECK: bleu,pn %xcc, .BB0      ! encoding: [0x08,0b01100AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bleu,pn %xcc, .BB0
+
+        ! CHECK: bcc,pn %xcc, .BB0      ! encoding: [0x1a,0b01100AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bcc,pn %xcc, .BB0
+
+        ! CHECK: bcs,pn %xcc, .BB0      ! encoding: [0x0a,0b01100AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bcs,pn %xcc, .BB0
+
+        ! CHECK: bpos,pn %xcc, .BB0      ! encoding: [0x1c,0b01100AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bpos,pn %xcc, .BB0
+
+        ! CHECK: bneg,pn %xcc, .BB0      ! encoding: [0x0c,0b01100AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bneg,pn %xcc, .BB0
+
+        ! CHECK: bvc,pn %xcc, .BB0      ! encoding: [0x1e,0b01100AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bvc,pn %xcc, .BB0
+
+        ! CHECK: bvs,pn %xcc, .BB0      ! encoding: [0x0e,0b01100AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bvs,pn %xcc, .BB0
+
+        ! CHECK: bne,a,pn %xcc, .BB0     ! encoding: [0x32,0b01100AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bne,a,pn %xcc, .BB0
+
+        ! CHECK: be,a,pn %xcc, .BB0      ! encoding: [0x22,0b01100AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        be,a,pn %xcc, .BB0
+
+        ! CHECK: bg,a,pn %xcc, .BB0      ! encoding: [0x34,0b01100AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bg,a,pn %xcc, .BB0
+
+        ! CHECK: ble,a,pn %xcc, .BB0      ! encoding: [0x24,0b01100AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        ble,a,pn %xcc, .BB0
+
+        ! CHECK: bge,a,pn %xcc, .BB0      ! encoding: [0x36,0b01100AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bge,a,pn %xcc, .BB0
+
+        ! CHECK: bl,a,pn %xcc, .BB0      ! encoding: [0x26,0b01100AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bl,a,pn %xcc, .BB0
+
+        ! CHECK: bgu,a,pn %xcc, .BB0      ! encoding: [0x38,0b01100AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bgu,a,pn %xcc, .BB0
+
+        ! CHECK: bleu,a,pn %xcc, .BB0      ! encoding: [0x28,0b01100AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bleu,a,pn %xcc, .BB0
+
+        ! CHECK: bcc,a,pn %xcc, .BB0      ! encoding: [0x3a,0b01100AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bcc,a,pn %xcc, .BB0
+
+        ! CHECK: bcs,a,pn %xcc, .BB0      ! encoding: [0x2a,0b01100AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bcs,a,pn %xcc, .BB0
+
+        ! CHECK: bpos,a,pn %xcc, .BB0      ! encoding: [0x3c,0b01100AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bpos,a,pn %xcc, .BB0
+
+        ! CHECK: bneg,a,pn %xcc, .BB0      ! encoding: [0x2c,0b01100AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bneg,a,pn %xcc, .BB0
+
+        ! CHECK: bvc,a,pn %xcc, .BB0      ! encoding: [0x3e,0b01100AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bvc,a,pn %xcc, .BB0
+
+        ! CHECK: bvs,a,pn %xcc, .BB0      ! encoding: [0x2e,0b01100AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bvs,a,pn %xcc, .BB0
+
+        ! CHECK: bne %xcc, .BB0     ! encoding: [0x12,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bne,pt %xcc, .BB0
+
+        ! CHECK: be %xcc, .BB0      ! encoding: [0x02,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        be,pt %xcc, .BB0
+
+        ! CHECK: bg %xcc, .BB0      ! encoding: [0x14,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bg,pt %xcc, .BB0
+
+        ! CHECK: ble %xcc, .BB0      ! encoding: [0x04,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        ble,pt %xcc, .BB0
+
+        ! CHECK: bge %xcc, .BB0      ! encoding: [0x16,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bge,pt %xcc, .BB0
+
+        ! CHECK: bl %xcc, .BB0      ! encoding: [0x06,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bl,pt %xcc, .BB0
+
+        ! CHECK: bgu %xcc, .BB0      ! encoding: [0x18,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bgu,pt %xcc, .BB0
+
+        ! CHECK: bleu %xcc, .BB0      ! encoding: [0x08,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bleu,pt %xcc, .BB0
+
+        ! CHECK: bcc %xcc, .BB0      ! encoding: [0x1a,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bcc,pt %xcc, .BB0
+
+        ! CHECK: bcs %xcc, .BB0      ! encoding: [0x0a,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bcs,pt %xcc, .BB0
+
+        ! CHECK: bpos %xcc, .BB0      ! encoding: [0x1c,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bpos,pt %xcc, .BB0
+
+        ! CHECK: bneg %xcc, .BB0      ! encoding: [0x0c,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bneg,pt %xcc, .BB0
+
+        ! CHECK: bvc %xcc, .BB0      ! encoding: [0x1e,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bvc,pt %xcc, .BB0
+
+        ! CHECK: bvs %xcc, .BB0      ! encoding: [0x0e,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bvs,pt %xcc, .BB0
+
+        ! CHECK: bne,a %xcc, .BB0     ! encoding: [0x32,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bne,a,pt %xcc, .BB0
+
+        ! CHECK: be,a %xcc, .BB0      ! encoding: [0x22,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        be,a,pt %xcc, .BB0
+
+        ! CHECK: bg,a %xcc, .BB0      ! encoding: [0x34,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bg,a,pt %xcc, .BB0
+
+        ! CHECK: ble,a %xcc, .BB0      ! encoding: [0x24,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        ble,a,pt %xcc, .BB0
+
+        ! CHECK: bge,a %xcc, .BB0      ! encoding: [0x36,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bge,a,pt %xcc, .BB0
+
+        ! CHECK: bl,a %xcc, .BB0      ! encoding: [0x26,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bl,a,pt %xcc, .BB0
+
+        ! CHECK: bgu,a %xcc, .BB0      ! encoding: [0x38,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bgu,a,pt %xcc, .BB0
+
+        ! CHECK: bleu,a %xcc, .BB0      ! encoding: [0x28,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bleu,a,pt %xcc, .BB0
+
+        ! CHECK: bcc,a %xcc, .BB0      ! encoding: [0x3a,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bcc,a,pt %xcc, .BB0
+
+        ! CHECK: bcs,a %xcc, .BB0      ! encoding: [0x2a,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bcs,a,pt %xcc, .BB0
+
+        ! CHECK: bpos,a %xcc, .BB0      ! encoding: [0x3c,0b01101AAA,A,A]
+        ! CHECK-NEXT:         ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        bpos,a,pt %xcc, .BB0
+
+        ! CHECK:             fbu %fcc0, .BB0                      ! encoding: [0x0f,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbu %fcc0, .BB0
+
+        ! CHECK:             fbg %fcc0, .BB0                      ! encoding: [0x0d,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbg %fcc0, .BB0
+        ! CHECK:             fbug %fcc0, .BB0                     ! encoding: [0x0b,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbug %fcc0, .BB0
+
+        ! CHECK:             fbl %fcc0, .BB0                      ! encoding: [0x09,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbl %fcc0, .BB0
+
+        ! CHECK:             fbul %fcc0, .BB0                     ! encoding: [0x07,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbul %fcc0, .BB0
+
+        ! CHECK:             fblg %fcc0, .BB0                     ! encoding: [0x05,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fblg %fcc0, .BB0
+
+        ! CHECK:             fbne %fcc0, .BB0                     ! encoding: [0x03,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbne %fcc0, .BB0
+
+        ! CHECK:             fbe %fcc0, .BB0                      ! encoding: [0x13,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbe %fcc0, .BB0
+
+        ! CHECK:             fbue %fcc0, .BB0                     ! encoding: [0x15,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbue %fcc0, .BB0
+
+        ! CHECK:             fbge %fcc0, .BB0                     ! encoding: [0x17,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbge %fcc0, .BB0
+
+        ! CHECK:             fbuge %fcc0, .BB0                    ! encoding: [0x19,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbuge %fcc0, .BB0
+
+        ! CHECK:             fble %fcc0, .BB0                     ! encoding: [0x1b,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fble %fcc0, .BB0
+
+        ! CHECK:             fbule %fcc0, .BB0                    ! encoding: [0x1d,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbule %fcc0, .BB0
+
+        ! CHECK:             fbo %fcc0, .BB0                      ! encoding: [0x1f,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbo %fcc0, .BB0
+
+        ! CHECK:             fbu %fcc0, .BB0                      ! encoding: [0x0f,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbu,pt %fcc0, .BB0
+
+        ! CHECK:             fbg %fcc0, .BB0                      ! encoding: [0x0d,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbg,pt %fcc0, .BB0
+        ! CHECK:             fbug %fcc0, .BB0                     ! encoding: [0x0b,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbug,pt %fcc0, .BB0
+
+        ! CHECK:             fbl %fcc0, .BB0                      ! encoding: [0x09,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbl,pt %fcc0, .BB0
+
+        ! CHECK:             fbul %fcc0, .BB0                     ! encoding: [0x07,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbul,pt %fcc0, .BB0
+
+        ! CHECK:             fblg %fcc0, .BB0                     ! encoding: [0x05,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fblg,pt %fcc0, .BB0
+
+        ! CHECK:             fbne %fcc0, .BB0                     ! encoding: [0x03,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbne,pt %fcc0, .BB0
+
+        ! CHECK:             fbe %fcc0, .BB0                      ! encoding: [0x13,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbe,pt %fcc0, .BB0
+
+        ! CHECK:             fbue %fcc0, .BB0                     ! encoding: [0x15,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbue,pt %fcc0, .BB0
+
+        ! CHECK:             fbge %fcc0, .BB0                     ! encoding: [0x17,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbge,pt %fcc0, .BB0
+
+        ! CHECK:             fbuge %fcc0, .BB0                    ! encoding: [0x19,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbuge,pt %fcc0, .BB0
+
+        ! CHECK:             fble %fcc0, .BB0                     ! encoding: [0x1b,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fble,pt %fcc0, .BB0
+
+        ! CHECK:             fbule %fcc0, .BB0                    ! encoding: [0x1d,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbule,pt %fcc0, .BB0
+
+        ! CHECK:             fbo %fcc0, .BB0                      ! encoding: [0x1f,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbo,pt %fcc0, .BB0
+
+
+        ! CHECK:             fbo,a %fcc0, .BB0                      ! encoding: [0x3f,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbo,a %fcc0, .BB0
+
+        ! CHECK:             fbu,a %fcc0, .BB0                      ! encoding: [0x2f,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbu,a %fcc0, .BB0
+
+        ! CHECK:             fbg,a %fcc0, .BB0                      ! encoding: [0x2d,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbg,a %fcc0, .BB0
+        ! CHECK:             fbug,a %fcc0, .BB0                     ! encoding: [0x2b,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbug,a %fcc0, .BB0
+
+        ! CHECK:             fbl,a %fcc0, .BB0                      ! encoding: [0x29,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbl,a %fcc0, .BB0
+
+        ! CHECK:             fbul,a %fcc0, .BB0                     ! encoding: [0x27,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbul,a %fcc0, .BB0
+
+        ! CHECK:             fblg,a %fcc0, .BB0                     ! encoding: [0x25,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fblg,a %fcc0, .BB0
+
+        ! CHECK:             fbne,a %fcc0, .BB0                     ! encoding: [0x23,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbne,a %fcc0, .BB0
+
+        ! CHECK:             fbe,a %fcc0, .BB0                      ! encoding: [0x33,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbe,a %fcc0, .BB0
+
+        ! CHECK:             fbue,a %fcc0, .BB0                     ! encoding: [0x35,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbue,a %fcc0, .BB0
+
+        ! CHECK:             fbge,a %fcc0, .BB0                     ! encoding: [0x37,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbge,a %fcc0, .BB0
+
+        ! CHECK:             fbuge,a %fcc0, .BB0                    ! encoding: [0x39,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbuge,a %fcc0, .BB0
+
+        ! CHECK:             fble,a %fcc0, .BB0                     ! encoding: [0x3b,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fble,a %fcc0, .BB0
+
+        ! CHECK:             fbule,a %fcc0, .BB0                    ! encoding: [0x3d,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbule,a %fcc0, .BB0
+
+        ! CHECK:             fbo,a %fcc0, .BB0                      ! encoding: [0x3f,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbo,a %fcc0, .BB0
+
+                ! CHECK:             fbo,a %fcc0, .BB0                      ! encoding: [0x3f,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbo,a %fcc0, .BB0
+
+        ! CHECK:             fbu,a %fcc0, .BB0                      ! encoding: [0x2f,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbu,a,pt %fcc0, .BB0
+
+        ! CHECK:             fbg,a %fcc0, .BB0                      ! encoding: [0x2d,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbg,a,pt %fcc0, .BB0
+
+        ! CHECK:             fbug,a %fcc0, .BB0                     ! encoding: [0x2b,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbug,a,pt %fcc0, .BB0
+
+        ! CHECK:             fbl,a %fcc0, .BB0                      ! encoding: [0x29,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbl,a,pt %fcc0, .BB0
+
+        ! CHECK:             fbul,a %fcc0, .BB0                     ! encoding: [0x27,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbul,a,pt %fcc0, .BB0
+
+        ! CHECK:             fblg,a %fcc0, .BB0                     ! encoding: [0x25,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fblg,a,pt %fcc0, .BB0
+
+        ! CHECK:             fbne,a %fcc0, .BB0                     ! encoding: [0x23,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbne,a,pt %fcc0, .BB0
+
+        ! CHECK:             fbe,a %fcc0, .BB0                      ! encoding: [0x33,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbe,a,pt %fcc0, .BB0
+
+        ! CHECK:             fbue,a %fcc0, .BB0                     ! encoding: [0x35,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbue,a,pt %fcc0, .BB0
+
+        ! CHECK:             fbge,a %fcc0, .BB0                     ! encoding: [0x37,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbge,a,pt %fcc0, .BB0
+
+        ! CHECK:             fbuge,a %fcc0, .BB0                    ! encoding: [0x39,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbuge,a,pt %fcc0, .BB0
+
+        ! CHECK:             fble,a %fcc0, .BB0                     ! encoding: [0x3b,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fble,a,pt %fcc0, .BB0
+
+        ! CHECK:             fbule,a %fcc0, .BB0                    ! encoding: [0x3d,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbule,a,pt %fcc0, .BB0
+
+        ! CHECK:             fbo,a %fcc0, .BB0                      ! encoding: [0x3f,0b01001AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbo,a,pt %fcc0, .BB0
+
+        ! CHECK:             fbu,pn %fcc0, .BB0                 ! encoding: [0x0f,0b01000AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbu,pn %fcc0, .BB0
+
+        ! CHECK:             fbg,pn %fcc0, .BB0                      ! encoding: [0x0d,0b01000AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbg,pn %fcc0, .BB0
+        ! CHECK:             fbug,pn %fcc0, .BB0                     ! encoding: [0x0b,0b01000AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbug,pn %fcc0, .BB0
+
+        ! CHECK:             fbl,pn %fcc0, .BB0                      ! encoding: [0x09,0b01000AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbl,pn %fcc0, .BB0
+
+        ! CHECK:             fbul,pn %fcc0, .BB0                     ! encoding: [0x07,0b01000AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbul,pn %fcc0, .BB0
+
+        ! CHECK:             fblg,pn %fcc0, .BB0                     ! encoding: [0x05,0b01000AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fblg,pn %fcc0, .BB0
+
+        ! CHECK:             fbne,pn %fcc0, .BB0                     ! encoding: [0x03,0b01000AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbne,pn %fcc0, .BB0
+
+        ! CHECK:             fbe,pn %fcc0, .BB0                      ! encoding: [0x13,0b01000AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbe,pn %fcc0, .BB0
+
+        ! CHECK:             fbue,pn %fcc0, .BB0                     ! encoding: [0x15,0b01000AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbue,pn %fcc0, .BB0
+
+        ! CHECK:             fbge,pn %fcc0, .BB0                     ! encoding: [0x17,0b01000AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbge,pn %fcc0, .BB0
+
+        ! CHECK:             fbuge,pn %fcc0, .BB0                    ! encoding: [0x19,0b01000AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbuge,pn %fcc0, .BB0
+
+        ! CHECK:             fble,pn %fcc0, .BB0                     ! encoding: [0x1b,0b01000AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fble,pn %fcc0, .BB0
+
+        ! CHECK:             fbule,pn %fcc0, .BB0                    ! encoding: [0x1d,0b01000AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbule,pn %fcc0, .BB0
+
+        ! CHECK:             fbo,pn %fcc0, .BB0                      ! encoding: [0x1f,0b01000AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbo,pn %fcc0, .BB0
+
+                ! CHECK:             fbu,a,pn %fcc0, .BB0                      ! encoding: [0x2f,0b01000AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbu,a,pn %fcc0, .BB0
+
+        ! CHECK:             fbg,a,pn %fcc0, .BB0                      ! encoding: [0x2d,0b01000AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbg,a,pn %fcc0, .BB0
+
+        ! CHECK:             fbug,a,pn %fcc0, .BB0                     ! encoding: [0x2b,0b01000AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbug,a,pn %fcc0, .BB0
+
+        ! CHECK:             fbl,a,pn %fcc0, .BB0                      ! encoding: [0x29,0b01000AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbl,a,pn %fcc0, .BB0
+
+        ! CHECK:             fbul,a,pn %fcc0, .BB0                     ! encoding: [0x27,0b01000AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbul,a,pn %fcc0, .BB0
+
+        ! CHECK:             fblg,a,pn %fcc0, .BB0                     ! encoding: [0x25,0b01000AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fblg,a,pn %fcc0, .BB0
+
+        ! CHECK:             fbne,a,pn %fcc0, .BB0                     ! encoding: [0x23,0b01000AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbne,a,pn %fcc0, .BB0
+
+        ! CHECK:             fbe,a,pn %fcc0, .BB0                      ! encoding: [0x33,0b01000AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbe,a,pn %fcc0, .BB0
+
+        ! CHECK:             fbue,a,pn %fcc0, .BB0                     ! encoding: [0x35,0b01000AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbue,a,pn %fcc0, .BB0
+
+        ! CHECK:             fbge,a,pn %fcc0, .BB0                     ! encoding: [0x37,0b01000AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbge,a,pn %fcc0, .BB0
+
+        ! CHECK:             fbuge,a,pn %fcc0, .BB0                    ! encoding: [0x39,0b01000AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbuge,a,pn %fcc0, .BB0
+
+        ! CHECK:             fble,a,pn %fcc0, .BB0                     ! encoding: [0x3b,0b01000AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fble,a,pn %fcc0, .BB0
+
+        ! CHECK:             fbule,a,pn %fcc0, .BB0                    ! encoding: [0x3d,0b01000AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbule,a,pn %fcc0, .BB0
+
+        ! CHECK:             fbo,a,pn %fcc0, .BB0                      ! encoding: [0x3f,0b01000AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbo,a,pn %fcc0, .BB0
+
+        ! CHECK: movu %fcc1, %g1, %g2            ! encoding: [0x85,0x61,0xc8,0x01]
+        movu %fcc1, %g1, %g2
+
+        ! CHECK: fmovsg %fcc2, %f1, %f2          ! encoding: [0x85,0xa9,0x90,0x21]
+        fmovsg %fcc2, %f1, %f2
+
+        ! CHECK:             fbug %fcc3, .BB0                ! encoding: [0x0b,0b01111AAA,A,A]
+        ! CHECK-NEXT:                                        ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbug %fcc3, .BB0
+
+        ! CHECK:             fbu %fcc3, .BB0                 ! encoding: [0x0f,0b01111AAA,A,A]
+        ! CHECK-NEXT:                                        ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbu,pt %fcc3, .BB0
+
+        ! CHECK:             fbl,a %fcc3, .BB0               ! encoding: [0x29,0b01111AAA,A,A]
+        ! CHECK-NEXT:                                        ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbl,a %fcc3, .BB0
+
+        ! CHECK:             fbue,pn %fcc3, .BB0             ! encoding: [0x15,0b01110AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbue,pn %fcc3, .BB0
+
+        ! CHECK:             fbne,a,pn %fcc3, .BB0           ! encoding: [0x23,0b01110AAA,A,A]
+        ! CHECK-NEXT:                                        !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
+        fbne,a,pn %fcc3, .BB0
+
+
+        ! CHECK:                brz %g1, .BB0                   ! encoding: [0x02,0b11AA1000,0b01BBBBBB,B]
+        ! CHECK-NEXT:                                           !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br16_2
+        ! CHECK-NEXT:                                           !   fixup B - offset: 0, value: .BB0, kind: fixup_sparc_br16_14
+        ! CHECK:                brlez %g1, .BB0                 ! encoding: [0x04,0b11AA1000,0b01BBBBBB,B]
+        ! CHECK-NEXT:                                           !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br16_2
+        ! CHECK-NEXT:                                           !   fixup B - offset: 0, value: .BB0, kind: fixup_sparc_br16_14
+        ! CHECK:                brlz %g1, .BB0                  ! encoding: [0x06,0b11AA1000,0b01BBBBBB,B]
+        ! CHECK-NEXT:                                           !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br16_2
+        ! CHECK-NEXT:                                           !   fixup B - offset: 0, value: .BB0, kind: fixup_sparc_br16_14
+        ! CHECK:                brnz %g1, .BB0                  ! encoding: [0x0a,0b11AA1000,0b01BBBBBB,B]
+        ! CHECK-NEXT:                                           !  fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br16_2
+        ! CHECK-NEXT:                                           !   fixup B - offset: 0, value: .BB0, kind: fixup_sparc_br16_14
+        ! CHECK:                brgz %g1, .BB0                  ! encoding: [0x0c,0b11AA1000,0b01BBBBBB,B]
+        ! CHECK-NEXT:                                           !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br16_2
+        ! CHECK-NEXT:                                           !   fixup B - offset: 0, value: .BB0, kind: fixup_sparc_br16_14
+        ! CHECK:                brgez %g1, .BB0                 ! encoding: [0x0e,0b11AA1000,0b01BBBBBB,B]
+        ! CHECK-NEXT:                                           !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br16_2
+        ! CHECK-NEXT:                                           !   fixup B - offset: 0, value: .BB0, kind: fixup_sparc_br16_14
+
+        brz   %g1, .BB0
+        brlez %g1, .BB0
+        brlz  %g1, .BB0
+        brnz  %g1, .BB0
+        brgz  %g1, .BB0
+        brgez %g1, .BB0
+
+        ! CHECK: brz %g1, .BB0                   ! encoding: [0x02,0b11AA1000,0b01BBBBBB,B]
+        ! CHECK-NEXT:                            !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br16_2
+        ! CHECK-NEXT:                            !   fixup B - offset: 0, value: .BB0, kind: fixup_sparc_br16_14
+        brz,pt   %g1, .BB0
+
+        ! CHECK: brz,a %g1, .BB0                 ! encoding: [0x22,0b11AA1000,0b01BBBBBB,B]
+        ! CHECK-NEXT:                            !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br16_2
+        ! CHECK-NEXT:                            !   fixup B - offset: 0, value: .BB0, kind: fixup_sparc_br16_14
+        brz,a   %g1, .BB0
+
+        ! CHECK: brz,a %g1, .BB0                 ! encoding: [0x22,0b11AA1000,0b01BBBBBB,B]
+        ! CHECK-NEXT:                            !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br16_2
+        ! CHECK-NEXT:                            !   fixup B - offset: 0, value: .BB0, kind: fixup_sparc_br16_14
+        brz,a,pt   %g1, .BB0
+
+        ! CHECK:  brz,pn %g1, .BB0               ! encoding: [0x02,0b11AA0000,0b01BBBBBB,B]
+        ! CHECK-NEXT:                            !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br16_2
+        ! CHECK-NEXT:                            !   fixup B - offset: 0, value: .BB0, kind: fixup_sparc_br16_14
+        brz,pn   %g1, .BB0
+
+        ! CHECK:  brz,a,pn %g1, .BB0              ! encoding: [0x22,0b11AA0000,0b01BBBBBB,B]
+        ! CHECK-NEXT:                             !   fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br16_2
+        ! CHECK-NEXT:                             !   fixup B - offset: 0, value: .BB0, kind: fixup_sparc_br16_14
+        brz,a,pn   %g1, .BB0
+
+        ! CHECK: movrz   %g1, %g2, %g3 ! encoding: [0x87,0x78,0x44,0x02]
+        ! CHECK: movrlez %g1, %g2, %g3 ! encoding: [0x87,0x78,0x48,0x02]
+        ! CHECK: movrlz  %g1, %g2, %g3 ! encoding: [0x87,0x78,0x4c,0x02]
+        ! CHECK: movrnz  %g1, %g2, %g3 ! encoding: [0x87,0x78,0x54,0x02]
+        ! CHECK: movrgz  %g1, %g2, %g3 ! encoding: [0x87,0x78,0x58,0x02]
+        ! CHECK: movrgez %g1, %g2, %g3 ! encoding: [0x87,0x78,0x5c,0x02]
+        movrz   %g1, %g2, %g3
+        movrlez %g1, %g2, %g3
+        movrlz  %g1, %g2, %g3
+        movrnz  %g1, %g2, %g3
+        movrgz  %g1, %g2, %g3
+        movrgez %g1, %g2, %g3
+
+        ! CHECK: fmovrsz %g1, %f2, %f3         ! encoding: [0x87,0xa8,0x44,0xa2]
+        ! CHECK: fmovrslez %g1, %f2, %f3       ! encoding: [0x87,0xa8,0x48,0xa2]
+        ! CHECK: fmovrslz %g1, %f2, %f3        ! encoding: [0x87,0xa8,0x4c,0xa2]
+        ! CHECK: fmovrsnz %g1, %f2, %f3        ! encoding: [0x87,0xa8,0x54,0xa2]
+        ! CHECK: fmovrsgz %g1, %f2, %f3        ! encoding: [0x87,0xa8,0x58,0xa2]
+        ! CHECK: fmovrsgez %g1, %f2, %f3       ! encoding: [0x87,0xa8,0x5c,0xa2]
+        fmovrsz   %g1, %f2, %f3
+        fmovrslez %g1, %f2, %f3
+        fmovrslz  %g1, %f2, %f3
+        fmovrsnz  %g1, %f2, %f3
+        fmovrsgz  %g1, %f2, %f3
+        fmovrsgez %g1, %f2, %f3
+
+        ! CHECK:  rett %i7+8   ! encoding: [0x81,0xcf,0xe0,0x08]
+        return %i7 + 8
+
+        ! CHECK: ta %icc, %g0 + 5               ! encoding: [0x91,0xd0,0x20,0x05]
+        ta 5
+
+        ! CHECK: te %xcc, %g0 + 3               ! encoding: [0x83,0xd0,0x30,0x03]
+        te %xcc, 3
+
diff --git a/test/MC/Sparc/sparcv8-instructions.s b/test/MC/Sparc/sparcv8-instructions.s
new file mode 100644
index 0000000..9071b45
--- /dev/null
+++ b/test/MC/Sparc/sparcv8-instructions.s
@@ -0,0 +1,15 @@
+! RUN: llvm-mc %s -arch=sparc -show-encoding | FileCheck %s
+
+        ! CHECK: fcmps %f0, %f4           ! encoding: [0x81,0xa8,0x0a,0x24]
+        ! CHECK: fcmpd %f0, %f4           ! encoding: [0x81,0xa8,0x0a,0x44]
+        ! CHECK: fcmpq %f0, %f4           ! encoding: [0x81,0xa8,0x0a,0x64]
+        fcmps %f0, %f4
+        fcmpd %f0, %f4
+        fcmpq %f0, %f4
+
+        ! CHECK: fcmpes %f0, %f4          ! encoding: [0x81,0xa8,0x0a,0xa4]
+        ! CHECK: fcmped %f0, %f4          ! encoding: [0x81,0xa8,0x0a,0xc4]
+        ! CHECK: fcmpeq %f0, %f4          ! encoding: [0x81,0xa8,0x0a,0xe4]
+        fcmpes %f0, %f4
+        fcmped %f0, %f4
+        fcmpeq %f0, %f4
diff --git a/test/MC/Sparc/sparcv9-instructions.s b/test/MC/Sparc/sparcv9-instructions.s
new file mode 100644
index 0000000..37f4c8b
--- /dev/null
+++ b/test/MC/Sparc/sparcv9-instructions.s
@@ -0,0 +1,23 @@
+! RUN: not llvm-mc %s -arch=sparc   -show-encoding 2>&1 | FileCheck %s --check-prefix=V8
+! RUN: llvm-mc %s -arch=sparcv9 -show-encoding | FileCheck %s --check-prefix=V9
+
+        ! V8:      error: invalid instruction mnemonic
+        ! V8-NEXT: addc %g2, %g1, %g3
+        ! V9:      addx %g2, %g1, %g3              ! encoding: [0x86,0x40,0x80,0x01]
+        addc %g2, %g1, %g3
+
+        ! V8:      error: invalid instruction mnemonic
+        ! V8-NEXT: addccc %g1, %g2, %g3
+        ! V9:      addxcc %g1, %g2, %g3            ! encoding: [0x86,0xc0,0x40,0x02]
+        addccc %g1, %g2, %g3
+
+        ! V8:      error: invalid instruction mnemonic
+        ! V8-NEXT: subc %g2, %g1, %g3
+        ! V9:      subx %g2, %g1, %g3          ! encoding: [0x86,0x60,0x80,0x01]
+        subc %g2, %g1, %g3
+
+        ! V8:      error: invalid instruction mnemonic
+        ! V8-NEXT: subccc %g1, %g2, %g3
+        ! V9:      subxcc %g1, %g2, %g3         ! encoding: [0x86,0xe0,0x40,0x02]
+        subccc %g1, %g2, %g3
+
diff --git a/test/MC/SystemZ/insn-bad-z196.s b/test/MC/SystemZ/insn-bad-z196.s
index 089d9b5..da23a4b 100644
--- a/test/MC/SystemZ/insn-bad-z196.s
+++ b/test/MC/SystemZ/insn-bad-z196.s
@@ -33,6 +33,62 @@
 	aih	%r0, (1 << 31)
 
 #CHECK: error: invalid operand
+#CHECK: cdlfbr	%f0, 0, %r0, -1
+#CHECK: error: invalid operand
+#CHECK: cdlfbr	%f0, 0, %r0, 16
+#CHECK: error: invalid operand
+#CHECK: cdlfbr	%f0, -1, %r0, 0
+#CHECK: error: invalid operand
+#CHECK: cdlfbr	%f0, 16, %r0, 0
+
+	cdlfbr	%f0, 0, %r0, -1
+	cdlfbr	%f0, 0, %r0, 16
+	cdlfbr	%f0, -1, %r0, 0
+	cdlfbr	%f0, 16, %r0, 0
+
+#CHECK: error: invalid operand
+#CHECK: cdlgbr	%f0, 0, %r0, -1
+#CHECK: error: invalid operand
+#CHECK: cdlgbr	%f0, 0, %r0, 16
+#CHECK: error: invalid operand
+#CHECK: cdlgbr	%f0, -1, %r0, 0
+#CHECK: error: invalid operand
+#CHECK: cdlgbr	%f0, 16, %r0, 0
+
+	cdlgbr	%f0, 0, %r0, -1
+	cdlgbr	%f0, 0, %r0, 16
+	cdlgbr	%f0, -1, %r0, 0
+	cdlgbr	%f0, 16, %r0, 0
+
+#CHECK: error: invalid operand
+#CHECK: celfbr	%f0, 0, %r0, -1
+#CHECK: error: invalid operand
+#CHECK: celfbr	%f0, 0, %r0, 16
+#CHECK: error: invalid operand
+#CHECK: celfbr	%f0, -1, %r0, 0
+#CHECK: error: invalid operand
+#CHECK: celfbr	%f0, 16, %r0, 0
+
+	celfbr	%f0, 0, %r0, -1
+	celfbr	%f0, 0, %r0, 16
+	celfbr	%f0, -1, %r0, 0
+	celfbr	%f0, 16, %r0, 0
+
+#CHECK: error: invalid operand
+#CHECK: celgbr	%f0, 0, %r0, -1
+#CHECK: error: invalid operand
+#CHECK: celgbr	%f0, 0, %r0, 16
+#CHECK: error: invalid operand
+#CHECK: celgbr	%f0, -1, %r0, 0
+#CHECK: error: invalid operand
+#CHECK: celgbr	%f0, 16, %r0, 0
+
+	celgbr	%f0, 0, %r0, -1
+	celgbr	%f0, 0, %r0, 16
+	celgbr	%f0, -1, %r0, 0
+	celgbr	%f0, 16, %r0, 0
+
+#CHECK: error: invalid operand
 #CHECK: chf	%r0, -524289
 #CHECK: error: invalid operand
 #CHECK: chf	%r0, 524288
@@ -49,6 +105,96 @@
 	cih	%r0, (1 << 31)
 
 #CHECK: error: invalid operand
+#CHECK: clfdbr	%r0, 0, %f0, -1
+#CHECK: error: invalid operand
+#CHECK: clfdbr	%r0, 0, %f0, 16
+#CHECK: error: invalid operand
+#CHECK: clfdbr	%r0, -1, %f0, 0
+#CHECK: error: invalid operand
+#CHECK: clfdbr	%r0, 16, %f0, 0
+
+	clfdbr	%r0, 0, %f0, -1
+	clfdbr	%r0, 0, %f0, 16
+	clfdbr	%r0, -1, %f0, 0
+	clfdbr	%r0, 16, %f0, 0
+
+#CHECK: error: invalid operand
+#CHECK: clfebr	%r0, 0, %f0, -1
+#CHECK: error: invalid operand
+#CHECK: clfebr	%r0, 0, %f0, 16
+#CHECK: error: invalid operand
+#CHECK: clfebr	%r0, -1, %f0, 0
+#CHECK: error: invalid operand
+#CHECK: clfebr	%r0, 16, %f0, 0
+
+	clfebr	%r0, 0, %f0, -1
+	clfebr	%r0, 0, %f0, 16
+	clfebr	%r0, -1, %f0, 0
+	clfebr	%r0, 16, %f0, 0
+
+#CHECK: error: invalid operand
+#CHECK: clfxbr	%r0, 0, %f0, -1
+#CHECK: error: invalid operand
+#CHECK: clfxbr	%r0, 0, %f0, 16
+#CHECK: error: invalid operand
+#CHECK: clfxbr	%r0, -1, %f0, 0
+#CHECK: error: invalid operand
+#CHECK: clfxbr	%r0, 16, %f0, 0
+#CHECK: error: invalid register pair
+#CHECK: clfxbr	%r0, 0, %f14, 0
+
+	clfxbr	%r0, 0, %f0, -1
+	clfxbr	%r0, 0, %f0, 16
+	clfxbr	%r0, -1, %f0, 0
+	clfxbr	%r0, 16, %f0, 0
+	clfxbr	%r0, 0, %f14, 0
+
+#CHECK: error: invalid operand
+#CHECK: clgdbr	%r0, 0, %f0, -1
+#CHECK: error: invalid operand
+#CHECK: clgdbr	%r0, 0, %f0, 16
+#CHECK: error: invalid operand
+#CHECK: clgdbr	%r0, -1, %f0, 0
+#CHECK: error: invalid operand
+#CHECK: clgdbr	%r0, 16, %f0, 0
+
+	clgdbr	%r0, 0, %f0, -1
+	clgdbr	%r0, 0, %f0, 16
+	clgdbr	%r0, -1, %f0, 0
+	clgdbr	%r0, 16, %f0, 0
+
+#CHECK: error: invalid operand
+#CHECK: clgebr	%r0, 0, %f0, -1
+#CHECK: error: invalid operand
+#CHECK: clgebr	%r0, 0, %f0, 16
+#CHECK: error: invalid operand
+#CHECK: clgebr	%r0, -1, %f0, 0
+#CHECK: error: invalid operand
+#CHECK: clgebr	%r0, 16, %f0, 0
+
+	clgebr	%r0, 0, %f0, -1
+	clgebr	%r0, 0, %f0, 16
+	clgebr	%r0, -1, %f0, 0
+	clgebr	%r0, 16, %f0, 0
+
+#CHECK: error: invalid operand
+#CHECK: clgxbr	%r0, 0, %f0, -1
+#CHECK: error: invalid operand
+#CHECK: clgxbr	%r0, 0, %f0, 16
+#CHECK: error: invalid operand
+#CHECK: clgxbr	%r0, -1, %f0, 0
+#CHECK: error: invalid operand
+#CHECK: clgxbr	%r0, 16, %f0, 0
+#CHECK: error: invalid register pair
+#CHECK: clgxbr	%r0, 0, %f14, 0
+
+	clgxbr	%r0, 0, %f0, -1
+	clgxbr	%r0, 0, %f0, 16
+	clgxbr	%r0, -1, %f0, 0
+	clgxbr	%r0, 16, %f0, 0
+	clgxbr	%r0, 0, %f14, 0
+
+#CHECK: error: invalid operand
 #CHECK: clhf	%r0, -524289
 #CHECK: error: invalid operand
 #CHECK: clhf	%r0, 524288
@@ -65,6 +211,40 @@
 	clih	%r0, (1 << 32)
 
 #CHECK: error: invalid operand
+#CHECK: cxlfbr	%f0, 0, %r0, -1
+#CHECK: error: invalid operand
+#CHECK: cxlfbr	%f0, 0, %r0, 16
+#CHECK: error: invalid operand
+#CHECK: cxlfbr	%f0, -1, %r0, 0
+#CHECK: error: invalid operand
+#CHECK: cxlfbr	%f0, 16, %r0, 0
+#CHECK: error: invalid register pair
+#CHECK: cxlfbr	%f2, 0, %r0, 0
+
+	cxlfbr	%f0, 0, %r0, -1
+	cxlfbr	%f0, 0, %r0, 16
+	cxlfbr	%f0, -1, %r0, 0
+	cxlfbr	%f0, 16, %r0, 0
+	cxlfbr	%f2, 0, %r0, 0
+
+#CHECK: error: invalid operand
+#CHECK: cxlgbr	%f0, 0, %r0, -1
+#CHECK: error: invalid operand
+#CHECK: cxlgbr	%f0, 0, %r0, 16
+#CHECK: error: invalid operand
+#CHECK: cxlgbr	%f0, -1, %r0, 0
+#CHECK: error: invalid operand
+#CHECK: cxlgbr	%f0, 16, %r0, 0
+#CHECK: error: invalid register pair
+#CHECK: cxlgbr	%f2, 0, %r0, 0
+
+	cxlgbr	%f0, 0, %r0, -1
+	cxlgbr	%f0, 0, %r0, 16
+	cxlgbr	%f0, -1, %r0, 0
+	cxlgbr	%f0, 16, %r0, 0
+	cxlgbr	%f2, 0, %r0, 0
+
+#CHECK: error: invalid operand
 #CHECK: fidbra	%f0, 0, %f0, -1
 #CHECK: error: invalid operand
 #CHECK: fidbra	%f0, 0, %f0, 16
@@ -113,6 +293,116 @@
 	fixbra	%f2, 0, %f0, 0
 
 #CHECK: error: invalid operand
+#CHECK: laa	%r0, %r0, -524289
+#CHECK: error: invalid operand
+#CHECK: laa	%r0, %r0, 524288
+#CHECK: error: invalid use of indexed addressing
+#CHECK: laa	%r0, %r0, 0(%r1,%r2)
+
+	laa	%r0, %r0, -524289
+	laa	%r0, %r0, 524288
+	laa	%r0, %r0, 0(%r1,%r2)
+
+#CHECK: error: invalid operand
+#CHECK: laag	%r0, %r0, -524289
+#CHECK: error: invalid operand
+#CHECK: laag	%r0, %r0, 524288
+#CHECK: error: invalid use of indexed addressing
+#CHECK: laag	%r0, %r0, 0(%r1,%r2)
+
+	laag	%r0, %r0, -524289
+	laag	%r0, %r0, 524288
+	laag	%r0, %r0, 0(%r1,%r2)
+
+#CHECK: error: invalid operand
+#CHECK: laal	%r0, %r0, -524289
+#CHECK: error: invalid operand
+#CHECK: laal	%r0, %r0, 524288
+#CHECK: error: invalid use of indexed addressing
+#CHECK: laal	%r0, %r0, 0(%r1,%r2)
+
+	laal	%r0, %r0, -524289
+	laal	%r0, %r0, 524288
+	laal	%r0, %r0, 0(%r1,%r2)
+
+#CHECK: error: invalid operand
+#CHECK: laalg	%r0, %r0, -524289
+#CHECK: error: invalid operand
+#CHECK: laalg	%r0, %r0, 524288
+#CHECK: error: invalid use of indexed addressing
+#CHECK: laalg	%r0, %r0, 0(%r1,%r2)
+
+	laalg	%r0, %r0, -524289
+	laalg	%r0, %r0, 524288
+	laalg	%r0, %r0, 0(%r1,%r2)
+
+#CHECK: error: invalid operand
+#CHECK: lan	%r0, %r0, -524289
+#CHECK: error: invalid operand
+#CHECK: lan	%r0, %r0, 524288
+#CHECK: error: invalid use of indexed addressing
+#CHECK: lan	%r0, %r0, 0(%r1,%r2)
+
+	lan	%r0, %r0, -524289
+	lan	%r0, %r0, 524288
+	lan	%r0, %r0, 0(%r1,%r2)
+
+#CHECK: error: invalid operand
+#CHECK: lang	%r0, %r0, -524289
+#CHECK: error: invalid operand
+#CHECK: lang	%r0, %r0, 524288
+#CHECK: error: invalid use of indexed addressing
+#CHECK: lang	%r0, %r0, 0(%r1,%r2)
+
+	lang	%r0, %r0, -524289
+	lang	%r0, %r0, 524288
+	lang	%r0, %r0, 0(%r1,%r2)
+
+#CHECK: error: invalid operand
+#CHECK: lao	%r0, %r0, -524289
+#CHECK: error: invalid operand
+#CHECK: lao	%r0, %r0, 524288
+#CHECK: error: invalid use of indexed addressing
+#CHECK: lao	%r0, %r0, 0(%r1,%r2)
+
+	lao	%r0, %r0, -524289
+	lao	%r0, %r0, 524288
+	lao	%r0, %r0, 0(%r1,%r2)
+
+#CHECK: error: invalid operand
+#CHECK: laog	%r0, %r0, -524289
+#CHECK: error: invalid operand
+#CHECK: laog	%r0, %r0, 524288
+#CHECK: error: invalid use of indexed addressing
+#CHECK: laog	%r0, %r0, 0(%r1,%r2)
+
+	laog	%r0, %r0, -524289
+	laog	%r0, %r0, 524288
+	laog	%r0, %r0, 0(%r1,%r2)
+
+#CHECK: error: invalid operand
+#CHECK: lax	%r0, %r0, -524289
+#CHECK: error: invalid operand
+#CHECK: lax	%r0, %r0, 524288
+#CHECK: error: invalid use of indexed addressing
+#CHECK: lax	%r0, %r0, 0(%r1,%r2)
+
+	lax	%r0, %r0, -524289
+	lax	%r0, %r0, 524288
+	lax	%r0, %r0, 0(%r1,%r2)
+
+#CHECK: error: invalid operand
+#CHECK: laxg	%r0, %r0, -524289
+#CHECK: error: invalid operand
+#CHECK: laxg	%r0, %r0, 524288
+#CHECK: error: invalid use of indexed addressing
+#CHECK: laxg	%r0, %r0, 0(%r1,%r2)
+
+	laxg	%r0, %r0, -524289
+	laxg	%r0, %r0, 524288
+	laxg	%r0, %r0, 0(%r1,%r2)
+
+#CHECK: error: invalid operand
 #CHECK: lbh	%r0, -524289
 #CHECK: error: invalid operand
 #CHECK: lbh	%r0, 524288
diff --git a/test/MC/SystemZ/insn-bad.s b/test/MC/SystemZ/insn-bad.s
index 2a3fb98..8004168 100644
--- a/test/MC/SystemZ/insn-bad.s
+++ b/test/MC/SystemZ/insn-bad.s
@@ -386,6 +386,16 @@
 	cdb	%f0, -1
 	cdb	%f0, 4096
 
+#CHECK: error: {{(instruction requires: fp-extension)?}}
+#CHECK: cdlfbr	%f0, 0, %r0, 0
+
+	cdlfbr	%f0, 0, %r0, 0
+
+#CHECK: error: {{(instruction requires: fp-extension)?}}
+#CHECK: cdlgbr	%f0, 0, %r0, 0
+
+	cdlgbr	%f0, 0, %r0, 0
+
 #CHECK: error: invalid operand
 #CHECK: ceb	%f0, -1
 #CHECK: error: invalid operand
@@ -394,6 +404,16 @@
 	ceb	%f0, -1
 	ceb	%f0, 4096
 
+#CHECK: error: {{(instruction requires: fp-extension)?}}
+#CHECK: celfbr	%f0, 0, %r0, 0
+
+	celfbr	%f0, 0, %r0, 0
+
+#CHECK: error: {{(instruction requires: fp-extension)?}}
+#CHECK: celgbr	%f0, 0, %r0, 0
+
+	celgbr	%f0, 0, %r0, 0
+
 #CHECK: error: invalid operand
 #CHECK: cfdbr	%r0, -1, %f0
 #CHECK: error: invalid operand
@@ -784,6 +804,16 @@
 
 	clhf	%r0, 0
 
+#CHECK: error: {{(instruction requires: fp-extension)?}}
+#CHECK: clfdbr	%r0, 0, %f0, 0
+
+	clfdbr	%r0, 0, %f0, 0
+
+#CHECK: error: {{(instruction requires: fp-extension)?}}
+#CHECK: clfebr	%r0, 0, %f0, 0
+
+	clfebr	%r0, 0, %f0, 0
+
 #CHECK: error: invalid operand
 #CHECK: clfhsi	-1, 0
 #CHECK: error: invalid operand
@@ -809,6 +839,11 @@
 	clfi	%r0, -1
 	clfi	%r0, (1 << 32)
 
+#CHECK: error: {{(instruction requires: fp-extension)?}}
+#CHECK: clfxbr	%r0, 0, %f0, 0
+
+	clfxbr	%r0, 0, %f0, 0
+
 #CHECK: error: invalid operand
 #CHECK: clg	%r0, -524289
 #CHECK: error: invalid operand
@@ -817,6 +852,16 @@
 	clg	%r0, -524289
 	clg	%r0, 524288
 
+#CHECK: error: {{(instruction requires: fp-extension)?}}
+#CHECK: clgdbr	%r0, 0, %f0, 0
+
+	clgdbr	%r0, 0, %f0, 0
+
+#CHECK: error: {{(instruction requires: fp-extension)?}}
+#CHECK: clgebr	%r0, 0, %f0, 0
+
+	clgebr	%r0, 0, %f0, 0
+
 #CHECK: error: invalid operand
 #CHECK: clgf	%r0, -524289
 #CHECK: error: invalid operand
@@ -936,6 +981,11 @@
 	clgrl	%r0, 1
 	clgrl	%r0, 0x100000000
 
+#CHECK: error: {{(instruction requires: fp-extension)?}}
+#CHECK: clgxbr	%r0, 0, %f0, 0
+
+	clgxbr	%r0, 0, %f0, 0
+
 #CHECK: error: invalid operand
 #CHECK: clhhsi	-1, 0
 #CHECK: error: invalid operand
@@ -1167,6 +1217,16 @@
 
 	cxgbr	%f2, %r0
 
+#CHECK: error: {{(instruction requires: fp-extension)?}}
+#CHECK: cxlfbr	%f0, 0, %r0, 0
+
+	cxlfbr	%f0, 0, %r0, 0
+
+#CHECK: error: {{(instruction requires: fp-extension)?}}
+#CHECK: cxlgbr	%f0, 0, %r0, 0
+
+	cxlgbr	%f0, 0, %r0, 0
+
 #CHECK: error: invalid operand
 #CHECK: cy	%r0, -524289
 #CHECK: error: invalid operand
@@ -1393,6 +1453,46 @@
 	la	%r0, -1
 	la	%r0, 4096
 
+#CHECK: error: {{(instruction requires: interlocked-access1)?}}
+#CHECK: laa	%r1, %r2, 100(%r3)
+	laa	%r1, %r2, 100(%r3)
+
+#CHECK: error: {{(instruction requires: interlocked-access1)?}}
+#CHECK: laag	%r1, %r2, 100(%r3)
+	laag	%r1, %r2, 100(%r3)
+
+#CHECK: error: {{(instruction requires: interlocked-access1)?}}
+#CHECK: laal	%r1, %r2, 100(%r3)
+	laal	%r1, %r2, 100(%r3)
+
+#CHECK: error: {{(instruction requires: interlocked-access1)?}}
+#CHECK: laalg	%r1, %r2, 100(%r3)
+	laalg	%r1, %r2, 100(%r3)
+
+#CHECK: error: {{(instruction requires: interlocked-access1)?}}
+#CHECK: lan	%r1, %r2, 100(%r3)
+	lan	%r1, %r2, 100(%r3)
+
+#CHECK: error: {{(instruction requires: interlocked-access1)?}}
+#CHECK: lang	%r1, %r2, 100(%r3)
+	lang	%r1, %r2, 100(%r3)
+
+#CHECK: error: {{(instruction requires: interlocked-access1)?}}
+#CHECK: lao	%r1, %r2, 100(%r3)
+	lao	%r1, %r2, 100(%r3)
+
+#CHECK: error: {{(instruction requires: interlocked-access1)?}}
+#CHECK: laog	%r1, %r2, 100(%r3)
+	laog	%r1, %r2, 100(%r3)
+
+#CHECK: error: {{(instruction requires: interlocked-access1)?}}
+#CHECK: lax	%r1, %r2, 100(%r3)
+	lax	%r1, %r2, 100(%r3)
+
+#CHECK: error: {{(instruction requires: interlocked-access1)?}}
+#CHECK: laxg	%r1, %r2, 100(%r3)
+	laxg	%r1, %r2, 100(%r3)
+
 #CHECK: error: offset out of range
 #CHECK: larl	%r0, -0x1000000002
 #CHECK: error: offset out of range
diff --git a/test/MC/SystemZ/insn-good-z196.s b/test/MC/SystemZ/insn-good-z196.s
index 258e06f..834bdad 100644
--- a/test/MC/SystemZ/insn-good-z196.s
+++ b/test/MC/SystemZ/insn-good-z196.s
@@ -135,6 +135,62 @@
 	ark	%r15,%r0,%r0
 	ark	%r7,%r8,%r9
 
+#CHECK: cdlfbr	%f0, 0, %r0, 0          # encoding: [0xb3,0x91,0x00,0x00]
+#CHECK: cdlfbr	%f0, 0, %r0, 15         # encoding: [0xb3,0x91,0x0f,0x00]
+#CHECK: cdlfbr	%f0, 0, %r15, 0         # encoding: [0xb3,0x91,0x00,0x0f]
+#CHECK: cdlfbr	%f0, 15, %r0, 0         # encoding: [0xb3,0x91,0xf0,0x00]
+#CHECK: cdlfbr	%f4, 5, %r6, 7          # encoding: [0xb3,0x91,0x57,0x46]
+#CHECK: cdlfbr	%f15, 0, %r0, 0         # encoding: [0xb3,0x91,0x00,0xf0]
+
+	cdlfbr	%f0, 0, %r0, 0
+	cdlfbr	%f0, 0, %r0, 15
+	cdlfbr	%f0, 0, %r15, 0
+	cdlfbr	%f0, 15, %r0, 0
+	cdlfbr	%f4, 5, %r6, 7
+	cdlfbr	%f15, 0, %r0, 0
+
+#CHECK: cdlgbr	%f0, 0, %r0, 0          # encoding: [0xb3,0xa1,0x00,0x00]
+#CHECK: cdlgbr	%f0, 0, %r0, 15         # encoding: [0xb3,0xa1,0x0f,0x00]
+#CHECK: cdlgbr	%f0, 0, %r15, 0         # encoding: [0xb3,0xa1,0x00,0x0f]
+#CHECK: cdlgbr	%f0, 15, %r0, 0         # encoding: [0xb3,0xa1,0xf0,0x00]
+#CHECK: cdlgbr	%f4, 5, %r6, 7          # encoding: [0xb3,0xa1,0x57,0x46]
+#CHECK: cdlgbr	%f15, 0, %r0, 0         # encoding: [0xb3,0xa1,0x00,0xf0]
+
+	cdlgbr	%f0, 0, %r0, 0
+	cdlgbr	%f0, 0, %r0, 15
+	cdlgbr	%f0, 0, %r15, 0
+	cdlgbr	%f0, 15, %r0, 0
+	cdlgbr	%f4, 5, %r6, 7
+	cdlgbr	%f15, 0, %r0, 0
+
+#CHECK: celfbr	%f0, 0, %r0, 0          # encoding: [0xb3,0x90,0x00,0x00]
+#CHECK: celfbr	%f0, 0, %r0, 15         # encoding: [0xb3,0x90,0x0f,0x00]
+#CHECK: celfbr	%f0, 0, %r15, 0         # encoding: [0xb3,0x90,0x00,0x0f]
+#CHECK: celfbr	%f0, 15, %r0, 0         # encoding: [0xb3,0x90,0xf0,0x00]
+#CHECK: celfbr	%f4, 5, %r6, 7          # encoding: [0xb3,0x90,0x57,0x46]
+#CHECK: celfbr	%f15, 0, %r0, 0         # encoding: [0xb3,0x90,0x00,0xf0]
+
+	celfbr	%f0, 0, %r0, 0
+	celfbr	%f0, 0, %r0, 15
+	celfbr	%f0, 0, %r15, 0
+	celfbr	%f0, 15, %r0, 0
+	celfbr	%f4, 5, %r6, 7
+	celfbr	%f15, 0, %r0, 0
+
+#CHECK: celgbr	%f0, 0, %r0, 0          # encoding: [0xb3,0xa0,0x00,0x00]
+#CHECK: celgbr	%f0, 0, %r0, 15         # encoding: [0xb3,0xa0,0x0f,0x00]
+#CHECK: celgbr	%f0, 0, %r15, 0         # encoding: [0xb3,0xa0,0x00,0x0f]
+#CHECK: celgbr	%f0, 15, %r0, 0         # encoding: [0xb3,0xa0,0xf0,0x00]
+#CHECK: celgbr	%f4, 5, %r6, 7          # encoding: [0xb3,0xa0,0x57,0x46]
+#CHECK: celgbr	%f15, 0, %r0, 0         # encoding: [0xb3,0xa0,0x00,0xf0]
+
+	celgbr	%f0, 0, %r0, 0
+	celgbr	%f0, 0, %r0, 15
+	celgbr	%f0, 0, %r15, 0
+	celgbr	%f0, 15, %r0, 0
+	celgbr	%f4, 5, %r6, 7
+	celgbr	%f15, 0, %r0, 0
+
 #CHECK: chf	%r0, -524288            # encoding: [0xe3,0x00,0x00,0x00,0x80,0xcd]
 #CHECK: chf	%r0, -1                 # encoding: [0xe3,0x00,0x0f,0xff,0xff,0xcd]
 #CHECK: chf	%r0, 0                  # encoding: [0xe3,0x00,0x00,0x00,0x00,0xcd]
@@ -171,6 +227,90 @@
 	cih	%r0, (1 << 31) - 1
 	cih	%r15, 0
 
+#CHECK: clfdbr	%r0, 0, %f0, 0          # encoding: [0xb3,0x9d,0x00,0x00]
+#CHECK: clfdbr	%r0, 0, %f0, 15         # encoding: [0xb3,0x9d,0x0f,0x00]
+#CHECK: clfdbr	%r0, 0, %f15, 0         # encoding: [0xb3,0x9d,0x00,0x0f]
+#CHECK: clfdbr	%r0, 15, %f0, 0         # encoding: [0xb3,0x9d,0xf0,0x00]
+#CHECK: clfdbr	%r4, 5, %f6, 7          # encoding: [0xb3,0x9d,0x57,0x46]
+#CHECK: clfdbr	%r15, 0, %f0, 0         # encoding: [0xb3,0x9d,0x00,0xf0]
+
+	clfdbr	%r0, 0, %f0, 0
+	clfdbr	%r0, 0, %f0, 15
+	clfdbr	%r0, 0, %f15, 0
+	clfdbr	%r0, 15, %f0, 0
+	clfdbr	%r4, 5, %f6, 7
+	clfdbr	%r15, 0, %f0, 0
+
+#CHECK: clfebr	%r0, 0, %f0, 0          # encoding: [0xb3,0x9c,0x00,0x00]
+#CHECK: clfebr	%r0, 0, %f0, 15         # encoding: [0xb3,0x9c,0x0f,0x00]
+#CHECK: clfebr	%r0, 0, %f15, 0         # encoding: [0xb3,0x9c,0x00,0x0f]
+#CHECK: clfebr	%r0, 15, %f0, 0         # encoding: [0xb3,0x9c,0xf0,0x00]
+#CHECK: clfebr	%r4, 5, %f6, 7          # encoding: [0xb3,0x9c,0x57,0x46]
+#CHECK: clfebr	%r15, 0, %f0, 0         # encoding: [0xb3,0x9c,0x00,0xf0]
+
+	clfebr	%r0, 0, %f0, 0
+	clfebr	%r0, 0, %f0, 15
+	clfebr	%r0, 0, %f15, 0
+	clfebr	%r0, 15, %f0, 0
+	clfebr	%r4, 5, %f6, 7
+	clfebr	%r15, 0, %f0, 0
+
+#CHECK: clfxbr	%r0, 0, %f0, 0          # encoding: [0xb3,0x9e,0x00,0x00]
+#CHECK: clfxbr	%r0, 0, %f0, 15         # encoding: [0xb3,0x9e,0x0f,0x00]
+#CHECK: clfxbr	%r0, 0, %f13, 0         # encoding: [0xb3,0x9e,0x00,0x0d]
+#CHECK: clfxbr	%r0, 15, %f0, 0         # encoding: [0xb3,0x9e,0xf0,0x00]
+#CHECK: clfxbr	%r7, 5, %f8, 9          # encoding: [0xb3,0x9e,0x59,0x78]
+#CHECK: clfxbr	%r15, 0, %f0, 0         # encoding: [0xb3,0x9e,0x00,0xf0]
+
+	clfxbr	%r0, 0, %f0, 0
+	clfxbr	%r0, 0, %f0, 15
+	clfxbr	%r0, 0, %f13, 0
+	clfxbr	%r0, 15, %f0, 0
+	clfxbr	%r7, 5, %f8, 9
+	clfxbr	%r15, 0, %f0, 0
+
+#CHECK: clgdbr	%r0, 0, %f0, 0          # encoding: [0xb3,0xad,0x00,0x00]
+#CHECK: clgdbr	%r0, 0, %f0, 15         # encoding: [0xb3,0xad,0x0f,0x00]
+#CHECK: clgdbr	%r0, 0, %f15, 0         # encoding: [0xb3,0xad,0x00,0x0f]
+#CHECK: clgdbr	%r0, 15, %f0, 0         # encoding: [0xb3,0xad,0xf0,0x00]
+#CHECK: clgdbr	%r4, 5, %f6, 7          # encoding: [0xb3,0xad,0x57,0x46]
+#CHECK: clgdbr	%r15, 0, %f0, 0         # encoding: [0xb3,0xad,0x00,0xf0]
+
+	clgdbr	%r0, 0, %f0, 0
+	clgdbr	%r0, 0, %f0, 15
+	clgdbr	%r0, 0, %f15, 0
+	clgdbr	%r0, 15, %f0, 0
+	clgdbr	%r4, 5, %f6, 7
+	clgdbr	%r15, 0, %f0, 0
+
+#CHECK: clgebr	%r0, 0, %f0, 0          # encoding: [0xb3,0xac,0x00,0x00]
+#CHECK: clgebr	%r0, 0, %f0, 15         # encoding: [0xb3,0xac,0x0f,0x00]
+#CHECK: clgebr	%r0, 0, %f15, 0         # encoding: [0xb3,0xac,0x00,0x0f]
+#CHECK: clgebr	%r0, 15, %f0, 0         # encoding: [0xb3,0xac,0xf0,0x00]
+#CHECK: clgebr	%r4, 5, %f6, 7          # encoding: [0xb3,0xac,0x57,0x46]
+#CHECK: clgebr	%r15, 0, %f0, 0         # encoding: [0xb3,0xac,0x00,0xf0]
+
+	clgebr	%r0, 0, %f0, 0
+	clgebr	%r0, 0, %f0, 15
+	clgebr	%r0, 0, %f15, 0
+	clgebr	%r0, 15, %f0, 0
+	clgebr	%r4, 5, %f6, 7
+	clgebr	%r15, 0, %f0, 0
+
+#CHECK: clgxbr	%r0, 0, %f0, 0          # encoding: [0xb3,0xae,0x00,0x00]
+#CHECK: clgxbr	%r0, 0, %f0, 15         # encoding: [0xb3,0xae,0x0f,0x00]
+#CHECK: clgxbr	%r0, 0, %f13, 0         # encoding: [0xb3,0xae,0x00,0x0d]
+#CHECK: clgxbr	%r0, 15, %f0, 0         # encoding: [0xb3,0xae,0xf0,0x00]
+#CHECK: clgxbr	%r7, 5, %f8, 9          # encoding: [0xb3,0xae,0x59,0x78]
+#CHECK: clgxbr	%r15, 0, %f0, 0         # encoding: [0xb3,0xae,0x00,0xf0]
+
+	clgxbr	%r0, 0, %f0, 0
+	clgxbr	%r0, 0, %f0, 15
+	clgxbr	%r0, 0, %f13, 0
+	clgxbr	%r0, 15, %f0, 0
+	clgxbr	%r7, 5, %f8, 9
+	clgxbr	%r15, 0, %f0, 0
+
 #CHECK: clhf	%r0, -524288            # encoding: [0xe3,0x00,0x00,0x00,0x80,0xcf]
 #CHECK: clhf	%r0, -1                 # encoding: [0xe3,0x00,0x0f,0xff,0xff,0xcf]
 #CHECK: clhf	%r0, 0                  # encoding: [0xe3,0x00,0x00,0x00,0x00,0xcf]
@@ -203,6 +343,34 @@
 	clih	%r0, (1 << 32) - 1
 	clih	%r15, 0
 
+#CHECK: cxlfbr	%f0, 0, %r0, 0          # encoding: [0xb3,0x92,0x00,0x00]
+#CHECK: cxlfbr	%f0, 0, %r0, 15         # encoding: [0xb3,0x92,0x0f,0x00]
+#CHECK: cxlfbr	%f0, 0, %r15, 0         # encoding: [0xb3,0x92,0x00,0x0f]
+#CHECK: cxlfbr	%f0, 15, %r0, 0         # encoding: [0xb3,0x92,0xf0,0x00]
+#CHECK: cxlfbr	%f4, 5, %r9, 10         # encoding: [0xb3,0x92,0x5a,0x49]
+#CHECK: cxlfbr	%f13, 0, %r0, 0         # encoding: [0xb3,0x92,0x00,0xd0]
+
+	cxlfbr	%f0, 0, %r0, 0
+	cxlfbr	%f0, 0, %r0, 15
+	cxlfbr	%f0, 0, %r15, 0
+	cxlfbr	%f0, 15, %r0, 0
+	cxlfbr	%f4, 5, %r9, 10
+	cxlfbr	%f13, 0, %r0, 0
+
+#CHECK: cxlgbr	%f0, 0, %r0, 0          # encoding: [0xb3,0xa2,0x00,0x00]
+#CHECK: cxlgbr	%f0, 0, %r0, 15         # encoding: [0xb3,0xa2,0x0f,0x00]
+#CHECK: cxlgbr	%f0, 0, %r15, 0         # encoding: [0xb3,0xa2,0x00,0x0f]
+#CHECK: cxlgbr	%f0, 15, %r0, 0         # encoding: [0xb3,0xa2,0xf0,0x00]
+#CHECK: cxlgbr	%f4, 5, %r9, 10         # encoding: [0xb3,0xa2,0x5a,0x49]
+#CHECK: cxlgbr	%f13, 0, %r0, 0         # encoding: [0xb3,0xa2,0x00,0xd0]
+
+	cxlgbr	%f0, 0, %r0, 0
+	cxlgbr	%f0, 0, %r0, 15
+	cxlgbr	%f0, 0, %r15, 0
+	cxlgbr	%f0, 15, %r0, 0
+	cxlgbr	%f4, 5, %r9, 10
+	cxlgbr	%f13, 0, %r0, 0
+
 #CHECK: fidbra	%f0, 0, %f0, 0          # encoding: [0xb3,0x5f,0x00,0x00]
 #CHECK: fidbra	%f0, 0, %f0, 15         # encoding: [0xb3,0x5f,0x0f,0x00]
 #CHECK: fidbra	%f0, 0, %f15, 0         # encoding: [0xb3,0x5f,0x00,0x0f]
@@ -245,6 +413,246 @@
 	fixbra	%f4, 5, %f8, 9
 	fixbra	%f13, 0, %f0, 0
 
+#CHECK: laa	%r0, %r0, -524288       # encoding: [0xeb,0x00,0x00,0x00,0x80,0xf8]
+#CHECK: laa	%r0, %r0, -1            # encoding: [0xeb,0x00,0x0f,0xff,0xff,0xf8]
+#CHECK: laa	%r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0xf8]
+#CHECK: laa	%r0, %r0, 1             # encoding: [0xeb,0x00,0x00,0x01,0x00,0xf8]
+#CHECK: laa	%r0, %r0, 524287        # encoding: [0xeb,0x00,0x0f,0xff,0x7f,0xf8]
+#CHECK: laa	%r0, %r0, 0(%r1)        # encoding: [0xeb,0x00,0x10,0x00,0x00,0xf8]
+#CHECK: laa	%r0, %r0, 0(%r15)       # encoding: [0xeb,0x00,0xf0,0x00,0x00,0xf8]
+#CHECK: laa	%r0, %r0, 524287(%r1)   # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0xf8]
+#CHECK: laa	%r0, %r0, 524287(%r15)  # encoding: [0xeb,0x00,0xff,0xff,0x7f,0xf8]
+#CHECK: laa	%r0, %r15, 0            # encoding: [0xeb,0x0f,0x00,0x00,0x00,0xf8]
+#CHECK: laa	%r15, %r0, 0            # encoding: [0xeb,0xf0,0x00,0x00,0x00,0xf8]
+
+	laa	%r0, %r0, -524288
+	laa	%r0, %r0, -1
+	laa	%r0, %r0, 0
+	laa	%r0, %r0, 1
+	laa	%r0, %r0, 524287
+	laa	%r0, %r0, 0(%r1)
+	laa	%r0, %r0, 0(%r15)
+	laa	%r0, %r0, 524287(%r1)
+	laa	%r0, %r0, 524287(%r15)
+	laa	%r0, %r15, 0
+	laa	%r15, %r0, 0
+
+#CHECK: laag	%r0, %r0, -524288       # encoding: [0xeb,0x00,0x00,0x00,0x80,0xe8]
+#CHECK: laag	%r0, %r0, -1            # encoding: [0xeb,0x00,0x0f,0xff,0xff,0xe8]
+#CHECK: laag	%r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0xe8]
+#CHECK: laag	%r0, %r0, 1             # encoding: [0xeb,0x00,0x00,0x01,0x00,0xe8]
+#CHECK: laag	%r0, %r0, 524287        # encoding: [0xeb,0x00,0x0f,0xff,0x7f,0xe8]
+#CHECK: laag	%r0, %r0, 0(%r1)        # encoding: [0xeb,0x00,0x10,0x00,0x00,0xe8]
+#CHECK: laag	%r0, %r0, 0(%r15)       # encoding: [0xeb,0x00,0xf0,0x00,0x00,0xe8]
+#CHECK: laag	%r0, %r0, 524287(%r1)   # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0xe8]
+#CHECK: laag	%r0, %r0, 524287(%r15)  # encoding: [0xeb,0x00,0xff,0xff,0x7f,0xe8]
+#CHECK: laag	%r0, %r15, 0            # encoding: [0xeb,0x0f,0x00,0x00,0x00,0xe8]
+#CHECK: laag	%r15, %r0, 0            # encoding: [0xeb,0xf0,0x00,0x00,0x00,0xe8]
+
+	laag	%r0, %r0, -524288
+	laag	%r0, %r0, -1
+	laag	%r0, %r0, 0
+	laag	%r0, %r0, 1
+	laag	%r0, %r0, 524287
+	laag	%r0, %r0, 0(%r1)
+	laag	%r0, %r0, 0(%r15)
+	laag	%r0, %r0, 524287(%r1)
+	laag	%r0, %r0, 524287(%r15)
+	laag	%r0, %r15, 0
+	laag	%r15, %r0, 0
+
+#CHECK: laal	%r0, %r0, -524288       # encoding: [0xeb,0x00,0x00,0x00,0x80,0xfa]
+#CHECK: laal	%r0, %r0, -1            # encoding: [0xeb,0x00,0x0f,0xff,0xff,0xfa]
+#CHECK: laal	%r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0xfa]
+#CHECK: laal	%r0, %r0, 1             # encoding: [0xeb,0x00,0x00,0x01,0x00,0xfa]
+#CHECK: laal	%r0, %r0, 524287        # encoding: [0xeb,0x00,0x0f,0xff,0x7f,0xfa]
+#CHECK: laal	%r0, %r0, 0(%r1)        # encoding: [0xeb,0x00,0x10,0x00,0x00,0xfa]
+#CHECK: laal	%r0, %r0, 0(%r15)       # encoding: [0xeb,0x00,0xf0,0x00,0x00,0xfa]
+#CHECK: laal	%r0, %r0, 524287(%r1)   # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0xfa]
+#CHECK: laal	%r0, %r0, 524287(%r15)  # encoding: [0xeb,0x00,0xff,0xff,0x7f,0xfa]
+#CHECK: laal	%r0, %r15, 0            # encoding: [0xeb,0x0f,0x00,0x00,0x00,0xfa]
+#CHECK: laal	%r15, %r0, 0            # encoding: [0xeb,0xf0,0x00,0x00,0x00,0xfa]
+
+	laal	%r0, %r0, -524288
+	laal	%r0, %r0, -1
+	laal	%r0, %r0, 0
+	laal	%r0, %r0, 1
+	laal	%r0, %r0, 524287
+	laal	%r0, %r0, 0(%r1)
+	laal	%r0, %r0, 0(%r15)
+	laal	%r0, %r0, 524287(%r1)
+	laal	%r0, %r0, 524287(%r15)
+	laal	%r0, %r15, 0
+	laal	%r15, %r0, 0
+
+#CHECK: laalg	%r0, %r0, -524288       # encoding: [0xeb,0x00,0x00,0x00,0x80,0xea]
+#CHECK: laalg	%r0, %r0, -1            # encoding: [0xeb,0x00,0x0f,0xff,0xff,0xea]
+#CHECK: laalg	%r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0xea]
+#CHECK: laalg	%r0, %r0, 1             # encoding: [0xeb,0x00,0x00,0x01,0x00,0xea]
+#CHECK: laalg	%r0, %r0, 524287        # encoding: [0xeb,0x00,0x0f,0xff,0x7f,0xea]
+#CHECK: laalg	%r0, %r0, 0(%r1)        # encoding: [0xeb,0x00,0x10,0x00,0x00,0xea]
+#CHECK: laalg	%r0, %r0, 0(%r15)       # encoding: [0xeb,0x00,0xf0,0x00,0x00,0xea]
+#CHECK: laalg	%r0, %r0, 524287(%r1)   # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0xea]
+#CHECK: laalg	%r0, %r0, 524287(%r15)  # encoding: [0xeb,0x00,0xff,0xff,0x7f,0xea]
+#CHECK: laalg	%r0, %r15, 0            # encoding: [0xeb,0x0f,0x00,0x00,0x00,0xea]
+#CHECK: laalg	%r15, %r0, 0            # encoding: [0xeb,0xf0,0x00,0x00,0x00,0xea]
+
+	laalg	%r0, %r0, -524288
+	laalg	%r0, %r0, -1
+	laalg	%r0, %r0, 0
+	laalg	%r0, %r0, 1
+	laalg	%r0, %r0, 524287
+	laalg	%r0, %r0, 0(%r1)
+	laalg	%r0, %r0, 0(%r15)
+	laalg	%r0, %r0, 524287(%r1)
+	laalg	%r0, %r0, 524287(%r15)
+	laalg	%r0, %r15, 0
+	laalg	%r15, %r0, 0
+
+#CHECK: lan	%r0, %r0, -524288       # encoding: [0xeb,0x00,0x00,0x00,0x80,0xf4]
+#CHECK: lan	%r0, %r0, -1            # encoding: [0xeb,0x00,0x0f,0xff,0xff,0xf4]
+#CHECK: lan	%r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0xf4]
+#CHECK: lan	%r0, %r0, 1             # encoding: [0xeb,0x00,0x00,0x01,0x00,0xf4]
+#CHECK: lan	%r0, %r0, 524287        # encoding: [0xeb,0x00,0x0f,0xff,0x7f,0xf4]
+#CHECK: lan	%r0, %r0, 0(%r1)        # encoding: [0xeb,0x00,0x10,0x00,0x00,0xf4]
+#CHECK: lan	%r0, %r0, 0(%r15)       # encoding: [0xeb,0x00,0xf0,0x00,0x00,0xf4]
+#CHECK: lan	%r0, %r0, 524287(%r1)   # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0xf4]
+#CHECK: lan	%r0, %r0, 524287(%r15)  # encoding: [0xeb,0x00,0xff,0xff,0x7f,0xf4]
+#CHECK: lan	%r0, %r15, 0            # encoding: [0xeb,0x0f,0x00,0x00,0x00,0xf4]
+#CHECK: lan	%r15, %r0, 0            # encoding: [0xeb,0xf0,0x00,0x00,0x00,0xf4]
+
+	lan	%r0, %r0, -524288
+	lan	%r0, %r0, -1
+	lan	%r0, %r0, 0
+	lan	%r0, %r0, 1
+	lan	%r0, %r0, 524287
+	lan	%r0, %r0, 0(%r1)
+	lan	%r0, %r0, 0(%r15)
+	lan	%r0, %r0, 524287(%r1)
+	lan	%r0, %r0, 524287(%r15)
+	lan	%r0, %r15, 0
+	lan	%r15, %r0, 0
+
+#CHECK: lang	%r0, %r0, -524288       # encoding: [0xeb,0x00,0x00,0x00,0x80,0xe4]
+#CHECK: lang	%r0, %r0, -1            # encoding: [0xeb,0x00,0x0f,0xff,0xff,0xe4]
+#CHECK: lang	%r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0xe4]
+#CHECK: lang	%r0, %r0, 1             # encoding: [0xeb,0x00,0x00,0x01,0x00,0xe4]
+#CHECK: lang	%r0, %r0, 524287        # encoding: [0xeb,0x00,0x0f,0xff,0x7f,0xe4]
+#CHECK: lang	%r0, %r0, 0(%r1)        # encoding: [0xeb,0x00,0x10,0x00,0x00,0xe4]
+#CHECK: lang	%r0, %r0, 0(%r15)       # encoding: [0xeb,0x00,0xf0,0x00,0x00,0xe4]
+#CHECK: lang	%r0, %r0, 524287(%r1)   # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0xe4]
+#CHECK: lang	%r0, %r0, 524287(%r15)  # encoding: [0xeb,0x00,0xff,0xff,0x7f,0xe4]
+#CHECK: lang	%r0, %r15, 0            # encoding: [0xeb,0x0f,0x00,0x00,0x00,0xe4]
+#CHECK: lang	%r15, %r0, 0            # encoding: [0xeb,0xf0,0x00,0x00,0x00,0xe4]
+
+	lang	%r0, %r0, -524288
+	lang	%r0, %r0, -1
+	lang	%r0, %r0, 0
+	lang	%r0, %r0, 1
+	lang	%r0, %r0, 524287
+	lang	%r0, %r0, 0(%r1)
+	lang	%r0, %r0, 0(%r15)
+	lang	%r0, %r0, 524287(%r1)
+	lang	%r0, %r0, 524287(%r15)
+	lang	%r0, %r15, 0
+	lang	%r15, %r0, 0
+
+#CHECK: lao	%r0, %r0, -524288       # encoding: [0xeb,0x00,0x00,0x00,0x80,0xf6]
+#CHECK: lao	%r0, %r0, -1            # encoding: [0xeb,0x00,0x0f,0xff,0xff,0xf6]
+#CHECK: lao	%r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0xf6]
+#CHECK: lao	%r0, %r0, 1             # encoding: [0xeb,0x00,0x00,0x01,0x00,0xf6]
+#CHECK: lao	%r0, %r0, 524287        # encoding: [0xeb,0x00,0x0f,0xff,0x7f,0xf6]
+#CHECK: lao	%r0, %r0, 0(%r1)        # encoding: [0xeb,0x00,0x10,0x00,0x00,0xf6]
+#CHECK: lao	%r0, %r0, 0(%r15)       # encoding: [0xeb,0x00,0xf0,0x00,0x00,0xf6]
+#CHECK: lao	%r0, %r0, 524287(%r1)   # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0xf6]
+#CHECK: lao	%r0, %r0, 524287(%r15)  # encoding: [0xeb,0x00,0xff,0xff,0x7f,0xf6]
+#CHECK: lao	%r0, %r15, 0            # encoding: [0xeb,0x0f,0x00,0x00,0x00,0xf6]
+#CHECK: lao	%r15, %r0, 0            # encoding: [0xeb,0xf0,0x00,0x00,0x00,0xf6]
+
+	lao	%r0, %r0, -524288
+	lao	%r0, %r0, -1
+	lao	%r0, %r0, 0
+	lao	%r0, %r0, 1
+	lao	%r0, %r0, 524287
+	lao	%r0, %r0, 0(%r1)
+	lao	%r0, %r0, 0(%r15)
+	lao	%r0, %r0, 524287(%r1)
+	lao	%r0, %r0, 524287(%r15)
+	lao	%r0, %r15, 0
+	lao	%r15, %r0, 0
+
+#CHECK: laog	%r0, %r0, -524288       # encoding: [0xeb,0x00,0x00,0x00,0x80,0xe6]
+#CHECK: laog	%r0, %r0, -1            # encoding: [0xeb,0x00,0x0f,0xff,0xff,0xe6]
+#CHECK: laog	%r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0xe6]
+#CHECK: laog	%r0, %r0, 1             # encoding: [0xeb,0x00,0x00,0x01,0x00,0xe6]
+#CHECK: laog	%r0, %r0, 524287        # encoding: [0xeb,0x00,0x0f,0xff,0x7f,0xe6]
+#CHECK: laog	%r0, %r0, 0(%r1)        # encoding: [0xeb,0x00,0x10,0x00,0x00,0xe6]
+#CHECK: laog	%r0, %r0, 0(%r15)       # encoding: [0xeb,0x00,0xf0,0x00,0x00,0xe6]
+#CHECK: laog	%r0, %r0, 524287(%r1)   # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0xe6]
+#CHECK: laog	%r0, %r0, 524287(%r15)  # encoding: [0xeb,0x00,0xff,0xff,0x7f,0xe6]
+#CHECK: laog	%r0, %r15, 0            # encoding: [0xeb,0x0f,0x00,0x00,0x00,0xe6]
+#CHECK: laog	%r15, %r0, 0            # encoding: [0xeb,0xf0,0x00,0x00,0x00,0xe6]
+
+	laog	%r0, %r0, -524288
+	laog	%r0, %r0, -1
+	laog	%r0, %r0, 0
+	laog	%r0, %r0, 1
+	laog	%r0, %r0, 524287
+	laog	%r0, %r0, 0(%r1)
+	laog	%r0, %r0, 0(%r15)
+	laog	%r0, %r0, 524287(%r1)
+	laog	%r0, %r0, 524287(%r15)
+	laog	%r0, %r15, 0
+	laog	%r15, %r0, 0
+
+#CHECK: lax	%r0, %r0, -524288       # encoding: [0xeb,0x00,0x00,0x00,0x80,0xf7]
+#CHECK: lax	%r0, %r0, -1            # encoding: [0xeb,0x00,0x0f,0xff,0xff,0xf7]
+#CHECK: lax	%r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0xf7]
+#CHECK: lax	%r0, %r0, 1             # encoding: [0xeb,0x00,0x00,0x01,0x00,0xf7]
+#CHECK: lax	%r0, %r0, 524287        # encoding: [0xeb,0x00,0x0f,0xff,0x7f,0xf7]
+#CHECK: lax	%r0, %r0, 0(%r1)        # encoding: [0xeb,0x00,0x10,0x00,0x00,0xf7]
+#CHECK: lax	%r0, %r0, 0(%r15)       # encoding: [0xeb,0x00,0xf0,0x00,0x00,0xf7]
+#CHECK: lax	%r0, %r0, 524287(%r1)   # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0xf7]
+#CHECK: lax	%r0, %r0, 524287(%r15)  # encoding: [0xeb,0x00,0xff,0xff,0x7f,0xf7]
+#CHECK: lax	%r0, %r15, 0            # encoding: [0xeb,0x0f,0x00,0x00,0x00,0xf7]
+#CHECK: lax	%r15, %r0, 0            # encoding: [0xeb,0xf0,0x00,0x00,0x00,0xf7]
+
+	lax	%r0, %r0, -524288
+	lax	%r0, %r0, -1
+	lax	%r0, %r0, 0
+	lax	%r0, %r0, 1
+	lax	%r0, %r0, 524287
+	lax	%r0, %r0, 0(%r1)
+	lax	%r0, %r0, 0(%r15)
+	lax	%r0, %r0, 524287(%r1)
+	lax	%r0, %r0, 524287(%r15)
+	lax	%r0, %r15, 0
+	lax	%r15, %r0, 0
+
+#CHECK: laxg	%r0, %r0, -524288       # encoding: [0xeb,0x00,0x00,0x00,0x80,0xe7]
+#CHECK: laxg	%r0, %r0, -1            # encoding: [0xeb,0x00,0x0f,0xff,0xff,0xe7]
+#CHECK: laxg	%r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0xe7]
+#CHECK: laxg	%r0, %r0, 1             # encoding: [0xeb,0x00,0x00,0x01,0x00,0xe7]
+#CHECK: laxg	%r0, %r0, 524287        # encoding: [0xeb,0x00,0x0f,0xff,0x7f,0xe7]
+#CHECK: laxg	%r0, %r0, 0(%r1)        # encoding: [0xeb,0x00,0x10,0x00,0x00,0xe7]
+#CHECK: laxg	%r0, %r0, 0(%r15)       # encoding: [0xeb,0x00,0xf0,0x00,0x00,0xe7]
+#CHECK: laxg	%r0, %r0, 524287(%r1)   # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0xe7]
+#CHECK: laxg	%r0, %r0, 524287(%r15)  # encoding: [0xeb,0x00,0xff,0xff,0x7f,0xe7]
+#CHECK: laxg	%r0, %r15, 0            # encoding: [0xeb,0x0f,0x00,0x00,0x00,0xe7]
+#CHECK: laxg	%r15, %r0, 0            # encoding: [0xeb,0xf0,0x00,0x00,0x00,0xe7]
+
+	laxg	%r0, %r0, -524288
+	laxg	%r0, %r0, -1
+	laxg	%r0, %r0, 0
+	laxg	%r0, %r0, 1
+	laxg	%r0, %r0, 524287
+	laxg	%r0, %r0, 0(%r1)
+	laxg	%r0, %r0, 0(%r15)
+	laxg	%r0, %r0, 524287(%r1)
+	laxg	%r0, %r0, 524287(%r15)
+	laxg	%r0, %r15, 0
+	laxg	%r15, %r0, 0
+
 #CHECK: lbh	%r0, -524288            # encoding: [0xe3,0x00,0x00,0x00,0x80,0xc0]
 #CHECK: lbh	%r0, -1                 # encoding: [0xe3,0x00,0x0f,0xff,0xff,0xc0]
 #CHECK: lbh	%r0, 0                  # encoding: [0xe3,0x00,0x00,0x00,0x00,0xc0]
diff --git a/test/MC/X86/address-size.s b/test/MC/X86/address-size.s
index b105b40..c9d04c4 100644
--- a/test/MC/X86/address-size.s
+++ b/test/MC/X86/address-size.s
@@ -8,6 +8,20 @@
 
 	.code32
 	movb	$0x0, (%si)
-// CHECK: encoding: [0x67,0xc6,0x06,0x00]
+// CHECK: encoding: [0x67,0xc6,0x04,0x00]
 	movb	$0x0, (%esi)
 // CHECK: encoding: [0xc6,0x06,0x00]
+	movw	$0x1234, (%si)
+// CHECK: encoding: [0x67,0x66,0xc7,0x04,0x34,0x12]
+	movl	$0x12345678, (%bx,%si,1)
+// CHECK: encoding: [0x67,0xc7,0x00,0x78,0x56,0x34,0x12]
+	movw	$0x1234, 0x5678(%bp)
+// CHECK: encoding: [0x67,0x66,0xc7,0x86,0x78,0x56,0x34,0x12]
+
+	.code16
+	movb	$0x0, (%si)
+// CHECK: encoding: [0xc6,0x04,0x00]
+	movb	$0x0, (%esi)
+// CHECK: encoding: [0x67,0xc6,0x06,0x00]
+	movb	$0x5a, (%di,%bp,1)
+// CHECK: encoding: [0xc6,0x03,0x5a]
diff --git a/test/MC/X86/avx512-encodings.s b/test/MC/X86/avx512-encodings.s
index 38f9190..42c50e1 100644
--- a/test/MC/X86/avx512-encodings.s
+++ b/test/MC/X86/avx512-encodings.s
@@ -1,5 +1,2125 @@
 // RUN: llvm-mc -triple x86_64-unknown-unknown -mcpu=knl --show-encoding %s | FileCheck %s
 
+// CHECK: vaddpd -8192(%rdx), %zmm27, %zmm8
+// CHECK:  encoding: [0x62,0x71,0xa5,0x40,0x58,0x42,0x80]
+          vaddpd -8192(%rdx), %zmm27, %zmm8
+
+// CHECK: vaddpd -1024(%rdx){1to8}, %zmm27, %zmm8
+// CHECK:  encoding: [0x62,0x71,0xa5,0x50,0x58,0x42,0x80]
+          vaddpd -1024(%rdx){1to8}, %zmm27, %zmm8
+
+// CHECK: vaddps -8192(%rdx), %zmm13, %zmm18
+// CHECK:  encoding: [0x62,0xe1,0x14,0x48,0x58,0x52,0x80]
+          vaddps -8192(%rdx), %zmm13, %zmm18
+
+// CHECK: vaddps -512(%rdx){1to16}, %zmm13, %zmm18
+// CHECK:  encoding: [0x62,0xe1,0x14,0x58,0x58,0x52,0x80]
+          vaddps -512(%rdx){1to16}, %zmm13, %zmm18
+
+// CHECK: vdivpd -8192(%rdx), %zmm6, %zmm18
+// CHECK:  encoding: [0x62,0xe1,0xcd,0x48,0x5e,0x52,0x80]
+          vdivpd -8192(%rdx), %zmm6, %zmm18
+
+// CHECK: vdivpd -1024(%rdx){1to8}, %zmm6, %zmm18
+// CHECK:  encoding: [0x62,0xe1,0xcd,0x58,0x5e,0x52,0x80]
+          vdivpd -1024(%rdx){1to8}, %zmm6, %zmm18
+
+// CHECK: vdivps -8192(%rdx), %zmm23, %zmm23
+// CHECK:  encoding: [0x62,0xe1,0x44,0x40,0x5e,0x7a,0x80]
+          vdivps -8192(%rdx), %zmm23, %zmm23
+
+// CHECK: vdivps -512(%rdx){1to16}, %zmm23, %zmm23
+// CHECK:  encoding: [0x62,0xe1,0x44,0x50,0x5e,0x7a,0x80]
+          vdivps -512(%rdx){1to16}, %zmm23, %zmm23
+
+// CHECK: vmaxpd -8192(%rdx), %zmm28, %zmm30
+// CHECK:  encoding: [0x62,0x61,0x9d,0x40,0x5f,0x72,0x80]
+          vmaxpd -8192(%rdx), %zmm28, %zmm30
+
+// CHECK: vmaxpd -1024(%rdx){1to8}, %zmm28, %zmm30
+// CHECK:  encoding: [0x62,0x61,0x9d,0x50,0x5f,0x72,0x80]
+          vmaxpd -1024(%rdx){1to8}, %zmm28, %zmm30
+
+// CHECK: vmaxps -8192(%rdx), %zmm6, %zmm25
+// CHECK:  encoding: [0x62,0x61,0x4c,0x48,0x5f,0x4a,0x80]
+          vmaxps -8192(%rdx), %zmm6, %zmm25
+
+// CHECK: vmaxps -512(%rdx){1to16}, %zmm6, %zmm25
+// CHECK:  encoding: [0x62,0x61,0x4c,0x58,0x5f,0x4a,0x80]
+          vmaxps -512(%rdx){1to16}, %zmm6, %zmm25
+
+// CHECK: vminpd -8192(%rdx), %zmm6, %zmm6
+// CHECK:  encoding: [0x62,0xf1,0xcd,0x48,0x5d,0x72,0x80]
+          vminpd -8192(%rdx), %zmm6, %zmm6
+
+// CHECK: vminpd -1024(%rdx){1to8}, %zmm6, %zmm6
+// CHECK:  encoding: [0x62,0xf1,0xcd,0x58,0x5d,0x72,0x80]
+          vminpd -1024(%rdx){1to8}, %zmm6, %zmm6
+
+// CHECK: vminps -8192(%rdx), %zmm3, %zmm3
+// CHECK:  encoding: [0x62,0xf1,0x64,0x48,0x5d,0x5a,0x80]
+          vminps -8192(%rdx), %zmm3, %zmm3
+
+// CHECK: vminps -512(%rdx){1to16}, %zmm3, %zmm3
+// CHECK:  encoding: [0x62,0xf1,0x64,0x58,0x5d,0x5a,0x80]
+          vminps -512(%rdx){1to16}, %zmm3, %zmm3
+
+// CHECK: vmulpd -8192(%rdx), %zmm4, %zmm24
+// CHECK:  encoding: [0x62,0x61,0xdd,0x48,0x59,0x42,0x80]
+          vmulpd -8192(%rdx), %zmm4, %zmm24
+
+// CHECK: vmulpd -1024(%rdx){1to8}, %zmm4, %zmm24
+// CHECK:  encoding: [0x62,0x61,0xdd,0x58,0x59,0x42,0x80]
+          vmulpd -1024(%rdx){1to8}, %zmm4, %zmm24
+
+// CHECK: vmulps -8192(%rdx), %zmm6, %zmm3
+// CHECK:  encoding: [0x62,0xf1,0x4c,0x48,0x59,0x5a,0x80]
+          vmulps -8192(%rdx), %zmm6, %zmm3
+
+// CHECK: vmulps -512(%rdx){1to16}, %zmm6, %zmm3
+// CHECK:  encoding: [0x62,0xf1,0x4c,0x58,0x59,0x5a,0x80]
+          vmulps -512(%rdx){1to16}, %zmm6, %zmm3
+
+// CHECK: vsubpd -8192(%rdx), %zmm12, %zmm9
+// CHECK:  encoding: [0x62,0x71,0x9d,0x48,0x5c,0x4a,0x80]
+          vsubpd -8192(%rdx), %zmm12, %zmm9
+
+// CHECK: vsubpd -1024(%rdx){1to8}, %zmm12, %zmm9
+// CHECK:  encoding: [0x62,0x71,0x9d,0x58,0x5c,0x4a,0x80]
+          vsubpd -1024(%rdx){1to8}, %zmm12, %zmm9
+
+// CHECK: vsubps -8192(%rdx), %zmm27, %zmm14
+// CHECK:  encoding: [0x62,0x71,0x24,0x40,0x5c,0x72,0x80]
+          vsubps -8192(%rdx), %zmm27, %zmm14
+
+// CHECK: vsubps -512(%rdx){1to16}, %zmm27, %zmm14
+// CHECK:  encoding: [0x62,0x71,0x24,0x50,0x5c,0x72,0x80]
+          vsubps -512(%rdx){1to16}, %zmm27, %zmm14
+
+// CHECK: vaddpd %zmm6, %zmm27, %zmm8
+// CHECK:  encoding: [0x62,0x71,0xa5,0x40,0x58,0xc6]
+          vaddpd %zmm6, %zmm27, %zmm8
+
+// CHECK: vaddpd %zmm6, %zmm27, %zmm8 {%k7}
+// CHECK:  encoding: [0x62,0x71,0xa5,0x47,0x58,0xc6]
+          vaddpd %zmm6, %zmm27, %zmm8 {%k7}
+
+// CHECK: vaddpd %zmm6, %zmm27, %zmm8 {%k7} {z}
+// CHECK:  encoding: [0x62,0x71,0xa5,0xc7,0x58,0xc6]
+          vaddpd %zmm6, %zmm27, %zmm8 {%k7} {z}
+
+// CHECK: vaddpd (%rcx), %zmm27, %zmm8
+// CHECK:  encoding: [0x62,0x71,0xa5,0x40,0x58,0x01]
+          vaddpd (%rcx), %zmm27, %zmm8
+
+// CHECK: vaddpd 291(%rax,%r14,8), %zmm27, %zmm8
+// CHECK:  encoding: [0x62,0x31,0xa5,0x40,0x58,0x84,0xf0,0x23,0x01,0x00,0x00]
+          vaddpd 291(%rax,%r14,8), %zmm27, %zmm8
+
+// CHECK: vaddpd (%rcx){1to8}, %zmm27, %zmm8
+// CHECK:  encoding: [0x62,0x71,0xa5,0x50,0x58,0x01]
+          vaddpd (%rcx){1to8}, %zmm27, %zmm8
+
+// CHECK: vaddpd 8128(%rdx), %zmm27, %zmm8
+// CHECK:  encoding: [0x62,0x71,0xa5,0x40,0x58,0x42,0x7f]
+          vaddpd 8128(%rdx), %zmm27, %zmm8
+
+// CHECK: vaddpd 8192(%rdx), %zmm27, %zmm8
+// CHECK:  encoding: [0x62,0x71,0xa5,0x40,0x58,0x82,0x00,0x20,0x00,0x00]
+          vaddpd 8192(%rdx), %zmm27, %zmm8
+
+// CHECK: vaddpd -8256(%rdx), %zmm27, %zmm8
+// CHECK:  encoding: [0x62,0x71,0xa5,0x40,0x58,0x82,0xc0,0xdf,0xff,0xff]
+          vaddpd -8256(%rdx), %zmm27, %zmm8
+
+// CHECK: vaddpd 1016(%rdx){1to8}, %zmm27, %zmm8
+// CHECK:  encoding: [0x62,0x71,0xa5,0x50,0x58,0x42,0x7f]
+          vaddpd 1016(%rdx){1to8}, %zmm27, %zmm8
+
+// CHECK: vaddpd 1024(%rdx){1to8}, %zmm27, %zmm8
+// CHECK:  encoding: [0x62,0x71,0xa5,0x50,0x58,0x82,0x00,0x04,0x00,0x00]
+          vaddpd 1024(%rdx){1to8}, %zmm27, %zmm8
+
+// CHECK: vaddpd -1032(%rdx){1to8}, %zmm27, %zmm8
+// CHECK:  encoding: [0x62,0x71,0xa5,0x50,0x58,0x82,0xf8,0xfb,0xff,0xff]
+          vaddpd -1032(%rdx){1to8}, %zmm27, %zmm8
+
+// CHECK: vaddps %zmm2, %zmm13, %zmm18
+// CHECK:  encoding: [0x62,0xe1,0x14,0x48,0x58,0xd2]
+          vaddps %zmm2, %zmm13, %zmm18
+
+// CHECK: vaddps %zmm2, %zmm13, %zmm18 {%k4}
+// CHECK:  encoding: [0x62,0xe1,0x14,0x4c,0x58,0xd2]
+          vaddps %zmm2, %zmm13, %zmm18 {%k4}
+
+// CHECK: vaddps %zmm2, %zmm13, %zmm18 {%k4} {z}
+// CHECK:  encoding: [0x62,0xe1,0x14,0xcc,0x58,0xd2]
+          vaddps %zmm2, %zmm13, %zmm18 {%k4} {z}
+
+// CHECK: vaddps (%rcx), %zmm13, %zmm18
+// CHECK:  encoding: [0x62,0xe1,0x14,0x48,0x58,0x11]
+          vaddps (%rcx), %zmm13, %zmm18
+
+// CHECK: vaddps 291(%rax,%r14,8), %zmm13, %zmm18
+// CHECK:  encoding: [0x62,0xa1,0x14,0x48,0x58,0x94,0xf0,0x23,0x01,0x00,0x00]
+          vaddps 291(%rax,%r14,8), %zmm13, %zmm18
+
+// CHECK: vaddps (%rcx){1to16}, %zmm13, %zmm18
+// CHECK:  encoding: [0x62,0xe1,0x14,0x58,0x58,0x11]
+          vaddps (%rcx){1to16}, %zmm13, %zmm18
+
+// CHECK: vaddps 8128(%rdx), %zmm13, %zmm18
+// CHECK:  encoding: [0x62,0xe1,0x14,0x48,0x58,0x52,0x7f]
+          vaddps 8128(%rdx), %zmm13, %zmm18
+
+// CHECK: vaddps 8192(%rdx), %zmm13, %zmm18
+// CHECK:  encoding: [0x62,0xe1,0x14,0x48,0x58,0x92,0x00,0x20,0x00,0x00]
+          vaddps 8192(%rdx), %zmm13, %zmm18
+
+// CHECK: vaddps -8256(%rdx), %zmm13, %zmm18
+// CHECK:  encoding: [0x62,0xe1,0x14,0x48,0x58,0x92,0xc0,0xdf,0xff,0xff]
+          vaddps -8256(%rdx), %zmm13, %zmm18
+
+// CHECK: vaddps 508(%rdx){1to16}, %zmm13, %zmm18
+// CHECK:  encoding: [0x62,0xe1,0x14,0x58,0x58,0x52,0x7f]
+          vaddps 508(%rdx){1to16}, %zmm13, %zmm18
+
+// CHECK: vaddps 512(%rdx){1to16}, %zmm13, %zmm18
+// CHECK:  encoding: [0x62,0xe1,0x14,0x58,0x58,0x92,0x00,0x02,0x00,0x00]
+          vaddps 512(%rdx){1to16}, %zmm13, %zmm18
+
+// CHECK: vaddps -516(%rdx){1to16}, %zmm13, %zmm18
+// CHECK:  encoding: [0x62,0xe1,0x14,0x58,0x58,0x92,0xfc,0xfd,0xff,0xff]
+          vaddps -516(%rdx){1to16}, %zmm13, %zmm18
+
+// CHECK: vdivpd %zmm11, %zmm6, %zmm18
+// CHECK:  encoding: [0x62,0xc1,0xcd,0x48,0x5e,0xd3]
+          vdivpd %zmm11, %zmm6, %zmm18
+
+// CHECK: vdivpd %zmm11, %zmm6, %zmm18 {%k4}
+// CHECK:  encoding: [0x62,0xc1,0xcd,0x4c,0x5e,0xd3]
+          vdivpd %zmm11, %zmm6, %zmm18 {%k4}
+
+// CHECK: vdivpd %zmm11, %zmm6, %zmm18 {%k4} {z}
+// CHECK:  encoding: [0x62,0xc1,0xcd,0xcc,0x5e,0xd3]
+          vdivpd %zmm11, %zmm6, %zmm18 {%k4} {z}
+
+// CHECK: vdivpd (%rcx), %zmm6, %zmm18
+// CHECK:  encoding: [0x62,0xe1,0xcd,0x48,0x5e,0x11]
+          vdivpd (%rcx), %zmm6, %zmm18
+
+// CHECK: vdivpd 291(%rax,%r14,8), %zmm6, %zmm18
+// CHECK:  encoding: [0x62,0xa1,0xcd,0x48,0x5e,0x94,0xf0,0x23,0x01,0x00,0x00]
+          vdivpd 291(%rax,%r14,8), %zmm6, %zmm18
+
+// CHECK: vdivpd (%rcx){1to8}, %zmm6, %zmm18
+// CHECK:  encoding: [0x62,0xe1,0xcd,0x58,0x5e,0x11]
+          vdivpd (%rcx){1to8}, %zmm6, %zmm18
+
+// CHECK: vdivpd 8128(%rdx), %zmm6, %zmm18
+// CHECK:  encoding: [0x62,0xe1,0xcd,0x48,0x5e,0x52,0x7f]
+          vdivpd 8128(%rdx), %zmm6, %zmm18
+
+// CHECK: vdivpd 8192(%rdx), %zmm6, %zmm18
+// CHECK:  encoding: [0x62,0xe1,0xcd,0x48,0x5e,0x92,0x00,0x20,0x00,0x00]
+          vdivpd 8192(%rdx), %zmm6, %zmm18
+
+// CHECK: vdivpd -8256(%rdx), %zmm6, %zmm18
+// CHECK:  encoding: [0x62,0xe1,0xcd,0x48,0x5e,0x92,0xc0,0xdf,0xff,0xff]
+          vdivpd -8256(%rdx), %zmm6, %zmm18
+
+// CHECK: vdivpd 1016(%rdx){1to8}, %zmm6, %zmm18
+// CHECK:  encoding: [0x62,0xe1,0xcd,0x58,0x5e,0x52,0x7f]
+          vdivpd 1016(%rdx){1to8}, %zmm6, %zmm18
+
+// CHECK: vdivpd 1024(%rdx){1to8}, %zmm6, %zmm18
+// CHECK:  encoding: [0x62,0xe1,0xcd,0x58,0x5e,0x92,0x00,0x04,0x00,0x00]
+          vdivpd 1024(%rdx){1to8}, %zmm6, %zmm18
+
+// CHECK: vdivpd -1032(%rdx){1to8}, %zmm6, %zmm18
+// CHECK:  encoding: [0x62,0xe1,0xcd,0x58,0x5e,0x92,0xf8,0xfb,0xff,0xff]
+          vdivpd -1032(%rdx){1to8}, %zmm6, %zmm18
+
+// CHECK: vdivps %zmm28, %zmm23, %zmm23
+// CHECK:  encoding: [0x62,0x81,0x44,0x40,0x5e,0xfc]
+          vdivps %zmm28, %zmm23, %zmm23
+
+// CHECK: vdivps %zmm28, %zmm23, %zmm23 {%k2}
+// CHECK:  encoding: [0x62,0x81,0x44,0x42,0x5e,0xfc]
+          vdivps %zmm28, %zmm23, %zmm23 {%k2}
+
+// CHECK: vdivps %zmm28, %zmm23, %zmm23 {%k2} {z}
+// CHECK:  encoding: [0x62,0x81,0x44,0xc2,0x5e,0xfc]
+          vdivps %zmm28, %zmm23, %zmm23 {%k2} {z}
+
+// CHECK: vdivps (%rcx), %zmm23, %zmm23
+// CHECK:  encoding: [0x62,0xe1,0x44,0x40,0x5e,0x39]
+          vdivps (%rcx), %zmm23, %zmm23
+
+// CHECK: vdivps 291(%rax,%r14,8), %zmm23, %zmm23
+// CHECK:  encoding: [0x62,0xa1,0x44,0x40,0x5e,0xbc,0xf0,0x23,0x01,0x00,0x00]
+          vdivps 291(%rax,%r14,8), %zmm23, %zmm23
+
+// CHECK: vdivps (%rcx){1to16}, %zmm23, %zmm23
+// CHECK:  encoding: [0x62,0xe1,0x44,0x50,0x5e,0x39]
+          vdivps (%rcx){1to16}, %zmm23, %zmm23
+
+// CHECK: vdivps 8128(%rdx), %zmm23, %zmm23
+// CHECK:  encoding: [0x62,0xe1,0x44,0x40,0x5e,0x7a,0x7f]
+          vdivps 8128(%rdx), %zmm23, %zmm23
+
+// CHECK: vdivps 8192(%rdx), %zmm23, %zmm23
+// CHECK:  encoding: [0x62,0xe1,0x44,0x40,0x5e,0xba,0x00,0x20,0x00,0x00]
+          vdivps 8192(%rdx), %zmm23, %zmm23
+
+// CHECK: vdivps -8256(%rdx), %zmm23, %zmm23
+// CHECK:  encoding: [0x62,0xe1,0x44,0x40,0x5e,0xba,0xc0,0xdf,0xff,0xff]
+          vdivps -8256(%rdx), %zmm23, %zmm23
+
+// CHECK: vdivps 508(%rdx){1to16}, %zmm23, %zmm23
+// CHECK:  encoding: [0x62,0xe1,0x44,0x50,0x5e,0x7a,0x7f]
+          vdivps 508(%rdx){1to16}, %zmm23, %zmm23
+
+// CHECK: vdivps 512(%rdx){1to16}, %zmm23, %zmm23
+// CHECK:  encoding: [0x62,0xe1,0x44,0x50,0x5e,0xba,0x00,0x02,0x00,0x00]
+          vdivps 512(%rdx){1to16}, %zmm23, %zmm23
+
+// CHECK: vdivps -516(%rdx){1to16}, %zmm23, %zmm23
+// CHECK:  encoding: [0x62,0xe1,0x44,0x50,0x5e,0xba,0xfc,0xfd,0xff,0xff]
+          vdivps -516(%rdx){1to16}, %zmm23, %zmm23
+
+// CHECK: vmaxpd %zmm20, %zmm28, %zmm30
+// CHECK:  encoding: [0x62,0x21,0x9d,0x40,0x5f,0xf4]
+          vmaxpd %zmm20, %zmm28, %zmm30
+
+// CHECK: vmaxpd %zmm20, %zmm28, %zmm30 {%k1}
+// CHECK:  encoding: [0x62,0x21,0x9d,0x41,0x5f,0xf4]
+          vmaxpd %zmm20, %zmm28, %zmm30 {%k1}
+
+// CHECK: vmaxpd %zmm20, %zmm28, %zmm30 {%k1} {z}
+// CHECK:  encoding: [0x62,0x21,0x9d,0xc1,0x5f,0xf4]
+          vmaxpd %zmm20, %zmm28, %zmm30 {%k1} {z}
+
+// CHECK: vmaxpd (%rcx), %zmm28, %zmm30
+// CHECK:  encoding: [0x62,0x61,0x9d,0x40,0x5f,0x31]
+          vmaxpd (%rcx), %zmm28, %zmm30
+
+// CHECK: vmaxpd 291(%rax,%r14,8), %zmm28, %zmm30
+// CHECK:  encoding: [0x62,0x21,0x9d,0x40,0x5f,0xb4,0xf0,0x23,0x01,0x00,0x00]
+          vmaxpd 291(%rax,%r14,8), %zmm28, %zmm30
+
+// CHECK: vmaxpd (%rcx){1to8}, %zmm28, %zmm30
+// CHECK:  encoding: [0x62,0x61,0x9d,0x50,0x5f,0x31]
+          vmaxpd (%rcx){1to8}, %zmm28, %zmm30
+
+// CHECK: vmaxpd 8128(%rdx), %zmm28, %zmm30
+// CHECK:  encoding: [0x62,0x61,0x9d,0x40,0x5f,0x72,0x7f]
+          vmaxpd 8128(%rdx), %zmm28, %zmm30
+
+// CHECK: vmaxpd 8192(%rdx), %zmm28, %zmm30
+// CHECK:  encoding: [0x62,0x61,0x9d,0x40,0x5f,0xb2,0x00,0x20,0x00,0x00]
+          vmaxpd 8192(%rdx), %zmm28, %zmm30
+
+// CHECK: vmaxpd -8256(%rdx), %zmm28, %zmm30
+// CHECK:  encoding: [0x62,0x61,0x9d,0x40,0x5f,0xb2,0xc0,0xdf,0xff,0xff]
+          vmaxpd -8256(%rdx), %zmm28, %zmm30
+
+// CHECK: vmaxpd 1016(%rdx){1to8}, %zmm28, %zmm30
+// CHECK:  encoding: [0x62,0x61,0x9d,0x50,0x5f,0x72,0x7f]
+          vmaxpd 1016(%rdx){1to8}, %zmm28, %zmm30
+
+// CHECK: vmaxpd 1024(%rdx){1to8}, %zmm28, %zmm30
+// CHECK:  encoding: [0x62,0x61,0x9d,0x50,0x5f,0xb2,0x00,0x04,0x00,0x00]
+          vmaxpd 1024(%rdx){1to8}, %zmm28, %zmm30
+
+// CHECK: vmaxpd -1032(%rdx){1to8}, %zmm28, %zmm30
+// CHECK:  encoding: [0x62,0x61,0x9d,0x50,0x5f,0xb2,0xf8,0xfb,0xff,0xff]
+          vmaxpd -1032(%rdx){1to8}, %zmm28, %zmm30
+
+// CHECK: vmaxps %zmm20, %zmm6, %zmm25
+// CHECK:  encoding: [0x62,0x21,0x4c,0x48,0x5f,0xcc]
+          vmaxps %zmm20, %zmm6, %zmm25
+
+// CHECK: vmaxps %zmm20, %zmm6, %zmm25 {%k1}
+// CHECK:  encoding: [0x62,0x21,0x4c,0x49,0x5f,0xcc]
+          vmaxps %zmm20, %zmm6, %zmm25 {%k1}
+
+// CHECK: vmaxps %zmm20, %zmm6, %zmm25 {%k1} {z}
+// CHECK:  encoding: [0x62,0x21,0x4c,0xc9,0x5f,0xcc]
+          vmaxps %zmm20, %zmm6, %zmm25 {%k1} {z}
+
+// CHECK: vmaxps (%rcx), %zmm6, %zmm25
+// CHECK:  encoding: [0x62,0x61,0x4c,0x48,0x5f,0x09]
+          vmaxps (%rcx), %zmm6, %zmm25
+
+// CHECK: vmaxps 291(%rax,%r14,8), %zmm6, %zmm25
+// CHECK:  encoding: [0x62,0x21,0x4c,0x48,0x5f,0x8c,0xf0,0x23,0x01,0x00,0x00]
+          vmaxps 291(%rax,%r14,8), %zmm6, %zmm25
+
+// CHECK: vmaxps (%rcx){1to16}, %zmm6, %zmm25
+// CHECK:  encoding: [0x62,0x61,0x4c,0x58,0x5f,0x09]
+          vmaxps (%rcx){1to16}, %zmm6, %zmm25
+
+// CHECK: vmaxps 8128(%rdx), %zmm6, %zmm25
+// CHECK:  encoding: [0x62,0x61,0x4c,0x48,0x5f,0x4a,0x7f]
+          vmaxps 8128(%rdx), %zmm6, %zmm25
+
+// CHECK: vmaxps 8192(%rdx), %zmm6, %zmm25
+// CHECK:  encoding: [0x62,0x61,0x4c,0x48,0x5f,0x8a,0x00,0x20,0x00,0x00]
+          vmaxps 8192(%rdx), %zmm6, %zmm25
+
+// CHECK: vmaxps -8256(%rdx), %zmm6, %zmm25
+// CHECK:  encoding: [0x62,0x61,0x4c,0x48,0x5f,0x8a,0xc0,0xdf,0xff,0xff]
+          vmaxps -8256(%rdx), %zmm6, %zmm25
+
+// CHECK: vmaxps 508(%rdx){1to16}, %zmm6, %zmm25
+// CHECK:  encoding: [0x62,0x61,0x4c,0x58,0x5f,0x4a,0x7f]
+          vmaxps 508(%rdx){1to16}, %zmm6, %zmm25
+
+// CHECK: vmaxps 512(%rdx){1to16}, %zmm6, %zmm25
+// CHECK:  encoding: [0x62,0x61,0x4c,0x58,0x5f,0x8a,0x00,0x02,0x00,0x00]
+          vmaxps 512(%rdx){1to16}, %zmm6, %zmm25
+
+// CHECK: vmaxps -516(%rdx){1to16}, %zmm6, %zmm25
+// CHECK:  encoding: [0x62,0x61,0x4c,0x58,0x5f,0x8a,0xfc,0xfd,0xff,0xff]
+          vmaxps -516(%rdx){1to16}, %zmm6, %zmm25
+
+// CHECK: vminpd %zmm22, %zmm6, %zmm6
+// CHECK:  encoding: [0x62,0xb1,0xcd,0x48,0x5d,0xf6]
+          vminpd %zmm22, %zmm6, %zmm6
+
+// CHECK: vminpd %zmm22, %zmm6, %zmm6 {%k7}
+// CHECK:  encoding: [0x62,0xb1,0xcd,0x4f,0x5d,0xf6]
+          vminpd %zmm22, %zmm6, %zmm6 {%k7}
+
+// CHECK: vminpd %zmm22, %zmm6, %zmm6 {%k7} {z}
+// CHECK:  encoding: [0x62,0xb1,0xcd,0xcf,0x5d,0xf6]
+          vminpd %zmm22, %zmm6, %zmm6 {%k7} {z}
+
+// CHECK: vminpd (%rcx), %zmm6, %zmm6
+// CHECK:  encoding: [0x62,0xf1,0xcd,0x48,0x5d,0x31]
+          vminpd (%rcx), %zmm6, %zmm6
+
+// CHECK: vminpd 291(%rax,%r14,8), %zmm6, %zmm6
+// CHECK:  encoding: [0x62,0xb1,0xcd,0x48,0x5d,0xb4,0xf0,0x23,0x01,0x00,0x00]
+          vminpd 291(%rax,%r14,8), %zmm6, %zmm6
+
+// CHECK: vminpd (%rcx){1to8}, %zmm6, %zmm6
+// CHECK:  encoding: [0x62,0xf1,0xcd,0x58,0x5d,0x31]
+          vminpd (%rcx){1to8}, %zmm6, %zmm6
+
+// CHECK: vminpd 8128(%rdx), %zmm6, %zmm6
+// CHECK:  encoding: [0x62,0xf1,0xcd,0x48,0x5d,0x72,0x7f]
+          vminpd 8128(%rdx), %zmm6, %zmm6
+
+// CHECK: vminpd 8192(%rdx), %zmm6, %zmm6
+// CHECK:  encoding: [0x62,0xf1,0xcd,0x48,0x5d,0xb2,0x00,0x20,0x00,0x00]
+          vminpd 8192(%rdx), %zmm6, %zmm6
+
+// CHECK: vminpd -8256(%rdx), %zmm6, %zmm6
+// CHECK:  encoding: [0x62,0xf1,0xcd,0x48,0x5d,0xb2,0xc0,0xdf,0xff,0xff]
+          vminpd -8256(%rdx), %zmm6, %zmm6
+
+// CHECK: vminpd 1016(%rdx){1to8}, %zmm6, %zmm6
+// CHECK:  encoding: [0x62,0xf1,0xcd,0x58,0x5d,0x72,0x7f]
+          vminpd 1016(%rdx){1to8}, %zmm6, %zmm6
+
+// CHECK: vminpd 1024(%rdx){1to8}, %zmm6, %zmm6
+// CHECK:  encoding: [0x62,0xf1,0xcd,0x58,0x5d,0xb2,0x00,0x04,0x00,0x00]
+          vminpd 1024(%rdx){1to8}, %zmm6, %zmm6
+
+// CHECK: vminpd -1032(%rdx){1to8}, %zmm6, %zmm6
+// CHECK:  encoding: [0x62,0xf1,0xcd,0x58,0x5d,0xb2,0xf8,0xfb,0xff,0xff]
+          vminpd -1032(%rdx){1to8}, %zmm6, %zmm6
+
+// CHECK: vminps %zmm7, %zmm3, %zmm3
+// CHECK:  encoding: [0x62,0xf1,0x64,0x48,0x5d,0xdf]
+          vminps %zmm7, %zmm3, %zmm3
+
+// CHECK: vminps %zmm7, %zmm3, %zmm3 {%k3}
+// CHECK:  encoding: [0x62,0xf1,0x64,0x4b,0x5d,0xdf]
+          vminps %zmm7, %zmm3, %zmm3 {%k3}
+
+// CHECK: vminps %zmm7, %zmm3, %zmm3 {%k3} {z}
+// CHECK:  encoding: [0x62,0xf1,0x64,0xcb,0x5d,0xdf]
+          vminps %zmm7, %zmm3, %zmm3 {%k3} {z}
+
+// CHECK: vminps (%rcx), %zmm3, %zmm3
+// CHECK:  encoding: [0x62,0xf1,0x64,0x48,0x5d,0x19]
+          vminps (%rcx), %zmm3, %zmm3
+
+// CHECK: vminps 291(%rax,%r14,8), %zmm3, %zmm3
+// CHECK:  encoding: [0x62,0xb1,0x64,0x48,0x5d,0x9c,0xf0,0x23,0x01,0x00,0x00]
+          vminps 291(%rax,%r14,8), %zmm3, %zmm3
+
+// CHECK: vminps (%rcx){1to16}, %zmm3, %zmm3
+// CHECK:  encoding: [0x62,0xf1,0x64,0x58,0x5d,0x19]
+          vminps (%rcx){1to16}, %zmm3, %zmm3
+
+// CHECK: vminps 8128(%rdx), %zmm3, %zmm3
+// CHECK:  encoding: [0x62,0xf1,0x64,0x48,0x5d,0x5a,0x7f]
+          vminps 8128(%rdx), %zmm3, %zmm3
+
+// CHECK: vminps 8192(%rdx), %zmm3, %zmm3
+// CHECK:  encoding: [0x62,0xf1,0x64,0x48,0x5d,0x9a,0x00,0x20,0x00,0x00]
+          vminps 8192(%rdx), %zmm3, %zmm3
+
+// CHECK: vminps -8256(%rdx), %zmm3, %zmm3
+// CHECK:  encoding: [0x62,0xf1,0x64,0x48,0x5d,0x9a,0xc0,0xdf,0xff,0xff]
+          vminps -8256(%rdx), %zmm3, %zmm3
+
+// CHECK: vminps 508(%rdx){1to16}, %zmm3, %zmm3
+// CHECK:  encoding: [0x62,0xf1,0x64,0x58,0x5d,0x5a,0x7f]
+          vminps 508(%rdx){1to16}, %zmm3, %zmm3
+
+// CHECK: vminps 512(%rdx){1to16}, %zmm3, %zmm3
+// CHECK:  encoding: [0x62,0xf1,0x64,0x58,0x5d,0x9a,0x00,0x02,0x00,0x00]
+          vminps 512(%rdx){1to16}, %zmm3, %zmm3
+
+// CHECK: vminps -516(%rdx){1to16}, %zmm3, %zmm3
+// CHECK:  encoding: [0x62,0xf1,0x64,0x58,0x5d,0x9a,0xfc,0xfd,0xff,0xff]
+          vminps -516(%rdx){1to16}, %zmm3, %zmm3
+
+// CHECK: vmulpd %zmm23, %zmm4, %zmm24
+// CHECK:  encoding: [0x62,0x21,0xdd,0x48,0x59,0xc7]
+          vmulpd %zmm23, %zmm4, %zmm24
+
+// CHECK: vmulpd %zmm23, %zmm4, %zmm24 {%k6}
+// CHECK:  encoding: [0x62,0x21,0xdd,0x4e,0x59,0xc7]
+          vmulpd %zmm23, %zmm4, %zmm24 {%k6}
+
+// CHECK: vmulpd %zmm23, %zmm4, %zmm24 {%k6} {z}
+// CHECK:  encoding: [0x62,0x21,0xdd,0xce,0x59,0xc7]
+          vmulpd %zmm23, %zmm4, %zmm24 {%k6} {z}
+
+// CHECK: vmulpd (%rcx), %zmm4, %zmm24
+// CHECK:  encoding: [0x62,0x61,0xdd,0x48,0x59,0x01]
+          vmulpd (%rcx), %zmm4, %zmm24
+
+// CHECK: vmulpd 291(%rax,%r14,8), %zmm4, %zmm24
+// CHECK:  encoding: [0x62,0x21,0xdd,0x48,0x59,0x84,0xf0,0x23,0x01,0x00,0x00]
+          vmulpd 291(%rax,%r14,8), %zmm4, %zmm24
+
+// CHECK: vmulpd (%rcx){1to8}, %zmm4, %zmm24
+// CHECK:  encoding: [0x62,0x61,0xdd,0x58,0x59,0x01]
+          vmulpd (%rcx){1to8}, %zmm4, %zmm24
+
+// CHECK: vmulpd 8128(%rdx), %zmm4, %zmm24
+// CHECK:  encoding: [0x62,0x61,0xdd,0x48,0x59,0x42,0x7f]
+          vmulpd 8128(%rdx), %zmm4, %zmm24
+
+// CHECK: vmulpd 8192(%rdx), %zmm4, %zmm24
+// CHECK:  encoding: [0x62,0x61,0xdd,0x48,0x59,0x82,0x00,0x20,0x00,0x00]
+          vmulpd 8192(%rdx), %zmm4, %zmm24
+
+// CHECK: vmulpd -8256(%rdx), %zmm4, %zmm24
+// CHECK:  encoding: [0x62,0x61,0xdd,0x48,0x59,0x82,0xc0,0xdf,0xff,0xff]
+          vmulpd -8256(%rdx), %zmm4, %zmm24
+
+// CHECK: vmulpd 1016(%rdx){1to8}, %zmm4, %zmm24
+// CHECK:  encoding: [0x62,0x61,0xdd,0x58,0x59,0x42,0x7f]
+          vmulpd 1016(%rdx){1to8}, %zmm4, %zmm24
+
+// CHECK: vmulpd 1024(%rdx){1to8}, %zmm4, %zmm24
+// CHECK:  encoding: [0x62,0x61,0xdd,0x58,0x59,0x82,0x00,0x04,0x00,0x00]
+          vmulpd 1024(%rdx){1to8}, %zmm4, %zmm24
+
+// CHECK: vmulpd -1032(%rdx){1to8}, %zmm4, %zmm24
+// CHECK:  encoding: [0x62,0x61,0xdd,0x58,0x59,0x82,0xf8,0xfb,0xff,0xff]
+          vmulpd -1032(%rdx){1to8}, %zmm4, %zmm24
+
+// CHECK: vmulps %zmm24, %zmm6, %zmm3
+// CHECK:  encoding: [0x62,0x91,0x4c,0x48,0x59,0xd8]
+          vmulps %zmm24, %zmm6, %zmm3
+
+// CHECK: vmulps %zmm24, %zmm6, %zmm3 {%k4}
+// CHECK:  encoding: [0x62,0x91,0x4c,0x4c,0x59,0xd8]
+          vmulps %zmm24, %zmm6, %zmm3 {%k4}
+
+// CHECK: vmulps %zmm24, %zmm6, %zmm3 {%k4} {z}
+// CHECK:  encoding: [0x62,0x91,0x4c,0xcc,0x59,0xd8]
+          vmulps %zmm24, %zmm6, %zmm3 {%k4} {z}
+
+// CHECK: vmulps (%rcx), %zmm6, %zmm3
+// CHECK:  encoding: [0x62,0xf1,0x4c,0x48,0x59,0x19]
+          vmulps (%rcx), %zmm6, %zmm3
+
+// CHECK: vmulps 291(%rax,%r14,8), %zmm6, %zmm3
+// CHECK:  encoding: [0x62,0xb1,0x4c,0x48,0x59,0x9c,0xf0,0x23,0x01,0x00,0x00]
+          vmulps 291(%rax,%r14,8), %zmm6, %zmm3
+
+// CHECK: vmulps (%rcx){1to16}, %zmm6, %zmm3
+// CHECK:  encoding: [0x62,0xf1,0x4c,0x58,0x59,0x19]
+          vmulps (%rcx){1to16}, %zmm6, %zmm3
+
+// CHECK: vmulps 8128(%rdx), %zmm6, %zmm3
+// CHECK:  encoding: [0x62,0xf1,0x4c,0x48,0x59,0x5a,0x7f]
+          vmulps 8128(%rdx), %zmm6, %zmm3
+
+// CHECK: vmulps 8192(%rdx), %zmm6, %zmm3
+// CHECK:  encoding: [0x62,0xf1,0x4c,0x48,0x59,0x9a,0x00,0x20,0x00,0x00]
+          vmulps 8192(%rdx), %zmm6, %zmm3
+
+// CHECK: vmulps -8256(%rdx), %zmm6, %zmm3
+// CHECK:  encoding: [0x62,0xf1,0x4c,0x48,0x59,0x9a,0xc0,0xdf,0xff,0xff]
+          vmulps -8256(%rdx), %zmm6, %zmm3
+
+// CHECK: vmulps 508(%rdx){1to16}, %zmm6, %zmm3
+// CHECK:  encoding: [0x62,0xf1,0x4c,0x58,0x59,0x5a,0x7f]
+          vmulps 508(%rdx){1to16}, %zmm6, %zmm3
+
+// CHECK: vmulps 512(%rdx){1to16}, %zmm6, %zmm3
+// CHECK:  encoding: [0x62,0xf1,0x4c,0x58,0x59,0x9a,0x00,0x02,0x00,0x00]
+          vmulps 512(%rdx){1to16}, %zmm6, %zmm3
+
+// CHECK: vmulps -516(%rdx){1to16}, %zmm6, %zmm3
+// CHECK:  encoding: [0x62,0xf1,0x4c,0x58,0x59,0x9a,0xfc,0xfd,0xff,0xff]
+          vmulps -516(%rdx){1to16}, %zmm6, %zmm3
+
+// CHECK: vpabsd %zmm14, %zmm15
+// CHECK:  encoding: [0x62,0x52,0x7d,0x48,0x1e,0xfe]
+          vpabsd %zmm14, %zmm15
+
+// CHECK: vpabsd %zmm14, %zmm15 {%k6}
+// CHECK:  encoding: [0x62,0x52,0x7d,0x4e,0x1e,0xfe]
+          vpabsd %zmm14, %zmm15 {%k6}
+
+// CHECK: vpabsd %zmm14, %zmm15 {%k6} {z}
+// CHECK:  encoding: [0x62,0x52,0x7d,0xce,0x1e,0xfe]
+          vpabsd %zmm14, %zmm15 {%k6} {z}
+
+// CHECK: vpabsd (%rcx), %zmm15
+// CHECK:  encoding: [0x62,0x72,0x7d,0x48,0x1e,0x39]
+          vpabsd (%rcx), %zmm15
+
+// CHECK: vpabsd (%rcx), %zmm15 {%k1}
+// CHECK:  encoding: [0x62,0x72,0x7d,0x49,0x1e,0x39]
+          vpabsd (%rcx), %zmm15 {%k1}
+
+// CHECK: vpabsd (%rcx), %zmm15 {%k1} {z}
+// CHECK:  encoding: [0x62,0x72,0x7d,0xc9,0x1e,0x39]
+          vpabsd (%rcx), %zmm15 {%k1} {z}
+
+// CHECK: vpabsd 291(%rax,%r14,8), %zmm15
+// CHECK:  encoding: [0x62,0x32,0x7d,0x48,0x1e,0xbc,0xf0,0x23,0x01,0x00,0x00]
+          vpabsd 291(%rax,%r14,8), %zmm15
+
+// CHECK: vpabsd (%rcx){1to16}, %zmm15
+// CHECK:  encoding: [0x62,0x72,0x7d,0x58,0x1e,0x39]
+          vpabsd (%rcx){1to16}, %zmm15
+
+// CHECK: vpabsd 8128(%rdx), %zmm15
+// CHECK:  encoding: [0x62,0x72,0x7d,0x48,0x1e,0x7a,0x7f]
+          vpabsd 8128(%rdx), %zmm15
+
+// CHECK: vpabsd 8192(%rdx), %zmm15
+// CHECK:  encoding: [0x62,0x72,0x7d,0x48,0x1e,0xba,0x00,0x20,0x00,0x00]
+          vpabsd 8192(%rdx), %zmm15
+
+// CHECK: vpabsd -8192(%rdx), %zmm15
+// CHECK:  encoding: [0x62,0x72,0x7d,0x48,0x1e,0x7a,0x80]
+          vpabsd -8192(%rdx), %zmm15
+
+// CHECK: vpabsd -8256(%rdx), %zmm15
+// CHECK:  encoding: [0x62,0x72,0x7d,0x48,0x1e,0xba,0xc0,0xdf,0xff,0xff]
+          vpabsd -8256(%rdx), %zmm15
+
+// CHECK: vpabsd 508(%rdx){1to16}, %zmm15
+// CHECK:  encoding: [0x62,0x72,0x7d,0x58,0x1e,0x7a,0x7f]
+          vpabsd 508(%rdx){1to16}, %zmm15
+
+// CHECK: vpabsd 512(%rdx){1to16}, %zmm15
+// CHECK:  encoding: [0x62,0x72,0x7d,0x58,0x1e,0xba,0x00,0x02,0x00,0x00]
+          vpabsd 512(%rdx){1to16}, %zmm15
+
+// CHECK: vpabsd -512(%rdx){1to16}, %zmm15
+// CHECK:  encoding: [0x62,0x72,0x7d,0x58,0x1e,0x7a,0x80]
+          vpabsd -512(%rdx){1to16}, %zmm15
+
+// CHECK: vpabsd -516(%rdx){1to16}, %zmm15
+// CHECK:  encoding: [0x62,0x72,0x7d,0x58,0x1e,0xba,0xfc,0xfd,0xff,0xff]
+          vpabsd -516(%rdx){1to16}, %zmm15
+
+// CHECK: vpabsd (%rcx){1to16}, %zmm15 {%k2}
+// CHECK:  encoding: [0x62,0x72,0x7d,0x5a,0x1e,0x39]
+          vpabsd (%rcx){1to16}, %zmm15 {%k2}
+
+// CHECK: vpabsd (%rcx){1to16}, %zmm15 {%k2} {z}
+// CHECK:  encoding: [0x62,0x72,0x7d,0xda,0x1e,0x39]
+          vpabsd (%rcx){1to16}, %zmm15 {%k2} {z}
+
+// CHECK: vpabsq %zmm24, %zmm5
+// CHECK:  encoding: [0x62,0x92,0xfd,0x48,0x1f,0xe8]
+          vpabsq %zmm24, %zmm5
+
+// CHECK: vpabsq %zmm24, %zmm5 {%k6}
+// CHECK:  encoding: [0x62,0x92,0xfd,0x4e,0x1f,0xe8]
+          vpabsq %zmm24, %zmm5 {%k6}
+
+// CHECK: vpabsq %zmm24, %zmm5 {%k6} {z}
+// CHECK:  encoding: [0x62,0x92,0xfd,0xce,0x1f,0xe8]
+          vpabsq %zmm24, %zmm5 {%k6} {z}
+
+// CHECK: vpabsq (%rcx), %zmm5
+// CHECK:  encoding: [0x62,0xf2,0xfd,0x48,0x1f,0x29]
+          vpabsq (%rcx), %zmm5
+
+// CHECK: vpabsq 291(%rax,%r14,8), %zmm5
+// CHECK:  encoding: [0x62,0xb2,0xfd,0x48,0x1f,0xac,0xf0,0x23,0x01,0x00,0x00]
+          vpabsq 291(%rax,%r14,8), %zmm5
+
+// CHECK: vpabsq (%rcx){1to8}, %zmm5
+// CHECK:  encoding: [0x62,0xf2,0xfd,0x58,0x1f,0x29]
+          vpabsq (%rcx){1to8}, %zmm5
+
+// CHECK: vpabsq 8128(%rdx), %zmm5
+// CHECK:  encoding: [0x62,0xf2,0xfd,0x48,0x1f,0x6a,0x7f]
+          vpabsq 8128(%rdx), %zmm5
+
+// CHECK: vpabsq 8192(%rdx), %zmm5
+// CHECK:  encoding: [0x62,0xf2,0xfd,0x48,0x1f,0xaa,0x00,0x20,0x00,0x00]
+          vpabsq 8192(%rdx), %zmm5
+
+// CHECK: vpabsq -8192(%rdx), %zmm5
+// CHECK:  encoding: [0x62,0xf2,0xfd,0x48,0x1f,0x6a,0x80]
+          vpabsq -8192(%rdx), %zmm5
+
+// CHECK: vpabsq -8256(%rdx), %zmm5
+// CHECK:  encoding: [0x62,0xf2,0xfd,0x48,0x1f,0xaa,0xc0,0xdf,0xff,0xff]
+          vpabsq -8256(%rdx), %zmm5
+
+// CHECK: vpabsq 1016(%rdx){1to8}, %zmm5
+// CHECK:  encoding: [0x62,0xf2,0xfd,0x58,0x1f,0x6a,0x7f]
+          vpabsq 1016(%rdx){1to8}, %zmm5
+
+// CHECK: vpabsq 1024(%rdx){1to8}, %zmm5
+// CHECK:  encoding: [0x62,0xf2,0xfd,0x58,0x1f,0xaa,0x00,0x04,0x00,0x00]
+          vpabsq 1024(%rdx){1to8}, %zmm5
+
+// CHECK: vpabsq -1024(%rdx){1to8}, %zmm5
+// CHECK:  encoding: [0x62,0xf2,0xfd,0x58,0x1f,0x6a,0x80]
+          vpabsq -1024(%rdx){1to8}, %zmm5
+
+// CHECK: vpabsq -1032(%rdx){1to8}, %zmm5
+// CHECK:  encoding: [0x62,0xf2,0xfd,0x58,0x1f,0xaa,0xf8,0xfb,0xff,0xff]
+          vpabsq -1032(%rdx){1to8}, %zmm5
+
+// CHECK: vpaddd %zmm20, %zmm5, %zmm26
+// CHECK:  encoding: [0x62,0x21,0x55,0x48,0xfe,0xd4]
+          vpaddd %zmm20, %zmm5, %zmm26
+
+// CHECK: vpaddd %zmm20, %zmm5, %zmm26 {%k1}
+// CHECK:  encoding: [0x62,0x21,0x55,0x49,0xfe,0xd4]
+          vpaddd %zmm20, %zmm5, %zmm26 {%k1}
+
+// CHECK: vpaddd %zmm20, %zmm5, %zmm26 {%k1} {z}
+// CHECK:  encoding: [0x62,0x21,0x55,0xc9,0xfe,0xd4]
+          vpaddd %zmm20, %zmm5, %zmm26 {%k1} {z}
+
+// CHECK: vpaddd (%rcx), %zmm5, %zmm26
+// CHECK:  encoding: [0x62,0x61,0x55,0x48,0xfe,0x11]
+          vpaddd (%rcx), %zmm5, %zmm26
+
+// CHECK: vpaddd (%rcx), %zmm5, %zmm26 {%k2}
+// CHECK:  encoding: [0x62,0x61,0x55,0x4a,0xfe,0x11]
+          vpaddd (%rcx), %zmm5, %zmm26 {%k2}
+
+// CHECK: vpaddd (%rcx), %zmm5, %zmm26 {%k2} {z}
+// CHECK:  encoding: [0x62,0x61,0x55,0xca,0xfe,0x11]
+          vpaddd (%rcx), %zmm5, %zmm26 {%k2} {z}
+
+// CHECK: vpaddd 291(%rax,%r14,8), %zmm5, %zmm26
+// CHECK:  encoding: [0x62,0x21,0x55,0x48,0xfe,0x94,0xf0,0x23,0x01,0x00,0x00]
+          vpaddd 291(%rax,%r14,8), %zmm5, %zmm26
+
+// CHECK: vpaddd (%rcx){1to16}, %zmm5, %zmm26
+// CHECK:  encoding: [0x62,0x61,0x55,0x58,0xfe,0x11]
+          vpaddd (%rcx){1to16}, %zmm5, %zmm26
+
+// CHECK: vpaddd 8128(%rdx), %zmm5, %zmm26
+// CHECK:  encoding: [0x62,0x61,0x55,0x48,0xfe,0x52,0x7f]
+          vpaddd 8128(%rdx), %zmm5, %zmm26
+
+// CHECK: vpaddd 8192(%rdx), %zmm5, %zmm26
+// CHECK:  encoding: [0x62,0x61,0x55,0x48,0xfe,0x92,0x00,0x20,0x00,0x00]
+          vpaddd 8192(%rdx), %zmm5, %zmm26
+
+// CHECK: vpaddd -8192(%rdx), %zmm5, %zmm26
+// CHECK:  encoding: [0x62,0x61,0x55,0x48,0xfe,0x52,0x80]
+          vpaddd -8192(%rdx), %zmm5, %zmm26
+
+// CHECK: vpaddd -8256(%rdx), %zmm5, %zmm26
+// CHECK:  encoding: [0x62,0x61,0x55,0x48,0xfe,0x92,0xc0,0xdf,0xff,0xff]
+          vpaddd -8256(%rdx), %zmm5, %zmm26
+
+// CHECK: vpaddd (%rcx){1to16}, %zmm5, %zmm26 {%k2}
+// CHECK:  encoding: [0x62,0x61,0x55,0x5a,0xfe,0x11]
+          vpaddd (%rcx){1to16}, %zmm5, %zmm26 {%k2}
+
+// CHECK: vpaddd (%rcx){1to16}, %zmm5, %zmm26 {%k2} {z}
+// CHECK:  encoding: [0x62,0x61,0x55,0xda,0xfe,0x11]
+          vpaddd (%rcx){1to16}, %zmm5, %zmm26 {%k2} {z}
+
+// CHECK: vpaddd 508(%rdx){1to16}, %zmm5, %zmm26
+// CHECK:  encoding: [0x62,0x61,0x55,0x58,0xfe,0x52,0x7f]
+          vpaddd 508(%rdx){1to16}, %zmm5, %zmm26
+
+// CHECK: vpaddd 512(%rdx){1to16}, %zmm5, %zmm26
+// CHECK:  encoding: [0x62,0x61,0x55,0x58,0xfe,0x92,0x00,0x02,0x00,0x00]
+          vpaddd 512(%rdx){1to16}, %zmm5, %zmm26
+
+// CHECK: vpaddd -512(%rdx){1to16}, %zmm5, %zmm26
+// CHECK:  encoding: [0x62,0x61,0x55,0x58,0xfe,0x52,0x80]
+          vpaddd -512(%rdx){1to16}, %zmm5, %zmm26
+
+// CHECK: vpaddd -516(%rdx){1to16}, %zmm5, %zmm26
+// CHECK:  encoding: [0x62,0x61,0x55,0x58,0xfe,0x92,0xfc,0xfd,0xff,0xff]
+          vpaddd -516(%rdx){1to16}, %zmm5, %zmm26
+
+// CHECK: vpaddq %zmm14, %zmm25, %zmm8
+// CHECK:  encoding: [0x62,0x51,0xb5,0x40,0xd4,0xc6]
+          vpaddq %zmm14, %zmm25, %zmm8
+
+// CHECK: vpaddq %zmm14, %zmm25, %zmm8 {%k3}
+// CHECK:  encoding: [0x62,0x51,0xb5,0x43,0xd4,0xc6]
+          vpaddq %zmm14, %zmm25, %zmm8 {%k3}
+
+// CHECK: vpaddq %zmm14, %zmm25, %zmm8 {%k3} {z}
+// CHECK:  encoding: [0x62,0x51,0xb5,0xc3,0xd4,0xc6]
+          vpaddq %zmm14, %zmm25, %zmm8 {%k3} {z}
+
+// CHECK: vpaddq (%rcx), %zmm25, %zmm8
+// CHECK:  encoding: [0x62,0x71,0xb5,0x40,0xd4,0x01]
+          vpaddq (%rcx), %zmm25, %zmm8
+
+// CHECK: vpaddq 291(%rax,%r14,8), %zmm25, %zmm8
+// CHECK:  encoding: [0x62,0x31,0xb5,0x40,0xd4,0x84,0xf0,0x23,0x01,0x00,0x00]
+          vpaddq 291(%rax,%r14,8), %zmm25, %zmm8
+
+// CHECK: vpaddq (%rcx){1to8}, %zmm25, %zmm8
+// CHECK:  encoding: [0x62,0x71,0xb5,0x50,0xd4,0x01]
+          vpaddq (%rcx){1to8}, %zmm25, %zmm8
+
+// CHECK: vpaddq 8128(%rdx), %zmm25, %zmm8
+// CHECK:  encoding: [0x62,0x71,0xb5,0x40,0xd4,0x42,0x7f]
+          vpaddq 8128(%rdx), %zmm25, %zmm8
+
+// CHECK: vpaddq 8192(%rdx), %zmm25, %zmm8
+// CHECK:  encoding: [0x62,0x71,0xb5,0x40,0xd4,0x82,0x00,0x20,0x00,0x00]
+          vpaddq 8192(%rdx), %zmm25, %zmm8
+
+// CHECK: vpaddq -8192(%rdx), %zmm25, %zmm8
+// CHECK:  encoding: [0x62,0x71,0xb5,0x40,0xd4,0x42,0x80]
+          vpaddq -8192(%rdx), %zmm25, %zmm8
+
+// CHECK: vpaddq -8256(%rdx), %zmm25, %zmm8
+// CHECK:  encoding: [0x62,0x71,0xb5,0x40,0xd4,0x82,0xc0,0xdf,0xff,0xff]
+          vpaddq -8256(%rdx), %zmm25, %zmm8
+
+// CHECK: vpaddq 1016(%rdx){1to8}, %zmm25, %zmm8
+// CHECK:  encoding: [0x62,0x71,0xb5,0x50,0xd4,0x42,0x7f]
+          vpaddq 1016(%rdx){1to8}, %zmm25, %zmm8
+
+// CHECK: vpaddq 1024(%rdx){1to8}, %zmm25, %zmm8
+// CHECK:  encoding: [0x62,0x71,0xb5,0x50,0xd4,0x82,0x00,0x04,0x00,0x00]
+          vpaddq 1024(%rdx){1to8}, %zmm25, %zmm8
+
+// CHECK: vpaddq -1024(%rdx){1to8}, %zmm25, %zmm8
+// CHECK:  encoding: [0x62,0x71,0xb5,0x50,0xd4,0x42,0x80]
+          vpaddq -1024(%rdx){1to8}, %zmm25, %zmm8
+
+// CHECK: vpaddq -1032(%rdx){1to8}, %zmm25, %zmm8
+// CHECK:  encoding: [0x62,0x71,0xb5,0x50,0xd4,0x82,0xf8,0xfb,0xff,0xff]
+          vpaddq -1032(%rdx){1to8}, %zmm25, %zmm8
+
+// CHECK: vpandd %zmm25, %zmm22, %zmm19
+// CHECK:  encoding: [0x62,0x81,0x4d,0x40,0xdb,0xd9]
+          vpandd %zmm25, %zmm22, %zmm19
+
+// CHECK: vpandd %zmm25, %zmm22, %zmm19 {%k1}
+// CHECK:  encoding: [0x62,0x81,0x4d,0x41,0xdb,0xd9]
+          vpandd %zmm25, %zmm22, %zmm19 {%k1}
+
+// CHECK: vpandd %zmm25, %zmm22, %zmm19 {%k1} {z}
+// CHECK:  encoding: [0x62,0x81,0x4d,0xc1,0xdb,0xd9]
+          vpandd %zmm25, %zmm22, %zmm19 {%k1} {z}
+
+// CHECK: vpandd (%rcx), %zmm22, %zmm19
+// CHECK:  encoding: [0x62,0xe1,0x4d,0x40,0xdb,0x19]
+          vpandd (%rcx), %zmm22, %zmm19
+
+// CHECK: vpandd 291(%rax,%r14,8), %zmm22, %zmm19
+// CHECK:  encoding: [0x62,0xa1,0x4d,0x40,0xdb,0x9c,0xf0,0x23,0x01,0x00,0x00]
+          vpandd 291(%rax,%r14,8), %zmm22, %zmm19
+
+// CHECK: vpandd (%rcx){1to16}, %zmm22, %zmm19
+// CHECK:  encoding: [0x62,0xe1,0x4d,0x50,0xdb,0x19]
+          vpandd (%rcx){1to16}, %zmm22, %zmm19
+
+// CHECK: vpandd 8128(%rdx), %zmm22, %zmm19
+// CHECK:  encoding: [0x62,0xe1,0x4d,0x40,0xdb,0x5a,0x7f]
+          vpandd 8128(%rdx), %zmm22, %zmm19
+
+// CHECK: vpandd 8192(%rdx), %zmm22, %zmm19
+// CHECK:  encoding: [0x62,0xe1,0x4d,0x40,0xdb,0x9a,0x00,0x20,0x00,0x00]
+          vpandd 8192(%rdx), %zmm22, %zmm19
+
+// CHECK: vpandd -8192(%rdx), %zmm22, %zmm19
+// CHECK:  encoding: [0x62,0xe1,0x4d,0x40,0xdb,0x5a,0x80]
+          vpandd -8192(%rdx), %zmm22, %zmm19
+
+// CHECK: vpandd -8256(%rdx), %zmm22, %zmm19
+// CHECK:  encoding: [0x62,0xe1,0x4d,0x40,0xdb,0x9a,0xc0,0xdf,0xff,0xff]
+          vpandd -8256(%rdx), %zmm22, %zmm19
+
+// CHECK: vpandd 508(%rdx){1to16}, %zmm22, %zmm19
+// CHECK:  encoding: [0x62,0xe1,0x4d,0x50,0xdb,0x5a,0x7f]
+          vpandd 508(%rdx){1to16}, %zmm22, %zmm19
+
+// CHECK: vpandd 512(%rdx){1to16}, %zmm22, %zmm19
+// CHECK:  encoding: [0x62,0xe1,0x4d,0x50,0xdb,0x9a,0x00,0x02,0x00,0x00]
+          vpandd 512(%rdx){1to16}, %zmm22, %zmm19
+
+// CHECK: vpandd -512(%rdx){1to16}, %zmm22, %zmm19
+// CHECK:  encoding: [0x62,0xe1,0x4d,0x50,0xdb,0x5a,0x80]
+          vpandd -512(%rdx){1to16}, %zmm22, %zmm19
+
+// CHECK: vpandd -516(%rdx){1to16}, %zmm22, %zmm19
+// CHECK:  encoding: [0x62,0xe1,0x4d,0x50,0xdb,0x9a,0xfc,0xfd,0xff,0xff]
+          vpandd -516(%rdx){1to16}, %zmm22, %zmm19
+
+// CHECK: vpandnd %zmm15, %zmm28, %zmm30
+// CHECK:  encoding: [0x62,0x41,0x1d,0x40,0xdf,0xf7]
+          vpandnd %zmm15, %zmm28, %zmm30
+
+// CHECK: vpandnd %zmm15, %zmm28, %zmm30 {%k3}
+// CHECK:  encoding: [0x62,0x41,0x1d,0x43,0xdf,0xf7]
+          vpandnd %zmm15, %zmm28, %zmm30 {%k3}
+
+// CHECK: vpandnd %zmm15, %zmm28, %zmm30 {%k3} {z}
+// CHECK:  encoding: [0x62,0x41,0x1d,0xc3,0xdf,0xf7]
+          vpandnd %zmm15, %zmm28, %zmm30 {%k3} {z}
+
+// CHECK: vpandnd (%rcx), %zmm28, %zmm30
+// CHECK:  encoding: [0x62,0x61,0x1d,0x40,0xdf,0x31]
+          vpandnd (%rcx), %zmm28, %zmm30
+
+// CHECK: vpandnd 291(%rax,%r14,8), %zmm28, %zmm30
+// CHECK:  encoding: [0x62,0x21,0x1d,0x40,0xdf,0xb4,0xf0,0x23,0x01,0x00,0x00]
+          vpandnd 291(%rax,%r14,8), %zmm28, %zmm30
+
+// CHECK: vpandnd (%rcx){1to16}, %zmm28, %zmm30
+// CHECK:  encoding: [0x62,0x61,0x1d,0x50,0xdf,0x31]
+          vpandnd (%rcx){1to16}, %zmm28, %zmm30
+
+// CHECK: vpandnd 8128(%rdx), %zmm28, %zmm30
+// CHECK:  encoding: [0x62,0x61,0x1d,0x40,0xdf,0x72,0x7f]
+          vpandnd 8128(%rdx), %zmm28, %zmm30
+
+// CHECK: vpandnd 8192(%rdx), %zmm28, %zmm30
+// CHECK:  encoding: [0x62,0x61,0x1d,0x40,0xdf,0xb2,0x00,0x20,0x00,0x00]
+          vpandnd 8192(%rdx), %zmm28, %zmm30
+
+// CHECK: vpandnd -8192(%rdx), %zmm28, %zmm30
+// CHECK:  encoding: [0x62,0x61,0x1d,0x40,0xdf,0x72,0x80]
+          vpandnd -8192(%rdx), %zmm28, %zmm30
+
+// CHECK: vpandnd -8256(%rdx), %zmm28, %zmm30
+// CHECK:  encoding: [0x62,0x61,0x1d,0x40,0xdf,0xb2,0xc0,0xdf,0xff,0xff]
+          vpandnd -8256(%rdx), %zmm28, %zmm30
+
+// CHECK: vpandnd 508(%rdx){1to16}, %zmm28, %zmm30
+// CHECK:  encoding: [0x62,0x61,0x1d,0x50,0xdf,0x72,0x7f]
+          vpandnd 508(%rdx){1to16}, %zmm28, %zmm30
+
+// CHECK: vpandnd 512(%rdx){1to16}, %zmm28, %zmm30
+// CHECK:  encoding: [0x62,0x61,0x1d,0x50,0xdf,0xb2,0x00,0x02,0x00,0x00]
+          vpandnd 512(%rdx){1to16}, %zmm28, %zmm30
+
+// CHECK: vpandnd -512(%rdx){1to16}, %zmm28, %zmm30
+// CHECK:  encoding: [0x62,0x61,0x1d,0x50,0xdf,0x72,0x80]
+          vpandnd -512(%rdx){1to16}, %zmm28, %zmm30
+
+// CHECK: vpandnd -516(%rdx){1to16}, %zmm28, %zmm30
+// CHECK:  encoding: [0x62,0x61,0x1d,0x50,0xdf,0xb2,0xfc,0xfd,0xff,0xff]
+          vpandnd -516(%rdx){1to16}, %zmm28, %zmm30
+
+// CHECK: vpandnq %zmm19, %zmm7, %zmm20
+// CHECK:  encoding: [0x62,0xa1,0xc5,0x48,0xdf,0xe3]
+          vpandnq %zmm19, %zmm7, %zmm20
+
+// CHECK: vpandnq %zmm19, %zmm7, %zmm20 {%k5}
+// CHECK:  encoding: [0x62,0xa1,0xc5,0x4d,0xdf,0xe3]
+          vpandnq %zmm19, %zmm7, %zmm20 {%k5}
+
+// CHECK: vpandnq %zmm19, %zmm7, %zmm20 {%k5} {z}
+// CHECK:  encoding: [0x62,0xa1,0xc5,0xcd,0xdf,0xe3]
+          vpandnq %zmm19, %zmm7, %zmm20 {%k5} {z}
+
+// CHECK: vpandnq (%rcx), %zmm7, %zmm20
+// CHECK:  encoding: [0x62,0xe1,0xc5,0x48,0xdf,0x21]
+          vpandnq (%rcx), %zmm7, %zmm20
+
+// CHECK: vpandnq 291(%rax,%r14,8), %zmm7, %zmm20
+// CHECK:  encoding: [0x62,0xa1,0xc5,0x48,0xdf,0xa4,0xf0,0x23,0x01,0x00,0x00]
+          vpandnq 291(%rax,%r14,8), %zmm7, %zmm20
+
+// CHECK: vpandnq (%rcx){1to8}, %zmm7, %zmm20
+// CHECK:  encoding: [0x62,0xe1,0xc5,0x58,0xdf,0x21]
+          vpandnq (%rcx){1to8}, %zmm7, %zmm20
+
+// CHECK: vpandnq 8128(%rdx), %zmm7, %zmm20
+// CHECK:  encoding: [0x62,0xe1,0xc5,0x48,0xdf,0x62,0x7f]
+          vpandnq 8128(%rdx), %zmm7, %zmm20
+
+// CHECK: vpandnq 8192(%rdx), %zmm7, %zmm20
+// CHECK:  encoding: [0x62,0xe1,0xc5,0x48,0xdf,0xa2,0x00,0x20,0x00,0x00]
+          vpandnq 8192(%rdx), %zmm7, %zmm20
+
+// CHECK: vpandnq -8192(%rdx), %zmm7, %zmm20
+// CHECK:  encoding: [0x62,0xe1,0xc5,0x48,0xdf,0x62,0x80]
+          vpandnq -8192(%rdx), %zmm7, %zmm20
+
+// CHECK: vpandnq -8256(%rdx), %zmm7, %zmm20
+// CHECK:  encoding: [0x62,0xe1,0xc5,0x48,0xdf,0xa2,0xc0,0xdf,0xff,0xff]
+          vpandnq -8256(%rdx), %zmm7, %zmm20
+
+// CHECK: vpandnq 1016(%rdx){1to8}, %zmm7, %zmm20
+// CHECK:  encoding: [0x62,0xe1,0xc5,0x58,0xdf,0x62,0x7f]
+          vpandnq 1016(%rdx){1to8}, %zmm7, %zmm20
+
+// CHECK: vpandnq 1024(%rdx){1to8}, %zmm7, %zmm20
+// CHECK:  encoding: [0x62,0xe1,0xc5,0x58,0xdf,0xa2,0x00,0x04,0x00,0x00]
+          vpandnq 1024(%rdx){1to8}, %zmm7, %zmm20
+
+// CHECK: vpandnq -1024(%rdx){1to8}, %zmm7, %zmm20
+// CHECK:  encoding: [0x62,0xe1,0xc5,0x58,0xdf,0x62,0x80]
+          vpandnq -1024(%rdx){1to8}, %zmm7, %zmm20
+
+// CHECK: vpandnq -1032(%rdx){1to8}, %zmm7, %zmm20
+// CHECK:  encoding: [0x62,0xe1,0xc5,0x58,0xdf,0xa2,0xf8,0xfb,0xff,0xff]
+          vpandnq -1032(%rdx){1to8}, %zmm7, %zmm20
+
+// CHECK: vpandq %zmm26, %zmm4, %zmm17
+// CHECK:  encoding: [0x62,0x81,0xdd,0x48,0xdb,0xca]
+          vpandq %zmm26, %zmm4, %zmm17
+
+// CHECK: vpandq %zmm26, %zmm4, %zmm17 {%k7}
+// CHECK:  encoding: [0x62,0x81,0xdd,0x4f,0xdb,0xca]
+          vpandq %zmm26, %zmm4, %zmm17 {%k7}
+
+// CHECK: vpandq %zmm26, %zmm4, %zmm17 {%k7} {z}
+// CHECK:  encoding: [0x62,0x81,0xdd,0xcf,0xdb,0xca]
+          vpandq %zmm26, %zmm4, %zmm17 {%k7} {z}
+
+// CHECK: vpandq (%rcx), %zmm4, %zmm17
+// CHECK:  encoding: [0x62,0xe1,0xdd,0x48,0xdb,0x09]
+          vpandq (%rcx), %zmm4, %zmm17
+
+// CHECK: vpandq 291(%rax,%r14,8), %zmm4, %zmm17
+// CHECK:  encoding: [0x62,0xa1,0xdd,0x48,0xdb,0x8c,0xf0,0x23,0x01,0x00,0x00]
+          vpandq 291(%rax,%r14,8), %zmm4, %zmm17
+
+// CHECK: vpandq (%rcx){1to8}, %zmm4, %zmm17
+// CHECK:  encoding: [0x62,0xe1,0xdd,0x58,0xdb,0x09]
+          vpandq (%rcx){1to8}, %zmm4, %zmm17
+
+// CHECK: vpandq 8128(%rdx), %zmm4, %zmm17
+// CHECK:  encoding: [0x62,0xe1,0xdd,0x48,0xdb,0x4a,0x7f]
+          vpandq 8128(%rdx), %zmm4, %zmm17
+
+// CHECK: vpandq 8192(%rdx), %zmm4, %zmm17
+// CHECK:  encoding: [0x62,0xe1,0xdd,0x48,0xdb,0x8a,0x00,0x20,0x00,0x00]
+          vpandq 8192(%rdx), %zmm4, %zmm17
+
+// CHECK: vpandq -8192(%rdx), %zmm4, %zmm17
+// CHECK:  encoding: [0x62,0xe1,0xdd,0x48,0xdb,0x4a,0x80]
+          vpandq -8192(%rdx), %zmm4, %zmm17
+
+// CHECK: vpandq -8256(%rdx), %zmm4, %zmm17
+// CHECK:  encoding: [0x62,0xe1,0xdd,0x48,0xdb,0x8a,0xc0,0xdf,0xff,0xff]
+          vpandq -8256(%rdx), %zmm4, %zmm17
+
+// CHECK: vpandq 1016(%rdx){1to8}, %zmm4, %zmm17
+// CHECK:  encoding: [0x62,0xe1,0xdd,0x58,0xdb,0x4a,0x7f]
+          vpandq 1016(%rdx){1to8}, %zmm4, %zmm17
+
+// CHECK: vpandq 1024(%rdx){1to8}, %zmm4, %zmm17
+// CHECK:  encoding: [0x62,0xe1,0xdd,0x58,0xdb,0x8a,0x00,0x04,0x00,0x00]
+          vpandq 1024(%rdx){1to8}, %zmm4, %zmm17
+
+// CHECK: vpandq -1024(%rdx){1to8}, %zmm4, %zmm17
+// CHECK:  encoding: [0x62,0xe1,0xdd,0x58,0xdb,0x4a,0x80]
+          vpandq -1024(%rdx){1to8}, %zmm4, %zmm17
+
+// CHECK: vpandq -1032(%rdx){1to8}, %zmm4, %zmm17
+// CHECK:  encoding: [0x62,0xe1,0xdd,0x58,0xdb,0x8a,0xf8,0xfb,0xff,0xff]
+          vpandq -1032(%rdx){1to8}, %zmm4, %zmm17
+
+// CHECK: vpmaxsd %zmm16, %zmm8, %zmm6
+// CHECK:  encoding: [0x62,0xb2,0x3d,0x48,0x3d,0xf0]
+          vpmaxsd %zmm16, %zmm8, %zmm6
+
+// CHECK: vpmaxsd %zmm16, %zmm8, %zmm6 {%k3}
+// CHECK:  encoding: [0x62,0xb2,0x3d,0x4b,0x3d,0xf0]
+          vpmaxsd %zmm16, %zmm8, %zmm6 {%k3}
+
+// CHECK: vpmaxsd %zmm16, %zmm8, %zmm6 {%k3} {z}
+// CHECK:  encoding: [0x62,0xb2,0x3d,0xcb,0x3d,0xf0]
+          vpmaxsd %zmm16, %zmm8, %zmm6 {%k3} {z}
+
+// CHECK: vpmaxsd (%rcx), %zmm8, %zmm6
+// CHECK:  encoding: [0x62,0xf2,0x3d,0x48,0x3d,0x31]
+          vpmaxsd (%rcx), %zmm8, %zmm6
+
+// CHECK: vpmaxsd 291(%rax,%r14,8), %zmm8, %zmm6
+// CHECK:  encoding: [0x62,0xb2,0x3d,0x48,0x3d,0xb4,0xf0,0x23,0x01,0x00,0x00]
+          vpmaxsd 291(%rax,%r14,8), %zmm8, %zmm6
+
+// CHECK: vpmaxsd (%rcx){1to16}, %zmm8, %zmm6
+// CHECK:  encoding: [0x62,0xf2,0x3d,0x58,0x3d,0x31]
+          vpmaxsd (%rcx){1to16}, %zmm8, %zmm6
+
+// CHECK: vpmaxsd 8128(%rdx), %zmm8, %zmm6
+// CHECK:  encoding: [0x62,0xf2,0x3d,0x48,0x3d,0x72,0x7f]
+          vpmaxsd 8128(%rdx), %zmm8, %zmm6
+
+// CHECK: vpmaxsd 8192(%rdx), %zmm8, %zmm6
+// CHECK:  encoding: [0x62,0xf2,0x3d,0x48,0x3d,0xb2,0x00,0x20,0x00,0x00]
+          vpmaxsd 8192(%rdx), %zmm8, %zmm6
+
+// CHECK: vpmaxsd -8192(%rdx), %zmm8, %zmm6
+// CHECK:  encoding: [0x62,0xf2,0x3d,0x48,0x3d,0x72,0x80]
+          vpmaxsd -8192(%rdx), %zmm8, %zmm6
+
+// CHECK: vpmaxsd -8256(%rdx), %zmm8, %zmm6
+// CHECK:  encoding: [0x62,0xf2,0x3d,0x48,0x3d,0xb2,0xc0,0xdf,0xff,0xff]
+          vpmaxsd -8256(%rdx), %zmm8, %zmm6
+
+// CHECK: vpmaxsd 508(%rdx){1to16}, %zmm8, %zmm6
+// CHECK:  encoding: [0x62,0xf2,0x3d,0x58,0x3d,0x72,0x7f]
+          vpmaxsd 508(%rdx){1to16}, %zmm8, %zmm6
+
+// CHECK: vpmaxsd 512(%rdx){1to16}, %zmm8, %zmm6
+// CHECK:  encoding: [0x62,0xf2,0x3d,0x58,0x3d,0xb2,0x00,0x02,0x00,0x00]
+          vpmaxsd 512(%rdx){1to16}, %zmm8, %zmm6
+
+// CHECK: vpmaxsd -512(%rdx){1to16}, %zmm8, %zmm6
+// CHECK:  encoding: [0x62,0xf2,0x3d,0x58,0x3d,0x72,0x80]
+          vpmaxsd -512(%rdx){1to16}, %zmm8, %zmm6
+
+// CHECK: vpmaxsd -516(%rdx){1to16}, %zmm8, %zmm6
+// CHECK:  encoding: [0x62,0xf2,0x3d,0x58,0x3d,0xb2,0xfc,0xfd,0xff,0xff]
+          vpmaxsd -516(%rdx){1to16}, %zmm8, %zmm6
+
+// CHECK: vpmaxsq %zmm1, %zmm6, %zmm6
+// CHECK:  encoding: [0x62,0xf2,0xcd,0x48,0x3d,0xf1]
+          vpmaxsq %zmm1, %zmm6, %zmm6
+
+// CHECK: vpmaxsq %zmm1, %zmm6, %zmm6 {%k7}
+// CHECK:  encoding: [0x62,0xf2,0xcd,0x4f,0x3d,0xf1]
+          vpmaxsq %zmm1, %zmm6, %zmm6 {%k7}
+
+// CHECK: vpmaxsq %zmm1, %zmm6, %zmm6 {%k7} {z}
+// CHECK:  encoding: [0x62,0xf2,0xcd,0xcf,0x3d,0xf1]
+          vpmaxsq %zmm1, %zmm6, %zmm6 {%k7} {z}
+
+// CHECK: vpmaxsq (%rcx), %zmm6, %zmm6
+// CHECK:  encoding: [0x62,0xf2,0xcd,0x48,0x3d,0x31]
+          vpmaxsq (%rcx), %zmm6, %zmm6
+
+// CHECK: vpmaxsq 291(%rax,%r14,8), %zmm6, %zmm6
+// CHECK:  encoding: [0x62,0xb2,0xcd,0x48,0x3d,0xb4,0xf0,0x23,0x01,0x00,0x00]
+          vpmaxsq 291(%rax,%r14,8), %zmm6, %zmm6
+
+// CHECK: vpmaxsq (%rcx){1to8}, %zmm6, %zmm6
+// CHECK:  encoding: [0x62,0xf2,0xcd,0x58,0x3d,0x31]
+          vpmaxsq (%rcx){1to8}, %zmm6, %zmm6
+
+// CHECK: vpmaxsq 8128(%rdx), %zmm6, %zmm6
+// CHECK:  encoding: [0x62,0xf2,0xcd,0x48,0x3d,0x72,0x7f]
+          vpmaxsq 8128(%rdx), %zmm6, %zmm6
+
+// CHECK: vpmaxsq 8192(%rdx), %zmm6, %zmm6
+// CHECK:  encoding: [0x62,0xf2,0xcd,0x48,0x3d,0xb2,0x00,0x20,0x00,0x00]
+          vpmaxsq 8192(%rdx), %zmm6, %zmm6
+
+// CHECK: vpmaxsq -8192(%rdx), %zmm6, %zmm6
+// CHECK:  encoding: [0x62,0xf2,0xcd,0x48,0x3d,0x72,0x80]
+          vpmaxsq -8192(%rdx), %zmm6, %zmm6
+
+// CHECK: vpmaxsq -8256(%rdx), %zmm6, %zmm6
+// CHECK:  encoding: [0x62,0xf2,0xcd,0x48,0x3d,0xb2,0xc0,0xdf,0xff,0xff]
+          vpmaxsq -8256(%rdx), %zmm6, %zmm6
+
+// CHECK: vpmaxsq 1016(%rdx){1to8}, %zmm6, %zmm6
+// CHECK:  encoding: [0x62,0xf2,0xcd,0x58,0x3d,0x72,0x7f]
+          vpmaxsq 1016(%rdx){1to8}, %zmm6, %zmm6
+
+// CHECK: vpmaxsq 1024(%rdx){1to8}, %zmm6, %zmm6
+// CHECK:  encoding: [0x62,0xf2,0xcd,0x58,0x3d,0xb2,0x00,0x04,0x00,0x00]
+          vpmaxsq 1024(%rdx){1to8}, %zmm6, %zmm6
+
+// CHECK: vpmaxsq -1024(%rdx){1to8}, %zmm6, %zmm6
+// CHECK:  encoding: [0x62,0xf2,0xcd,0x58,0x3d,0x72,0x80]
+          vpmaxsq -1024(%rdx){1to8}, %zmm6, %zmm6
+
+// CHECK: vpmaxsq -1032(%rdx){1to8}, %zmm6, %zmm6
+// CHECK:  encoding: [0x62,0xf2,0xcd,0x58,0x3d,0xb2,0xf8,0xfb,0xff,0xff]
+          vpmaxsq -1032(%rdx){1to8}, %zmm6, %zmm6
+
+// CHECK: vpmaxud %zmm25, %zmm7, %zmm17
+// CHECK:  encoding: [0x62,0x82,0x45,0x48,0x3f,0xc9]
+          vpmaxud %zmm25, %zmm7, %zmm17
+
+// CHECK: vpmaxud %zmm25, %zmm7, %zmm17 {%k5}
+// CHECK:  encoding: [0x62,0x82,0x45,0x4d,0x3f,0xc9]
+          vpmaxud %zmm25, %zmm7, %zmm17 {%k5}
+
+// CHECK: vpmaxud %zmm25, %zmm7, %zmm17 {%k5} {z}
+// CHECK:  encoding: [0x62,0x82,0x45,0xcd,0x3f,0xc9]
+          vpmaxud %zmm25, %zmm7, %zmm17 {%k5} {z}
+
+// CHECK: vpmaxud (%rcx), %zmm7, %zmm17
+// CHECK:  encoding: [0x62,0xe2,0x45,0x48,0x3f,0x09]
+          vpmaxud (%rcx), %zmm7, %zmm17
+
+// CHECK: vpmaxud 291(%rax,%r14,8), %zmm7, %zmm17
+// CHECK:  encoding: [0x62,0xa2,0x45,0x48,0x3f,0x8c,0xf0,0x23,0x01,0x00,0x00]
+          vpmaxud 291(%rax,%r14,8), %zmm7, %zmm17
+
+// CHECK: vpmaxud (%rcx){1to16}, %zmm7, %zmm17
+// CHECK:  encoding: [0x62,0xe2,0x45,0x58,0x3f,0x09]
+          vpmaxud (%rcx){1to16}, %zmm7, %zmm17
+
+// CHECK: vpmaxud 8128(%rdx), %zmm7, %zmm17
+// CHECK:  encoding: [0x62,0xe2,0x45,0x48,0x3f,0x4a,0x7f]
+          vpmaxud 8128(%rdx), %zmm7, %zmm17
+
+// CHECK: vpmaxud 8192(%rdx), %zmm7, %zmm17
+// CHECK:  encoding: [0x62,0xe2,0x45,0x48,0x3f,0x8a,0x00,0x20,0x00,0x00]
+          vpmaxud 8192(%rdx), %zmm7, %zmm17
+
+// CHECK: vpmaxud -8192(%rdx), %zmm7, %zmm17
+// CHECK:  encoding: [0x62,0xe2,0x45,0x48,0x3f,0x4a,0x80]
+          vpmaxud -8192(%rdx), %zmm7, %zmm17
+
+// CHECK: vpmaxud -8256(%rdx), %zmm7, %zmm17
+// CHECK:  encoding: [0x62,0xe2,0x45,0x48,0x3f,0x8a,0xc0,0xdf,0xff,0xff]
+          vpmaxud -8256(%rdx), %zmm7, %zmm17
+
+// CHECK: vpmaxud 508(%rdx){1to16}, %zmm7, %zmm17
+// CHECK:  encoding: [0x62,0xe2,0x45,0x58,0x3f,0x4a,0x7f]
+          vpmaxud 508(%rdx){1to16}, %zmm7, %zmm17
+
+// CHECK: vpmaxud 512(%rdx){1to16}, %zmm7, %zmm17
+// CHECK:  encoding: [0x62,0xe2,0x45,0x58,0x3f,0x8a,0x00,0x02,0x00,0x00]
+          vpmaxud 512(%rdx){1to16}, %zmm7, %zmm17
+
+// CHECK: vpmaxud -512(%rdx){1to16}, %zmm7, %zmm17
+// CHECK:  encoding: [0x62,0xe2,0x45,0x58,0x3f,0x4a,0x80]
+          vpmaxud -512(%rdx){1to16}, %zmm7, %zmm17
+
+// CHECK: vpmaxud -516(%rdx){1to16}, %zmm7, %zmm17
+// CHECK:  encoding: [0x62,0xe2,0x45,0x58,0x3f,0x8a,0xfc,0xfd,0xff,0xff]
+          vpmaxud -516(%rdx){1to16}, %zmm7, %zmm17
+
+// CHECK: vpmaxuq %zmm25, %zmm22, %zmm30
+// CHECK:  encoding: [0x62,0x02,0xcd,0x40,0x3f,0xf1]
+          vpmaxuq %zmm25, %zmm22, %zmm30
+
+// CHECK: vpmaxuq %zmm25, %zmm22, %zmm30 {%k1}
+// CHECK:  encoding: [0x62,0x02,0xcd,0x41,0x3f,0xf1]
+          vpmaxuq %zmm25, %zmm22, %zmm30 {%k1}
+
+// CHECK: vpmaxuq %zmm25, %zmm22, %zmm30 {%k1} {z}
+// CHECK:  encoding: [0x62,0x02,0xcd,0xc1,0x3f,0xf1]
+          vpmaxuq %zmm25, %zmm22, %zmm30 {%k1} {z}
+
+// CHECK: vpmaxuq (%rcx), %zmm22, %zmm30
+// CHECK:  encoding: [0x62,0x62,0xcd,0x40,0x3f,0x31]
+          vpmaxuq (%rcx), %zmm22, %zmm30
+
+// CHECK: vpmaxuq 291(%rax,%r14,8), %zmm22, %zmm30
+// CHECK:  encoding: [0x62,0x22,0xcd,0x40,0x3f,0xb4,0xf0,0x23,0x01,0x00,0x00]
+          vpmaxuq 291(%rax,%r14,8), %zmm22, %zmm30
+
+// CHECK: vpmaxuq (%rcx){1to8}, %zmm22, %zmm30
+// CHECK:  encoding: [0x62,0x62,0xcd,0x50,0x3f,0x31]
+          vpmaxuq (%rcx){1to8}, %zmm22, %zmm30
+
+// CHECK: vpmaxuq 8128(%rdx), %zmm22, %zmm30
+// CHECK:  encoding: [0x62,0x62,0xcd,0x40,0x3f,0x72,0x7f]
+          vpmaxuq 8128(%rdx), %zmm22, %zmm30
+
+// CHECK: vpmaxuq 8192(%rdx), %zmm22, %zmm30
+// CHECK:  encoding: [0x62,0x62,0xcd,0x40,0x3f,0xb2,0x00,0x20,0x00,0x00]
+          vpmaxuq 8192(%rdx), %zmm22, %zmm30
+
+// CHECK: vpmaxuq -8192(%rdx), %zmm22, %zmm30
+// CHECK:  encoding: [0x62,0x62,0xcd,0x40,0x3f,0x72,0x80]
+          vpmaxuq -8192(%rdx), %zmm22, %zmm30
+
+// CHECK: vpmaxuq -8256(%rdx), %zmm22, %zmm30
+// CHECK:  encoding: [0x62,0x62,0xcd,0x40,0x3f,0xb2,0xc0,0xdf,0xff,0xff]
+          vpmaxuq -8256(%rdx), %zmm22, %zmm30
+
+// CHECK: vpmaxuq 1016(%rdx){1to8}, %zmm22, %zmm30
+// CHECK:  encoding: [0x62,0x62,0xcd,0x50,0x3f,0x72,0x7f]
+          vpmaxuq 1016(%rdx){1to8}, %zmm22, %zmm30
+
+// CHECK: vpmaxuq 1024(%rdx){1to8}, %zmm22, %zmm30
+// CHECK:  encoding: [0x62,0x62,0xcd,0x50,0x3f,0xb2,0x00,0x04,0x00,0x00]
+          vpmaxuq 1024(%rdx){1to8}, %zmm22, %zmm30
+
+// CHECK: vpmaxuq -1024(%rdx){1to8}, %zmm22, %zmm30
+// CHECK:  encoding: [0x62,0x62,0xcd,0x50,0x3f,0x72,0x80]
+          vpmaxuq -1024(%rdx){1to8}, %zmm22, %zmm30
+
+// CHECK: vpmaxuq -1032(%rdx){1to8}, %zmm22, %zmm30
+// CHECK:  encoding: [0x62,0x62,0xcd,0x50,0x3f,0xb2,0xf8,0xfb,0xff,0xff]
+          vpmaxuq -1032(%rdx){1to8}, %zmm22, %zmm30
+
+// CHECK: vpminsd %zmm24, %zmm16, %zmm2
+// CHECK:  encoding: [0x62,0x92,0x7d,0x40,0x39,0xd0]
+          vpminsd %zmm24, %zmm16, %zmm2
+
+// CHECK: vpminsd %zmm24, %zmm16, %zmm2 {%k3}
+// CHECK:  encoding: [0x62,0x92,0x7d,0x43,0x39,0xd0]
+          vpminsd %zmm24, %zmm16, %zmm2 {%k3}
+
+// CHECK: vpminsd %zmm24, %zmm16, %zmm2 {%k3} {z}
+// CHECK:  encoding: [0x62,0x92,0x7d,0xc3,0x39,0xd0]
+          vpminsd %zmm24, %zmm16, %zmm2 {%k3} {z}
+
+// CHECK: vpminsd (%rcx), %zmm16, %zmm2
+// CHECK:  encoding: [0x62,0xf2,0x7d,0x40,0x39,0x11]
+          vpminsd (%rcx), %zmm16, %zmm2
+
+// CHECK: vpminsd 291(%rax,%r14,8), %zmm16, %zmm2
+// CHECK:  encoding: [0x62,0xb2,0x7d,0x40,0x39,0x94,0xf0,0x23,0x01,0x00,0x00]
+          vpminsd 291(%rax,%r14,8), %zmm16, %zmm2
+
+// CHECK: vpminsd (%rcx){1to16}, %zmm16, %zmm2
+// CHECK:  encoding: [0x62,0xf2,0x7d,0x50,0x39,0x11]
+          vpminsd (%rcx){1to16}, %zmm16, %zmm2
+
+// CHECK: vpminsd 8128(%rdx), %zmm16, %zmm2
+// CHECK:  encoding: [0x62,0xf2,0x7d,0x40,0x39,0x52,0x7f]
+          vpminsd 8128(%rdx), %zmm16, %zmm2
+
+// CHECK: vpminsd 8192(%rdx), %zmm16, %zmm2
+// CHECK:  encoding: [0x62,0xf2,0x7d,0x40,0x39,0x92,0x00,0x20,0x00,0x00]
+          vpminsd 8192(%rdx), %zmm16, %zmm2
+
+// CHECK: vpminsd -8192(%rdx), %zmm16, %zmm2
+// CHECK:  encoding: [0x62,0xf2,0x7d,0x40,0x39,0x52,0x80]
+          vpminsd -8192(%rdx), %zmm16, %zmm2
+
+// CHECK: vpminsd -8256(%rdx), %zmm16, %zmm2
+// CHECK:  encoding: [0x62,0xf2,0x7d,0x40,0x39,0x92,0xc0,0xdf,0xff,0xff]
+          vpminsd -8256(%rdx), %zmm16, %zmm2
+
+// CHECK: vpminsd 508(%rdx){1to16}, %zmm16, %zmm2
+// CHECK:  encoding: [0x62,0xf2,0x7d,0x50,0x39,0x52,0x7f]
+          vpminsd 508(%rdx){1to16}, %zmm16, %zmm2
+
+// CHECK: vpminsd 512(%rdx){1to16}, %zmm16, %zmm2
+// CHECK:  encoding: [0x62,0xf2,0x7d,0x50,0x39,0x92,0x00,0x02,0x00,0x00]
+          vpminsd 512(%rdx){1to16}, %zmm16, %zmm2
+
+// CHECK: vpminsd -512(%rdx){1to16}, %zmm16, %zmm2
+// CHECK:  encoding: [0x62,0xf2,0x7d,0x50,0x39,0x52,0x80]
+          vpminsd -512(%rdx){1to16}, %zmm16, %zmm2
+
+// CHECK: vpminsd -516(%rdx){1to16}, %zmm16, %zmm2
+// CHECK:  encoding: [0x62,0xf2,0x7d,0x50,0x39,0x92,0xfc,0xfd,0xff,0xff]
+          vpminsd -516(%rdx){1to16}, %zmm16, %zmm2
+
+// CHECK: vpminsq %zmm17, %zmm16, %zmm20
+// CHECK:  encoding: [0x62,0xa2,0xfd,0x40,0x39,0xe1]
+          vpminsq %zmm17, %zmm16, %zmm20
+
+// CHECK: vpminsq %zmm17, %zmm16, %zmm20 {%k6}
+// CHECK:  encoding: [0x62,0xa2,0xfd,0x46,0x39,0xe1]
+          vpminsq %zmm17, %zmm16, %zmm20 {%k6}
+
+// CHECK: vpminsq %zmm17, %zmm16, %zmm20 {%k6} {z}
+// CHECK:  encoding: [0x62,0xa2,0xfd,0xc6,0x39,0xe1]
+          vpminsq %zmm17, %zmm16, %zmm20 {%k6} {z}
+
+// CHECK: vpminsq (%rcx), %zmm16, %zmm20
+// CHECK:  encoding: [0x62,0xe2,0xfd,0x40,0x39,0x21]
+          vpminsq (%rcx), %zmm16, %zmm20
+
+// CHECK: vpminsq 291(%rax,%r14,8), %zmm16, %zmm20
+// CHECK:  encoding: [0x62,0xa2,0xfd,0x40,0x39,0xa4,0xf0,0x23,0x01,0x00,0x00]
+          vpminsq 291(%rax,%r14,8), %zmm16, %zmm20
+
+// CHECK: vpminsq (%rcx){1to8}, %zmm16, %zmm20
+// CHECK:  encoding: [0x62,0xe2,0xfd,0x50,0x39,0x21]
+          vpminsq (%rcx){1to8}, %zmm16, %zmm20
+
+// CHECK: vpminsq 8128(%rdx), %zmm16, %zmm20
+// CHECK:  encoding: [0x62,0xe2,0xfd,0x40,0x39,0x62,0x7f]
+          vpminsq 8128(%rdx), %zmm16, %zmm20
+
+// CHECK: vpminsq 8192(%rdx), %zmm16, %zmm20
+// CHECK:  encoding: [0x62,0xe2,0xfd,0x40,0x39,0xa2,0x00,0x20,0x00,0x00]
+          vpminsq 8192(%rdx), %zmm16, %zmm20
+
+// CHECK: vpminsq -8192(%rdx), %zmm16, %zmm20
+// CHECK:  encoding: [0x62,0xe2,0xfd,0x40,0x39,0x62,0x80]
+          vpminsq -8192(%rdx), %zmm16, %zmm20
+
+// CHECK: vpminsq -8256(%rdx), %zmm16, %zmm20
+// CHECK:  encoding: [0x62,0xe2,0xfd,0x40,0x39,0xa2,0xc0,0xdf,0xff,0xff]
+          vpminsq -8256(%rdx), %zmm16, %zmm20
+
+// CHECK: vpminsq 1016(%rdx){1to8}, %zmm16, %zmm20
+// CHECK:  encoding: [0x62,0xe2,0xfd,0x50,0x39,0x62,0x7f]
+          vpminsq 1016(%rdx){1to8}, %zmm16, %zmm20
+
+// CHECK: vpminsq 1024(%rdx){1to8}, %zmm16, %zmm20
+// CHECK:  encoding: [0x62,0xe2,0xfd,0x50,0x39,0xa2,0x00,0x04,0x00,0x00]
+          vpminsq 1024(%rdx){1to8}, %zmm16, %zmm20
+
+// CHECK: vpminsq -1024(%rdx){1to8}, %zmm16, %zmm20
+// CHECK:  encoding: [0x62,0xe2,0xfd,0x50,0x39,0x62,0x80]
+          vpminsq -1024(%rdx){1to8}, %zmm16, %zmm20
+
+// CHECK: vpminsq -1032(%rdx){1to8}, %zmm16, %zmm20
+// CHECK:  encoding: [0x62,0xe2,0xfd,0x50,0x39,0xa2,0xf8,0xfb,0xff,0xff]
+          vpminsq -1032(%rdx){1to8}, %zmm16, %zmm20
+
+// CHECK: vpminud %zmm20, %zmm23, %zmm3
+// CHECK:  encoding: [0x62,0xb2,0x45,0x40,0x3b,0xdc]
+          vpminud %zmm20, %zmm23, %zmm3
+
+// CHECK: vpminud %zmm20, %zmm23, %zmm3 {%k3}
+// CHECK:  encoding: [0x62,0xb2,0x45,0x43,0x3b,0xdc]
+          vpminud %zmm20, %zmm23, %zmm3 {%k3}
+
+// CHECK: vpminud %zmm20, %zmm23, %zmm3 {%k3} {z}
+// CHECK:  encoding: [0x62,0xb2,0x45,0xc3,0x3b,0xdc]
+          vpminud %zmm20, %zmm23, %zmm3 {%k3} {z}
+
+// CHECK: vpminud (%rcx), %zmm23, %zmm3
+// CHECK:  encoding: [0x62,0xf2,0x45,0x40,0x3b,0x19]
+          vpminud (%rcx), %zmm23, %zmm3
+
+// CHECK: vpminud 291(%rax,%r14,8), %zmm23, %zmm3
+// CHECK:  encoding: [0x62,0xb2,0x45,0x40,0x3b,0x9c,0xf0,0x23,0x01,0x00,0x00]
+          vpminud 291(%rax,%r14,8), %zmm23, %zmm3
+
+// CHECK: vpminud (%rcx){1to16}, %zmm23, %zmm3
+// CHECK:  encoding: [0x62,0xf2,0x45,0x50,0x3b,0x19]
+          vpminud (%rcx){1to16}, %zmm23, %zmm3
+
+// CHECK: vpminud 8128(%rdx), %zmm23, %zmm3
+// CHECK:  encoding: [0x62,0xf2,0x45,0x40,0x3b,0x5a,0x7f]
+          vpminud 8128(%rdx), %zmm23, %zmm3
+
+// CHECK: vpminud 8192(%rdx), %zmm23, %zmm3
+// CHECK:  encoding: [0x62,0xf2,0x45,0x40,0x3b,0x9a,0x00,0x20,0x00,0x00]
+          vpminud 8192(%rdx), %zmm23, %zmm3
+
+// CHECK: vpminud -8192(%rdx), %zmm23, %zmm3
+// CHECK:  encoding: [0x62,0xf2,0x45,0x40,0x3b,0x5a,0x80]
+          vpminud -8192(%rdx), %zmm23, %zmm3
+
+// CHECK: vpminud -8256(%rdx), %zmm23, %zmm3
+// CHECK:  encoding: [0x62,0xf2,0x45,0x40,0x3b,0x9a,0xc0,0xdf,0xff,0xff]
+          vpminud -8256(%rdx), %zmm23, %zmm3
+
+// CHECK: vpminud 508(%rdx){1to16}, %zmm23, %zmm3
+// CHECK:  encoding: [0x62,0xf2,0x45,0x50,0x3b,0x5a,0x7f]
+          vpminud 508(%rdx){1to16}, %zmm23, %zmm3
+
+// CHECK: vpminud 512(%rdx){1to16}, %zmm23, %zmm3
+// CHECK:  encoding: [0x62,0xf2,0x45,0x50,0x3b,0x9a,0x00,0x02,0x00,0x00]
+          vpminud 512(%rdx){1to16}, %zmm23, %zmm3
+
+// CHECK: vpminud -512(%rdx){1to16}, %zmm23, %zmm3
+// CHECK:  encoding: [0x62,0xf2,0x45,0x50,0x3b,0x5a,0x80]
+          vpminud -512(%rdx){1to16}, %zmm23, %zmm3
+
+// CHECK: vpminud -516(%rdx){1to16}, %zmm23, %zmm3
+// CHECK:  encoding: [0x62,0xf2,0x45,0x50,0x3b,0x9a,0xfc,0xfd,0xff,0xff]
+          vpminud -516(%rdx){1to16}, %zmm23, %zmm3
+
+// CHECK: vpminuq %zmm7, %zmm26, %zmm11
+// CHECK:  encoding: [0x62,0x72,0xad,0x40,0x3b,0xdf]
+          vpminuq %zmm7, %zmm26, %zmm11
+
+// CHECK: vpminuq %zmm7, %zmm26, %zmm11 {%k5}
+// CHECK:  encoding: [0x62,0x72,0xad,0x45,0x3b,0xdf]
+          vpminuq %zmm7, %zmm26, %zmm11 {%k5}
+
+// CHECK: vpminuq %zmm7, %zmm26, %zmm11 {%k5} {z}
+// CHECK:  encoding: [0x62,0x72,0xad,0xc5,0x3b,0xdf]
+          vpminuq %zmm7, %zmm26, %zmm11 {%k5} {z}
+
+// CHECK: vpminuq (%rcx), %zmm26, %zmm11
+// CHECK:  encoding: [0x62,0x72,0xad,0x40,0x3b,0x19]
+          vpminuq (%rcx), %zmm26, %zmm11
+
+// CHECK: vpminuq 291(%rax,%r14,8), %zmm26, %zmm11
+// CHECK:  encoding: [0x62,0x32,0xad,0x40,0x3b,0x9c,0xf0,0x23,0x01,0x00,0x00]
+          vpminuq 291(%rax,%r14,8), %zmm26, %zmm11
+
+// CHECK: vpminuq (%rcx){1to8}, %zmm26, %zmm11
+// CHECK:  encoding: [0x62,0x72,0xad,0x50,0x3b,0x19]
+          vpminuq (%rcx){1to8}, %zmm26, %zmm11
+
+// CHECK: vpminuq 8128(%rdx), %zmm26, %zmm11
+// CHECK:  encoding: [0x62,0x72,0xad,0x40,0x3b,0x5a,0x7f]
+          vpminuq 8128(%rdx), %zmm26, %zmm11
+
+// CHECK: vpminuq 8192(%rdx), %zmm26, %zmm11
+// CHECK:  encoding: [0x62,0x72,0xad,0x40,0x3b,0x9a,0x00,0x20,0x00,0x00]
+          vpminuq 8192(%rdx), %zmm26, %zmm11
+
+// CHECK: vpminuq -8192(%rdx), %zmm26, %zmm11
+// CHECK:  encoding: [0x62,0x72,0xad,0x40,0x3b,0x5a,0x80]
+          vpminuq -8192(%rdx), %zmm26, %zmm11
+
+// CHECK: vpminuq -8256(%rdx), %zmm26, %zmm11
+// CHECK:  encoding: [0x62,0x72,0xad,0x40,0x3b,0x9a,0xc0,0xdf,0xff,0xff]
+          vpminuq -8256(%rdx), %zmm26, %zmm11
+
+// CHECK: vpminuq 1016(%rdx){1to8}, %zmm26, %zmm11
+// CHECK:  encoding: [0x62,0x72,0xad,0x50,0x3b,0x5a,0x7f]
+          vpminuq 1016(%rdx){1to8}, %zmm26, %zmm11
+
+// CHECK: vpminuq 1024(%rdx){1to8}, %zmm26, %zmm11
+// CHECK:  encoding: [0x62,0x72,0xad,0x50,0x3b,0x9a,0x00,0x04,0x00,0x00]
+          vpminuq 1024(%rdx){1to8}, %zmm26, %zmm11
+
+// CHECK: vpminuq -1024(%rdx){1to8}, %zmm26, %zmm11
+// CHECK:  encoding: [0x62,0x72,0xad,0x50,0x3b,0x5a,0x80]
+          vpminuq -1024(%rdx){1to8}, %zmm26, %zmm11
+
+// CHECK: vpminuq -1032(%rdx){1to8}, %zmm26, %zmm11
+// CHECK:  encoding: [0x62,0x72,0xad,0x50,0x3b,0x9a,0xf8,0xfb,0xff,0xff]
+          vpminuq -1032(%rdx){1to8}, %zmm26, %zmm11
+
+// CHECK: vpmuldq %zmm9, %zmm9, %zmm29
+// CHECK:  encoding: [0x62,0x42,0xb5,0x48,0x28,0xe9]
+          vpmuldq %zmm9, %zmm9, %zmm29
+
+// CHECK: vpmuldq %zmm9, %zmm9, %zmm29 {%k5}
+// CHECK:  encoding: [0x62,0x42,0xb5,0x4d,0x28,0xe9]
+          vpmuldq %zmm9, %zmm9, %zmm29 {%k5}
+
+// CHECK: vpmuldq %zmm9, %zmm9, %zmm29 {%k5} {z}
+// CHECK:  encoding: [0x62,0x42,0xb5,0xcd,0x28,0xe9]
+          vpmuldq %zmm9, %zmm9, %zmm29 {%k5} {z}
+
+// CHECK: vpmuldq (%rcx), %zmm9, %zmm29
+// CHECK:  encoding: [0x62,0x62,0xb5,0x48,0x28,0x29]
+          vpmuldq (%rcx), %zmm9, %zmm29
+
+// CHECK: vpmuldq (%rcx), %zmm9, %zmm29 {%k6}
+// CHECK:  encoding: [0x62,0x62,0xb5,0x4e,0x28,0x29]
+          vpmuldq (%rcx), %zmm9, %zmm29 {%k6}
+
+// CHECK: vpmuldq (%rcx), %zmm9, %zmm29 {%k6} {z}
+// CHECK:  encoding: [0x62,0x62,0xb5,0xce,0x28,0x29]
+          vpmuldq (%rcx), %zmm9, %zmm29 {%k6} {z}
+
+// CHECK: vpmuldq 291(%rax,%r14,8), %zmm9, %zmm29
+// CHECK:  encoding: [0x62,0x22,0xb5,0x48,0x28,0xac,0xf0,0x23,0x01,0x00,0x00]
+          vpmuldq 291(%rax,%r14,8), %zmm9, %zmm29
+
+// CHECK: vpmuldq (%rcx){1to8}, %zmm9, %zmm29
+// CHECK:  encoding: [0x62,0x62,0xb5,0x58,0x28,0x29]
+          vpmuldq (%rcx){1to8}, %zmm9, %zmm29
+
+// CHECK: vpmuldq (%rcx){1to8}, %zmm9, %zmm29 {%k3}
+// CHECK:  encoding: [0x62,0x62,0xb5,0x5b,0x28,0x29]
+          vpmuldq (%rcx){1to8}, %zmm9, %zmm29 {%k3}
+
+// CHECK: vpmuldq (%rcx){1to8}, %zmm9, %zmm29
+// CHECK:  encoding: [0x62,0x62,0xb5,0xdb,0x28,0x29]
+          vpmuldq (%rcx){1to8}, %zmm9, %zmm29 {%k3} {z}
+
+// CHECK: vpmuldq 8128(%rdx), %zmm9, %zmm29
+// CHECK:  encoding: [0x62,0x62,0xb5,0x48,0x28,0x6a,0x7f]
+          vpmuldq 8128(%rdx), %zmm9, %zmm29
+
+// CHECK: vpmuldq 8192(%rdx), %zmm9, %zmm29
+// CHECK:  encoding: [0x62,0x62,0xb5,0x48,0x28,0xaa,0x00,0x20,0x00,0x00]
+          vpmuldq 8192(%rdx), %zmm9, %zmm29
+
+// CHECK: vpmuldq -8192(%rdx), %zmm9, %zmm29
+// CHECK:  encoding: [0x62,0x62,0xb5,0x48,0x28,0x6a,0x80]
+          vpmuldq -8192(%rdx), %zmm9, %zmm29
+
+// CHECK: vpmuldq -8256(%rdx), %zmm9, %zmm29
+// CHECK:  encoding: [0x62,0x62,0xb5,0x48,0x28,0xaa,0xc0,0xdf,0xff,0xff]
+          vpmuldq -8256(%rdx), %zmm9, %zmm29
+
+// CHECK: vpmuldq 1016(%rdx){1to8}, %zmm9, %zmm29
+// CHECK:  encoding: [0x62,0x62,0xb5,0x58,0x28,0x6a,0x7f]
+          vpmuldq 1016(%rdx){1to8}, %zmm9, %zmm29
+
+// CHECK: vpmuldq 1024(%rdx){1to8}, %zmm9, %zmm29
+// CHECK:  encoding: [0x62,0x62,0xb5,0x58,0x28,0xaa,0x00,0x04,0x00,0x00]
+          vpmuldq 1024(%rdx){1to8}, %zmm9, %zmm29
+
+// CHECK: vpmuldq -1024(%rdx){1to8}, %zmm9, %zmm29
+// CHECK:  encoding: [0x62,0x62,0xb5,0x58,0x28,0x6a,0x80]
+          vpmuldq -1024(%rdx){1to8}, %zmm9, %zmm29
+
+// CHECK: vpmuldq -1032(%rdx){1to8}, %zmm9, %zmm29
+// CHECK:  encoding: [0x62,0x62,0xb5,0x58,0x28,0xaa,0xf8,0xfb,0xff,0xff]
+          vpmuldq -1032(%rdx){1to8}, %zmm9, %zmm29
+
+// CHECK: vpmulld %zmm2, %zmm3, %zmm12
+// CHECK:  encoding: [0x62,0x72,0x65,0x48,0x40,0xe2]
+          vpmulld %zmm2, %zmm3, %zmm12
+
+// CHECK: vpmulld %zmm2, %zmm3, %zmm12 {%k6}
+// CHECK:  encoding: [0x62,0x72,0x65,0x4e,0x40,0xe2]
+          vpmulld %zmm2, %zmm3, %zmm12 {%k6}
+
+// CHECK: vpmulld %zmm2, %zmm3, %zmm12 {%k6} {z}
+// CHECK:  encoding: [0x62,0x72,0x65,0xce,0x40,0xe2]
+          vpmulld %zmm2, %zmm3, %zmm12 {%k6} {z}
+
+// CHECK: vpmulld (%rcx), %zmm3, %zmm12
+// CHECK:  encoding: [0x62,0x72,0x65,0x48,0x40,0x21]
+          vpmulld (%rcx), %zmm3, %zmm12
+
+// CHECK: vpmulld 291(%rax,%r14,8), %zmm3, %zmm12
+// CHECK:  encoding: [0x62,0x32,0x65,0x48,0x40,0xa4,0xf0,0x23,0x01,0x00,0x00]
+          vpmulld 291(%rax,%r14,8), %zmm3, %zmm12
+
+// CHECK: vpmulld (%rcx){1to16}, %zmm3, %zmm12
+// CHECK:  encoding: [0x62,0x72,0x65,0x58,0x40,0x21]
+          vpmulld (%rcx){1to16}, %zmm3, %zmm12
+
+// CHECK: vpmulld 8128(%rdx), %zmm3, %zmm12
+// CHECK:  encoding: [0x62,0x72,0x65,0x48,0x40,0x62,0x7f]
+          vpmulld 8128(%rdx), %zmm3, %zmm12
+
+// CHECK: vpmulld 8192(%rdx), %zmm3, %zmm12
+// CHECK:  encoding: [0x62,0x72,0x65,0x48,0x40,0xa2,0x00,0x20,0x00,0x00]
+          vpmulld 8192(%rdx), %zmm3, %zmm12
+
+// CHECK: vpmulld -8192(%rdx), %zmm3, %zmm12
+// CHECK:  encoding: [0x62,0x72,0x65,0x48,0x40,0x62,0x80]
+          vpmulld -8192(%rdx), %zmm3, %zmm12
+
+// CHECK: vpmulld -8256(%rdx), %zmm3, %zmm12
+// CHECK:  encoding: [0x62,0x72,0x65,0x48,0x40,0xa2,0xc0,0xdf,0xff,0xff]
+          vpmulld -8256(%rdx), %zmm3, %zmm12
+
+// CHECK: vpmulld 508(%rdx){1to16}, %zmm3, %zmm12
+// CHECK:  encoding: [0x62,0x72,0x65,0x58,0x40,0x62,0x7f]
+          vpmulld 508(%rdx){1to16}, %zmm3, %zmm12
+
+// CHECK: vpmulld 512(%rdx){1to16}, %zmm3, %zmm12
+// CHECK:  encoding: [0x62,0x72,0x65,0x58,0x40,0xa2,0x00,0x02,0x00,0x00]
+          vpmulld 512(%rdx){1to16}, %zmm3, %zmm12
+
+// CHECK: vpmulld -512(%rdx){1to16}, %zmm3, %zmm12
+// CHECK:  encoding: [0x62,0x72,0x65,0x58,0x40,0x62,0x80]
+          vpmulld -512(%rdx){1to16}, %zmm3, %zmm12
+
+// CHECK: vpmulld -516(%rdx){1to16}, %zmm3, %zmm12
+// CHECK:  encoding: [0x62,0x72,0x65,0x58,0x40,0xa2,0xfc,0xfd,0xff,0xff]
+          vpmulld -516(%rdx){1to16}, %zmm3, %zmm12
+
+// CHECK: vpmuludq %zmm9, %zmm5, %zmm23
+// CHECK:  encoding: [0x62,0xc1,0xd5,0x48,0xf4,0xf9]
+          vpmuludq %zmm9, %zmm5, %zmm23
+
+// CHECK: vpmuludq %zmm9, %zmm5, %zmm23 {%k4}
+// CHECK:  encoding: [0x62,0xc1,0xd5,0x4c,0xf4,0xf9]
+          vpmuludq %zmm9, %zmm5, %zmm23 {%k4}
+
+// CHECK: vpmuludq %zmm9, %zmm5, %zmm23 {%k4} {z}
+// CHECK:  encoding: [0x62,0xc1,0xd5,0xcc,0xf4,0xf9]
+          vpmuludq %zmm9, %zmm5, %zmm23 {%k4} {z}
+
+// CHECK: vpmuludq (%rcx), %zmm5, %zmm23
+// CHECK:  encoding: [0x62,0xe1,0xd5,0x48,0xf4,0x39]
+          vpmuludq (%rcx), %zmm5, %zmm23
+
+// CHECK: vpmuludq 291(%rax,%r14,8), %zmm5, %zmm23
+// CHECK:  encoding: [0x62,0xa1,0xd5,0x48,0xf4,0xbc,0xf0,0x23,0x01,0x00,0x00]
+          vpmuludq 291(%rax,%r14,8), %zmm5, %zmm23
+
+// CHECK: vpmuludq (%rcx){1to8}, %zmm5, %zmm23
+// CHECK:  encoding: [0x62,0xe1,0xd5,0x58,0xf4,0x39]
+          vpmuludq (%rcx){1to8}, %zmm5, %zmm23
+
+// CHECK: vpmuludq 8128(%rdx), %zmm5, %zmm23
+// CHECK:  encoding: [0x62,0xe1,0xd5,0x48,0xf4,0x7a,0x7f]
+          vpmuludq 8128(%rdx), %zmm5, %zmm23
+
+// CHECK: vpmuludq 8192(%rdx), %zmm5, %zmm23
+// CHECK:  encoding: [0x62,0xe1,0xd5,0x48,0xf4,0xba,0x00,0x20,0x00,0x00]
+          vpmuludq 8192(%rdx), %zmm5, %zmm23
+
+// CHECK: vpmuludq -8192(%rdx), %zmm5, %zmm23
+// CHECK:  encoding: [0x62,0xe1,0xd5,0x48,0xf4,0x7a,0x80]
+          vpmuludq -8192(%rdx), %zmm5, %zmm23
+
+// CHECK: vpmuludq -8256(%rdx), %zmm5, %zmm23
+// CHECK:  encoding: [0x62,0xe1,0xd5,0x48,0xf4,0xba,0xc0,0xdf,0xff,0xff]
+          vpmuludq -8256(%rdx), %zmm5, %zmm23
+
+// CHECK: vpmuludq 1016(%rdx){1to8}, %zmm5, %zmm23
+// CHECK:  encoding: [0x62,0xe1,0xd5,0x58,0xf4,0x7a,0x7f]
+          vpmuludq 1016(%rdx){1to8}, %zmm5, %zmm23
+
+// CHECK: vpmuludq 1024(%rdx){1to8}, %zmm5, %zmm23
+// CHECK:  encoding: [0x62,0xe1,0xd5,0x58,0xf4,0xba,0x00,0x04,0x00,0x00]
+          vpmuludq 1024(%rdx){1to8}, %zmm5, %zmm23
+
+// CHECK: vpmuludq -1024(%rdx){1to8}, %zmm5, %zmm23
+// CHECK:  encoding: [0x62,0xe1,0xd5,0x58,0xf4,0x7a,0x80]
+          vpmuludq -1024(%rdx){1to8}, %zmm5, %zmm23
+
+// CHECK: vpmuludq -1032(%rdx){1to8}, %zmm5, %zmm23
+// CHECK:  encoding: [0x62,0xe1,0xd5,0x58,0xf4,0xba,0xf8,0xfb,0xff,0xff]
+          vpmuludq -1032(%rdx){1to8}, %zmm5, %zmm23
+
+// CHECK: vpord  %zmm20, %zmm2, %zmm23
+// CHECK:  encoding: [0x62,0xa1,0x6d,0x48,0xeb,0xfc]
+          vpord  %zmm20, %zmm2, %zmm23
+
+// CHECK: vpord  %zmm20, %zmm2, %zmm23 {%k2}
+// CHECK:  encoding: [0x62,0xa1,0x6d,0x4a,0xeb,0xfc]
+          vpord  %zmm20, %zmm2, %zmm23 {%k2}
+
+// CHECK: vpord  %zmm20, %zmm2, %zmm23 {%k2} {z}
+// CHECK:  encoding: [0x62,0xa1,0x6d,0xca,0xeb,0xfc]
+          vpord  %zmm20, %zmm2, %zmm23 {%k2} {z}
+
+// CHECK: vpord  (%rcx), %zmm2, %zmm23
+// CHECK:  encoding: [0x62,0xe1,0x6d,0x48,0xeb,0x39]
+          vpord  (%rcx), %zmm2, %zmm23
+
+// CHECK: vpord  291(%rax,%r14,8), %zmm2, %zmm23
+// CHECK:  encoding: [0x62,0xa1,0x6d,0x48,0xeb,0xbc,0xf0,0x23,0x01,0x00,0x00]
+          vpord  291(%rax,%r14,8), %zmm2, %zmm23
+
+// CHECK: vpord  (%rcx){1to16}, %zmm2, %zmm23
+// CHECK:  encoding: [0x62,0xe1,0x6d,0x58,0xeb,0x39]
+          vpord  (%rcx){1to16}, %zmm2, %zmm23
+
+// CHECK: vpord  8128(%rdx), %zmm2, %zmm23
+// CHECK:  encoding: [0x62,0xe1,0x6d,0x48,0xeb,0x7a,0x7f]
+          vpord  8128(%rdx), %zmm2, %zmm23
+
+// CHECK: vpord  8192(%rdx), %zmm2, %zmm23
+// CHECK:  encoding: [0x62,0xe1,0x6d,0x48,0xeb,0xba,0x00,0x20,0x00,0x00]
+          vpord  8192(%rdx), %zmm2, %zmm23
+
+// CHECK: vpord  -8192(%rdx), %zmm2, %zmm23
+// CHECK:  encoding: [0x62,0xe1,0x6d,0x48,0xeb,0x7a,0x80]
+          vpord  -8192(%rdx), %zmm2, %zmm23
+
+// CHECK: vpord  -8256(%rdx), %zmm2, %zmm23
+// CHECK:  encoding: [0x62,0xe1,0x6d,0x48,0xeb,0xba,0xc0,0xdf,0xff,0xff]
+          vpord  -8256(%rdx), %zmm2, %zmm23
+
+// CHECK: vpord  508(%rdx){1to16}, %zmm2, %zmm23
+// CHECK:  encoding: [0x62,0xe1,0x6d,0x58,0xeb,0x7a,0x7f]
+          vpord  508(%rdx){1to16}, %zmm2, %zmm23
+
+// CHECK: vpord  512(%rdx){1to16}, %zmm2, %zmm23
+// CHECK:  encoding: [0x62,0xe1,0x6d,0x58,0xeb,0xba,0x00,0x02,0x00,0x00]
+          vpord  512(%rdx){1to16}, %zmm2, %zmm23
+
+// CHECK: vpord  -512(%rdx){1to16}, %zmm2, %zmm23
+// CHECK:  encoding: [0x62,0xe1,0x6d,0x58,0xeb,0x7a,0x80]
+          vpord  -512(%rdx){1to16}, %zmm2, %zmm23
+
+// CHECK: vpord  -516(%rdx){1to16}, %zmm2, %zmm23
+// CHECK:  encoding: [0x62,0xe1,0x6d,0x58,0xeb,0xba,0xfc,0xfd,0xff,0xff]
+          vpord  -516(%rdx){1to16}, %zmm2, %zmm23
+
+// CHECK: vporq  %zmm6, %zmm10, %zmm1
+// CHECK:  encoding: [0x62,0xf1,0xad,0x48,0xeb,0xce]
+          vporq  %zmm6, %zmm10, %zmm1
+
+// CHECK: vporq  %zmm6, %zmm10, %zmm1 {%k2}
+// CHECK:  encoding: [0x62,0xf1,0xad,0x4a,0xeb,0xce]
+          vporq  %zmm6, %zmm10, %zmm1 {%k2}
+
+// CHECK: vporq  %zmm6, %zmm10, %zmm1 {%k2} {z}
+// CHECK:  encoding: [0x62,0xf1,0xad,0xca,0xeb,0xce]
+          vporq  %zmm6, %zmm10, %zmm1 {%k2} {z}
+
+// CHECK: vporq  (%rcx), %zmm10, %zmm1
+// CHECK:  encoding: [0x62,0xf1,0xad,0x48,0xeb,0x09]
+          vporq  (%rcx), %zmm10, %zmm1
+
+// CHECK: vporq  291(%rax,%r14,8), %zmm10, %zmm1
+// CHECK:  encoding: [0x62,0xb1,0xad,0x48,0xeb,0x8c,0xf0,0x23,0x01,0x00,0x00]
+          vporq  291(%rax,%r14,8), %zmm10, %zmm1
+
+// CHECK: vporq  (%rcx){1to8}, %zmm10, %zmm1
+// CHECK:  encoding: [0x62,0xf1,0xad,0x58,0xeb,0x09]
+          vporq  (%rcx){1to8}, %zmm10, %zmm1
+
+// CHECK: vporq  8128(%rdx), %zmm10, %zmm1
+// CHECK:  encoding: [0x62,0xf1,0xad,0x48,0xeb,0x4a,0x7f]
+          vporq  8128(%rdx), %zmm10, %zmm1
+
+// CHECK: vporq  8192(%rdx), %zmm10, %zmm1
+// CHECK:  encoding: [0x62,0xf1,0xad,0x48,0xeb,0x8a,0x00,0x20,0x00,0x00]
+          vporq  8192(%rdx), %zmm10, %zmm1
+
+// CHECK: vporq  -8192(%rdx), %zmm10, %zmm1
+// CHECK:  encoding: [0x62,0xf1,0xad,0x48,0xeb,0x4a,0x80]
+          vporq  -8192(%rdx), %zmm10, %zmm1
+
+// CHECK: vporq  -8256(%rdx), %zmm10, %zmm1
+// CHECK:  encoding: [0x62,0xf1,0xad,0x48,0xeb,0x8a,0xc0,0xdf,0xff,0xff]
+          vporq  -8256(%rdx), %zmm10, %zmm1
+
+// CHECK: vporq  1016(%rdx){1to8}, %zmm10, %zmm1
+// CHECK:  encoding: [0x62,0xf1,0xad,0x58,0xeb,0x4a,0x7f]
+          vporq  1016(%rdx){1to8}, %zmm10, %zmm1
+
+// CHECK: vporq  1024(%rdx){1to8}, %zmm10, %zmm1
+// CHECK:  encoding: [0x62,0xf1,0xad,0x58,0xeb,0x8a,0x00,0x04,0x00,0x00]
+          vporq  1024(%rdx){1to8}, %zmm10, %zmm1
+
+// CHECK: vporq  -1024(%rdx){1to8}, %zmm10, %zmm1
+// CHECK:  encoding: [0x62,0xf1,0xad,0x58,0xeb,0x4a,0x80]
+          vporq  -1024(%rdx){1to8}, %zmm10, %zmm1
+
+// CHECK: vporq  -1032(%rdx){1to8}, %zmm10, %zmm1
+// CHECK:  encoding: [0x62,0xf1,0xad,0x58,0xeb,0x8a,0xf8,0xfb,0xff,0xff]
+          vporq  -1032(%rdx){1to8}, %zmm10, %zmm1
+
+// CHECK: vpsubd %zmm7, %zmm28, %zmm7
+// CHECK:  encoding: [0x62,0xf1,0x1d,0x40,0xfa,0xff]
+          vpsubd %zmm7, %zmm28, %zmm7
+
+// CHECK: vpsubd %zmm7, %zmm28, %zmm7 {%k3}
+// CHECK:  encoding: [0x62,0xf1,0x1d,0x43,0xfa,0xff]
+          vpsubd %zmm7, %zmm28, %zmm7 {%k3}
+
+// CHECK: vpsubd %zmm7, %zmm28, %zmm7 {%k3} {z}
+// CHECK:  encoding: [0x62,0xf1,0x1d,0xc3,0xfa,0xff]
+          vpsubd %zmm7, %zmm28, %zmm7 {%k3} {z}
+
+// CHECK: vpsubd (%rcx), %zmm28, %zmm7
+// CHECK:  encoding: [0x62,0xf1,0x1d,0x40,0xfa,0x39]
+          vpsubd (%rcx), %zmm28, %zmm7
+
+// CHECK: vpsubd 291(%rax,%r14,8), %zmm28, %zmm7
+// CHECK:  encoding: [0x62,0xb1,0x1d,0x40,0xfa,0xbc,0xf0,0x23,0x01,0x00,0x00]
+          vpsubd 291(%rax,%r14,8), %zmm28, %zmm7
+
+// CHECK: vpsubd (%rcx){1to16}, %zmm28, %zmm7
+// CHECK:  encoding: [0x62,0xf1,0x1d,0x50,0xfa,0x39]
+          vpsubd (%rcx){1to16}, %zmm28, %zmm7
+
+// CHECK: vpsubd 8128(%rdx), %zmm28, %zmm7
+// CHECK:  encoding: [0x62,0xf1,0x1d,0x40,0xfa,0x7a,0x7f]
+          vpsubd 8128(%rdx), %zmm28, %zmm7
+
+// CHECK: vpsubd 8192(%rdx), %zmm28, %zmm7
+// CHECK:  encoding: [0x62,0xf1,0x1d,0x40,0xfa,0xba,0x00,0x20,0x00,0x00]
+          vpsubd 8192(%rdx), %zmm28, %zmm7
+
+// CHECK: vpsubd -8192(%rdx), %zmm28, %zmm7
+// CHECK:  encoding: [0x62,0xf1,0x1d,0x40,0xfa,0x7a,0x80]
+          vpsubd -8192(%rdx), %zmm28, %zmm7
+
+// CHECK: vpsubd -8256(%rdx), %zmm28, %zmm7
+// CHECK:  encoding: [0x62,0xf1,0x1d,0x40,0xfa,0xba,0xc0,0xdf,0xff,0xff]
+          vpsubd -8256(%rdx), %zmm28, %zmm7
+
+// CHECK: vpsubd 508(%rdx){1to16}, %zmm28, %zmm7
+// CHECK:  encoding: [0x62,0xf1,0x1d,0x50,0xfa,0x7a,0x7f]
+          vpsubd 508(%rdx){1to16}, %zmm28, %zmm7
+
+// CHECK: vpsubd 512(%rdx){1to16}, %zmm28, %zmm7
+// CHECK:  encoding: [0x62,0xf1,0x1d,0x50,0xfa,0xba,0x00,0x02,0x00,0x00]
+          vpsubd 512(%rdx){1to16}, %zmm28, %zmm7
+
+// CHECK: vpsubd -512(%rdx){1to16}, %zmm28, %zmm7
+// CHECK:  encoding: [0x62,0xf1,0x1d,0x50,0xfa,0x7a,0x80]
+          vpsubd -512(%rdx){1to16}, %zmm28, %zmm7
+
+// CHECK: vpsubd -516(%rdx){1to16}, %zmm28, %zmm7
+// CHECK:  encoding: [0x62,0xf1,0x1d,0x50,0xfa,0xba,0xfc,0xfd,0xff,0xff]
+          vpsubd -516(%rdx){1to16}, %zmm28, %zmm7
+
+// CHECK: vpsubq %zmm17, %zmm28, %zmm29
+// CHECK:  encoding: [0x62,0x21,0x9d,0x40,0xfb,0xe9]
+          vpsubq %zmm17, %zmm28, %zmm29
+
+// CHECK: vpsubq %zmm17, %zmm28, %zmm29 {%k2}
+// CHECK:  encoding: [0x62,0x21,0x9d,0x42,0xfb,0xe9]
+          vpsubq %zmm17, %zmm28, %zmm29 {%k2}
+
+// CHECK: vpsubq %zmm17, %zmm28, %zmm29 {%k2} {z}
+// CHECK:  encoding: [0x62,0x21,0x9d,0xc2,0xfb,0xe9]
+          vpsubq %zmm17, %zmm28, %zmm29 {%k2} {z}
+
+// CHECK: vpsubq (%rcx), %zmm28, %zmm29
+// CHECK:  encoding: [0x62,0x61,0x9d,0x40,0xfb,0x29]
+          vpsubq (%rcx), %zmm28, %zmm29
+
+// CHECK: vpsubq 291(%rax,%r14,8), %zmm28, %zmm29
+// CHECK:  encoding: [0x62,0x21,0x9d,0x40,0xfb,0xac,0xf0,0x23,0x01,0x00,0x00]
+          vpsubq 291(%rax,%r14,8), %zmm28, %zmm29
+
+// CHECK: vpsubq (%rcx){1to8}, %zmm28, %zmm29
+// CHECK:  encoding: [0x62,0x61,0x9d,0x50,0xfb,0x29]
+          vpsubq (%rcx){1to8}, %zmm28, %zmm29
+
+// CHECK: vpsubq 8128(%rdx), %zmm28, %zmm29
+// CHECK:  encoding: [0x62,0x61,0x9d,0x40,0xfb,0x6a,0x7f]
+          vpsubq 8128(%rdx), %zmm28, %zmm29
+
+// CHECK: vpsubq 8192(%rdx), %zmm28, %zmm29
+// CHECK:  encoding: [0x62,0x61,0x9d,0x40,0xfb,0xaa,0x00,0x20,0x00,0x00]
+          vpsubq 8192(%rdx), %zmm28, %zmm29
+
+// CHECK: vpsubq -8192(%rdx), %zmm28, %zmm29
+// CHECK:  encoding: [0x62,0x61,0x9d,0x40,0xfb,0x6a,0x80]
+          vpsubq -8192(%rdx), %zmm28, %zmm29
+
+// CHECK: vpsubq -8256(%rdx), %zmm28, %zmm29
+// CHECK:  encoding: [0x62,0x61,0x9d,0x40,0xfb,0xaa,0xc0,0xdf,0xff,0xff]
+          vpsubq -8256(%rdx), %zmm28, %zmm29
+
+// CHECK: vpsubq 1016(%rdx){1to8}, %zmm28, %zmm29
+// CHECK:  encoding: [0x62,0x61,0x9d,0x50,0xfb,0x6a,0x7f]
+          vpsubq 1016(%rdx){1to8}, %zmm28, %zmm29
+
+// CHECK: vpsubq 1024(%rdx){1to8}, %zmm28, %zmm29
+// CHECK:  encoding: [0x62,0x61,0x9d,0x50,0xfb,0xaa,0x00,0x04,0x00,0x00]
+          vpsubq 1024(%rdx){1to8}, %zmm28, %zmm29
+
+// CHECK: vpsubq -1024(%rdx){1to8}, %zmm28, %zmm29
+// CHECK:  encoding: [0x62,0x61,0x9d,0x50,0xfb,0x6a,0x80]
+          vpsubq -1024(%rdx){1to8}, %zmm28, %zmm29
+
+// CHECK: vpsubq -1032(%rdx){1to8}, %zmm28, %zmm29
+// CHECK:  encoding: [0x62,0x61,0x9d,0x50,0xfb,0xaa,0xf8,0xfb,0xff,0xff]
+          vpsubq -1032(%rdx){1to8}, %zmm28, %zmm29
+
+// CHECK: vpxord %zmm24, %zmm12, %zmm8
+// CHECK:  encoding: [0x62,0x11,0x1d,0x48,0xef,0xc0]
+          vpxord %zmm24, %zmm12, %zmm8
+
+// CHECK: vpxord %zmm24, %zmm12, %zmm8 {%k6}
+// CHECK:  encoding: [0x62,0x11,0x1d,0x4e,0xef,0xc0]
+          vpxord %zmm24, %zmm12, %zmm8 {%k6}
+
+// CHECK: vpxord %zmm24, %zmm12, %zmm8 {%k6} {z}
+// CHECK:  encoding: [0x62,0x11,0x1d,0xce,0xef,0xc0]
+          vpxord %zmm24, %zmm12, %zmm8 {%k6} {z}
+
+// CHECK: vpxord (%rcx), %zmm12, %zmm8
+// CHECK:  encoding: [0x62,0x71,0x1d,0x48,0xef,0x01]
+          vpxord (%rcx), %zmm12, %zmm8
+
+// CHECK: vpxord 291(%rax,%r14,8), %zmm12, %zmm8
+// CHECK:  encoding: [0x62,0x31,0x1d,0x48,0xef,0x84,0xf0,0x23,0x01,0x00,0x00]
+          vpxord 291(%rax,%r14,8), %zmm12, %zmm8
+
+// CHECK: vpxord (%rcx){1to16}, %zmm12, %zmm8
+// CHECK:  encoding: [0x62,0x71,0x1d,0x58,0xef,0x01]
+          vpxord (%rcx){1to16}, %zmm12, %zmm8
+
+// CHECK: vpxord 8128(%rdx), %zmm12, %zmm8
+// CHECK:  encoding: [0x62,0x71,0x1d,0x48,0xef,0x42,0x7f]
+          vpxord 8128(%rdx), %zmm12, %zmm8
+
+// CHECK: vpxord 8192(%rdx), %zmm12, %zmm8
+// CHECK:  encoding: [0x62,0x71,0x1d,0x48,0xef,0x82,0x00,0x20,0x00,0x00]
+          vpxord 8192(%rdx), %zmm12, %zmm8
+
+// CHECK: vpxord -8192(%rdx), %zmm12, %zmm8
+// CHECK:  encoding: [0x62,0x71,0x1d,0x48,0xef,0x42,0x80]
+          vpxord -8192(%rdx), %zmm12, %zmm8
+
+// CHECK: vpxord -8256(%rdx), %zmm12, %zmm8
+// CHECK:  encoding: [0x62,0x71,0x1d,0x48,0xef,0x82,0xc0,0xdf,0xff,0xff]
+          vpxord -8256(%rdx), %zmm12, %zmm8
+
+// CHECK: vpxord 508(%rdx){1to16}, %zmm12, %zmm8
+// CHECK:  encoding: [0x62,0x71,0x1d,0x58,0xef,0x42,0x7f]
+          vpxord 508(%rdx){1to16}, %zmm12, %zmm8
+
+// CHECK: vpxord 512(%rdx){1to16}, %zmm12, %zmm8
+// CHECK:  encoding: [0x62,0x71,0x1d,0x58,0xef,0x82,0x00,0x02,0x00,0x00]
+          vpxord 512(%rdx){1to16}, %zmm12, %zmm8
+
+// CHECK: vpxord -512(%rdx){1to16}, %zmm12, %zmm8
+// CHECK:  encoding: [0x62,0x71,0x1d,0x58,0xef,0x42,0x80]
+          vpxord -512(%rdx){1to16}, %zmm12, %zmm8
+
+// CHECK: vpxord -516(%rdx){1to16}, %zmm12, %zmm8
+// CHECK:  encoding: [0x62,0x71,0x1d,0x58,0xef,0x82,0xfc,0xfd,0xff,0xff]
+          vpxord -516(%rdx){1to16}, %zmm12, %zmm8
+
+// CHECK: vpxorq %zmm10, %zmm22, %zmm7
+// CHECK:  encoding: [0x62,0xd1,0xcd,0x40,0xef,0xfa]
+          vpxorq %zmm10, %zmm22, %zmm7
+
+// CHECK: vpxorq %zmm10, %zmm22, %zmm7 {%k6}
+// CHECK:  encoding: [0x62,0xd1,0xcd,0x46,0xef,0xfa]
+          vpxorq %zmm10, %zmm22, %zmm7 {%k6}
+
+// CHECK: vpxorq %zmm10, %zmm22, %zmm7 {%k6} {z}
+// CHECK:  encoding: [0x62,0xd1,0xcd,0xc6,0xef,0xfa]
+          vpxorq %zmm10, %zmm22, %zmm7 {%k6} {z}
+
+// CHECK: vpxorq (%rcx), %zmm22, %zmm7
+// CHECK:  encoding: [0x62,0xf1,0xcd,0x40,0xef,0x39]
+          vpxorq (%rcx), %zmm22, %zmm7
+
+// CHECK: vpxorq 291(%rax,%r14,8), %zmm22, %zmm7
+// CHECK:  encoding: [0x62,0xb1,0xcd,0x40,0xef,0xbc,0xf0,0x23,0x01,0x00,0x00]
+          vpxorq 291(%rax,%r14,8), %zmm22, %zmm7
+
+// CHECK: vpxorq (%rcx){1to8}, %zmm22, %zmm7
+// CHECK:  encoding: [0x62,0xf1,0xcd,0x50,0xef,0x39]
+          vpxorq (%rcx){1to8}, %zmm22, %zmm7
+
+// CHECK: vpxorq 8128(%rdx), %zmm22, %zmm7
+// CHECK:  encoding: [0x62,0xf1,0xcd,0x40,0xef,0x7a,0x7f]
+          vpxorq 8128(%rdx), %zmm22, %zmm7
+
+// CHECK: vpxorq 8192(%rdx), %zmm22, %zmm7
+// CHECK:  encoding: [0x62,0xf1,0xcd,0x40,0xef,0xba,0x00,0x20,0x00,0x00]
+          vpxorq 8192(%rdx), %zmm22, %zmm7
+
+// CHECK: vpxorq -8192(%rdx), %zmm22, %zmm7
+// CHECK:  encoding: [0x62,0xf1,0xcd,0x40,0xef,0x7a,0x80]
+          vpxorq -8192(%rdx), %zmm22, %zmm7
+
+// CHECK: vpxorq -8256(%rdx), %zmm22, %zmm7
+// CHECK:  encoding: [0x62,0xf1,0xcd,0x40,0xef,0xba,0xc0,0xdf,0xff,0xff]
+          vpxorq -8256(%rdx), %zmm22, %zmm7
+
+// CHECK: vpxorq 1016(%rdx){1to8}, %zmm22, %zmm7
+// CHECK:  encoding: [0x62,0xf1,0xcd,0x50,0xef,0x7a,0x7f]
+          vpxorq 1016(%rdx){1to8}, %zmm22, %zmm7
+
+// CHECK: vpxorq 1024(%rdx){1to8}, %zmm22, %zmm7
+// CHECK:  encoding: [0x62,0xf1,0xcd,0x50,0xef,0xba,0x00,0x04,0x00,0x00]
+          vpxorq 1024(%rdx){1to8}, %zmm22, %zmm7
+
+// CHECK: vpxorq -1024(%rdx){1to8}, %zmm22, %zmm7
+// CHECK:  encoding: [0x62,0xf1,0xcd,0x50,0xef,0x7a,0x80]
+          vpxorq -1024(%rdx){1to8}, %zmm22, %zmm7
+
+// CHECK: vpxorq -1032(%rdx){1to8}, %zmm22, %zmm7
+// CHECK:  encoding: [0x62,0xf1,0xcd,0x50,0xef,0xba,0xf8,0xfb,0xff,0xff]
+          vpxorq -1032(%rdx){1to8}, %zmm22, %zmm7
+
+// CHECK: vsubpd %zmm9, %zmm12, %zmm9
+// CHECK:  encoding: [0x62,0x51,0x9d,0x48,0x5c,0xc9]
+          vsubpd %zmm9, %zmm12, %zmm9
+
+// CHECK: vsubpd %zmm9, %zmm12, %zmm9 {%k7}
+// CHECK:  encoding: [0x62,0x51,0x9d,0x4f,0x5c,0xc9]
+          vsubpd %zmm9, %zmm12, %zmm9 {%k7}
+
+// CHECK: vsubpd %zmm9, %zmm12, %zmm9 {%k7} {z}
+// CHECK:  encoding: [0x62,0x51,0x9d,0xcf,0x5c,0xc9]
+          vsubpd %zmm9, %zmm12, %zmm9 {%k7} {z}
+
+// CHECK: vsubpd (%rcx), %zmm12, %zmm9
+// CHECK:  encoding: [0x62,0x71,0x9d,0x48,0x5c,0x09]
+          vsubpd (%rcx), %zmm12, %zmm9
+
+// CHECK: vsubpd 291(%rax,%r14,8), %zmm12, %zmm9
+// CHECK:  encoding: [0x62,0x31,0x9d,0x48,0x5c,0x8c,0xf0,0x23,0x01,0x00,0x00]
+          vsubpd 291(%rax,%r14,8), %zmm12, %zmm9
+
+// CHECK: vsubpd (%rcx){1to8}, %zmm12, %zmm9
+// CHECK:  encoding: [0x62,0x71,0x9d,0x58,0x5c,0x09]
+          vsubpd (%rcx){1to8}, %zmm12, %zmm9
+
+// CHECK: vsubpd 8128(%rdx), %zmm12, %zmm9
+// CHECK:  encoding: [0x62,0x71,0x9d,0x48,0x5c,0x4a,0x7f]
+          vsubpd 8128(%rdx), %zmm12, %zmm9
+
+// CHECK: vsubpd 8192(%rdx), %zmm12, %zmm9
+// CHECK:  encoding: [0x62,0x71,0x9d,0x48,0x5c,0x8a,0x00,0x20,0x00,0x00]
+          vsubpd 8192(%rdx), %zmm12, %zmm9
+
+// CHECK: vsubpd -8256(%rdx), %zmm12, %zmm9
+// CHECK:  encoding: [0x62,0x71,0x9d,0x48,0x5c,0x8a,0xc0,0xdf,0xff,0xff]
+          vsubpd -8256(%rdx), %zmm12, %zmm9
+
+// CHECK: vsubpd 1016(%rdx){1to8}, %zmm12, %zmm9
+// CHECK:  encoding: [0x62,0x71,0x9d,0x58,0x5c,0x4a,0x7f]
+          vsubpd 1016(%rdx){1to8}, %zmm12, %zmm9
+
+// CHECK: vsubpd 1024(%rdx){1to8}, %zmm12, %zmm9
+// CHECK:  encoding: [0x62,0x71,0x9d,0x58,0x5c,0x8a,0x00,0x04,0x00,0x00]
+          vsubpd 1024(%rdx){1to8}, %zmm12, %zmm9
+
+// CHECK: vsubpd -1032(%rdx){1to8}, %zmm12, %zmm9
+// CHECK:  encoding: [0x62,0x71,0x9d,0x58,0x5c,0x8a,0xf8,0xfb,0xff,0xff]
+          vsubpd -1032(%rdx){1to8}, %zmm12, %zmm9
+
+// CHECK: vsubps %zmm21, %zmm27, %zmm14
+// CHECK:  encoding: [0x62,0x31,0x24,0x40,0x5c,0xf5]
+          vsubps %zmm21, %zmm27, %zmm14
+
+// CHECK: vsubps %zmm21, %zmm27, %zmm14 {%k5}
+// CHECK:  encoding: [0x62,0x31,0x24,0x45,0x5c,0xf5]
+          vsubps %zmm21, %zmm27, %zmm14 {%k5}
+
+// CHECK: vsubps %zmm21, %zmm27, %zmm14 {%k5} {z}
+// CHECK:  encoding: [0x62,0x31,0x24,0xc5,0x5c,0xf5]
+          vsubps %zmm21, %zmm27, %zmm14 {%k5} {z}
+
+// CHECK: vsubps (%rcx), %zmm27, %zmm14
+// CHECK:  encoding: [0x62,0x71,0x24,0x40,0x5c,0x31]
+          vsubps (%rcx), %zmm27, %zmm14
+
+// CHECK: vsubps 291(%rax,%r14,8), %zmm27, %zmm14
+// CHECK:  encoding: [0x62,0x31,0x24,0x40,0x5c,0xb4,0xf0,0x23,0x01,0x00,0x00]
+          vsubps 291(%rax,%r14,8), %zmm27, %zmm14
+
+// CHECK: vsubps (%rcx){1to16}, %zmm27, %zmm14
+// CHECK:  encoding: [0x62,0x71,0x24,0x50,0x5c,0x31]
+          vsubps (%rcx){1to16}, %zmm27, %zmm14
+
+// CHECK: vsubps 8128(%rdx), %zmm27, %zmm14
+// CHECK:  encoding: [0x62,0x71,0x24,0x40,0x5c,0x72,0x7f]
+          vsubps 8128(%rdx), %zmm27, %zmm14
+
+// CHECK: vsubps 8192(%rdx), %zmm27, %zmm14
+// CHECK:  encoding: [0x62,0x71,0x24,0x40,0x5c,0xb2,0x00,0x20,0x00,0x00]
+          vsubps 8192(%rdx), %zmm27, %zmm14
+
+// CHECK: vsubps -8256(%rdx), %zmm27, %zmm14
+// CHECK:  encoding: [0x62,0x71,0x24,0x40,0x5c,0xb2,0xc0,0xdf,0xff,0xff]
+          vsubps -8256(%rdx), %zmm27, %zmm14
+
+// CHECK: vsubps 508(%rdx){1to16}, %zmm27, %zmm14
+// CHECK:  encoding: [0x62,0x71,0x24,0x50,0x5c,0x72,0x7f]
+          vsubps 508(%rdx){1to16}, %zmm27, %zmm14
+
+// CHECK: vsubps 512(%rdx){1to16}, %zmm27, %zmm14
+// CHECK:  encoding: [0x62,0x71,0x24,0x50,0x5c,0xb2,0x00,0x02,0x00,0x00]
+          vsubps 512(%rdx){1to16}, %zmm27, %zmm14
+
+// CHECK: vsubps -516(%rdx){1to16}, %zmm27, %zmm14
+// CHECK:  encoding: [0x62,0x71,0x24,0x50,0x5c,0xb2,0xfc,0xfd,0xff,0xff]
+          vsubps -516(%rdx){1to16}, %zmm27, %zmm14
+
 // CHECK: vinserti32x4
 // CHECK: encoding: [0x62,0xa3,0x55,0x48,0x38,0xcd,0x01]
 vinserti32x4  $1, %xmm21, %zmm5, %zmm17
@@ -41,5 +2161,25 @@ vpsrad 512(%rdi, %rsi, 4), %zmm12, %zmm25
 vpbroadcastd  %xmm0, %zmm1 {%k1} {z}
 
 // CHECK: vmovdqu64 {{.*}} {%k3}
-// CHECK: encoding: [0x62,0xf1,0xfe,0x4b,0x6f,0xc8]
-vmovdqu64 %zmm0, %zmm1 {%k3}
+// CHECK: encoding: [0x62,0xf1,0xfe,0x4b,0x7f,0x07]
+vmovdqu64 %zmm0, (%rdi) {%k3}
+
+// CHECK: vmovdqa32 {{.*}} {%k4}
+// CHECK: encoding: [0x62,0x61,0x7d,0x4c,0x6f,0x1e]
+vmovdqa32 (%rsi), %zmm27 {%k4}
+
+// CHECK: vmovd
+// CHECK: encoding: [0x62,0xe1,0x7d,0x08,0x7e,0x74,0x24,0xeb]
+vmovd %xmm22, -84(%rsp)
+
+// CHECK: vextractps
+// CHECK: encoding: [0x62,0xe3,0x7d,0x08,0x17,0x61,0x1f,0x02]
+vextractps      $2, %xmm20, 124(%rcx)
+
+// CHECK: vaddpd {{.*}}{1to8}
+// CHECK: encoding: [0x62,0x61,0xdd,0x50,0x58,0x74,0xf7,0x40]
+vaddpd 512(%rdi, %rsi, 8) {1to8}, %zmm20, %zmm30
+
+// CHECK: vaddps {{.*}}{1to16}
+// CHECK: encoding: [0x62,0x61,0x5c,0x50,0x58,0xb4,0xf7,0x00,0x02,0x00,0x00]
+vaddps 512(%rdi, %rsi, 8) {1to16}, %zmm20, %zmm30
diff --git a/test/MC/X86/fixup-cpu-mode.s b/test/MC/X86/fixup-cpu-mode.s
new file mode 100644
index 0000000..13e0d46
--- /dev/null
+++ b/test/MC/X86/fixup-cpu-mode.s
@@ -0,0 +1,8 @@
+// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o %t
+// RUN: llvm-objdump -d %t | FileCheck %s
+
+//PR18303
+.global edata
+sub $edata, %r12 // CHECK: subq $0, %r12
+.code32
+
diff --git a/test/MC/X86/index-operations.s b/test/MC/X86/index-operations.s
new file mode 100644
index 0000000..9f69b0b
--- /dev/null
+++ b/test/MC/X86/index-operations.s
@@ -0,0 +1,146 @@
+// RUN: not llvm-mc -triple x86_64-unknown-unknown --show-encoding %s 2> %t.err | FileCheck --check-prefix=64 %s
+// RUN: FileCheck --check-prefix=ERR64 < %t.err %s
+// RUN: not llvm-mc -triple i386-unknown-unknown --show-encoding %s 2> %t.err | FileCheck --check-prefix=32 %s
+// RUN: FileCheck --check-prefix=ERR32 < %t.err %s
+// RUN: not llvm-mc -triple i386-unknown-unknown-code16 --show-encoding %s 2> %t.err | FileCheck --check-prefix=16 %s
+// RUN: FileCheck --check-prefix=ERR16 < %t.err %s
+
+lodsb
+// 64: lodsb (%rsi), %al # encoding: [0xac]
+// 32: lodsb (%esi), %al # encoding: [0xac]
+// 16: lodsb (%si), %al # encoding: [0xac]
+
+lodsb (%rsi), %al
+// 64: lodsb (%rsi), %al # encoding: [0xac]
+// ERR32: 64-bit
+// ERR16: 64-bit
+
+lodsb (%esi), %al
+// 64: lodsb (%esi), %al # encoding: [0x67,0xac]
+// 32: lodsb (%esi), %al # encoding: [0xac]
+// 16: lodsb (%esi), %al # encoding: [0x67,0xac]
+
+lodsb (%si), %al
+// ERR64: invalid 16-bit base register
+// 32: lodsb (%si), %al # encoding: [0x67,0xac]
+// 16: lodsb (%si), %al # encoding: [0xac]
+
+lodsl %gs:(%esi)
+// 64: lodsl %gs:(%esi), %eax # encoding: [0x65,0x67,0xad]
+// 32: lodsl %gs:(%esi), %eax # encoding: [0x65,0xad]
+// 16: lodsl %gs:(%esi), %eax # encoding: [0x66,0x65,0x67,0xad]
+
+lodsl (%edi), %eax
+// ERR64: invalid operand
+// ERR32: invalid operand
+// ERR16: invalid operand
+
+lodsl 44(%edi), %eax
+// ERR64: invalid operand
+// ERR32: invalid operand
+// ERR16: invalid operand
+
+lods (%esi), %ax
+// 64: lodsw (%esi), %ax # encoding: [0x66,0x67,0xad]
+// 32: lodsw (%esi), %ax # encoding: [0x66,0xad]
+// 16: lodsw (%esi), %ax # encoding: [0x67,0xad]
+
+stosw
+// 64: stosw %ax, %es:(%rdi) # encoding: [0x66,0xab]
+// 32: stosw %ax, %es:(%edi) # encoding: [0x66,0xab]
+// 16: stosw %ax, %es:(%di) # encoding: [0xab]
+
+stos %eax, (%edi)
+// 64: stosl %eax, %es:(%edi) # encoding: [0x67,0xab]
+// 32: stosl %eax, %es:(%edi) # encoding: [0xab]
+// 16: stosl %eax, %es:(%edi) # encoding: [0x66,0x67,0xab]
+
+stosb %al, %fs:(%edi)
+// ERR64: invalid operand for instruction
+// ERR32: invalid operand for instruction
+// ERR16: invalid operand for instruction
+
+stosb %al, %es:(%edi)
+// 64: stosb %al, %es:(%edi) # encoding: [0x67,0xaa]
+// 32: stosb %al, %es:(%edi) # encoding: [0xaa]
+// 16: stosb %al, %es:(%edi) # encoding: [0x67,0xaa]
+
+stosq
+// 64: stosq %rax, %es:(%rdi) # encoding: [0x48,0xab]
+// ERR32: 64-bit
+// ERR16: 64-bit
+
+stos %rax, (%edi)
+// 64: 	stosq %rax, %es:(%edi) # encoding: [0x48,0x67,0xab]
+// ERR32: only available in 64-bit mode
+// ERR16: only available in 64-bit mode
+
+scas %es:(%edi), %al
+// 64: scasb %es:(%edi), %al # encoding: [0x67,0xae]
+// 32: scasb %es:(%edi), %al # encoding: [0xae]
+// 16: scasb %es:(%edi), %al # encoding: [0x67,0xae]
+
+scasq %es:(%edi)
+// 64: scasq %es:(%edi), %rax # encoding: [0x48,0x67,0xaf]
+// ERR32: 64-bit
+// ERR16: 64-bit
+
+scasl %es:(%edi), %al
+// ERR64: invalid operand
+// ERR32: invalid operand
+// ERR16: invalid operand
+
+scas %es:(%di), %ax
+// ERR64: invalid 16-bit base register
+// 16: scasw %es:(%di), %ax # encoding: [0xaf]
+// 32: scasw %es:(%di), %ax # encoding: [0x66,0x67,0xaf]
+
+cmpsb
+// 64: cmpsb %es:(%rdi), (%rsi) # encoding: [0xa6]
+// 32: cmpsb %es:(%edi), (%esi) # encoding: [0xa6]
+// 16: cmpsb %es:(%di), (%si) # encoding: [0xa6]
+
+cmpsw (%edi), (%esi)
+// 64: cmpsw %es:(%edi), (%esi) # encoding: [0x66,0x67,0xa7]
+// 32: cmpsw %es:(%edi), (%esi) # encoding: [0x66,0xa7]
+// 16: cmpsw %es:(%edi), (%esi) # encoding: [0x67,0xa7]
+
+cmpsb (%di), (%esi)
+// ERR64: invalid 16-bit base register
+// ERR32: mismatching source and destination
+// ERR16: mismatching source and destination
+
+cmpsl %es:(%edi), %ss:(%esi)
+// 64: cmpsl %es:(%edi), %ss:(%esi) # encoding: [0x36,0x67,0xa7]
+// 32: cmpsl %es:(%edi), %ss:(%esi) # encoding: [0x36,0xa7]
+// 16: cmpsl %es:(%edi), %ss:(%esi) # encoding: [0x66,0x36,0x67,0xa7]
+
+cmpsq (%rdi), (%rsi)
+// 64: cmpsq %es:(%rdi), (%rsi) # encoding: [0x48,0xa7]
+// ERR32: 64-bit
+// ERR16: 64-bit
+
+movsb (%esi), (%edi)
+// 64: movsb (%esi), %es:(%edi) # encoding: [0x67,0xa4]
+// 32: movsb (%esi), %es:(%edi) # encoding: [0xa4]
+// 16: movsb (%esi), %es:(%edi) # encoding: [0x67,0xa4]
+
+movsl %gs:(%esi), (%edi)
+// 64: movsl %gs:(%esi), %es:(%edi) # encoding: [0x65,0x67,0xa5]
+// 32: movsl %gs:(%esi), %es:(%edi) # encoding: [0x65,0xa5]
+// 16: movsl %gs:(%esi), %es:(%edi) # encoding: [0x66,0x65,0x67,0xa5]
+
+outsb
+// 64: outsb (%rsi), %dx # encoding: [0x6e]
+// 32: outsb (%esi), %dx # encoding: [0x6e]
+// 16: outsb (%si), %dx # encoding: [0x6e]
+
+outsw %fs:(%esi), %dx
+// 64: outsw %fs:(%esi), %dx # encoding: [0x66,0x64,0x67,0x6f]
+// 32: outsw %fs:(%esi), %dx # encoding: [0x66,0x64,0x6f]
+// 16: outsw %fs:(%esi), %dx # encoding: [0x64,0x67,0x6f]
+
+insw %dx, (%edi)
+// 64: insw %dx, %es:(%edi) # encoding: [0x66,0x67,0x6d]
+// 32: insw %dx, %es:(%edi) # encoding: [0x66,0x6d]
+// 16: insw %dx, %es:(%edi) # encoding: [0x67,0x6d]
diff --git a/test/MC/X86/intel-syntax-avx512.s b/test/MC/X86/intel-syntax-avx512.s
new file mode 100644
index 0000000..b382994
--- /dev/null
+++ b/test/MC/X86/intel-syntax-avx512.s
@@ -0,0 +1,5 @@
+// RUN: llvm-mc -triple x86_64-unknown-unknown -x86-asm-syntax=intel -mcpu=knl --show-encoding %s | FileCheck %s
+
+// CHECK: vaddps (%rax), %zmm1, %zmm1
+// CHECK: encoding: [0x62,0xf1,0x74,0x48,0x58,0x08]
+vaddps zmm1, zmm1, zmmword ptr [rax]
diff --git a/test/MC/X86/intel-syntax-bitwise-ops.s b/test/MC/X86/intel-syntax-bitwise-ops.s
new file mode 100644
index 0000000..c9c9b1d
--- /dev/null
+++ b/test/MC/X86/intel-syntax-bitwise-ops.s
@@ -0,0 +1,22 @@
+// RUN: llvm-mc -triple x86_64-unknown-unknown -x86-asm-syntax=att %s | FileCheck %s
+
+.intel_syntax
+
+// CHECK: andl	$3, %ecx
+    and ecx, 1+2
+// CHECK: andl	$3, %ecx
+    and ecx, 1|2
+// CHECK: andl	$3, %ecx
+    and ecx, 1*3
+// CHECK: andl	$1, %ecx
+    and ecx, 1&3
+// CHECK: andl	$0, %ecx
+    and ecx, (1&2)
+// CHECK: andl	$3, %ecx
+    and ecx, ((1)|2)
+// CHECK: andl	$1, %ecx
+    and ecx, 1&2+3
+// CHECK: addl	$4938, %eax
+    add eax, 9876 >> 1
+// CHECK: addl	$19752, %eax
+    add eax, 9876 << 1
diff --git a/test/MC/X86/intel-syntax-directional-label.s b/test/MC/X86/intel-syntax-directional-label.s
new file mode 100644
index 0000000..c1aa90f
--- /dev/null
+++ b/test/MC/X86/intel-syntax-directional-label.s
@@ -0,0 +1,17 @@
+// RUN: llvm-mc -triple x86_64-apple-darwin -x86-asm-syntax=intel %s | FileCheck %s
+// rdar://14961158
+	.text
+	.align 16
+	.globl FUNCTION_NAME
+	.private_extern	FUNCTION_NAME
+FUNCTION_NAME:
+	.intel_syntax
+	cmp rdi, 1
+	jge 1f
+// CHECK:	jge	Ltmp0
+	add rdi, 2
+// CHECK: addq $2, %rdi
+1:
+// CHECK:	Ltmp0:
+	add rdi, 1
+	ret
diff --git a/test/MC/X86/intel-syntax-invalid-basereg.s b/test/MC/X86/intel-syntax-invalid-basereg.s
new file mode 100644
index 0000000..fe026e184
--- /dev/null
+++ b/test/MC/X86/intel-syntax-invalid-basereg.s
@@ -0,0 +1,7 @@
+// RUN: not llvm-mc -triple x86_64-unknown-unknown %s 2> %t.err
+// RUN: FileCheck < %t.err %s
+
+.intel_syntax
+
+// CHECK: error: base register is 64-bit, but index register is not
+    lea rax, [rdi + edx]
diff --git a/test/MC/X86/intel-syntax-invalid-scale.s b/test/MC/X86/intel-syntax-invalid-scale.s
new file mode 100644
index 0000000..69c6add
--- /dev/null
+++ b/test/MC/X86/intel-syntax-invalid-scale.s
@@ -0,0 +1,11 @@
+// RUN: not llvm-mc -triple x86_64-unknown-unknown %s 2> %t.err
+// RUN: FileCheck < %t.err %s
+
+.intel_syntax
+
+// CHECK: error: scale factor in address must be 1, 2, 4 or 8
+    lea rax, [rdi + rdx*64]
+// CHECK: error: scale factor in address must be 1, 2, 4 or 8
+    lea rax, [rdi + rdx*32]
+// CHECK: error: scale factor in address must be 1, 2, 4 or 8
+    lea rax, [rdi + rdx*16]
diff --git a/test/MC/X86/intel-syntax.s b/test/MC/X86/intel-syntax.s
index 9677da7..540282a 100644
--- a/test/MC/X86/intel-syntax.s
+++ b/test/MC/X86/intel-syntax.s
@@ -584,3 +584,18 @@ fsub ST(1)
 fsubr ST(1)
 fdiv ST(1)
 fdivr ST(1)
+
+
+// CHECK: fxsaveq (%rax)
+// CHECK: fxrstorq (%rax)
+fxsave64 opaque ptr [rax]
+fxrstor64 opaque ptr [rax]
+
+.bss
+.globl _g0
+.text
+
+// CHECK: movq _g0, %rbx
+// CHECK: movq _g0+8, %rcx
+mov rbx, qword ptr [_g0]
+mov rcx, qword ptr [_g0 + 8]
diff --git a/test/MC/X86/no-elf-compact-unwind.s b/test/MC/X86/no-elf-compact-unwind.s
new file mode 100644
index 0000000..017c52a
--- /dev/null
+++ b/test/MC/X86/no-elf-compact-unwind.s
@@ -0,0 +1,15 @@
+// RUN: llvm-mc < %s -filetype=obj -triple x86_64-apple-macosx10.8.0 | llvm-readobj -s | FileCheck -check-prefix=MACHO %s
+// RUN: llvm-mc < %s -filetype=obj -triple x86_64-unknown-linux | llvm-readobj -s | FileCheck -check-prefix=ELF %s
+
+	.globl	__Z3barv
+	.align	4, 0x90
+__Z3barv:
+	.cfi_startproc
+	pushq	%rax
+	.cfi_def_cfa_offset 16
+	popq	%rax
+	retq
+	.cfi_endproc
+
+// MACHO: Name: __compact_unwind
+// ELF-NOT: __compact_unwind
diff --git a/test/MC/X86/padlock.s b/test/MC/X86/padlock.s
index 5c523e7..6985817 100644
--- a/test/MC/X86/padlock.s
+++ b/test/MC/X86/padlock.s
@@ -3,55 +3,3 @@
 	xstore
 // CHECK: xstore
 // CHECK: encoding: [0x0f,0xa7,0xc0]
-
-	xstorerng
-// CHECK: xstore
-// CHECK: encoding: [0x0f,0xa7,0xc0]
-
-	rep xcryptecb
-// CHECK: rep
-// CHECK: encoding: [0xf3]
-// CHECK: xcryptecb
-// CHECK: encoding: [0x0f,0xa7,0xc8]
-
-	rep xcryptcbc
-// CHECK: rep
-// CHECK: encoding: [0xf3]
-// CHECK: xcryptcbc
-// CHECK: encoding: [0x0f,0xa7,0xd0]
-
-	rep xcryptctr
-// CHECK: rep
-// CHECK: encoding: [0xf3]
-// CHECK: xcryptctr
-// CHECK: encoding: [0x0f,0xa7,0xd8]
-
-	rep xcryptcfb
-// CHECK: rep
-// CHECK: encoding: [0xf3]
-// CHECK: xcryptcfb
-// CHECK: encoding: [0x0f,0xa7,0xe0]
-
-	rep xcryptofb
-// CHECK: rep
-// CHECK: encoding: [0xf3]
-// CHECK: xcryptofb
-// CHECK: encoding: [0x0f,0xa7,0xe8]
-
-	rep xsha1
-// CHECK: rep
-// CHECK: encoding: [0xf3]
-// CHECK: xsha1
-// CHECK: encoding: [0x0f,0xa6,0xc8]
-
-	rep xsha256
-// CHECK: rep
-// CHECK: encoding: [0xf3]
-// CHECK: xsha256
-// CHECK: encoding: [0x0f,0xa6,0xd0]
-
-	rep montmul
-// CHECK: rep
-// CHECK: encoding: [0xf3]
-// CHECK: montmul
-// CHECK: encoding: [0x0f,0xa6,0xc0]
diff --git a/test/MC/X86/relax-insn.s b/test/MC/X86/relax-insn.s
new file mode 100644
index 0000000..510766c
--- /dev/null
+++ b/test/MC/X86/relax-insn.s
@@ -0,0 +1,5 @@
+// RUN: llvm-mc -filetype=obj -triple i386-pc-linux-gnu %s -o %t
+// RUN: llvm-objdump -d %t | FileCheck %s
+
+.global foo	
+pushw $foo // CHECK: pushw
diff --git a/test/MC/X86/reloc-undef-global.s b/test/MC/X86/reloc-undef-global.s
new file mode 100644
index 0000000..a4854d4
--- /dev/null
+++ b/test/MC/X86/reloc-undef-global.s
@@ -0,0 +1,20 @@
+// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux %s -o - | llvm-readobj -r | FileCheck --check-prefix=ELF %s
+// RUN: llvm-mc -filetype=obj -triple x86_64-apple-darwin %s -o - | llvm-readobj -r | FileCheck --check-prefix=MACHO %s
+
+
+bar = foo + 4
+	.globl bar
+	.long bar
+
+// ELF:      Relocations [
+// ELF-NEXT:   Section (2) .rela.text {
+// ELF-NEXT:     0x0 R_X86_64_32 foo 0x4
+// ELF-NEXT:   }
+// ELF-NEXT: ]
+
+
+// MACHO: Relocations [
+// MACHO:   Section __text {
+// MACHO:     0x0 0 2 1 X86_64_RELOC_UNSIGNED 0 bar
+// MACHO:   }
+// MACHO: ]
diff --git a/test/MC/X86/ret.s b/test/MC/X86/ret.s
new file mode 100644
index 0000000..bac669b
--- /dev/null
+++ b/test/MC/X86/ret.s
@@ -0,0 +1,114 @@
+// RUN: not llvm-mc -triple x86_64-unknown-unknown --show-encoding %s 2> %t.err | FileCheck --check-prefix=64 %s
+// RUN: FileCheck --check-prefix=ERR64 < %t.err %s
+// RUN: not llvm-mc -triple i386-unknown-unknown --show-encoding %s 2> %t.err | FileCheck --check-prefix=32 %s
+// RUN: FileCheck --check-prefix=ERR32 < %t.err %s
+// RUN: not llvm-mc -triple i386-unknown-unknown-code16 --show-encoding %s 2> %t.err | FileCheck --check-prefix=16 %s
+// RUN: FileCheck --check-prefix=ERR16 < %t.err %s
+
+	ret
+// 64: retq
+// 64: encoding: [0xc3]
+// 32: retl
+// 32: encoding: [0xc3]
+// 16: retw
+// 16: encoding: [0xc3]
+	retw
+// 64: retw
+// 64: encoding: [0x66,0xc3]
+// 32: retw
+// 32: encoding: [0x66,0xc3]
+// 16: retw
+// 16: encoding: [0xc3]
+	retl
+// ERR64: error: instruction requires: Not 64-bit mode
+// 32: retl
+// 32: encoding: [0xc3]
+// 16: retl
+// 16: encoding: [0x66,0xc3]
+	retq
+// 64: retq
+// 64: encoding: [0xc3]
+// ERR32: error: instruction requires: 64-bit mode
+// ERR16: error: instruction requires: 64-bit mode
+
+	ret $0
+// 64: retq $0
+// 64: encoding: [0xc2,0x00,0x00]
+// 32: retl $0
+// 32: encoding: [0xc2,0x00,0x00]
+// 16: retw $0
+// 16: encoding: [0xc2,0x00,0x00]
+	retw $0
+// 64: retw $0
+// 64: encoding: [0x66,0xc2,0x00,0x00]
+// 32: retw $0
+// 32: encoding: [0x66,0xc2,0x00,0x00]
+// 16: retw $0
+// 16: encoding: [0xc2,0x00,0x00]
+	retl $0
+// ERR64: error: instruction requires: Not 64-bit mode
+// 32: retl $0
+// 32: encoding: [0xc2,0x00,0x00]
+// 16: retl $0
+// 16: encoding: [0x66,0xc2,0x00,0x00]
+	retq $0
+// 64: retq $0
+// 64: encoding: [0xc2,0x00,0x00]
+// ERR32: error: instruction requires: 64-bit mode
+// ERR16: error: instruction requires: 64-bit mode
+
+	lret
+// 64: lretl
+// 64: encoding: [0xcb]
+// 32: lretl
+// 32: encoding: [0xcb]
+// 16: lretw
+// 16: encoding: [0xcb]
+	lretw
+// 64: lretw
+// 64: encoding: [0x66,0xcb]
+// 32: lretw
+// 32: encoding: [0x66,0xcb]
+// 16: lretw
+// 16: encoding: [0xcb]
+	lretl
+// 64: lretl
+// 64: encoding: [0xcb]
+// 32: lretl
+// 32: encoding: [0xcb]
+// 16: lretl
+// 16: encoding: [0x66,0xcb]
+	lretq
+// 64: lretq
+// 64: encoding: [0x48,0xcb]
+// ERR32: error: instruction requires: 64-bit mode
+// ERR16: error: instruction requires: 64-bit mode
+
+	lret $0
+// 64: lretl $0
+// 64: encoding: [0xca,0x00,0x00]
+// 32: lretl $0
+// 32: encoding: [0xca,0x00,0x00]
+// 16: lretw $0
+// 16: encoding: [0xca,0x00,0x00]
+	lretw $0
+// 64: lretw $0
+// 64: encoding: [0x66,0xca,0x00,0x00]
+// 32: lretw $0
+// 32: encoding: [0x66,0xca,0x00,0x00]
+// 16: lretw $0
+// 16: encoding: [0xca,0x00,0x00]
+	lretl $0
+// 64: lretl $0
+// 64: encoding: [0xca,0x00,0x00]
+// 32: lretl $0
+// 32: encoding: [0xca,0x00,0x00]
+// 16: lretl $0
+// 16: encoding: [0x66,0xca,0x00,0x00]
+	lretq $0
+// 64: lretq $0
+// 64: encoding: [0x48,0xca,0x00,0x00]
+// ERR32: error: instruction requires: 64-bit mode
+// ERR16: error: instruction requires: 64-bit mode
+
+
diff --git a/test/MC/X86/stackmap-nops.ll b/test/MC/X86/stackmap-nops.ll
new file mode 100644
index 0000000..98d17ea
--- /dev/null
+++ b/test/MC/X86/stackmap-nops.ll
@@ -0,0 +1,47 @@
+; RUN: llc -mtriple=x86_64-apple-darwin -mcpu=corei7 -disable-fp-elim -filetype=obj %s -o - | llvm-objdump -d - | FileCheck %s
+; RUN: llc -mtriple=x86_64-apple-darwin -mcpu=corei7 -disable-fp-elim -filetype=asm %s -o - | llvm-mc -triple=x86_64-apple-darwin -mcpu=corei7 -filetype=obj - | llvm-objdump -d - | FileCheck %s
+
+define void @nop_test() {
+entry:
+; CHECK:  0: 55
+; CHECK:  1: 48 89 e5
+
+; CHECK:  4: 90
+; CHECK:  5: 66 90
+; CHECK:  7: 0f 1f 00
+; CHECK:  a: 0f 1f 40 08
+; CHECK:  e: 0f 1f 44 00 08
+; CHECK: 13: 66 0f 1f 44 00 08
+; CHECK: 19: 0f 1f 80 00 02 00 00
+; CHECK: 20: 0f 1f 84 00 00 02 00 00
+; CHECK: 28: 66 0f 1f 84 00 00 02 00 00
+; CHECK: 31: 2e 66 0f 1f 84 00 00 02 00 00
+; CHECK: 3b: 66 2e 66 0f 1f 84 00 00 02 00 00
+; CHECK: 46: 66 66 2e 66 0f 1f 84 00 00 02 00 00
+; CHECK: 52: 66 66 66 2e 66 0f 1f 84 00 00 02 00 00
+; CHECK: 5f: 66 66 66 66 2e 66 0f 1f 84 00 00 02 00 00
+; CHECK: 6d: 66 66 66 66 66 2e 66 0f 1f 84 00 00 02 00 00
+
+; CHECK: 7c: 5d
+; CHECK: 7d: c3
+
+  tail call void (i64, i32, ...)* @llvm.experimental.stackmap(i64  0, i32  0)
+  tail call void (i64, i32, ...)* @llvm.experimental.stackmap(i64  1, i32  1)
+  tail call void (i64, i32, ...)* @llvm.experimental.stackmap(i64  2, i32  2)
+  tail call void (i64, i32, ...)* @llvm.experimental.stackmap(i64  3, i32  3)
+  tail call void (i64, i32, ...)* @llvm.experimental.stackmap(i64  4, i32  4)
+  tail call void (i64, i32, ...)* @llvm.experimental.stackmap(i64  5, i32  5)
+  tail call void (i64, i32, ...)* @llvm.experimental.stackmap(i64  6, i32  6)
+  tail call void (i64, i32, ...)* @llvm.experimental.stackmap(i64  7, i32  7)
+  tail call void (i64, i32, ...)* @llvm.experimental.stackmap(i64  8, i32  8)
+  tail call void (i64, i32, ...)* @llvm.experimental.stackmap(i64  9, i32  9)
+  tail call void (i64, i32, ...)* @llvm.experimental.stackmap(i64 10, i32 10)
+  tail call void (i64, i32, ...)* @llvm.experimental.stackmap(i64 11, i32 11)
+  tail call void (i64, i32, ...)* @llvm.experimental.stackmap(i64 12, i32 12)
+  tail call void (i64, i32, ...)* @llvm.experimental.stackmap(i64 13, i32 13)
+  tail call void (i64, i32, ...)* @llvm.experimental.stackmap(i64 14, i32 14)
+  tail call void (i64, i32, ...)* @llvm.experimental.stackmap(i64 15, i32 15)
+  ret void
+}
+
+declare void @llvm.experimental.stackmap(i64, i32, ...)
diff --git a/test/MC/X86/variant-diagnostics.s b/test/MC/X86/variant-diagnostics.s
new file mode 100644
index 0000000..bf6a7c7
--- /dev/null
+++ b/test/MC/X86/variant-diagnostics.s
@@ -0,0 +1,11 @@
+# RUN: not llvm-mc -triple i386-linux-gnu -filetype asm -o /dev/null 2>&1 %s \
+# RUN:   | FileCheck %s
+
+	.text
+
+function:
+	call external@invalid
+
+# CHECK: error: invalid variant 'invalid'
+# CHECK: 	call external@invalid
+# CHECK:                      ^
diff --git a/test/MC/X86/x86-16.s b/test/MC/X86/x86-16.s
new file mode 100644
index 0000000..1f87c81
--- /dev/null
+++ b/test/MC/X86/x86-16.s
@@ -0,0 +1,949 @@
+// RUN: llvm-mc -triple i386-unknown-unknown-code16 --show-encoding %s | FileCheck %s
+
+	movl $0x12345678, %ebx
+// CHECK: movl
+// CHECK: encoding: [0x66,0xbb,0x78,0x56,0x34,0x12]
+	pause
+// CHECK: pause
+// CHECK: encoding: [0xf3,0x90]
+	sfence
+// CHECK: sfence
+// CHECK: encoding: [0x0f,0xae,0xf8]
+	lfence
+// CHECK: lfence
+// CHECK: encoding: [0x0f,0xae,0xe8]
+	mfence
+	stgi
+// CHECK: stgi
+// CHECK: encoding: [0x0f,0x01,0xdc]
+	clgi
+// CHECK: clgi
+// CHECK: encoding: [0x0f,0x01,0xdd]
+
+	rdtscp
+// CHECK: rdtscp
+// CHECK:  encoding: [0x0f,0x01,0xf9]
+
+
+// CHECK: movl	%eax, 16(%ebp)          # encoding: [0x67,0x66,0x89,0x45,0x10]
+	movl	%eax, 16(%ebp)
+// CHECK: movl	%eax, -16(%ebp)          # encoding: [0x67,0x66,0x89,0x45,0xf0]
+	movl	%eax, -16(%ebp)
+
+// CHECK: testb	%bl, %cl                # encoding: [0x84,0xcb]
+        testb %bl, %cl
+
+// CHECK: cmpl	%eax, %ebx              # encoding: [0x66,0x39,0xc3]
+        cmpl %eax, %ebx
+
+// CHECK: addw	%ax, %ax                # encoding: [0x01,0xc0]
+        addw %ax, %ax
+
+// CHECK: shrl	%eax                    # encoding: [0x66,0xd1,0xe8]
+        shrl $1, %eax
+
+// CHECK: shll	%eax                    # encoding: [0x66,0xd1,0xe0]
+        sall $1, %eax
+// CHECK: shll	%eax                    # encoding: [0x66,0xd1,0xe0]
+        sal $1, %eax
+
+// moffset forms of moves
+
+// CHECK: movb 0, %al  # encoding: [0xa0,0x00,0x00]
+movb	0, %al
+
+// CHECK: movw 0, %ax  # encoding: [0xa1,0x00,0x00]
+movw	0, %ax
+
+// CHECK: movl 0, %eax  # encoding: [0x66,0xa1,0x00,0x00]
+movl	0, %eax
+
+into
+// CHECK: into
+// CHECK:  encoding: [0xce]
+int3
+// CHECK: int3
+// CHECK:  encoding: [0xcc]
+int $4
+// CHECK: int $4
+// CHECK:  encoding: [0xcd,0x04]
+int $255
+// CHECK: int $255
+// CHECK:  encoding: [0xcd,0xff]
+
+// CHECK: pushfw	# encoding: [0x9c]
+        pushf
+// CHECK: pushfl	# encoding: [0x66,0x9c]
+        pushfl
+// CHECK: popfw         # encoding: [0x9d]
+        popf
+// CHECK: popfl	        # encoding: [0x66,0x9d]
+        popfl
+
+retl
+// CHECK: ret
+// CHECK:  encoding: [0x66,0xc3]
+
+// CHECK: cmoval	%eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x47,0xd0]
+        	cmoval	%eax,%edx
+
+// CHECK: cmovael	%eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x43,0xd0]
+        	cmovael	%eax,%edx
+
+// CHECK: cmovbel	%eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x46,0xd0]
+        	cmovbel	%eax,%edx
+
+// CHECK: cmovbl	%eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x42,0xd0]
+        	cmovbl	%eax,%edx
+
+// CHECK: cmovbw %bx, %bx
+cmovnae	%bx,%bx
+
+
+// CHECK: cmovbel	%eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x46,0xd0]
+        	cmovbel	%eax,%edx
+
+// CHECK: cmovbl	%eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x42,0xd0]
+        	cmovcl	%eax,%edx
+
+// CHECK: cmovel	%eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x44,0xd0]
+        	cmovel	%eax,%edx
+
+// CHECK: cmovgl	%eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x4f,0xd0]
+        	cmovgl	%eax,%edx
+
+// CHECK: cmovgel	%eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x4d,0xd0]
+        	cmovgel	%eax,%edx
+
+// CHECK: cmovll	%eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x4c,0xd0]
+        	cmovll	%eax,%edx
+
+// CHECK: cmovlel	%eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x4e,0xd0]
+        	cmovlel	%eax,%edx
+
+// CHECK: cmovbel	%eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x46,0xd0]
+        	cmovnal	%eax,%edx
+
+// CHECK: cmovnel	%eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x45,0xd0]
+        	cmovnel	%eax,%edx
+
+// CHECK: cmovael	%eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x43,0xd0]
+        	cmovnbl	%eax,%edx
+
+// CHECK: cmoval	%eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x47,0xd0]
+        	cmovnbel	%eax,%edx
+
+// CHECK: cmovael	%eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x43,0xd0]
+        	cmovncl	%eax,%edx
+
+// CHECK: cmovnel	%eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x45,0xd0]
+        	cmovnel	%eax,%edx
+
+// CHECK: cmovlel	%eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x4e,0xd0]
+        	cmovngl	%eax,%edx
+
+// CHECK: cmovgel	%eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x4d,0xd0]
+        	cmovnl	%eax,%edx
+
+// CHECK: cmovnel	%eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x45,0xd0]
+        	cmovnel	%eax,%edx
+
+// CHECK: cmovlel	%eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x4e,0xd0]
+        	cmovngl	%eax,%edx
+
+// CHECK: cmovll	%eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x4c,0xd0]
+        	cmovngel	%eax,%edx
+
+// CHECK: cmovgel	%eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x4d,0xd0]
+        	cmovnll	%eax,%edx
+
+// CHECK: cmovgl	%eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x4f,0xd0]
+        	cmovnlel	%eax,%edx
+
+// CHECK: cmovnol	%eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x41,0xd0]
+        	cmovnol	%eax,%edx
+
+// CHECK: cmovnpl	%eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x4b,0xd0]
+        	cmovnpl	%eax,%edx
+
+// CHECK: cmovnsl	%eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x49,0xd0]
+        	cmovnsl	%eax,%edx
+
+// CHECK: cmovnel	%eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x45,0xd0]
+        	cmovnzl	%eax,%edx
+
+// CHECK: cmovol	%eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x40,0xd0]
+        	cmovol	%eax,%edx
+
+// CHECK: cmovpl	%eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x4a,0xd0]
+        	cmovpl	%eax,%edx
+
+// CHECK: cmovsl	%eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x48,0xd0]
+        	cmovsl	%eax,%edx
+
+// CHECK: cmovel	%eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x44,0xd0]
+        	cmovzl	%eax,%edx
+
+// CHECK: fmul	%st(0)
+// CHECK:  encoding: [0xd8,0xc8]
+        fmul %st(0), %st
+
+// CHECK: fadd	%st(0)
+// CHECK:  encoding: [0xd8,0xc0]
+        fadd %st(0), %st
+
+// CHECK: fsub	%st(0)
+// CHECK:  encoding: [0xd8,0xe0]
+        fsub %st(0), %st
+
+// CHECK: fsubr	%st(0)
+// CHECK:  encoding: [0xd8,0xe8]
+        fsubr %st(0), %st
+
+// CHECK: fdivr	%st(0)
+// CHECK:  encoding: [0xd8,0xf8]
+        fdivr %st(0), %st
+
+// CHECK: fdiv	%st(0)
+// CHECK:  encoding: [0xd8,0xf0]
+        fdiv %st(0), %st
+
+// CHECK: movl	%cs, %eax
+// CHECK:  encoding: [0x66,0x8c,0xc8]
+        movl %cs, %eax
+
+// CHECK: movw	%cs, %ax
+// CHECK:  encoding: [0x8c,0xc8]
+        movw %cs, %ax
+
+// CHECK: movl	%cs, (%eax)
+// CHECK:  encoding: [0x67,0x66,0x8c,0x08]
+        movl %cs, (%eax)
+
+// CHECK: movw	%cs, (%eax)
+// CHECK:  encoding: [0x67,0x8c,0x08]
+        movw %cs, (%eax)
+
+// CHECK: movl	%eax, %cs
+// CHECK:  encoding: [0x66,0x8e,0xc8]
+        movl %eax, %cs
+
+// CHECK: movl	(%eax), %cs
+// CHECK:  encoding: [0x67,0x66,0x8e,0x08]
+        movl (%eax), %cs
+
+// CHECK: movw	(%eax), %cs
+// CHECK:  encoding: [0x67,0x8e,0x08]
+        movw (%eax), %cs
+
+// CHECK: movl	%cr0, %eax
+// CHECK:  encoding: [0x0f,0x20,0xc0]
+        movl %cr0,%eax
+
+// CHECK: movl	%cr1, %eax
+// CHECK:  encoding: [0x0f,0x20,0xc8]
+        movl %cr1,%eax
+
+// CHECK: movl	%cr2, %eax
+// CHECK:  encoding: [0x0f,0x20,0xd0]
+        movl %cr2,%eax
+
+// CHECK: movl	%cr3, %eax
+// CHECK:  encoding: [0x0f,0x20,0xd8]
+        movl %cr3,%eax
+
+// CHECK: movl	%cr4, %eax
+// CHECK:  encoding: [0x0f,0x20,0xe0]
+        movl %cr4,%eax
+
+// CHECK: movl	%dr0, %eax
+// CHECK:  encoding: [0x0f,0x21,0xc0]
+        movl %dr0,%eax
+
+// CHECK: movl	%dr1, %eax
+// CHECK:  encoding: [0x0f,0x21,0xc8]
+        movl %dr1,%eax
+
+// CHECK: movl	%dr1, %eax
+// CHECK:  encoding: [0x0f,0x21,0xc8]
+        movl %dr1,%eax
+
+// CHECK: movl	%dr2, %eax
+// CHECK:  encoding: [0x0f,0x21,0xd0]
+        movl %dr2,%eax
+
+// CHECK: movl	%dr3, %eax
+// CHECK:  encoding: [0x0f,0x21,0xd8]
+        movl %dr3,%eax
+
+// CHECK: movl	%dr4, %eax
+// CHECK:  encoding: [0x0f,0x21,0xe0]
+        movl %dr4,%eax
+
+// CHECK: movl	%dr5, %eax
+// CHECK:  encoding: [0x0f,0x21,0xe8]
+        movl %dr5,%eax
+
+// CHECK: movl	%dr6, %eax
+// CHECK:  encoding: [0x0f,0x21,0xf0]
+        movl %dr6,%eax
+
+// CHECK: movl	%dr7, %eax
+// CHECK:  encoding: [0x0f,0x21,0xf8]
+        movl %dr7,%eax
+
+// CHECK: wait
+// CHECK:  encoding: [0x9b]
+	fwait
+
+// CHECK: [0x66,0x65,0xa1,0x7c,0x00]
+        movl	%gs:124, %eax
+
+// CHECK: pusha
+// CHECK:  encoding: [0x60]
+        	pusha
+
+// CHECK: popa
+// CHECK:  encoding: [0x61]
+        	popa
+
+// CHECK: pushaw
+// CHECK:  encoding: [0x60]
+        	pushaw
+
+// CHECK: popaw
+// CHECK:  encoding: [0x61]
+        	popaw
+
+// CHECK: pushal
+// CHECK:  encoding: [0x66,0x60]
+        	pushal
+
+// CHECK: popal
+// CHECK:  encoding: [0x66,0x61]
+        	popal
+
+// CHECK: jmpw *8(%eax)
+// CHECK:   encoding: [0x67,0xff,0x60,0x08]
+	jmp	*8(%eax)
+
+// CHECK: jmpl *8(%eax)
+// CHECK:   encoding: [0x67,0x66,0xff,0x60,0x08]
+        jmpl	*8(%eax)
+
+// CHECK: lcalll $2, $4660
+// CHECK:   encoding: [0x66,0x9a,0x34,0x12,0x00,0x00,0x02,0x00]
+lcalll $0x2, $0x1234
+
+
+L1:
+  jcxz L1
+// CHECK: jcxz L1
+// CHECK:   encoding: [0xe3,A]
+  jecxz L1
+// CHECK: jecxz L1
+// CHECK:   encoding: [0x67,0xe3,A]
+
+iret
+// CHECK: iretw
+// CHECK: encoding: [0xcf]
+iretw
+// CHECK: iretw
+// CHECK: encoding: [0xcf]
+iretl
+// CHECK: iretl
+// CHECK: encoding: [0x66,0xcf]
+
+sysret
+// CHECK: sysretl
+// CHECK: encoding: [0x0f,0x07]
+sysretl
+// CHECK: sysretl
+// CHECK: encoding: [0x0f,0x07]
+
+testl	%ecx, -24(%ebp)
+// CHECK: testl	-24(%ebp), %ecx
+testl	-24(%ebp), %ecx
+// CHECK: testl	-24(%ebp), %ecx
+
+
+push %cs
+// CHECK: pushw	%cs
+// CHECK: encoding: [0x0e]
+push %ds
+// CHECK: pushw	%ds
+// CHECK: encoding: [0x1e]
+push %ss
+// CHECK: pushw	%ss
+// CHECK: encoding: [0x16]
+push %es
+// CHECK: pushw	%es
+// CHECK: encoding: [0x06]
+push %fs
+// CHECK: pushw	%fs
+// CHECK: encoding: [0x0f,0xa0]
+push %gs
+// CHECK: pushw	%gs
+// CHECK: encoding: [0x0f,0xa8]
+
+pushw %cs
+// CHECK: pushw	%cs
+// CHECK: encoding: [0x0e]
+pushw %ds
+// CHECK: pushw	%ds
+// CHECK: encoding: [0x1e]
+pushw %ss
+// CHECK: pushw	%ss
+// CHECK: encoding: [0x16]
+pushw %es
+// CHECK: pushw	%es
+// CHECK: encoding: [0x06]
+pushw %fs
+// CHECK: pushw	%fs
+// CHECK: encoding: [0x0f,0xa0]
+pushw %gs
+// CHECK: pushw	%gs
+// CHECK: encoding: [0x0f,0xa8]
+
+pushl %cs
+// CHECK: pushl	%cs
+// CHECK: encoding: [0x66,0x0e]
+pushl %ds
+// CHECK: pushl	%ds
+// CHECK: encoding: [0x66,0x1e]
+pushl %ss
+// CHECK: pushl	%ss
+// CHECK: encoding: [0x66,0x16]
+pushl %es
+// CHECK: pushl	%es
+// CHECK: encoding: [0x66,0x06]
+pushl %fs
+// CHECK: pushl	%fs
+// CHECK: encoding: [0x66,0x0f,0xa0]
+pushl %gs
+// CHECK: pushl	%gs
+// CHECK: encoding: [0x66,0x0f,0xa8]
+
+pop %ss
+// CHECK: popw	%ss
+// CHECK: encoding: [0x17]
+pop %ds
+// CHECK: popw	%ds
+// CHECK: encoding: [0x1f]
+pop %es
+// CHECK: popw	%es
+// CHECK: encoding: [0x07]
+
+popl %ss
+// CHECK: popl	%ss
+// CHECK: encoding: [0x66,0x17]
+popl %ds
+// CHECK: popl	%ds
+// CHECK: encoding: [0x66,0x1f]
+popl %es
+// CHECK: popl	%es
+// CHECK: encoding: [0x66,0x07]
+
+pushfd
+// CHECK: pushfl
+popfd
+// CHECK: popfl
+pushfl
+// CHECK: pushfl
+popfl
+// CHECK: popfl
+
+
+	setc	%bl
+	setnae	%bl
+	setnb	%bl
+	setnc	%bl
+	setna	%bl
+	setnbe	%bl
+	setpe	%bl
+	setpo	%bl
+	setnge	%bl
+	setnl	%bl
+	setng	%bl
+	setnle	%bl
+
+        setneb  %cl // CHECK: setne %cl
+	setcb	%bl // CHECK: setb %bl
+	setnaeb	%bl // CHECK: setb %bl
+
+
+// CHECK: lcalll	$31438, $31438
+// CHECK: lcalll	$31438, $31438
+// CHECK: ljmpl	$31438, $31438
+// CHECK: ljmpl	$31438, $31438
+
+calll	$0x7ace,$0x7ace
+lcalll	$0x7ace,$0x7ace
+jmpl	$0x7ace,$0x7ace
+ljmpl	$0x7ace,$0x7ace
+
+// CHECK: lcallw	$31438, $31438
+// CHECK: lcallw	$31438, $31438
+// CHECK: ljmpw	$31438, $31438
+// CHECK: ljmpw	$31438, $31438
+
+callw	$0x7ace,$0x7ace
+lcallw	$0x7ace,$0x7ace
+jmpw	$0x7ace,$0x7ace
+ljmpw	$0x7ace,$0x7ace
+
+// CHECK: lcallw	$31438, $31438
+// CHECK: lcallw	$31438, $31438
+// CHECK: ljmpw	$31438, $31438
+// CHECK: ljmpw	$31438, $31438
+
+call	$0x7ace,$0x7ace
+lcall	$0x7ace,$0x7ace
+jmp	$0x7ace,$0x7ace
+ljmp	$0x7ace,$0x7ace
+
+// CHECK: calll a
+ calll a
+
+// CHECK:	incb	%al # encoding: [0xfe,0xc0]
+	incb %al
+
+// CHECK:	incw	%ax # encoding: [0x40]
+	incw %ax
+
+// CHECK:	incl	%eax # encoding: [0x66,0x40]
+	incl %eax
+
+// CHECK:	decb	%al # encoding: [0xfe,0xc8]
+	decb %al
+
+// CHECK:	decw	%ax # encoding: [0x48]
+	decw %ax
+
+// CHECK:	decl	%eax # encoding: [0x66,0x48]
+	decl %eax
+
+// CHECK: pshufw $14, %mm4, %mm0 # encoding: [0x0f,0x70,0xc4,0x0e]
+pshufw $14, %mm4, %mm0
+
+// CHECK: pshufw $90, %mm4, %mm0 # encoding: [0x0f,0x70,0xc4,0x5a]
+pshufw $90, %mm4, %mm0
+
+// CHECK: aaa
+// CHECK:  encoding: [0x37]
+        	aaa
+
+// CHECK: aad	$1
+// CHECK:  encoding: [0xd5,0x01]
+        	aad	$1
+
+// CHECK: aad
+// CHECK:  encoding: [0xd5,0x0a]
+        	aad	$0xA
+
+// CHECK: aad
+// CHECK:  encoding: [0xd5,0x0a]
+        	aad
+
+// CHECK: aam	$2
+// CHECK:  encoding: [0xd4,0x02]
+        	aam	$2
+
+// CHECK: aam
+// CHECK:  encoding: [0xd4,0x0a]
+        	aam	$0xA
+
+// CHECK: aam
+// CHECK:  encoding: [0xd4,0x0a]
+        	aam
+
+// CHECK: aas
+// CHECK:  encoding: [0x3f]
+        	aas
+
+// CHECK: daa
+// CHECK:  encoding: [0x27]
+        	daa
+
+// CHECK: das
+// CHECK:  encoding: [0x2f]
+        	das
+
+// CHECK: retw	$31438
+// CHECK:  encoding: [0xc2,0xce,0x7a]
+        	retw	$0x7ace
+
+// CHECK: lretw	$31438
+// CHECK:  encoding: [0xca,0xce,0x7a]
+        	lretw	$0x7ace
+
+// CHECK: retw	$31438
+// CHECK:  encoding: [0xc2,0xce,0x7a]
+        	ret	$0x7ace
+
+// CHECK: lretw	$31438
+// CHECK:  encoding: [0xca,0xce,0x7a]
+        	lret	$0x7ace
+
+// CHECK: retl	$31438
+// CHECK:  encoding: [0x66,0xc2,0xce,0x7a]
+        	retl	$0x7ace
+
+// CHECK: lretl	$31438
+// CHECK:  encoding: [0x66,0xca,0xce,0x7a]
+        	lretl	$0x7ace
+
+// CHECK: bound	2(%eax), %bx
+// CHECK:  encoding: [0x67,0x62,0x58,0x02]
+        	bound	2(%eax),%bx
+
+// CHECK: bound	4(%ebx), %ecx
+// CHECK:  encoding: [0x67,0x66,0x62,0x4b,0x04]
+        	bound	4(%ebx),%ecx
+
+// CHECK: arpl	%bx, %bx
+// CHECK:  encoding: [0x63,0xdb]
+        	arpl	%bx,%bx
+
+// CHECK: arpl	%bx, 6(%ecx)
+// CHECK:  encoding: [0x67,0x63,0x59,0x06]
+        	arpl	%bx,6(%ecx)
+
+// CHECK: lgdtw	4(%eax)
+// CHECK:  encoding: [0x67,0x0f,0x01,0x50,0x04]
+        	lgdtw	4(%eax)
+
+// CHECK: lgdtw	4(%eax)
+// CHECK:  encoding: [0x67,0x0f,0x01,0x50,0x04]
+        	lgdt	4(%eax)
+
+// CHECK: lgdtl	4(%eax)
+// CHECK:  encoding: [0x67,0x66,0x0f,0x01,0x50,0x04]
+        	lgdtl	4(%eax)
+
+// CHECK: lidtw	4(%eax)
+// CHECK:  encoding: [0x67,0x0f,0x01,0x58,0x04]
+        	lidtw	4(%eax)
+
+// CHECK: lidtw	4(%eax)
+// CHECK:  encoding: [0x67,0x0f,0x01,0x58,0x04]
+        	lidt	4(%eax)
+
+// CHECK: lidtl	4(%eax)
+// CHECK:  encoding: [0x67,0x66,0x0f,0x01,0x58,0x04]
+        	lidtl	4(%eax)
+
+// CHECK: sgdtw	4(%eax)
+// CHECK:  encoding: [0x67,0x0f,0x01,0x40,0x04]
+        	sgdtw	4(%eax)
+
+// CHECK: sgdtw	4(%eax)
+// CHECK:  encoding: [0x67,0x0f,0x01,0x40,0x04]
+        	sgdt	4(%eax)
+
+// CHECK: sgdtl	4(%eax)
+// CHECK:  encoding: [0x67,0x66,0x0f,0x01,0x40,0x04]
+        	sgdtl	4(%eax)
+
+// CHECK: sidtw	4(%eax)
+// CHECK:  encoding: [0x67,0x0f,0x01,0x48,0x04]
+        	sidtw	4(%eax)
+
+// CHECK: sidtw	4(%eax)
+// CHECK:  encoding: [0x67,0x0f,0x01,0x48,0x04]
+        	sidt	4(%eax)
+
+// CHECK: sidtl	4(%eax)
+// CHECK:  encoding: [0x67,0x66,0x0f,0x01,0x48,0x04]
+        	sidtl	4(%eax)
+
+// CHECK: fcompi	%st(2)
+// CHECK:  encoding: [0xdf,0xf2]
+        	fcompi	%st(2), %st
+
+// CHECK: fcompi	%st(2)
+// CHECK:  encoding: [0xdf,0xf2]
+        	fcompi	%st(2)
+
+// CHECK: fcompi
+// CHECK:  encoding: [0xdf,0xf1]
+        	fcompi
+
+// CHECK: fucompi	%st(2)
+// CHECK:  encoding: [0xdf,0xea]
+        	fucompi	%st(2),%st
+
+// CHECK: fucompi	%st(2)
+// CHECK:  encoding: [0xdf,0xea]
+        	fucompi	%st(2)
+
+// CHECK: fucompi
+// CHECK:  encoding: [0xdf,0xe9]
+        	fucompi
+
+// CHECK: fldcw	32493
+// CHECK:  encoding: [0xd9,0x2e,0xed,0x7e]
+        	fldcww	0x7eed
+
+// CHECK: fldcw	32493
+// CHECK:  encoding: [0xd9,0x2e,0xed,0x7e]
+        	fldcw	0x7eed
+
+// CHECK: fnstcw	32493
+// CHECK:  encoding: [0xd9,0x3e,0xed,0x7e]
+        	fnstcww	0x7eed
+
+// CHECK: fnstcw	32493
+// CHECK:  encoding: [0xd9,0x3e,0xed,0x7e]
+        	fnstcw	0x7eed
+
+// CHECK: wait
+// CHECK:  encoding: [0x9b]
+        	fstcww	0x7eed
+
+// CHECK: wait
+// CHECK:  encoding: [0x9b]
+        	fstcw	0x7eed
+
+// CHECK: fnstsw	32493
+// CHECK:  encoding: [0xdd,0x3e,0xed,0x7e]
+        	fnstsww	0x7eed
+
+// CHECK: fnstsw	32493
+// CHECK:  encoding: [0xdd,0x3e,0xed,0x7e]
+        	fnstsw	0x7eed
+
+// CHECK: wait
+// CHECK:  encoding: [0x9b]
+        	fstsww	0x7eed
+
+// CHECK: wait
+// CHECK:  encoding: [0x9b]
+        	fstsw	0x7eed
+
+// CHECK: verr	32493
+// CHECK:  encoding: [0x0f,0x00,0x26,0xed,0x7e]
+        	verrw	0x7eed
+
+// CHECK: verr	32493
+// CHECK:  encoding: [0x0f,0x00,0x26,0xed,0x7e]
+        	verr	0x7eed
+
+// CHECK: wait
+// CHECK:  encoding: [0x9b]
+        	fclex
+
+// CHECK: fnclex
+// CHECK:  encoding: [0xdb,0xe2]
+        	fnclex
+
+// CHECK: ud2
+// CHECK:  encoding: [0x0f,0x0b]
+        	ud2
+
+// CHECK: ud2
+// CHECK:  encoding: [0x0f,0x0b]
+        	ud2a
+
+// CHECK: ud2b
+// CHECK:  encoding: [0x0f,0xb9]
+        	ud2b
+
+// CHECK: loope 0
+// CHECK: encoding: [0xe1,A]
+	loopz 0
+
+// CHECK: loopne 0
+// CHECK: encoding: [0xe0,A]
+	loopnz 0
+
+// CHECK: outsb (%si), %dx # encoding: [0x6e]
+// CHECK: outsb
+// CHECK: outsb
+	outsb
+	outsb	%ds:(%si), %dx
+	outsb	(%si), %dx
+
+// CHECK: outsw (%si), %dx # encoding: [0x6f]
+// CHECK: outsw
+// CHECK: outsw
+	outsw
+	outsw	%ds:(%si), %dx
+	outsw	(%si), %dx
+
+// CHECK: outsl (%si), %dx # encoding: [0x66,0x6f]
+// CHECK: outsl
+	outsl
+	outsl	%ds:(%si), %dx
+	outsl	(%si), %dx
+
+// CHECK: insb %dx, %es:(%di) # encoding: [0x6c]
+// CHECK: insb
+	insb
+	insb	%dx, %es:(%di)
+
+// CHECK: insw %dx, %es:(%di) # encoding: [0x6d]
+// CHECK: insw
+	insw
+	insw	%dx, %es:(%di)
+
+// CHECK: insl %dx, %es:(%di) # encoding: [0x66,0x6d]
+// CHECK: insl
+	insl
+	insl	%dx, %es:(%di)
+
+// CHECK: movsb (%si), %es:(%di) # encoding: [0xa4]
+// CHECK: movsb
+// CHECK: movsb
+	movsb
+	movsb	%ds:(%si), %es:(%di)
+	movsb	(%si), %es:(%di)
+
+// CHECK: movsw (%si), %es:(%di) # encoding: [0xa5]
+// CHECK: movsw
+// CHECK: movsw
+	movsw
+	movsw	%ds:(%si), %es:(%di)
+	movsw	(%si), %es:(%di)
+
+// CHECK: movsl (%si), %es:(%di) # encoding: [0x66,0xa5]
+// CHECK: movsl
+// CHECK: movsl
+	movsl
+	movsl	%ds:(%si), %es:(%di)
+	movsl	(%si), %es:(%di)
+
+// CHECK: lodsb (%si), %al # encoding: [0xac]
+// CHECK: lodsb
+// CHECK: lodsb
+// CHECK: lodsb
+// CHECK: lodsb
+	lodsb
+	lodsb	%ds:(%si), %al
+	lodsb	(%si), %al
+	lods	%ds:(%si), %al
+	lods	(%si), %al
+
+// CHECK: lodsw (%si), %ax # encoding: [0xad]
+// CHECK: lodsw
+// CHECK: lodsw
+// CHECK: lodsw
+// CHECK: lodsw
+	lodsw
+	lodsw	%ds:(%si), %ax
+	lodsw	(%si), %ax
+	lods	%ds:(%si), %ax
+	lods	(%si), %ax
+
+// CHECK: lodsl (%si), %eax # encoding: [0x66,0xad]
+// CHECK: lodsl
+// CHECK: lodsl
+// CHECK: lodsl
+// CHECK: lodsl
+	lodsl
+	lodsl	%ds:(%si), %eax
+	lodsl	(%si), %eax
+	lods	%ds:(%si), %eax
+	lods	(%si), %eax
+
+// CHECK: stosb %al, %es:(%di) # encoding: [0xaa]
+// CHECK: stosb
+// CHECK: stosb
+	stosb
+	stosb	%al, %es:(%di)
+	stos	%al, %es:(%di)
+
+// CHECK: stosw %ax, %es:(%di) # encoding: [0xab]
+// CHECK: stosw
+// CHECK: stosw
+	stosw
+	stosw	%ax, %es:(%di)
+	stos	%ax, %es:(%di)
+
+// CHECK: stosl %eax, %es:(%di) # encoding: [0x66,0xab]
+// CHECK: stosl
+// CHECK: stosl
+	stosl
+	stosl	%eax, %es:(%di)
+	stos	%eax, %es:(%di)
+
+// CHECK: strw
+// CHECK: encoding: [0x0f,0x00,0xc8]
+	str %ax
+
+// CHECK: strl
+// CHECK: encoding: [0x66,0x0f,0x00,0xc8]
+	str %eax
+
+
+// CHECK: fsubp
+// CHECK: encoding: [0xde,0xe1]
+fsubp %st,%st(1)
+
+// CHECK: fsubp	%st(2)
+// CHECK: encoding: [0xde,0xe2]
+fsubp   %st, %st(2)
+
+// CHECK: xchgl %eax, %eax
+// CHECK: encoding: [0x66,0x90]
+xchgl %eax, %eax
+
+// CHECK: xchgw %ax, %ax
+// CHECK: encoding: [0x90]
+xchgw %ax, %ax
+
+// CHECK: xchgl %ecx, %eax
+// CHECK: encoding: [0x66,0x91]
+xchgl %ecx, %eax
+
+// CHECK: xchgl %ecx, %eax
+// CHECK: encoding: [0x66,0x91]
+xchgl %eax, %ecx
+
+// CHECK: retw
+// CHECK: encoding: [0xc3]
+retw
+
+// CHECK: retl
+// CHECK: encoding: [0x66,0xc3]
+retl
+
+// CHECK: lretw
+// CHECK: encoding: [0xcb]
+lretw
+
+// CHECK: lretl
+// CHECK: encoding: [0x66,0xcb]
+lretl
diff --git a/test/MC/X86/x86-32.s b/test/MC/X86/x86-32.s
index 99136bd..bebaa65 100644
--- a/test/MC/X86/x86-32.s
+++ b/test/MC/X86/x86-32.s
@@ -438,18 +438,28 @@ cmovnae	%bx,%bx
 	fwait
 
 // rdar://7873482
-// CHECK: [0x65,0x8b,0x05,0x7c,0x00,0x00,0x00]
-// FIXME: This is a correct bug poor encoding: Use 65 a1 7c 00 00 00 
+// CHECK: [0x65,0xa1,0x7c,0x00,0x00,0x00]
         movl	%gs:124, %eax
 
-// CHECK: pusha
+// CHECK: [0x65,0xa3,0x7c,0x00,0x00,0x00]
+        movl	%eax, %gs:124
+
+// CHECK: pushal
 // CHECK:  encoding: [0x60]
         	pusha
 
-// CHECK: popa
+// CHECK: popal
 // CHECK:  encoding: [0x61]
         	popa
 
+// CHECK: pushaw
+// CHECK:  encoding: [0x66,0x60]
+        	pushaw
+
+// CHECK: popaw
+// CHECK:  encoding: [0x66,0x61]
+        	popaw
+
 // CHECK: pushal
 // CHECK:  encoding: [0x60]
         	pushal
@@ -593,6 +603,16 @@ lcalll	$0x7ace,$0x7ace
 jmpl	$0x7ace,$0x7ace
 ljmpl	$0x7ace,$0x7ace
 
+// CHECK: lcallw	$31438, $31438
+// CHECK: lcallw	$31438, $31438
+// CHECK: ljmpw	$31438, $31438
+// CHECK: ljmpw	$31438, $31438
+
+callw	$0x7ace,$0x7ace
+lcallw	$0x7ace,$0x7ace
+jmpw	$0x7ace,$0x7ace
+ljmpw	$0x7ace,$0x7ace
+
 // CHECK: lcalll	$31438, $31438
 // CHECK: lcalll	$31438, $31438
 // CHECK: ljmpl	$31438, $31438
@@ -701,11 +721,11 @@ pshufw $90, %mm4, %mm0
 // CHECK:  encoding: [0x66,0x0f,0x01,0x50,0x04]
         	lgdtw	4(%eax)
 
-// CHECK: lgdt	4(%eax)
+// CHECK: lgdtl	4(%eax)
 // CHECK:  encoding: [0x0f,0x01,0x50,0x04]
         	lgdt	4(%eax)
 
-// CHECK: lgdt	4(%eax)
+// CHECK: lgdtl	4(%eax)
 // CHECK:  encoding: [0x0f,0x01,0x50,0x04]
         	lgdtl	4(%eax)
 
@@ -713,11 +733,11 @@ pshufw $90, %mm4, %mm0
 // CHECK:  encoding: [0x66,0x0f,0x01,0x58,0x04]
         	lidtw	4(%eax)
 
-// CHECK: lidt	4(%eax)
+// CHECK: lidtl	4(%eax)
 // CHECK:  encoding: [0x0f,0x01,0x58,0x04]
         	lidt	4(%eax)
 
-// CHECK: lidt	4(%eax)
+// CHECK: lidtl	4(%eax)
 // CHECK:  encoding: [0x0f,0x01,0x58,0x04]
         	lidtl	4(%eax)
 
@@ -725,11 +745,11 @@ pshufw $90, %mm4, %mm0
 // CHECK:  encoding: [0x66,0x0f,0x01,0x40,0x04]
         	sgdtw	4(%eax)
 
-// CHECK: sgdt	4(%eax)
+// CHECK: sgdtl	4(%eax)
 // CHECK:  encoding: [0x0f,0x01,0x40,0x04]
         	sgdt	4(%eax)
 
-// CHECK: sgdt	4(%eax)
+// CHECK: sgdtl	4(%eax)
 // CHECK:  encoding: [0x0f,0x01,0x40,0x04]
         	sgdtl	4(%eax)
 
@@ -737,11 +757,11 @@ pshufw $90, %mm4, %mm0
 // CHECK:  encoding: [0x66,0x0f,0x01,0x48,0x04]
         	sidtw	4(%eax)
 
-// CHECK: sidt	4(%eax)
+// CHECK: sidtl	4(%eax)
 // CHECK:  encoding: [0x0f,0x01,0x48,0x04]
         	sidt	4(%eax)
 
-// CHECK: sidt	4(%eax)
+// CHECK: sidtl	4(%eax)
 // CHECK:  encoding: [0x0f,0x01,0x48,0x04]
         	sidtl	4(%eax)
 
@@ -845,63 +865,63 @@ pshufw $90, %mm4, %mm0
 // CHECK: encoding: [0xe0,A]
 	loopnz 0
 
-// CHECK: outsb # encoding: [0x6e]
+// CHECK: outsb (%esi), %dx # encoding: [0x6e]
 // CHECK: outsb
 // CHECK: outsb
 	outsb
 	outsb	%ds:(%esi), %dx
 	outsb	(%esi), %dx
 
-// CHECK: outsw # encoding: [0x66,0x6f]
+// CHECK: outsw (%esi), %dx # encoding: [0x66,0x6f]
 // CHECK: outsw
 // CHECK: outsw
 	outsw
 	outsw	%ds:(%esi), %dx
 	outsw	(%esi), %dx
 
-// CHECK: outsl # encoding: [0x6f]
+// CHECK: outsl (%esi), %dx # encoding: [0x6f]
 // CHECK: outsl
 	outsl
 	outsl	%ds:(%esi), %dx
 	outsl	(%esi), %dx
 
-// CHECK: insb # encoding: [0x6c]
+// CHECK: insb %dx, %es:(%edi) # encoding: [0x6c]
 // CHECK: insb
 	insb
 	insb	%dx, %es:(%edi)
 
-// CHECK: insw # encoding: [0x66,0x6d]
+// CHECK: insw %dx, %es:(%edi) # encoding: [0x66,0x6d]
 // CHECK: insw
 	insw
 	insw	%dx, %es:(%edi)
 
-// CHECK: insl # encoding: [0x6d]
+// CHECK: insl %dx, %es:(%edi) # encoding: [0x6d]
 // CHECK: insl
 	insl
 	insl	%dx, %es:(%edi)
 
-// CHECK: movsb # encoding: [0xa4]
+// CHECK: movsb (%esi), %es:(%edi) # encoding: [0xa4]
 // CHECK: movsb
 // CHECK: movsb
 	movsb
 	movsb	%ds:(%esi), %es:(%edi)
 	movsb	(%esi), %es:(%edi)
 
-// CHECK: movsw # encoding: [0x66,0xa5]
+// CHECK: movsw (%esi), %es:(%edi) # encoding: [0x66,0xa5]
 // CHECK: movsw
 // CHECK: movsw
 	movsw
 	movsw	%ds:(%esi), %es:(%edi)
 	movsw	(%esi), %es:(%edi)
 
-// CHECK: movsl # encoding: [0xa5]
+// CHECK: movsl (%esi), %es:(%edi) # encoding: [0xa5]
 // CHECK: movsl
 // CHECK: movsl
 	movsl
 	movsl	%ds:(%esi), %es:(%edi)
 	movsl	(%esi), %es:(%edi)
 
-// CHECK: lodsb # encoding: [0xac]
+// CHECK: lodsb (%esi), %al # encoding: [0xac]
 // CHECK: lodsb
 // CHECK: lodsb
 // CHECK: lodsb
@@ -912,7 +932,7 @@ pshufw $90, %mm4, %mm0
 	lods	%ds:(%esi), %al
 	lods	(%esi), %al
 
-// CHECK: lodsw # encoding: [0x66,0xad]
+// CHECK: lodsw (%esi), %ax # encoding: [0x66,0xad]
 // CHECK: lodsw
 // CHECK: lodsw
 // CHECK: lodsw
@@ -923,7 +943,7 @@ pshufw $90, %mm4, %mm0
 	lods	%ds:(%esi), %ax
 	lods	(%esi), %ax
 
-// CHECK: lodsl # encoding: [0xad]
+// CHECK: lodsl (%esi), %eax # encoding: [0xad]
 // CHECK: lodsl
 // CHECK: lodsl
 // CHECK: lodsl
@@ -934,21 +954,21 @@ pshufw $90, %mm4, %mm0
 	lods	%ds:(%esi), %eax
 	lods	(%esi), %eax
 
-// CHECK: stosb # encoding: [0xaa]
+// CHECK: stosb %al, %es:(%edi) # encoding: [0xaa]
 // CHECK: stosb
 // CHECK: stosb
 	stosb
 	stosb	%al, %es:(%edi)
 	stos	%al, %es:(%edi)
 
-// CHECK: stosw # encoding: [0x66,0xab]
+// CHECK: stosw %ax, %es:(%edi) # encoding: [0x66,0xab]
 // CHECK: stosw
 // CHECK: stosw
 	stosw
 	stosw	%ax, %es:(%edi)
 	stos	%ax, %es:(%edi)
 
-// CHECK: stosl # encoding: [0xab]
+// CHECK: stosl %eax, %es:(%edi) # encoding: [0xab]
 // CHECK: stosl
 // CHECK: stosl
 	stosl
diff --git a/test/MC/X86/x86-64.s b/test/MC/X86/x86-64.s
index 6b41f48..2781ef4 100644
--- a/test/MC/X86/x86-64.s
+++ b/test/MC/X86/x86-64.s
@@ -951,35 +951,35 @@ decw %ax  // CHECK:	decw	%ax # encoding: [0x66,0xff,0xc8]
 decl %eax // CHECK:	decl	%eax # encoding: [0xff,0xc8]
 
 // rdar://8416805
-// CHECK: lgdt	4(%rax)
+// CHECK: lgdtq	4(%rax)
 // CHECK:  encoding: [0x0f,0x01,0x50,0x04]
         	lgdt	4(%rax)
 
-// CHECK: lgdt	4(%rax)
+// CHECK: lgdtq	4(%rax)
 // CHECK:  encoding: [0x0f,0x01,0x50,0x04]
         	lgdtq	4(%rax)
 
-// CHECK: lidt	4(%rax)
+// CHECK: lidtq	4(%rax)
 // CHECK:  encoding: [0x0f,0x01,0x58,0x04]
         	lidt	4(%rax)
 
-// CHECK: lidt	4(%rax)
+// CHECK: lidtq	4(%rax)
 // CHECK:  encoding: [0x0f,0x01,0x58,0x04]
         	lidtq	4(%rax)
 
-// CHECK: sgdt	4(%rax)
+// CHECK: sgdtq	4(%rax)
 // CHECK:  encoding: [0x0f,0x01,0x40,0x04]
         	sgdt	4(%rax)
 
-// CHECK: sgdt	4(%rax)
+// CHECK: sgdtq	4(%rax)
 // CHECK:  encoding: [0x0f,0x01,0x40,0x04]
         	sgdtq	4(%rax)
 
-// CHECK: sidt	4(%rax)
+// CHECK: sidtq	4(%rax)
 // CHECK:  encoding: [0x0f,0x01,0x48,0x04]
         	sidt	4(%rax)
 
-// CHECK: sidt	4(%rax)
+// CHECK: sidtq	4(%rax)
 // CHECK:  encoding: [0x0f,0x01,0x48,0x04]
         	sidtq	4(%rax)
 
@@ -1050,56 +1050,56 @@ xsetbv // CHECK: xsetbv # encoding: [0x0f,0x01,0xd1]
 // CHECK: encoding: [0xe0,A]
 	loopnz 0
 
-// CHECK: outsb # encoding: [0x6e]
+// CHECK: outsb (%rsi), %dx # encoding: [0x6e]
 // CHECK: outsb
 // CHECK: outsb
 	outsb
 	outsb	%ds:(%rsi), %dx
 	outsb	(%rsi), %dx
 
-// CHECK: outsw # encoding: [0x66,0x6f]
+// CHECK: outsw (%rsi), %dx # encoding: [0x66,0x6f]
 // CHECK: outsw
 // CHECK: outsw
 	outsw
 	outsw	%ds:(%rsi), %dx
 	outsw	(%rsi), %dx
 
-// CHECK: outsl # encoding: [0x6f]
+// CHECK: outsl (%rsi), %dx # encoding: [0x6f]
 // CHECK: outsl
 	outsl
 	outsl	%ds:(%rsi), %dx
 	outsl	(%rsi), %dx
 
-// CHECK: insb # encoding: [0x6c]
+// CHECK: insb  %dx, %es:(%rdi) # encoding: [0x6c]
 // CHECK: insb
 	insb
 	insb	%dx, %es:(%rdi)
 
-// CHECK: insw # encoding: [0x66,0x6d]
+// CHECK: insw  %dx, %es:(%rdi) # encoding: [0x66,0x6d]
 // CHECK: insw
 	insw
 	insw	%dx, %es:(%rdi)
 
-// CHECK: insl # encoding: [0x6d]
+// CHECK: insl %dx, %es:(%rdi) # encoding: [0x6d]
 // CHECK: insl
 	insl
 	insl	%dx, %es:(%rdi)
 
-// CHECK: movsb # encoding: [0xa4]
+// CHECK: movsb (%rsi), %es:(%rdi) # encoding: [0xa4]
 // CHECK: movsb
 // CHECK: movsb
 	movsb
 	movsb	%ds:(%rsi), %es:(%rdi)
 	movsb	(%rsi), %es:(%rdi)
 
-// CHECK: movsw # encoding: [0x66,0xa5]
+// CHECK: movsw (%rsi), %es:(%rdi) # encoding: [0x66,0xa5]
 // CHECK: movsw
 // CHECK: movsw
 	movsw
 	movsw	%ds:(%rsi), %es:(%rdi)
 	movsw	(%rsi), %es:(%rdi)
 
-// CHECK: movsl # encoding: [0xa5]
+// CHECK: movsl (%rsi), %es:(%rdi) # encoding: [0xa5]
 // CHECK: movsl
 // CHECK: movsl
 	movsl
@@ -1109,14 +1109,14 @@ xsetbv // CHECK: xsetbv # encoding: [0x0f,0x01,0xd1]
 // CHECK: movsl
 	movsl	(%rsi), (%rdi)
 
-// CHECK: movsq # encoding: [0x48,0xa5]
+// CHECK: movsq (%rsi), %es:(%rdi) # encoding: [0x48,0xa5]
 // CHECK: movsq
 // CHECK: movsq
 	movsq
 	movsq	%ds:(%rsi), %es:(%rdi)
 	movsq	(%rsi), %es:(%rdi)
 
-// CHECK: lodsb # encoding: [0xac]
+// CHECK: lodsb (%rsi), %al # encoding: [0xac]
 // CHECK: lodsb
 // CHECK: lodsb
 // CHECK: lodsb
@@ -1127,7 +1127,7 @@ xsetbv // CHECK: xsetbv # encoding: [0x0f,0x01,0xd1]
 	lods	%ds:(%rsi), %al
 	lods	(%rsi), %al
 
-// CHECK: lodsw # encoding: [0x66,0xad]
+// CHECK: lodsw (%rsi), %ax # encoding: [0x66,0xad]
 // CHECK: lodsw
 // CHECK: lodsw
 // CHECK: lodsw
@@ -1138,7 +1138,7 @@ xsetbv // CHECK: xsetbv # encoding: [0x0f,0x01,0xd1]
 	lods	%ds:(%rsi), %ax
 	lods	(%rsi), %ax
 
-// CHECK: lodsl # encoding: [0xad]
+// CHECK: lodsl (%rsi), %eax # encoding: [0xad]
 // CHECK: lodsl
 // CHECK: lodsl
 // CHECK: lodsl
@@ -1149,7 +1149,7 @@ xsetbv // CHECK: xsetbv # encoding: [0x0f,0x01,0xd1]
 	lods	%ds:(%rsi), %eax
 	lods	(%rsi), %eax
 
-// CHECK: lodsq # encoding: [0x48,0xad]
+// CHECK: lodsq (%rsi), %rax # encoding: [0x48,0xad]
 // CHECK: lodsq
 // CHECK: lodsq
 // CHECK: lodsq
@@ -1160,28 +1160,28 @@ xsetbv // CHECK: xsetbv # encoding: [0x0f,0x01,0xd1]
 	lods	%ds:(%rsi), %rax
 	lods	(%rsi), %rax
 
-// CHECK: stosb # encoding: [0xaa]
+// CHECK: stosb %al, %es:(%rdi) # encoding: [0xaa]
 // CHECK: stosb
 // CHECK: stosb
 	stosb
 	stosb	%al, %es:(%rdi)
 	stos	%al, %es:(%rdi)
 
-// CHECK: stosw # encoding: [0x66,0xab]
+// CHECK: stosw %ax, %es:(%rdi) # encoding: [0x66,0xab]
 // CHECK: stosw
 // CHECK: stosw
 	stosw
 	stosw	%ax, %es:(%rdi)
 	stos	%ax, %es:(%rdi)
 
-// CHECK: stosl # encoding: [0xab]
+// CHECK: stosl %eax, %es:(%rdi) # encoding: [0xab]
 // CHECK: stosl
 // CHECK: stosl
 	stosl
 	stosl	%eax, %es:(%rdi)
 	stos	%eax, %es:(%rdi)
 
-// CHECK: stosq # encoding: [0x48,0xab]
+// CHECK: stosq %rax, %es:(%rdi) # encoding: [0x48,0xab]
 // CHECK: stosq
 // CHECK: stosq
 	stosq
@@ -1388,3 +1388,7 @@ movq %xmm0, %rax
 vmovd %xmm0, %eax
 vmovd %xmm0, %rax
 vmovq %xmm0, %rax
+
+// CHECK: seto 3735928559(%r10,%r9,8)
+// CHECK:  encoding: [0x43,0x0f,0x90,0x84,0xca,0xef,0xbe,0xad,0xde]
+	seto 0xdeadbeef(%r10,%r9,8)
diff --git a/test/MC/X86/x86-target-directives.s b/test/MC/X86/x86-target-directives.s
new file mode 100644
index 0000000..b6c7e78
--- /dev/null
+++ b/test/MC/X86/x86-target-directives.s
@@ -0,0 +1,7 @@
+# RUN: not llvm-mc -triple i386 -filetype asm -o - %s 2>&1 | FileCheck %s
+
+	.code42
+
+# CHECK: unknown directive .code42
+# CHECK-NOT: unknown directive
+
diff --git a/test/MC/X86/x86_64-avx-encoding.s b/test/MC/X86/x86_64-avx-encoding.s
index 5ba8064..1704b94 100644
--- a/test/MC/X86/x86_64-avx-encoding.s
+++ b/test/MC/X86/x86_64-avx-encoding.s
@@ -1557,7 +1557,7 @@ vdivpd  -4(%rcx,%rbx,8), %xmm10, %xmm11
           vcvtdq2ps  %xmm13, %xmm10
 
 // CHECK: vcvtdq2ps  (%ecx), %xmm13
-// CHECK: encoding: [0xc5,0x78,0x5b,0x29]
+// CHECK: encoding: [0x67,0xc5,0x78,0x5b,0x29]
           vcvtdq2ps  (%ecx), %xmm13
 
 // CHECK: vcvttps2dq  %xmm12, %xmm11
diff --git a/test/MC/X86/x86_64-signed-reloc.s b/test/MC/X86/x86_64-signed-reloc.s
new file mode 100644
index 0000000..e8a2720
--- /dev/null
+++ b/test/MC/X86/x86_64-signed-reloc.s
@@ -0,0 +1,16 @@
+// RUN: llvm-mc -triple x86_64-linux-gnu -filetype=obj %s | llvm-readobj -r | FileCheck %s
+
+
+				// CHECK:      Relocations [
+				// CHECK-NEXT:   Section ({{[0-9]+}}) .rela.text {
+
+pushq $foo			// CHECK-NEXT:     R_X86_64_32S
+addq $foo, %rax			// CHECK-NEXT:     R_X86_64_32S
+andq $foo, %rax			// CHECK-NEXT:     R_X86_64_32S
+movq $foo, %rax			// CHECK-NEXT:     R_X86_64_32S
+bextr $foo, (%edi), %eax	// CHECK-NEXT:     R_X86_64_32
+bextr $foo, (%rdi), %rax	// CHECK-NEXT:     R_X86_64_32S
+imul $foo, %rax			// CHECK-NEXT:     R_X86_64_32S
+
+				// CHECK-NEXT:   }
+				// CHECK-NEXT: ]
diff --git a/test/MC/X86/x86_64-tbm-encoding.s b/test/MC/X86/x86_64-tbm-encoding.s
index 180578b..a9b8f34 100644
--- a/test/MC/X86/x86_64-tbm-encoding.s
+++ b/test/MC/X86/x86_64-tbm-encoding.s
@@ -194,3 +194,9 @@
 // CHECK: tzmsk   (%rdi), %rax
 // CHECK: encoding: [0x8f,0xe9,0xf8,0x01,0x27]
           tzmsk   (%rdi), %rax
+
+// CHECK: encoding: [0x67,0xc4,0xe2,0x60,0xf7,0x07]
+          bextr   %ebx, (%edi), %eax
+
+// CHECK: encoding: [0x67,0x8f,0xea,0x78,0x10,0x07,A,A,A,A]
+          bextr   $foo, (%edi), %eax
diff --git a/test/MC/X86/x86_errors.s b/test/MC/X86/x86_errors.s
index a974233..51f2e8e 100644
--- a/test/MC/X86/x86_errors.s
+++ b/test/MC/X86/x86_errors.s
@@ -26,8 +26,23 @@ sysexitq
 lea (%rsp, %rbp, $4), %rax
 
 // rdar://10423777
-// 64: error: index register is 32-bit, but base register is 64-bit
+// 64: error: base register is 64-bit, but index register is not
 movq (%rsi,%ecx),%xmm0
 
+// 64: error: invalid 16-bit base register
+movl %eax,(%bp,%si)
+
+// 32: error: scale factor in 16-bit address must be 1
+movl %eax,(%bp,%si,2)
+
+// 32: error: invalid 16-bit base register
+movl %eax,(%cx)
+
+// 32: error: invalid 16-bit base/index register combination
+movl %eax,(%bp,%bx)
+
+// 32: error: 16-bit memory operand may not include only index register
+movl %eax,(,%bx)
+
 // 32: error: invalid operand for instruction
 outb al, 4