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| author | Jiangning Liu <jiangning.liu@arm.com> | 2012-08-02 08:13:13 +0000 |
|---|---|---|
| committer | Jiangning Liu <jiangning.liu@arm.com> | 2012-08-02 08:13:13 +0000 |
| commit | 1fb27eccf5b7eabde9678d84411eb1df8a693683 (patch) | |
| tree | 8d53d92a72109753456e6edb1b3886f8704441e7 /test/MC | |
| parent | ac89c0ddfdcf22a7bdaec3dd7e5de5f30ffcaf43 (diff) | |
| download | external_llvm-1fb27eccf5b7eabde9678d84411eb1df8a693683.zip external_llvm-1fb27eccf5b7eabde9678d84411eb1df8a693683.tar.gz external_llvm-1fb27eccf5b7eabde9678d84411eb1df8a693683.tar.bz2 | |
Fix #13241, a bug around shift immediate operand for ARM instruction ADR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161159 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC')
| -rw-r--r-- | test/MC/ARM/basic-arm-instructions.s | 8 | ||||
| -rw-r--r-- | test/MC/ARM/basic-thumb2-instructions.s | 2 | ||||
| -rw-r--r-- | test/MC/Disassembler/ARM/basic-arm-instructions.txt | 6 | ||||
| -rw-r--r-- | test/MC/Disassembler/ARM/thumb2.txt | 2 |
4 files changed, 18 insertions, 0 deletions
diff --git a/test/MC/ARM/basic-arm-instructions.s b/test/MC/ARM/basic-arm-instructions.s index e682db5..45f5247 100644 --- a/test/MC/ARM/basic-arm-instructions.s +++ b/test/MC/ARM/basic-arm-instructions.s @@ -141,6 +141,14 @@ Lforward: @ CHECK: adr r2, #3 @ encoding: [0x03,0x20,0x8f,0xe2] @ CHECK: adr r2, #-3 @ encoding: [0x03,0x20,0x4f,0xe2] + adr r1, #-0x0 + adr r1, #-0x12000000 + adr r1, #0x12000000 + +@ CHECK: adr r1, #-0 @ encoding: [0x00,0x10,0x4f,0xe2] +@ CHECK: adr r1, #-301989888 @ encoding: [0x12,0x14,0x4f,0xe2] +@ CHECK: adr r1, #301989888 @ encoding: [0x12,0x14,0x8f,0xe2] + @------------------------------------------------------------------------------ @ ADD diff --git a/test/MC/ARM/basic-thumb2-instructions.s b/test/MC/ARM/basic-thumb2-instructions.s index 4cfe2f2..6a048cf 100644 --- a/test/MC/ARM/basic-thumb2-instructions.s +++ b/test/MC/ARM/basic-thumb2-instructions.s @@ -135,9 +135,11 @@ _func: subw r11, pc, #3270 adr.w r11, #-826 + adr.w r1, #-0x0 @ CHECK: subw r11, pc, #3270 @ encoding: [0xaf,0xf6,0xc6,0x4b] @ CHECK: adr.w r11, #-826 @ encoding: [0xaf,0xf2,0x3a,0x3b] +@ CHECK: adr.w r1, #-0 @ encoding: [0xaf,0xf2,0x00,0x01] @------------------------------------------------------------------------------ @ AND (immediate) diff --git a/test/MC/Disassembler/ARM/basic-arm-instructions.txt b/test/MC/Disassembler/ARM/basic-arm-instructions.txt index 40eb4cd..7ef7bca 100644 --- a/test/MC/Disassembler/ARM/basic-arm-instructions.txt +++ b/test/MC/Disassembler/ARM/basic-arm-instructions.txt @@ -169,9 +169,15 @@ #------------------------------------------------------------------------------ # CHECK: add r2, pc, #3 # CHECK: sub r2, pc, #3 +# CHECK: sub r1, pc, #0 +# CHECK: sub r1, pc, #301989888 +# CHECK: add r1, pc, #301989888 0x03 0x20 0x8f 0xe2 0x03 0x20 0x4f 0xe2 +0x00 0x10 0x4f 0xe2 +0x12 0x14 0x4f 0xe2 +0x12 0x14 0x8f 0xe2 #------------------------------------------------------------------------------ # AND diff --git a/test/MC/Disassembler/ARM/thumb2.txt b/test/MC/Disassembler/ARM/thumb2.txt index 4d1b398..380983f 100644 --- a/test/MC/Disassembler/ARM/thumb2.txt +++ b/test/MC/Disassembler/ARM/thumb2.txt @@ -92,9 +92,11 @@ #------------------------------------------------------------------------------ # CHECK: subw r11, pc, #3270 # CHECK: subw r11, pc, #826 +# CHECK: subw r1, pc, #0 0xaf 0xf6 0xc6 0x4b 0xaf 0xf2 0x3a 0x3b +0xaf 0xf2 0x00 0x01 #------------------------------------------------------------------------------ # AND (immediate) |