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author | Daniel Dunbar <daniel@zuster.org> | 2009-08-07 08:26:05 +0000 |
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committer | Daniel Dunbar <daniel@zuster.org> | 2009-08-07 08:26:05 +0000 |
commit | 20927f26fcd7d0394bc60c58c61d879a83adac0d (patch) | |
tree | 3199da71f80913297ce777de2ae849e5fe4e8386 /test/MC | |
parent | b6879b2b84df2f642cd39f5bf58584c4a39f8080 (diff) | |
download | external_llvm-20927f26fcd7d0394bc60c58c61d879a83adac0d.zip external_llvm-20927f26fcd7d0394bc60c58c61d879a83adac0d.tar.gz external_llvm-20927f26fcd7d0394bc60c58c61d879a83adac0d.tar.bz2 |
llvm-mc/AsmMatcher: Move to a slightly more sane matching design.
- Still not very sane, but a least its not 60k lines on X86. :)
- In terms of correctness, currently some things are hard wired for X86, and we
still don't properly resolve ambiguities (this is ignoring the instructions
we don't even match due to funny .td stuff or other corner cases).
The high level changes:
1. Represent tokens which are significant for matching explicitly as separate
operands. This uniformly handles not only the instruction mnemonic, but
also 'signficiant' syntax like the '*' in "call * ...".
2. Separate the matching of operands to an instruction from the construction of
the MCInst. In theory this can be done during matching, but since the number
of variations is small I think it makes sense to decompose the problems.
3. Improved a few of the mechanisms to at least successfully flatten / tokenize
the assembly strings for PowerPC and ARM.
4. The comment at the top of AsmMatcherEmitter.cpp explains the approach I'm
moving towards for handling ambiguous instructions. The high-bit is to infer
a partial ordering of the operand classes (and force the user to specify one
if we can't) and use that to resolve ambiguities.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78378 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC')
-rw-r--r-- | test/MC/AsmParser/x86_instructions.s | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/test/MC/AsmParser/x86_instructions.s b/test/MC/AsmParser/x86_instructions.s index 7dbe939..f648112 100644 --- a/test/MC/AsmParser/x86_instructions.s +++ b/test/MC/AsmParser/x86_instructions.s @@ -16,4 +16,3 @@ movl %eax, 10(%ebp, %ebx, 4) // RUN: grep {MCInst(opcode=.*, operands=.reg:0, imm:4, reg:21, val:10, reg:0, reg:19.)} %t movl %eax, 10(, %ebx, 4) -
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