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authorAkira Hatanaka <ahatanaka@mips.com>2012-06-20 20:39:23 +0000
committerAkira Hatanaka <ahatanaka@mips.com>2012-06-20 20:39:23 +0000
commitb66510f309077d9f616462a1696f712236ce5a22 (patch)
tree3ab7951adeaf8f9a323e96fa9ed5be081409e453 /test/MC
parent3aaa59bcbb226499cd4743a42e919d3bdc24aa42 (diff)
downloadexternal_llvm-b66510f309077d9f616462a1696f712236ce5a22.zip
external_llvm-b66510f309077d9f616462a1696f712236ce5a22.tar.gz
external_llvm-b66510f309077d9f616462a1696f712236ce5a22.tar.bz2
In MipsDisassembler.cpp, instead of defining register class tables, use the ones
that are generated by TableGen and are already available in MipsGenRegisterInfo.inc. Suggested by Jakob Stoklund Olesen. Also, fix bug in function DecodeAFGR64RegisterClass. Patch by Vladimir Medic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158846 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC')
-rw-r--r--test/MC/Disassembler/Mips/mips32.txt90
-rw-r--r--test/MC/Disassembler/Mips/mips32_le.txt92
-rw-r--r--test/MC/Disassembler/Mips/mips32r2.txt74
-rw-r--r--test/MC/Disassembler/Mips/mips32r2_le.txt76
4 files changed, 172 insertions, 160 deletions
diff --git a/test/MC/Disassembler/Mips/mips32.txt b/test/MC/Disassembler/Mips/mips32.txt
index 591d8c4..25a8d9a 100644
--- a/test/MC/Disassembler/Mips/mips32.txt
+++ b/test/MC/Disassembler/Mips/mips32.txt
@@ -1,7 +1,7 @@
# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux
# CHECK: abs.d $f12,$f14
-0x46 0x20 0x39 0x85
+0x46 0x20 0x73 0x05
# CHECK: abs.s $f6,$f7
0x46 0x00 0x39 0x85
@@ -9,8 +9,8 @@
# CHECK: add t1,a2,a3
0x00 0xc7 0x48 0x20
-# CHECK: add.d $f18,$f12,$f14
-0x46 0x27 0x32 0x40
+# CHECK: add.d $f8,$f12,$f14
+0x46 0x2e 0x62 0x00
# CHECK: add.s $f9,$f6,$f7
0x46 0x07 0x32 0x40
@@ -61,103 +61,103 @@
0x15 0x26 0x01 0x4c
# CHECK: c.eq.d $f12,$f14
-0x46 0x27 0x30 0x32
+0x46 0x2e 0x60 0x32
# CHECK: c.eq.s $f6,$f7
0x46 0x07 0x30 0x32
# CHECK: c.f.d $f12,$f14
-0x46 0x27 0x30 0x30
+0x46 0x2e 0x60 0x30
# CHECK: c.f.s $f6,$f7
0x46 0x07 0x30 0x30
# CHECK: c.le.d $f12,$f14
-0x46 0x27 0x30 0x3e
+0x46 0x2e 0x60 0x3e
# CHECK: c.le.s $f6,$f7
0x46 0x07 0x30 0x3e
# CHECK: c.lt.d $f12,$f14
-0x46 0x27 0x30 0x3c
+0x46 0x2e 0x60 0x3c
# CHECK: c.lt.s $f6,$f7
0x46 0x07 0x30 0x3c
# CHECK: c.nge.d $f12,$f14
-0x46 0x27 0x30 0x3d
+0x46 0x2e 0x60 0x3d
# CHECK: c.nge.s $f6,$f7
0x46 0x07 0x30 0x3d
# CHECK: c.ngl.d $f12,$f14
-0x46 0x27 0x30 0x3b
+0x46 0x2e 0x60 0x3b
# CHECK: c.ngl.s $f6,$f7
0x46 0x07 0x30 0x3b
# CHECK: c.ngle.d $f12,$f14
-0x46 0x27 0x30 0x39
+0x46 0x2e 0x60 0x39
# CHECK: c.ngle.s $f6,$f7
0x46 0x07 0x30 0x39
# CHECK: c.ngt.d $f12,$f14
-0x46 0x27 0x30 0x3f
+0x46 0x2e 0x60 0x3f
# CHECK: c.ngt.s $f6,$f7
0x46 0x07 0x30 0x3f
# CHECK: c.ole.d $f12,$f14
-0x46 0x27 0x30 0x36
+0x46 0x2e 0x60 0x36
# CHECK: c.ole.s $f6,$f7
0x46 0x07 0x30 0x36
# CHECK: c.olt.d $f12,$f14
-0x46 0x27 0x30 0x34
+0x46 0x2e 0x60 0x34
# CHECK: c.olt.s $f6,$f7
0x46 0x07 0x30 0x34
# CHECK: c.seq.d $f12,$f14
-0x46 0x27 0x30 0x3a
+0x46 0x2e 0x60 0x3a
# CHECK: c.seq.s $f6,$f7
0x46 0x07 0x30 0x3a
# CHECK: c.sf.d $f12,$f14
-0x46 0x27 0x30 0x38
+0x46 0x2e 0x60 0x38
# CHECK: c.sf.s $f6,$f7
0x46 0x07 0x30 0x38
# CHECK: c.ueq.d $f12,$f14
-0x46 0x27 0x30 0x33
+0x46 0x2e 0x60 0x33
# CHECK: c.ueq.s $f28,$f18
0x46 0x12 0xe0 0x33
# CHECK: c.ule.d $f12,$f14
-0x46 0x27 0x30 0x37
+0x46 0x2e 0x60 0x37
# CHECK: c.ule.s $f6,$f7
0x46 0x07 0x30 0x37
# CHECK: c.ult.d $f12,$f14
-0x46 0x27 0x30 0x35
+0x46 0x2e 0x60 0x35
# CHECK: c.ult.s $f6,$f7
0x46 0x07 0x30 0x35
# CHECK: c.un.d $f12,$f14
-0x46 0x27 0x30 0x31
+0x46 0x2e 0x60 0x31
# CHECK: c.un.s $f6,$f7
0x46 0x07 0x30 0x31
# CHECK: ceil.w.d $f12,$f14
-0x46 0x20 0x39 0x8e
+0x46 0x20 0x73 0x0e
# CHECK: ceil.w.s $f6,$f7
0x46 0x00 0x39 0x8e
@@ -175,31 +175,25 @@
0x44 0xc6 0x38 0x00
# CHECK: cvt.d.s $f6,$f7
-0x46 0x00 0x38 0xa1
+0x46 0x00 0x39 0xa1
# CHECK: cvt.d.w $f12,$f14
-0x46 0x80 0x38 0xa1
-
-# CHECK: cvt.l.d $f12,$f14
-0x46 0x20 0x39 0xa5
-
-# CHECK: cvt.l.s $f6,$f7
-0x46 0x00 0x39 0xa5
+0x46 0x80 0x73 0x21
# CHECK: cvt.s.d $f12,$f14
-0x46 0x20 0x39 0xa0
+0x46 0x20 0x73 0x20
# CHECK: cvt.s.w $f6,$f7
0x46 0x80 0x39 0xa0
# CHECK: cvt.w.d $f12,$f14
-0x46 0x20 0x39 0xa4
+0x46 0x20 0x73 0x24
# CHECK: cvt.w.s $f6,$f7
0x46 0x00 0x39 0xa4
# CHECK: floor.w.d $f12,$f14
-0x46 0x20 0x39 0x8f
+0x46 0x20 0x73 0x0f
# CHECK: floor.w.s $f6,$f7
0x46 0x00 0x39 0x8f
@@ -246,6 +240,12 @@
# CHECK: lwc1 $f9,9158(a3)
0xc4 0xe9 0x23 0xc6
+# CHECK: lwl $v0, 3($a0)
+0x88 0x82 0x00 0x03
+
+# CHECK: lwr $v1,16($a1)
+0x98 0xa3 0x00 0x10
+
# CHECK: madd a2,a3
0x70 0xc7 0x00 0x00
@@ -261,8 +261,8 @@
# CHECK: mflo a1
0x00 0x00 0x28 0x12
-# CHECK: mov.d $f6,$f7
-0x46 0x20 0x39 0x86
+# CHECK: mov.d $f6,$f8
+0x46 0x20 0x41 0x86
# CHECK: mov.s $f6,$f7
0x46 0x00 0x39 0x86
@@ -285,8 +285,8 @@
# CHECK: mtlo a3
0x00 0xe0 0x00 0x13
-# CHECK: mul.d $f9,$f12,$f14
-0x46 0x27 0x32 0x42
+# CHECK: mul.d $f8,$f12,$f14
+0x46 0x2e 0x62 0x02
# CHECK: mul.s $f9,$f6,$f7
0x46 0x07 0x32 0x42
@@ -301,7 +301,7 @@
0x00 0x65 0x00 0x19
# CHECK: neg.d $f12,$f14
-0x46 0x20 0x39 0x87
+0x46 0x20 0x73 0x07
# CHECK: neg.s $f6,$f7
0x46 0x00 0x39 0x87
@@ -327,8 +327,8 @@
# CHECK: rdhwr a2,$29
0x7c 0x06 0xe8 0x3b
-# CHECK: round.w.d $f12,$f14
-0x46 0x20 0x39 0x8c
+# CHECK: round.w.d $f6,$f14
+0x46 0x20 0x73 0x0c
# CHECK: round.w.s $f6,$f7
0x46 0x00 0x39 0x8c
@@ -367,7 +367,7 @@
0x00 0x65 0x18 0x2b
# CHECK: sqrt.d $f12,$f14
-0x46 0x20 0x39 0x84
+0x46 0x20 0x73 0x04
# CHECK: sqrt.s $f6,$f7
0x46 0x00 0x39 0x84
@@ -387,8 +387,8 @@
# CHECK: srlv v0,v1,a1
0x00 0xa3 0x10 0x06
-# CHECK: sub.d $f9,$f12,$f14
-0x46 0x27 0x32 0x41
+# CHECK: sub.d $f8,$f12,$f14
+0x46 0x2e 0x62 0x01
# CHECK: sub.s $f9,$f6,$f7
0x46 0x07 0x32 0x41
@@ -405,11 +405,17 @@
# CHECK: swc1 $f9,9158(a3)
0xe4 0xe9 0x23 0xc6
+# CHECK: swl $a0, 16($a1)
+0xa8 0xa4 0x00 0x10
+
+# CHECK: swr $a2, 16($a3)
+0xb8 0xe6 0x00 0x10
+
# CHECK: sync 0x7
0x00 0x00 0x01 0xcf
# CHECK: trunc.w.d $f12,$f14
-0x46 0x20 0x39 0x8d
+0x46 0x20 0x73 0x0d
# CHECK: trunc.w.s $f6,$f7
0x46 0x00 0x39 0x8d
diff --git a/test/MC/Disassembler/Mips/mips32_le.txt b/test/MC/Disassembler/Mips/mips32_le.txt
index a5a3cfd..020e787 100644
--- a/test/MC/Disassembler/Mips/mips32_le.txt
+++ b/test/MC/Disassembler/Mips/mips32_le.txt
@@ -1,7 +1,7 @@
# RUN: llvm-mc --disassemble %s -triple=mipsel-unknown-linux
# CHECK: abs.d $f12,$f14
-0x85 0x39 0x20 0x46
+0x05 0x73 0x20 0x46
# CHECK: abs.s $f6,$f7
0x85 0x39 0x00 0x46
@@ -9,8 +9,8 @@
# CHECK: add t1,a2,a3
0x20 0x48 0xc7 0x00
-# CHECK: add.d $f18,$f12,$f14
-0x40 0x32 0x27 0x46
+# CHECK: add.d $8,$f12,$f14
+0x00 0x62 0x2e 0x46
# CHECK: add.s $f9,$f6,$f7
0x40 0x32 0x07 0x46
@@ -61,106 +61,106 @@
0x4c 0x01 0x26 0x15
# CHECK: c.eq.d $f12,$f14
-0x32 0x30 0x27 0x46
+0x32 0x60 0x2e 0x46
# CHECK: c.eq.s $f6,$f7
0x32 0x30 0x07 0x46
# CHECK: c.f.d $f12,$f14
-0x30 0x30 0x27 0x46
+0x30 0x60 0x2e 0x46
# CHECK: c.f.s $f6,$f7
0x30 0x30 0x07 0x46
# CHECK: c.le.d $f12,$f14
-0x3e 0x30 0x27 0x46
+0x3e 0x60 0x2e 0x46
# CHECK: c.le.s $f6,$f7
0x3e 0x30 0x07 0x46
# CHECK: c.lt.d $f12,$f14
-0x3c 0x30 0x27 0x46
+0x3c 0x60 0x2e 0x46
# CHECK: c.lt.s $f6,$f7
0x3c 0x30 0x07 0x46
# CHECK: c.nge.d $f12,$f14
-0x3d 0x30 0x27 0x46
+0x3d 0x60 0x2e 0x46
# CHECK: c.nge.s $f6,$f7
0x3d 0x30 0x07 0x46
# CHECK: c.ngl.d $f12,$f14
-0x3b 0x30 0x27 0x46
+0x3b 0x60 0x2e 0x46
# CHECK: c.ngl.s $f6,$f7
0x3b 0x30 0x07 0x46
# CHECK: c.ngle.d $f12,$f14
-0x39 0x30 0x27 0x46
+0x39 0x60 0x2e 0x46
# CHECK: c.ngle.s $f6,$f7
0x39 0x30 0x07 0x46
# CHECK: c.ngt.d $f12,$f14
-0x3f 0x30 0x27 0x46
+0x3f 0x60 0x2e 0x46
# CHECK: c.ngt.s $f6,$f7
0x3f 0x30 0x07 0x46
# CHECK: c.ole.d $f12,$f14
-0x36 0x30 0x27 0x46
+0x36 0x60 0x2e 0x46
# CHECK: c.ole.s $f6,$f7
0x36 0x30 0x07 0x46
# CHECK: c.olt.d $f12,$f14
-0x34 0x30 0x27 0x46
+0x34 0x60 0x2e 0x46
# CHECK: c.olt.s $f6,$f7
0x34 0x30 0x07 0x46
# CHECK: c.seq.d $f12,$f14
-0x3a 0x30 0x27 0x46
+0x3a 0x60 0x2e 0x46
# CHECK: c.seq.s $f6,$f7
0x3a 0x30 0x07 0x46
# CHECK: c.sf.d $f12,$f14
-0x38 0x30 0x27 0x46
+0x38 0x60 0x2e 0x46
# CHECK: c.sf.s $f6,$f7
0x38 0x30 0x07 0x46
# CHECK: c.ueq.d $f12,$f14
-0x33 0x30 0x27 0x46
+0x33 0x60 0x2e 0x46
# CHECK: c.ueq.s $f28,$f18
0x33 0xe0 0x12 0x46
# CHECK: c.ule.d $f12,$f14
-0x37 0x30 0x27 0x46
+0x37 0x60 0x2e 0x46
# CHECK: c.ule.s $f6,$f7
0x37 0x30 0x07 0x46
# CHECK: c.ult.d $f12,$f14
-0x35 0x30 0x27 0x46
+0x35 0x60 0x2e 0x46
# CHECK: c.ult.s $f6,$f7
0x35 0x30 0x07 0x46
# CHECK: c.un.d $f12,$f14
-0x31 0x30 0x27 0x46
+0x31 0x60 0x2e 0x46
# CHECK: c.un.s $f6,$f7
0x31 0x30 0x07 0x46
# CHECK: ceil.w.d $f12,$f14
-0x8e 0x38 0x20 0x46
+0x0e 0x73 0x20 0x46
# CHECK: ceil.w.s $f6,$f7
-0x8e 0x38 0x00 0x46
+0x0e 0x73 0x20 0x46
# CHECK: cfc1 a2,$7
0x00 0x38 0x46 0x44
@@ -178,28 +178,22 @@
0xa1 0x39 0x00 0x46
# CHECK: cvt.d.w $f12,$f14
-0xa1 0x39 0x80 0x46
-
-# CHECK: cvt.l.d $f12,$f14
-0xa5 0x39 0x20 0x46
-
-# CHECK: cvt.l.s $f6,$f7
-0xa5 0x39 0x00 0x46
+0x21 0x73 0x80 0x46
# CHECK: cvt.s.d $f12,$f14
-0xa0 0x39 0x20 0x46
+0x20 0x73 0x20 0x46
# CHECK: cvt.s.w $f6,$f7
0xa0 0x39 0x80 0x46
# CHECK: cvt.w.d $f12,$f14
-0xa4 0x39 0x20 0x46
+0x24 0x73 0x20 0x46
# CHECK: cvt.w.s $f6,$f7
0xa4 0x39 0x00 0x46
# CHECK: floor.w.d $f12,$f14
-0x8f 0x39 0x20 0x46
+0x0f 0x73 0x20 0x46
# CHECK: floor.w.s $f6,$f7
0x8f 0x39 0x00 0x46
@@ -210,7 +204,7 @@
# CHECK: jal 00000530
0x4c 0x01 0x00 0x0c
-# CHECK: jalr a2,a3
+# CHECK: jalr a3
0x09 0xf8 0xe0 0x00
# CHECK: jr a3
@@ -249,6 +243,12 @@
# CHECK: lwc1 $f9,9158(a3)
0xc6 0x23 0xe9 0xc4
+# CHECK: lwl $v0, 3($a0)
+0x03 0x00 0x82 0x88
+
+# CHECK: lwr $v1,16($a1)
+0x10 0x00 0xa3 0x98
+
# CHECK: madd a2,a3
0x00 0x00 0xc7 0x70
@@ -264,8 +264,8 @@
# CHECK: mflo a1
0x12 0x28 0x00 0x00
-# CHECK: mov.d $f12,$f14
-0x86 0x39 0x20 0x46
+# CHECK: mov.d $f6,$f8
+0x86 0x41 0x20 0x46
# CHECK: mov.s $f6,$f7
0x86 0x39 0x00 0x46
@@ -288,11 +288,11 @@
# CHECK: mtlo a3
0x13 0x00 0xe0 0x00
-# CHECK: mul.d $f9,$f12,$f14
-0x42 0x32 0x27 0x46
+# CHECK: mul.d $f8,$f12,$f14
+0x02 0x62 0x2e 0x46
# CHECK: mul.s $f9,$f6,$f7
-0x42 0x32 0x07 0x46
+0x02 0x62 0x07 0x46
# CHECK: mul t1,a2,a3
0x02 0x48 0xc7 0x70
@@ -304,7 +304,7 @@
0x19 0x00 0x65 0x00
# CHECK: neg.d $f12,$f14
-0x87 0x39 0x20 0x46
+0x07 0x73 0x20 0x46
# CHECK: neg.s $f6,$f7
0x87 0x39 0x00 0x46
@@ -331,7 +331,7 @@
0x3b 0xe8 0x06 0x7c
# CHECK: round.w.d $f12,$f14
-0x8c 0x39 0x20 0x46
+0x0c 0x73 0x20 0x46
# CHECK: round.w.s $f6,$f7
0x8c 0x39 0x00 0x46
@@ -370,7 +370,7 @@
0x2b 0x18 0x65 0x00
# CHECK: sqrt.d $f12,$f14
-0x84 0x39 0x20 0x46
+0x04 0x73 0x20 0x46
# CHECK: sqrt.s $f6,$f7
0x84 0x39 0x00 0x46
@@ -390,8 +390,8 @@
# CHECK: srlv v0,v1,a1
0x06 0x10 0xa3 0x00
-# CHECK: sub.d $f9,$f12,$f14
-0x41 0x32 0x27 0x46
+# CHECK: sub.d $f8,$f12,$f14
+0x01 0x62 0x2e 0x46
# CHECK: sub.s $f9,$f6,$f7
0x41 0x32 0x07 0x46
@@ -408,11 +408,17 @@
# CHECK: swc1 $f9,9158(a3)
0xc6 0x23 0xe9 0xe4
+# CHECK: swl $a0, 16($a1)
+0x10 0x00 0xa4 0xa8
+
+# CHECK: swr $a2, 16($a3)
+0x10 0x00 0xe6 0xb8
+
# CHECK: sync 0x7
0xcf 0x01 0x00 0x00
# CHECK: trunc.w.d $f12,$f14
-0x8d 0x39 0x20 0x46
+0x0d 0x73 0x20 0x46
# CHECK: trunc.w.s $f6,$f7
0x8d 0x39 0x00 0x46
diff --git a/test/MC/Disassembler/Mips/mips32r2.txt b/test/MC/Disassembler/Mips/mips32r2.txt
index 295ffd0..3bf2493 100644
--- a/test/MC/Disassembler/Mips/mips32r2.txt
+++ b/test/MC/Disassembler/Mips/mips32r2.txt
@@ -1,7 +1,7 @@
# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips32r2
# CHECK: abs.d $f12,$f14
-0x46 0x20 0x39 0x85
+0x46 0x20 0x73 0x05
# CHECK: abs.s $f6,$f7
0x46 0x00 0x39 0x85
@@ -9,8 +9,8 @@
# CHECK: add t1,a2,a3
0x00 0xc7 0x48 0x20
-# CHECK: add.d $f18,$f12,$f14
-0x46 0x27 0x32 0x40
+# CHECK: add.d $f8,$f12,$f14
+0x46 0x2e 0x62 0x00
# CHECK: add.s $f9,$f6,$f7
0x46 0x07 0x32 0x40
@@ -61,103 +61,103 @@
0x15 0x26 0x01 0x4c
# CHECK: c.eq.d $f12,$f14
-0x46 0x27 0x30 0x32
+0x46 0x2e 0x60 0x32
# CHECK: c.eq.s $f6,$f7
0x46 0x07 0x30 0x32
# CHECK: c.f.d $f12,$f14
-0x46 0x27 0x30 0x30
+0x46 0x2e 0x60 0x30
# CHECK: c.f.s $f6,$f7
0x46 0x07 0x30 0x30
# CHECK: c.le.d $f12,$f14
-0x46 0x27 0x30 0x3e
+0x46 0x2e 0x60 0x3e
# CHECK: c.le.s $f6,$f7
0x46 0x07 0x30 0x3e
# CHECK: c.lt.d $f12,$f14
-0x46 0x27 0x30 0x3c
+0x46 0x2e 0x60 0x3c
# CHECK: c.lt.s $f6,$f7
0x46 0x07 0x30 0x3c
# CHECK: c.nge.d $f12,$f14
-0x46 0x27 0x30 0x3d
+0x46 0x2e 0x60 0x3d
# CHECK: c.nge.s $f6,$f7
0x46 0x07 0x30 0x3d
# CHECK: c.ngl.d $f12,$f14
-0x46 0x27 0x30 0x3b
+0x46 0x2e 0x60 0x3b
# CHECK: c.ngl.s $f6,$f7
0x46 0x07 0x30 0x3b
# CHECK: c.ngle.d $f12,$f14
-0x46 0x27 0x30 0x39
+0x46 0x2e 0x60 0x39
# CHECK: c.ngle.s $f6,$f7
0x46 0x07 0x30 0x39
# CHECK: c.ngt.d $f12,$f14
-0x46 0x27 0x30 0x3f
+0x46 0x2e 0x60 0x3f
# CHECK: c.ngt.s $f6,$f7
0x46 0x07 0x30 0x3f
# CHECK: c.ole.d $f12,$f14
-0x46 0x27 0x30 0x36
+0x46 0x2e 0x60 0x36
# CHECK: c.ole.s $f6,$f7
0x46 0x07 0x30 0x36
# CHECK: c.olt.d $f12,$f14
-0x46 0x27 0x30 0x34
+0x46 0x2e 0x60 0x34
# CHECK: c.olt.s $f6,$f7
0x46 0x07 0x30 0x34
# CHECK: c.seq.d $f12,$f14
-0x46 0x27 0x30 0x3a
+0x46 0x2e 0x60 0x3a
# CHECK: c.seq.s $f6,$f7
0x46 0x07 0x30 0x3a
# CHECK: c.sf.d $f12,$f14
-0x46 0x27 0x30 0x38
+0x46 0x2e 0x60 0x38
# CHECK: c.sf.s $f6,$f7
0x46 0x07 0x30 0x38
# CHECK: c.ueq.d $f12,$f14
-0x46 0x27 0x30 0x33
+0x46 0x2e 0x60 0x33
# CHECK: c.ueq.s $f28,$f18
0x46 0x12 0xe0 0x33
# CHECK: c.ule.d $f12,$f14
-0x46 0x27 0x30 0x37
+0x46 0x2e 0x60 0x37
# CHECK: c.ule.s $f6,$f7
0x46 0x07 0x30 0x37
# CHECK: c.ult.d $f12,$f14
-0x46 0x27 0x30 0x35
+0x46 0x2e 0x60 0x35
# CHECK: c.ult.s $f6,$f7
0x46 0x07 0x30 0x35
# CHECK: c.un.d $f12,$f14
-0x46 0x27 0x30 0x31
+0x46 0x2e 0x60 0x31
# CHECK: c.un.s $f6,$f7
0x46 0x07 0x30 0x31
# CHECK: ceil.w.d $f12,$f14
-0x46 0x20 0x39 0x8e
+0x46 0x20 0x73 0x0e
# CHECK: ceil.w.s $f6,$f7
0x46 0x00 0x39 0x8e
@@ -175,31 +175,31 @@
0x44 0xc6 0x38 0x00
# CHECK: cvt.d.s $f6,$f7
-0x46 0x00 0x38 0xa1
+0x46 0x00 0x39 0xa1
# CHECK: cvt.d.w $f12,$f14
-0x46 0x80 0x38 0xa1
+0x46 0x80 0x73 0x21
# CHECK: cvt.l.d $f12,$f14
-0x46 0x20 0x39 0xa5
+0x46 0x20 0x73 0x05
# CHECK: cvt.l.s $f6,$f7
0x46 0x00 0x39 0xa5
# CHECK: cvt.s.d $f12,$f14
-0x46 0x20 0x39 0xa0
+0x46 0x20 0x73 0x20
# CHECK: cvt.s.w $f6,$f7
0x46 0x80 0x39 0xa0
# CHECK: cvt.w.d $f12,$f14
-0x46 0x20 0x39 0xa4
+0x46 0x20 0x73 0x24
# CHECK: cvt.w.s $f6,$f7
0x46 0x00 0x39 0xa4
# CHECK: floor.w.d $f12,$f14
-0x46 0x20 0x39 0x8f
+0x46 0x20 0x73 0x0f
# CHECK: floor.w.s $f6,$f7
0x46 0x00 0x39 0x8f
@@ -264,8 +264,8 @@
# CHECK: mflo a1
0x00 0x00 0x28 0x12
-# CHECK: mov.d $f6,$f7
-0x46 0x20 0x39 0x86
+# CHECK: mov.d $f6,$f8
+0x46 0x20 0x41 0x86
# CHECK: mov.s $f6,$f7
0x46 0x00 0x39 0x86
@@ -288,8 +288,8 @@
# CHECK: mtlo a3
0x00 0xe0 0x00 0x13
-# CHECK: mul.d $f9,$f12,$f14
-0x46 0x27 0x32 0x42
+# CHECK: mul.d $f8,$f12,$f14
+0x46 0x2e 0x62 0x02
# CHECK: mul.s $f9,$f6,$f7
0x46 0x07 0x32 0x42
@@ -304,7 +304,7 @@
0x00 0x65 0x00 0x19
# CHECK: neg.d $f12,$f14
-0x46 0x20 0x39 0x87
+0x46 0x20 0x73 0x07
# CHECK: neg.s $f6,$f7
0x46 0x00 0x39 0x87
@@ -336,8 +336,8 @@
# CHECK: rorv t1,a2,a3
0x00 0xe6 0x48 0x46
-# CHECK: round.w.d $f12,$f14
-0x46 0x20 0x39 0x8c
+# CHECK: round.w.d $f6,$f14
+0x46 0x20 0x73 0x0c
# CHECK: round.w.s $f6,$f7
0x46 0x00 0x39 0x8c
@@ -382,7 +382,7 @@
0x00 0x65 0x18 0x2b
# CHECK: sqrt.d $f12,$f14
-0x46 0x20 0x39 0x84
+0x46 0x20 0x73 0x04
# CHECK: sqrt.s $f6,$f7
0x46 0x00 0x39 0x84
@@ -402,8 +402,8 @@
# CHECK: srlv v0,v1,a1
0x00 0xa3 0x10 0x06
-# CHECK: sub.d $f9,$f12,$f14
-0x46 0x27 0x32 0x41
+# CHECK: sub.d $f8,$f12,$f14
+0x46 0x2e 0x62 0x01
# CHECK: sub.s $f9,$f6,$f7
0x46 0x07 0x32 0x41
@@ -424,7 +424,7 @@
0x00 0x00 0x01 0xcf
# CHECK: trunc.w.d $f12,$f14
-0x46 0x20 0x39 0x8d
+0x46 0x20 0x73 0x0d
# CHECK: trunc.w.s $f6,$f7
0x46 0x00 0x39 0x8d
diff --git a/test/MC/Disassembler/Mips/mips32r2_le.txt b/test/MC/Disassembler/Mips/mips32r2_le.txt
index 6d8be79..84eb3e0 100644
--- a/test/MC/Disassembler/Mips/mips32r2_le.txt
+++ b/test/MC/Disassembler/Mips/mips32r2_le.txt
@@ -1,7 +1,7 @@
# RUN: llvm-mc --disassemble %s -triple=mipsel-unknown-linux -mcpu=mips32r2
# CHECK: abs.d $f12,$f14
-0x85 0x39 0x20 0x46
+0x05 0x73 0x20 0x46
# CHECK: abs.s $f6,$f7
0x85 0x39 0x00 0x46
@@ -9,8 +9,8 @@
# CHECK: add t1,a2,a3
0x20 0x48 0xc7 0x00
-# CHECK: add.d $f18,$f12,$f14
-0x40 0x32 0x27 0x46
+# CHECK: add.d $8,$f12,$f14
+0x00 0x62 0x2e 0x46
# CHECK: add.s $f9,$f6,$f7
0x40 0x32 0x07 0x46
@@ -61,106 +61,106 @@
0x4c 0x01 0x26 0x15
# CHECK: c.eq.d $f12,$f14
-0x32 0x30 0x27 0x46
+0x32 0x60 0x2e 0x46
# CHECK: c.eq.s $f6,$f7
0x32 0x30 0x07 0x46
# CHECK: c.f.d $f12,$f14
-0x30 0x30 0x27 0x46
+0x30 0x60 0x2e 0x46
# CHECK: c.f.s $f6,$f7
0x30 0x30 0x07 0x46
# CHECK: c.le.d $f12,$f14
-0x3e 0x30 0x27 0x46
+0x3e 0x60 0x2e 0x46
# CHECK: c.le.s $f6,$f7
0x3e 0x30 0x07 0x46
# CHECK: c.lt.d $f12,$f14
-0x3c 0x30 0x27 0x46
+0x3c 0x60 0x2e 0x46
# CHECK: c.lt.s $f6,$f7
0x3c 0x30 0x07 0x46
# CHECK: c.nge.d $f12,$f14
-0x3d 0x30 0x27 0x46
+0x3d 0x60 0x2e 0x46
# CHECK: c.nge.s $f6,$f7
0x3d 0x30 0x07 0x46
# CHECK: c.ngl.d $f12,$f14
-0x3b 0x30 0x27 0x46
+0x3b 0x60 0x2e 0x46
# CHECK: c.ngl.s $f6,$f7
0x3b 0x30 0x07 0x46
# CHECK: c.ngle.d $f12,$f14
-0x39 0x30 0x27 0x46
+0x39 0x60 0x2e 0x46
# CHECK: c.ngle.s $f6,$f7
0x39 0x30 0x07 0x46
# CHECK: c.ngt.d $f12,$f14
-0x3f 0x30 0x27 0x46
+0x3f 0x60 0x2e 0x46
# CHECK: c.ngt.s $f6,$f7
0x3f 0x30 0x07 0x46
# CHECK: c.ole.d $f12,$f14
-0x36 0x30 0x27 0x46
+0x36 0x60 0x2e 0x46
# CHECK: c.ole.s $f6,$f7
0x36 0x30 0x07 0x46
# CHECK: c.olt.d $f12,$f14
-0x34 0x30 0x27 0x46
+0x34 0x60 0x2e 0x46
# CHECK: c.olt.s $f6,$f7
0x34 0x30 0x07 0x46
# CHECK: c.seq.d $f12,$f14
-0x3a 0x30 0x27 0x46
+0x3a 0x60 0x2e 0x46
# CHECK: c.seq.s $f6,$f7
0x3a 0x30 0x07 0x46
# CHECK: c.sf.d $f12,$f14
-0x38 0x30 0x27 0x46
+0x38 0x60 0x2e 0x46
# CHECK: c.sf.s $f6,$f7
0x38 0x30 0x07 0x46
# CHECK: c.ueq.d $f12,$f14
-0x33 0x30 0x27 0x46
+0x33 0x60 0x2e 0x46
# CHECK: c.ueq.s $f28,$f18
0x33 0xe0 0x12 0x46
# CHECK: c.ule.d $f12,$f14
-0x37 0x30 0x27 0x46
+0x37 0x60 0x2e 0x46
# CHECK: c.ule.s $f6,$f7
0x37 0x30 0x07 0x46
# CHECK: c.ult.d $f12,$f14
-0x35 0x30 0x27 0x46
+0x35 0x60 0x2e 0x46
# CHECK: c.ult.s $f6,$f7
0x35 0x30 0x07 0x46
# CHECK: c.un.d $f12,$f14
-0x31 0x30 0x27 0x46
+0x31 0x60 0x2e 0x46
# CHECK: c.un.s $f6,$f7
0x31 0x30 0x07 0x46
# CHECK: ceil.w.d $f12,$f14
-0x8e 0x38 0x20 0x46
+0x0e 0x73 0x20 0x46
# CHECK: ceil.w.s $f6,$f7
-0x8e 0x38 0x00 0x46
+0x0e 0x73 0x20 0x46
# CHECK: cfc1 a2,$7
0x00 0x38 0x46 0x44
@@ -178,28 +178,28 @@
0xa1 0x39 0x00 0x46
# CHECK: cvt.d.w $f12,$f14
-0xa1 0x39 0x80 0x46
+0x21 0x73 0x80 0x46
# CHECK: cvt.l.d $f12,$f14
-0xa5 0x39 0x20 0x46
+0x05 0x73 0x20 0x46
# CHECK: cvt.l.s $f6,$f7
0xa5 0x39 0x00 0x46
# CHECK: cvt.s.d $f12,$f14
-0xa0 0x39 0x20 0x46
+0x20 0x73 0x20 0x46
# CHECK: cvt.s.w $f6,$f7
0xa0 0x39 0x80 0x46
# CHECK: cvt.w.d $f12,$f14
-0xa4 0x39 0x20 0x46
+0x24 0x73 0x20 0x46
# CHECK: cvt.w.s $f6,$f7
0xa4 0x39 0x00 0x46
# CHECK: floor.w.d $f12,$f14
-0x8f 0x39 0x20 0x46
+0x0f 0x73 0x20 0x46
# CHECK: floor.w.s $f6,$f7
0x8f 0x39 0x00 0x46
@@ -213,7 +213,7 @@
# CHECK: jal 00000530
0x4c 0x01 0x00 0x0c
-# CHECK: jalr a2,a3
+# CHECK: jalr a3
0x09 0xf8 0xe0 0x00
# CHECK: jr a3
@@ -267,8 +267,8 @@
# CHECK: mflo a1
0x12 0x28 0x00 0x00
-# CHECK: mov.d $f12,$f14
-0x86 0x39 0x20 0x46
+# CHECK: mov.d $f6,$f8
+0x86 0x41 0x20 0x46
# CHECK: mov.s $f6,$f7
0x86 0x39 0x00 0x46
@@ -291,11 +291,11 @@
# CHECK: mtlo a3
0x13 0x00 0xe0 0x00
-# CHECK: mul.d $f9,$f12,$f14
-0x42 0x32 0x27 0x46
+# CHECK: mul.d $f8,$f12,$f14
+0x02 0x62 0x2e 0x46
# CHECK: mul.s $f9,$f6,$f7
-0x42 0x32 0x07 0x46
+0x02 0x62 0x07 0x46
# CHECK: mul t1,a2,a3
0x02 0x48 0xc7 0x70
@@ -307,7 +307,7 @@
0x19 0x00 0x65 0x00
# CHECK: neg.d $f12,$f14
-0x87 0x39 0x20 0x46
+0x07 0x73 0x20 0x46
# CHECK: neg.s $f6,$f7
0x87 0x39 0x00 0x46
@@ -340,7 +340,7 @@
0x46 0x48 0xe6 0x00
# CHECK: round.w.d $f12,$f14
-0x8c 0x39 0x20 0x46
+0x0c 0x73 0x20 0x46
# CHECK: round.w.s $f6,$f7
0x8c 0x39 0x00 0x46
@@ -385,7 +385,7 @@
0x2b 0x18 0x65 0x00
# CHECK: sqrt.d $f12,$f14
-0x84 0x39 0x20 0x46
+0x04 0x73 0x20 0x46
# CHECK: sqrt.s $f6,$f7
0x84 0x39 0x00 0x46
@@ -405,8 +405,8 @@
# CHECK: srlv v0,v1,a1
0x06 0x10 0xa3 0x00
-# CHECK: sub.d $f9,$f12,$f14
-0x41 0x32 0x27 0x46
+# CHECK: sub.d $f8,$f12,$f14
+0x01 0x62 0x2e 0x46
# CHECK: sub.s $f9,$f6,$f7
0x41 0x32 0x07 0x46
@@ -427,7 +427,7 @@
0xcf 0x01 0x00 0x00
# CHECK: trunc.w.d $f12,$f14
-0x8d 0x39 0x20 0x46
+0x0d 0x73 0x20 0x46
# CHECK: trunc.w.s $f6,$f7
0x8d 0x39 0x00 0x46