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| author | Vladimir Medic <Vladimir.Medic@imgtec.com> | 2013-11-13 09:48:53 +0000 |
|---|---|---|
| committer | Vladimir Medic <Vladimir.Medic@imgtec.com> | 2013-11-13 09:48:53 +0000 |
| commit | c7ebe502765fecc2af047ced115845936e8ed58e (patch) | |
| tree | 4c28c3bd41cf13e71ca298a25d9b622af7383a5f /test/MC | |
| parent | d3df4603d90cd86ef9d3136fc3d111a575d211a3 (diff) | |
| download | external_llvm-c7ebe502765fecc2af047ced115845936e8ed58e.zip external_llvm-c7ebe502765fecc2af047ced115845936e8ed58e.tar.gz external_llvm-c7ebe502765fecc2af047ced115845936e8ed58e.tar.bz2 | |
This patch fixes a bug in floating point operands parsing, when instruction alias uses default register operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194562 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC')
| -rw-r--r-- | test/MC/Mips/mips-fpu-instructions.s | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/test/MC/Mips/mips-fpu-instructions.s b/test/MC/Mips/mips-fpu-instructions.s index be0a900..bfaef9e 100644 --- a/test/MC/Mips/mips-fpu-instructions.s +++ b/test/MC/Mips/mips-fpu-instructions.s @@ -138,6 +138,8 @@ #------------------------------------------------------------------------------ # FP move instructions #------------------------------------------------------------------------------ +# CHECK: bc1f $BB_1 # encoding: [A,A,0x00,0x45] +# CHECK: # fixup A - offset: 0, value: ($BB_1), kind: fixup_Mips_PC16 # CHECK: cfc1 $6, $0 # encoding: [0x00,0x00,0x46,0x44] # CHECK: ctc1 $10, $31 # encoding: [0x00,0xf8,0xca,0x44] @@ -173,7 +175,7 @@ # CHECK: sdc2 $4, 16($sp) # encoding: [0x10,0x00,0xa4,0xfb] # CHECK: lwc2 $11, 12($ra) # encoding: [0x0c,0x00,0xeb,0xcb] # CHECK: ldc2 $11, 12($ra) # encoding: [0x0c,0x00,0xeb,0xdb] - + bc1f $fcc0, $BB_1 cfc1 $a2,$0 ctc1 $10,$31 mfc1 $a2,$f7 |