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authorNico Rieck <nico.rieck@gmail.com>2013-04-14 21:18:36 +0000
committerNico Rieck <nico.rieck@gmail.com>2013-04-14 21:18:36 +0000
commitef1762b6a1d3353790bdb415788e7d8963e70372 (patch)
tree72fd4a6b39480b461fe47d6ffe6b78f9671afc1d /test/MC
parent024d943bca85ee0b6bc1b9e5f13ec5276f16c13d (diff)
downloadexternal_llvm-ef1762b6a1d3353790bdb415788e7d8963e70372.zip
external_llvm-ef1762b6a1d3353790bdb415788e7d8963e70372.tar.gz
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Use object file specific section type for initial text section
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179494 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC')
-rw-r--r--test/MC/Disassembler/Mips/mips32.txt1
-rw-r--r--test/MC/Disassembler/Mips/mips32_le.txt1
-rw-r--r--test/MC/Disassembler/Mips/mips32r2.txt1
-rw-r--r--test/MC/Disassembler/Mips/mips32r2_le.txt1
-rw-r--r--test/MC/Disassembler/Mips/mips64.txt1
-rw-r--r--test/MC/Disassembler/Mips/mips64_le.txt1
-rw-r--r--test/MC/Disassembler/Mips/mips64r2.txt1
-rw-r--r--test/MC/Disassembler/Mips/mips64r2_le.txt1
-rw-r--r--test/MC/Disassembler/XCore/xcore.txt1
-rw-r--r--test/MC/Mips/mips-alu-instructions.s1
-rw-r--r--test/MC/Mips/mips-expansions.s1
-rw-r--r--test/MC/Mips/mips-fpu-instructions.s1
-rw-r--r--test/MC/Mips/mips-jump-instructions.s1
-rw-r--r--test/MC/Mips/mips-memory-instructions.s1
-rw-r--r--test/MC/Mips/mips-relocations.s1
-rw-r--r--test/MC/Mips/mips64-alu-instructions.s1
-rw-r--r--test/MC/Mips/nabi-regs.s1
-rw-r--r--test/MC/Mips/set-at-directive.s1
18 files changed, 0 insertions, 18 deletions
diff --git a/test/MC/Disassembler/Mips/mips32.txt b/test/MC/Disassembler/Mips/mips32.txt
index 7022486..ef8bf71 100644
--- a/test/MC/Disassembler/Mips/mips32.txt
+++ b/test/MC/Disassembler/Mips/mips32.txt
@@ -1,5 +1,4 @@
# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux | FileCheck %s
-# CHECK: .section __TEXT,__text,regular,pure_instructions
# CHECK: abs.d $f12, $f14
0x46 0x20 0x73 0x05
diff --git a/test/MC/Disassembler/Mips/mips32_le.txt b/test/MC/Disassembler/Mips/mips32_le.txt
index 48fa8e2..a0885a4 100644
--- a/test/MC/Disassembler/Mips/mips32_le.txt
+++ b/test/MC/Disassembler/Mips/mips32_le.txt
@@ -1,5 +1,4 @@
# RUN: llvm-mc --disassemble %s -triple=mipsel-unknown-linux | FileCheck %s
-# CHECK: .section __TEXT,__text,regular,pure_instructions
# CHECK: abs.d $f12, $f14
0x05 0x73 0x20 0x46
diff --git a/test/MC/Disassembler/Mips/mips32r2.txt b/test/MC/Disassembler/Mips/mips32r2.txt
index 3b70db3..991eaa6 100644
--- a/test/MC/Disassembler/Mips/mips32r2.txt
+++ b/test/MC/Disassembler/Mips/mips32r2.txt
@@ -1,5 +1,4 @@
# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips32r2 | FileCheck %s
-# CHECK: .section __TEXT,__text,regular,pure_instructions
# CHECK: abs.d $f12, $f14
0x46 0x20 0x73 0x05
diff --git a/test/MC/Disassembler/Mips/mips32r2_le.txt b/test/MC/Disassembler/Mips/mips32r2_le.txt
index ecfde7a..10c2938 100644
--- a/test/MC/Disassembler/Mips/mips32r2_le.txt
+++ b/test/MC/Disassembler/Mips/mips32r2_le.txt
@@ -1,5 +1,4 @@
# RUN: llvm-mc --disassemble %s -triple=mipsel-unknown-linux -mcpu=mips32r2 | FileCheck %s
-# CHECK: .section __TEXT,__text,regular,pure_instructions
# CHECK: abs.d $f12, $f14
0x05 0x73 0x20 0x46
diff --git a/test/MC/Disassembler/Mips/mips64.txt b/test/MC/Disassembler/Mips/mips64.txt
index 38b1377..b887473 100644
--- a/test/MC/Disassembler/Mips/mips64.txt
+++ b/test/MC/Disassembler/Mips/mips64.txt
@@ -1,5 +1,4 @@
# RUN: llvm-mc --disassemble %s -triple=mips64-unknown-linux | FileCheck %s
-# CHECK: .section __TEXT,__text,regular,pure_instructions
# CHECK: daddiu $11, $26, 31949
0x67 0x4b 0x7c 0xcd
diff --git a/test/MC/Disassembler/Mips/mips64_le.txt b/test/MC/Disassembler/Mips/mips64_le.txt
index a7ef0e4..ddc3c2b 100644
--- a/test/MC/Disassembler/Mips/mips64_le.txt
+++ b/test/MC/Disassembler/Mips/mips64_le.txt
@@ -1,5 +1,4 @@
# RUN: llvm-mc --disassemble %s -triple=mips64el-unknown-linux | FileCheck %s
-# CHECK: .section __TEXT,__text,regular,pure_instructions
# CHECK: daddiu $11, $26, 31949
0xcd 0x7c 0x4b 0x67
diff --git a/test/MC/Disassembler/Mips/mips64r2.txt b/test/MC/Disassembler/Mips/mips64r2.txt
index 0b421fc..cee6f3c 100644
--- a/test/MC/Disassembler/Mips/mips64r2.txt
+++ b/test/MC/Disassembler/Mips/mips64r2.txt
@@ -1,5 +1,4 @@
# RUN: llvm-mc --disassemble %s -triple=mips64-unknown-linux -mattr +mips64r2 | FileCheck %s
-# CHECK: .section __TEXT,__text,regular,pure_instructions
# CHECK: daddiu $11, $26, 31949
0x67 0x4b 0x7c 0xcd
diff --git a/test/MC/Disassembler/Mips/mips64r2_le.txt b/test/MC/Disassembler/Mips/mips64r2_le.txt
index c1d326f..82e4d6a 100644
--- a/test/MC/Disassembler/Mips/mips64r2_le.txt
+++ b/test/MC/Disassembler/Mips/mips64r2_le.txt
@@ -1,5 +1,4 @@
# RUN: llvm-mc --disassemble %s -triple=mips64el-unknown-linux -mattr +mips64r2 | FileCheck %s
-# CHECK: .section __TEXT,__text,regular,pure_instructions
# CHECK: daddiu $11, $26, 31949
0xcd 0x7c 0x4b 0x67
diff --git a/test/MC/Disassembler/XCore/xcore.txt b/test/MC/Disassembler/XCore/xcore.txt
index 99e54e9..d509aff 100644
--- a/test/MC/Disassembler/XCore/xcore.txt
+++ b/test/MC/Disassembler/XCore/xcore.txt
@@ -1,5 +1,4 @@
# RUN: llvm-mc --disassemble %s -triple=xcore-xmos-elf | FileCheck %s
-# CHECK: .section __TEXT,__text,regular,pure_instructions
# 0r instructions
diff --git a/test/MC/Mips/mips-alu-instructions.s b/test/MC/Mips/mips-alu-instructions.s
index 7384d19..586e88b 100644
--- a/test/MC/Mips/mips-alu-instructions.s
+++ b/test/MC/Mips/mips-alu-instructions.s
@@ -1,7 +1,6 @@
# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | FileCheck %s
# Check that the assembler can handle the documented syntax
# for arithmetic and logical instructions.
-# CHECK: .section __TEXT,__text,regular,pure_instructions
#------------------------------------------------------------------------------
# Logical instructions
#------------------------------------------------------------------------------
diff --git a/test/MC/Mips/mips-expansions.s b/test/MC/Mips/mips-expansions.s
index 3385fe1..1622965 100644
--- a/test/MC/Mips/mips-expansions.s
+++ b/test/MC/Mips/mips-expansions.s
@@ -1,7 +1,6 @@
# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | FileCheck %s
# Check that the assembler can handle the documented syntax
# for macro instructions
-# CHECK: .section __TEXT,__text,regular,pure_instructions
#------------------------------------------------------------------------------
# Load immediate instructions
#------------------------------------------------------------------------------
diff --git a/test/MC/Mips/mips-fpu-instructions.s b/test/MC/Mips/mips-fpu-instructions.s
index a126c6f..29dc471 100644
--- a/test/MC/Mips/mips-fpu-instructions.s
+++ b/test/MC/Mips/mips-fpu-instructions.s
@@ -1,7 +1,6 @@
# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | FileCheck %s
# Check that the assembler can handle the documented syntax
# for FPU instructions.
-# CHECK: .section __TEXT,__text,regular,pure_instructions
#------------------------------------------------------------------------------
# FP aritmetic instructions
#------------------------------------------------------------------------------
diff --git a/test/MC/Mips/mips-jump-instructions.s b/test/MC/Mips/mips-jump-instructions.s
index 1dcb287..3643c27 100644
--- a/test/MC/Mips/mips-jump-instructions.s
+++ b/test/MC/Mips/mips-jump-instructions.s
@@ -2,7 +2,6 @@
# RUN: FileCheck %s
# Check that the assembler can handle the documented syntax
# for jumps and branches.
-# CHECK: .section __TEXT,__text,regular,pure_instructions
#------------------------------------------------------------------------------
# Branch instructions
#------------------------------------------------------------------------------
diff --git a/test/MC/Mips/mips-memory-instructions.s b/test/MC/Mips/mips-memory-instructions.s
index b5f1267..c8b0559 100644
--- a/test/MC/Mips/mips-memory-instructions.s
+++ b/test/MC/Mips/mips-memory-instructions.s
@@ -1,7 +1,6 @@
# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | FileCheck %s
# Check that the assembler can handle the documented syntax
# for loads and stores.
-# CHECK: .section __TEXT,__text,regular,pure_instructions
#------------------------------------------------------------------------------
# Memory store instructions
#------------------------------------------------------------------------------
diff --git a/test/MC/Mips/mips-relocations.s b/test/MC/Mips/mips-relocations.s
index ff71c75..6f095d1 100644
--- a/test/MC/Mips/mips-relocations.s
+++ b/test/MC/Mips/mips-relocations.s
@@ -1,7 +1,6 @@
# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | FileCheck %s
# Check that the assembler can handle the documented syntax
# for relocations.
-# CHECK: .section __TEXT,__text,regular,pure_instructions
# CHECK: lui $2, %hi(_gp_disp) # encoding: [A,A,0x02,0x3c]
# CHECK: # fixup A - offset: 0, value: _gp_disp@ABS_HI, kind: fixup_Mips_HI16
# CHECK: addiu $2, $2, %lo(_gp_disp) # encoding: [A,A,0x42,0x24]
diff --git a/test/MC/Mips/mips64-alu-instructions.s b/test/MC/Mips/mips64-alu-instructions.s
index 1b4ebdf..04583f9 100644
--- a/test/MC/Mips/mips64-alu-instructions.s
+++ b/test/MC/Mips/mips64-alu-instructions.s
@@ -1,7 +1,6 @@
# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips64r2 | FileCheck %s
# Check that the assembler can handle the documented syntax
# for arithmetic and logical instructions.
-# CHECK: .section __TEXT,__text,regular,pure_instructions
#------------------------------------------------------------------------------
# Logical instructions
#------------------------------------------------------------------------------
diff --git a/test/MC/Mips/nabi-regs.s b/test/MC/Mips/nabi-regs.s
index 9371208..050fb81 100644
--- a/test/MC/Mips/nabi-regs.s
+++ b/test/MC/Mips/nabi-regs.s
@@ -8,7 +8,6 @@
# RUN: -mcpu=mips64r2 -arch=mips64 | \
# RUN: FileCheck %s
-# CHECK: .section __TEXT,__text,regular,pure_instructions
.text
foo:
diff --git a/test/MC/Mips/set-at-directive.s b/test/MC/Mips/set-at-directive.s
index 98a3a35..828175a 100644
--- a/test/MC/Mips/set-at-directive.s
+++ b/test/MC/Mips/set-at-directive.s
@@ -3,7 +3,6 @@
# Check that the assembler can handle the documented syntax
# for ".set at" and set the correct value.
-# CHECK: .section __TEXT,__text,regular,pure_instructions
.text
foo:
# CHECK: jr $1 # encoding: [0x08,0x00,0x20,0x00]