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authorDan Gohman <gohman@apple.com>2009-01-13 20:24:13 +0000
committerDan Gohman <gohman@apple.com>2009-01-13 20:24:13 +0000
commitbc0b56732a2d1dc22767e0f3930f22a76d99470a (patch)
treeca0c8659323b4d12946471be758a50bbd2d96735 /test/Transforms/GlobalDCE
parent6893cd76152e805291c3c9f36fa81b330846434d (diff)
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The list-td and list-tdrr schedulers don't yet support physreg
scheduling dependencies. Add assertion checks to help catch this. It appears the Mips target defaults to list-td, and it has a regression test that uses a physreg dependence. Such code was liable to be miscompiled, and now evokes an assertion failure. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62177 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/Transforms/GlobalDCE')
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