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author | Bill Wendling <isanbard@gmail.com> | 2013-12-08 00:17:29 +0000 |
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committer | Bill Wendling <isanbard@gmail.com> | 2013-12-08 00:17:29 +0000 |
commit | 2bdc0dd2db145591eb3fdc01fa0b2a3d831f334b (patch) | |
tree | 6f14746b9594fe4197c5fb35297b079867ede879 /test/Transforms | |
parent | 92fe16ec5863b65dfe495300e968ed8ddd10cf85 (diff) | |
download | external_llvm-2bdc0dd2db145591eb3fdc01fa0b2a3d831f334b.zip external_llvm-2bdc0dd2db145591eb3fdc01fa0b2a3d831f334b.tar.gz external_llvm-2bdc0dd2db145591eb3fdc01fa0b2a3d831f334b.tar.bz2 |
Merging r196588:
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r196588 | weimingz | 2013-12-06 09:56:48 -0800 (Fri, 06 Dec 2013) | 7 lines
Bug 18149: [AArch32] VSel instructions has no ARMCC field
The current peephole optimizing for compare inst assumes an instr that
uses CPSR has an MO for ARM Cond code.However, for VSEL instructions
(vseqeq, vselgt, vselgt, vselvs), there is no such operand nor do
they support the modification of Cond Code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196704 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/Transforms')
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