Rename PEXTR to PEXT. Add intrinsics for BMI instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142480 91177308-0d34-0410-b5e6-96231b3b80d8

4 files changed, 142 insertions, 15 deletions

diff --git a/test/CodeGen/X86/bmi.ll b/test/CodeGen/X86/bmi.ll
index 88c09e3..4b40d90 100644
--- a/test/CodeGen/X86/bmi.ll
+++ b/test/CodeGen/X86/bmi.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mattr=+bmi | FileCheck %s
+; RUN: llc < %s -march=x86-64 -mattr=+bmi,+bmi2 | FileCheck %s
 
 define i32 @t1(i32 %x) nounwind  {
        %tmp = tail call i32 @llvm.cttz.i32( i32 %x )
@@ -51,3 +51,130 @@ define i64 @andn64(i64 %x, i64 %y) nounwind readnone {
 ; CHECK: andn64:
 ; CHECK: andnq
 }
+
+define i32 @bextr32(i32 %x, i32 %y) nounwind readnone {
+  %tmp = tail call i32 @llvm.x86.bmi.bextr.32(i32 %x, i32 %y)
+  ret i32 %tmp
+; CHECK: bextr32:
+; CHECK: bextrl
+}
+
+declare i32 @llvm.x86.bmi.bextr.32(i32, i32) nounwind readnone
+
+define i64 @bextr64(i64 %x, i64 %y) nounwind readnone {
+  %tmp = tail call i64 @llvm.x86.bmi.bextr.64(i64 %x, i64 %y)
+  ret i64 %tmp
+; CHECK: bextr64:
+; CHECK: bextrq
+}
+
+declare i64 @llvm.x86.bmi.bextr.64(i64, i64) nounwind readnone
+
+define i32 @bzhi32(i32 %x, i32 %y) nounwind readnone {
+  %tmp = tail call i32 @llvm.x86.bmi.bzhi.32(i32 %x, i32 %y)
+  ret i32 %tmp
+; CHECK: bzhi32:
+; CHECK: bzhil
+}
+
+declare i32 @llvm.x86.bmi.bzhi.32(i32, i32) nounwind readnone
+
+define i64 @bzhi64(i64 %x, i64 %y) nounwind readnone {
+  %tmp = tail call i64 @llvm.x86.bmi.bzhi.64(i64 %x, i64 %y)
+  ret i64 %tmp
+; CHECK: bzhi64:
+; CHECK: bzhiq
+}
+
+declare i64 @llvm.x86.bmi.bzhi.64(i64, i64) nounwind readnone
+
+define i32 @blsi32(i32 %x) nounwind readnone {
+  %tmp = tail call i32 @llvm.x86.bmi.blsi.32(i32 %x)
+  ret i32 %tmp
+; CHECK: blsi32:
+; CHECK: blsil
+}
+
+declare i32 @llvm.x86.bmi.blsi.32(i32) nounwind readnone
+
+define i64 @blsi64(i64 %x) nounwind readnone {
+  %tmp = tail call i64 @llvm.x86.bmi.blsi.64(i64 %x)
+  ret i64 %tmp
+; CHECK: blsi64:
+; CHECK: blsiq
+}
+
+declare i64 @llvm.x86.bmi.blsi.64(i64) nounwind readnone
+
+define i32 @blsmsk32(i32 %x) nounwind readnone {
+  %tmp = tail call i32 @llvm.x86.bmi.blsmsk.32(i32 %x)
+  ret i32 %tmp
+; CHECK: blsmsk32:
+; CHECK: blsmskl
+}
+
+declare i32 @llvm.x86.bmi.blsmsk.32(i32) nounwind readnone
+
+define i64 @blsmsk64(i64 %x) nounwind readnone {
+  %tmp = tail call i64 @llvm.x86.bmi.blsmsk.64(i64 %x)
+  ret i64 %tmp
+; CHECK: blsmsk64:
+; CHECK: blsmskq
+}
+
+declare i64 @llvm.x86.bmi.blsmsk.64(i64) nounwind readnone
+
+define i32 @blsr32(i32 %x) nounwind readnone {
+  %tmp = tail call i32 @llvm.x86.bmi.blsr.32(i32 %x)
+  ret i32 %tmp
+; CHECK: blsr32:
+; CHECK: blsrl
+}
+
+declare i32 @llvm.x86.bmi.blsr.32(i32) nounwind readnone
+
+define i64 @blsr64(i64 %x) nounwind readnone {
+  %tmp = tail call i64 @llvm.x86.bmi.blsr.64(i64 %x)
+  ret i64 %tmp
+; CHECK: blsr64:
+; CHECK: blsrq
+}
+
+declare i64 @llvm.x86.bmi.blsr.64(i64) nounwind readnone
+
+define i32 @pdep32(i32 %x, i32 %y) nounwind readnone {
+  %tmp = tail call i32 @llvm.x86.bmi.pdep.32(i32 %x, i32 %y)
+  ret i32 %tmp
+; CHECK: pdep32:
+; CHECK: pdepl
+}
+
+declare i32 @llvm.x86.bmi.pdep.32(i32, i32) nounwind readnone
+
+define i64 @pdep64(i64 %x, i64 %y) nounwind readnone {
+  %tmp = tail call i64 @llvm.x86.bmi.pdep.64(i64 %x, i64 %y)
+  ret i64 %tmp
+; CHECK: pdep64:
+; CHECK: pdepq
+}
+
+declare i64 @llvm.x86.bmi.pdep.64(i64, i64) nounwind readnone
+
+define i32 @pext32(i32 %x, i32 %y) nounwind readnone {
+  %tmp = tail call i32 @llvm.x86.bmi.pext.32(i32 %x, i32 %y)
+  ret i32 %tmp
+; CHECK: pext32:
+; CHECK: pextl
+}
+
+declare i32 @llvm.x86.bmi.pext.32(i32, i32) nounwind readnone
+
+define i64 @pext64(i64 %x, i64 %y) nounwind readnone {
+  %tmp = tail call i64 @llvm.x86.bmi.pext.64(i64 %x, i64 %y)
+  ret i64 %tmp
+; CHECK: pext64:
+; CHECK: pextq
+}
+
+declare i64 @llvm.x86.bmi.pext.64(i64, i64) nounwind readnone
+
diff --git a/test/MC/Disassembler/X86/simple-tests.txt b/test/MC/Disassembler/X86/simple-tests.txt
index d540bfb..37cde91 100644
--- a/test/MC/Disassembler/X86/simple-tests.txt
+++ b/test/MC/Disassembler/X86/simple-tests.txt
@@ -564,16 +564,16 @@
 # CHECK: bzhiq %r12, %r11, %r10
 0xc4 0x42 0x98 0xf5 0xd3
 
-# CHECK: pextrl %r12d, %r11d, %r10d
+# CHECK: pextl %r12d, %r11d, %r10d
 0xc4 0x42 0x22 0xf5 0xd4
 
-# CHECK: pextrl (%rax), %r11d, %r10d
+# CHECK: pextl (%rax), %r11d, %r10d
 0xc4 0x62 0x22 0xf5 0x10
 
-# CHECK: pextrq %r12, %r11, %r10
+# CHECK: pextq %r12, %r11, %r10
 0xc4 0x42 0xa2 0xf5 0xd4
 
-# CHECK: pextrq (%rax), %r11, %r10
+# CHECK: pextq (%rax), %r11, %r10
 0xc4 0x62 0xa2 0xf5 0x10
 
 # CHECK: pdepl %r12d, %r11d, %r10d
diff --git a/test/MC/Disassembler/X86/x86-32.txt b/test/MC/Disassembler/X86/x86-32.txt
index d78232b..51901a5 100644
--- a/test/MC/Disassembler/X86/x86-32.txt
+++ b/test/MC/Disassembler/X86/x86-32.txt
@@ -520,10 +520,10 @@
 # CHECK: bzhil %esi, %ebx, %edx
 0xc4 0xe2 0x08 0xf5 0xd3
 
-# CHECK: pextrl %esp, %ecx, %edx
+# CHECK: pextl %esp, %ecx, %edx
 0xc4 0xe2 0x72 0xf5 0xd4
 
-# CHECK: pextrl (%eax), %ecx, %edx
+# CHECK: pextl (%eax), %ecx, %edx
 0xc4 0xe2 0x72 0xf5 0x10
 
 # CHECK: pdepl %esp, %ecx, %edx
diff --git a/test/MC/X86/x86_64-bmi-encoding.s b/test/MC/X86/x86_64-bmi-encoding.s
index 24acb01..005ded2 100644
--- a/test/MC/X86/x86_64-bmi-encoding.s
+++ b/test/MC/X86/x86_64-bmi-encoding.s
@@ -88,21 +88,21 @@
 // CHECK: encoding: [0xc4,0x42,0x98,0xf5,0xd3]
           bzhiq %r12, %r11, %r10
 
-// CHECK: pextrl %r12d, %r11d, %r10d
+// CHECK: pextl %r12d, %r11d, %r10d
 // CHECK: encoding: [0xc4,0x42,0x22,0xf5,0xd4]
-          pextrl %r12d, %r11d, %r10d
+          pextl %r12d, %r11d, %r10d
 
-// CHECK: pextrl (%rax), %r11d, %r10d
+// CHECK: pextl (%rax), %r11d, %r10d
 // CHECK: encoding: [0xc4,0x62,0x22,0xf5,0x10]
-          pextrl (%rax), %r11d, %r10d
+          pextl (%rax), %r11d, %r10d
 
-// CHECK: pextrq %r12, %r11, %r10
+// CHECK: pextq %r12, %r11, %r10
 // CHECK: encoding: [0xc4,0x42,0xa2,0xf5,0xd4]
-          pextrq %r12, %r11, %r10
+          pextq %r12, %r11, %r10
 
-// CHECK: pextrq (%rax), %r11, %r10
+// CHECK: pextq (%rax), %r11, %r10
 // CHECK: encoding: [0xc4,0x62,0xa2,0xf5,0x10]
-          pextrq (%rax), %r11, %r10
+          pextq (%rax), %r11, %r10
 
 // CHECK: pdepl %r12d, %r11d, %r10d
 // CHECK: encoding: [0xc4,0x42,0x23,0xf5,0xd4]