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author | Chris Lattner <sabre@nondot.org> | 2007-02-28 18:35:36 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2007-02-28 18:35:36 +0000 |
commit | 7e08570379646c1a4652fa67f030fc00c751b8fa (patch) | |
tree | fe958e05c8ece53d6cf15d2637dad0dda0dfc20a /test | |
parent | 70500805d5f5becb8ed57b26eacfc6ee5771f72c (diff) | |
download | external_llvm-7e08570379646c1a4652fa67f030fc00c751b8fa.zip external_llvm-7e08570379646c1a4652fa67f030fc00c751b8fa.tar.gz external_llvm-7e08570379646c1a4652fa67f030fc00c751b8fa.tar.bz2 |
fastcc -> fastcall
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34749 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r-- | test/CodeGen/X86/fast-cc-pass-in-regs.ll | 18 |
1 files changed, 8 insertions, 10 deletions
diff --git a/test/CodeGen/X86/fast-cc-pass-in-regs.ll b/test/CodeGen/X86/fast-cc-pass-in-regs.ll index ab6248e..721b2d8 100644 --- a/test/CodeGen/X86/fast-cc-pass-in-regs.ll +++ b/test/CodeGen/X86/fast-cc-pass-in-regs.ll @@ -1,16 +1,14 @@ -; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel -enable-x86-fastcc | grep 'mov EDX, 1' +; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | grep 'mov EDX, 1' ; check that fastcc is passing stuff in regs. -; Argument reg passing is disabled due to regalloc issues. FIXME! -; XFAIL: * +declare x86_fastcallcc i64 @callee(i64) -declare fastcc long %callee(long) - -long %caller() { - %X = call fastcc long %callee(long 4294967299) ;; (1ULL << 32) + 3 - ret long %X +define i64 @caller() { + %X = callx86_fastcallcc i64 @callee( i64 4294967299 ) ; <i64> [#uses=1] + ret i64 %X } -fastcc long %caller2(long %X) { - ret long %X +define x86_fastcallcc i64 @caller2(i64 %X) { + ret i64 %X } + |