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authorEvan Cheng <evan.cheng@apple.com>2009-10-22 06:48:32 +0000
committerEvan Cheng <evan.cheng@apple.com>2009-10-22 06:48:32 +0000
commit87689d3b7049ecfa41de24a310bac7365c2dbcde (patch)
tree93b4aa09851a4db76efa8ed5da96d9ea6cacdc8f /test
parentfaf93aa23390389375b8e52f0dd1c3727ed07ee8 (diff)
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Move if-conversion before post-regalloc scheduling so the predicated instruction get scheduled properly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84843 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r--test/CodeGen/ARM/ifcvt5.ll3
1 files changed, 2 insertions, 1 deletions
diff --git a/test/CodeGen/ARM/ifcvt5.ll b/test/CodeGen/ARM/ifcvt5.ll
index e9145ac..92bbe75 100644
--- a/test/CodeGen/ARM/ifcvt5.ll
+++ b/test/CodeGen/ARM/ifcvt5.ll
@@ -11,7 +11,8 @@ entry:
define void @t1(i32 %a, i32 %b) {
; CHECK: t1:
-; CHECK: ldmltfd sp!, {r7, pc}
+; CHECK: movge
+; CHECK: blge _foo
entry:
%tmp1 = icmp sgt i32 %a, 10 ; <i1> [#uses=1]
br i1 %tmp1, label %cond_true, label %UnifiedReturnBlock