diff options
Diffstat (limited to 'include/llvm/Target/Target.td')
| -rw-r--r-- | include/llvm/Target/Target.td | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/include/llvm/Target/Target.td b/include/llvm/Target/Target.td index 6c970d0..1ff8db8 100644 --- a/include/llvm/Target/Target.td +++ b/include/llvm/Target/Target.td @@ -207,6 +207,12 @@ class RegisterClass<string namespace, list<ValueType> regTypes, int alignment, // The function should return 0 to select the default order defined by // MemberList, 1 to select the first AltOrders entry and so on. code AltOrderSelect = [{}]; + + // Specify allocation priority for register allocators using a greedy + // heuristic. Classes with higher priority values are assigned first. This is + // useful as it is sometimes beneficial to assign registers to highly + // constrained classes first. The value has to be in the range [0,63]. + int AllocationPriority = 0; } // The memberList in a RegisterClass is a dag of set operations. TableGen @@ -1015,6 +1021,11 @@ class AsmWriter { // name. string AsmWriterClassName = "InstPrinter"; + // PassSubtarget - Determines whether MCSubtargetInfo should be passed to + // the various print methods. + // FIXME: Remove after all ports are updated. + int PassSubtarget = 0; + // Variant - AsmWriters can be of multiple different variants. Variants are // used to support targets that need to emit assembly code in ways that are // mostly the same for different targets, but have minor differences in |