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-rw-r--r--include/llvm/Target/TargetSubtargetInfo.h19
1 files changed, 0 insertions, 19 deletions
diff --git a/include/llvm/Target/TargetSubtargetInfo.h b/include/llvm/Target/TargetSubtargetInfo.h
index 0b294a3..8c6c695 100644
--- a/include/llvm/Target/TargetSubtargetInfo.h
+++ b/include/llvm/Target/TargetSubtargetInfo.h
@@ -14,7 +14,6 @@
#ifndef LLVM_TARGET_TARGETSUBTARGETINFO_H
#define LLVM_TARGET_TARGETSUBTARGETINFO_H
-#include "llvm/CodeGen/TargetSchedule.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/Support/CodeGen.h"
@@ -44,24 +43,6 @@ public:
virtual ~TargetSubtargetInfo();
- /// Initialize a copy of the scheduling model for this subtarget.
- /// TargetSchedModel provides the interface for the subtarget's
- /// instruction scheduling information.
- void initSchedModel(TargetSchedModel &SchedModel,
- const TargetInstrInfo *TII) const {
- // CPUSchedModel is initialized to a static instance by InitMCSubtargetInfo.
- SchedModel.init(*getSchedModel(), this, TII);
- }
-
- /// Resolve a SchedClass at runtime, where SchedClass identifies an
- /// MCSchedClassDesc with the isVariant property. This may return the ID of
- /// another variant SchedClass, but repeated invocation must quickly terminate
- /// in a nonvariant SchedClass.
- virtual unsigned resolveSchedClass(unsigned SchedClass, const MachineInstr *MI,
- const TargetSchedModel* SchedModel) const {
- return 0;
- }
-
/// getSpecialAddressLatency - For targets where it is beneficial to
/// backschedule instructions that compute addresses, return a value
/// indicating the number of scheduling cycles of backscheduling that