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-rw-r--r--lib/Target/R600/R600InstrInfo.cpp12
1 files changed, 1 insertions, 11 deletions
diff --git a/lib/Target/R600/R600InstrInfo.cpp b/lib/Target/R600/R600InstrInfo.cpp
index 812675a..2fd9300 100644
--- a/lib/Target/R600/R600InstrInfo.cpp
+++ b/lib/Target/R600/R600InstrInfo.cpp
@@ -150,23 +150,13 @@ bool R600InstrInfo::isLDSInstr(unsigned Opcode) const {
}
bool R600InstrInfo::isTransOnly(unsigned Opcode) const {
- if (ST.hasCaymanISA())
- return false;
- return (get(Opcode).getSchedClass() == AMDGPU::TransALU);
+ return (get(Opcode).TSFlags & R600_InstFlag::TRANS_ONLY);
}
bool R600InstrInfo::isTransOnly(const MachineInstr *MI) const {
return isTransOnly(MI->getOpcode());
}
-bool R600InstrInfo::isVectorOnly(unsigned Opcode) const {
- return (get(Opcode).getSchedClass() == AMDGPU::VecALU);
-}
-
-bool R600InstrInfo::isVectorOnly(const MachineInstr *MI) const {
- return isVectorOnly(MI->getOpcode());
-}
-
bool R600InstrInfo::usesVertexCache(unsigned Opcode) const {
return ST.hasVertexCache() && IS_VTX(get(Opcode));
}