diff options
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/CodeGen/LLVMTargetMachine.cpp | 10 | ||||
| -rw-r--r-- | lib/Transforms/Scalar/GVN.cpp | 2 |
2 files changed, 9 insertions, 3 deletions
diff --git a/lib/CodeGen/LLVMTargetMachine.cpp b/lib/CodeGen/LLVMTargetMachine.cpp index f29944c..7def8fa 100644 --- a/lib/CodeGen/LLVMTargetMachine.cpp +++ b/lib/CodeGen/LLVMTargetMachine.cpp @@ -38,6 +38,11 @@ static cl::opt<bool> PrintEmittedAsm("print-emitted-asm", cl::Hidden, static cl::opt<bool> PrintGCInfo("print-gc", cl::Hidden, cl::desc("Dump garbage collector data")); +// Hidden options to help debugging +static cl::opt<bool> +EnableSinking("enable-sinking", cl::init(false), cl::Hidden, + cl::desc("Perform sinking on machine code")); + // When this works it will be on by default. static cl::opt<bool> DisablePostRAScheduler("disable-post-RA-scheduler", @@ -178,10 +183,11 @@ bool LLVMTargetMachine::addCommonCodeGenPasses(PassManagerBase &PM, bool Fast) { if (PrintMachineCode) PM.add(createMachineFunctionPrinterPass(cerr)); - if (!Fast) { + if (!Fast) PM.add(createMachineLICMPass()); + + if (EnableSinking) PM.add(createMachineSinkingPass()); - } // Run pre-ra passes. if (addPreRegAlloc(PM, Fast) && PrintMachineCode) diff --git a/lib/Transforms/Scalar/GVN.cpp b/lib/Transforms/Scalar/GVN.cpp index 9c7f904..308264a 100644 --- a/lib/Transforms/Scalar/GVN.cpp +++ b/lib/Transforms/Scalar/GVN.cpp @@ -48,7 +48,7 @@ STATISTIC(NumPRELoad, "Number of loads PRE'd"); static cl::opt<bool> EnablePRE("enable-pre", cl::init(true), cl::Hidden); -cl::opt<bool> EnableLoadPRE("enable-load-pre"/*, cl::init(true)*/); +cl::opt<bool> EnableLoadPRE("enable-load-pre", cl::init(true)); //===----------------------------------------------------------------------===// // ValueTable Class |