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-rw-r--r--test/CodeGen/ARM/2006-11-10-CycleInDAG.ll20
-rw-r--r--test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll103
-rw-r--r--test/CodeGen/ARM/2007-01-31-RegInfoAssert.ll16
-rw-r--r--test/CodeGen/ARM/2007-02-02-JoinIntervalsCrash.ll27
-rw-r--r--test/CodeGen/ARM/2007-03-06-AddR7.ll117
-rw-r--r--test/CodeGen/ARM/2007-03-07-CombinerCrash.ll21
-rw-r--r--test/CodeGen/ARM/2007-03-13-InstrSched.ll48
-rw-r--r--test/CodeGen/ARM/2007-03-21-JoinIntervalsCrash.ll96
-rw-r--r--test/CodeGen/ARM/2007-03-26-RegScavengerAssert.ll947
-rw-r--r--test/CodeGen/ARM/2007-03-27-RegScavengerAssert.ll35
-rw-r--r--test/CodeGen/ARM/2007-03-30-RegScavengerAssert.ll101
-rw-r--r--test/CodeGen/ARM/2007-04-02-RegScavengerAssert.ll55
-rw-r--r--test/CodeGen/ARM/2007-04-03-PEIBug.ll12
-rw-r--r--test/CodeGen/ARM/2007-04-03-UndefinedSymbol.ll99
-rw-r--r--test/CodeGen/ARM/2007-04-30-CombinerCrash.ll32
-rw-r--r--test/CodeGen/ARM/2007-05-03-BadPostIndexedLd.ll113
-rw-r--r--test/CodeGen/ARM/2007-05-05-InvalidPushPop.ll41
-rw-r--r--test/CodeGen/ARM/2007-05-07-jumptoentry.ll58
-rw-r--r--test/CodeGen/ARM/2007-05-07-tailmerge-1.ll65
-rw-r--r--test/CodeGen/ARM/2007-05-09-tailmerge-2.ll66
-rw-r--r--test/CodeGen/ARM/2007-05-14-InlineAsmCstCrash.ll6
-rw-r--r--test/CodeGen/ARM/2007-05-14-RegScavengerAssert.ll30
-rw-r--r--test/CodeGen/ARM/2007-05-22-tailmerge-3.ll68
-rw-r--r--test/CodeGen/ARM/2007-05-23-BadPreIndexedStore.ll34
-rw-r--r--test/CodeGen/ARM/2007-05-31-RegScavengerInfiniteLoop.ll237
-rw-r--r--test/CodeGen/ARM/addrmode.ll15
-rw-r--r--test/CodeGen/ARM/aliases.ll32
-rw-r--r--test/CodeGen/ARM/align.ll16
-rw-r--r--test/CodeGen/ARM/alloca.ll13
-rw-r--r--test/CodeGen/ARM/argaddr.ll18
-rw-r--r--test/CodeGen/ARM/arguments.ll11
-rw-r--r--test/CodeGen/ARM/arm-asm.ll7
-rw-r--r--test/CodeGen/ARM/arm-negative-stride.ll20
-rw-r--r--test/CodeGen/ARM/bits.ll36
-rw-r--r--test/CodeGen/ARM/branch.ll57
-rw-r--r--test/CodeGen/ARM/bx_fold.ll30
-rw-r--r--test/CodeGen/ARM/call.ll18
-rw-r--r--test/CodeGen/ARM/call_nolink.ll52
-rw-r--r--test/CodeGen/ARM/clz.ll8
-rw-r--r--test/CodeGen/ARM/compare-call.ll20
-rw-r--r--test/CodeGen/ARM/constants.ll46
-rw-r--r--test/CodeGen/ARM/ctors_dtors.ll25
-rw-r--r--test/CodeGen/ARM/dg.exp5
-rw-r--r--test/CodeGen/ARM/div.ll29
-rw-r--r--test/CodeGen/ARM/dyn-stackalloc.ll60
-rw-r--r--test/CodeGen/ARM/extloadi1.ll22
-rw-r--r--test/CodeGen/ARM/fcopysign.ll18
-rw-r--r--test/CodeGen/ARM/fnmul.ll11
-rw-r--r--test/CodeGen/ARM/fp.ll61
-rw-r--r--test/CodeGen/ARM/fparith.ll86
-rw-r--r--test/CodeGen/ARM/fpcmp.ll57
-rw-r--r--test/CodeGen/ARM/fpcmp_ueq.ll10
-rw-r--r--test/CodeGen/ARM/fpconv.ll71
-rw-r--r--test/CodeGen/ARM/fpmem.ll22
-rw-r--r--test/CodeGen/ARM/fptoint.ll47
-rw-r--r--test/CodeGen/ARM/frame_thumb.ll9
-rw-r--r--test/CodeGen/ARM/hello.ll14
-rw-r--r--test/CodeGen/ARM/iabs.ll22
-rw-r--r--test/CodeGen/ARM/ifcvt1.ll15
-rw-r--r--test/CodeGen/ARM/ifcvt2.ll36
-rw-r--r--test/CodeGen/ARM/ifcvt3.ll19
-rw-r--r--test/CodeGen/ARM/ifcvt4.ll38
-rw-r--r--test/CodeGen/ARM/ifcvt5.ll24
-rw-r--r--test/CodeGen/ARM/ifcvt6.ll25
-rw-r--r--test/CodeGen/ARM/ifcvt7.ll39
-rw-r--r--test/CodeGen/ARM/ifcvt8.ll22
-rw-r--r--test/CodeGen/ARM/illegal-vector-bitcast.ll13
-rw-r--r--test/CodeGen/ARM/imm.ll17
-rw-r--r--test/CodeGen/ARM/inlineasm.ll19
-rw-r--r--test/CodeGen/ARM/inlineasm2.ll11
-rw-r--r--test/CodeGen/ARM/insn-sched1.ll11
-rw-r--r--test/CodeGen/ARM/ispositive.ll10
-rw-r--r--test/CodeGen/ARM/large-stack.ll21
-rw-r--r--test/CodeGen/ARM/ldm.ll34
-rw-r--r--test/CodeGen/ARM/ldr.ll22
-rw-r--r--test/CodeGen/ARM/ldr_ext.ll32
-rw-r--r--test/CodeGen/ARM/ldr_frame.ll32
-rw-r--r--test/CodeGen/ARM/ldr_post.ll11
-rw-r--r--test/CodeGen/ARM/ldr_pre.ll18
-rw-r--r--test/CodeGen/ARM/load-global.ll19
-rw-r--r--test/CodeGen/ARM/load.ll33
-rw-r--r--test/CodeGen/ARM/long-setcc.ll18
-rw-r--r--test/CodeGen/ARM/long.ll86
-rw-r--r--test/CodeGen/ARM/long_shift.ll31
-rw-r--r--test/CodeGen/ARM/lsr-code-insertion.ll60
-rw-r--r--test/CodeGen/ARM/lsr-scale-addr-mode.ll19
-rw-r--r--test/CodeGen/ARM/mem.ll14
-rw-r--r--test/CodeGen/ARM/memfunc.ll13
-rw-r--r--test/CodeGen/ARM/mul.ll24
-rw-r--r--test/CodeGen/ARM/mulhi.ll23
-rw-r--r--test/CodeGen/ARM/mvn.ll72
-rw-r--r--test/CodeGen/ARM/pack.ll80
-rw-r--r--test/CodeGen/ARM/ret0.ll4
-rw-r--r--test/CodeGen/ARM/ret_arg1.ll4
-rw-r--r--test/CodeGen/ARM/ret_arg2.ll4
-rw-r--r--test/CodeGen/ARM/ret_arg3.ll4
-rw-r--r--test/CodeGen/ARM/ret_arg4.ll4
-rw-r--r--test/CodeGen/ARM/ret_arg5.ll4
-rw-r--r--test/CodeGen/ARM/ret_void.ll4
-rw-r--r--test/CodeGen/ARM/rev.ll29
-rw-r--r--test/CodeGen/ARM/section.ll6
-rw-r--r--test/CodeGen/ARM/select.ll63
-rw-r--r--test/CodeGen/ARM/select_xform.ll16
-rw-r--r--test/CodeGen/ARM/shifter_operand.ll15
-rw-r--r--test/CodeGen/ARM/smul.ll35
-rw-r--r--test/CodeGen/ARM/stack-frame.ll15
-rw-r--r--test/CodeGen/ARM/str_post.ll21
-rw-r--r--test/CodeGen/ARM/str_pre.ll18
-rw-r--r--test/CodeGen/ARM/str_trunc.ll16
-rw-r--r--test/CodeGen/ARM/sxt_rot.ll22
-rw-r--r--test/CodeGen/ARM/thumb-imm.ll10
-rw-r--r--test/CodeGen/ARM/tls1.ll20
-rw-r--r--test/CodeGen/ARM/tls2.ll19
-rw-r--r--test/CodeGen/ARM/trunc_ldr.ll24
-rw-r--r--test/CodeGen/ARM/tst_teq.ll19
-rw-r--r--test/CodeGen/ARM/unord.ll16
-rw-r--r--test/CodeGen/ARM/uxt_rot.ll24
-rw-r--r--test/CodeGen/ARM/uxtb.ll76
-rw-r--r--test/CodeGen/ARM/vargs.ll13
-rw-r--r--test/CodeGen/ARM/vargs2.ll36
-rw-r--r--test/CodeGen/ARM/vargs_align.ll21
-rw-r--r--test/CodeGen/ARM/vfp.ll150
-rw-r--r--test/CodeGen/ARM/weak.ll17
-rw-r--r--test/CodeGen/ARM/weak2.ll18
124 files changed, 5123 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/2006-11-10-CycleInDAG.ll b/test/CodeGen/ARM/2006-11-10-CycleInDAG.ll
new file mode 100644
index 0000000..49ebead
--- /dev/null
+++ b/test/CodeGen/ARM/2006-11-10-CycleInDAG.ll
@@ -0,0 +1,20 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v6
+
+ %struct.layer_data = type { int, [2048 x ubyte], ubyte*, [16 x ubyte], uint, ubyte*, int, int, [64 x int], [64 x int], [64 x int], [64 x int], int, int, int, int, int, int, int, int, int, int, int, int, [12 x [64 x short]] }
+%ld = external global %struct.layer_data*
+
+void %main() {
+entry:
+ br bool false, label %bb169.i, label %cond_true11
+
+bb169.i:
+ ret void
+
+cond_true11:
+ %tmp.i32 = load %struct.layer_data** %ld
+ %tmp3.i35 = getelementptr %struct.layer_data* %tmp.i32, int 0, uint 1, int 2048
+ %tmp.i36 = getelementptr %struct.layer_data* %tmp.i32, int 0, uint 2
+ store ubyte* %tmp3.i35, ubyte** %tmp.i36
+ store ubyte* %tmp3.i35, ubyte** null
+ ret void
+}
diff --git a/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll b/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll
new file mode 100644
index 0000000..3661c4c
--- /dev/null
+++ b/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll
@@ -0,0 +1,103 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2
+
+@quant_coef = external global [6 x [4 x [4 x i32]]] ; <[6 x [4 x [4 x i32]]]*> [#uses=1]
+@dequant_coef = external global [6 x [4 x [4 x i32]]] ; <[6 x [4 x [4 x i32]]]*> [#uses=1]
+@A = external global [4 x [4 x i32]] ; <[4 x [4 x i32]]*> [#uses=1]
+
+define fastcc i32 @dct_luma_sp(i32 %block_x, i32 %block_y, i32* %coeff_cost) {
+entry:
+ %predicted_block = alloca [4 x [4 x i32]], align 4 ; <[4 x [4 x i32]]*> [#uses=1]
+ br label %cond_next489
+
+cond_next489: ; preds = %cond_false, %bb471
+ %j.7.in = load i8* null ; <i8> [#uses=1]
+ %i.8.in = load i8* null ; <i8> [#uses=1]
+ %i.8 = zext i8 %i.8.in to i32 ; <i32> [#uses=4]
+ %j.7 = zext i8 %j.7.in to i32 ; <i32> [#uses=4]
+ %tmp495 = getelementptr [4 x [4 x i32]]* %predicted_block, i32 0, i32 %i.8, i32 %j.7 ; <i32*> [#uses=2]
+ %tmp496 = load i32* %tmp495 ; <i32> [#uses=2]
+ %tmp502 = load i32* null ; <i32> [#uses=1]
+ %tmp542 = getelementptr [6 x [4 x [4 x i32]]]* @quant_coef, i32 0, i32 0, i32 %i.8, i32 %j.7 ; <i32*> [#uses=1]
+ %tmp543 = load i32* %tmp542 ; <i32> [#uses=1]
+ %tmp548 = ashr i32 0, 0 ; <i32> [#uses=3]
+ %tmp561 = sub i32 0, %tmp496 ; <i32> [#uses=3]
+ %abscond563 = icmp sgt i32 %tmp561, -1 ; <i1> [#uses=1]
+ %abs564 = select i1 %abscond563, i32 %tmp561, i32 0 ; <i32> [#uses=1]
+ %tmp572 = mul i32 %abs564, %tmp543 ; <i32> [#uses=1]
+ %tmp574 = add i32 %tmp572, 0 ; <i32> [#uses=1]
+ %tmp576 = ashr i32 %tmp574, 0 ; <i32> [#uses=7]
+ %tmp579 = icmp eq i32 %tmp548, %tmp576 ; <i1> [#uses=1]
+ br i1 %tmp579, label %bb712, label %cond_next589
+
+cond_next589: ; preds = %cond_next489
+ %tmp605 = getelementptr [6 x [4 x [4 x i32]]]* @dequant_coef, i32 0, i32 0, i32 %i.8, i32 %j.7 ; <i32*> [#uses=1]
+ %tmp606 = load i32* %tmp605 ; <i32> [#uses=1]
+ %tmp612 = load i32* null ; <i32> [#uses=1]
+ %tmp629 = load i32* null ; <i32> [#uses=1]
+ %tmp629a = sitofp i32 %tmp629 to double ; <double> [#uses=1]
+ %tmp631 = mul double %tmp629a, 0.000000e+00 ; <double> [#uses=1]
+ %tmp632 = add double 0.000000e+00, %tmp631 ; <double> [#uses=1]
+ %tmp642 = call fastcc i32 @sign( i32 %tmp576, i32 %tmp561 ) ; <i32> [#uses=1]
+ %tmp650 = mul i32 %tmp606, %tmp642 ; <i32> [#uses=1]
+ %tmp656 = mul i32 %tmp650, %tmp612 ; <i32> [#uses=1]
+ %tmp658 = shl i32 %tmp656, 0 ; <i32> [#uses=1]
+ %tmp659 = ashr i32 %tmp658, 6 ; <i32> [#uses=1]
+ %tmp660 = sub i32 0, %tmp659 ; <i32> [#uses=1]
+ %tmp666 = sub i32 %tmp660, %tmp496 ; <i32> [#uses=1]
+ %tmp667 = sitofp i32 %tmp666 to double ; <double> [#uses=2]
+ call void @levrun_linfo_inter( i32 %tmp576, i32 0, i32* null, i32* null )
+ %tmp671 = mul double %tmp667, %tmp667 ; <double> [#uses=1]
+ %tmp675 = add double %tmp671, 0.000000e+00 ; <double> [#uses=1]
+ %tmp678 = fcmp oeq double %tmp632, %tmp675 ; <i1> [#uses=1]
+ br i1 %tmp678, label %cond_true679, label %cond_false693
+
+cond_true679: ; preds = %cond_next589
+ %abscond681 = icmp sgt i32 %tmp548, -1 ; <i1> [#uses=1]
+ %abs682 = select i1 %abscond681, i32 %tmp548, i32 0 ; <i32> [#uses=1]
+ %abscond684 = icmp sgt i32 %tmp576, -1 ; <i1> [#uses=1]
+ %abs685 = select i1 %abscond684, i32 %tmp576, i32 0 ; <i32> [#uses=1]
+ %tmp686 = icmp slt i32 %abs682, %abs685 ; <i1> [#uses=1]
+ br i1 %tmp686, label %cond_next702, label %cond_false689
+
+cond_false689: ; preds = %cond_true679
+ %tmp739 = icmp eq i32 %tmp576, 0 ; <i1> [#uses=1]
+ br i1 %tmp579, label %bb737, label %cond_false708
+
+cond_false693: ; preds = %cond_next589
+ ret i32 0
+
+cond_next702: ; preds = %cond_true679
+ ret i32 0
+
+cond_false708: ; preds = %cond_false689
+ ret i32 0
+
+bb712: ; preds = %cond_next489
+ ret i32 0
+
+bb737: ; preds = %cond_false689
+ br i1 %tmp739, label %cond_next791, label %cond_true740
+
+cond_true740: ; preds = %bb737
+ %tmp761 = call fastcc i32 @sign( i32 %tmp576, i32 0 ) ; <i32> [#uses=1]
+ %tmp780 = load i32* null ; <i32> [#uses=1]
+ %tmp785 = getelementptr [4 x [4 x i32]]* @A, i32 0, i32 %i.8, i32 %j.7 ; <i32*> [#uses=1]
+ %tmp786 = load i32* %tmp785 ; <i32> [#uses=1]
+ %tmp781 = mul i32 %tmp780, %tmp761 ; <i32> [#uses=1]
+ %tmp787 = mul i32 %tmp781, %tmp786 ; <i32> [#uses=1]
+ %tmp789 = shl i32 %tmp787, 0 ; <i32> [#uses=1]
+ %tmp790 = ashr i32 %tmp789, 6 ; <i32> [#uses=1]
+ br label %cond_next791
+
+cond_next791: ; preds = %cond_true740, %bb737
+ %ilev.1 = phi i32 [ %tmp790, %cond_true740 ], [ 0, %bb737 ] ; <i32> [#uses=1]
+ %tmp796 = load i32* %tmp495 ; <i32> [#uses=1]
+ %tmp798 = add i32 %tmp796, %ilev.1 ; <i32> [#uses=1]
+ %tmp812 = mul i32 0, %tmp502 ; <i32> [#uses=0]
+ %tmp818 = call fastcc i32 @sign( i32 0, i32 %tmp798 ) ; <i32> [#uses=0]
+ unreachable
+}
+
+declare i32 @sign(i32, i32)
+
+declare void @levrun_linfo_inter(i32, i32, i32*, i32*)
diff --git a/test/CodeGen/ARM/2007-01-31-RegInfoAssert.ll b/test/CodeGen/ARM/2007-01-31-RegInfoAssert.ll
new file mode 100644
index 0000000..19c156d
--- /dev/null
+++ b/test/CodeGen/ARM/2007-01-31-RegInfoAssert.ll
@@ -0,0 +1,16 @@
+; RUN: llvm-as < %s | llc -mtriple=thumb-apple-darwin
+
+%struct.rtx_def = type { i8 }
+@str = external global [7 x i8]
+
+define void @f1() {
+ %D = alloca %struct.rtx_def, align 1
+ %tmp1 = bitcast %struct.rtx_def* %D to i32*
+ %tmp7 = load i32* %tmp1
+ %tmp14 = lshr i32 %tmp7, 1
+ %tmp1415 = and i32 %tmp14, 1
+ call void (i32, ...)* @printf( i32 undef, i32 0, i32 %tmp1415 )
+ ret void
+}
+
+declare void @printf(i32, ...)
diff --git a/test/CodeGen/ARM/2007-02-02-JoinIntervalsCrash.ll b/test/CodeGen/ARM/2007-02-02-JoinIntervalsCrash.ll
new file mode 100644
index 0000000..ee52cf0
--- /dev/null
+++ b/test/CodeGen/ARM/2007-02-02-JoinIntervalsCrash.ll
@@ -0,0 +1,27 @@
+; RUN: llvm-as < %s | llc -mtriple=thumb-apple-darwin
+
+ %struct.color_sample = type { i32 }
+ %struct.ref = type { %struct.color_sample, i16, i16 }
+
+define void @zcvrs() {
+ br i1 false, label %bb22, label %UnifiedReturnBlock
+
+bb22:
+ br i1 false, label %bb64, label %UnifiedReturnBlock
+
+bb64:
+ %tmp67 = urem i32 0, 0
+ %tmp69 = icmp slt i32 %tmp67, 10
+ %iftmp.13.0 = select i1 %tmp69, i8 48, i8 55
+ %tmp75 = add i8 %iftmp.13.0, 0
+ store i8 %tmp75, i8* null
+ %tmp81 = udiv i32 0, 0
+ %tmp83 = icmp eq i32 %tmp81, 0
+ br i1 %tmp83, label %bb85, label %bb64
+
+bb85:
+ ret void
+
+UnifiedReturnBlock:
+ ret void
+}
diff --git a/test/CodeGen/ARM/2007-03-06-AddR7.ll b/test/CodeGen/ARM/2007-03-06-AddR7.ll
new file mode 100644
index 0000000..5e136dd
--- /dev/null
+++ b/test/CodeGen/ARM/2007-03-06-AddR7.ll
@@ -0,0 +1,117 @@
+; RUN: llvm-as < %s | llc -march=thumb
+; RUN: llvm-as < %s | llc -mtriple=thumb-apple-darwin -relocation-model=pic \
+; RUN: -mattr=+v6,+vfp2 | not grep {add r., r7, #2 \\* 4}
+
+ %struct.__fooAllocator = type opaque
+ %struct.__fooY = type { %struct.fooXBase, %struct.__fooString*, %struct.__fooU*, %struct.__fooV*, i8** }
+ %struct.__fooZ = type opaque
+ %struct.__fooU = type opaque
+ %struct.__fooString = type opaque
+ %struct.__fooV = type opaque
+ %struct.fooXBase = type { i32, [4 x i8] }
+ %struct.fooXClass = type { i32, i8*, void (i8*)*, i8* (%struct.__fooAllocator*, i8*)*, void (i8*)*, i8 (i8*, i8*) zext *, i32 (i8*)*, %struct.__fooString* (i8*, %struct.__fooZ*)*, %struct.__fooString* (i8*)* }
+ %struct.aa_cache = type { i32, i32, [1 x %struct.aa_method*] }
+ %struct.aa_class = type { %struct.aa_class*, %struct.aa_class*, i8*, i32, i32, i32, %struct.aa_ivar_list*, %struct.aa_method_list**, %struct.aa_cache*, %struct.aa_protocol_list* }
+ %struct.aa_ivar = type { i8*, i8*, i32 }
+ %struct.aa_ivar_list = type { i32, [1 x %struct.aa_ivar] }
+ %struct.aa_method = type { %struct.aa_ss*, i8*, %struct.aa_object* (%struct.aa_object*, %struct.aa_ss*, ...)* }
+ %struct.aa_method_list = type { %struct.aa_method_list*, i32, [1 x %struct.aa_method] }
+ %struct.aa_object = type { %struct.aa_class* }
+ %struct.aa_protocol_list = type { %struct.aa_protocol_list*, i32, [1 x %struct.aa_object*] }
+ %struct.aa_ss = type opaque
+@__kfooYTypeID = external global i32 ; <i32*> [#uses=3]
+@__fooYClass = external constant %struct.fooXClass ; <%struct.fooXClass*> [#uses=1]
+@__fooXClassTableSize = external global i32 ; <i32*> [#uses=1]
+@__fooXAaClassTable = external global i32* ; <i32**> [#uses=1]
+@s.10319 = external global %struct.aa_ss* ; <%struct.aa_ss**> [#uses=2]
+@str15 = external constant [24 x i8] ; <[24 x i8]*> [#uses=1]
+
+
+define i8 @test(%struct.__fooY* %calendar, double* %atp, i8* %componentDesc, ...) zext {
+entry:
+ %args = alloca i8*, align 4 ; <i8**> [#uses=5]
+ %args4 = bitcast i8** %args to i8* ; <i8*> [#uses=2]
+ call void @llvm.va_start( i8* %args4 )
+ %tmp6 = load i32* @__kfooYTypeID ; <i32> [#uses=1]
+ icmp eq i32 %tmp6, 0 ; <i1>:0 [#uses=1]
+ br i1 %0, label %cond_true, label %cond_next
+
+cond_true: ; preds = %entry
+ %tmp7 = call i32 @_fooXRegisterClass( %struct.fooXClass* @__fooYClass ) ; <i32> [#uses=1]
+ store i32 %tmp7, i32* @__kfooYTypeID
+ br label %cond_next
+
+cond_next: ; preds = %cond_true, %entry
+ %tmp8 = load i32* @__kfooYTypeID ; <i32> [#uses=2]
+ %tmp15 = load i32* @__fooXClassTableSize ; <i32> [#uses=1]
+ icmp ugt i32 %tmp15, %tmp8 ; <i1>:1 [#uses=1]
+ br i1 %1, label %cond_next18, label %cond_true58
+
+cond_next18: ; preds = %cond_next
+ %tmp21 = getelementptr %struct.__fooY* %calendar, i32 0, i32 0, i32 0 ; <i32*> [#uses=1]
+ %tmp22 = load i32* %tmp21 ; <i32> [#uses=2]
+ %tmp29 = load i32** @__fooXAaClassTable ; <i32*> [#uses=1]
+ %tmp31 = getelementptr i32* %tmp29, i32 %tmp8 ; <i32*> [#uses=1]
+ %tmp32 = load i32* %tmp31 ; <i32> [#uses=1]
+ icmp eq i32 %tmp22, %tmp32 ; <i1>:2 [#uses=1]
+ %.not = xor i1 %2, true ; <i1> [#uses=1]
+ icmp ugt i32 %tmp22, 4095 ; <i1>:3 [#uses=1]
+ %bothcond = and i1 %.not, %3 ; <i1> [#uses=1]
+ br i1 %bothcond, label %cond_true58, label %bb48
+
+bb48: ; preds = %cond_next18
+ %tmp78 = call i32 @strlen( i8* %componentDesc ) ; <i32> [#uses=4]
+ %tmp92 = alloca i32, i32 %tmp78 ; <i32*> [#uses=2]
+ icmp sgt i32 %tmp78, 0 ; <i1>:4 [#uses=1]
+ br i1 %4, label %cond_true111, label %bb114
+
+cond_true58: ; preds = %cond_next18, %cond_next
+ %tmp59 = load %struct.aa_ss** @s.10319 ; <%struct.aa_ss*> [#uses=2]
+ icmp eq %struct.aa_ss* %tmp59, null ; <i1>:5 [#uses=1]
+ %tmp6869 = bitcast %struct.__fooY* %calendar to i8* ; <i8*> [#uses=2]
+ br i1 %5, label %cond_true60, label %cond_next64
+
+cond_true60: ; preds = %cond_true58
+ %tmp63 = call %struct.aa_ss* @sel_registerName( i8* getelementptr ([24 x i8]* @str15, i32 0, i32 0) ) ; <%struct.aa_ss*> [#uses=2]
+ store %struct.aa_ss* %tmp63, %struct.aa_ss** @s.10319
+ %tmp66137 = volatile load i8** %args ; <i8*> [#uses=1]
+ %tmp73138 = call i8 (i8*, %struct.aa_ss*, ...) zext * bitcast (%struct.aa_object* (%struct.aa_object*, %struct.aa_ss*, ...)* @aa_mm to i8 (i8*, %struct.aa_ss*, ...) zext *)( i8* %tmp6869, %struct.aa_ss* %tmp63, double* %atp, i8* %componentDesc, i8* %tmp66137 ) zext ; <i8> [#uses=1]
+ ret i8 %tmp73138
+
+cond_next64: ; preds = %cond_true58
+ %tmp66 = volatile load i8** %args ; <i8*> [#uses=1]
+ %tmp73 = call i8 (i8*, %struct.aa_ss*, ...) zext * bitcast (%struct.aa_object* (%struct.aa_object*, %struct.aa_ss*, ...)* @aa_mm to i8 (i8*, %struct.aa_ss*, ...) zext *)( i8* %tmp6869, %struct.aa_ss* %tmp59, double* %atp, i8* %componentDesc, i8* %tmp66 ) zext ; <i8> [#uses=1]
+ ret i8 %tmp73
+
+cond_true111: ; preds = %cond_true111, %bb48
+ %idx.2132.0 = phi i32 [ 0, %bb48 ], [ %indvar.next, %cond_true111 ] ; <i32> [#uses=2]
+ %tmp95 = volatile load i8** %args ; <i8*> [#uses=2]
+ %tmp97 = getelementptr i8* %tmp95, i32 4 ; <i8*> [#uses=1]
+ volatile store i8* %tmp97, i8** %args
+ %tmp9899 = bitcast i8* %tmp95 to i32* ; <i32*> [#uses=1]
+ %tmp100 = load i32* %tmp9899 ; <i32> [#uses=1]
+ %tmp104 = getelementptr i32* %tmp92, i32 %idx.2132.0 ; <i32*> [#uses=1]
+ store i32 %tmp100, i32* %tmp104
+ %indvar.next = add i32 %idx.2132.0, 1 ; <i32> [#uses=2]
+ icmp eq i32 %indvar.next, %tmp78 ; <i1>:6 [#uses=1]
+ br i1 %6, label %bb114, label %cond_true111
+
+bb114: ; preds = %cond_true111, %bb48
+ call void @llvm.va_end( i8* %args4 )
+ %tmp122 = call i8 @_fooYCCV( %struct.__fooY* %calendar, double* %atp, i8* %componentDesc, i32* %tmp92, i32 %tmp78 ) zext ; <i8> [#uses=1]
+ ret i8 %tmp122
+}
+
+declare i32 @_fooXRegisterClass(%struct.fooXClass*)
+
+declare i8 @_fooYCCV(%struct.__fooY*, double*, i8*, i32*, i32) zext
+
+declare %struct.aa_object* @aa_mm(%struct.aa_object*, %struct.aa_ss*, ...)
+
+declare %struct.aa_ss* @sel_registerName(i8*)
+
+declare void @llvm.va_start(i8*)
+
+declare i32 @strlen(i8*)
+
+declare void @llvm.va_end(i8*)
diff --git a/test/CodeGen/ARM/2007-03-07-CombinerCrash.ll b/test/CodeGen/ARM/2007-03-07-CombinerCrash.ll
new file mode 100644
index 0000000..7317e62
--- /dev/null
+++ b/test/CodeGen/ARM/2007-03-07-CombinerCrash.ll
@@ -0,0 +1,21 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -mattr=+v6,+vfp2
+
+define fastcc i8* @read_sleb128(i8* %p, i32* %val) {
+ br label %bb
+
+bb: ; preds = %bb, %0
+ %p_addr.0 = getelementptr i8* %p, i32 0 ; <i8*> [#uses=1]
+ %tmp2 = load i8* %p_addr.0 ; <i8> [#uses=2]
+ %tmp4.rec = add i32 0, 1 ; <i32> [#uses=1]
+ %tmp4 = getelementptr i8* %p, i32 %tmp4.rec ; <i8*> [#uses=1]
+ %tmp56 = zext i8 %tmp2 to i32 ; <i32> [#uses=1]
+ %tmp7 = and i32 %tmp56, 127 ; <i32> [#uses=1]
+ %tmp9 = shl i32 %tmp7, 0 ; <i32> [#uses=1]
+ %tmp11 = or i32 %tmp9, 0 ; <i32> [#uses=1]
+ icmp slt i8 %tmp2, 0 ; <i1>:1 [#uses=1]
+ br i1 %1, label %bb, label %cond_next28
+
+cond_next28: ; preds = %bb
+ store i32 %tmp11, i32* %val
+ ret i8* %tmp4
+}
diff --git a/test/CodeGen/ARM/2007-03-13-InstrSched.ll b/test/CodeGen/ARM/2007-03-13-InstrSched.ll
new file mode 100644
index 0000000..8fdff52
--- /dev/null
+++ b/test/CodeGen/ARM/2007-03-13-InstrSched.ll
@@ -0,0 +1,48 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -relocation-model=pic \
+; RUN: -mattr=+v6 -stats |& grep asm-printer | grep 41
+
+define void @test(i32 %tmp56222, i32 %tmp36224, i32 %tmp46223, i32 %i.0196.0.ph, i32 %tmp8, i32* %tmp1011, i32** %tmp1, i32* %d2.1.out, i32* %d3.1.out, i32* %d0.1.out, i32* %d1.1.out) {
+newFuncRoot:
+ br label %bb74
+
+bb78.exitStub: ; preds = %bb74
+ store i32 %d2.1, i32* %d2.1.out
+ store i32 %d3.1, i32* %d3.1.out
+ store i32 %d0.1, i32* %d0.1.out
+ store i32 %d1.1, i32* %d1.1.out
+ ret void
+
+bb74: ; preds = %bb26, %newFuncRoot
+ %fp.1.rec = phi i32 [ 0, %newFuncRoot ], [ %tmp71.rec, %bb26 ] ; <i32> [#uses=3]
+ %fm.1.in = phi i32* [ %tmp71, %bb26 ], [ %tmp1011, %newFuncRoot ] ; <i32*> [#uses=1]
+ %d0.1 = phi i32 [ %tmp44, %bb26 ], [ 8192, %newFuncRoot ] ; <i32> [#uses=2]
+ %d1.1 = phi i32 [ %tmp54, %bb26 ], [ 8192, %newFuncRoot ] ; <i32> [#uses=2]
+ %d2.1 = phi i32 [ %tmp64, %bb26 ], [ 8192, %newFuncRoot ] ; <i32> [#uses=2]
+ %d3.1 = phi i32 [ %tmp69, %bb26 ], [ 8192, %newFuncRoot ] ; <i32> [#uses=2]
+ %fm.1 = load i32* %fm.1.in ; <i32> [#uses=4]
+ icmp eq i32 %fp.1.rec, %tmp8 ; <i1>:0 [#uses=1]
+ br i1 %0, label %bb78.exitStub, label %bb26
+
+bb26: ; preds = %bb74
+ %tmp28 = getelementptr i32** %tmp1, i32 %fp.1.rec ; <i32**> [#uses=1]
+ %tmp30 = load i32** %tmp28 ; <i32*> [#uses=4]
+ %tmp33 = getelementptr i32* %tmp30, i32 %i.0196.0.ph ; <i32*> [#uses=1]
+ %tmp34 = load i32* %tmp33 ; <i32> [#uses=1]
+ %tmp38 = getelementptr i32* %tmp30, i32 %tmp36224 ; <i32*> [#uses=1]
+ %tmp39 = load i32* %tmp38 ; <i32> [#uses=1]
+ %tmp42 = mul i32 %tmp34, %fm.1 ; <i32> [#uses=1]
+ %tmp44 = add i32 %tmp42, %d0.1 ; <i32> [#uses=1]
+ %tmp48 = getelementptr i32* %tmp30, i32 %tmp46223 ; <i32*> [#uses=1]
+ %tmp49 = load i32* %tmp48 ; <i32> [#uses=1]
+ %tmp52 = mul i32 %tmp39, %fm.1 ; <i32> [#uses=1]
+ %tmp54 = add i32 %tmp52, %d1.1 ; <i32> [#uses=1]
+ %tmp58 = getelementptr i32* %tmp30, i32 %tmp56222 ; <i32*> [#uses=1]
+ %tmp59 = load i32* %tmp58 ; <i32> [#uses=1]
+ %tmp62 = mul i32 %tmp49, %fm.1 ; <i32> [#uses=1]
+ %tmp64 = add i32 %tmp62, %d2.1 ; <i32> [#uses=1]
+ %tmp67 = mul i32 %tmp59, %fm.1 ; <i32> [#uses=1]
+ %tmp69 = add i32 %tmp67, %d3.1 ; <i32> [#uses=1]
+ %tmp71.rec = add i32 %fp.1.rec, 1 ; <i32> [#uses=2]
+ %tmp71 = getelementptr i32* %tmp1011, i32 %tmp71.rec ; <i32*> [#uses=1]
+ br label %bb74
+}
diff --git a/test/CodeGen/ARM/2007-03-21-JoinIntervalsCrash.ll b/test/CodeGen/ARM/2007-03-21-JoinIntervalsCrash.ll
new file mode 100644
index 0000000..32daf83
--- /dev/null
+++ b/test/CodeGen/ARM/2007-03-21-JoinIntervalsCrash.ll
@@ -0,0 +1,96 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi
+; PR1257
+
+ %struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32 }
+ %struct.arm_stack_offsets = type { i32, i32, i32, i32, i32 }
+ %struct.c_arg_info = type { %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i8 }
+ %struct.c_language_function = type { %struct.stmt_tree_s }
+ %struct.c_switch = type opaque
+ %struct.eh_status = type opaque
+ %struct.emit_status = type { i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack*, i32, %struct.location_t, i32, i8*, %struct.rtx_def** }
+ %struct.expr_status = type { i32, i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def* }
+ %struct.function = type { %struct.eh_status*, %struct.expr_status*, %struct.emit_status*, %struct.varasm_status*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.function*, i32, i32, i32, i32, %struct.rtx_def*, %struct.CUMULATIVE_ARGS, %struct.rtx_def*, %struct.rtx_def*, %struct.initial_value_struct*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, i8, i32, i64, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, %struct.varray_head_tag*, %struct.temp_slot*, i32, %struct.var_refs_queue*, i32, i32, %struct.rtvec_def*, %struct.tree_node*, i32, i32, i32, %struct.machine_function*, i32, i32, i8, i8, %struct.language_function*, %struct.rtx_def*, i32, i32, i32, i32, %struct.location_t, %struct.varray_head_tag*, %struct.tree_node*, i8, i8, i8 }
+ %struct.ht_identifier = type { i8*, i32, i32 }
+ %struct.initial_value_struct = type opaque
+ %struct.lang_decl = type { i8 }
+ %struct.language_function = type { %struct.c_language_function, %struct.tree_node*, %struct.tree_node*, %struct.c_switch*, %struct.c_arg_info*, i32, i32, i32, i32 }
+ %struct.location_t = type { i8*, i32 }
+ %struct.machine_function = type { %struct.rtx_def*, i32, i32, i32, %struct.arm_stack_offsets, i32, i32, i32, [14 x %struct.rtx_def*] }
+ %struct.rtvec_def = type { i32, [1 x %struct.rtx_def*] }
+ %struct.rtx_def = type { i16, i8, i8, %struct.u }
+ %struct.sequence_stack = type { %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack* }
+ %struct.stmt_tree_s = type { %struct.tree_node*, i32 }
+ %struct.temp_slot = type opaque
+ %struct.tree_common = type { %struct.tree_node*, %struct.tree_node*, %union.tree_ann_d*, i8, i8, i8, i8, i8 }
+ %struct.tree_decl = type { %struct.tree_common, %struct.location_t, i32, %struct.tree_node*, i8, i8, i8, i8, i8, i8, i8, i8, i32, %struct.tree_decl_u1, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, i32, %struct.tree_decl_u2, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_decl* }
+ %struct.tree_decl_u1 = type { i64 }
+ %struct.tree_decl_u2 = type { %struct.function* }
+ %struct.tree_identifier = type { %struct.tree_common, %struct.ht_identifier }
+ %struct.tree_node = type { %struct.tree_decl }
+ %struct.u = type { [1 x i64] }
+ %struct.var_refs_queue = type { %struct.rtx_def*, i32, i32, %struct.var_refs_queue* }
+ %struct.varasm_status = type opaque
+ %struct.varray_head_tag = type opaque
+ %union.tree_ann_d = type opaque
+
+
+define void @declspecs_add_type(i32 %spec.1) {
+entry:
+ %spec.1961 = zext i32 %spec.1 to i64 ; <i64> [#uses=1]
+ %spec.1961.adj = shl i64 %spec.1961, 32 ; <i64> [#uses=1]
+ %spec.1961.adj.ins = or i64 %spec.1961.adj, 0 ; <i64> [#uses=2]
+ %tmp10959 = lshr i64 %spec.1961.adj.ins, 32 ; <i64> [#uses=2]
+ %tmp1920 = inttoptr i64 %tmp10959 to %struct.tree_common* ; <%struct.tree_common*> [#uses=1]
+ %tmp21 = getelementptr %struct.tree_common* %tmp1920, i32 0, i32 3 ; <i8*> [#uses=1]
+ %tmp2122 = bitcast i8* %tmp21 to i32* ; <i32*> [#uses=1]
+ br i1 false, label %cond_next53, label %cond_true
+
+cond_true: ; preds = %entry
+ ret void
+
+cond_next53: ; preds = %entry
+ br i1 false, label %cond_true63, label %cond_next689
+
+cond_true63: ; preds = %cond_next53
+ ret void
+
+cond_next689: ; preds = %cond_next53
+ br i1 false, label %cond_false841, label %bb743
+
+bb743: ; preds = %cond_next689
+ ret void
+
+cond_false841: ; preds = %cond_next689
+ br i1 false, label %cond_true851, label %cond_true918
+
+cond_true851: ; preds = %cond_false841
+ tail call void @lookup_name( )
+ br i1 false, label %bb866, label %cond_next856
+
+cond_next856: ; preds = %cond_true851
+ ret void
+
+bb866: ; preds = %cond_true851
+ %tmp874 = load i32* %tmp2122 ; <i32> [#uses=1]
+ %tmp876877 = trunc i32 %tmp874 to i8 ; <i8> [#uses=1]
+ icmp eq i8 %tmp876877, 1 ; <i1>:0 [#uses=1]
+ br i1 %0, label %cond_next881, label %cond_true878
+
+cond_true878: ; preds = %bb866
+ unreachable
+
+cond_next881: ; preds = %bb866
+ %tmp884885 = inttoptr i64 %tmp10959 to %struct.tree_identifier* ; <%struct.tree_identifier*> [#uses=1]
+ %tmp887 = getelementptr %struct.tree_identifier* %tmp884885, i32 0, i32 1, i32 0 ; <i8**> [#uses=1]
+ %tmp888 = load i8** %tmp887 ; <i8*> [#uses=1]
+ tail call void (i32, ...)* @error( i32 undef, i8* %tmp888 )
+ ret void
+
+cond_true918: ; preds = %cond_false841
+ %tmp920957 = trunc i64 %spec.1961.adj.ins to i32 ; <i32> [#uses=0]
+ ret void
+}
+
+declare void @error(i32, ...)
+
+declare void @lookup_name()
diff --git a/test/CodeGen/ARM/2007-03-26-RegScavengerAssert.ll b/test/CodeGen/ARM/2007-03-26-RegScavengerAssert.ll
new file mode 100644
index 0000000..5a62401
--- /dev/null
+++ b/test/CodeGen/ARM/2007-03-26-RegScavengerAssert.ll
@@ -0,0 +1,947 @@
+; RUN: llvm-as < %s | llc -march=arm
+; PR1266
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "arm-linux-gnueabi"
+ %struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32 }
+ %struct.FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct.FILE*, i32, i32, i32, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i32, [52 x i8] }
+ %struct.VEC_edge = type { i32, i32, [1 x %struct.edge_def*] }
+ %struct.VEC_tree = type { i32, i32, [1 x %struct.tree_node*] }
+ %struct._IO_marker = type { %struct._IO_marker*, %struct.FILE*, i32 }
+ %struct._obstack_chunk = type { i8*, %struct._obstack_chunk*, [4 x i8] }
+ %struct.addr_diff_vec_flags = type { i8, i8, i8, i8 }
+ %struct.arm_stack_offsets = type { i32, i32, i32, i32, i32 }
+ %struct.attribute_spec = type { i8*, i32, i32, i8, i8, i8, %struct.tree_node* (%struct.tree_node**, %struct.tree_node*, %struct.tree_node*, i32, i8*)* }
+ %struct.basic_block_def = type { %struct.rtx_def*, %struct.rtx_def*, %struct.tree_node*, %struct.VEC_edge*, %struct.VEC_edge*, %struct.bitmap_head_def*, %struct.bitmap_head_def*, i8*, %struct.loop*, [2 x %struct.et_node*], %struct.basic_block_def*, %struct.basic_block_def*, %struct.reorder_block_def*, %struct.bb_ann_d*, i64, i32, i32, i32, i32 }
+ %struct.bb_ann_d = type { %struct.tree_node*, i8, %struct.edge_prediction* }
+ %struct.bitmap_element_def = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, i32, [4 x i32] }
+ %struct.bitmap_head_def = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, i32, %struct.bitmap_obstack* }
+ %struct.bitmap_obstack = type { %struct.bitmap_element_def*, %struct.bitmap_head_def*, %struct.obstack }
+ %struct.cgraph_edge = type { %struct.cgraph_node*, %struct.cgraph_node*, %struct.cgraph_edge*, %struct.cgraph_edge*, %struct.cgraph_edge*, %struct.cgraph_edge*, %struct.tree_node*, i8*, i8* }
+ %struct.cgraph_global_info = type { %struct.cgraph_node*, i32, i8 }
+ %struct.cgraph_local_info = type { i32, i8, i8, i8, i8, i8, i8, i8 }
+ %struct.cgraph_node = type { %struct.tree_node*, %struct.cgraph_edge*, %struct.cgraph_edge*, %struct.cgraph_node*, %struct.cgraph_node*, %struct.cgraph_node*, %struct.cgraph_node*, %struct.cgraph_node*, %struct.cgraph_node*, %struct.cgraph_node*, i8*, %struct.cgraph_local_info, %struct.cgraph_global_info, %struct.cgraph_rtl_info, i32, i8, i8, i8, i8, i8 }
+ %struct.cgraph_rtl_info = type { i32, i8, i8 }
+ %struct.cl_perfunc_opts = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
+ %struct.cselib_val_struct = type opaque
+ %struct.dataflow_d = type { %struct.varray_head_tag*, [2 x %struct.tree_node*] }
+ %struct.def_operand_ptr = type { %struct.tree_node** }
+ %struct.def_optype_d = type { i32, [1 x %struct.def_operand_ptr] }
+ %struct.diagnostic_context = type { %struct.pretty_printer*, [8 x i32], i8, i8, i8, void (%struct.diagnostic_context*, %struct.diagnostic_info*)*, void (%struct.diagnostic_context*, %struct.diagnostic_info*)*, void (i8*, i8**)*, %struct.tree_node*, i32, i32 }
+ %struct.diagnostic_info = type { %struct.text_info, %struct.location_t, i32 }
+ %struct.die_struct = type opaque
+ %struct.edge_def = type { %struct.basic_block_def*, %struct.basic_block_def*, %struct.edge_def_insns, i8*, %struct.location_t*, i32, i32, i64, i32 }
+ %struct.edge_def_insns = type { %struct.rtx_def* }
+ %struct.edge_prediction = type { %struct.edge_prediction*, %struct.edge_def*, i32, i32 }
+ %struct.eh_status = type opaque
+ %struct.elt_list = type opaque
+ %struct.elt_t = type { %struct.tree_node*, %struct.tree_node* }
+ %struct.emit_status = type { i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack*, i32, %struct.location_t, i32, i8*, %struct.rtx_def** }
+ %struct.et_node = type opaque
+ %struct.expr_status = type { i32, i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def* }
+ %struct.function = type { %struct.eh_status*, %struct.expr_status*, %struct.emit_status*, %struct.varasm_status*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.function*, i32, i32, i32, i32, %struct.rtx_def*, %struct.CUMULATIVE_ARGS, %struct.rtx_def*, %struct.rtx_def*, %struct.initial_value_struct*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, i8, i32, i64, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, %struct.varray_head_tag*, %struct.temp_slot*, i32, %struct.var_refs_queue*, i32, i32, %struct.rtvec_def*, %struct.tree_node*, i32, i32, i32, %struct.machine_function*, i32, i32, i8, i8, %struct.language_function*, %struct.rtx_def*, i32, i32, i32, i32, %struct.location_t, %struct.varray_head_tag*, %struct.tree_node*, i8, i8, i8 }
+ %struct.ggc_root_tab = type { i8*, i32, i32, void (i8*)*, void (i8*)* }
+ %struct.gimplify_ctx = type { %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.varray_head_tag*, %struct.htab*, i32, i8, i8 }
+ %struct.gimplify_init_ctor_preeval_data = type { %struct.tree_node*, i32 }
+ %struct.ht_identifier = type { i8*, i32, i32 }
+ %struct.htab = type { i32 (i8*)*, i32 (i8*, i8*)*, void (i8*)*, i8**, i32, i32, i32, i32, i32, i8* (i32, i32)*, void (i8*)*, i8*, i8* (i8*, i32, i32)*, void (i8*, i8*)*, i32 }
+ %struct.initial_value_struct = type opaque
+ %struct.lang_decl = type opaque
+ %struct.lang_hooks = type { i8*, i32, i32 (i32)*, i32 (i32, i8**)*, void (%struct.diagnostic_context*)*, i32 (i32, i8*, i32)*, i8 (i8*, i32) zext *, i8 (i8**) zext *, i8 () zext *, void ()*, void ()*, void (i32)*, void ()*, i64 (%struct.tree_node*)*, %struct.tree_node* (%struct.tree_node*)*, %struct.rtx_def* (%struct.tree_node*, %struct.rtx_def*, i32, i32, %struct.rtx_def**)*, i32 (%struct.tree_node*)*, %struct.tree_node* (%struct.tree_node*)*, i32 (%struct.rtx_def*, %struct.tree_node*)*, void (%struct.tree_node*)*, i8 (%struct.tree_node*) zext *, %struct.tree_node* (%struct.tree_node*)*, void (%struct.tree_node*)*, void (%struct.tree_node*)*, i8 () zext *, i8, i8, void ()*, void (%struct.FILE*, %struct.tree_node*, i32)*, void (%struct.FILE*, %struct.tree_node*, i32)*, void (%struct.FILE*, %struct.tree_node*, i32)*, void (%struct.FILE*, %struct.tree_node*, i32)*, i8* (%struct.tree_node*, i32)*, i32 (%struct.tree_node*, %struct.tree_node*)*, %struct.tree_node* (%struct.tree_node*)*, void (%struct.diagnostic_context*, i8*)*, %struct.tree_node* (%struct.tree_node*)*, i64 (i64)*, %struct.attribute_spec*, %struct.attribute_spec*, %struct.attribute_spec*, i32 (%struct.tree_node*)*, %struct.lang_hooks_for_functions, %struct.lang_hooks_for_tree_inlining, %struct.lang_hooks_for_callgraph, %struct.lang_hooks_for_tree_dump, %struct.lang_hooks_for_decls, %struct.lang_hooks_for_types, i32 (%struct.tree_node**, %struct.tree_node**, %struct.tree_node**)*, %struct.tree_node* (%struct.tree_node*, %struct.tree_node*)*, %struct.tree_node* (i8*, %struct.tree_node*, i32, i32, i8*, %struct.tree_node*)* }
+ %struct.lang_hooks_for_callgraph = type { %struct.tree_node* (%struct.tree_node**, i32*, %struct.tree_node*)*, void (%struct.tree_node*)* }
+ %struct.lang_hooks_for_decls = type { i32 ()*, void (%struct.tree_node*)*, %struct.tree_node* (%struct.tree_node*)*, %struct.tree_node* ()*, i8 (%struct.tree_node*) zext *, void ()*, void (%struct.tree_node*)*, i8 (%struct.tree_node*) zext *, i8* (%struct.tree_node*)* }
+ %struct.lang_hooks_for_functions = type { void (%struct.function*)*, void (%struct.function*)*, void (%struct.function*)*, void (%struct.function*)*, i8 (%struct.tree_node*) zext * }
+ %struct.lang_hooks_for_tree_dump = type { i8 (i8*, %struct.tree_node*) zext *, i32 (%struct.tree_node*)* }
+ %struct.lang_hooks_for_tree_inlining = type { %struct.tree_node* (%struct.tree_node**, i32*, %struct.tree_node* (%struct.tree_node**, i32*, i8*)*, i8*, %struct.pointer_set_t*)*, i32 (%struct.tree_node**)*, i32 (%struct.tree_node*)*, %struct.tree_node* (i8*, %struct.tree_node*)*, i32 (%struct.tree_node*, %struct.tree_node*)*, i32 (%struct.tree_node*)*, i8 (%struct.tree_node*, %struct.tree_node*) zext *, i32 (%struct.tree_node*)*, void (%struct.tree_node*)*, %struct.tree_node* (%struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i32)* }
+ %struct.lang_hooks_for_types = type { %struct.tree_node* (i32)*, %struct.tree_node* (i32, i32)*, %struct.tree_node* (i32, i32)*, %struct.tree_node* (%struct.tree_node*)*, %struct.tree_node* (%struct.tree_node*)*, %struct.tree_node* (i32, %struct.tree_node*)*, %struct.tree_node* (%struct.tree_node*)*, void (%struct.tree_node*, i8*)*, void (%struct.tree_node*, %struct.tree_node*)*, %struct.tree_node* (%struct.tree_node*)*, i8 }
+ %struct.lang_type = type opaque
+ %struct.language_function = type opaque
+ %struct.location_t = type { i8*, i32 }
+ %struct.loop = type opaque
+ %struct.machine_function = type { %struct.rtx_def*, i32, i32, i32, %struct.arm_stack_offsets, i32, i32, i32, [14 x %struct.rtx_def*] }
+ %struct.mem_attrs = type { i64, %struct.tree_node*, %struct.rtx_def*, %struct.rtx_def*, i32 }
+ %struct.obstack = type { i32, %struct._obstack_chunk*, i8*, i8*, i8*, i32, i32, %struct._obstack_chunk* (i8*, i32)*, void (i8*, %struct._obstack_chunk*)*, i8*, i8 }
+ %struct.output_buffer = type { %struct.obstack, %struct.FILE*, i32, [128 x i8] }
+ %struct.phi_arg_d = type { %struct.tree_node*, i8 }
+ %struct.pointer_set_t = type opaque
+ %struct.pretty_printer = type { %struct.output_buffer*, i8*, i32, i32, i32, i32, i32, i8 (%struct.pretty_printer*, %struct.text_info*) zext *, i8, i8 }
+ %struct.ptr_info_def = type { i8, %struct.bitmap_head_def*, %struct.tree_node* }
+ %struct.real_value = type { i8, [3 x i8], [5 x i32] }
+ %struct.reg_attrs = type { %struct.tree_node*, i64 }
+ %struct.reg_info_def = type opaque
+ %struct.reorder_block_def = type { %struct.rtx_def*, %struct.rtx_def*, %struct.basic_block_def*, %struct.basic_block_def*, %struct.basic_block_def*, i32, i32, i32 }
+ %struct.rtunion = type { i32 }
+ %struct.rtvec_def = type { i32, [1 x %struct.rtx_def*] }
+ %struct.rtx_def = type { i16, i8, i8, %struct.u }
+ %struct.sequence_stack = type { %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack* }
+ %struct.stmt_ann_d = type { %struct.tree_ann_common_d, i8, %struct.basic_block_def*, %struct.stmt_operands_d, %struct.dataflow_d*, %struct.bitmap_head_def*, i32 }
+ %struct.stmt_operands_d = type { %struct.def_optype_d*, %struct.def_optype_d*, %struct.v_may_def_optype_d*, %struct.vuse_optype_d*, %struct.v_may_def_optype_d* }
+ %struct.temp_slot = type opaque
+ %struct.text_info = type { i8*, i8**, i32 }
+ %struct.tree_ann_common_d = type { i32, i8*, %struct.tree_node* }
+ %struct.tree_ann_d = type { %struct.stmt_ann_d }
+ %struct.tree_binfo = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.VEC_tree*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.VEC_tree }
+ %struct.tree_block = type { %struct.tree_common, i8, [3 x i8], %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node* }
+ %struct.tree_common = type { %struct.tree_node*, %struct.tree_node*, %struct.tree_ann_d*, i8, i8, i8, i8, i8 }
+ %struct.tree_complex = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node* }
+ %struct.tree_decl = type { %struct.tree_common, %struct.location_t, i32, %struct.tree_node*, i8, i8, i8, i8, i8, i8, i8, i8, i32, %struct.tree_decl_u1, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, i32, %struct.tree_decl_u2, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_decl* }
+ %struct.tree_decl_u1 = type { i64 }
+ %struct.tree_decl_u1_a = type { i32 }
+ %struct.tree_decl_u2 = type { %struct.function* }
+ %struct.tree_exp = type { %struct.tree_common, %struct.location_t*, i32, %struct.tree_node*, [1 x %struct.tree_node*] }
+ %struct.tree_identifier = type { %struct.tree_common, %struct.ht_identifier }
+ %struct.tree_int_cst = type { %struct.tree_common, %struct.tree_int_cst_lowhi }
+ %struct.tree_int_cst_lowhi = type { i64, i64 }
+ %struct.tree_list = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node* }
+ %struct.tree_node = type { %struct.tree_decl }
+ %struct.tree_phi_node = type { %struct.tree_common, %struct.tree_node*, i32, i32, i32, %struct.basic_block_def*, %struct.dataflow_d*, [1 x %struct.phi_arg_d] }
+ %struct.tree_real_cst = type { %struct.tree_common, %struct.real_value* }
+ %struct.tree_ssa_name = type { %struct.tree_common, %struct.tree_node*, i32, %struct.ptr_info_def*, %struct.tree_node*, i8* }
+ %struct.tree_statement_list = type { %struct.tree_common, %struct.tree_statement_list_node*, %struct.tree_statement_list_node* }
+ %struct.tree_statement_list_node = type { %struct.tree_statement_list_node*, %struct.tree_statement_list_node*, %struct.tree_node* }
+ %struct.tree_stmt_iterator = type { %struct.tree_statement_list_node*, %struct.tree_node* }
+ %struct.tree_string = type { %struct.tree_common, i32, [1 x i8] }
+ %struct.tree_type = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i32, i16, i8, i8, i32, %struct.tree_node*, %struct.tree_node*, %struct.rtunion, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_type* }
+ %struct.tree_type_symtab = type { i32 }
+ %struct.tree_value_handle = type { %struct.tree_common, %struct.value_set*, i32 }
+ %struct.tree_vec = type { %struct.tree_common, i32, [1 x %struct.tree_node*] }
+ %struct.tree_vector = type { %struct.tree_common, %struct.tree_node* }
+ %struct.u = type { [1 x i64] }
+ %struct.use_operand_ptr = type { %struct.tree_node** }
+ %struct.use_optype_d = type { i32, [1 x %struct.def_operand_ptr] }
+ %struct.v_def_use_operand_type_t = type { %struct.tree_node*, %struct.tree_node* }
+ %struct.v_may_def_optype_d = type { i32, [1 x %struct.elt_t] }
+ %struct.v_must_def_optype_d = type { i32, [1 x %struct.elt_t] }
+ %struct.value_set = type opaque
+ %struct.var_ann_d = type { %struct.tree_ann_common_d, i8, i8, %struct.tree_node*, %struct.varray_head_tag*, i32, i32, i32, %struct.tree_node*, %struct.tree_node* }
+ %struct.var_refs_queue = type { %struct.rtx_def*, i32, i32, %struct.var_refs_queue* }
+ %struct.varasm_status = type opaque
+ %struct.varray_data = type { [1 x i64] }
+ %struct.varray_head_tag = type { i32, i32, i32, i8*, %struct.u }
+ %struct.vuse_optype_d = type { i32, [1 x %struct.tree_node*] }
+@gt_pch_rs_gt_gimplify_h = external global [2 x %struct.ggc_root_tab] ; <[2 x %struct.ggc_root_tab]*> [#uses=0]
+@tmp_var_id_num = external global i32 ; <i32*> [#uses=0]
+@gt_ggc_r_gt_gimplify_h = external global [1 x %struct.ggc_root_tab] ; <[1 x %struct.ggc_root_tab]*> [#uses=0]
+@__FUNCTION__.19956 = external global [15 x i8] ; <[15 x i8]*> [#uses=0]
+@str = external global [42 x i8] ; <[42 x i8]*> [#uses=1]
+@__FUNCTION__.19974 = external global [22 x i8] ; <[22 x i8]*> [#uses=0]
+@gimplify_ctxp = external global %struct.gimplify_ctx* ; <%struct.gimplify_ctx**> [#uses=0]
+@cl_pf_opts = external global %struct.cl_perfunc_opts ; <%struct.cl_perfunc_opts*> [#uses=0]
+@__FUNCTION__.20030 = external global [22 x i8] ; <[22 x i8]*> [#uses=0]
+@__FUNCTION__.20099 = external global [24 x i8] ; <[24 x i8]*> [#uses=0]
+@global_trees = external global [47 x %struct.tree_node*] ; <[47 x %struct.tree_node*]*> [#uses=0]
+@tree_code_type = external global [0 x i32] ; <[0 x i32]*> [#uses=2]
+@current_function_decl = external global %struct.tree_node* ; <%struct.tree_node**> [#uses=0]
+@str1 = external global [2 x i8] ; <[2 x i8]*> [#uses=0]
+@str2 = external global [7 x i8] ; <[7 x i8]*> [#uses=0]
+@__FUNCTION__.20151 = external global [19 x i8] ; <[19 x i8]*> [#uses=0]
+@__FUNCTION__.20221 = external global [9 x i8] ; <[9 x i8]*> [#uses=0]
+@tree_code_length = external global [0 x i8] ; <[0 x i8]*> [#uses=0]
+@__FUNCTION__.20435 = external global [17 x i8] ; <[17 x i8]*> [#uses=0]
+@__FUNCTION__.20496 = external global [19 x i8] ; <[19 x i8]*> [#uses=0]
+@cfun = external global %struct.function* ; <%struct.function**> [#uses=0]
+@__FUNCTION__.20194 = external global [15 x i8] ; <[15 x i8]*> [#uses=0]
+@__FUNCTION__.19987 = external global [21 x i8] ; <[21 x i8]*> [#uses=0]
+@__FUNCTION__.20532 = external global [21 x i8] ; <[21 x i8]*> [#uses=0]
+@__FUNCTION__.20583 = external global [19 x i8] ; <[19 x i8]*> [#uses=0]
+@__FUNCTION__.20606 = external global [22 x i8] ; <[22 x i8]*> [#uses=0]
+@__FUNCTION__.20644 = external global [17 x i8] ; <[17 x i8]*> [#uses=0]
+@__FUNCTION__.20681 = external global [13 x i8] ; <[13 x i8]*> [#uses=0]
+@__FUNCTION__.20700 = external global [13 x i8] ; <[13 x i8]*> [#uses=0]
+@__FUNCTION__.21426 = external global [20 x i8] ; <[20 x i8]*> [#uses=0]
+@__FUNCTION__.21471 = external global [17 x i8] ; <[17 x i8]*> [#uses=0]
+@__FUNCTION__.21962 = external global [27 x i8] ; <[27 x i8]*> [#uses=0]
+@__FUNCTION__.22992 = external global [21 x i8] ; <[21 x i8]*> [#uses=0]
+@__FUNCTION__.23735 = external global [15 x i8] ; <[15 x i8]*> [#uses=0]
+@lang_hooks = external global %struct.lang_hooks ; <%struct.lang_hooks*> [#uses=0]
+@__FUNCTION__.27383 = external global [22 x i8] ; <[22 x i8]*> [#uses=0]
+@__FUNCTION__.20776 = external global [21 x i8] ; <[21 x i8]*> [#uses=0]
+@__FUNCTION__.10672 = external global [9 x i8] ; <[9 x i8]*> [#uses=0]
+@str3 = external global [47 x i8] ; <[47 x i8]*> [#uses=0]
+@str4 = external global [7 x i8] ; <[7 x i8]*> [#uses=0]
+@__FUNCTION__.20065 = external global [25 x i8] ; <[25 x i8]*> [#uses=0]
+@__FUNCTION__.23256 = external global [16 x i8] ; <[16 x i8]*> [#uses=0]
+@__FUNCTION__.23393 = external global [19 x i8] ; <[19 x i8]*> [#uses=0]
+@__FUNCTION__.20043 = external global [21 x i8] ; <[21 x i8]*> [#uses=0]
+@__FUNCTION__.20729 = external global [23 x i8] ; <[23 x i8]*> [#uses=0]
+@__FUNCTION__.20563 = external global [24 x i8] ; <[24 x i8]*> [#uses=0]
+@__FUNCTION__.10663 = external global [10 x i8] ; <[10 x i8]*> [#uses=0]
+@__FUNCTION__.20367 = external global [21 x i8] ; <[21 x i8]*> [#uses=0]
+@__FUNCTION__.20342 = external global [15 x i8] ; <[15 x i8]*> [#uses=0]
+@input_location = external global %struct.location_t ; <%struct.location_t*> [#uses=0]
+@__FUNCTION__.24510 = external global [27 x i8] ; <[27 x i8]*> [#uses=0]
+@__FUNCTION__.25097 = external global [25 x i8] ; <[25 x i8]*> [#uses=0]
+@__FUNCTION__.24705 = external global [26 x i8] ; <[26 x i8]*> [#uses=0]
+@str5 = external global [2 x i8] ; <[2 x i8]*> [#uses=0]
+@__FUNCTION__.25136 = external global [21 x i8] ; <[21 x i8]*> [#uses=0]
+@__FUNCTION__.24450 = external global [31 x i8] ; <[31 x i8]*> [#uses=0]
+@implicit_built_in_decls = external global [471 x %struct.tree_node*] ; <[471 x %struct.tree_node*]*> [#uses=0]
+@__FUNCTION__.24398 = external global [31 x i8] ; <[31 x i8]*> [#uses=0]
+@__FUNCTION__.26156 = external global [14 x i8] ; <[14 x i8]*> [#uses=1]
+@unknown_location = external global %struct.location_t ; <%struct.location_t*> [#uses=0]
+@__FUNCTION__.23038 = external global [19 x i8] ; <[19 x i8]*> [#uses=0]
+@str6 = external global [43 x i8] ; <[43 x i8]*> [#uses=0]
+@__FUNCTION__.25476 = external global [19 x i8] ; <[19 x i8]*> [#uses=0]
+@__FUNCTION__.22136 = external global [20 x i8] ; <[20 x i8]*> [#uses=1]
+@__FUNCTION__.21997 = external global [23 x i8] ; <[23 x i8]*> [#uses=0]
+@__FUNCTION__.21247 = external global [19 x i8] ; <[19 x i8]*> [#uses=0]
+@built_in_decls = external global [471 x %struct.tree_node*] ; <[471 x %struct.tree_node*]*> [#uses=0]
+@__FUNCTION__.21924 = external global [19 x i8] ; <[19 x i8]*> [#uses=0]
+@__FUNCTION__.21861 = external global [25 x i8] ; <[25 x i8]*> [#uses=0]
+@global_dc = external global %struct.diagnostic_context* ; <%struct.diagnostic_context**> [#uses=0]
+@__FUNCTION__.25246 = external global [32 x i8] ; <[32 x i8]*> [#uses=0]
+@str7 = external global [4 x i8] ; <[4 x i8]*> [#uses=0]
+@stderr = external global %struct.FILE* ; <%struct.FILE**> [#uses=0]
+@str8 = external global [24 x i8] ; <[24 x i8]*> [#uses=0]
+@str9 = external global [22 x i8] ; <[22 x i8]*> [#uses=0]
+@__FUNCTION__.27653 = external global [21 x i8] ; <[21 x i8]*> [#uses=0]
+@__FUNCTION__.27322 = external global [21 x i8] ; <[21 x i8]*> [#uses=0]
+@__FUNCTION__.27139 = external global [20 x i8] ; <[20 x i8]*> [#uses=0]
+@__FUNCTION__.22462 = external global [23 x i8] ; <[23 x i8]*> [#uses=0]
+@str10 = external global [6 x i8] ; <[6 x i8]*> [#uses=0]
+@__FUNCTION__.25389 = external global [19 x i8] ; <[19 x i8]*> [#uses=0]
+@__FUNCTION__.25650 = external global [18 x i8] ; <[18 x i8]*> [#uses=0]
+@str11 = external global [32 x i8] ; <[32 x i8]*> [#uses=0]
+@str12 = external global [3 x i8] ; <[3 x i8]*> [#uses=0]
+@str13 = external global [44 x i8] ; <[44 x i8]*> [#uses=0]
+@__FUNCTION__.27444 = external global [14 x i8] ; <[14 x i8]*> [#uses=0]
+@timevar_enable = external global i8 ; <i8*> [#uses=0]
+@__FUNCTION__.27533 = external global [23 x i8] ; <[23 x i8]*> [#uses=0]
+@flag_instrument_function_entry_exit = external global i32 ; <i32*> [#uses=0]
+@__FUNCTION__.25331 = external global [23 x i8] ; <[23 x i8]*> [#uses=0]
+@__FUNCTION__.20965 = external global [19 x i8] ; <[19 x i8]*> [#uses=0]
+@str14 = external global [12 x i8] ; <[12 x i8]*> [#uses=0]
+@__FUNCTION__.26053 = external global [21 x i8] ; <[21 x i8]*> [#uses=0]
+@__FUNCTION__.26004 = external global [20 x i8] ; <[20 x i8]*> [#uses=0]
+@str15 = external global [8 x i8] ; <[8 x i8]*> [#uses=0]
+@__FUNCTION__.21584 = external global [21 x i8] ; <[21 x i8]*> [#uses=0]
+@str16 = external global [12 x i8] ; <[12 x i8]*> [#uses=0]
+@__FUNCTION__.25903 = external global [28 x i8] ; <[28 x i8]*> [#uses=0]
+@__FUNCTION__.22930 = external global [23 x i8] ; <[23 x i8]*> [#uses=0]
+@__FUNCTION__.23832 = external global [19 x i8] ; <[19 x i8]*> [#uses=0]
+@str17 = external global [6 x i8] ; <[6 x i8]*> [#uses=0]
+@__FUNCTION__.24620 = external global [24 x i8] ; <[24 x i8]*> [#uses=0]
+@__FUNCTION__.24582 = external global [30 x i8] ; <[30 x i8]*> [#uses=0]
+@__FUNCTION__.21382 = external global [19 x i8] ; <[19 x i8]*> [#uses=0]
+@__FUNCTION__.21117 = external global [21 x i8] ; <[21 x i8]*> [#uses=0]
+
+
+declare void @push_gimplify_context()
+
+declare i32 @gimple_tree_hash(i8*)
+
+declare i32 @iterative_hash_expr(%struct.tree_node*, i32)
+
+declare i32 @gimple_tree_eq(i8*, i8*)
+
+declare i32 @operand_equal_p(%struct.tree_node*, %struct.tree_node*, i32)
+
+declare void @fancy_abort(i8*, i32, i8*)
+
+declare i8* @xcalloc(i32, i32)
+
+declare %struct.htab* @htab_create(i32, i32 (i8*)*, i32 (i8*, i8*)*, void (i8*)*)
+
+declare void @free(i8*)
+
+declare void @gimple_push_bind_expr(%struct.tree_node*)
+
+declare void @gimple_pop_bind_expr()
+
+declare %struct.tree_node* @gimple_current_bind_expr()
+
+declare fastcc void @gimple_push_condition()
+
+declare %struct.tree_node* @create_artificial_label()
+
+declare %struct.tree_node* @build_decl_stat(i32, %struct.tree_node*, %struct.tree_node*)
+
+declare void @tree_class_check_failed(%struct.tree_node*, i32, i8*, i32, i8*)
+
+declare %struct.tree_node* @create_tmp_var_name(i8*)
+
+declare i32 @strlen(i8*)
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
+
+declare i32 @sprintf(i8*, i8*, ...)
+
+declare %struct.tree_node* @get_identifier(i8*)
+
+declare %struct.tree_node* @create_tmp_var_raw(%struct.tree_node*, i8*)
+
+declare %struct.tree_node* @build_qualified_type(%struct.tree_node*, i32)
+
+declare i8* @get_name(%struct.tree_node*)
+
+declare void @tree_operand_check_failed(i32, i32, i8*, i32, i8*)
+
+declare void @tree_check_failed(%struct.tree_node*, i8*, i32, i8*, ...)
+
+declare void @declare_tmp_vars(%struct.tree_node*, %struct.tree_node*)
+
+declare %struct.tree_node* @nreverse(%struct.tree_node*)
+
+declare void @gimple_add_tmp_var(%struct.tree_node*)
+
+declare void @record_vars(%struct.tree_node*)
+
+declare %struct.tree_node* @create_tmp_var(%struct.tree_node*, i8*)
+
+declare void @pop_gimplify_context(%struct.tree_node*)
+
+declare void @htab_delete(%struct.htab*)
+
+declare fastcc void @annotate_one_with_locus(%struct.tree_node*, i32, i32)
+
+declare void @annotate_with_locus(%struct.tree_node*, i32, i32)
+
+declare %struct.tree_node* @mostly_copy_tree_r(%struct.tree_node**, i32*, i8*)
+
+declare %struct.tree_node* @copy_tree_r(%struct.tree_node**, i32*, i8*)
+
+declare %struct.tree_node* @mark_decls_volatile_r(%struct.tree_node**, i32*, i8*)
+
+declare %struct.tree_node* @copy_if_shared_r(%struct.tree_node**, i32*, i8*)
+
+declare %struct.tree_node* @walk_tree(%struct.tree_node**, %struct.tree_node* (%struct.tree_node**, i32*, i8*)*, i8*, %struct.pointer_set_t*)
+
+declare %struct.tree_node* @unmark_visited_r(%struct.tree_node**, i32*, i8*)
+
+declare fastcc void @unshare_body(%struct.tree_node**, %struct.tree_node*)
+
+declare %struct.cgraph_node* @cgraph_node(%struct.tree_node*)
+
+declare fastcc void @unvisit_body(%struct.tree_node**, %struct.tree_node*)
+
+declare void @unshare_all_trees(%struct.tree_node*)
+
+declare %struct.tree_node* @unshare_expr(%struct.tree_node*)
+
+declare %struct.tree_node* @build_and_jump(%struct.tree_node**)
+
+declare %struct.tree_node* @build1_stat(i32, %struct.tree_node*, %struct.tree_node*)
+
+declare i32 @compare_case_labels(i8*, i8*)
+
+declare i32 @tree_int_cst_compare(%struct.tree_node*, %struct.tree_node*)
+
+declare void @sort_case_labels(%struct.tree_node*)
+
+declare void @tree_vec_elt_check_failed(i32, i32, i8*, i32, i8*)
+
+declare void @qsort(i8*, i32, i32, i32 (i8*, i8*)*)
+
+declare %struct.tree_node* @force_labels_r(%struct.tree_node**, i32*, i8*)
+
+declare fastcc void @canonicalize_component_ref(%struct.tree_node**)
+
+declare %struct.tree_node* @get_unwidened(%struct.tree_node*, %struct.tree_node*)
+
+declare fastcc void @maybe_with_size_expr(%struct.tree_node**)
+
+declare %struct.tree_node* @substitute_placeholder_in_expr(%struct.tree_node*, %struct.tree_node*)
+
+declare %struct.tree_node* @build2_stat(i32, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*)
+
+declare fastcc %struct.tree_node* @gimple_boolify(%struct.tree_node*)
+
+declare %struct.tree_node* @convert(%struct.tree_node*, %struct.tree_node*)
+
+declare %struct.tree_node* @gimplify_init_ctor_preeval_1(%struct.tree_node**, i32*, i8*)
+
+declare i64 @get_alias_set(%struct.tree_node*)
+
+declare i32 @alias_sets_conflict_p(i64, i64)
+
+declare fastcc i8 @cpt_same_type(%struct.tree_node*, %struct.tree_node*) zext
+
+declare %struct.tree_node* @check_pointer_types_r(%struct.tree_node**, i32*, i8*)
+
+declare %struct.tree_node* @voidify_wrapper_expr(%struct.tree_node*, %struct.tree_node*)
+
+declare i32 @integer_zerop(%struct.tree_node*)
+
+declare fastcc void @append_to_statement_list_1(%struct.tree_node*, %struct.tree_node**)
+
+declare %struct.tree_node* @alloc_stmt_list()
+
+declare void @tsi_link_after(%struct.tree_stmt_iterator*, %struct.tree_node*, i32)
+
+declare void @append_to_statement_list_force(%struct.tree_node*, %struct.tree_node**)
+
+declare void @append_to_statement_list(%struct.tree_node*, %struct.tree_node**)
+
+declare fastcc %struct.tree_node* @shortcut_cond_r(%struct.tree_node*, %struct.tree_node**, %struct.tree_node**)
+
+declare %struct.tree_node* @build3_stat(i32, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*)
+
+declare fastcc %struct.tree_node* @shortcut_cond_expr(%struct.tree_node*)
+
+declare %struct.tree_node* @expr_last(%struct.tree_node*)
+
+declare i8 @block_may_fallthru(%struct.tree_node*) zext
+
+declare fastcc void @gimple_pop_condition(%struct.tree_node**)
+
+declare %struct.tree_node* @gimple_build_eh_filter(%struct.tree_node*, %struct.tree_node*, %struct.tree_node*)
+
+declare void @annotate_all_with_locus(%struct.tree_node**, i32, i32)
+
+declare fastcc %struct.tree_node* @internal_get_tmp_var(%struct.tree_node*, %struct.tree_node**, %struct.tree_node**, i8 zext )
+
+define i32 @gimplify_expr(%struct.tree_node** %expr_p, %struct.tree_node** %pre_p, %struct.tree_node** %post_p, i8 (%struct.tree_node*) zext * %gimple_test_f, i32 %fallback) {
+entry:
+ %internal_post = alloca %struct.tree_node*, align 4 ; <%struct.tree_node**> [#uses=2]
+ %pre_p_addr.0 = select i1 false, %struct.tree_node** null, %struct.tree_node** %pre_p ; <%struct.tree_node**> [#uses=7]
+ %post_p_addr.0 = select i1 false, %struct.tree_node** %internal_post, %struct.tree_node** %post_p ; <%struct.tree_node**> [#uses=7]
+ br i1 false, label %bb277, label %bb191
+
+bb191: ; preds = %entry
+ ret i32 0
+
+bb277: ; preds = %entry
+ %tmp283 = call i32 null( %struct.tree_node** %expr_p, %struct.tree_node** %pre_p_addr.0, %struct.tree_node** %post_p_addr.0 ) ; <i32> [#uses=1]
+ switch i32 %tmp283, label %bb7478 [
+ i32 0, label %cond_next289
+ i32 -1, label %cond_next298
+ ]
+
+cond_next289: ; preds = %bb277
+ ret i32 0
+
+cond_next298: ; preds = %bb277
+ switch i32 0, label %bb7444 [
+ i32 24, label %bb7463
+ i32 25, label %bb7463
+ i32 26, label %bb7463
+ i32 27, label %bb7463
+ i32 28, label %bb7463
+ i32 33, label %bb4503
+ i32 39, label %bb397
+ i32 40, label %bb5650
+ i32 41, label %bb4339
+ i32 42, label %bb4350
+ i32 43, label %bb4350
+ i32 44, label %bb319
+ i32 45, label %bb397
+ i32 46, label %bb6124
+ i32 47, label %bb7463
+ i32 49, label %bb5524
+ i32 50, label %bb1283
+ i32 51, label %bb1289
+ i32 52, label %bb1289
+ i32 53, label %bb5969
+ i32 54, label %bb408
+ i32 56, label %bb5079
+ i32 57, label %bb428
+ i32 59, label %bb5965
+ i32 74, label %bb4275
+ i32 75, label %bb4275
+ i32 76, label %bb4275
+ i32 77, label %bb4275
+ i32 91, label %bb1296
+ i32 92, label %bb1296
+ i32 96, label %bb1322
+ i32 112, label %bb2548
+ i32 113, label %bb2548
+ i32 115, label %bb397
+ i32 116, label %bb5645
+ i32 117, label %bb1504
+ i32 121, label %bb397
+ i32 122, label %bb397
+ i32 123, label %bb313
+ i32 124, label %bb313
+ i32 125, label %bb313
+ i32 126, label %bb313
+ i32 127, label %bb2141
+ i32 128, label %cond_next5873
+ i32 129, label %cond_next5873
+ i32 130, label %bb4536
+ i32 131, label %bb5300
+ i32 132, label %bb5170
+ i32 133, label %bb5519
+ i32 134, label %bb5091
+ i32 135, label %bb5083
+ i32 136, label %bb5087
+ i32 137, label %bb5382
+ i32 139, label %bb7463
+ i32 140, label %bb7463
+ i32 142, label %bb5974
+ i32 143, label %bb6049
+ i32 147, label %bb6296
+ i32 151, label %cond_next6474
+ ]
+
+bb313: ; preds = %cond_next298, %cond_next298, %cond_next298, %cond_next298
+ ret i32 0
+
+bb319: ; preds = %cond_next298
+ ret i32 0
+
+bb397: ; preds = %cond_next298, %cond_next298, %cond_next298, %cond_next298, %cond_next298
+ ret i32 0
+
+bb408: ; preds = %cond_next298
+ %tmp413 = call fastcc i32 @gimplify_cond_expr( %struct.tree_node** %expr_p, %struct.tree_node** %pre_p_addr.0, %struct.tree_node** %post_p_addr.0, %struct.tree_node* null, i32 %fallback ) ; <i32> [#uses=0]
+ ret i32 0
+
+bb428: ; preds = %cond_next298
+ ret i32 0
+
+bb1283: ; preds = %cond_next298
+ ret i32 0
+
+bb1289: ; preds = %cond_next298, %cond_next298
+ ret i32 0
+
+bb1296: ; preds = %cond_next298, %cond_next298
+ ret i32 0
+
+bb1322: ; preds = %cond_next298
+ ret i32 0
+
+bb1504: ; preds = %cond_next298
+ ret i32 0
+
+bb2141: ; preds = %cond_next298
+ ret i32 0
+
+bb2548: ; preds = %cond_next298, %cond_next298
+ %tmp2554 = load %struct.tree_node** %expr_p ; <%struct.tree_node*> [#uses=2]
+ %tmp2562 = and i32 0, 255 ; <i32> [#uses=1]
+ %tmp2569 = add i8 0, -4 ; <i8> [#uses=1]
+ icmp ugt i8 %tmp2569, 5 ; <i1>:0 [#uses=2]
+ %tmp2587 = load i8* null ; <i8> [#uses=1]
+ icmp eq i8 %tmp2587, 0 ; <i1>:1 [#uses=2]
+ %tmp2607 = load %struct.tree_node** null ; <%struct.tree_node*> [#uses=2]
+ br i1 false, label %bb2754, label %cond_next2617
+
+cond_next2617: ; preds = %bb2548
+ ret i32 0
+
+bb2754: ; preds = %bb2548
+ br i1 %0, label %cond_true2780, label %cond_next2783
+
+cond_true2780: ; preds = %bb2754
+ call void @tree_class_check_failed( %struct.tree_node* %tmp2554, i32 9, i8* getelementptr ([42 x i8]* @str, i32 0, i32 0), i32 1415, i8* getelementptr ([20 x i8]* @__FUNCTION__.22136, i32 0, i32 0) )
+ unreachable
+
+cond_next2783: ; preds = %bb2754
+ %tmp2825 = and i32 0, 255 ; <i32> [#uses=1]
+ %tmp2829 = load i32* null ; <i32> [#uses=1]
+ %tmp28292830 = trunc i32 %tmp2829 to i8 ; <i8> [#uses=1]
+ %tmp2832 = add i8 %tmp28292830, -4 ; <i8> [#uses=1]
+ icmp ugt i8 %tmp2832, 5 ; <i1>:2 [#uses=1]
+ icmp eq i8 0, 0 ; <i1>:3 [#uses=1]
+ %tmp28652866 = bitcast %struct.tree_node* %tmp2607 to %struct.tree_exp* ; <%struct.tree_exp*> [#uses=1]
+ %tmp2868 = getelementptr %struct.tree_exp* %tmp28652866, i32 0, i32 4, i32 0 ; <%struct.tree_node**> [#uses=1]
+ %tmp2870 = load %struct.tree_node** %tmp2868 ; <%struct.tree_node*> [#uses=1]
+ br i1 %1, label %cond_true2915, label %cond_next2927
+
+cond_true2915: ; preds = %cond_next2783
+ unreachable
+
+cond_next2927: ; preds = %cond_next2783
+ %tmp2938 = load %struct.tree_node** null ; <%struct.tree_node*> [#uses=1]
+ %tmp2944 = load i32* null ; <i32> [#uses=1]
+ %tmp2946 = and i32 %tmp2944, 255 ; <i32> [#uses=1]
+ %tmp2949 = getelementptr [0 x i32]* @tree_code_type, i32 0, i32 %tmp2946 ; <i32*> [#uses=1]
+ %tmp2950 = load i32* %tmp2949 ; <i32> [#uses=1]
+ icmp eq i32 %tmp2950, 2 ; <i1>:4 [#uses=1]
+ br i1 %4, label %cond_next2954, label %cond_true2951
+
+cond_true2951: ; preds = %cond_next2927
+ call void @tree_class_check_failed( %struct.tree_node* %tmp2938, i32 2, i8* getelementptr ([42 x i8]* @str, i32 0, i32 0), i32 1415, i8* getelementptr ([20 x i8]* @__FUNCTION__.22136, i32 0, i32 0) )
+ unreachable
+
+cond_next2954: ; preds = %cond_next2927
+ br i1 %0, label %cond_true2991, label %cond_next2994
+
+cond_true2991: ; preds = %cond_next2954
+ unreachable
+
+cond_next2994: ; preds = %cond_next2954
+ br i1 %1, label %cond_true3009, label %cond_next3021
+
+cond_true3009: ; preds = %cond_next2994
+ call void @tree_operand_check_failed( i32 0, i32 %tmp2562, i8* getelementptr ([42 x i8]* @str, i32 0, i32 0), i32 1415, i8* getelementptr ([20 x i8]* @__FUNCTION__.22136, i32 0, i32 0) )
+ unreachable
+
+cond_next3021: ; preds = %cond_next2994
+ br i1 %2, label %cond_true3044, label %cond_next3047
+
+cond_true3044: ; preds = %cond_next3021
+ call void @tree_class_check_failed( %struct.tree_node* %tmp2607, i32 9, i8* getelementptr ([42 x i8]* @str, i32 0, i32 0), i32 1415, i8* getelementptr ([20 x i8]* @__FUNCTION__.22136, i32 0, i32 0) )
+ unreachable
+
+cond_next3047: ; preds = %cond_next3021
+ br i1 %3, label %cond_true3062, label %cond_next3074
+
+cond_true3062: ; preds = %cond_next3047
+ call void @tree_operand_check_failed( i32 0, i32 %tmp2825, i8* getelementptr ([42 x i8]* @str, i32 0, i32 0), i32 1415, i8* getelementptr ([20 x i8]* @__FUNCTION__.22136, i32 0, i32 0) )
+ unreachable
+
+cond_next3074: ; preds = %cond_next3047
+ %tmp3084 = getelementptr %struct.tree_node* %tmp2870, i32 0, i32 0, i32 0, i32 1 ; <%struct.tree_node**> [#uses=1]
+ %tmp3085 = load %struct.tree_node** %tmp3084 ; <%struct.tree_node*> [#uses=1]
+ %tmp31043105 = bitcast %struct.tree_node* %tmp3085 to %struct.tree_type* ; <%struct.tree_type*> [#uses=1]
+ %tmp3106 = getelementptr %struct.tree_type* %tmp31043105, i32 0, i32 6 ; <i16*> [#uses=1]
+ %tmp31063107 = bitcast i16* %tmp3106 to i32* ; <i32*> [#uses=1]
+ %tmp3108 = load i32* %tmp31063107 ; <i32> [#uses=1]
+ xor i32 %tmp3108, 0 ; <i32>:5 [#uses=1]
+ %tmp81008368 = and i32 %5, 65024 ; <i32> [#uses=1]
+ icmp eq i32 %tmp81008368, 0 ; <i1>:6 [#uses=1]
+ br i1 %6, label %cond_next3113, label %bb3351
+
+cond_next3113: ; preds = %cond_next3074
+ ret i32 0
+
+bb3351: ; preds = %cond_next3074
+ %tmp3354 = call i8 @tree_ssa_useless_type_conversion( %struct.tree_node* %tmp2554 ) zext ; <i8> [#uses=1]
+ icmp eq i8 %tmp3354, 0 ; <i1>:7 [#uses=1]
+ %tmp3424 = load i32* null ; <i32> [#uses=1]
+ br i1 %7, label %cond_next3417, label %cond_true3356
+
+cond_true3356: ; preds = %bb3351
+ ret i32 0
+
+cond_next3417: ; preds = %bb3351
+ br i1 false, label %cond_true3429, label %cond_next4266
+
+cond_true3429: ; preds = %cond_next3417
+ %tmp3443 = and i32 %tmp3424, 255 ; <i32> [#uses=0]
+ ret i32 0
+
+cond_next4266: ; preds = %cond_next3417
+ %tmp4268 = load %struct.tree_node** %expr_p ; <%struct.tree_node*> [#uses=1]
+ icmp eq %struct.tree_node* %tmp4268, null ; <i1>:8 [#uses=1]
+ br i1 %8, label %bb4275, label %bb7463
+
+bb4275: ; preds = %cond_next4266, %cond_next298, %cond_next298, %cond_next298, %cond_next298
+ %tmp4289 = and i32 0, 255 ; <i32> [#uses=2]
+ %tmp4292 = getelementptr [0 x i32]* @tree_code_type, i32 0, i32 %tmp4289 ; <i32*> [#uses=1]
+ %tmp4293 = load i32* %tmp4292 ; <i32> [#uses=1]
+ %tmp42934294 = trunc i32 %tmp4293 to i8 ; <i8> [#uses=1]
+ %tmp4296 = add i8 %tmp42934294, -4 ; <i8> [#uses=1]
+ icmp ugt i8 %tmp4296, 5 ; <i1>:9 [#uses=1]
+ br i1 %9, label %cond_true4297, label %cond_next4300
+
+cond_true4297: ; preds = %bb4275
+ unreachable
+
+cond_next4300: ; preds = %bb4275
+ %tmp4314 = load i8* null ; <i8> [#uses=1]
+ icmp eq i8 %tmp4314, 0 ; <i1>:10 [#uses=1]
+ br i1 %10, label %cond_true4315, label %cond_next4327
+
+cond_true4315: ; preds = %cond_next4300
+ call void @tree_operand_check_failed( i32 0, i32 %tmp4289, i8* getelementptr ([42 x i8]* @str, i32 0, i32 0), i32 3997, i8* getelementptr ([14 x i8]* @__FUNCTION__.26156, i32 0, i32 0) )
+ unreachable
+
+cond_next4327: ; preds = %cond_next4300
+ %tmp4336 = call i32 @gimplify_expr( %struct.tree_node** null, %struct.tree_node** %pre_p_addr.0, %struct.tree_node** %post_p_addr.0, i8 (%struct.tree_node*) zext * @is_gimple_val, i32 1 ) ; <i32> [#uses=0]
+ ret i32 0
+
+bb4339: ; preds = %cond_next298
+ ret i32 0
+
+bb4350: ; preds = %cond_next298, %cond_next298
+ ret i32 0
+
+bb4503: ; preds = %cond_next298
+ ret i32 0
+
+bb4536: ; preds = %cond_next298
+ ret i32 0
+
+bb5079: ; preds = %cond_next298
+ ret i32 0
+
+bb5083: ; preds = %cond_next298
+ ret i32 0
+
+bb5087: ; preds = %cond_next298
+ ret i32 0
+
+bb5091: ; preds = %cond_next298
+ ret i32 0
+
+bb5170: ; preds = %cond_next298
+ ret i32 0
+
+bb5300: ; preds = %cond_next298
+ ret i32 0
+
+bb5382: ; preds = %cond_next298
+ ret i32 0
+
+bb5519: ; preds = %cond_next298
+ ret i32 0
+
+bb5524: ; preds = %cond_next298
+ ret i32 0
+
+bb5645: ; preds = %cond_next298
+ ret i32 0
+
+bb5650: ; preds = %cond_next298
+ ret i32 0
+
+cond_next5873: ; preds = %cond_next298, %cond_next298
+ ret i32 0
+
+bb5965: ; preds = %cond_next298
+ %tmp5968 = call fastcc i32 @gimplify_cleanup_point_expr( %struct.tree_node** %expr_p, %struct.tree_node** %pre_p_addr.0 ) ; <i32> [#uses=0]
+ ret i32 0
+
+bb5969: ; preds = %cond_next298
+ %tmp5973 = call fastcc i32 @gimplify_target_expr( %struct.tree_node** %expr_p, %struct.tree_node** %pre_p_addr.0, %struct.tree_node** %post_p_addr.0 ) ; <i32> [#uses=0]
+ ret i32 0
+
+bb5974: ; preds = %cond_next298
+ ret i32 0
+
+bb6049: ; preds = %cond_next298
+ ret i32 0
+
+bb6124: ; preds = %cond_next298
+ ret i32 0
+
+bb6296: ; preds = %cond_next298
+ ret i32 0
+
+cond_next6474: ; preds = %cond_next298
+ icmp eq %struct.tree_node** %internal_post, %post_p_addr.0 ; <i1>:11 [#uses=1]
+ %iftmp.381.0 = select i1 %11, %struct.tree_node** null, %struct.tree_node** %post_p_addr.0 ; <%struct.tree_node**> [#uses=1]
+ %tmp6490 = call i32 @gimplify_expr( %struct.tree_node** null, %struct.tree_node** %pre_p_addr.0, %struct.tree_node** %iftmp.381.0, i8 (%struct.tree_node*) zext * %gimple_test_f, i32 %fallback ) ; <i32> [#uses=0]
+ %tmp6551 = call i32 @gimplify_expr( %struct.tree_node** null, %struct.tree_node** %pre_p_addr.0, %struct.tree_node** %post_p_addr.0, i8 (%struct.tree_node*) zext * @is_gimple_val, i32 1 ) ; <i32> [#uses=0]
+ ret i32 0
+
+bb7444: ; preds = %cond_next298
+ ret i32 0
+
+bb7463: ; preds = %cond_next4266, %cond_next298, %cond_next298, %cond_next298, %cond_next298, %cond_next298, %cond_next298, %cond_next298, %cond_next298
+ ret i32 0
+
+bb7478: ; preds = %bb277
+ ret i32 0
+}
+
+declare i8 @is_gimple_formal_tmp_rhs(%struct.tree_node*) zext
+
+declare void @gimplify_and_add(%struct.tree_node*, %struct.tree_node**)
+
+declare %struct.tree_node* @get_initialized_tmp_var(%struct.tree_node*, %struct.tree_node**, %struct.tree_node**)
+
+declare %struct.tree_node* @get_formal_tmp_var(%struct.tree_node*, %struct.tree_node**)
+
+declare fastcc void @gimplify_init_ctor_preeval(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**, %struct.gimplify_init_ctor_preeval_data*)
+
+declare i8 @type_contains_placeholder_p(%struct.tree_node*) zext
+
+declare i8 @is_gimple_mem_rhs(%struct.tree_node*) zext
+
+declare fastcc i32 @gimplify_modify_expr_rhs(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**, %struct.tree_node**, %struct.tree_node**, i8 zext )
+
+declare %struct.tree_node* @fold_indirect_ref(%struct.tree_node*)
+
+declare fastcc i32 @gimplify_compound_expr(%struct.tree_node**, %struct.tree_node**, i8 zext )
+
+declare i8 @is_gimple_lvalue(%struct.tree_node*) zext
+
+declare void @categorize_ctor_elements(%struct.tree_node*, i64*, i64*, i64*, i8*)
+
+declare void @lhd_set_decl_assembler_name(%struct.tree_node*)
+
+declare i64 @int_size_in_bytes(%struct.tree_node*)
+
+declare i32 @can_move_by_pieces(i64, i32)
+
+declare i64 @count_type_elements(%struct.tree_node*)
+
+declare void @gimplify_stmt(%struct.tree_node**)
+
+declare %struct.tree_node* @get_base_address(%struct.tree_node*)
+
+declare fastcc void @gimplify_init_ctor_eval(%struct.tree_node*, %struct.tree_node*, %struct.tree_node**, i8 zext )
+
+declare %struct.tree_node* @build_complex(%struct.tree_node*, %struct.tree_node*, %struct.tree_node*)
+
+declare i8 (%struct.tree_node*) zext * @rhs_predicate_for(%struct.tree_node*)
+
+declare %struct.tree_node* @build_vector(%struct.tree_node*, %struct.tree_node*)
+
+declare i8 @is_gimple_val(%struct.tree_node*) zext
+
+declare i8 @is_gimple_reg_type(%struct.tree_node*) zext
+
+declare fastcc i32 @gimplify_cond_expr(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**, %struct.tree_node*, i32)
+
+declare fastcc i32 @gimplify_modify_expr(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**, i8 zext )
+
+declare %struct.tree_node* @tree_cons_stat(%struct.tree_node*, %struct.tree_node*, %struct.tree_node*)
+
+declare %struct.tree_node* @build_fold_addr_expr(%struct.tree_node*)
+
+declare %struct.tree_node* @build_function_call_expr(%struct.tree_node*, %struct.tree_node*)
+
+declare i8 @is_gimple_addressable(%struct.tree_node*) zext
+
+declare i8 @is_gimple_reg(%struct.tree_node*) zext
+
+declare %struct.tree_node* @make_ssa_name(%struct.tree_node*, %struct.tree_node*)
+
+declare i8 @tree_ssa_useless_type_conversion(%struct.tree_node*) zext
+
+declare fastcc i32 @gimplify_self_mod_expr(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**, i8 zext )
+
+declare fastcc i32 @gimplify_compound_lval(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**, i32)
+
+declare %struct.tree_node* @get_callee_fndecl(%struct.tree_node*)
+
+declare %struct.tree_node* @fold_builtin(%struct.tree_node*, i8 zext )
+
+declare void @error(i8*, ...)
+
+declare %struct.tree_node* @build_empty_stmt()
+
+declare i8 @fold_builtin_next_arg(%struct.tree_node*) zext
+
+declare fastcc i32 @gimplify_arg(%struct.tree_node**, %struct.tree_node**)
+
+declare i8 @is_gimple_call_addr(%struct.tree_node*) zext
+
+declare i32 @call_expr_flags(%struct.tree_node*)
+
+declare void @recalculate_side_effects(%struct.tree_node*)
+
+declare %struct.tree_node* @fold_convert(%struct.tree_node*, %struct.tree_node*)
+
+declare void @recompute_tree_invarant_for_addr_expr(%struct.tree_node*)
+
+declare i32 @gimplify_va_arg_expr(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**)
+
+declare %struct.tree_node* @size_int_kind(i64, i32)
+
+declare %struct.tree_node* @size_binop(i32, %struct.tree_node*, %struct.tree_node*)
+
+declare %struct.tree_node* @build4_stat(i32, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*)
+
+declare void @gimplify_type_sizes(%struct.tree_node*, %struct.tree_node**)
+
+declare void @gimplify_one_sizepos(%struct.tree_node**, %struct.tree_node**)
+
+declare %struct.tree_node* @build_pointer_type(%struct.tree_node*)
+
+declare %struct.tree_node* @build_fold_indirect_ref(%struct.tree_node*)
+
+declare fastcc i32 @gimplify_bind_expr(%struct.tree_node**, %struct.tree_node*, %struct.tree_node**)
+
+declare fastcc void @gimplify_loop_expr(%struct.tree_node**, %struct.tree_node**)
+
+declare fastcc i32 @gimplify_switch_expr(%struct.tree_node**, %struct.tree_node**)
+
+declare %struct.tree_node* @decl_function_context(%struct.tree_node*)
+
+declare %struct.varray_head_tag* @varray_grow(%struct.varray_head_tag*, i32)
+
+declare fastcc void @gimplify_return_expr(%struct.tree_node*, %struct.tree_node**)
+
+declare fastcc i32 @gimplify_save_expr(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**)
+
+declare fastcc i32 @gimplify_asm_expr(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**)
+
+declare void @gimplify_to_stmt_list(%struct.tree_node**)
+
+declare fastcc i32 @gimplify_cleanup_point_expr(%struct.tree_node**, %struct.tree_node**)
+
+declare fastcc i32 @gimplify_target_expr(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**)
+
+declare void @tsi_delink(%struct.tree_stmt_iterator*)
+
+declare void @tsi_link_before(%struct.tree_stmt_iterator*, %struct.tree_node*, i32)
+
+declare i8 @is_gimple_stmt(%struct.tree_node*) zext
+
+declare void @print_generic_expr(%struct.FILE*, %struct.tree_node*, i32)
+
+declare void @debug_tree(%struct.tree_node*)
+
+declare void @internal_error(i8*, ...)
+
+declare %struct.tree_node* @force_gimple_operand(%struct.tree_node*, %struct.tree_node**, i8 zext , %struct.tree_node*)
+
+declare i8 @is_gimple_reg_rhs(%struct.tree_node*) zext
+
+declare void @add_referenced_tmp_var(%struct.tree_node*)
+
+declare i8 @contains_placeholder_p(%struct.tree_node*) zext
+
+declare %struct.varray_head_tag* @varray_init(i32, i32, i8*)
+
+declare i32 @handled_component_p(%struct.tree_node*)
+
+declare void @varray_check_failed(%struct.varray_head_tag*, i32, i8*, i32, i8*)
+
+declare %struct.tree_node* @array_ref_low_bound(%struct.tree_node*)
+
+declare i8 @is_gimple_min_invariant(%struct.tree_node*) zext
+
+declare i8 @is_gimple_formal_tmp_reg(%struct.tree_node*) zext
+
+declare %struct.tree_node* @array_ref_element_size(%struct.tree_node*)
+
+declare %struct.tree_node* @component_ref_field_offset(%struct.tree_node*)
+
+declare i8 @is_gimple_min_lval(%struct.tree_node*) zext
+
+declare void @varray_underflow(%struct.varray_head_tag*, i8*, i32, i8*)
+
+declare i32 @list_length(%struct.tree_node*)
+
+declare i8 @parse_output_constraint(i8**, i32, i32, i32, i8*, i8*, i8*) zext
+
+declare i8* @xstrdup(i8*)
+
+declare %struct.tree_node* @build_string(i32, i8*)
+
+declare i8* @strchr(i8*, i32)
+
+declare %struct.tree_node* @build_tree_list_stat(%struct.tree_node*, %struct.tree_node*)
+
+declare %struct.tree_node* @chainon(%struct.tree_node*, %struct.tree_node*)
+
+declare i8 @parse_input_constraint(i8**, i32, i32, i32, i32, i8**, i8*, i8*) zext
+
+declare i8 @is_gimple_asm_val(%struct.tree_node*) zext
+
+declare void @gimplify_body(%struct.tree_node**, %struct.tree_node*, i8 zext )
+
+declare void @timevar_push_1(i32)
+
+declare %struct.tree_node* @gimplify_parameters()
+
+declare %struct.tree_node* @expr_only(%struct.tree_node*)
+
+declare void @timevar_pop_1(i32)
+
+declare void @gimplify_function_tree(%struct.tree_node*)
+
+declare void @allocate_struct_function(%struct.tree_node*)
+
+declare %struct.tree_node* @make_tree_vec_stat(i32)
+
+declare %struct.tree_node* @tsi_split_statement_list_after(%struct.tree_stmt_iterator*)
+
+declare i8 @is_gimple_condexpr(%struct.tree_node*) zext
+
+declare %struct.tree_node* @invert_truthvalue(%struct.tree_node*)
+
+declare i8 @initializer_zerop(%struct.tree_node*) zext
+
+declare i32 @simple_cst_equal(%struct.tree_node*, %struct.tree_node*)
+
+declare i32 @aggregate_value_p(%struct.tree_node*, %struct.tree_node*)
+
+declare i32 @fwrite(i8*, i32, i32, %struct.FILE*)
diff --git a/test/CodeGen/ARM/2007-03-27-RegScavengerAssert.ll b/test/CodeGen/ARM/2007-03-27-RegScavengerAssert.ll
new file mode 100644
index 0000000..f927ef4
--- /dev/null
+++ b/test/CodeGen/ARM/2007-03-27-RegScavengerAssert.ll
@@ -0,0 +1,35 @@
+; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi
+; PR1279
+
+ %struct.rtx_def = type { i16, i8, i8, %struct.u }
+ %struct.u = type { [1 x i64] }
+
+define fastcc void @find_reloads_address(%struct.rtx_def** %loc) {
+entry:
+ %ad_addr = alloca %struct.rtx_def* ; <%struct.rtx_def**> [#uses=2]
+ br i1 false, label %cond_next416, label %cond_true340
+
+cond_true340: ; preds = %entry
+ ret void
+
+cond_next416: ; preds = %entry
+ %tmp1085 = load %struct.rtx_def** %ad_addr ; <%struct.rtx_def*> [#uses=1]
+ br i1 false, label %bb1084, label %cond_true418
+
+cond_true418: ; preds = %cond_next416
+ ret void
+
+bb1084: ; preds = %cond_next416
+ br i1 false, label %cond_true1092, label %cond_next1102
+
+cond_true1092: ; preds = %bb1084
+ %tmp1094 = getelementptr %struct.rtx_def* %tmp1085, i32 0, i32 3 ; <%struct.u*> [#uses=1]
+ %tmp10981099 = bitcast %struct.u* %tmp1094 to %struct.rtx_def** ; <%struct.rtx_def**> [#uses=2]
+ %tmp1101 = load %struct.rtx_def** %tmp10981099 ; <%struct.rtx_def*> [#uses=1]
+ store %struct.rtx_def* %tmp1101, %struct.rtx_def** %ad_addr
+ br label %cond_next1102
+
+cond_next1102: ; preds = %cond_true1092, %bb1084
+ %loc_addr.0 = phi %struct.rtx_def** [ %tmp10981099, %cond_true1092 ], [ %loc, %bb1084 ] ; <%struct.rtx_def**> [#uses=0]
+ ret void
+}
diff --git a/test/CodeGen/ARM/2007-03-30-RegScavengerAssert.ll b/test/CodeGen/ARM/2007-03-30-RegScavengerAssert.ll
new file mode 100644
index 0000000..55d2993
--- /dev/null
+++ b/test/CodeGen/ARM/2007-03-30-RegScavengerAssert.ll
@@ -0,0 +1,101 @@
+; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi
+; PR1279
+
+ %struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32 }
+ %struct.arm_stack_offsets = type { i32, i32, i32, i32, i32 }
+ %struct.eh_status = type opaque
+ %struct.emit_status = type { i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack*, i32, %struct.location_t, i32, i8*, %struct.rtx_def** }
+ %struct.expr_status = type { i32, i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def* }
+ %struct.function = type { %struct.eh_status*, %struct.expr_status*, %struct.emit_status*, %struct.varasm_status*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.function*, i32, i32, i32, i32, %struct.rtx_def*, %struct.CUMULATIVE_ARGS, %struct.rtx_def*, %struct.rtx_def*, %struct.initial_value_struct*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, i8, i32, i64, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, %struct.varray_head_tag*, %struct.temp_slot*, i32, %struct.var_refs_queue*, i32, i32, %struct.rtvec_def*, %struct.tree_node*, i32, i32, i32, %struct.machine_function*, i32, i32, i8, i8, %struct.language_function*, %struct.rtx_def*, i32, i32, i32, i32, %struct.location_t, %struct.varray_head_tag*, %struct.tree_node*, i8, i8, i8 }
+ %struct.initial_value_struct = type opaque
+ %struct.lang_decl = type opaque
+ %struct.language_function = type opaque
+ %struct.location_t = type { i8*, i32 }
+ %struct.machine_function = type { %struct.rtx_def*, i32, i32, i32, %struct.arm_stack_offsets, i32, i32, i32, [14 x %struct.rtx_def*] }
+ %struct.rtvec_def = type { i32, [1 x %struct.rtx_def*] }
+ %struct.rtx_def = type { i16, i8, i8, %struct.u }
+ %struct.sequence_stack = type { %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack* }
+ %struct.temp_slot = type opaque
+ %struct.tree_common = type { %struct.tree_node*, %struct.tree_node*, %union.tree_ann_d*, i8, i8, i8, i8, i8 }
+ %struct.tree_decl = type { %struct.tree_common, %struct.location_t, i32, %struct.tree_node*, i8, i8, i8, i8, i8, i8, i8, i8, i32, %struct.tree_decl_u1, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, i32, %struct.tree_decl_u2, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_decl* }
+ %struct.tree_decl_u1 = type { i64 }
+ %struct.tree_decl_u2 = type { %struct.function* }
+ %struct.tree_node = type { %struct.tree_decl }
+ %struct.u = type { [1 x i64] }
+ %struct.var_refs_queue = type { %struct.rtx_def*, i32, i32, %struct.var_refs_queue* }
+ %struct.varasm_status = type opaque
+ %struct.varray_head_tag = type { i32, i32, i32, i8*, %struct.u }
+ %union.tree_ann_d = type opaque
+@str469 = external global [42 x i8] ; <[42 x i8]*> [#uses=0]
+@__FUNCTION__.24265 = external global [19 x i8] ; <[19 x i8]*> [#uses=0]
+
+declare void @fancy_abort()
+
+define fastcc void @fold_builtin_bitop() {
+entry:
+ br i1 false, label %cond_true105, label %UnifiedReturnBlock
+
+cond_true105: ; preds = %entry
+ br i1 false, label %cond_true134, label %UnifiedReturnBlock
+
+cond_true134: ; preds = %cond_true105
+ switch i32 0, label %bb479 [
+ i32 378, label %bb313
+ i32 380, label %bb313
+ i32 381, label %bb313
+ i32 383, label %bb366
+ i32 385, label %bb366
+ i32 386, label %bb366
+ i32 403, label %bb250
+ i32 405, label %bb250
+ i32 406, label %bb250
+ i32 434, label %bb464
+ i32 436, label %bb464
+ i32 437, label %bb464
+ i32 438, label %bb441
+ i32 440, label %bb441
+ i32 441, label %bb441
+ ]
+
+bb250: ; preds = %cond_true134, %cond_true134, %cond_true134
+ ret void
+
+bb313: ; preds = %cond_true134, %cond_true134, %cond_true134
+ ret void
+
+bb366: ; preds = %cond_true134, %cond_true134, %cond_true134
+ ret void
+
+bb441: ; preds = %cond_true134, %cond_true134, %cond_true134
+ ret void
+
+bb457: ; preds = %bb464, %bb457
+ %tmp459 = add i64 0, 1 ; <i64> [#uses=1]
+ br i1 false, label %bb474.preheader, label %bb457
+
+bb464: ; preds = %cond_true134, %cond_true134, %cond_true134
+ br i1 false, label %bb474.preheader, label %bb457
+
+bb474.preheader: ; preds = %bb464, %bb457
+ %result.5.ph = phi i64 [ 0, %bb464 ], [ %tmp459, %bb457 ] ; <i64> [#uses=1]
+ br label %bb474
+
+bb467: ; preds = %bb474
+ %indvar.next586 = add i64 %indvar585, 1 ; <i64> [#uses=1]
+ br label %bb474
+
+bb474: ; preds = %bb467, %bb474.preheader
+ %indvar585 = phi i64 [ 0, %bb474.preheader ], [ %indvar.next586, %bb467 ] ; <i64> [#uses=2]
+ br i1 false, label %bb476, label %bb467
+
+bb476: ; preds = %bb474
+ %result.5 = add i64 %indvar585, %result.5.ph ; <i64> [#uses=0]
+ ret void
+
+bb479: ; preds = %cond_true134
+ tail call void @fancy_abort( )
+ unreachable
+
+UnifiedReturnBlock: ; preds = %cond_true105, %entry
+ ret void
+}
diff --git a/test/CodeGen/ARM/2007-04-02-RegScavengerAssert.ll b/test/CodeGen/ARM/2007-04-02-RegScavengerAssert.ll
new file mode 100644
index 0000000..ef5a1ae
--- /dev/null
+++ b/test/CodeGen/ARM/2007-04-02-RegScavengerAssert.ll
@@ -0,0 +1,55 @@
+; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-apple-darwin
+
+ %struct.H_TBL = type { [17 x i8], [256 x i8], i32 }
+ %struct.Q_TBL = type { [64 x i16], i32 }
+ %struct.anon = type { [80 x i8] }
+ %struct.X_c_coef_ccler = type { void (%struct.X_Y*, i32)*, i32 (%struct.X_Y*, i8***)* }
+ %struct.X_c_main_ccler = type { void (%struct.X_Y*, i32)*, void (%struct.X_Y*, i8**, i32*, i32)* }
+ %struct.X_c_prep_ccler = type { void (%struct.X_Y*, i32)*, void (%struct.X_Y*, i8**, i32*, i32, i8***, i32*, i32)* }
+ %struct.X_color_converter = type { void (%struct.X_Y*)*, void (%struct.X_Y*, i8**, i8***, i32, i32)* }
+ %struct.X_common_struct = type { %struct.X_error_mgr*, %struct.X_memory_mgr*, %struct.X_progress_mgr*, i8*, i32, i32 }
+ %struct.X_comp_master = type { void (%struct.X_Y*)*, void (%struct.X_Y*)*, void (%struct.X_Y*)*, i32, i32 }
+ %struct.X_component_info = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.Q_TBL*, i8* }
+ %struct.X_Y = type { %struct.X_error_mgr*, %struct.X_memory_mgr*, %struct.X_progress_mgr*, i8*, i32, i32, %struct.X_destination_mgr*, i32, i32, i32, i32, double, i32, i32, i32, %struct.X_component_info*, [4 x %struct.Q_TBL*], [4 x %struct.H_TBL*], [4 x %struct.H_TBL*], [16 x i8], [16 x i8], [16 x i8], i32, %struct.X_scan_info*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, i8, i8, i16, i16, i32, i32, i32, i32, i32, i32, i32, [4 x %struct.X_component_info*], i32, i32, i32, [10 x i32], i32, i32, i32, i32, %struct.X_comp_master*, %struct.X_c_main_ccler*, %struct.X_c_prep_ccler*, %struct.X_c_coef_ccler*, %struct.X_marker_writer*, %struct.X_color_converter*, %struct.X_downssr*, %struct.X_forward_D*, %struct.X_entropy_en*, %struct.X_scan_info*, i32 }
+ %struct.X_destination_mgr = type { i8*, i32, void (%struct.X_Y*)*, i32 (%struct.X_Y*)*, void (%struct.X_Y*)* }
+ %struct.X_downssr = type { void (%struct.X_Y*)*, void (%struct.X_Y*, i8***, i32, i8***, i32)*, i32 }
+ %struct.X_entropy_en = type { void (%struct.X_Y*, i32)*, i32 (%struct.X_Y*, [64 x i16]**)*, void (%struct.X_Y*)* }
+ %struct.X_error_mgr = type { void (%struct.X_common_struct*)*, void (%struct.X_common_struct*, i32)*, void (%struct.X_common_struct*)*, void (%struct.X_common_struct*, i8*)*, void (%struct.X_common_struct*)*, i32, %struct.anon, i32, i32, i8**, i32, i8**, i32, i32 }
+ %struct.X_forward_D = type { void (%struct.X_Y*)*, void (%struct.X_Y*, %struct.X_component_info*, i8**, [64 x i16]*, i32, i32, i32)* }
+ %struct.X_marker_writer = type { void (%struct.X_Y*)*, void (%struct.X_Y*)*, void (%struct.X_Y*)*, void (%struct.X_Y*)*, void (%struct.X_Y*)*, void (%struct.X_Y*, i32, i32)*, void (%struct.X_Y*, i32)* }
+ %struct.X_memory_mgr = type { i8* (%struct.X_common_struct*, i32, i32)*, i8* (%struct.X_common_struct*, i32, i32)*, i8** (%struct.X_common_struct*, i32, i32, i32)*, [64 x i16]** (%struct.X_common_struct*, i32, i32, i32)*, %struct.jvirt_sAY_cc* (%struct.X_common_struct*, i32, i32, i32, i32, i32)*, %struct.jvirt_bAY_cc* (%struct.X_common_struct*, i32, i32, i32, i32, i32)*, void (%struct.X_common_struct*)*, i8** (%struct.X_common_struct*, %struct.jvirt_sAY_cc*, i32, i32, i32)*, [64 x i16]** (%struct.X_common_struct*, %struct.jvirt_bAY_cc*, i32, i32, i32)*, void (%struct.X_common_struct*, i32)*, void (%struct.X_common_struct*)*, i32, i32 }
+ %struct.X_progress_mgr = type { void (%struct.X_common_struct*)*, i32, i32, i32, i32 }
+ %struct.X_scan_info = type { i32, [4 x i32], i32, i32, i32, i32 }
+ %struct.jvirt_bAY_cc = type opaque
+ %struct.jvirt_sAY_cc = type opaque
+
+define void @test(%struct.X_Y* %cinfo) {
+entry:
+ br i1 false, label %bb.preheader, label %return
+
+bb.preheader: ; preds = %entry
+ %tbl.014.us = load i32* null ; <i32> [#uses=1]
+ br i1 false, label %cond_next.us, label %bb
+
+cond_next51.us: ; preds = %cond_next.us, %cond_true33.us.cond_true46.us_crit_edge
+ %htblptr.019.1.us = phi %struct.H_TBL** [ %tmp37.us, %cond_true33.us.cond_true46.us_crit_edge ], [ %tmp37.us, %cond_next.us ] ; <%struct.H_TBL**> [#uses=0]
+ ret void
+
+cond_true33.us.cond_true46.us_crit_edge: ; preds = %cond_next.us
+ call void @_C_X_a_HT( )
+ br label %cond_next51.us
+
+cond_next.us: ; preds = %bb.preheader
+ %tmp37.us = getelementptr %struct.X_Y* %cinfo, i32 0, i32 17, i32 %tbl.014.us ; <%struct.H_TBL**> [#uses=3]
+ %tmp4524.us = load %struct.H_TBL** %tmp37.us ; <%struct.H_TBL*> [#uses=1]
+ icmp eq %struct.H_TBL* %tmp4524.us, null ; <i1>:0 [#uses=1]
+ br i1 %0, label %cond_true33.us.cond_true46.us_crit_edge, label %cond_next51.us
+
+bb: ; preds = %bb.preheader
+ ret void
+
+return: ; preds = %entry
+ ret void
+}
+
+declare void @_C_X_a_HT()
diff --git a/test/CodeGen/ARM/2007-04-03-PEIBug.ll b/test/CodeGen/ARM/2007-04-03-PEIBug.ll
new file mode 100644
index 0000000..e412127
--- /dev/null
+++ b/test/CodeGen/ARM/2007-04-03-PEIBug.ll
@@ -0,0 +1,12 @@
+; RUN: llvm-as < %s | llc -march=arm | not grep {add.*#0}
+
+define i32 @foo() {
+entry:
+ %A = alloca [1123 x i32], align 16 ; <[1123 x i32]*> [#uses=1]
+ %B = alloca [3123 x i32], align 16 ; <[3123 x i32]*> [#uses=1]
+ %C = alloca [12312 x i32], align 16 ; <[12312 x i32]*> [#uses=1]
+ %tmp = call i32 (...)* @bar( [3123 x i32]* %B, [1123 x i32]* %A, [12312 x i32]* %C ) ; <i32> [#uses=0]
+ ret i32 undef
+}
+
+declare i32 @bar(...)
diff --git a/test/CodeGen/ARM/2007-04-03-UndefinedSymbol.ll b/test/CodeGen/ARM/2007-04-03-UndefinedSymbol.ll
new file mode 100644
index 0000000..42f5034
--- /dev/null
+++ b/test/CodeGen/ARM/2007-04-03-UndefinedSymbol.ll
@@ -0,0 +1,99 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -relocation-model=pic | \
+; RUN: not grep LPC9
+
+ %struct.B = type { i32 }
+ %struct.anon = type { void (%struct.B*)*, i32 }
+@str = internal constant [7 x i8] c"i, %d\0A\00" ; <[7 x i8]*> [#uses=1]
+@str1 = internal constant [7 x i8] c"j, %d\0A\00" ; <[7 x i8]*> [#uses=1]
+
+define internal void @_ZN1B1iEv(%struct.B* %this) {
+entry:
+ %tmp1 = getelementptr %struct.B* %this, i32 0, i32 0 ; <i32*> [#uses=1]
+ %tmp2 = load i32* %tmp1 ; <i32> [#uses=1]
+ %tmp4 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([7 x i8]* @str, i32 0, i32 0), i32 %tmp2 ) ; <i32> [#uses=0]
+ ret void
+}
+
+declare i32 @printf(i8*, ...)
+
+define internal void @_ZN1B1jEv(%struct.B* %this) {
+entry:
+ %tmp1 = getelementptr %struct.B* %this, i32 0, i32 0 ; <i32*> [#uses=1]
+ %tmp2 = load i32* %tmp1 ; <i32> [#uses=1]
+ %tmp4 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([7 x i8]* @str1, i32 0, i32 0), i32 %tmp2 ) ; <i32> [#uses=0]
+ ret void
+}
+
+define i32 @main() {
+entry:
+ %b.i29 = alloca %struct.B, align 4 ; <%struct.B*> [#uses=3]
+ %b.i1 = alloca %struct.B, align 4 ; <%struct.B*> [#uses=3]
+ %b.i = alloca %struct.B, align 4 ; <%struct.B*> [#uses=3]
+ %tmp2.i = getelementptr %struct.B* %b.i, i32 0, i32 0 ; <i32*> [#uses=1]
+ store i32 4, i32* %tmp2.i
+ br i1 icmp eq (i64 and (i64 zext (i32 ptrtoint (void (%struct.B*)* @_ZN1B1iEv to i32) to i64), i64 4294967296), i64 0), label %_Z3fooiM1BFvvE.exit, label %cond_true.i
+
+cond_true.i: ; preds = %entry
+ %b2.i = bitcast %struct.B* %b.i to i8* ; <i8*> [#uses=1]
+ %ctg23.i = getelementptr i8* %b2.i, i32 ashr (i32 trunc (i64 lshr (i64 zext (i32 ptrtoint (void (%struct.B*)* @_ZN1B1iEv to i32) to i64), i64 32) to i32), i32 1) ; <i8*> [#uses=1]
+ %tmp121314.i = bitcast i8* %ctg23.i to i32 (...)*** ; <i32 (...)***> [#uses=1]
+ %tmp15.i = load i32 (...)*** %tmp121314.i ; <i32 (...)**> [#uses=1]
+ %tmp151.i = bitcast i32 (...)** %tmp15.i to i8* ; <i8*> [#uses=1]
+ %ctg2.i = getelementptr i8* %tmp151.i, i32 ptrtoint (void (%struct.B*)* @_ZN1B1iEv to i32) ; <i8*> [#uses=1]
+ %tmp2021.i = bitcast i8* %ctg2.i to i32 (...)** ; <i32 (...)**> [#uses=1]
+ %tmp22.i = load i32 (...)** %tmp2021.i ; <i32 (...)*> [#uses=1]
+ %tmp2223.i = bitcast i32 (...)* %tmp22.i to void (%struct.B*)* ; <void (%struct.B*)*> [#uses=1]
+ br label %_Z3fooiM1BFvvE.exit
+
+_Z3fooiM1BFvvE.exit: ; preds = %cond_true.i, %entry
+ %iftmp.2.0.i = phi void (%struct.B*)* [ %tmp2223.i, %cond_true.i ], [ inttoptr (i32 ptrtoint (void (%struct.B*)* @_ZN1B1iEv to i32) to void (%struct.B*)*), %entry ] ; <void (%struct.B*)*> [#uses=1]
+ %b4.i = bitcast %struct.B* %b.i to i8* ; <i8*> [#uses=1]
+ %ctg25.i = getelementptr i8* %b4.i, i32 ashr (i32 trunc (i64 lshr (i64 zext (i32 ptrtoint (void (%struct.B*)* @_ZN1B1iEv to i32) to i64), i64 32) to i32), i32 1) ; <i8*> [#uses=1]
+ %tmp3031.i = bitcast i8* %ctg25.i to %struct.B* ; <%struct.B*> [#uses=1]
+ call void %iftmp.2.0.i( %struct.B* %tmp3031.i )
+ %tmp2.i30 = getelementptr %struct.B* %b.i29, i32 0, i32 0 ; <i32*> [#uses=1]
+ store i32 6, i32* %tmp2.i30
+ br i1 icmp eq (i64 and (i64 zext (i32 ptrtoint (void (%struct.B*)* @_ZN1B1jEv to i32) to i64), i64 4294967296), i64 0), label %_Z3fooiM1BFvvE.exit56, label %cond_true.i46
+
+cond_true.i46: ; preds = %_Z3fooiM1BFvvE.exit
+ %b2.i35 = bitcast %struct.B* %b.i29 to i8* ; <i8*> [#uses=1]
+ %ctg23.i36 = getelementptr i8* %b2.i35, i32 ashr (i32 trunc (i64 lshr (i64 zext (i32 ptrtoint (void (%struct.B*)* @_ZN1B1jEv to i32) to i64), i64 32) to i32), i32 1) ; <i8*> [#uses=1]
+ %tmp121314.i37 = bitcast i8* %ctg23.i36 to i32 (...)*** ; <i32 (...)***> [#uses=1]
+ %tmp15.i38 = load i32 (...)*** %tmp121314.i37 ; <i32 (...)**> [#uses=1]
+ %tmp151.i41 = bitcast i32 (...)** %tmp15.i38 to i8* ; <i8*> [#uses=1]
+ %ctg2.i42 = getelementptr i8* %tmp151.i41, i32 ptrtoint (void (%struct.B*)* @_ZN1B1jEv to i32) ; <i8*> [#uses=1]
+ %tmp2021.i43 = bitcast i8* %ctg2.i42 to i32 (...)** ; <i32 (...)**> [#uses=1]
+ %tmp22.i44 = load i32 (...)** %tmp2021.i43 ; <i32 (...)*> [#uses=1]
+ %tmp2223.i45 = bitcast i32 (...)* %tmp22.i44 to void (%struct.B*)* ; <void (%struct.B*)*> [#uses=1]
+ br label %_Z3fooiM1BFvvE.exit56
+
+_Z3fooiM1BFvvE.exit56: ; preds = %cond_true.i46, %_Z3fooiM1BFvvE.exit
+ %iftmp.2.0.i49 = phi void (%struct.B*)* [ %tmp2223.i45, %cond_true.i46 ], [ inttoptr (i32 ptrtoint (void (%struct.B*)* @_ZN1B1jEv to i32) to void (%struct.B*)*), %_Z3fooiM1BFvvE.exit ] ; <void (%struct.B*)*> [#uses=1]
+ %b4.i53 = bitcast %struct.B* %b.i29 to i8* ; <i8*> [#uses=1]
+ %ctg25.i54 = getelementptr i8* %b4.i53, i32 ashr (i32 trunc (i64 lshr (i64 zext (i32 ptrtoint (void (%struct.B*)* @_ZN1B1jEv to i32) to i64), i64 32) to i32), i32 1) ; <i8*> [#uses=1]
+ %tmp3031.i55 = bitcast i8* %ctg25.i54 to %struct.B* ; <%struct.B*> [#uses=1]
+ call void %iftmp.2.0.i49( %struct.B* %tmp3031.i55 )
+ %tmp2.i2 = getelementptr %struct.B* %b.i1, i32 0, i32 0 ; <i32*> [#uses=1]
+ store i32 -1, i32* %tmp2.i2
+ br i1 icmp eq (i64 and (i64 zext (i32 ptrtoint (void (%struct.B*)* @_ZN1B1iEv to i32) to i64), i64 4294967296), i64 0), label %_Z3fooiM1BFvvE.exit28, label %cond_true.i18
+
+cond_true.i18: ; preds = %_Z3fooiM1BFvvE.exit56
+ %b2.i7 = bitcast %struct.B* %b.i1 to i8* ; <i8*> [#uses=1]
+ %ctg23.i8 = getelementptr i8* %b2.i7, i32 ashr (i32 trunc (i64 lshr (i64 zext (i32 ptrtoint (void (%struct.B*)* @_ZN1B1iEv to i32) to i64), i64 32) to i32), i32 1) ; <i8*> [#uses=1]
+ %tmp121314.i9 = bitcast i8* %ctg23.i8 to i32 (...)*** ; <i32 (...)***> [#uses=1]
+ %tmp15.i10 = load i32 (...)*** %tmp121314.i9 ; <i32 (...)**> [#uses=1]
+ %tmp151.i13 = bitcast i32 (...)** %tmp15.i10 to i8* ; <i8*> [#uses=1]
+ %ctg2.i14 = getelementptr i8* %tmp151.i13, i32 ptrtoint (void (%struct.B*)* @_ZN1B1iEv to i32) ; <i8*> [#uses=1]
+ %tmp2021.i15 = bitcast i8* %ctg2.i14 to i32 (...)** ; <i32 (...)**> [#uses=1]
+ %tmp22.i16 = load i32 (...)** %tmp2021.i15 ; <i32 (...)*> [#uses=1]
+ %tmp2223.i17 = bitcast i32 (...)* %tmp22.i16 to void (%struct.B*)* ; <void (%struct.B*)*> [#uses=1]
+ br label %_Z3fooiM1BFvvE.exit28
+
+_Z3fooiM1BFvvE.exit28: ; preds = %cond_true.i18, %_Z3fooiM1BFvvE.exit56
+ %iftmp.2.0.i21 = phi void (%struct.B*)* [ %tmp2223.i17, %cond_true.i18 ], [ inttoptr (i32 ptrtoint (void (%struct.B*)* @_ZN1B1iEv to i32) to void (%struct.B*)*), %_Z3fooiM1BFvvE.exit56 ] ; <void (%struct.B*)*> [#uses=1]
+ %b4.i25 = bitcast %struct.B* %b.i1 to i8* ; <i8*> [#uses=1]
+ %ctg25.i26 = getelementptr i8* %b4.i25, i32 ashr (i32 trunc (i64 lshr (i64 zext (i32 ptrtoint (void (%struct.B*)* @_ZN1B1iEv to i32) to i64), i64 32) to i32), i32 1) ; <i8*> [#uses=1]
+ %tmp3031.i27 = bitcast i8* %ctg25.i26 to %struct.B* ; <%struct.B*> [#uses=1]
+ call void %iftmp.2.0.i21( %struct.B* %tmp3031.i27 )
+ ret i32 0
+}
diff --git a/test/CodeGen/ARM/2007-04-30-CombinerCrash.ll b/test/CodeGen/ARM/2007-04-30-CombinerCrash.ll
new file mode 100644
index 0000000..ec70a59
--- /dev/null
+++ b/test/CodeGen/ARM/2007-04-30-CombinerCrash.ll
@@ -0,0 +1,32 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -mattr=+v6,+vfp2
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64"
+target triple = "arm-apple-darwin8"
+ %struct.CHESS_POSITION = type { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i32, i32, i8, i8, [64 x i8], i8, i8, i8, i8, i8 }
+@search = external global %struct.CHESS_POSITION ; <%struct.CHESS_POSITION*> [#uses=3]
+@file_mask = external global [8 x i64] ; <[8 x i64]*> [#uses=1]
+@rank_mask.1.b = external global i1 ; <i1*> [#uses=1]
+
+define fastcc void @EvaluateDevelopment() {
+entry:
+ %tmp7 = load i64* getelementptr (%struct.CHESS_POSITION* @search, i32 0, i32 7) ; <i64> [#uses=1]
+ %tmp50 = load i64* getelementptr (%struct.CHESS_POSITION* @search, i32 0, i32 0) ; <i64> [#uses=1]
+ %tmp52 = load i64* getelementptr (%struct.CHESS_POSITION* @search, i32 0, i32 1) ; <i64> [#uses=1]
+ %tmp53 = or i64 %tmp52, %tmp50 ; <i64> [#uses=1]
+ %tmp57.b = load i1* @rank_mask.1.b ; <i1> [#uses=1]
+ %tmp57 = select i1 %tmp57.b, i64 71776119061217280, i64 0 ; <i64> [#uses=1]
+ %tmp58 = and i64 %tmp57, %tmp7 ; <i64> [#uses=1]
+ %tmp59 = lshr i64 %tmp58, 8 ; <i64> [#uses=1]
+ %tmp63 = load i64* getelementptr ([8 x i64]* @file_mask, i32 0, i32 4) ; <i64> [#uses=1]
+ %tmp64 = or i64 %tmp63, 0 ; <i64> [#uses=1]
+ %tmp65 = and i64 %tmp59, %tmp53 ; <i64> [#uses=1]
+ %tmp66 = and i64 %tmp65, %tmp64 ; <i64> [#uses=1]
+ %tmp67 = icmp eq i64 %tmp66, 0 ; <i1> [#uses=1]
+ br i1 %tmp67, label %cond_next145, label %cond_true70
+
+cond_true70: ; preds = %entry
+ ret void
+
+cond_next145: ; preds = %entry
+ ret void
+}
diff --git a/test/CodeGen/ARM/2007-05-03-BadPostIndexedLd.ll b/test/CodeGen/ARM/2007-05-03-BadPostIndexedLd.ll
new file mode 100644
index 0000000..b850728
--- /dev/null
+++ b/test/CodeGen/ARM/2007-05-03-BadPostIndexedLd.ll
@@ -0,0 +1,113 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
+
+ %struct.Connection = type { i32, [10 x i8], i32 }
+ %struct.IntChunk = type { %struct.cppobjtype, i32, i32*, i32 }
+ %struct.Point = type { i8*, %struct.cppobjtype, i16 (%struct.Point*) sext *, i16 (%struct.Point*) sext *, double (%struct.Point*)*, double (%struct.Point*)* }
+ %struct.RefPoint = type { %struct.Point*, %struct.cppobjtype }
+ %struct.ShortArray = type { %struct.cppobjtype, i32, i16* }
+ %struct.TestObj = type { i8*, %struct.cppobjtype, i8, [32 x i8], i8*, i8**, i16, i16, i32, i32, i32, i32, float, double, %struct.cppobjtype, i32, i16*, i16**, i8**, i32, %struct.XyPoint, [3 x %struct.Connection], %struct.Point*, %struct.XyPoint*, i32, i8*, i8*, i16*, %struct.ShortArray, %struct.IntChunk, %struct.cppobjtype, %struct.cppobjtype, %struct.RefPoint, i32, %struct.cppobjtype, %struct.cppobjtype }
+ %struct.XyPoint = type { i16, i16 }
+ %struct.cppobjtype = type { i32, i16, i16 }
+@Msg = external global [256 x i8] ; <[256 x i8]*> [#uses=1]
+@.str53615 = external constant [48 x i8] ; <[48 x i8]*> [#uses=1]
+@FirstTime.4637.b = external global i1 ; <i1*> [#uses=1]
+
+define fastcc void @Draw7(i32 %Option, i32* %Status) {
+entry:
+ %tmp115.b = load i1* @FirstTime.4637.b ; <i1> [#uses=1]
+ br i1 %tmp115.b, label %cond_next239, label %cond_next.i
+
+cond_next.i: ; preds = %entry
+ ret void
+
+cond_next239: ; preds = %entry
+ %tmp242 = icmp eq i32 0, 0 ; <i1> [#uses=1]
+ br i1 %tmp242, label %cond_next253, label %cond_next296
+
+cond_next253: ; preds = %cond_next239
+ switch i32 %Option, label %bb1326 [
+ i32 3, label %cond_true258
+ i32 4, label %cond_true268
+ i32 2, label %cond_true279
+ i32 1, label %cond_next315
+ ]
+
+cond_true258: ; preds = %cond_next253
+ ret void
+
+cond_true268: ; preds = %cond_next253
+ ret void
+
+cond_true279: ; preds = %cond_next253
+ ret void
+
+cond_next296: ; preds = %cond_next239
+ ret void
+
+cond_next315: ; preds = %cond_next253
+ %tmp1140 = icmp eq i32 0, 0 ; <i1> [#uses=1]
+ br i1 %tmp1140, label %cond_true1143, label %bb1326
+
+cond_true1143: ; preds = %cond_next315
+ %tmp1148 = icmp eq i32 0, 0 ; <i1> [#uses=4]
+ br i1 %tmp1148, label %cond_next1153, label %cond_true1151
+
+cond_true1151: ; preds = %cond_true1143
+ ret void
+
+cond_next1153: ; preds = %cond_true1143
+ %tmp8.i.i185 = icmp eq i32 0, 0 ; <i1> [#uses=1]
+ br i1 %tmp8.i.i185, label %TestObj_new1.exit, label %cond_true.i.i187
+
+cond_true.i.i187: ; preds = %cond_next1153
+ ret void
+
+TestObj_new1.exit: ; preds = %cond_next1153
+ %tmp1167 = icmp eq i16 0, 0 ; <i1> [#uses=1]
+ %tmp1178 = icmp eq i32 0, 0 ; <i1> [#uses=1]
+ %bothcond = and i1 %tmp1167, %tmp1178 ; <i1> [#uses=1]
+ br i1 %bothcond, label %bb1199, label %bb1181
+
+bb1181: ; preds = %TestObj_new1.exit
+ ret void
+
+bb1199: ; preds = %TestObj_new1.exit
+ br i1 %tmp1148, label %cond_next1235, label %Object_Dump.exit302
+
+Object_Dump.exit302: ; preds = %bb1199
+ ret void
+
+cond_next1235: ; preds = %bb1199
+ %bothcond10485 = or i1 false, %tmp1148 ; <i1> [#uses=1]
+ br i1 %bothcond10485, label %cond_next1267, label %cond_true1248
+
+cond_true1248: ; preds = %cond_next1235
+ ret void
+
+cond_next1267: ; preds = %cond_next1235
+ br i1 %tmp1148, label %cond_next1275, label %cond_true1272
+
+cond_true1272: ; preds = %cond_next1267
+ %tmp1273 = load %struct.TestObj** null ; <%struct.TestObj*> [#uses=2]
+ %tmp2930.i = ptrtoint %struct.TestObj* %tmp1273 to i32 ; <i32> [#uses=1]
+ %tmp42.i348 = sub i32 0, %tmp2930.i ; <i32> [#uses=1]
+ %tmp45.i = getelementptr %struct.TestObj* %tmp1273, i32 0, i32 0 ; <i8**> [#uses=2]
+ %tmp48.i = load i8** %tmp45.i ; <i8*> [#uses=1]
+ %tmp50.i350 = call i32 (i8*, i8*, ...)* @sprintf( i8* getelementptr ([256 x i8]* @Msg, i32 0, i32 0), i8* getelementptr ([48 x i8]* @.str53615, i32 0, i32 0), i8* null, i8** %tmp45.i, i8* %tmp48.i ) ; <i32> [#uses=0]
+ br i1 false, label %cond_true.i632.i, label %Ut_TraceMsg.exit648.i
+
+cond_true.i632.i: ; preds = %cond_true1272
+ ret void
+
+Ut_TraceMsg.exit648.i: ; preds = %cond_true1272
+ %tmp57.i = getelementptr i8* null, i32 %tmp42.i348 ; <i8*> [#uses=0]
+ ret void
+
+cond_next1275: ; preds = %cond_next1267
+ ret void
+
+bb1326: ; preds = %cond_next315, %cond_next253
+ ret void
+}
+
+declare i32 @sprintf(i8*, i8*, ...)
diff --git a/test/CodeGen/ARM/2007-05-05-InvalidPushPop.ll b/test/CodeGen/ARM/2007-05-05-InvalidPushPop.ll
new file mode 100644
index 0000000..159be4e
--- /dev/null
+++ b/test/CodeGen/ARM/2007-05-05-InvalidPushPop.ll
@@ -0,0 +1,41 @@
+; RUN: llvm-as < %s | llc | not grep r11
+
+target triple = "thumb-linux-gnueabi"
+ %struct.__sched_param = type { i32 }
+ %struct.pthread_attr_t = type { i32, i32, %struct.__sched_param, i32, i32, i32, i32, i8*, i32 }
+@i.1882 = internal global i32 1 ; <i32*> [#uses=2]
+@.str = internal constant [14 x i8] c"Thread 1: %d\0A\00" ; <[14 x i8]*> [#uses=1]
+@.str1 = internal constant [14 x i8] c"Thread 2: %d\0A\00" ; <[14 x i8]*> [#uses=1]
+
+define i8* @f(i8* %a) {
+entry:
+ %tmp1 = load i32* @i.1882 ; <i32> [#uses=1]
+ %tmp2 = add i32 %tmp1, 1 ; <i32> [#uses=2]
+ store i32 %tmp2, i32* @i.1882
+ %tmp34 = inttoptr i32 %tmp2 to i8* ; <i8*> [#uses=1]
+ ret i8* %tmp34
+}
+
+define i32 @main() {
+entry:
+ %t = alloca i32, align 4 ; <i32*> [#uses=4]
+ %ret = alloca i32, align 4 ; <i32*> [#uses=3]
+ %tmp1 = call i32 @pthread_create( i32* %t, %struct.pthread_attr_t* null, i8* (i8*)* @f, i8* null ) ; <i32> [#uses=0]
+ %tmp2 = load i32* %t ; <i32> [#uses=1]
+ %ret3 = bitcast i32* %ret to i8** ; <i8**> [#uses=2]
+ %tmp4 = call i32 @pthread_join( i32 %tmp2, i8** %ret3 ) ; <i32> [#uses=0]
+ %tmp5 = load i32* %ret ; <i32> [#uses=1]
+ %tmp7 = call i32 (i8*, ...)* @printf( i8* getelementptr ([14 x i8]* @.str, i32 0, i32 0), i32 %tmp5 ) ; <i32> [#uses=0]
+ %tmp8 = call i32 @pthread_create( i32* %t, %struct.pthread_attr_t* null, i8* (i8*)* @f, i8* null ) ; <i32> [#uses=0]
+ %tmp9 = load i32* %t ; <i32> [#uses=1]
+ %tmp11 = call i32 @pthread_join( i32 %tmp9, i8** %ret3 ) ; <i32> [#uses=0]
+ %tmp12 = load i32* %ret ; <i32> [#uses=1]
+ %tmp14 = call i32 (i8*, ...)* @printf( i8* getelementptr ([14 x i8]* @.str1, i32 0, i32 0), i32 %tmp12 ) ; <i32> [#uses=0]
+ ret i32 0
+}
+
+declare i32 @pthread_create(i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)
+
+declare i32 @pthread_join(i32, i8**)
+
+declare i32 @printf(i8*, ...)
diff --git a/test/CodeGen/ARM/2007-05-07-jumptoentry.ll b/test/CodeGen/ARM/2007-05-07-jumptoentry.ll
new file mode 100644
index 0000000..11431be
--- /dev/null
+++ b/test/CodeGen/ARM/2007-05-07-jumptoentry.ll
@@ -0,0 +1,58 @@
+; RUN: llvm-as < %s | llc | not grep 1_0
+; This used to create an extra branch to 'entry', LBB1_0.
+
+; ModuleID = 'bug.bc'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64"
+target triple = "arm-apple-darwin8"
+ %struct.HexxagonMove = type { i8, i8, i32 }
+ %struct.HexxagonMoveList = type { i32, %struct.HexxagonMove* }
+
+define void @_ZN16HexxagonMoveList8sortListEv(%struct.HexxagonMoveList* %this) {
+entry:
+ %tmp51 = getelementptr %struct.HexxagonMoveList* %this, i32 0, i32 0 ; <i32*> [#uses=1]
+ %tmp2 = getelementptr %struct.HexxagonMoveList* %this, i32 0, i32 1 ; <%struct.HexxagonMove**> [#uses=2]
+ br label %bb49
+
+bb1: ; preds = %bb49
+ %tmp3 = load %struct.HexxagonMove** %tmp2 ; <%struct.HexxagonMove*> [#uses=5]
+ %tmp6 = getelementptr %struct.HexxagonMove* %tmp3, i32 %i.1, i32 2 ; <i32*> [#uses=1]
+ %tmp7 = load i32* %tmp6 ; <i32> [#uses=2]
+ %tmp12 = add i32 %i.1, 1 ; <i32> [#uses=7]
+ %tmp14 = getelementptr %struct.HexxagonMove* %tmp3, i32 %tmp12, i32 2 ; <i32*> [#uses=1]
+ %tmp15 = load i32* %tmp14 ; <i32> [#uses=1]
+ %tmp16 = icmp slt i32 %tmp7, %tmp15 ; <i1> [#uses=1]
+ br i1 %tmp16, label %cond_true, label %bb49
+
+cond_true: ; preds = %bb1
+ %tmp23.0 = getelementptr %struct.HexxagonMove* %tmp3, i32 %i.1, i32 0 ; <i8*> [#uses=2]
+ %tmp67 = load i8* %tmp23.0 ; <i8> [#uses=1]
+ %tmp23.1 = getelementptr %struct.HexxagonMove* %tmp3, i32 %i.1, i32 1 ; <i8*> [#uses=1]
+ %tmp68 = load i8* %tmp23.1 ; <i8> [#uses=1]
+ %tmp3638 = getelementptr %struct.HexxagonMove* %tmp3, i32 %tmp12, i32 0 ; <i8*> [#uses=1]
+ tail call void @llvm.memcpy.i32( i8* %tmp23.0, i8* %tmp3638, i32 8, i32 4 )
+ %tmp41 = load %struct.HexxagonMove** %tmp2 ; <%struct.HexxagonMove*> [#uses=3]
+ %tmp44.0 = getelementptr %struct.HexxagonMove* %tmp41, i32 %tmp12, i32 0 ; <i8*> [#uses=1]
+ store i8 %tmp67, i8* %tmp44.0
+ %tmp44.1 = getelementptr %struct.HexxagonMove* %tmp41, i32 %tmp12, i32 1 ; <i8*> [#uses=1]
+ store i8 %tmp68, i8* %tmp44.1
+ %tmp44.2 = getelementptr %struct.HexxagonMove* %tmp41, i32 %tmp12, i32 2 ; <i32*> [#uses=1]
+ store i32 %tmp7, i32* %tmp44.2
+ br label %bb49
+
+bb49: ; preds = %bb59, %cond_true, %bb1, %entry
+ %i.1 = phi i32 [ 0, %entry ], [ %tmp12, %bb1 ], [ %tmp12, %cond_true ], [ 0, %bb59 ] ; <i32> [#uses=5]
+ %move.2 = phi i32 [ 0, %entry ], [ 1, %cond_true ], [ %move.2, %bb1 ], [ 0, %bb59 ] ; <i32> [#uses=2]
+ %tmp52 = load i32* %tmp51 ; <i32> [#uses=1]
+ %tmp53 = add i32 %tmp52, -1 ; <i32> [#uses=1]
+ %tmp55 = icmp sgt i32 %tmp53, %i.1 ; <i1> [#uses=1]
+ br i1 %tmp55, label %bb1, label %bb59
+
+bb59: ; preds = %bb49
+ %tmp61 = icmp eq i32 %move.2, 0 ; <i1> [#uses=1]
+ br i1 %tmp61, label %return, label %bb49
+
+return: ; preds = %bb59
+ ret void
+}
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
diff --git a/test/CodeGen/ARM/2007-05-07-tailmerge-1.ll b/test/CodeGen/ARM/2007-05-07-tailmerge-1.ll
new file mode 100644
index 0000000..15efd60
--- /dev/null
+++ b/test/CodeGen/ARM/2007-05-07-tailmerge-1.ll
@@ -0,0 +1,65 @@
+; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge | grep bl.*baz | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge | grep bl.*quux | wc -l | grep 1
+; Check that calls to baz and quux are tail-merged.
+
+; ModuleID = 'tail.c'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "i686-apple-darwin8"
+
+define i32 @f(i32 %i, i32 %q) {
+entry:
+ %i_addr = alloca i32 ; <i32*> [#uses=2]
+ %q_addr = alloca i32 ; <i32*> [#uses=2]
+ %retval = alloca i32, align 4 ; <i32*> [#uses=1]
+ "alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i32 %i, i32* %i_addr
+ store i32 %q, i32* %q_addr
+ %tmp = load i32* %i_addr ; <i32> [#uses=1]
+ %tmp1 = icmp ne i32 %tmp, 0 ; <i1> [#uses=1]
+ %tmp12 = zext i1 %tmp1 to i8 ; <i8> [#uses=1]
+ %toBool = icmp ne i8 %tmp12, 0 ; <i1> [#uses=1]
+ br i1 %toBool, label %cond_true, label %cond_false
+
+cond_true: ; preds = %entry
+ %tmp3 = call i32 (...)* @bar( ) ; <i32> [#uses=0]
+ %tmp4 = call i32 (...)* @baz( i32 5, i32 6 ) ; <i32> [#uses=0]
+ br label %cond_next
+
+cond_false: ; preds = %entry
+ %tmp5 = call i32 (...)* @foo( ) ; <i32> [#uses=0]
+ %tmp6 = call i32 (...)* @baz( i32 5, i32 6 ) ; <i32> [#uses=0]
+ br label %cond_next
+
+cond_next: ; preds = %cond_false, %cond_true
+ %tmp7 = load i32* %q_addr ; <i32> [#uses=1]
+ %tmp8 = icmp ne i32 %tmp7, 0 ; <i1> [#uses=1]
+ %tmp89 = zext i1 %tmp8 to i8 ; <i8> [#uses=1]
+ %toBool10 = icmp ne i8 %tmp89, 0 ; <i1> [#uses=1]
+ br i1 %toBool10, label %cond_true11, label %cond_false15
+
+cond_true11: ; preds = %cond_next
+ %tmp13 = call i32 (...)* @foo( ) ; <i32> [#uses=0]
+ %tmp14 = call i32 (...)* @quux( i32 3, i32 4 ) ; <i32> [#uses=0]
+ br label %cond_next18
+
+cond_false15: ; preds = %cond_next
+ %tmp16 = call i32 (...)* @bar( ) ; <i32> [#uses=0]
+ %tmp17 = call i32 (...)* @quux( i32 3, i32 4 ) ; <i32> [#uses=0]
+ br label %cond_next18
+
+cond_next18: ; preds = %cond_false15, %cond_true11
+ %tmp19 = call i32 (...)* @bar( ) ; <i32> [#uses=0]
+ br label %return
+
+return: ; preds = %cond_next18
+ %retval20 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval20
+}
+
+declare i32 @bar(...)
+
+declare i32 @baz(...)
+
+declare i32 @foo(...)
+
+declare i32 @quux(...)
diff --git a/test/CodeGen/ARM/2007-05-09-tailmerge-2.ll b/test/CodeGen/ARM/2007-05-09-tailmerge-2.ll
new file mode 100644
index 0000000..70c0777
--- /dev/null
+++ b/test/CodeGen/ARM/2007-05-09-tailmerge-2.ll
@@ -0,0 +1,66 @@
+; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge | grep bl.*baz | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge | grep bl.*quux | wc -l | grep 1
+; Check that calls to baz and quux are tail-merged.
+
+; ModuleID = 'tail.c'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "i686-apple-darwin8"
+
+define i32 @f(i32 %i, i32 %q) {
+entry:
+ %i_addr = alloca i32 ; <i32*> [#uses=2]
+ %q_addr = alloca i32 ; <i32*> [#uses=2]
+ %retval = alloca i32, align 4 ; <i32*> [#uses=1]
+ "alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i32 %i, i32* %i_addr
+ store i32 %q, i32* %q_addr
+ %tmp = load i32* %i_addr ; <i32> [#uses=1]
+ %tmp1 = icmp ne i32 %tmp, 0 ; <i1> [#uses=1]
+ %tmp12 = zext i1 %tmp1 to i8 ; <i8> [#uses=1]
+ %toBool = icmp ne i8 %tmp12, 0 ; <i1> [#uses=1]
+ br i1 %toBool, label %cond_true, label %cond_false
+
+cond_true: ; preds = %entry
+ %tmp3 = call i32 (...)* @bar( ) ; <i32> [#uses=0]
+ %tmp4 = call i32 (...)* @baz( i32 5, i32 6 ) ; <i32> [#uses=0]
+ %tmp7 = load i32* %q_addr ; <i32> [#uses=1]
+ %tmp8 = icmp ne i32 %tmp7, 0 ; <i1> [#uses=1]
+ %tmp89 = zext i1 %tmp8 to i8 ; <i8> [#uses=1]
+ %toBool10 = icmp ne i8 %tmp89, 0 ; <i1> [#uses=1]
+ br i1 %toBool10, label %cond_true11, label %cond_false15
+
+cond_false: ; preds = %entry
+ %tmp5 = call i32 (...)* @foo( ) ; <i32> [#uses=0]
+ %tmp6 = call i32 (...)* @baz( i32 5, i32 6 ) ; <i32> [#uses=0]
+ %tmp27 = load i32* %q_addr ; <i32> [#uses=1]
+ %tmp28 = icmp ne i32 %tmp27, 0 ; <i1> [#uses=1]
+ %tmp289 = zext i1 %tmp28 to i8 ; <i8> [#uses=1]
+ %toBool210 = icmp ne i8 %tmp289, 0 ; <i1> [#uses=1]
+ br i1 %toBool210, label %cond_true11, label %cond_false15
+
+cond_true11: ; preds = %cond_next
+ %tmp13 = call i32 (...)* @foo( ) ; <i32> [#uses=0]
+ %tmp14 = call i32 (...)* @quux( i32 3, i32 4 ) ; <i32> [#uses=0]
+ br label %cond_next18
+
+cond_false15: ; preds = %cond_next
+ %tmp16 = call i32 (...)* @bar( ) ; <i32> [#uses=0]
+ %tmp17 = call i32 (...)* @quux( i32 3, i32 4 ) ; <i32> [#uses=0]
+ br label %cond_next18
+
+cond_next18: ; preds = %cond_false15, %cond_true11
+ %tmp19 = call i32 (...)* @bar( ) ; <i32> [#uses=0]
+ br label %return
+
+return: ; preds = %cond_next18
+ %retval20 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval20
+}
+
+declare i32 @bar(...)
+
+declare i32 @baz(...)
+
+declare i32 @foo(...)
+
+declare i32 @quux(...)
diff --git a/test/CodeGen/ARM/2007-05-14-InlineAsmCstCrash.ll b/test/CodeGen/ARM/2007-05-14-InlineAsmCstCrash.ll
new file mode 100644
index 0000000..58c5f89
--- /dev/null
+++ b/test/CodeGen/ARM/2007-05-14-InlineAsmCstCrash.ll
@@ -0,0 +1,6 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v6
+
+define i32 @test3() {
+ tail call void asm sideeffect "/* number: ${0:c} */", "i"( i32 1 )
+ ret i32 11
+}
diff --git a/test/CodeGen/ARM/2007-05-14-RegScavengerAssert.ll b/test/CodeGen/ARM/2007-05-14-RegScavengerAssert.ll
new file mode 100644
index 0000000..430b368
--- /dev/null
+++ b/test/CodeGen/ARM/2007-05-14-RegScavengerAssert.ll
@@ -0,0 +1,30 @@
+; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi
+; PR1406
+
+ %struct.AVClass = type { i8*, i8* (i8*)*, %struct.AVOption* }
+ %struct.AVCodec = type { i8*, i32, i32, i32, i32 (%struct.AVCodecContext*)*, i32 (%struct.AVCodecContext*, i8*, i32, i8*)*, i32 (%struct.AVCodecContext*)*, i32 (%struct.AVCodecContext*, i8*, i32*, i8*, i32)*, i32, %struct.AVCodec*, void (%struct.AVCodecContext*)*, %struct.AVRational*, i32* }
+ %struct.AVCodecContext = type { %struct.AVClass*, i32, i32, i32, i32, i32, i8*, i32, %struct.AVRational, i32, i32, i32, i32, i32, void (%struct.AVCodecContext*, %struct.AVFrame*, i32*, i32, i32, i32)*, i32, i32, i32, i32, i32, i32, i32, float, float, i32, i32, i32, i32, float, i32, i32, i32, %struct.AVCodec*, i8*, i32, i32, void (%struct.AVCodecContext*, i8*, i32, i32)*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, [32 x i8], i32, i32, i32, i32, i32, i32, i32, float, i32, i32 (%struct.AVCodecContext*, %struct.AVFrame*)*, void (%struct.AVCodecContext*, %struct.AVFrame*)*, i32, i32, i32, i32, i8*, i8*, float, float, i32, %struct.RcOverride*, i32, i8*, i32, i32, i32, float, float, float, float, i32, float, float, float, float, float, i32, i32, i32, i32*, i32, i32, i32, i32, %struct.AVRational, %struct.AVFrame*, i32, i32, [4 x i64], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 (%struct.AVCodecContext*, i32*)*, i32, i32, i32, i32, i32, i32, i8*, i32, i32, i32, i32, i32, i32, i16*, i16*, i32, i32, i32, i32, %struct.AVPaletteControl*, i32, i32 (%struct.AVCodecContext*, %struct.AVFrame*)*, i32, i32, i32, i32, i32, i32, i32, i32 (%struct.AVCodecContext*, i32 (%struct.AVCodecContext*, i8*)*, i8**, i32*, i32)*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64 }
+ %struct.AVFrame = type { [4 x i8*], [4 x i32], [4 x i8*], i32, i32, i64, i32, i32, i32, i32, i32, i8*, i32, i8*, [2 x [2 x i16]*], i32*, i8, i8*, [4 x i64], i32, i32, i32, i32, i32, %struct.AVPanScan*, i32, i32, i16*, [2 x i8*] }
+ %struct.AVOption = type opaque
+ %struct.AVPaletteControl = type { i32, [256 x i32] }
+ %struct.AVPanScan = type { i32, i32, i32, [3 x [2 x i16]] }
+ %struct.AVRational = type { i32, i32 }
+ %struct.RcOverride = type { i32, i32, i32, float }
+
+define i32 @decode_init(%struct.AVCodecContext* %avctx) {
+entry:
+ br i1 false, label %bb, label %cond_next789
+
+bb: ; preds = %bb, %entry
+ br i1 false, label %bb59, label %bb
+
+bb59: ; preds = %bb
+ %tmp68 = sdiv i64 0, 0 ; <i64> [#uses=1]
+ %tmp6869 = trunc i64 %tmp68 to i32 ; <i32> [#uses=2]
+ %tmp81 = call i32 asm "smull $0, $1, $2, $3 \0A\09mov $0, $0, lsr $4\0A\09add $1, $0, $1, lsl $5\0A\09", "=&r,=*&r,r,r,i,i"( i32* null, i32 %tmp6869, i32 13316085, i32 23, i32 9 ) ; <i32> [#uses=0]
+ %tmp90 = call i32 asm "smull $0, $1, $2, $3 \0A\09mov $0, $0, lsr $4\0A\09add $1, $0, $1, lsl $5\0A\09", "=&r,=*&r,r,r,i,i"( i32* null, i32 %tmp6869, i32 10568984, i32 23, i32 9 ) ; <i32> [#uses=0]
+ unreachable
+
+cond_next789: ; preds = %entry
+ ret i32 0
+}
diff --git a/test/CodeGen/ARM/2007-05-22-tailmerge-3.ll b/test/CodeGen/ARM/2007-05-22-tailmerge-3.ll
new file mode 100644
index 0000000..94c116d
--- /dev/null
+++ b/test/CodeGen/ARM/2007-05-22-tailmerge-3.ll
@@ -0,0 +1,68 @@
+; RUN: llvm-as < %s | llc -march=arm | grep bl.*baz | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=arm | grep bl.*quux | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge=0 | grep bl.*baz | wc -l | grep 2
+; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge=0 | grep bl.*quux | wc -l | grep 2
+; Check that tail merging is the default on ARM, and that -enable-tail-merge=0 works.
+
+; ModuleID = 'tail.c'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "i686-apple-darwin8"
+
+define i32 @f(i32 %i, i32 %q) {
+entry:
+ %i_addr = alloca i32 ; <i32*> [#uses=2]
+ %q_addr = alloca i32 ; <i32*> [#uses=2]
+ %retval = alloca i32, align 4 ; <i32*> [#uses=1]
+ "alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i32 %i, i32* %i_addr
+ store i32 %q, i32* %q_addr
+ %tmp = load i32* %i_addr ; <i32> [#uses=1]
+ %tmp1 = icmp ne i32 %tmp, 0 ; <i1> [#uses=1]
+ %tmp12 = zext i1 %tmp1 to i8 ; <i8> [#uses=1]
+ %toBool = icmp ne i8 %tmp12, 0 ; <i1> [#uses=1]
+ br i1 %toBool, label %cond_true, label %cond_false
+
+cond_true: ; preds = %entry
+ %tmp3 = call i32 (...)* @bar( ) ; <i32> [#uses=0]
+ %tmp4 = call i32 (...)* @baz( i32 5, i32 6 ) ; <i32> [#uses=0]
+ %tmp7 = load i32* %q_addr ; <i32> [#uses=1]
+ %tmp8 = icmp ne i32 %tmp7, 0 ; <i1> [#uses=1]
+ %tmp89 = zext i1 %tmp8 to i8 ; <i8> [#uses=1]
+ %toBool10 = icmp ne i8 %tmp89, 0 ; <i1> [#uses=1]
+ br i1 %toBool10, label %cond_true11, label %cond_false15
+
+cond_false: ; preds = %entry
+ %tmp5 = call i32 (...)* @foo( ) ; <i32> [#uses=0]
+ %tmp6 = call i32 (...)* @baz( i32 5, i32 6 ) ; <i32> [#uses=0]
+ %tmp27 = load i32* %q_addr ; <i32> [#uses=1]
+ %tmp28 = icmp ne i32 %tmp27, 0 ; <i1> [#uses=1]
+ %tmp289 = zext i1 %tmp28 to i8 ; <i8> [#uses=1]
+ %toBool210 = icmp ne i8 %tmp289, 0 ; <i1> [#uses=1]
+ br i1 %toBool210, label %cond_true11, label %cond_false15
+
+cond_true11: ; preds = %cond_next
+ %tmp13 = call i32 (...)* @foo( ) ; <i32> [#uses=0]
+ %tmp14 = call i32 (...)* @quux( i32 3, i32 4 ) ; <i32> [#uses=0]
+ br label %cond_next18
+
+cond_false15: ; preds = %cond_next
+ %tmp16 = call i32 (...)* @bar( ) ; <i32> [#uses=0]
+ %tmp17 = call i32 (...)* @quux( i32 3, i32 4 ) ; <i32> [#uses=0]
+ br label %cond_next18
+
+cond_next18: ; preds = %cond_false15, %cond_true11
+ %tmp19 = call i32 (...)* @bar( ) ; <i32> [#uses=0]
+ br label %return
+
+return: ; preds = %cond_next18
+ %retval20 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval20
+}
+
+declare i32 @bar(...)
+
+declare i32 @baz(...)
+
+declare i32 @foo(...)
+
+declare i32 @quux(...)
diff --git a/test/CodeGen/ARM/2007-05-23-BadPreIndexedStore.ll b/test/CodeGen/ARM/2007-05-23-BadPreIndexedStore.ll
new file mode 100644
index 0000000..de32a26
--- /dev/null
+++ b/test/CodeGen/ARM/2007-05-23-BadPreIndexedStore.ll
@@ -0,0 +1,34 @@
+; RUN: llvm-as < %s | llc -march=arm | not grep {str.*\\!}
+
+ %struct.shape_edge_t = type { %struct.shape_edge_t*, %struct.shape_edge_t*, i32, i32, i32, i32 }
+ %struct.shape_path_t = type { %struct.shape_edge_t*, %struct.shape_edge_t*, i32, i32, i32, i32, i32, i32 }
+ %struct.shape_pool_t = type { i8* (%struct.shape_pool_t*, i8*, i32)*, i8* (%struct.shape_pool_t*, i32)*, void (%struct.shape_pool_t*, i8*)* }
+
+define %struct.shape_path_t* @shape_path_alloc(%struct.shape_pool_t* %pool, i32* %shape) {
+entry:
+ br i1 false, label %cond_false, label %bb45
+
+bb45: ; preds = %entry
+ ret %struct.shape_path_t* null
+
+cond_false: ; preds = %entry
+ br i1 false, label %bb140, label %bb174
+
+bb140: ; preds = %bb140, %cond_false
+ %indvar = phi i32 [ 0, %cond_false ], [ %indvar.next, %bb140 ] ; <i32> [#uses=2]
+ %edge.230.0.rec = shl i32 %indvar, 1 ; <i32> [#uses=3]
+ %edge.230.0 = getelementptr %struct.shape_edge_t* null, i32 %edge.230.0.rec ; <%struct.shape_edge_t*> [#uses=1]
+ %edge.230.0.sum6970 = or i32 %edge.230.0.rec, 1 ; <i32> [#uses=2]
+ %tmp154 = getelementptr %struct.shape_edge_t* null, i32 %edge.230.0.sum6970 ; <%struct.shape_edge_t*> [#uses=1]
+ %tmp11.i5 = getelementptr %struct.shape_edge_t* null, i32 %edge.230.0.sum6970, i32 0 ; <%struct.shape_edge_t**> [#uses=1]
+ store %struct.shape_edge_t* %edge.230.0, %struct.shape_edge_t** %tmp11.i5
+ store %struct.shape_edge_t* %tmp154, %struct.shape_edge_t** null
+ %tmp16254.0.rec = add i32 %edge.230.0.rec, 2 ; <i32> [#uses=1]
+ %xp.350.sum = add i32 0, %tmp16254.0.rec ; <i32> [#uses=1]
+ %tmp168 = icmp slt i32 %xp.350.sum, 0 ; <i1> [#uses=1]
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
+ br i1 %tmp168, label %bb140, label %bb174
+
+bb174: ; preds = %bb140, %cond_false
+ ret %struct.shape_path_t* null
+}
diff --git a/test/CodeGen/ARM/2007-05-31-RegScavengerInfiniteLoop.ll b/test/CodeGen/ARM/2007-05-31-RegScavengerInfiniteLoop.ll
new file mode 100644
index 0000000..d21a8f2
--- /dev/null
+++ b/test/CodeGen/ARM/2007-05-31-RegScavengerInfiniteLoop.ll
@@ -0,0 +1,237 @@
+; RUN: llvm-as < %s | llc
+; PR1424
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "arm-linux-gnueabi"
+ %struct.AVClass = type { i8*, i8* (i8*)*, %struct.AVOption* }
+ %struct.AVCodec = type { i8*, i32, i32, i32, i32 (%struct.AVCodecContext*)*, i32 (%struct.AVCodecContext*, i8*, i32, i8*)*, i32 (%struct.AVCodecContext*)*, i32 (%struct.AVCodecContext*, i8*, i32*, i8*, i32)*, i32, %struct.AVCodec*, void (%struct.AVCodecContext*)*, %struct.AVRational*, i32* }
+ %struct.AVCodecContext = type { %struct.AVClass*, i32, i32, i32, i32, i32, i8*, i32, %struct.AVRational, i32, i32, i32, i32, i32, void (%struct.AVCodecContext*, %struct.AVFrame*, i32*, i32, i32, i32)*, i32, i32, i32, i32, i32, i32, i32, float, float, i32, i32, i32, i32, float, i32, i32, i32, %struct.AVCodec*, i8*, i32, i32, void (%struct.AVCodecContext*, i8*, i32, i32)*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, [32 x i8], i32, i32, i32, i32, i32, i32, i32, float, i32, i32 (%struct.AVCodecContext*, %struct.AVFrame*)*, void (%struct.AVCodecContext*, %struct.AVFrame*)*, i32, i32, i32, i32, i8*, i8*, float, float, i32, %struct.RcOverride*, i32, i8*, i32, i32, i32, float, float, float, float, i32, float, float, float, float, float, i32, i32, i32, i32*, i32, i32, i32, i32, %struct.AVRational, %struct.AVFrame*, i32, i32, [4 x i64], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 (%struct.AVCodecContext*, i32*)*, i32, i32, i32, i32, i32, i32, i8*, i32, i32, i32, i32, i32, i32, i16*, i16*, i32, i32, i32, i32, %struct.AVPaletteControl*, i32, i32 (%struct.AVCodecContext*, %struct.AVFrame*)*, i32, i32, i32, i32, i32, i32, i32, i32 (%struct.AVCodecContext*, i32 (%struct.AVCodecContext*, i8*)*, i8**, i32*, i32)*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64 }
+ %struct.AVEvalExpr = type opaque
+ %struct.AVFrame = type { [4 x i8*], [4 x i32], [4 x i8*], i32, i32, i64, i32, i32, i32, i32, i32, i8*, i32, i8*, [2 x [2 x i16]*], i32*, i8, i8*, [4 x i64], i32, i32, i32, i32, i32, %struct.AVPanScan*, i32, i32, i16*, [2 x i8*] }
+ %struct.AVOption = type opaque
+ %struct.AVPaletteControl = type { i32, [256 x i32] }
+ %struct.AVPanScan = type { i32, i32, i32, [3 x [2 x i16]] }
+ %struct.AVRational = type { i32, i32 }
+ %struct.BlockNode = type { i16, i16, i8, [3 x i8], i8, i8 }
+ %struct.DSPContext = type { void (i16*, i8*, i32)*, void (i16*, i8*, i8*, i32)*, void (i16*, i8*, i32)*, void (i16*, i8*, i32)*, void (i16*, i8*, i32)*, void (i8*, i16*, i32)*, void (i8*, i16*, i32)*, i32 (i16*)*, void (i8*, i8*, i32, i32, i32, i32, i32)*, void (i8*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32)*, void (i16*)*, i32 (i8*, i32)*, i32 (i8*, i32)*, [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], i32 (i8*, i16*, i32)*, [4 x [4 x void (i8*, i8*, i32, i32)*]], [4 x [4 x void (i8*, i8*, i32, i32)*]], [4 x [4 x void (i8*, i8*, i32, i32)*]], [4 x [4 x void (i8*, i8*, i32, i32)*]], [2 x void (i8*, i8*, i8*, i32, i32)*], [11 x void (i8*, i8*, i32, i32, i32)*], [11 x void (i8*, i8*, i32, i32, i32)*], [2 x [16 x void (i8*, i8*, i32)*]], [2 x [16 x void (i8*, i8*, i32)*]], [2 x [16 x void (i8*, i8*, i32)*]], [2 x [16 x void (i8*, i8*, i32)*]], [8 x void (i8*, i8*, i32)*], [3 x void (i8*, i8*, i32, i32, i32, i32)*], [3 x void (i8*, i8*, i32, i32, i32, i32)*], [3 x void (i8*, i8*, i32, i32, i32, i32)*], [4 x [16 x void (i8*, i8*, i32)*]], [4 x [16 x void (i8*, i8*, i32)*]], [4 x [16 x void (i8*, i8*, i32)*]], [4 x [16 x void (i8*, i8*, i32)*]], [10 x void (i8*, i32, i32, i32, i32)*], [10 x void (i8*, i8*, i32, i32, i32, i32, i32)*], [2 x [16 x void (i8*, i8*, i32)*]], [2 x [16 x void (i8*, i8*, i32)*]], void (i8*, i32, i32, i32, i32, i32, i32)*, void (i8*, i32, i32, i32, i32, i32, i32)*, void (i8*, i32, i32, i32, i32, i32, i32)*, void (i8*, i32, i32, i32, i32, i32, i32)*, void (i8*, i16*, i32)*, [2 x [4 x i32 (i8*, i8*, i8*, i32, i32)*]], void (i8*, i8*, i32)*, void (i8*, i8*, i8*, i32)*, void (i8*, i8*, i8*, i32, i32*, i32*)*, void (i32*, i32*, i32)*, void (i8*, i32, i32, i32, i8*)*, void (i8*, i32, i32, i32, i8*)*, void (i8*, i32, i32, i32, i8*)*, void (i8*, i32, i32, i32, i8*)*, void (i8*, i32, i32, i32)*, void (i8*, i32, i32, i32)*, void ([4 x [4 x i16]]*, i8*, [40 x i8]*, [40 x [2 x i16]]*, i32, i32, i32, i32, i32)*, void (i8*, i32, i32)*, void (i8*, i32, i32)*, void (i8*, i32)*, void (float*, float*, i32)*, void (float*, float*, i32)*, void (float*, float*, float*, i32)*, void (float*, float*, float*, float*, i32, i32, i32)*, void (i16*, float*, i32)*, void (i16*)*, void (i16*)*, void (i16*)*, void (i8*, i32, i16*)*, void (i8*, i32, i16*)*, [64 x i8], i32, i32 (i16*, i16*, i16*, i32)*, void (i16*, i16*, i32)*, void (i8*, i16*, i32)*, void (i8*, i16*, i32)*, void (i8*, i16*, i32)*, void (i8*, i16*, i32)*, void ([4 x i16]*)*, void (i32*, i32*, i32*, i32*, i32*, i32*, i32)*, void (i32*, i32)*, void (i8*, i32, i8**, i32, i32, i32, i32, i32, %struct.slice_buffer*, i32, i8*)*, void (i8*, i32, i32)*, [4 x void (i8*, i32, i8*, i32, i32, i32)*], void (i16*)*, void (i16*, i32)*, void (i16*, i32)*, void (i16*, i32)*, void (i8*, i32)*, void (i8*, i32)*, [16 x void (i8*, i8*, i32, i32)*] }
+ %struct.FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct.FILE*, i32, i32, i32, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i8*, i8*, i32, i32, [40 x i8] }
+ %struct.GetBitContext = type { i8*, i8*, i32*, i32, i32, i32, i32 }
+ %struct.MJpegContext = type opaque
+ %struct.MotionEstContext = type { %struct.AVCodecContext*, i32, [4 x [2 x i32]], [4 x [2 x i32]], i8*, i8*, [2 x i8*], i8*, i32, i32*, i32*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x [4 x i8*]], [4 x [4 x i8*]], i32, i32, i32, i32, i32, [4 x void (i8*, i8*, i32, i32)*]*, [4 x void (i8*, i8*, i32, i32)*]*, [16 x void (i8*, i8*, i32)*]*, [16 x void (i8*, i8*, i32)*]*, [4097 x i8]*, i8*, i32 (%struct.MpegEncContext*, i32*, i32*, i32, i32, i32, i32, i32)* }
+ %struct.MpegEncContext = type { %struct.AVCodecContext*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.PutBitContext, i32, i32, i32, i32, i32, i32, i64, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.Picture*, %struct.Picture**, %struct.Picture**, i32, i32, [8 x %struct.MpegEncContext*], %struct.Picture, %struct.Picture, %struct.Picture, %struct.Picture, %struct.Picture*, %struct.Picture*, %struct.Picture*, [3 x i8*], [3 x i32], i16*, [3 x i16*], [20 x i16], i32, i32, i8*, i8*, i8*, i8*, i8*, [16 x i16]*, [3 x [16 x i16]*], i32, i8*, i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i32, i32, i32, i32, i32*, i32, i32, i32, i32, i32, i32, i32, [5 x i32], i32, i32, i32, i32, %struct.DSPContext, i32, i32, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x [2 x [2 x i16]*]], [2 x [2 x [2 x [2 x i16]*]]], [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x [2 x [2 x i16]*]], [2 x [2 x [2 x [2 x i16]*]]], [2 x i8*], [2 x [2 x i8*]], i32, i32, i32, [2 x [4 x [2 x i32]]], [2 x [2 x i32]], [2 x [2 x [2 x i32]]], i8*, [2 x [64 x i16]], %struct.MotionEstContext, i32, i32, i32, i32, i32, i32, i16*, [6 x i32], [6 x i32], [3 x i8*], i32*, [64 x i16], [64 x i16], [64 x i16], [64 x i16], i32, i32, i32, i32, i32, i8*, i8*, i8*, i8*, i8*, i8*, [8 x i32], [64 x i32]*, [64 x i32]*, [2 x [64 x i16]]*, [2 x [64 x i16]]*, [12 x i32], %struct.ScanTable, %struct.ScanTable, %struct.ScanTable, %struct.ScanTable, [64 x i32]*, [2 x i32], [64 x i16]*, i8*, i64, i64, i32, i32, %struct.RateControlContext, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i32, i32, %struct.GetBitContext, i32, i32, i32, %struct.ParseContext, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i64, i16, i16, i16, i16, i32, i32, i32, i32, i32, i32, i32, i32, i32, [2 x [2 x i32]], [2 x [2 x i32]], [2 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.PutBitContext, %struct.PutBitContext, i32, i32, i32, i32, i32, i32, i8*, i32, i32, i32, i32, i32, [3 x i32], %struct.MJpegContext*, [3 x i32], [3 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [2 x [65 x [65 x [2 x i32]]]]*, i32, i32, %struct.GetBitContext, i32, i32, i32, i8*, i32, [2 x [2 x i32]], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [2 x i32], i32, i32, i32, i32, i8*, i32, [12 x i16*], [64 x i16]*, [8 x [64 x i16]]*, i32 (%struct.MpegEncContext*, [64 x i16]*)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, i32 (%struct.MpegEncContext*, i16*, i32, i32, i32*)*, i32 (%struct.MpegEncContext*, i16*, i32, i32, i32*)*, void (%struct.MpegEncContext*, i16*)* }
+ %struct.ParseContext = type { i8*, i32, i32, i32, i32, i32, i32, i32 }
+ %struct.Picture = type { [4 x i8*], [4 x i32], [4 x i8*], i32, i32, i64, i32, i32, i32, i32, i32, i8*, i32, i8*, [2 x [2 x i16]*], i32*, i8, i8*, [4 x i64], i32, i32, i32, i32, i32, %struct.AVPanScan*, i32, i32, i16*, [2 x i8*], [3 x i8*], [2 x [2 x i16]*], i32*, [2 x i32], i32, i32, i32, i32, [2 x [16 x i32]], [2 x i32], i32, i32, i16*, i16*, i8*, i32*, i32 }
+ %struct.Plane = type { i32, i32, [8 x [4 x %struct.SubBand]] }
+ %struct.Predictor = type { double, double, double }
+ %struct.PutBitContext = type { i32, i32, i8*, i8*, i8* }
+ %struct.RangeCoder = type { i32, i32, i32, i32, [256 x i8], [256 x i8], i8*, i8*, i8* }
+ %struct.RateControlContext = type { %struct.FILE*, i32, %struct.RateControlEntry*, double, [5 x %struct.Predictor], double, double, double, double, double, [5 x double], i32, i32, [5 x i64], [5 x i64], [5 x i64], [5 x i64], [5 x i32], i32, i8*, float, i32, %struct.AVEvalExpr* }
+ %struct.RateControlEntry = type { i32, float, i32, i32, i32, i32, i32, i64, i32, float, i32, i32, i32, i32, i32, i32 }
+ %struct.RcOverride = type { i32, i32, i32, float }
+ %struct.ScanTable = type { i8*, [64 x i8], [64 x i8] }
+ %struct.SnowContext = type { %struct.AVCodecContext*, %struct.RangeCoder, %struct.DSPContext, %struct.AVFrame, %struct.AVFrame, %struct.AVFrame, [8 x %struct.AVFrame], %struct.AVFrame, [32 x i8], [4224 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [8 x [2 x i16]*], [8 x i32*], i32*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x %struct.Plane], %struct.BlockNode*, [1024 x i32], i32, %struct.slice_buffer, %struct.MpegEncContext }
+ %struct.SubBand = type { i32, i32, i32, i32, i32, i32*, i32, i32, i32, %struct.x_and_coeff*, %struct.SubBand*, [519 x [32 x i8]] }
+ %struct._IO_marker = type { %struct._IO_marker*, %struct.FILE*, i32 }
+ %struct.slice_buffer = type { i32**, i32**, i32, i32, i32, i32, i32* }
+ %struct.x_and_coeff = type { i16, i16 }
+
+define fastcc void @iterative_me(%struct.SnowContext* %s) {
+entry:
+ %state = alloca [4224 x i8], align 8 ; <[4224 x i8]*> [#uses=0]
+ %best_rd4233 = alloca i32, align 4 ; <i32*> [#uses=0]
+ %tmp21 = getelementptr %struct.SnowContext* %s, i32 0, i32 36 ; <i32*> [#uses=2]
+ br label %bb4198
+
+bb79: ; preds = %bb4189.preheader
+ br i1 false, label %cond_next239, label %cond_true
+
+cond_true: ; preds = %bb79
+ ret void
+
+cond_next239: ; preds = %bb79
+ %tmp286 = alloca i8, i32 0 ; <i8*> [#uses=0]
+ ret void
+
+bb4198: ; preds = %bb4189.preheader, %entry
+ br i1 false, label %bb4189.preheader, label %bb4204
+
+bb4189.preheader: ; preds = %bb4198
+ br i1 false, label %bb79, label %bb4198
+
+bb4204: ; preds = %bb4198
+ br i1 false, label %bb4221, label %cond_next4213
+
+cond_next4213: ; preds = %bb4204
+ ret void
+
+bb4221: ; preds = %bb4204
+ br i1 false, label %bb5242.preheader, label %UnifiedReturnBlock
+
+bb5242.preheader: ; preds = %bb4221
+ br label %bb5242
+
+bb4231: ; preds = %bb5233
+ %tmp4254.sum = add i32 0, 1 ; <i32> [#uses=2]
+ br i1 false, label %bb4559, label %cond_next4622
+
+bb4559: ; preds = %bb4231
+ ret void
+
+cond_next4622: ; preds = %bb4231
+ %tmp4637 = load i16* null ; <i16> [#uses=1]
+ %tmp46374638 = sext i16 %tmp4637 to i32 ; <i32> [#uses=1]
+ %tmp4642 = load i16* null ; <i16> [#uses=1]
+ %tmp46424643 = sext i16 %tmp4642 to i32 ; <i32> [#uses=1]
+ %tmp4648 = load i16* null ; <i16> [#uses=1]
+ %tmp46484649 = sext i16 %tmp4648 to i32 ; <i32> [#uses=1]
+ %tmp4653 = getelementptr %struct.BlockNode* null, i32 %tmp4254.sum, i32 0 ; <i16*> [#uses=1]
+ %tmp4654 = load i16* %tmp4653 ; <i16> [#uses=1]
+ %tmp46544655 = sext i16 %tmp4654 to i32 ; <i32> [#uses=1]
+ %tmp4644 = add i32 %tmp46374638, 2 ; <i32> [#uses=1]
+ %tmp4650 = add i32 %tmp4644, %tmp46424643 ; <i32> [#uses=1]
+ %tmp4656 = add i32 %tmp4650, %tmp46484649 ; <i32> [#uses=1]
+ %tmp4657 = add i32 %tmp4656, %tmp46544655 ; <i32> [#uses=2]
+ %tmp4658 = ashr i32 %tmp4657, 2 ; <i32> [#uses=1]
+ %tmp4662 = load i16* null ; <i16> [#uses=1]
+ %tmp46624663 = sext i16 %tmp4662 to i32 ; <i32> [#uses=1]
+ %tmp4672 = getelementptr %struct.BlockNode* null, i32 0, i32 1 ; <i16*> [#uses=1]
+ %tmp4673 = load i16* %tmp4672 ; <i16> [#uses=1]
+ %tmp46734674 = sext i16 %tmp4673 to i32 ; <i32> [#uses=1]
+ %tmp4678 = getelementptr %struct.BlockNode* null, i32 %tmp4254.sum, i32 1 ; <i16*> [#uses=1]
+ %tmp4679 = load i16* %tmp4678 ; <i16> [#uses=1]
+ %tmp46794680 = sext i16 %tmp4679 to i32 ; <i32> [#uses=1]
+ %tmp4669 = add i32 %tmp46624663, 2 ; <i32> [#uses=1]
+ %tmp4675 = add i32 %tmp4669, 0 ; <i32> [#uses=1]
+ %tmp4681 = add i32 %tmp4675, %tmp46734674 ; <i32> [#uses=1]
+ %tmp4682 = add i32 %tmp4681, %tmp46794680 ; <i32> [#uses=2]
+ %tmp4683 = ashr i32 %tmp4682, 2 ; <i32> [#uses=1]
+ %tmp4703 = load i32* %tmp21 ; <i32> [#uses=1]
+ %tmp4707 = shl i32 %tmp4703, 0 ; <i32> [#uses=4]
+ %tmp4710 = load %struct.BlockNode** null ; <%struct.BlockNode*> [#uses=6]
+ %tmp4713 = mul i32 %tmp4707, %mb_y.4 ; <i32> [#uses=1]
+ %tmp4715 = add i32 %tmp4713, %mb_x.7 ; <i32> [#uses=7]
+ store i8 0, i8* null
+ store i8 0, i8* null
+ %tmp47594761 = bitcast %struct.BlockNode* null to i8* ; <i8*> [#uses=2]
+ call void @llvm.memcpy.i32( i8* null, i8* %tmp47594761, i32 10, i32 0 )
+ %tmp4716.sum5775 = add i32 %tmp4715, 1 ; <i32> [#uses=1]
+ %tmp4764 = getelementptr %struct.BlockNode* %tmp4710, i32 %tmp4716.sum5775 ; <%struct.BlockNode*> [#uses=1]
+ %tmp47644766 = bitcast %struct.BlockNode* %tmp4764 to i8* ; <i8*> [#uses=1]
+ %tmp4716.sum5774 = add i32 %tmp4715, %tmp4707 ; <i32> [#uses=0]
+ %tmp47704772 = bitcast %struct.BlockNode* null to i8* ; <i8*> [#uses=1]
+ %tmp4774 = add i32 %tmp4707, 1 ; <i32> [#uses=1]
+ %tmp4716.sum5773 = add i32 %tmp4774, %tmp4715 ; <i32> [#uses=1]
+ %tmp4777 = getelementptr %struct.BlockNode* %tmp4710, i32 %tmp4716.sum5773 ; <%struct.BlockNode*> [#uses=1]
+ %tmp47774779 = bitcast %struct.BlockNode* %tmp4777 to i8* ; <i8*> [#uses=1]
+ %tmp4781 = icmp slt i32 %mb_x.7, 0 ; <i1> [#uses=1]
+ %tmp4788 = or i1 %tmp4781, %tmp4784 ; <i1> [#uses=2]
+ br i1 %tmp4788, label %cond_true4791, label %cond_next4794
+
+cond_true4791: ; preds = %cond_next4622
+ unreachable
+
+cond_next4794: ; preds = %cond_next4622
+ %tmp4797 = icmp slt i32 %mb_x.7, %tmp4707 ; <i1> [#uses=1]
+ br i1 %tmp4797, label %cond_next4803, label %cond_true4800
+
+cond_true4800: ; preds = %cond_next4794
+ unreachable
+
+cond_next4803: ; preds = %cond_next4794
+ %tmp4825 = ashr i32 %tmp4657, 12 ; <i32> [#uses=1]
+ shl i32 %tmp4682, 4 ; <i32>:0 [#uses=1]
+ %tmp4828 = and i32 %0, -64 ; <i32> [#uses=1]
+ %tmp4831 = getelementptr %struct.BlockNode* %tmp4710, i32 %tmp4715, i32 2 ; <i8*> [#uses=0]
+ %tmp4826 = add i32 %tmp4828, %tmp4825 ; <i32> [#uses=1]
+ %tmp4829 = add i32 %tmp4826, 0 ; <i32> [#uses=1]
+ %tmp4835 = add i32 %tmp4829, 0 ; <i32> [#uses=1]
+ store i32 %tmp4835, i32* null
+ %tmp48534854 = trunc i32 %tmp4658 to i16 ; <i16> [#uses=1]
+ %tmp4856 = getelementptr %struct.BlockNode* %tmp4710, i32 %tmp4715, i32 0 ; <i16*> [#uses=1]
+ store i16 %tmp48534854, i16* %tmp4856
+ %tmp48574858 = trunc i32 %tmp4683 to i16 ; <i16> [#uses=1]
+ %tmp4860 = getelementptr %struct.BlockNode* %tmp4710, i32 %tmp4715, i32 1 ; <i16*> [#uses=1]
+ store i16 %tmp48574858, i16* %tmp4860
+ %tmp4866 = getelementptr %struct.BlockNode* %tmp4710, i32 %tmp4715, i32 4 ; <i8*> [#uses=0]
+ br i1 false, label %bb4933, label %cond_false4906
+
+cond_false4906: ; preds = %cond_next4803
+ call void @llvm.memcpy.i32( i8* %tmp47594761, i8* null, i32 10, i32 0 )
+ call void @llvm.memcpy.i32( i8* %tmp47644766, i8* null, i32 10, i32 0 )
+ call void @llvm.memcpy.i32( i8* %tmp47704772, i8* null, i32 10, i32 0 )
+ call void @llvm.memcpy.i32( i8* %tmp47774779, i8* null, i32 10, i32 0 )
+ br label %bb5215
+
+bb4933: ; preds = %bb5215, %cond_next4803
+ br i1 false, label %cond_true4944, label %bb5215
+
+cond_true4944: ; preds = %bb4933
+ %tmp4982 = load i32* %tmp21 ; <i32> [#uses=1]
+ %tmp4986 = shl i32 %tmp4982, 0 ; <i32> [#uses=2]
+ %tmp4992 = mul i32 %tmp4986, %mb_y.4 ; <i32> [#uses=1]
+ %tmp4994 = add i32 %tmp4992, %mb_x.7 ; <i32> [#uses=5]
+ %tmp4995.sum5765 = add i32 %tmp4994, 1 ; <i32> [#uses=1]
+ %tmp5043 = getelementptr %struct.BlockNode* null, i32 %tmp4995.sum5765 ; <%struct.BlockNode*> [#uses=1]
+ %tmp50435045 = bitcast %struct.BlockNode* %tmp5043 to i8* ; <i8*> [#uses=2]
+ call void @llvm.memcpy.i32( i8* null, i8* %tmp50435045, i32 10, i32 0 )
+ %tmp4995.sum5764 = add i32 %tmp4994, %tmp4986 ; <i32> [#uses=1]
+ %tmp5049 = getelementptr %struct.BlockNode* null, i32 %tmp4995.sum5764 ; <%struct.BlockNode*> [#uses=1]
+ %tmp50495051 = bitcast %struct.BlockNode* %tmp5049 to i8* ; <i8*> [#uses=2]
+ call void @llvm.memcpy.i32( i8* null, i8* %tmp50495051, i32 10, i32 0 )
+ %tmp4995.sum5763 = add i32 0, %tmp4994 ; <i32> [#uses=1]
+ %tmp5056 = getelementptr %struct.BlockNode* null, i32 %tmp4995.sum5763 ; <%struct.BlockNode*> [#uses=1]
+ %tmp50565058 = bitcast %struct.BlockNode* %tmp5056 to i8* ; <i8*> [#uses=1]
+ br i1 %tmp4788, label %cond_true5070, label %cond_next5073
+
+cond_true5070: ; preds = %cond_true4944
+ unreachable
+
+cond_next5073: ; preds = %cond_true4944
+ %tmp5139 = getelementptr %struct.BlockNode* null, i32 %tmp4994, i32 1 ; <i16*> [#uses=0]
+ %tmp5145 = getelementptr %struct.BlockNode* null, i32 %tmp4994, i32 4 ; <i8*> [#uses=0]
+ call void @llvm.memcpy.i32( i8* %tmp50435045, i8* null, i32 10, i32 0 )
+ call void @llvm.memcpy.i32( i8* %tmp50495051, i8* null, i32 10, i32 0 )
+ call void @llvm.memcpy.i32( i8* %tmp50565058, i8* null, i32 10, i32 0 )
+ br label %bb5215
+
+bb5215: ; preds = %cond_next5073, %bb4933, %cond_false4906
+ %i4232.3 = phi i32 [ 0, %cond_false4906 ], [ 0, %cond_next5073 ], [ 0, %bb4933 ] ; <i32> [#uses=1]
+ %tmp5217 = icmp slt i32 %i4232.3, 4 ; <i1> [#uses=1]
+ br i1 %tmp5217, label %bb4933, label %bb5220
+
+bb5220: ; preds = %bb5215
+ br i1 false, label %bb5230, label %cond_true5226
+
+cond_true5226: ; preds = %bb5220
+ ret void
+
+bb5230: ; preds = %bb5220
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
+ br label %bb5233
+
+bb5233: ; preds = %bb5233.preheader, %bb5230
+ %indvar = phi i32 [ 0, %bb5233.preheader ], [ %indvar.next, %bb5230 ] ; <i32> [#uses=2]
+ %mb_x.7 = shl i32 %indvar, 1 ; <i32> [#uses=4]
+ br i1 false, label %bb4231, label %bb5239
+
+bb5239: ; preds = %bb5233
+ %indvar.next37882 = add i32 %indvar37881, 1 ; <i32> [#uses=1]
+ br label %bb5242
+
+bb5242: ; preds = %bb5239, %bb5242.preheader
+ %indvar37881 = phi i32 [ 0, %bb5242.preheader ], [ %indvar.next37882, %bb5239 ] ; <i32> [#uses=2]
+ %mb_y.4 = shl i32 %indvar37881, 1 ; <i32> [#uses=3]
+ br i1 false, label %bb5233.preheader, label %bb5248
+
+bb5233.preheader: ; preds = %bb5242
+ %tmp4784 = icmp slt i32 %mb_y.4, 0 ; <i1> [#uses=1]
+ br label %bb5233
+
+bb5248: ; preds = %bb5242
+ ret void
+
+UnifiedReturnBlock: ; preds = %bb4221
+ ret void
+}
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
diff --git a/test/CodeGen/ARM/addrmode.ll b/test/CodeGen/ARM/addrmode.ll
new file mode 100644
index 0000000..a3832c0
--- /dev/null
+++ b/test/CodeGen/ARM/addrmode.ll
@@ -0,0 +1,15 @@
+; RUN: llvm-as < %s | llc -march=arm -stats |& grep asm-printer | grep 4
+
+define i32 @t1(i32 %a) {
+ %b = mul i32 %a, 9
+ %c = inttoptr i32 %b to i32*
+ %d = load i32* %c
+ ret i32 %d
+}
+
+define i32 @t2(i32 %a) {
+ %b = mul i32 %a, -7
+ %c = inttoptr i32 %b to i32*
+ %d = load i32* %c
+ ret i32 %d
+}
diff --git a/test/CodeGen/ARM/aliases.ll b/test/CodeGen/ARM/aliases.ll
new file mode 100644
index 0000000..bd7555a
--- /dev/null
+++ b/test/CodeGen/ARM/aliases.ll
@@ -0,0 +1,32 @@
+; RUN: llvm-as < %s | \
+; RUN: llc -mtriple=arm-linux-gnueabi -o %t -f
+; RUN: grep -c set %t | grep 5
+; RUN: grep -c globl %t | grep 4
+; RUN: grep -c weak %t | grep 1
+
+@bar = external global i32
+@foo1 = alias i32* @bar
+@foo2 = alias i32* @bar
+
+%FunTy = type i32()
+
+declare i32 @foo_f()
+@bar_f = alias weak %FunTy* @foo_f
+
+@bar_i = alias internal i32* @bar
+
+@A = alias bitcast (i32* @bar to i64*)
+
+define i32 @test() {
+entry:
+ %tmp = load i32* @foo1
+ %tmp1 = load i32* @foo2
+ %tmp0 = load i32* @bar_i
+ %tmp2 = call i32 @foo_f()
+ %tmp3 = add i32 %tmp, %tmp2
+ %tmp4 = call %FunTy* @bar_f()
+ %tmp5 = add i32 %tmp3, %tmp4
+ %tmp6 = add i32 %tmp1, %tmp5
+ %tmp7 = add i32 %tmp6, %tmp0
+ ret i32 %tmp7
+}
diff --git a/test/CodeGen/ARM/align.ll b/test/CodeGen/ARM/align.ll
new file mode 100644
index 0000000..d145946
--- /dev/null
+++ b/test/CodeGen/ARM/align.ll
@@ -0,0 +1,16 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \
+; RUN: grep align.*1 | wc | grep 1
+; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-linux-gnueabi | \
+; RUN: grep align.*2 | wc | grep 2
+; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-linux-gnueabi | \
+; RUN: grep align.*3 | wc | grep 2
+; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple-darwin | \
+; RUN: grep align.*2 | wc | grep 4
+
+%a = global bool true
+%b = global sbyte 1
+%c = global short 2
+%d = global int 3
+%e = global long 4
+%f = global float 5.0
+%g = global double 6.0
diff --git a/test/CodeGen/ARM/alloca.ll b/test/CodeGen/ARM/alloca.ll
new file mode 100644
index 0000000..b98a674
--- /dev/null
+++ b/test/CodeGen/ARM/alloca.ll
@@ -0,0 +1,13 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mtriple=arm-linux-gnu | \
+; RUN: grep {mov r11, sp}
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mtriple=arm-linux-gnu | \
+; RUN: grep {mov sp, r11}
+
+void %f(uint %a) {
+entry:
+ %tmp = alloca sbyte, uint %a
+ call void %g( sbyte* %tmp, uint %a, uint 1, uint 2, uint 3 )
+ ret void
+}
+
+declare void %g(sbyte*, uint, uint, uint, uint)
diff --git a/test/CodeGen/ARM/argaddr.ll b/test/CodeGen/ARM/argaddr.ll
new file mode 100644
index 0000000..a131721
--- /dev/null
+++ b/test/CodeGen/ARM/argaddr.ll
@@ -0,0 +1,18 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm
+void %f(int %a, int %b, int %c, int %d, int %e) {
+entry:
+ %a_addr = alloca int ; <int*> [#uses=2]
+ %b_addr = alloca int ; <int*> [#uses=2]
+ %c_addr = alloca int ; <int*> [#uses=2]
+ %d_addr = alloca int ; <int*> [#uses=2]
+ %e_addr = alloca int ; <int*> [#uses=2]
+ store int %a, int* %a_addr
+ store int %b, int* %b_addr
+ store int %c, int* %c_addr
+ store int %d, int* %d_addr
+ store int %e, int* %e_addr
+ call void %g( int* %a_addr, int* %b_addr, int* %c_addr, int* %d_addr, int* %e_addr )
+ ret void
+}
+
+declare void %g(int*, int*, int*, int*, int*)
diff --git a/test/CodeGen/ARM/arguments.ll b/test/CodeGen/ARM/arguments.ll
new file mode 100644
index 0000000..fbaaa23
--- /dev/null
+++ b/test/CodeGen/ARM/arguments.ll
@@ -0,0 +1,11 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi | \
+; RUN: grep {mov r0, r2} | wc -l | grep 1
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | \
+; RUN: grep {mov r0, r1} | wc -l | grep 1
+
+define i32 @f(i32 %a, i64 %b) {
+ %tmp = call i32 @g(i64 %b)
+ ret i32 %tmp
+}
+
+declare i32 @g(i64)
diff --git a/test/CodeGen/ARM/arm-asm.ll b/test/CodeGen/ARM/arm-asm.ll
new file mode 100644
index 0000000..6b8ce9a
--- /dev/null
+++ b/test/CodeGen/ARM/arm-asm.ll
@@ -0,0 +1,7 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm
+
+void %frame_dummy() {
+entry:
+ %tmp1 = tail call void (sbyte*)* (void (sbyte*)*)* asm "", "=r,0,~{dirflag},~{fpsr},~{flags}"( void (sbyte*)* null )
+ ret void
+}
diff --git a/test/CodeGen/ARM/arm-negative-stride.ll b/test/CodeGen/ARM/arm-negative-stride.ll
new file mode 100644
index 0000000..1048fb7
--- /dev/null
+++ b/test/CodeGen/ARM/arm-negative-stride.ll
@@ -0,0 +1,20 @@
+; RUN: llvm-as < %s | llc -march=arm | grep {str r1, \\\[r.*, -r.*, lsl #2\}
+
+define void @test(i32* %P, i32 %A, i32 %i) {
+entry:
+ icmp eq i32 %i, 0 ; <i1>:0 [#uses=1]
+ br i1 %0, label %return, label %bb
+
+bb: ; preds = %bb, %entry
+ %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %bb ] ; <i32> [#uses=2]
+ %i_addr.09.0 = sub i32 %i, %indvar ; <i32> [#uses=1]
+ %tmp2 = getelementptr i32* %P, i32 %i_addr.09.0 ; <i32*> [#uses=1]
+ store i32 %A, i32* %tmp2
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=2]
+ icmp eq i32 %indvar.next, %i ; <i1>:1 [#uses=1]
+ br i1 %1, label %return, label %bb
+
+return: ; preds = %bb, %entry
+ ret void
+}
+
diff --git a/test/CodeGen/ARM/bits.ll b/test/CodeGen/ARM/bits.ll
new file mode 100644
index 0000000..82b4fa7
--- /dev/null
+++ b/test/CodeGen/ARM/bits.ll
@@ -0,0 +1,36 @@
+; RUN: llvm-as < %s | llc -march=arm > %t
+; RUN: grep and %t | wc -l | grep 1
+; RUN: grep orr %t | wc -l | grep 1
+; RUN: grep eor %t | wc -l | grep 1
+; RUN: grep mov.*lsl %t | wc -l | grep 1
+; RUN: grep mov.*asr %t | wc -l | grep 1
+
+define i32 @f1(i32 %a, i32 %b) {
+entry:
+ %tmp2 = and i32 %b, %a ; <i32> [#uses=1]
+ ret i32 %tmp2
+}
+
+define i32 @f2(i32 %a, i32 %b) {
+entry:
+ %tmp2 = or i32 %b, %a ; <i32> [#uses=1]
+ ret i32 %tmp2
+}
+
+define i32 @f3(i32 %a, i32 %b) {
+entry:
+ %tmp2 = xor i32 %b, %a ; <i32> [#uses=1]
+ ret i32 %tmp2
+}
+
+define i32 @f4(i32 %a, i32 %b) {
+entry:
+ %tmp3 = shl i32 %a, %b ; <i32> [#uses=1]
+ ret i32 %tmp3
+}
+
+define i32 @f5(i32 %a, i32 %b) {
+entry:
+ %tmp3 = ashr i32 %a, %b ; <i32> [#uses=1]
+ ret i32 %tmp3
+}
diff --git a/test/CodeGen/ARM/branch.ll b/test/CodeGen/ARM/branch.ll
new file mode 100644
index 0000000..df28f42
--- /dev/null
+++ b/test/CodeGen/ARM/branch.ll
@@ -0,0 +1,57 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm > %t
+; RUN: grep bne %t
+; RUN: grep bge %t
+; RUN: grep bhs %t
+; RUN: grep blo %t
+
+void %f1(int %a, int %b, int* %v) {
+entry:
+ %tmp = seteq int %a, %b ; <bool> [#uses=1]
+ br bool %tmp, label %cond_true, label %return
+
+cond_true: ; preds = %entry
+ store int 0, int* %v
+ ret void
+
+return: ; preds = %entry
+ ret void
+}
+
+void %f2(int %a, int %b, int* %v) {
+entry:
+ %tmp = setlt int %a, %b ; <bool> [#uses=1]
+ br bool %tmp, label %cond_true, label %return
+
+cond_true: ; preds = %entry
+ store int 0, int* %v
+ ret void
+
+return: ; preds = %entry
+ ret void
+}
+
+void %f3(uint %a, uint %b, int* %v) {
+entry:
+ %tmp = setlt uint %a, %b ; <bool> [#uses=1]
+ br bool %tmp, label %cond_true, label %return
+
+cond_true: ; preds = %entry
+ store int 0, int* %v
+ ret void
+
+return: ; preds = %entry
+ ret void
+}
+
+void %f4(uint %a, uint %b, int* %v) {
+entry:
+ %tmp = setlt uint %a, %b ; <bool> [#uses=1]
+ br bool %tmp, label %return, label %cond_true
+
+cond_true: ; preds = %entry
+ store int 0, int* %v
+ ret void
+
+return: ; preds = %entry
+ ret void
+}
diff --git a/test/CodeGen/ARM/bx_fold.ll b/test/CodeGen/ARM/bx_fold.ll
new file mode 100644
index 0000000..437b318
--- /dev/null
+++ b/test/CodeGen/ARM/bx_fold.ll
@@ -0,0 +1,30 @@
+; RUN: llvm-as < %s | llc -march=arm
+; RUN: llvm-as < %s | llc -march=arm | not grep bx
+
+define void @test(i32 %Ptr, i8* %L) {
+entry:
+ br label %bb1
+
+bb: ; preds = %bb1
+ %gep.upgrd.1 = zext i32 %indvar to i64 ; <i64> [#uses=1]
+ %tmp7 = getelementptr i8* %L, i64 %gep.upgrd.1 ; <i8*> [#uses=1]
+ store i8 0, i8* %tmp7
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
+ br label %bb1
+
+bb1: ; preds = %bb, %entry
+ %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %bb ] ; <i32> [#uses=3]
+ %i.0 = bitcast i32 %indvar to i32 ; <i32> [#uses=2]
+ %tmp = tail call i32 (...)* @bar( ) ; <i32> [#uses=1]
+ %tmp2 = add i32 %i.0, %tmp ; <i32> [#uses=1]
+ %Ptr_addr.0 = sub i32 %Ptr, %tmp2 ; <i32> [#uses=0]
+ %tmp12 = icmp eq i32 %i.0, %Ptr ; <i1> [#uses=1]
+ %tmp12.not = xor i1 %tmp12, true ; <i1> [#uses=1]
+ %bothcond = and i1 %tmp12.not, false ; <i1> [#uses=1]
+ br i1 %bothcond, label %bb, label %bb18
+
+bb18: ; preds = %bb1
+ ret void
+}
+
+declare i32 @bar(...)
diff --git a/test/CodeGen/ARM/call.ll b/test/CodeGen/ARM/call.ll
new file mode 100644
index 0000000..c7e10b1
--- /dev/null
+++ b/test/CodeGen/ARM/call.ll
@@ -0,0 +1,18 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep {mov lr, pc}
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v5t | grep blx
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mtriple=arm-linux-gnueabi\
+; RUN: -relocation-model=pic | grep {PLT}
+
+%t = weak global int ()* null
+declare void %g(int, int, int, int)
+
+void %f() {
+ call void %g( int 1, int 2, int 3, int 4 )
+ ret void
+}
+
+void %g() {
+ %tmp = load int ()** %t
+ %tmp = tail call int %tmp( )
+ ret void
+}
diff --git a/test/CodeGen/ARM/call_nolink.ll b/test/CodeGen/ARM/call_nolink.ll
new file mode 100644
index 0000000..1af6fad
--- /dev/null
+++ b/test/CodeGen/ARM/call_nolink.ll
@@ -0,0 +1,52 @@
+; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi | \
+; RUN: not grep {bx lr}
+
+ %struct.anon = type { i32 (i32, i32, i32)*, i32, i32, [3 x i32], i8*, i8*, i8* }
+@r = external global [14 x i32] ; <[14 x i32]*> [#uses=4]
+@isa = external global [13 x %struct.anon] ; <[13 x %struct.anon]*> [#uses=1]
+@pgm = external global [2 x { i32, [3 x i32] }] ; <[2 x { i32, [3 x i32] }]*> [#uses=4]
+@numi = external global i32 ; <i32*> [#uses=1]
+@counter = external global [2 x i32] ; <[2 x i32]*> [#uses=1]
+
+
+define void @main_bb_2E_i_bb205_2E_i_2E_i_bb115_2E_i_2E_i() {
+newFuncRoot:
+ br label %bb115.i.i
+
+bb115.i.i.bb170.i.i_crit_edge.exitStub: ; preds = %bb115.i.i
+ ret void
+
+bb115.i.i.bb115.i.i_crit_edge: ; preds = %bb115.i.i
+ br label %bb115.i.i
+
+bb115.i.i: ; preds = %bb115.i.i.bb115.i.i_crit_edge, %newFuncRoot
+ %i_addr.3210.0.i.i = phi i32 [ %tmp166.i.i, %bb115.i.i.bb115.i.i_crit_edge ], [ 0, %newFuncRoot ] ; <i32> [#uses=7]
+ %tmp124.i.i = getelementptr [2 x { i32, [3 x i32] }]* @pgm, i32 0, i32 %i_addr.3210.0.i.i, i32 1, i32 0 ; <i32*> [#uses=1]
+ %tmp125.i.i = load i32* %tmp124.i.i ; <i32> [#uses=1]
+ %tmp126.i.i = getelementptr [14 x i32]* @r, i32 0, i32 %tmp125.i.i ; <i32*> [#uses=1]
+ %tmp127.i.i = load i32* %tmp126.i.i ; <i32> [#uses=1]
+ %tmp131.i.i = getelementptr [2 x { i32, [3 x i32] }]* @pgm, i32 0, i32 %i_addr.3210.0.i.i, i32 1, i32 1 ; <i32*> [#uses=1]
+ %tmp132.i.i = load i32* %tmp131.i.i ; <i32> [#uses=1]
+ %tmp133.i.i = getelementptr [14 x i32]* @r, i32 0, i32 %tmp132.i.i ; <i32*> [#uses=1]
+ %tmp134.i.i = load i32* %tmp133.i.i ; <i32> [#uses=1]
+ %tmp138.i.i = getelementptr [2 x { i32, [3 x i32] }]* @pgm, i32 0, i32 %i_addr.3210.0.i.i, i32 1, i32 2 ; <i32*> [#uses=1]
+ %tmp139.i.i = load i32* %tmp138.i.i ; <i32> [#uses=1]
+ %tmp140.i.i = getelementptr [14 x i32]* @r, i32 0, i32 %tmp139.i.i ; <i32*> [#uses=1]
+ %tmp141.i.i = load i32* %tmp140.i.i ; <i32> [#uses=1]
+ %tmp143.i.i = add i32 %i_addr.3210.0.i.i, 12 ; <i32> [#uses=1]
+ %tmp146.i.i = getelementptr [2 x { i32, [3 x i32] }]* @pgm, i32 0, i32 %i_addr.3210.0.i.i, i32 0 ; <i32*> [#uses=1]
+ %tmp147.i.i = load i32* %tmp146.i.i ; <i32> [#uses=1]
+ %tmp149.i.i = getelementptr [13 x %struct.anon]* @isa, i32 0, i32 %tmp147.i.i, i32 0 ; <i32 (i32, i32, i32)**> [#uses=1]
+ %tmp150.i.i = load i32 (i32, i32, i32)** %tmp149.i.i ; <i32 (i32, i32, i32)*> [#uses=1]
+ %tmp154.i.i = tail call i32 %tmp150.i.i( i32 %tmp127.i.i, i32 %tmp134.i.i, i32 %tmp141.i.i ) ; <i32> [#uses=1]
+ %tmp155.i.i = getelementptr [14 x i32]* @r, i32 0, i32 %tmp143.i.i ; <i32*> [#uses=1]
+ store i32 %tmp154.i.i, i32* %tmp155.i.i
+ %tmp159.i.i = getelementptr [2 x i32]* @counter, i32 0, i32 %i_addr.3210.0.i.i ; <i32*> [#uses=2]
+ %tmp160.i.i = load i32* %tmp159.i.i ; <i32> [#uses=1]
+ %tmp161.i.i = add i32 %tmp160.i.i, 1 ; <i32> [#uses=1]
+ store i32 %tmp161.i.i, i32* %tmp159.i.i
+ %tmp166.i.i = add i32 %i_addr.3210.0.i.i, 1 ; <i32> [#uses=2]
+ %tmp168.i.i = load i32* @numi ; <i32> [#uses=1]
+ icmp slt i32 %tmp166.i.i, %tmp168.i.i ; <i1>:0 [#uses=1]
+ br i1 %0, label %bb115.i.i.bb115.i.i_crit_edge, label %bb115.i.i.bb170.i.i_crit_edge.exitStub
+}
diff --git a/test/CodeGen/ARM/clz.ll b/test/CodeGen/ARM/clz.ll
new file mode 100644
index 0000000..cdde95a
--- /dev/null
+++ b/test/CodeGen/ARM/clz.ll
@@ -0,0 +1,8 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v5t | grep clz
+
+declare uint %llvm.ctlz.i32(uint)
+
+uint %test(uint %x) {
+ %tmp.1 = call uint %llvm.ctlz.i32( uint %x )
+ ret uint %tmp.1
+}
diff --git a/test/CodeGen/ARM/compare-call.ll b/test/CodeGen/ARM/compare-call.ll
new file mode 100644
index 0000000..3fcded8
--- /dev/null
+++ b/test/CodeGen/ARM/compare-call.ll
@@ -0,0 +1,20 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v6,+vfp2 | \
+; RUN: grep fcmpes
+
+void %test3(float* %glob, int %X) {
+entry:
+ %tmp = load float* %glob ; <float> [#uses=1]
+ %tmp2 = getelementptr float* %glob, int 2 ; <float*> [#uses=1]
+ %tmp3 = load float* %tmp2 ; <float> [#uses=1]
+ %tmp = setgt float %tmp, %tmp3 ; <bool> [#uses=1]
+ br bool %tmp, label %cond_true, label %UnifiedReturnBlock
+
+cond_true: ; preds = %entry
+ %tmp = tail call int (...)* %bar( ) ; <int> [#uses=0]
+ ret void
+
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
+
+declare int %bar(...)
diff --git a/test/CodeGen/ARM/constants.ll b/test/CodeGen/ARM/constants.ll
new file mode 100644
index 0000000..7302617
--- /dev/null
+++ b/test/CodeGen/ARM/constants.ll
@@ -0,0 +1,46 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \
+; RUN: grep {mov r0, #0} | wc -l | grep 1
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \
+; RUN: grep {mov r0, #255$} | wc -l | grep 1
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \
+; RUN: grep {mov r0.*256} | wc -l | grep 1
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \
+; RUN: grep {orr.*256} | wc -l | grep 1
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \
+; RUN: grep {mov r0, .*-1073741761} | wc -l | grep 1
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \
+; RUN: grep {mov r0, .*1008} | wc -l | grep 1
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \
+; RUN: grep {cmp r0, #1, 16} | wc -l | grep 1
+
+uint %f1() {
+ ret uint 0
+}
+
+uint %f2() {
+ ret uint 255
+}
+
+uint %f3() {
+ ret uint 256
+}
+
+uint %f4() {
+ ret uint 257
+}
+
+uint %f5() {
+ ret uint 3221225535
+}
+
+uint %f6() {
+ ret uint 1008
+}
+
+void %f7(uint %a) {
+ %b = setgt uint %a, 65536
+ br bool %b, label %r, label %r
+
+r:
+ ret void
+}
diff --git a/test/CodeGen/ARM/ctors_dtors.ll b/test/CodeGen/ARM/ctors_dtors.ll
new file mode 100644
index 0000000..cf58ca4
--- /dev/null
+++ b/test/CodeGen/ARM/ctors_dtors.ll
@@ -0,0 +1,25 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple-darwin | \
+; RUN: grep {\\.mod_init_func}
+; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple-darwin | \
+; RUN: grep {\\.mod_term_func}
+; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-linux-gnu | \
+; RUN: grep {\\.section \\.ctors,"aw",.progbits}
+; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-linux-gnu | \
+; RUN: grep {\\.section \\.dtors,"aw",.progbits}
+; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-linux-gnueabi | \
+; RUN: grep {\\.section \\.init_array,"aw",.init_array}
+; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-linux-gnueabi | \
+; RUN: grep {\\.section \\.fini_array,"aw",.fini_array}
+
+%llvm.global_ctors = appending global [1 x { int, void ()* }] [ { int, void ()* } { int 65535, void ()* %__mf_init } ] ; <[1 x { int, void ()* }]*> [#uses=0]
+%llvm.global_dtors = appending global [1 x { int, void ()* }] [ { int, void ()* } { int 65535, void ()* %__mf_fini } ] ; <[1 x { int, void ()* }]*> [#uses=0]
+
+void %__mf_init() {
+entry:
+ ret void
+}
+
+void %__mf_fini() {
+entry:
+ ret void
+}
diff --git a/test/CodeGen/ARM/dg.exp b/test/CodeGen/ARM/dg.exp
new file mode 100644
index 0000000..ba4ade5
--- /dev/null
+++ b/test/CodeGen/ARM/dg.exp
@@ -0,0 +1,5 @@
+load_lib llvm.exp
+
+if { [llvm_supports_target ARM] } {
+ RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,llx,c,cpp,tr}]]
+}
diff --git a/test/CodeGen/ARM/div.ll b/test/CodeGen/ARM/div.ll
new file mode 100644
index 0000000..3f8a752
--- /dev/null
+++ b/test/CodeGen/ARM/div.ll
@@ -0,0 +1,29 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm > %t
+; RUN: grep __divsi3 %t
+; RUN: grep __udivsi3 %t
+; RUN: grep __modsi3 %t
+; RUN: grep __umodsi3 %t
+
+int %f1(int %a, int %b) {
+entry:
+ %tmp1 = div int %a, %b
+ ret int %tmp1
+}
+
+uint %f2(uint %a, uint %b) {
+entry:
+ %tmp1 = div uint %a, %b
+ ret uint %tmp1
+}
+
+int %f3(int %a, int %b) {
+entry:
+ %tmp1 = rem int %a, %b
+ ret int %tmp1
+}
+
+uint %f4(uint %a, uint %b) {
+entry:
+ %tmp1 = rem uint %a, %b
+ ret uint %tmp1
+}
diff --git a/test/CodeGen/ARM/dyn-stackalloc.ll b/test/CodeGen/ARM/dyn-stackalloc.ll
new file mode 100644
index 0000000..602fd9b
--- /dev/null
+++ b/test/CodeGen/ARM/dyn-stackalloc.ll
@@ -0,0 +1,60 @@
+; RUN: llvm-as < %s | llc -march=arm
+; RUN: llvm-as < %s | llc -march=thumb | not grep {ldr sp}
+; RUN: llvm-as < %s | llc -mtriple=thumb-apple-darwin | \
+; RUN: not grep {sub.*r7}
+; RUN: llvm-as < %s | llc -march=thumb | grep 4294967280
+
+ %struct.state = type { i32, %struct.info*, float**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i64, i64, i64, i64, i64, i8* }
+ %struct.info = type { i32, i32, i32, i32, i32, i32, i32, i8* }
+
+define void @t1(%struct.state* %v) {
+ %tmp6 = load i32* null
+ %tmp8 = alloca float, i32 %tmp6
+ store i32 1, i32* null
+ br i1 false, label %bb123.preheader, label %return
+
+bb123.preheader:
+ br i1 false, label %bb43, label %return
+
+bb43:
+ call fastcc void @f1( float* %tmp8, float* null, i32 0 )
+ %tmp70 = load i32* null
+ %tmp85 = getelementptr float* %tmp8, i32 0
+ call fastcc void @f2( float* null, float* null, float* %tmp85, i32 %tmp70 )
+ ret void
+
+return:
+ ret void
+}
+
+declare fastcc void @f1(float*, float*, i32)
+
+declare fastcc void @f2(float*, float*, float*, i32)
+
+ %struct.comment = type { i8**, i32*, i32, i8* }
+@str215 = external global [2 x i8]
+
+define void @t2(%struct.comment* %vc, i8* %tag, i8* %contents) {
+ %tmp1 = call i32 @strlen( i8* %tag )
+ %tmp3 = call i32 @strlen( i8* %contents )
+ %tmp4 = add i32 %tmp1, 2
+ %tmp5 = add i32 %tmp4, %tmp3
+ %tmp6 = alloca i8, i32 %tmp5
+ %tmp9 = call i8* @strcpy( i8* %tmp6, i8* %tag )
+ %tmp6.len = call i32 @strlen( i8* %tmp6 )
+ %tmp6.indexed = getelementptr i8* %tmp6, i32 %tmp6.len
+ call void @llvm.memcpy.i32( i8* %tmp6.indexed, i8* getelementptr ([2 x i8]* @str215, i32 0, i32 0), i32 2, i32 1 )
+ %tmp15 = call i8* @strcat( i8* %tmp6, i8* %contents )
+ call fastcc void @comment_add( %struct.comment* %vc, i8* %tmp6 )
+ ret void
+}
+
+declare i32 @strlen(i8*)
+
+declare i8* @strcat(i8*, i8*)
+
+declare fastcc void @comment_add(%struct.comment*, i8*)
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
+
+declare i8* @strcpy(i8*, i8*)
diff --git a/test/CodeGen/ARM/extloadi1.ll b/test/CodeGen/ARM/extloadi1.ll
new file mode 100644
index 0000000..b4dcd7f
--- /dev/null
+++ b/test/CodeGen/ARM/extloadi1.ll
@@ -0,0 +1,22 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm
+
+%handler_installed.6144.b = external global bool ; <bool*> [#uses=1]
+
+
+void %__mf_sigusr1_respond() {
+entry:
+ %tmp8.b = load bool* %handler_installed.6144.b ; <bool> [#uses=1]
+ br bool false, label %cond_true7, label %cond_next
+
+cond_next: ; preds = %entry
+ br bool %tmp8.b, label %bb, label %cond_next3
+
+cond_next3: ; preds = %cond_next
+ ret void
+
+bb: ; preds = %cond_next
+ ret void
+
+cond_true7: ; preds = %entry
+ ret void
+}
diff --git a/test/CodeGen/ARM/fcopysign.ll b/test/CodeGen/ARM/fcopysign.ll
new file mode 100644
index 0000000..e24a5d8
--- /dev/null
+++ b/test/CodeGen/ARM/fcopysign.ll
@@ -0,0 +1,18 @@
+; RUN: llvm-as < %s | llc -march=arm | grep bic | wc -l | grep 2
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2 | \
+; RUN: grep fneg | wc -l | grep 2
+
+define float @test1(float %x, double %y) {
+ %tmp = fpext float %x to double
+ %tmp2 = tail call double @copysign( double %tmp, double %y )
+ %tmp3 = fptrunc double %tmp2 to float
+ ret float %tmp3
+}
+
+define double @test2(double %x, float %y) {
+ %tmp = fpext float %y to double
+ %tmp2 = tail call double @copysign( double %x, double %tmp )
+ ret double %tmp2
+}
+
+declare double @copysign(double, double)
diff --git a/test/CodeGen/ARM/fnmul.ll b/test/CodeGen/ARM/fnmul.ll
new file mode 100644
index 0000000..87a30c9
--- /dev/null
+++ b/test/CodeGen/ARM/fnmul.ll
@@ -0,0 +1,11 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2 | grep fnmuld
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2 -enable-sign-dependent-rounding-fp-math | grep fmul
+
+
+define double @t1(double %a, double %b) {
+entry:
+ %tmp2 = sub double -0.000000e+00, %a ; <double> [#uses=1]
+ %tmp4 = mul double %tmp2, %b ; <double> [#uses=1]
+ ret double %tmp4
+}
+
diff --git a/test/CodeGen/ARM/fp.ll b/test/CodeGen/ARM/fp.ll
new file mode 100644
index 0000000..4de9a06
--- /dev/null
+++ b/test/CodeGen/ARM/fp.ll
@@ -0,0 +1,61 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+vfp2 > %t
+; RUN: grep fmsr %t | wc -l | grep 4
+; RUN: grep fsitos %t
+; RUN: grep fmrs %t | wc -l | grep 2
+; RUN: grep fsitod %t
+; RUN: grep fmrrd %t | wc -l | grep 5
+; RUN: grep fmdrr %t | wc -l | grep 2
+; RUN: grep fldd %t
+; RUN: grep fuitod %t
+; RUN: grep fuitos %t
+; RUN: grep 1065353216 %t
+
+float %f(int %a) {
+entry:
+ %tmp = cast int %a to float ; <float> [#uses=1]
+ ret float %tmp
+}
+
+double %g(int %a) {
+entry:
+ %tmp = cast int %a to double ; <double> [#uses=1]
+ ret double %tmp
+}
+
+double %uint_to_double(uint %a) {
+entry:
+ %tmp = cast uint %a to double
+ ret double %tmp
+}
+
+float %uint_to_float(uint %a) {
+entry:
+ %tmp = cast uint %a to float
+ ret float %tmp
+}
+
+
+double %h(double* %v) {
+entry:
+ %tmp = load double* %v ; <double> [#uses=1]
+ ret double %tmp
+}
+
+float %h2() {
+entry:
+ ret float 1.000000e+00
+}
+
+double %f2(double %a) {
+ ret double %a
+}
+
+void %f3() {
+entry:
+ %tmp = call double %f5() ; <double> [#uses=1]
+ call void %f4(double %tmp )
+ ret void
+}
+
+declare void %f4(double)
+declare double %f5()
diff --git a/test/CodeGen/ARM/fparith.ll b/test/CodeGen/ARM/fparith.ll
new file mode 100644
index 0000000..0e503a6
--- /dev/null
+++ b/test/CodeGen/ARM/fparith.ll
@@ -0,0 +1,86 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+vfp2 > %t
+; RUN: grep fadds %t
+; RUN: grep faddd %t
+; RUN: grep fmuls %t
+; RUN: grep fmuld %t
+; RUN: grep fnegs %t
+; RUN: grep fnegd %t
+; RUN: grep fdivs %t
+; RUN: grep fdivd %t
+
+
+float %f1(float %a, float %b) {
+entry:
+ %tmp = add float %a, %b
+ ret float %tmp
+}
+
+double %f2(double %a, double %b) {
+entry:
+ %tmp = add double %a, %b
+ ret double %tmp
+}
+
+float %f3(float %a, float %b) {
+entry:
+ %tmp = mul float %a, %b
+ ret float %tmp
+}
+
+double %f4(double %a, double %b) {
+entry:
+ %tmp = mul double %a, %b
+ ret double %tmp
+}
+
+float %f5(float %a, float %b) {
+entry:
+ %tmp = sub float %a, %b
+ ret float %tmp
+}
+
+double %f6(double %a, double %b) {
+entry:
+ %tmp = sub double %a, %b
+ ret double %tmp
+}
+
+float %f7(float %a) {
+entry:
+ %tmp1 = sub float -0.000000e+00, %a
+ ret float %tmp1
+}
+
+double %f8(double %a) {
+entry:
+ %tmp1 = sub double -0.000000e+00, %a
+ ret double %tmp1
+}
+
+float %f9(float %a, float %b) {
+entry:
+ %tmp1 = div float %a, %b
+ ret float %tmp1
+}
+
+double %f10(double %a, double %b) {
+entry:
+ %tmp1 = div double %a, %b
+ ret double %tmp1
+}
+
+float %f11(float %a) {
+entry:
+ %tmp1 = call float %fabsf(float %a)
+ ret float %tmp1
+}
+
+declare float %fabsf(float)
+
+double %f12(double %a) {
+entry:
+ %tmp1 = call double %fabs(double %a)
+ ret double %tmp1
+}
+
+declare double %fabs(double)
diff --git a/test/CodeGen/ARM/fpcmp.ll b/test/CodeGen/ARM/fpcmp.ll
new file mode 100644
index 0000000..adee88c
--- /dev/null
+++ b/test/CodeGen/ARM/fpcmp.ll
@@ -0,0 +1,57 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+vfp2 > %t
+; RUN: grep movmi %t
+; RUN: grep moveq %t
+; RUN: grep movgt %t
+; RUN: grep movge %t
+; RUN: grep movne %t
+; RUN: grep fcmped %t | wc -l | grep 1
+; RUN: grep fcmpes %t | wc -l | grep 6
+
+int %f1(float %a) {
+entry:
+ %tmp = setlt float %a, 1.000000e+00 ; <bool> [#uses=1]
+ %tmp = cast bool %tmp to int ; <int> [#uses=1]
+ ret int %tmp
+}
+
+int %f2(float %a) {
+entry:
+ %tmp = seteq float %a, 1.000000e+00 ; <bool> [#uses=1]
+ %tmp = cast bool %tmp to int ; <int> [#uses=1]
+ ret int %tmp
+}
+
+int %f3(float %a) {
+entry:
+ %tmp = setgt float %a, 1.000000e+00 ; <bool> [#uses=1]
+ %tmp = cast bool %tmp to int ; <int> [#uses=1]
+ ret int %tmp
+}
+
+int %f4(float %a) {
+entry:
+ %tmp = setge float %a, 1.000000e+00 ; <bool> [#uses=1]
+ %tmp = cast bool %tmp to int ; <int> [#uses=1]
+ ret int %tmp
+}
+
+int %f5(float %a) {
+entry:
+ %tmp = setle float %a, 1.000000e+00 ; <bool> [#uses=1]
+ %tmp = cast bool %tmp to int ; <int> [#uses=1]
+ ret int %tmp
+}
+
+int %f6(float %a) {
+entry:
+ %tmp = setne float %a, 1.000000e+00 ; <bool> [#uses=1]
+ %tmp = cast bool %tmp to int ; <int> [#uses=1]
+ ret int %tmp
+}
+
+int %g1(double %a) {
+entry:
+ %tmp = setlt double %a, 1.000000e+00 ; <bool> [#uses=1]
+ %tmp = cast bool %tmp to int ; <int> [#uses=1]
+ ret int %tmp
+}
diff --git a/test/CodeGen/ARM/fpcmp_ueq.ll b/test/CodeGen/ARM/fpcmp_ueq.ll
new file mode 100644
index 0000000..3e749af
--- /dev/null
+++ b/test/CodeGen/ARM/fpcmp_ueq.ll
@@ -0,0 +1,10 @@
+; RUN: llvm-as < %s | llc -march=arm | grep moveq
+; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | grep movvs
+
+define i32 @f7(float %a, float %b) {
+entry:
+ %tmp = fcmp ueq float %a,%b
+ %retval = select i1 %tmp, i32 666, i32 42
+ ret i32 %retval
+}
+
diff --git a/test/CodeGen/ARM/fpconv.ll b/test/CodeGen/ARM/fpconv.ll
new file mode 100644
index 0000000..06e8069
--- /dev/null
+++ b/test/CodeGen/ARM/fpconv.ll
@@ -0,0 +1,71 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+vfp2 > %t
+; RUN: grep fcvtsd %t
+; RUN: grep fcvtds %t
+; RUN: grep ftosizs %t
+; RUN: grep ftouizs %t
+; RUN: grep ftosizd %t
+; RUN: grep ftouizd %t
+; RUN: grep fsitos %t
+; RUN: grep fsitod %t
+; RUN: grep fuitos %t
+; RUN: grep fuitod %t
+
+float %f1(double %x) {
+entry:
+ %tmp1 = cast double %x to float
+ ret float %tmp1
+}
+
+double %f2(float %x) {
+entry:
+ %tmp1 = cast float %x to double
+ ret double %tmp1
+}
+
+int %f3(float %x) {
+entry:
+ %tmp = cast float %x to int
+ ret int %tmp
+}
+
+uint %f4(float %x) {
+entry:
+ %tmp = cast float %x to uint
+ ret uint %tmp
+}
+
+int %f5(double %x) {
+entry:
+ %tmp = cast double %x to int
+ ret int %tmp
+}
+
+uint %f6(double %x) {
+entry:
+ %tmp = cast double %x to uint
+ ret uint %tmp
+}
+
+float %f7(int %a) {
+entry:
+ %tmp = cast int %a to float
+ ret float %tmp
+}
+
+double %f8(int %a) {
+entry:
+ %tmp = cast int %a to double
+ ret double %tmp
+}
+
+float %f9(uint %a) {
+entry:
+ %tmp = cast uint %a to float
+ ret float %tmp
+}
+
+double %f10(uint %a) {
+entry:
+ %tmp = cast uint %a to double
+ ret double %tmp
+}
diff --git a/test/CodeGen/ARM/fpmem.ll b/test/CodeGen/ARM/fpmem.ll
new file mode 100644
index 0000000..3ed9f2d
--- /dev/null
+++ b/test/CodeGen/ARM/fpmem.ll
@@ -0,0 +1,22 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \
+; RUN: grep {mov r0, #0} | wc -l | grep 1
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+vfp2 | \
+; RUN: grep {flds.*\\\[} | wc -l | grep 1
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+vfp2 | \
+; RUN: grep {fsts.*\\\[} | wc -l | grep 1
+
+float %f1(float %a) {
+ ret float 0.000000e+00
+}
+
+float %f2(float* %v, float %u) {
+ %tmp = load float* %v
+ %tmp1 = add float %tmp, %u
+ ret float %tmp1
+}
+
+void %f3(float %a, float %b, float* %v) {
+ %tmp = add float %a, %b
+ store float %tmp, float* %v
+ ret void
+}
diff --git a/test/CodeGen/ARM/fptoint.ll b/test/CodeGen/ARM/fptoint.ll
new file mode 100644
index 0000000..b0db83c
--- /dev/null
+++ b/test/CodeGen/ARM/fptoint.ll
@@ -0,0 +1,47 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2 | grep fmrs | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2 | not grep fmrrd
+
+@i = weak global i32 0 ; <i32*> [#uses=2]
+@u = weak global i32 0 ; <i32*> [#uses=2]
+
+define i32 @foo1(float *%x) {
+ %tmp1 = load float* %x
+ %tmp2 = bitcast float %tmp1 to i32
+ ret i32 %tmp2
+}
+
+define i64 @foo2(double *%x) {
+ %tmp1 = load double* %x
+ %tmp2 = bitcast double %tmp1 to i64
+ ret i64 %tmp2
+}
+
+define void @foo5(float %x) {
+ %tmp1 = fptosi float %x to i32
+ store i32 %tmp1, i32* @i
+ ret void
+}
+
+define void @foo6(float %x) {
+ %tmp1 = fptoui float %x to i32
+ store i32 %tmp1, i32* @u
+ ret void
+}
+
+define void @foo7(double %x) {
+ %tmp1 = fptosi double %x to i32
+ store i32 %tmp1, i32* @i
+ ret void
+}
+
+define void @foo8(double %x) {
+ %tmp1 = fptoui double %x to i32
+ store i32 %tmp1, i32* @u
+ ret void
+}
+
+define void @foo9(double %x) {
+ %tmp = fptoui double %x to i16
+ store i16 %tmp, i16* null
+ ret void
+}
diff --git a/test/CodeGen/ARM/frame_thumb.ll b/test/CodeGen/ARM/frame_thumb.ll
new file mode 100644
index 0000000..fe82db9
--- /dev/null
+++ b/test/CodeGen/ARM/frame_thumb.ll
@@ -0,0 +1,9 @@
+; RUN: llvm-as < %s | llc -march=thumb -mtriple=arm-apple-darwin \
+; RUN: -disable-fp-elim | not grep {r11}
+; RUN: llvm-as < %s | llc -march=thumb -mtriple=arm-linux-gnueabi \
+; RUN: -disable-fp-elim | not grep {r11}
+
+define i32 @f() {
+entry:
+ ret i32 10
+}
diff --git a/test/CodeGen/ARM/hello.ll b/test/CodeGen/ARM/hello.ll
new file mode 100644
index 0000000..d494800
--- /dev/null
+++ b/test/CodeGen/ARM/hello.ll
@@ -0,0 +1,14 @@
+; RUN: llvm-as < %s | llc -march=arm
+; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi | grep mov | wc -l | grep 1
+; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnu --disable-fp-elim | \
+; RUN: grep mov | wc -l | grep 3
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | grep mov | wc -l | grep 2
+
+@str = internal constant [12 x i8] c"Hello World\00"
+
+define i32 @main() {
+ %tmp = call i32 @puts( i8* getelementptr ([12 x i8]* @str, i32 0, i64 0) ) ; <i32> [#uses=0]
+ ret i32 0
+}
+
+declare i32 @puts(i8*)
diff --git a/test/CodeGen/ARM/iabs.ll b/test/CodeGen/ARM/iabs.ll
new file mode 100644
index 0000000..f10591f
--- /dev/null
+++ b/test/CodeGen/ARM/iabs.ll
@@ -0,0 +1,22 @@
+; RUN: llvm-as < %s | llc -march=arm -stats |& \
+; RUN: grep {3 .*Number of machine instrs printed}
+; RUN: llvm-as < %s | llc -march=thumb -stats |& \
+; RUN: grep {4 .*Number of machine instrs printed}
+
+;; Integer absolute value, should produce something as good as: ARM:
+;; add r3, r0, r0, asr #31
+;; eor r0, r3, r0, asr #31
+;; bx lr
+;; Thumb:
+;; asr r2, r0, #31
+;; add r0, r0, r2
+;; eor r0, r2
+;; bx lr
+
+define i32 @test(i32 %a) {
+ %tmp1neg = sub i32 0, %a
+ %b = icmp sgt i32 %a, -1
+ %abs = select i1 %b, i32 %a, i32 %tmp1neg
+ ret i32 %abs
+}
+
diff --git a/test/CodeGen/ARM/ifcvt1.ll b/test/CodeGen/ARM/ifcvt1.ll
new file mode 100644
index 0000000..b76b3e3
--- /dev/null
+++ b/test/CodeGen/ARM/ifcvt1.ll
@@ -0,0 +1,15 @@
+; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion
+; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep bx | wc -l | grep 1
+
+define i32 @t1(i32 %a, i32 %b) {
+ %tmp2 = icmp eq i32 %a, 0
+ br i1 %tmp2, label %cond_false, label %cond_true
+
+cond_true:
+ %tmp5 = add i32 %b, 1
+ ret i32 %tmp5
+
+cond_false:
+ %tmp7 = add i32 %b, -1
+ ret i32 %tmp7
+}
diff --git a/test/CodeGen/ARM/ifcvt2.ll b/test/CodeGen/ARM/ifcvt2.ll
new file mode 100644
index 0000000..96400ea
--- /dev/null
+++ b/test/CodeGen/ARM/ifcvt2.ll
@@ -0,0 +1,36 @@
+; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion
+; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep bxlt | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep bxgt | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep bxge | wc -l | grep 1
+
+define i32 @t1(i32 %a, i32 %b, i32 %c, i32 %d) {
+ %tmp2 = icmp sgt i32 %c, 10
+ %tmp5 = icmp slt i32 %d, 4
+ %tmp8 = or i1 %tmp5, %tmp2
+ %tmp13 = add i32 %b, %a
+ br i1 %tmp8, label %cond_true, label %UnifiedReturnBlock
+
+cond_true:
+ %tmp15 = add i32 %tmp13, %c
+ %tmp1821 = sub i32 %tmp15, %d
+ ret i32 %tmp1821
+
+UnifiedReturnBlock:
+ ret i32 %tmp13
+}
+
+define i32 @t2(i32 %a, i32 %b, i32 %c, i32 %d) {
+ %tmp2 = icmp sgt i32 %c, 10
+ %tmp5 = icmp slt i32 %d, 4
+ %tmp8 = and i1 %tmp5, %tmp2
+ %tmp13 = add i32 %b, %a
+ br i1 %tmp8, label %cond_true, label %UnifiedReturnBlock
+
+cond_true:
+ %tmp15 = add i32 %tmp13, %c
+ %tmp1821 = sub i32 %tmp15, %d
+ ret i32 %tmp1821
+
+UnifiedReturnBlock:
+ ret i32 %tmp13
+}
diff --git a/test/CodeGen/ARM/ifcvt3.ll b/test/CodeGen/ARM/ifcvt3.ll
new file mode 100644
index 0000000..0236386
--- /dev/null
+++ b/test/CodeGen/ARM/ifcvt3.ll
@@ -0,0 +1,19 @@
+; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion
+; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep cmpne | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep bx | wc -l | grep 2
+
+define i32 @t1(i32 %a, i32 %b, i32 %c, i32 %d) {
+ switch i32 %c, label %cond_next [
+ i32 1, label %cond_true
+ i32 7, label %cond_true
+ ]
+
+cond_true:
+ %tmp12 = add i32 %a, 1
+ %tmp1518 = add i32 %tmp12, %b
+ ret i32 %tmp1518
+
+cond_next:
+ %tmp15 = add i32 %b, %a
+ ret i32 %tmp15
+}
diff --git a/test/CodeGen/ARM/ifcvt4.ll b/test/CodeGen/ARM/ifcvt4.ll
new file mode 100644
index 0000000..1a5728e
--- /dev/null
+++ b/test/CodeGen/ARM/ifcvt4.ll
@@ -0,0 +1,38 @@
+; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion
+; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep subgt | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep suble | wc -l | grep 1
+; FIXME: Check for # of unconditional branch after adding branch folding post ifcvt.
+
+define i32 @t(i32 %a, i32 %b) {
+entry:
+ %tmp1434 = icmp eq i32 %a, %b ; <i1> [#uses=1]
+ br i1 %tmp1434, label %bb17, label %bb.outer
+
+bb.outer: ; preds = %cond_false, %entry
+ %b_addr.021.0.ph = phi i32 [ %b, %entry ], [ %tmp10, %cond_false ] ; <i32> [#uses=5]
+ %a_addr.026.0.ph = phi i32 [ %a, %entry ], [ %a_addr.026.0, %cond_false ] ; <i32> [#uses=1]
+ br label %bb
+
+bb: ; preds = %cond_true, %bb.outer
+ %indvar = phi i32 [ 0, %bb.outer ], [ %indvar.next, %cond_true ] ; <i32> [#uses=2]
+ %tmp. = sub i32 0, %b_addr.021.0.ph ; <i32> [#uses=1]
+ %tmp.40 = mul i32 %indvar, %tmp. ; <i32> [#uses=1]
+ %a_addr.026.0 = add i32 %tmp.40, %a_addr.026.0.ph ; <i32> [#uses=6]
+ %tmp3 = icmp sgt i32 %a_addr.026.0, %b_addr.021.0.ph ; <i1> [#uses=1]
+ br i1 %tmp3, label %cond_true, label %cond_false
+
+cond_true: ; preds = %bb
+ %tmp7 = sub i32 %a_addr.026.0, %b_addr.021.0.ph ; <i32> [#uses=2]
+ %tmp1437 = icmp eq i32 %tmp7, %b_addr.021.0.ph ; <i1> [#uses=1]
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
+ br i1 %tmp1437, label %bb17, label %bb
+
+cond_false: ; preds = %bb
+ %tmp10 = sub i32 %b_addr.021.0.ph, %a_addr.026.0 ; <i32> [#uses=2]
+ %tmp14 = icmp eq i32 %a_addr.026.0, %tmp10 ; <i1> [#uses=1]
+ br i1 %tmp14, label %bb17, label %bb.outer
+
+bb17: ; preds = %cond_false, %cond_true, %entry
+ %a_addr.026.1 = phi i32 [ %a, %entry ], [ %tmp7, %cond_true ], [ %a_addr.026.0, %cond_false ] ; <i32> [#uses=1]
+ ret i32 %a_addr.026.1
+}
diff --git a/test/CodeGen/ARM/ifcvt5.ll b/test/CodeGen/ARM/ifcvt5.ll
new file mode 100644
index 0000000..4a3c137
--- /dev/null
+++ b/test/CodeGen/ARM/ifcvt5.ll
@@ -0,0 +1,24 @@
+; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion
+; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep blge | wc -l | grep 1
+
+@x = external global i32* ; <i32**> [#uses=1]
+
+define void @foo(i32 %a) {
+entry:
+ %tmp = load i32** @x ; <i32*> [#uses=1]
+ store i32 %a, i32* %tmp
+ ret void
+}
+
+define void @t1(i32 %a, i32 %b) {
+entry:
+ %tmp1 = icmp sgt i32 %a, 10 ; <i1> [#uses=1]
+ br i1 %tmp1, label %cond_true, label %UnifiedReturnBlock
+
+cond_true: ; preds = %entry
+ tail call void @foo( i32 %b )
+ ret void
+
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
diff --git a/test/CodeGen/ARM/ifcvt6.ll b/test/CodeGen/ARM/ifcvt6.ll
new file mode 100644
index 0000000..18aaf13
--- /dev/null
+++ b/test/CodeGen/ARM/ifcvt6.ll
@@ -0,0 +1,25 @@
+; RUN: llvm-as < %s | \
+; RUN: llc -march=arm -mtriple=arm-apple-darwin -enable-arm-if-conversion
+; RUN: llvm-as < %s | \
+; RUN: llc -march=arm -mtriple=arm-apple-darwin -enable-arm-if-conversion | \
+; RUN: grep cmpne | wc -l | grep 1
+; RUN: llvm-as < %s | \
+; RUN: llc -march=arm -mtriple=arm-apple-darwin -enable-arm-if-conversion | \
+; RUN: grep ldmhi | wc -l | grep 1
+
+define void @foo(i32 %X, i32 %Y) {
+entry:
+ %tmp1 = icmp ult i32 %X, 4 ; <i1> [#uses=1]
+ %tmp4 = icmp eq i32 %Y, 0 ; <i1> [#uses=1]
+ %tmp7 = or i1 %tmp4, %tmp1 ; <i1> [#uses=1]
+ br i1 %tmp7, label %cond_true, label %UnifiedReturnBlock
+
+cond_true: ; preds = %entry
+ %tmp10 = tail call i32 (...)* @bar( ) ; <i32> [#uses=0]
+ ret void
+
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
+
+declare i32 @bar(...)
diff --git a/test/CodeGen/ARM/ifcvt7.ll b/test/CodeGen/ARM/ifcvt7.ll
new file mode 100644
index 0000000..4816cea
--- /dev/null
+++ b/test/CodeGen/ARM/ifcvt7.ll
@@ -0,0 +1,39 @@
+; RUN: llvm-as < %s | \
+; RUN: llc -march=arm -mtriple=arm-apple-darwin -enable-arm-if-conversion
+; RUN: llvm-as < %s | \
+; RUN: llc -march=arm -mtriple=arm-apple-darwin -enable-arm-if-conversion | \
+; RUN: grep cmpeq | wc -l | grep 1
+; RUN: llvm-as < %s | \
+; RUN: llc -march=arm -mtriple=arm-apple-darwin -enable-arm-if-conversion | \
+; RUN: grep moveq | wc -l | grep 1
+; RUN: llvm-as < %s | \
+; RUN: llc -march=arm -mtriple=arm-apple-darwin -enable-arm-if-conversion | \
+; RUN: grep ldmeq | wc -l | grep 1
+; FIXME: Need post-ifcvt branch folding to get rid of the extra br at end of BB1.
+
+ %struct.quad_struct = type { i32, i32, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct* }
+
+define fastcc i32 @CountTree(%struct.quad_struct* %tree) {
+entry:
+ br label %tailrecurse
+
+tailrecurse: ; preds = %bb, %entry
+ %tmp6 = load %struct.quad_struct** null ; <%struct.quad_struct*> [#uses=1]
+ %tmp9 = load %struct.quad_struct** null ; <%struct.quad_struct*> [#uses=2]
+ %tmp12 = load %struct.quad_struct** null ; <%struct.quad_struct*> [#uses=1]
+ %tmp14 = icmp eq %struct.quad_struct* null, null ; <i1> [#uses=1]
+ %tmp17 = icmp eq %struct.quad_struct* %tmp6, null ; <i1> [#uses=1]
+ %tmp23 = icmp eq %struct.quad_struct* %tmp9, null ; <i1> [#uses=1]
+ %tmp29 = icmp eq %struct.quad_struct* %tmp12, null ; <i1> [#uses=1]
+ %bothcond = and i1 %tmp17, %tmp14 ; <i1> [#uses=1]
+ %bothcond1 = and i1 %bothcond, %tmp23 ; <i1> [#uses=1]
+ %bothcond2 = and i1 %bothcond1, %tmp29 ; <i1> [#uses=1]
+ br i1 %bothcond2, label %return, label %bb
+
+bb: ; preds = %tailrecurse
+ %tmp41 = tail call fastcc i32 @CountTree( %struct.quad_struct* %tmp9 ) ; <i32> [#uses=0]
+ br label %tailrecurse
+
+return: ; preds = %tailrecurse
+ ret i32 0
+}
diff --git a/test/CodeGen/ARM/ifcvt8.ll b/test/CodeGen/ARM/ifcvt8.ll
new file mode 100644
index 0000000..c401e68
--- /dev/null
+++ b/test/CodeGen/ARM/ifcvt8.ll
@@ -0,0 +1,22 @@
+; RUN: llvm-as < %s | \
+; RUN: llc -march=arm -mtriple=arm-apple-darwin -enable-arm-if-conversion
+; RUN: llvm-as < %s | \
+; RUN: llc -march=arm -mtriple=arm-apple-darwin -enable-arm-if-conversion | \
+; RUN: grep ldmne | wc -l | grep 1
+
+ %struct.SString = type { i8*, i32, i32 }
+
+declare void @abort()
+
+define fastcc void @t(%struct.SString* %word, i8 sext %c) {
+entry:
+ %tmp1 = icmp eq %struct.SString* %word, null ; <i1> [#uses=1]
+ br i1 %tmp1, label %cond_true, label %cond_false
+
+cond_true: ; preds = %entry
+ tail call void @abort( )
+ unreachable
+
+cond_false: ; preds = %entry
+ ret void
+}
diff --git a/test/CodeGen/ARM/illegal-vector-bitcast.ll b/test/CodeGen/ARM/illegal-vector-bitcast.ll
new file mode 100644
index 0000000..6785cfd
--- /dev/null
+++ b/test/CodeGen/ARM/illegal-vector-bitcast.ll
@@ -0,0 +1,13 @@
+; RUN: llvm-as < %s | llc -march=arm
+
+define void @foo(<8 x float>* %f, <8 x float>* %g, <4 x i64>* %y)
+{
+ %h = load <8 x float>* %f
+ %i = mul <8 x float> %h, <float 1.1, float 3.3, float 4.4, float 5.4, float 0.5, float 0.6, float 0.7, float 0.8>
+ %m = bitcast <8 x float> %i to <4 x i64>
+ %z = load <4 x i64>* %y
+ %n = mul <4 x i64> %z, %m
+ %p = bitcast <4 x i64> %n to <8 x float>
+ store <8 x float> %p, <8 x float>* %g
+ ret void
+}
diff --git a/test/CodeGen/ARM/imm.ll b/test/CodeGen/ARM/imm.ll
new file mode 100644
index 0000000..31db7a3
--- /dev/null
+++ b/test/CodeGen/ARM/imm.ll
@@ -0,0 +1,17 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | not grep CPI
+
+int %test1(int %A) {
+ %B = add int %A, -268435441 ; 0xF000000F
+ ret int %B
+}
+
+int %test2() {
+ ret int 65533
+}
+
+int %test3(int %A) {
+ %B = or int %A, 65533
+ ret int %B
+}
+
+
diff --git a/test/CodeGen/ARM/inlineasm.ll b/test/CodeGen/ARM/inlineasm.ll
new file mode 100644
index 0000000..2f7332a
--- /dev/null
+++ b/test/CodeGen/ARM/inlineasm.ll
@@ -0,0 +1,19 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v6
+
+define i32 @test1(i32 %tmp54) {
+ %tmp56 = tail call i32 asm "uxtb16 $0,$1", "=r,r"( i32 %tmp54 ) ; <i32> [#uses=1]
+ ret i32 %tmp56
+}
+
+define void @test2() {
+ %tmp1 = call i64 asm "ldmia $1!, {$0, ${0:H}}", "=r,=*r,1"( i32** null, i32* null ) ; <i64> [#uses=2]
+ %tmp2 = lshr i64 %tmp1, 32 ; <i64> [#uses=1]
+ %tmp3 = trunc i64 %tmp2 to i32 ; <i32> [#uses=1]
+ %tmp4 = call i32 asm "pkhbt $0, $1, $2, lsl #16", "=r,r,r"( i32 0, i32 %tmp3 ) ; <i32> [#uses=0]
+ ret void
+}
+
+define void @test3() {
+ tail call void asm sideeffect "/* number: ${0:c} */", "i"( i32 1 )
+ ret void
+}
diff --git a/test/CodeGen/ARM/inlineasm2.ll b/test/CodeGen/ARM/inlineasm2.ll
new file mode 100644
index 0000000..69394eb
--- /dev/null
+++ b/test/CodeGen/ARM/inlineasm2.ll
@@ -0,0 +1,11 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2
+
+define double @__ieee754_sqrt(double %x) {
+ %tmp2 = tail call double asm "fsqrtd ${0:P}, ${1:P}", "=w,w"( double %x )
+ ret double %tmp2
+}
+
+define float @__ieee754_sqrtf(float %x) {
+ %tmp2 = tail call float asm "fsqrts $0, $1", "=w,w"( float %x )
+ ret float %tmp2
+}
diff --git a/test/CodeGen/ARM/insn-sched1.ll b/test/CodeGen/ARM/insn-sched1.ll
new file mode 100644
index 0000000..6dc4650
--- /dev/null
+++ b/test/CodeGen/ARM/insn-sched1.ll
@@ -0,0 +1,11 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v6
+; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple-darwin -mattr=+v6 |\
+; RUN: grep mov | wc -l | grep 3
+
+int %test(int %x) {
+ %tmp = cast int %x to short
+ %tmp2 = tail call int %f( int 1, short %tmp )
+ ret int %tmp2
+}
+
+declare int %f(int, short)
diff --git a/test/CodeGen/ARM/ispositive.ll b/test/CodeGen/ARM/ispositive.ll
new file mode 100644
index 0000000..8dcac30
--- /dev/null
+++ b/test/CodeGen/ARM/ispositive.ll
@@ -0,0 +1,10 @@
+; RUN: llvm-as < %s | llc -march=arm | grep {mov r0, r0, lsr #31}
+; RUN: llvm-as < %s | llc -march=thumb | grep {lsr r0, r0, #31}
+
+define i32 @test1(i32 %X) {
+entry:
+ icmp slt i32 %X, 0 ; <i1>:0 [#uses=1]
+ zext i1 %0 to i32 ; <i32>:1 [#uses=1]
+ ret i32 %1
+}
+
diff --git a/test/CodeGen/ARM/large-stack.ll b/test/CodeGen/ARM/large-stack.ll
new file mode 100644
index 0000000..5f85ec0
--- /dev/null
+++ b/test/CodeGen/ARM/large-stack.ll
@@ -0,0 +1,21 @@
+; RUN: llvm-as < %s | llc -march=arm
+; RUN: llvm-as < %s | llc -march=thumb | grep {ldr.*LCP} | wc -l | grep 5
+
+define void @test1() {
+ %tmp = alloca [ 64 x i32 ] , align 4
+ ret void
+}
+
+define void @test2() {
+ %tmp = alloca [ 4168 x i8 ] , align 4
+ ret void
+}
+
+define i32 @test3() {
+ %retval = alloca i32, align 4
+ %tmp = alloca i32, align 4
+ %a = alloca [805306369 x i8], align 16
+ store i32 0, i32* %tmp
+ %tmp1 = load i32* %tmp
+ ret i32 %tmp1
+}
diff --git a/test/CodeGen/ARM/ldm.ll b/test/CodeGen/ARM/ldm.ll
new file mode 100644
index 0000000..b69e04d
--- /dev/null
+++ b/test/CodeGen/ARM/ldm.ll
@@ -0,0 +1,34 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \
+; RUN: grep ldmia | wc -l | grep 2
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \
+; RUN: grep ldmib | wc -l | grep 1
+; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple-darwin | \
+; RUN: grep {ldmfd sp\!} | wc -l | grep 3
+
+%X = external global [0 x int]
+
+int %t1() {
+ %tmp = load int* getelementptr ([0 x int]* %X, int 0, int 0)
+ %tmp3 = load int* getelementptr ([0 x int]* %X, int 0, int 1)
+ %tmp4 = tail call int %f1( int %tmp, int %tmp3 )
+ ret int %tmp4
+}
+
+int %t2() {
+ %tmp = load int* getelementptr ([0 x int]* %X, int 0, int 2)
+ %tmp3 = load int* getelementptr ([0 x int]* %X, int 0, int 3)
+ %tmp5 = load int* getelementptr ([0 x int]* %X, int 0, int 4)
+ %tmp6 = tail call int %f2( int %tmp, int %tmp3, int %tmp5 )
+ ret int %tmp6
+}
+
+int %t3() {
+ %tmp = load int* getelementptr ([0 x int]* %X, int 0, int 1)
+ %tmp3 = load int* getelementptr ([0 x int]* %X, int 0, int 2)
+ %tmp5 = load int* getelementptr ([0 x int]* %X, int 0, int 3)
+ %tmp6 = tail call int %f2( int %tmp, int %tmp3, int %tmp5 )
+ ret int %tmp6
+}
+
+declare int %f1(int, int)
+declare int %f2(int, int, int)
diff --git a/test/CodeGen/ARM/ldr.ll b/test/CodeGen/ARM/ldr.ll
new file mode 100644
index 0000000..3a9ab81
--- /dev/null
+++ b/test/CodeGen/ARM/ldr.ll
@@ -0,0 +1,22 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \
+; RUN: grep {ldr r0} | wc -l | grep 3
+
+int %f1(int* %v) {
+entry:
+ %tmp = load int* %v ; <int> [#uses=1]
+ ret int %tmp
+}
+
+int %f2(int* %v) {
+entry:
+ %tmp2 = getelementptr int* %v, int 1023 ; <int*> [#uses=1]
+ %tmp = load int* %tmp2 ; <int> [#uses=1]
+ ret int %tmp
+}
+
+int %f3(int* %v) {
+entry:
+ %tmp2 = getelementptr int* %v, int 1024 ; <int*> [#uses=1]
+ %tmp = load int* %tmp2 ; <int> [#uses=1]
+ ret int %tmp
+}
diff --git a/test/CodeGen/ARM/ldr_ext.ll b/test/CodeGen/ARM/ldr_ext.ll
new file mode 100644
index 0000000..2b50b30
--- /dev/null
+++ b/test/CodeGen/ARM/ldr_ext.ll
@@ -0,0 +1,32 @@
+; RUN: llvm-as < %s | llc -march=arm | grep ldrb | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=arm | grep ldrh | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=arm | grep ldrsb | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=arm | grep ldrsh | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=thumb | grep ldrb | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=thumb | grep ldrh | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=thumb | grep ldrsb | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=thumb | grep ldrsh | wc -l | grep 1
+
+define i32 @test1(i8* %v.pntr.s0.u1) {
+ %tmp.u = load i8* %v.pntr.s0.u1
+ %tmp1.s = zext i8 %tmp.u to i32
+ ret i32 %tmp1.s
+}
+
+define i32 @test2(i16* %v.pntr.s0.u1) {
+ %tmp.u = load i16* %v.pntr.s0.u1
+ %tmp1.s = zext i16 %tmp.u to i32
+ ret i32 %tmp1.s
+}
+
+define i32 @test3(i8* %v.pntr.s1.u0) {
+ %tmp.s = load i8* %v.pntr.s1.u0
+ %tmp1.s = sext i8 %tmp.s to i32
+ ret i32 %tmp1.s
+}
+
+define i32 @test4() {
+ %tmp.s = load i16* null
+ %tmp1.s = sext i16 %tmp.s to i32
+ ret i32 %tmp1.s
+}
diff --git a/test/CodeGen/ARM/ldr_frame.ll b/test/CodeGen/ARM/ldr_frame.ll
new file mode 100644
index 0000000..1fd6ed3
--- /dev/null
+++ b/test/CodeGen/ARM/ldr_frame.ll
@@ -0,0 +1,32 @@
+; RUN: llvm-as < %s | llc -march=arm | not grep mov
+; RUN: llvm-as < %s | llc -march=thumb | grep cpy | wc -l | grep 2
+
+define i32 @f1() {
+ %buf = alloca [32 x i32], align 4
+ %tmp = getelementptr [32 x i32]* %buf, i32 0, i32 0
+ %tmp1 = load i32* %tmp
+ ret i32 %tmp1
+}
+
+define i32 @f2() {
+ %buf = alloca [32 x i8], align 4
+ %tmp = getelementptr [32 x i8]* %buf, i32 0, i32 0
+ %tmp1 = load i8* %tmp
+ %tmp2 = zext i8 %tmp1 to i32
+ ret i32 %tmp2
+}
+
+define i32 @f3() {
+ %buf = alloca [32 x i32], align 4
+ %tmp = getelementptr [32 x i32]* %buf, i32 0, i32 32
+ %tmp1 = load i32* %tmp
+ ret i32 %tmp1
+}
+
+define i32 @f4() {
+ %buf = alloca [32 x i8], align 4
+ %tmp = getelementptr [32 x i8]* %buf, i32 0, i32 2
+ %tmp1 = load i8* %tmp
+ %tmp2 = zext i8 %tmp1 to i32
+ ret i32 %tmp2
+}
diff --git a/test/CodeGen/ARM/ldr_post.ll b/test/CodeGen/ARM/ldr_post.ll
new file mode 100644
index 0000000..78b3135
--- /dev/null
+++ b/test/CodeGen/ARM/ldr_post.ll
@@ -0,0 +1,11 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \
+; RUN: grep {ldr.*\\\[.*\],} | wc -l | grep 1
+
+int %test(int %a, int %b, int %c) {
+ %tmp1 = mul int %a, %b
+ %tmp2 = cast int %tmp1 to int*
+ %tmp3 = load int* %tmp2
+ %tmp4 = sub int %tmp1, %c
+ %tmp5 = mul int %tmp4, %tmp3
+ ret int %tmp5
+}
diff --git a/test/CodeGen/ARM/ldr_pre.ll b/test/CodeGen/ARM/ldr_pre.ll
new file mode 100644
index 0000000..e9af1c9
--- /dev/null
+++ b/test/CodeGen/ARM/ldr_pre.ll
@@ -0,0 +1,18 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \
+; RUN: grep {ldr.*\\!} | wc -l | grep 2
+
+int *%test1(int *%X, int *%dest) {
+ %Y = getelementptr int* %X, int 4
+ %A = load int* %Y
+ store int %A, int* %dest
+ ret int* %Y
+}
+
+int %test2(int %a, int %b, int %c) {
+ %tmp1 = sub int %a, %b
+ %tmp2 = cast int %tmp1 to int*
+ %tmp3 = load int* %tmp2
+ %tmp4 = sub int %tmp1, %c
+ %tmp5 = add int %tmp4, %tmp3
+ ret int %tmp5
+}
diff --git a/test/CodeGen/ARM/load-global.ll b/test/CodeGen/ARM/load-global.ll
new file mode 100644
index 0000000..fe9bf82
--- /dev/null
+++ b/test/CodeGen/ARM/load-global.ll
@@ -0,0 +1,19 @@
+; RUN: llvm-as < %s | \
+; RUN: llc -mtriple=arm-apple-darwin -relocation-model=static | \
+; RUN: not grep {L_G\$non_lazy_ptr}
+; RUN: llvm-as < %s | \
+; RUN: llc -mtriple=arm-apple-darwin -relocation-model=dynamic-no-pic | \
+; RUN: grep {L_G\$non_lazy_ptr} | wc -l | grep 2
+; RUN: llvm-as < %s | \
+; RUN: llc -mtriple=arm-apple-darwin -relocation-model=pic | \
+; RUN: grep {ldr.*pc} | wc -l | grep 1
+; RUN: llvm-as < %s | \
+; RUN: llc -mtriple=arm-linux-gnueabi -relocation-model=pic | \
+; RUN: grep {GOT} | wc -l | grep 1
+
+@G = external global i32
+
+define i32 @test1() {
+ %tmp = load i32* @G
+ ret i32 %tmp
+}
diff --git a/test/CodeGen/ARM/load.ll b/test/CodeGen/ARM/load.ll
new file mode 100644
index 0000000..f3d6cf6
--- /dev/null
+++ b/test/CodeGen/ARM/load.ll
@@ -0,0 +1,33 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm > %t
+; RUN: grep ldrsb %t
+; RUN: grep ldrb %t
+; RUN: grep ldrsh %t
+; RUN: grep ldrh %t
+
+int %f1(sbyte* %p) {
+entry:
+ %tmp = load sbyte* %p ; <sbyte> [#uses=1]
+ %tmp = cast sbyte %tmp to int ; <int> [#uses=1]
+ ret int %tmp
+}
+
+int %f2(ubyte* %p) {
+entry:
+ %tmp = load ubyte* %p ; <sbyte> [#uses=1]
+ %tmp = cast ubyte %tmp to int ; <int> [#uses=1]
+ ret int %tmp
+}
+
+int %f3(short* %p) {
+entry:
+ %tmp = load short* %p ; <sbyte> [#uses=1]
+ %tmp = cast short %tmp to int ; <int> [#uses=1]
+ ret int %tmp
+}
+
+int %f4(ushort* %p) {
+entry:
+ %tmp = load ushort* %p ; <sbyte> [#uses=1]
+ %tmp = cast ushort %tmp to int ; <int> [#uses=1]
+ ret int %tmp
+}
diff --git a/test/CodeGen/ARM/long-setcc.ll b/test/CodeGen/ARM/long-setcc.ll
new file mode 100644
index 0000000..9111ab3
--- /dev/null
+++ b/test/CodeGen/ARM/long-setcc.ll
@@ -0,0 +1,18 @@
+; RUN: llvm-as < %s | llc -march=arm | grep cmp | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=thumb | grep cmp | wc -l | grep 1
+
+
+define i1 @t1(i64 %x) {
+ %B = icmp slt i64 %x, 0
+ ret i1 %B
+}
+
+define i1 @t2(i64 %x) {
+ %tmp = icmp ult i64 %x, 4294967296
+ ret i1 %tmp
+}
+
+define i1 @t3(i32 %x) {
+ %tmp = icmp ugt i32 %x, -1
+ ret i1 %tmp
+}
diff --git a/test/CodeGen/ARM/long.ll b/test/CodeGen/ARM/long.ll
new file mode 100644
index 0000000..54da192
--- /dev/null
+++ b/test/CodeGen/ARM/long.ll
@@ -0,0 +1,86 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \
+; RUN: grep -- {-2147483648} | wc -l | grep 3
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep mvn | wc -l | grep 3
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep adds | wc -l | grep 1
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep adc | wc -l | grep 1
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep {subs } | wc -l | grep 1
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep sbc | wc -l | grep 1
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \
+; RUN: grep smull | wc -l | grep 1
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \
+; RUN: grep umull | wc -l | grep 1
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=thumb | \
+; RUN: grep mvn | wc -l | grep 1
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=thumb | \
+; RUN: grep adc | wc -l | grep 1
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=thumb | \
+; RUN: grep sbc | wc -l | grep 1
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=thumb | grep __muldi3
+; END.
+
+long %f1() {
+entry:
+ ret long 0
+}
+
+long %f2() {
+entry:
+ ret long 1
+}
+
+long %f3() {
+entry:
+ ret long 2147483647
+}
+
+long %f4() {
+entry:
+ ret long 2147483648
+}
+
+long %f5() {
+entry:
+ ret long 9223372036854775807
+}
+
+ulong %f6(ulong %x, ulong %y) {
+entry:
+ %tmp1 = add ulong %y, 1
+ ret ulong %tmp1
+}
+
+void %f7() {
+entry:
+ %tmp = call long %f8()
+ ret void
+}
+declare long %f8()
+
+long %f9(long %a, long %b) {
+entry:
+ %tmp = sub long %a, %b
+ ret long %tmp
+}
+
+long %f(int %a, int %b) {
+entry:
+ %tmp = cast int %a to long
+ %tmp1 = cast int %b to long
+ %tmp2 = mul long %tmp1, %tmp
+ ret long %tmp2
+}
+
+ulong %g(uint %a, uint %b) {
+entry:
+ %tmp = cast uint %a to ulong
+ %tmp1 = cast uint %b to ulong
+ %tmp2 = mul ulong %tmp1, %tmp
+ ret ulong %tmp2
+}
+
+ulong %f10() {
+entry:
+ %a = alloca ulong, align 8
+ %retval = load ulong* %a
+ ret ulong %retval
+}
diff --git a/test/CodeGen/ARM/long_shift.ll b/test/CodeGen/ARM/long_shift.ll
new file mode 100644
index 0000000..b0a3ee8
--- /dev/null
+++ b/test/CodeGen/ARM/long_shift.ll
@@ -0,0 +1,31 @@
+; RUN: llvm-as < %s | llc -march=thumb
+; RUN: llvm-as < %s | llc -march=arm > %t
+; RUN: grep rrx %t | wc -l | grep 1
+; RUN: grep __ashldi3 %t
+; RUN: grep __ashrdi3 %t
+; RUN: grep __lshrdi3 %t
+
+define i64 @f0(i64 %A, i64 %B) {
+ %tmp = bitcast i64 %A to i64
+ %tmp2 = lshr i64 %B, 1
+ %tmp3 = sub i64 %tmp, %tmp2
+ ret i64 %tmp3
+}
+
+define i32 @f1(i64 %x, i64 %y) {
+ %a = shl i64 %x, %y
+ %b = trunc i64 %a to i32
+ ret i32 %b
+}
+
+define i32 @f2(i64 %x, i64 %y) {
+ %a = ashr i64 %x, %y
+ %b = trunc i64 %a to i32
+ ret i32 %b
+}
+
+define i32 @f3(i64 %x, i64 %y) {
+ %a = lshr i64 %x, %y
+ %b = trunc i64 %a to i32
+ ret i32 %b
+}
diff --git a/test/CodeGen/ARM/lsr-code-insertion.ll b/test/CodeGen/ARM/lsr-code-insertion.ll
new file mode 100644
index 0000000..04b856f
--- /dev/null
+++ b/test/CodeGen/ARM/lsr-code-insertion.ll
@@ -0,0 +1,60 @@
+; RUN: llvm-as < %s | llc -stats |& grep {40.*Number of machine instrs printed}
+; This test really wants to check that the resultant "cond_true" block only
+; has a single store in it, and that cond_true55 only has code to materialize
+; the constant and do a store. We do *not* want something like this:
+;
+;LBB1_3: @cond_true
+; add r8, r0, r6
+; str r10, [r8, #+4]
+;
+
+target triple = "arm-apple-darwin8"
+
+define void @foo(i32* %mc, i32* %mpp, i32* %ip, i32* %dpp, i32* %tpmm, i32 %M, i32* %tpim, i32* %tpdm, i32* %bp, i32* %ms, i32 %xmb) {
+entry:
+ %tmp6584 = icmp slt i32 %M, 1 ; <i1> [#uses=1]
+ br i1 %tmp6584, label %return, label %bb
+
+bb: ; preds = %cond_next59, %entry
+ %indvar = phi i32 [ 0, %entry ], [ %k.069.0, %cond_next59 ] ; <i32> [#uses=6]
+ %k.069.0 = add i32 %indvar, 1 ; <i32> [#uses=3]
+ %tmp3 = getelementptr i32* %mpp, i32 %indvar ; <i32*> [#uses=1]
+ %tmp4 = load i32* %tmp3 ; <i32> [#uses=1]
+ %tmp8 = getelementptr i32* %tpmm, i32 %indvar ; <i32*> [#uses=1]
+ %tmp9 = load i32* %tmp8 ; <i32> [#uses=1]
+ %tmp10 = add i32 %tmp9, %tmp4 ; <i32> [#uses=2]
+ %tmp13 = getelementptr i32* %mc, i32 %k.069.0 ; <i32*> [#uses=5]
+ store i32 %tmp10, i32* %tmp13
+ %tmp17 = getelementptr i32* %ip, i32 %indvar ; <i32*> [#uses=1]
+ %tmp18 = load i32* %tmp17 ; <i32> [#uses=1]
+ %tmp22 = getelementptr i32* %tpim, i32 %indvar ; <i32*> [#uses=1]
+ %tmp23 = load i32* %tmp22 ; <i32> [#uses=1]
+ %tmp24 = add i32 %tmp23, %tmp18 ; <i32> [#uses=2]
+ %tmp30 = icmp sgt i32 %tmp24, %tmp10 ; <i1> [#uses=1]
+ br i1 %tmp30, label %cond_true, label %cond_next
+
+cond_true: ; preds = %bb
+ store i32 %tmp24, i32* %tmp13
+ br label %cond_next
+
+cond_next: ; preds = %cond_true, %bb
+ %tmp39 = load i32* %tmp13 ; <i32> [#uses=1]
+ %tmp42 = getelementptr i32* %ms, i32 %k.069.0 ; <i32*> [#uses=1]
+ %tmp43 = load i32* %tmp42 ; <i32> [#uses=1]
+ %tmp44 = add i32 %tmp43, %tmp39 ; <i32> [#uses=2]
+ store i32 %tmp44, i32* %tmp13
+ %tmp52 = icmp slt i32 %tmp44, -987654321 ; <i1> [#uses=1]
+ br i1 %tmp52, label %cond_true55, label %cond_next59
+
+cond_true55: ; preds = %cond_next
+ store i32 -987654321, i32* %tmp13
+ br label %cond_next59
+
+cond_next59: ; preds = %cond_true55, %cond_next
+ %tmp61 = add i32 %indvar, 2 ; <i32> [#uses=1]
+ %tmp65 = icmp sgt i32 %tmp61, %M ; <i1> [#uses=1]
+ br i1 %tmp65, label %return, label %bb
+
+return: ; preds = %cond_next59, %entry
+ ret void
+}
diff --git a/test/CodeGen/ARM/lsr-scale-addr-mode.ll b/test/CodeGen/ARM/lsr-scale-addr-mode.ll
new file mode 100644
index 0000000..230cf3e
--- /dev/null
+++ b/test/CodeGen/ARM/lsr-scale-addr-mode.ll
@@ -0,0 +1,19 @@
+; RUN: llvm-as < %s | llc -march=arm | grep -F {str r2, \[r0, +r3, lsl #2\]}
+; Should use scaled addressing mode.
+
+define void @sintzero(i32* %a) {
+entry:
+ store i32 0, i32* %a
+ br label %cond_next
+
+cond_next: ; preds = %cond_next, %entry
+ %indvar = phi i32 [ 0, %entry ], [ %tmp25, %cond_next ] ; <i32> [#uses=1]
+ %tmp25 = add i32 %indvar, 1 ; <i32> [#uses=3]
+ %tmp36 = getelementptr i32* %a, i32 %tmp25 ; <i32*> [#uses=1]
+ store i32 0, i32* %tmp36
+ icmp eq i32 %tmp25, -1 ; <i1>:0 [#uses=1]
+ br i1 %0, label %return, label %cond_next
+
+return: ; preds = %cond_next
+ ret void
+}
diff --git a/test/CodeGen/ARM/mem.ll b/test/CodeGen/ARM/mem.ll
new file mode 100644
index 0000000..d598d47
--- /dev/null
+++ b/test/CodeGen/ARM/mem.ll
@@ -0,0 +1,14 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep strb
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep strh
+
+void %f1() {
+entry:
+ store ubyte 0, ubyte* null
+ ret void
+}
+
+void %f2() {
+entry:
+ store short 0, short* null
+ ret void
+}
diff --git a/test/CodeGen/ARM/memfunc.ll b/test/CodeGen/ARM/memfunc.ll
new file mode 100644
index 0000000..1b41010
--- /dev/null
+++ b/test/CodeGen/ARM/memfunc.ll
@@ -0,0 +1,13 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm
+
+void %f() {
+entry:
+ call void %llvm.memmove.i32( sbyte* null, sbyte* null, uint 64, uint 0 )
+ call void %llvm.memcpy.i32( sbyte* null, sbyte* null, uint 64, uint 0 )
+ call void %llvm.memset.i32( sbyte* null, ubyte 64, uint 0, uint 0 )
+ unreachable
+}
+
+declare void %llvm.memmove.i32(sbyte*, sbyte*, uint, uint)
+declare void %llvm.memcpy.i32(sbyte*, sbyte*, uint, uint)
+declare void %llvm.memset.i32(sbyte*, ubyte, uint, uint)
diff --git a/test/CodeGen/ARM/mul.ll b/test/CodeGen/ARM/mul.ll
new file mode 100644
index 0000000..7a2c43b
--- /dev/null
+++ b/test/CodeGen/ARM/mul.ll
@@ -0,0 +1,24 @@
+; RUN: llvm-as < %s | llc -march=arm | grep mul | wc -l | grep 2
+; RUN: llvm-as < %s | llc -march=arm | grep lsl | wc -l | grep 2
+; RUN: llvm-as < %s | llc -march=thumb | grep mul | wc -l | grep 3
+; RUN: llvm-as < %s | llc -march=thumb | grep lsl | wc -l | grep 1
+
+define i32 @f1(i32 %u) {
+ %tmp = mul i32 %u, %u
+ ret i32 %tmp
+}
+
+define i32 @f2(i32 %u, i32 %v) {
+ %tmp = mul i32 %u, %v
+ ret i32 %tmp
+}
+
+define i32 @f3(i32 %u) {
+ %tmp = mul i32 %u, 5
+ ret i32 %tmp
+}
+
+define i32 @f4(i32 %u) {
+ %tmp = mul i32 %u, 4
+ ret i32 %tmp
+}
diff --git a/test/CodeGen/ARM/mulhi.ll b/test/CodeGen/ARM/mulhi.ll
new file mode 100644
index 0000000..9367258
--- /dev/null
+++ b/test/CodeGen/ARM/mulhi.ll
@@ -0,0 +1,23 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v6
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v6 | \
+; RUN: grep smmul | wc -l | grep 1
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep umull | wc -l | grep 1
+
+int %smulhi(int %x, int %y) {
+ %tmp = cast int %x to ulong ; <ulong> [#uses=1]
+ %tmp1 = cast int %y to ulong ; <ulong> [#uses=1]
+ %tmp2 = mul ulong %tmp1, %tmp ; <ulong> [#uses=1]
+ %tmp3 = shr ulong %tmp2, ubyte 32 ; <ulong> [#uses=1]
+ %tmp3 = cast ulong %tmp3 to int ; <int> [#uses=1]
+ ret int %tmp3
+}
+
+int %umulhi(uint %x, uint %y) {
+ %tmp = cast uint %x to ulong ; <ulong> [#uses=1]
+ %tmp1 = cast uint %y to ulong ; <ulong> [#uses=1]
+ %tmp2 = mul ulong %tmp1, %tmp ; <ulong> [#uses=1]
+ %tmp3 = shr ulong %tmp2, ubyte 32 ; <ulong> [#uses=1]
+ %tmp3 = cast ulong %tmp3 to int ; <int> [#uses=1]
+ ret int %tmp3
+}
+
diff --git a/test/CodeGen/ARM/mvn.ll b/test/CodeGen/ARM/mvn.ll
new file mode 100644
index 0000000..3f4a6f7
--- /dev/null
+++ b/test/CodeGen/ARM/mvn.ll
@@ -0,0 +1,72 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep mvn | wc -l | grep 8
+; END.
+
+int %f1() {
+entry:
+ ret int -1
+}
+
+int %f2(int %a) {
+entry:
+ %tmpnot = xor int %a, -1 ; <int> [#uses=1]
+ ret int %tmpnot
+}
+
+int %f3(int %a) {
+entry:
+ %tmp1 = shl int %a, ubyte 2 ; <int> [#uses=1]
+ %tmp1not = xor int %tmp1, -1 ; <int> [#uses=1]
+ ret int %tmp1not
+}
+
+int %f4(int %a, ubyte %b) {
+entry:
+ %tmp3 = shl int %a, ubyte %b ; <int> [#uses=1]
+ %tmp3not = xor int %tmp3, -1 ; <int> [#uses=1]
+ ret int %tmp3not
+}
+
+uint %f5(uint %a) {
+entry:
+ %tmp1 = lshr uint %a, ubyte 2 ; <uint> [#uses=1]
+ %tmp1not = xor uint %tmp1, 4294967295 ; <uint> [#uses=1]
+ ret uint %tmp1not
+}
+
+uint %f6(uint %a, ubyte %b) {
+entry:
+ %tmp2 = lshr uint %a, ubyte %b ; <uint> [#uses=1]
+ %tmp2not = xor uint %tmp2, 4294967295 ; <uint> [#uses=1]
+ ret uint %tmp2not
+}
+
+int %f7(int %a) {
+entry:
+ %tmp1 = ashr int %a, ubyte 2 ; <int> [#uses=1]
+ %tmp1not = xor int %tmp1, -1 ; <int> [#uses=1]
+ ret int %tmp1not
+}
+
+int %f8(int %a, ubyte %b) {
+entry:
+ %tmp3 = ashr int %a, ubyte %b ; <int> [#uses=1]
+ %tmp3not = xor int %tmp3, -1 ; <int> [#uses=1]
+ ret int %tmp3not
+}
+
+int %f9() {
+entry:
+ %tmp4845 = add int 0, 0
+ br label %cond_true4848
+
+cond_true4848: ; preds = %bb4835
+ %tmp4851 = sub int -3, 0 ; <int> [#uses=1]
+ %abc = add int %tmp4851, %tmp4845
+ ret int %abc
+}
+
+bool %f10(int %a) {
+entry:
+ %tmp102 = seteq int -2, %a ; <bool> [#uses=1]
+ ret bool %tmp102
+}
diff --git a/test/CodeGen/ARM/pack.ll b/test/CodeGen/ARM/pack.ll
new file mode 100644
index 0000000..8cd392b
--- /dev/null
+++ b/test/CodeGen/ARM/pack.ll
@@ -0,0 +1,80 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v6 | \
+; RUN: grep pkhbt | wc -l | grep 5
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v6 | \
+; RUN: grep pkhtb | wc -l | grep 4
+; END.
+
+implementation ; Functions:
+
+int %test1(int %X, int %Y) {
+ %tmp1 = and int %X, 65535 ; <int> [#uses=1]
+ %tmp4 = shl int %Y, ubyte 16 ; <int> [#uses=1]
+ %tmp5 = or int %tmp4, %tmp1 ; <int> [#uses=1]
+ ret int %tmp5
+}
+
+int %test1a(int %X, int %Y) {
+ %tmp19 = and int %X, 65535 ; <int> [#uses=1]
+ %tmp37 = shl int %Y, ubyte 16 ; <int> [#uses=1]
+ %tmp5 = or int %tmp37, %tmp19 ; <int> [#uses=1]
+ ret int %tmp5
+}
+
+int %test2(int %X, int %Y) {
+ %tmp1 = and int %X, 65535 ; <int> [#uses=1]
+ %tmp3 = shl int %Y, ubyte 12 ; <int> [#uses=1]
+ %tmp4 = and int %tmp3, -65536 ; <int> [#uses=1]
+ %tmp57 = or int %tmp4, %tmp1 ; <int> [#uses=1]
+ ret int %tmp57
+}
+
+int %test3(int %X, int %Y) {
+ %tmp19 = and int %X, 65535 ; <int> [#uses=1]
+ %tmp37 = shl int %Y, ubyte 18 ; <int> [#uses=1]
+ %tmp5 = or int %tmp37, %tmp19 ; <int> [#uses=1]
+ ret int %tmp5
+}
+
+int %test4(int %X, int %Y) {
+ %tmp1 = and int %X, 65535 ; <int> [#uses=1]
+ %tmp3 = and int %Y, -65536 ; <int> [#uses=1]
+ %tmp46 = or int %tmp3, %tmp1 ; <int> [#uses=1]
+ ret int %tmp46
+}
+
+int %test5(int %X, int %Y) {
+ %tmp17 = and int %X, -65536 ; <int> [#uses=1]
+ %tmp2 = cast int %Y to uint ; <uint> [#uses=1]
+ %tmp4 = shr uint %tmp2, ubyte 16 ; <uint> [#uses=1]
+ %tmp4 = cast uint %tmp4 to int ; <int> [#uses=1]
+ %tmp5 = or int %tmp4, %tmp17 ; <int> [#uses=1]
+ ret int %tmp5
+}
+
+int %test5a(int %X, int %Y) {
+ %tmp110 = and int %X, -65536 ; <int> [#uses=1]
+ %Y = cast int %Y to uint ; <uint> [#uses=1]
+ %tmp37 = shr uint %Y, ubyte 16 ; <uint> [#uses=1]
+ %tmp39 = cast uint %tmp37 to int ; <int> [#uses=1]
+ %tmp5 = or int %tmp39, %tmp110 ; <int> [#uses=1]
+ ret int %tmp5
+}
+
+int %test6(int %X, int %Y) {
+ %tmp1 = and int %X, -65536 ; <int> [#uses=1]
+ %Y = cast int %Y to uint ; <uint> [#uses=1]
+ %tmp37 = shr uint %Y, ubyte 12 ; <uint> [#uses=1]
+ %tmp38 = cast uint %tmp37 to int ; <int> [#uses=1]
+ %tmp4 = and int %tmp38, 65535 ; <int> [#uses=1]
+ %tmp59 = or int %tmp4, %tmp1 ; <int> [#uses=1]
+ ret int %tmp59
+}
+
+int %test7(int %X, int %Y) {
+ %tmp1 = and int %X, -65536 ; <int> [#uses=1]
+ %tmp3 = shr int %Y, ubyte 18 ; <int> [#uses=1]
+ %tmp4 = and int %tmp3, 65535 ; <int> [#uses=1]
+ %tmp57 = or int %tmp4, %tmp1 ; <int> [#uses=1]
+ ret int %tmp57
+}
+
diff --git a/test/CodeGen/ARM/ret0.ll b/test/CodeGen/ARM/ret0.ll
new file mode 100644
index 0000000..176b2e0
--- /dev/null
+++ b/test/CodeGen/ARM/ret0.ll
@@ -0,0 +1,4 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm
+int %test() {
+ ret int 0
+}
diff --git a/test/CodeGen/ARM/ret_arg1.ll b/test/CodeGen/ARM/ret_arg1.ll
new file mode 100644
index 0000000..d490cb3
--- /dev/null
+++ b/test/CodeGen/ARM/ret_arg1.ll
@@ -0,0 +1,4 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm
+int %test(int %a1) {
+ ret int %a1
+}
diff --git a/test/CodeGen/ARM/ret_arg2.ll b/test/CodeGen/ARM/ret_arg2.ll
new file mode 100644
index 0000000..eb155da
--- /dev/null
+++ b/test/CodeGen/ARM/ret_arg2.ll
@@ -0,0 +1,4 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm
+int %test(int %a1, int %a2) {
+ ret int %a2
+}
diff --git a/test/CodeGen/ARM/ret_arg3.ll b/test/CodeGen/ARM/ret_arg3.ll
new file mode 100644
index 0000000..41fc930
--- /dev/null
+++ b/test/CodeGen/ARM/ret_arg3.ll
@@ -0,0 +1,4 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm
+int %test(int %a1, int %a2, int %a3) {
+ ret int %a3
+}
diff --git a/test/CodeGen/ARM/ret_arg4.ll b/test/CodeGen/ARM/ret_arg4.ll
new file mode 100644
index 0000000..e04f296
--- /dev/null
+++ b/test/CodeGen/ARM/ret_arg4.ll
@@ -0,0 +1,4 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm
+int %test(int %a1, int %a2, int %a3, int %a4) {
+ ret int %a4
+}
diff --git a/test/CodeGen/ARM/ret_arg5.ll b/test/CodeGen/ARM/ret_arg5.ll
new file mode 100644
index 0000000..a49929b
--- /dev/null
+++ b/test/CodeGen/ARM/ret_arg5.ll
@@ -0,0 +1,4 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm
+int %test(int %a1, int %a2, int %a3, int %a4, int %a5) {
+ ret int %a5
+}
diff --git a/test/CodeGen/ARM/ret_void.ll b/test/CodeGen/ARM/ret_void.ll
new file mode 100644
index 0000000..5cd82e3
--- /dev/null
+++ b/test/CodeGen/ARM/ret_void.ll
@@ -0,0 +1,4 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm
+void %test() {
+ ret void
+}
diff --git a/test/CodeGen/ARM/rev.ll b/test/CodeGen/ARM/rev.ll
new file mode 100644
index 0000000..0072dae
--- /dev/null
+++ b/test/CodeGen/ARM/rev.ll
@@ -0,0 +1,29 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v6 | grep rev16
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v6 | grep revsh
+
+int %test1(uint %X) {
+ %tmp1 = shr uint %X, ubyte 8 ; <uint> [#uses=1]
+ %tmp1 = cast uint %tmp1 to int ; <int> [#uses=2]
+ %X15 = cast uint %X to int ; <int> [#uses=1]
+ %tmp4 = shl int %X15, ubyte 8 ; <int> [#uses=2]
+ %tmp2 = and int %tmp1, 16711680 ; <int> [#uses=1]
+ %tmp5 = and int %tmp4, -16777216 ; <int> [#uses=1]
+ %tmp9 = and int %tmp1, 255 ; <int> [#uses=1]
+ %tmp13 = and int %tmp4, 65280 ; <int> [#uses=1]
+ %tmp6 = or int %tmp5, %tmp2 ; <int> [#uses=1]
+ %tmp10 = or int %tmp6, %tmp13 ; <int> [#uses=1]
+ %tmp14 = or int %tmp10, %tmp9 ; <int> [#uses=1]
+ ret int %tmp14
+}
+
+int %test2(uint %X) { ; revsh
+ %tmp1 = shr uint %X, ubyte 8 ; <uint> [#uses=1]
+ %tmp1 = cast uint %tmp1 to short ; <short> [#uses=1]
+ %tmp3 = cast uint %X to short ; <short> [#uses=1]
+ %tmp2 = and short %tmp1, 255 ; <short> [#uses=1]
+ %tmp4 = shl short %tmp3, ubyte 8 ; <short> [#uses=1]
+ %tmp5 = or short %tmp2, %tmp4 ; <short> [#uses=1]
+ %tmp5 = cast short %tmp5 to int ; <int> [#uses=1]
+ ret int %tmp5
+}
+
diff --git a/test/CodeGen/ARM/section.ll b/test/CodeGen/ARM/section.ll
new file mode 100644
index 0000000..fcb86c5
--- /dev/null
+++ b/test/CodeGen/ARM/section.ll
@@ -0,0 +1,6 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-linux | \
+; RUN: grep {__DTOR_END__:}
+; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-linux | \
+; RUN: grep {.section .dtors,"aw",.progbits}
+
+%__DTOR_END__ = internal global [1 x int] zeroinitializer, section ".dtors"
diff --git a/test/CodeGen/ARM/select.ll b/test/CodeGen/ARM/select.ll
new file mode 100644
index 0000000..7758a8d
--- /dev/null
+++ b/test/CodeGen/ARM/select.ll
@@ -0,0 +1,63 @@
+; RUN: llvm-as < %s | llc -march=arm | grep moveq | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=arm | grep movgt | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=arm | grep movlt | wc -l | grep 3
+; RUN: llvm-as < %s | llc -march=arm | grep movle | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=arm | grep movls | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=arm | grep movhi | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | \
+; RUN: grep fcpydmi | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=thumb | grep beq | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=thumb | grep bgt | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=thumb | grep blt | wc -l | grep 3
+; RUN: llvm-as < %s | llc -march=thumb | grep ble | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=thumb | grep bls | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=thumb | grep bhi | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=thumb | grep __ltdf2
+
+define i32 @f1(i32 %a.s) {
+entry:
+ %tmp = icmp eq i32 %a.s, 4
+ %tmp1.s = select i1 %tmp, i32 2, i32 3
+ ret i32 %tmp1.s
+}
+
+define i32 @f2(i32 %a.s) {
+entry:
+ %tmp = icmp sgt i32 %a.s, 4
+ %tmp1.s = select i1 %tmp, i32 2, i32 3
+ ret i32 %tmp1.s
+}
+
+define i32 @f3(i32 %a.s, i32 %b.s) {
+entry:
+ %tmp = icmp slt i32 %a.s, %b.s
+ %tmp1.s = select i1 %tmp, i32 2, i32 3
+ ret i32 %tmp1.s
+}
+
+define i32 @f4(i32 %a.s, i32 %b.s) {
+entry:
+ %tmp = icmp sle i32 %a.s, %b.s
+ %tmp1.s = select i1 %tmp, i32 2, i32 3
+ ret i32 %tmp1.s
+}
+
+define i32 @f5(i32 %a.u, i32 %b.u) {
+entry:
+ %tmp = icmp ule i32 %a.u, %b.u
+ %tmp1.s = select i1 %tmp, i32 2, i32 3
+ ret i32 %tmp1.s
+}
+
+define i32 @f6(i32 %a.u, i32 %b.u) {
+entry:
+ %tmp = icmp ugt i32 %a.u, %b.u
+ %tmp1.s = select i1 %tmp, i32 2, i32 3
+ ret i32 %tmp1.s
+}
+
+define double @f7(double %a, double %b) {
+ %tmp = fcmp olt double %a, 1.234e+00
+ %tmp1 = select i1 %tmp, double -1.000e+00, double %b
+ ret double %tmp1
+}
diff --git a/test/CodeGen/ARM/select_xform.ll b/test/CodeGen/ARM/select_xform.ll
new file mode 100644
index 0000000..36071be
--- /dev/null
+++ b/test/CodeGen/ARM/select_xform.ll
@@ -0,0 +1,16 @@
+; RUN: llvm-as < %s | llc -march=arm
+; RUN: llvm-as < %s | llc -march=arm | grep mov | wc -l | grep 2
+
+define i32 @t1(i32 %a, i32 %b, i32 %c) {
+ %tmp1 = icmp sgt i32 %c, 10
+ %tmp2 = select i1 %tmp1, i32 0, i32 2147483647
+ %tmp3 = add i32 %tmp2, %b
+ ret i32 %tmp3
+}
+
+define i32 @t2(i32 %a, i32 %b, i32 %c, i32 %d) {
+ %tmp1 = icmp sgt i32 %c, 10
+ %tmp2 = select i1 %tmp1, i32 0, i32 10
+ %tmp3 = sub i32 %b, %tmp2
+ ret i32 %tmp3
+}
diff --git a/test/CodeGen/ARM/shifter_operand.ll b/test/CodeGen/ARM/shifter_operand.ll
new file mode 100644
index 0000000..313caed
--- /dev/null
+++ b/test/CodeGen/ARM/shifter_operand.ll
@@ -0,0 +1,15 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep add | grep lsl
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep bic | grep asr
+
+int %test1(int %X, int %Y, ubyte %sh) {
+ %A = shl int %Y, ubyte %sh
+ %B = add int %X, %A
+ ret int %B
+}
+
+int %test2(int %X, int %Y, ubyte %sh) {
+ %A = shr int %Y, ubyte %sh
+ %B = xor int %A, -1
+ %C = and int %X, %B
+ ret int %C
+}
diff --git a/test/CodeGen/ARM/smul.ll b/test/CodeGen/ARM/smul.ll
new file mode 100644
index 0000000..4ea61f3
--- /dev/null
+++ b/test/CodeGen/ARM/smul.ll
@@ -0,0 +1,35 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v5TE
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v5TE | \
+; RUN: grep smulbt | wc -l | grep 1
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v5TE | \
+; RUN: grep smultt | wc -l | grep 1
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v5TE | \
+; RUN: grep smlabt | wc -l | grep 1
+
+%x = weak global short 0
+%y = weak global short 0
+
+int %f1(int %y) {
+ %tmp = load short* %x
+ %tmp1 = add short %tmp, 2
+ %tmp2 = cast short %tmp1 to int
+ %tmp3 = shr int %y, ubyte 16
+ %tmp4 = mul int %tmp2, %tmp3
+ ret int %tmp4
+}
+
+int %f2(int %x, int %y) {
+ %tmp1 = shr int %x, ubyte 16
+ %tmp3 = shr int %y, ubyte 16
+ %tmp4 = mul int %tmp3, %tmp1
+ ret int %tmp4
+}
+
+int %f3(int %a, short %x, int %y) {
+ %tmp = cast short %x to int
+ %tmp2 = shr int %y, ubyte 16
+ %tmp3 = mul int %tmp2, %tmp
+ %tmp5 = add int %tmp3, %a
+ ret int %tmp5
+}
diff --git a/test/CodeGen/ARM/stack-frame.ll b/test/CodeGen/ARM/stack-frame.ll
new file mode 100644
index 0000000..fc34785
--- /dev/null
+++ b/test/CodeGen/ARM/stack-frame.ll
@@ -0,0 +1,15 @@
+; RUN: llvm-as < %s | llc -march=arm
+; RUN: llvm-as < %s | llc -march=arm | grep add | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=thumb
+; RUN: llvm-as < %s | llc -march=thumb | grep add | wc -l | grep 1
+
+define void @f1() {
+ %c = alloca i8, align 1
+ ret void
+}
+
+define i32 @f2() {
+ ret i32 1
+}
+
+
diff --git a/test/CodeGen/ARM/str_post.ll b/test/CodeGen/ARM/str_post.ll
new file mode 100644
index 0000000..a388f54
--- /dev/null
+++ b/test/CodeGen/ARM/str_post.ll
@@ -0,0 +1,21 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \
+; RUN: grep {strh .*\\\[.*\], #-4} | wc -l | grep 1
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \
+; RUN: grep {str .*\\\[.*\],} | wc -l | grep 1
+
+short %test1(int *%X, short *%A) {
+ %Y = load int* %X
+ %tmp1 = cast int %Y to short
+ store short %tmp1, short* %A
+ %tmp2 = cast short* %A to short
+ %tmp3 = sub short %tmp2, 4
+ ret short %tmp3
+}
+
+int %test2(int *%X, int *%A) {
+ %Y = load int* %X
+ store int %Y, int* %A
+ %tmp1 = cast int* %A to int
+ %tmp2 = sub int %tmp1, 4
+ ret int %tmp2
+}
diff --git a/test/CodeGen/ARM/str_pre.ll b/test/CodeGen/ARM/str_pre.ll
new file mode 100644
index 0000000..69f9928
--- /dev/null
+++ b/test/CodeGen/ARM/str_pre.ll
@@ -0,0 +1,18 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \
+; RUN: grep {str.*\\!} | wc -l | grep 2
+
+void %test1(int *%X, int *%A, int **%dest) {
+ %B = load int* %A
+ %Y = getelementptr int* %X, int 4
+ store int %B, int* %Y
+ store int* %Y, int** %dest
+ ret void
+}
+
+short *%test2(short *%X, int *%A) {
+ %B = load int* %A
+ %Y = getelementptr short* %X, int 4
+ %tmp = cast int %B to short
+ store short %tmp, short* %Y
+ ret short* %Y
+}
diff --git a/test/CodeGen/ARM/str_trunc.ll b/test/CodeGen/ARM/str_trunc.ll
new file mode 100644
index 0000000..5a1b961
--- /dev/null
+++ b/test/CodeGen/ARM/str_trunc.ll
@@ -0,0 +1,16 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \
+; RUN: grep strb | wc -l | grep 1
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \
+; RUN: grep strh | wc -l | grep 1
+
+void %test1(int %v, short* %ptr) {
+ %tmp = cast int %v to short
+ store short %tmp, short* %ptr
+ ret void
+}
+
+void %test2(int %v, ubyte* %ptr) {
+ %tmp = cast int %v to ubyte
+ store ubyte %tmp, ubyte* %ptr
+ ret void
+}
diff --git a/test/CodeGen/ARM/sxt_rot.ll b/test/CodeGen/ARM/sxt_rot.ll
new file mode 100644
index 0000000..bf62d08
--- /dev/null
+++ b/test/CodeGen/ARM/sxt_rot.ll
@@ -0,0 +1,22 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | \
+; RUN: grep sxtb | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | \
+; RUN: grep sxtab | wc -l | grep 1
+
+define i8 @test1(i32 %A) sext {
+ %B = lshr i32 %A, 8
+ %C = shl i32 %A, 24
+ %D = or i32 %B, %C
+ %E = trunc i32 %D to i8
+ ret i8 %E
+}
+
+define i32 @test2(i32 %A, i32 %X) sext {
+ %B = lshr i32 %A, 8
+ %C = shl i32 %A, 24
+ %D = or i32 %B, %C
+ %E = trunc i32 %D to i8
+ %F = sext i8 %E to i32
+ %G = add i32 %F, %X
+ ret i32 %G
+}
diff --git a/test/CodeGen/ARM/thumb-imm.ll b/test/CodeGen/ARM/thumb-imm.ll
new file mode 100644
index 0000000..2be393a
--- /dev/null
+++ b/test/CodeGen/ARM/thumb-imm.ll
@@ -0,0 +1,10 @@
+; RUN: llvm-as < %s | llc -march=thumb | not grep CPI
+
+
+define i32 @test1() {
+ ret i32 1000
+}
+
+define i32 @test2() {
+ ret i32 -256
+}
diff --git a/test/CodeGen/ARM/tls1.ll b/test/CodeGen/ARM/tls1.ll
new file mode 100644
index 0000000..6866a42
--- /dev/null
+++ b/test/CodeGen/ARM/tls1.ll
@@ -0,0 +1,20 @@
+; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi | \
+; RUN: grep {i(tpoff)}
+; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi | \
+; RUN: grep {__aeabi_read_tp}
+; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi \
+; RUN: -relocation-model=pic | grep {__tls_get_addr}
+
+
+@i = thread_local global i32 15 ; <i32*> [#uses=2]
+
+define i32 @f() {
+entry:
+ %tmp1 = load i32* @i ; <i32> [#uses=1]
+ ret i32 %tmp1
+}
+
+define i32* @g() {
+entry:
+ ret i32* @i
+}
diff --git a/test/CodeGen/ARM/tls2.ll b/test/CodeGen/ARM/tls2.ll
new file mode 100644
index 0000000..90e3bcf
--- /dev/null
+++ b/test/CodeGen/ARM/tls2.ll
@@ -0,0 +1,19 @@
+; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi | \
+; RUN: grep {i(gottpoff)}
+; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi | \
+; RUN: grep {ldr r., \[pc, r.\]}
+; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi \
+; RUN: -relocation-model=pic | grep {__tls_get_addr}
+
+@i = external thread_local global i32 ; <i32*> [#uses=2]
+
+define i32 @f() {
+entry:
+ %tmp1 = load i32* @i ; <i32> [#uses=1]
+ ret i32 %tmp1
+}
+
+define i32* @g() {
+entry:
+ ret i32* @i
+}
diff --git a/test/CodeGen/ARM/trunc_ldr.ll b/test/CodeGen/ARM/trunc_ldr.ll
new file mode 100644
index 0000000..bb13ac9
--- /dev/null
+++ b/test/CodeGen/ARM/trunc_ldr.ll
@@ -0,0 +1,24 @@
+; RUN: llvm-as < %s | llc -march=arm | grep ldrb.*7 | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=arm | grep ldrsb.*7 | wc -l | grep 1
+
+ %struct.A = type { i8, i8, i8, i8, i16, i8, i8, %struct.B** }
+ %struct.B = type { float, float, i32, i32, i32, [0 x i8] }
+
+define i8 @f1(%struct.A* %d) {
+ %tmp2 = getelementptr %struct.A* %d, i32 0, i32 4
+ %tmp23 = bitcast i16* %tmp2 to i32*
+ %tmp4 = load i32* %tmp23
+ %tmp512 = lshr i32 %tmp4, 24
+ %tmp56 = trunc i32 %tmp512 to i8
+ ret i8 %tmp56
+}
+
+define i32 @f2(%struct.A* %d) {
+ %tmp2 = getelementptr %struct.A* %d, i32 0, i32 4
+ %tmp23 = bitcast i16* %tmp2 to i32*
+ %tmp4 = load i32* %tmp23
+ %tmp512 = lshr i32 %tmp4, 24
+ %tmp56 = trunc i32 %tmp512 to i8
+ %tmp57 = sext i8 %tmp56 to i32
+ ret i32 %tmp57
+}
diff --git a/test/CodeGen/ARM/tst_teq.ll b/test/CodeGen/ARM/tst_teq.ll
new file mode 100644
index 0000000..e5aa029
--- /dev/null
+++ b/test/CodeGen/ARM/tst_teq.ll
@@ -0,0 +1,19 @@
+; RUN: llvm-as < %s | llc -march=arm | grep tst
+; RUN: llvm-as < %s | llc -march=arm | grep teq
+; RUN: llvm-as < %s | llc -march=thumb | grep tst
+
+define i32 @f(i32 %a) {
+entry:
+ %tmp2 = and i32 %a, 255 ; <i32> [#uses=1]
+ icmp eq i32 %tmp2, 0 ; <i1>:0 [#uses=1]
+ %retval = select i1 %0, i32 20, i32 10 ; <i32> [#uses=1]
+ ret i32 %retval
+}
+
+define i32 @g(i32 %a) {
+entry:
+ %tmp2 = xor i32 %a, 255
+ icmp eq i32 %tmp2, 0 ; <i1>:0 [#uses=1]
+ %retval = select i1 %0, i32 20, i32 10 ; <i32> [#uses=1]
+ ret i32 %retval
+}
diff --git a/test/CodeGen/ARM/unord.ll b/test/CodeGen/ARM/unord.ll
new file mode 100644
index 0000000..ce587f0
--- /dev/null
+++ b/test/CodeGen/ARM/unord.ll
@@ -0,0 +1,16 @@
+; RUN: llvm-as < %s | llc -march=arm | grep movne | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=arm | grep moveq | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=thumb | grep bne | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=thumb | grep beq | wc -l | grep 1
+
+define i32 @f1(float %X, float %Y) {
+ %tmp = fcmp uno float %X, %Y
+ %retval = select i1 %tmp, i32 1, i32 -1
+ ret i32 %retval
+}
+
+define i32 @f2(float %X, float %Y) {
+ %tmp = fcmp ord float %X, %Y
+ %retval = select i1 %tmp, i32 1, i32 -1
+ ret i32 %retval
+}
diff --git a/test/CodeGen/ARM/uxt_rot.ll b/test/CodeGen/ARM/uxt_rot.ll
new file mode 100644
index 0000000..d15c650
--- /dev/null
+++ b/test/CodeGen/ARM/uxt_rot.ll
@@ -0,0 +1,24 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | grep uxtb | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | grep uxtab | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | grep uxth | wc -l | grep 1
+
+define i8 @test1(i32 %A.u) zext {
+ %B.u = trunc i32 %A.u to i8
+ ret i8 %B.u
+}
+
+define i32 @test2(i32 %A.u, i32 %B.u) zext {
+ %C.u = trunc i32 %B.u to i8
+ %D.u = zext i8 %C.u to i32
+ %E.u = add i32 %A.u, %D.u
+ ret i32 %E.u
+}
+
+define i32 @test3(i32 %A.u) zext {
+ %B.u = lshr i32 %A.u, 8
+ %C.u = shl i32 %A.u, 24
+ %D.u = or i32 %B.u, %C.u
+ %E.u = trunc i32 %D.u to i16
+ %F.u = zext i16 %E.u to i32
+ ret i32 %F.u
+}
diff --git a/test/CodeGen/ARM/uxtb.ll b/test/CodeGen/ARM/uxtb.ll
new file mode 100644
index 0000000..86c99da
--- /dev/null
+++ b/test/CodeGen/ARM/uxtb.ll
@@ -0,0 +1,76 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v6 | \
+; RUN: grep uxt | wc -l | grep 10
+; END.
+
+uint %test1(uint %x) {
+ %tmp1 = and uint %x, 16711935 ; <uint> [#uses=1]
+ ret uint %tmp1
+}
+
+uint %test2(uint %x) {
+ %tmp1 = shr uint %x, ubyte 8 ; <uint> [#uses=1]
+ %tmp2 = and uint %tmp1, 16711935 ; <uint> [#uses=1]
+ ret uint %tmp2
+}
+
+uint %test3(uint %x) {
+ %tmp1 = shr uint %x, ubyte 8 ; <uint> [#uses=1]
+ %tmp2 = and uint %tmp1, 16711935 ; <uint> [#uses=1]
+ ret uint %tmp2
+}
+
+uint %test4(uint %x) {
+ %tmp1 = shr uint %x, ubyte 8 ; <uint> [#uses=1]
+ %tmp6 = and uint %tmp1, 16711935 ; <uint> [#uses=1]
+ ret uint %tmp6
+}
+
+uint %test5(uint %x) {
+ %tmp1 = shr uint %x, ubyte 8 ; <uint> [#uses=1]
+ %tmp2 = and uint %tmp1, 16711935 ; <uint> [#uses=1]
+ ret uint %tmp2
+}
+
+uint %test6(uint %x) {
+ %tmp1 = shr uint %x, ubyte 16 ; <uint> [#uses=1]
+ %tmp2 = and uint %tmp1, 255 ; <uint> [#uses=1]
+ %tmp4 = shl uint %x, ubyte 16 ; <uint> [#uses=1]
+ %tmp5 = and uint %tmp4, 16711680 ; <uint> [#uses=1]
+ %tmp6 = or uint %tmp2, %tmp5 ; <uint> [#uses=1]
+ ret uint %tmp6
+}
+
+uint %test7(uint %x) {
+ %tmp1 = shr uint %x, ubyte 16 ; <uint> [#uses=1]
+ %tmp2 = and uint %tmp1, 255 ; <uint> [#uses=1]
+ %tmp4 = shl uint %x, ubyte 16 ; <uint> [#uses=1]
+ %tmp5 = and uint %tmp4, 16711680 ; <uint> [#uses=1]
+ %tmp6 = or uint %tmp2, %tmp5 ; <uint> [#uses=1]
+ ret uint %tmp6
+}
+
+uint %test8(uint %x) {
+ %tmp1 = shl uint %x, ubyte 8 ; <uint> [#uses=1]
+ %tmp2 = and uint %tmp1, 16711680 ; <uint> [#uses=1]
+ %tmp5 = shr uint %x, ubyte 24 ; <uint> [#uses=1]
+ %tmp6 = or uint %tmp2, %tmp5 ; <uint> [#uses=1]
+ ret uint %tmp6
+}
+
+uint %test9(uint %x) {
+ %tmp1 = shr uint %x, ubyte 24 ; <uint> [#uses=1]
+ %tmp4 = shl uint %x, ubyte 8 ; <uint> [#uses=1]
+ %tmp5 = and uint %tmp4, 16711680 ; <uint> [#uses=1]
+ %tmp6 = or uint %tmp5, %tmp1 ; <uint> [#uses=1]
+ ret uint %tmp6
+}
+
+uint %test10(uint %p0) {
+ %tmp1 = shr uint %p0, ubyte 7 ; <uint> [#uses=1]
+ %tmp2 = and uint %tmp1, 16253176 ; <uint> [#uses=2]
+ %tmp4 = shr uint %tmp2, ubyte 5 ; <uint> [#uses=1]
+ %tmp5 = and uint %tmp4, 458759 ; <uint> [#uses=1]
+ %tmp7 = or uint %tmp5, %tmp2 ; <uint> [#uses=1]
+ ret uint %tmp7
+}
+
diff --git a/test/CodeGen/ARM/vargs.ll b/test/CodeGen/ARM/vargs.ll
new file mode 100644
index 0000000..aa5e8e6
--- /dev/null
+++ b/test/CodeGen/ARM/vargs.ll
@@ -0,0 +1,13 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm
+%str = internal constant [43 x sbyte] c"Hello World %d %d %d %d %d %d %d %d %d %d\0A\00" ; <[43 x sbyte]*> [#uses=1]
+
+implementation ; Functions:
+
+int %main() {
+entry:
+ %tmp = call int (sbyte*, ...)* %printf( sbyte* getelementptr ([43 x sbyte]* %str, int 0, uint 0), int 1, int 2, int 3, int 4, int 5, int 6, int 7, int 8, int 9, int 10 ) ; <int> [#uses=0]
+ %tmp2 = call int (sbyte*, ...)* %printf( sbyte* getelementptr ([43 x sbyte]* %str, int 0, uint 0), int 10, int 9, int 8, int 7, int 6, int 5, int 4, int 3, int 2, int 1 ) ; <int> [#uses=0]
+ ret int 11
+}
+
+declare int %printf(sbyte*, ...)
diff --git a/test/CodeGen/ARM/vargs2.ll b/test/CodeGen/ARM/vargs2.ll
new file mode 100644
index 0000000..a58516f
--- /dev/null
+++ b/test/CodeGen/ARM/vargs2.ll
@@ -0,0 +1,36 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=thumb
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=thumb | \
+; RUN: grep pop | wc -l | grep 2
+
+%str = internal constant [4 x sbyte] c"%d\0A\00" ; <[4 x sbyte]*> [#uses=1]
+
+implementation ; Functions:
+
+void %f(int %a, ...) {
+entry:
+ %va = alloca sbyte*, align 4 ; <sbyte**> [#uses=4]
+ call void %llvm.va_start( sbyte** %va )
+ br label %bb
+
+bb: ; preds = %bb, %entry
+ %a_addr.0 = phi int [ %a, %entry ], [ %tmp5, %bb ] ; <int> [#uses=2]
+ %tmp = volatile load sbyte** %va ; <sbyte*> [#uses=2]
+ %tmp2 = getelementptr sbyte* %tmp, int 4 ; <sbyte*> [#uses=1]
+ volatile store sbyte* %tmp2, sbyte** %va
+ %tmp5 = add int %a_addr.0, -1 ; <int> [#uses=1]
+ %tmp = seteq int %a_addr.0, 1 ; <bool> [#uses=1]
+ br bool %tmp, label %bb7, label %bb
+
+bb7: ; preds = %bb
+ %tmp3 = cast sbyte* %tmp to int* ; <int*> [#uses=1]
+ %tmp = load int* %tmp3 ; <int> [#uses=1]
+ %tmp10 = call int (sbyte*, ...)* %printf( sbyte* getelementptr ([4 x sbyte]* %str, int 0, uint 0), int %tmp ) ; <int> [#uses=0]
+ call void %llvm.va_end( sbyte** %va )
+ ret void
+}
+
+declare void %llvm.va_start(sbyte**)
+
+declare int %printf(sbyte*, ...)
+
+declare void %llvm.va_end(sbyte**)
diff --git a/test/CodeGen/ARM/vargs_align.ll b/test/CodeGen/ARM/vargs_align.ll
new file mode 100644
index 0000000..8d49e19
--- /dev/null
+++ b/test/CodeGen/ARM/vargs_align.ll
@@ -0,0 +1,21 @@
+; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi | \
+; RUN: grep {add sp, sp, #16} | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnu | \
+; RUN: grep {add sp, sp, #12} | wc -l | grep 2
+
+define i32 @f(i32 %a, ...) {
+entry:
+ %a_addr = alloca i32 ; <i32*> [#uses=1]
+ %retval = alloca i32, align 4 ; <i32*> [#uses=2]
+ %tmp = alloca i32, align 4 ; <i32*> [#uses=2]
+ "alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i32 %a, i32* %a_addr
+ store i32 0, i32* %tmp
+ %tmp1 = load i32* %tmp ; <i32> [#uses=1]
+ store i32 %tmp1, i32* %retval
+ br label %return
+
+return: ; preds = %entry
+ %retval2 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval2
+}
diff --git a/test/CodeGen/ARM/vfp.ll b/test/CodeGen/ARM/vfp.ll
new file mode 100644
index 0000000..b2a6d70
--- /dev/null
+++ b/test/CodeGen/ARM/vfp.ll
@@ -0,0 +1,150 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+vfp2 | \
+; RUN: grep fabs | wc -l | grep 2
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+vfp2 | \
+; RUN: grep fmscs | wc -l | grep 1
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+vfp2 | \
+; RUN: grep fcvt | wc -l | grep 2
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+vfp2 | \
+; RUN: grep fuito | wc -l | grep 2
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+vfp2 | \
+; RUN: grep fto.i | wc -l | grep 4
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+vfp2 | \
+; RUN: grep bmi | wc -l | grep 1
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+vfp2 | \
+; RUN: grep bgt | wc -l | grep 1
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+vfp2 | \
+; RUN: grep fcmpezs | wc -l | grep 1
+
+void %test(float *%P, double* %D) {
+ %A = load float* %P
+ %B = load double* %D
+ store float %A, float* %P
+ store double %B, double* %D
+ ret void
+}
+
+declare float %fabsf(float)
+declare double %fabs(double)
+
+void %test_abs(float *%P, double* %D) {
+ %a = load float* %P
+ %b = call float %fabsf(float %a)
+ store float %b, float* %P
+
+ %A = load double* %D
+ %B = call double %fabs(double %A)
+ store double %B, double* %D
+ ret void
+}
+
+void %test_add(float *%P, double* %D) {
+ %a = load float* %P
+ %b = add float %a, %a
+ store float %b, float* %P
+
+ %A = load double* %D
+ %B = add double %A, %A
+ store double %B, double* %D
+ ret void
+}
+
+void %test_ext_round(float *%P, double* %D) {
+ %a = load float* %P
+ %b = cast float %a to double
+
+ %A = load double* %D
+ %B = cast double %A to float
+
+ store double %b, double* %D
+ store float %B, float* %P
+ ret void
+}
+
+void %test_fma(float *%P1, float* %P2, float *%P3) {
+ %a1 = load float* %P1
+ %a2 = load float* %P2
+ %a3 = load float* %P3
+
+ %X = mul float %a1, %a2
+ %Y = sub float %X, %a3
+
+ store float %Y, float* %P1
+ ret void
+}
+
+int %test_ftoi(float *%P1) {
+ %a1 = load float* %P1
+ %b1 = cast float %a1 to int
+ ret int %b1
+}
+
+uint %test_ftou(float *%P1) {
+ %a1 = load float* %P1
+ %b1 = cast float %a1 to uint
+ ret uint %b1
+}
+
+int %test_dtoi(double *%P1) {
+ %a1 = load double* %P1
+ %b1 = cast double %a1 to int
+ ret int %b1
+}
+
+uint %test_dtou(double *%P1) {
+ %a1 = load double* %P1
+ %b1 = cast double %a1 to uint
+ ret uint %b1
+}
+
+void %test_utod(double *%P1, uint %X) {
+ %b1 = cast uint %X to double
+ store double %b1, double* %P1
+ ret void
+}
+
+void %test_utod2(double *%P1, ubyte %X) {
+ %b1 = cast ubyte %X to double
+ store double %b1, double* %P1
+ ret void
+}
+
+void %test_cmp(float* %glob, int %X) {
+entry:
+ %tmp = load float* %glob ; <float> [#uses=2]
+ %tmp3 = getelementptr float* %glob, int 2 ; <float*> [#uses=1]
+ %tmp4 = load float* %tmp3 ; <float> [#uses=2]
+ %tmp = seteq float %tmp, %tmp4 ; <bool> [#uses=1]
+ %tmp5 = tail call bool %llvm.isunordered.f32( float %tmp, float %tmp4 ) ; <bool> [#uses=1]
+ %tmp6 = or bool %tmp, %tmp5 ; <bool> [#uses=1]
+ br bool %tmp6, label %cond_true, label %cond_false
+
+cond_true: ; preds = %entry
+ %tmp = tail call int (...)* %bar( ) ; <int> [#uses=0]
+ ret void
+
+cond_false: ; preds = %entry
+ %tmp7 = tail call int (...)* %baz( ) ; <int> [#uses=0]
+ ret void
+}
+
+declare bool %llvm.isunordered.f32(float, float)
+
+declare int %bar(...)
+
+declare int %baz(...)
+
+void %test_cmpfp0(float* %glob, int %X) {
+entry:
+ %tmp = load float* %glob ; <float> [#uses=1]
+ %tmp = setgt float %tmp, 0.000000e+00 ; <bool> [#uses=1]
+ br bool %tmp, label %cond_true, label %cond_false
+
+cond_true: ; preds = %entry
+ %tmp = tail call int (...)* %bar( ) ; <int> [#uses=0]
+ ret void
+
+cond_false: ; preds = %entry
+ %tmp1 = tail call int (...)* %baz( ) ; <int> [#uses=0]
+ ret void
+}
+
diff --git a/test/CodeGen/ARM/weak.ll b/test/CodeGen/ARM/weak.ll
new file mode 100644
index 0000000..f1294d8
--- /dev/null
+++ b/test/CodeGen/ARM/weak.ll
@@ -0,0 +1,17 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep .weak.*f
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep .weak.*h
+
+implementation ; Functions:
+
+weak uint %f() {
+entry:
+ unreachable
+}
+
+void %g() {
+entry:
+ tail call void %h( )
+ ret void
+}
+
+declare extern_weak void %h()
diff --git a/test/CodeGen/ARM/weak2.ll b/test/CodeGen/ARM/weak2.ll
new file mode 100644
index 0000000..a57a767
--- /dev/null
+++ b/test/CodeGen/ARM/weak2.ll
@@ -0,0 +1,18 @@
+; RUN: llvm-as < %s | llc -march=arm | grep .weak
+
+define i32 @f(i32 %a) {
+entry:
+ %tmp2 = icmp eq i32 %a, 0 ; <i1> [#uses=1]
+ %t.0 = select i1 %tmp2, i32 (...)* null, i32 (...)* @test_weak ; <i32 (...)*> [#uses=2]
+ %tmp5 = icmp eq i32 (...)* %t.0, null ; <i1> [#uses=1]
+ br i1 %tmp5, label %UnifiedReturnBlock, label %cond_true8
+
+cond_true8: ; preds = %entry
+ %tmp10 = tail call i32 (...)* %t.0( ) ; <i32> [#uses=1]
+ ret i32 %tmp10
+
+UnifiedReturnBlock: ; preds = %entry
+ ret i32 250
+}
+
+declare extern_weak i32 @test_weak(...)