diff options
Diffstat (limited to 'test/CodeGen/SystemZ/Large')
-rw-r--r-- | test/CodeGen/SystemZ/Large/branch-range-07.py | 68 | ||||
-rw-r--r-- | test/CodeGen/SystemZ/Large/branch-range-08.py | 69 | ||||
-rw-r--r-- | test/CodeGen/SystemZ/Large/spill-01.py | 40 | ||||
-rw-r--r-- | test/CodeGen/SystemZ/Large/spill-02.py | 73 |
4 files changed, 250 insertions, 0 deletions
diff --git a/test/CodeGen/SystemZ/Large/branch-range-07.py b/test/CodeGen/SystemZ/Large/branch-range-07.py new file mode 100644 index 0000000..90c4420 --- /dev/null +++ b/test/CodeGen/SystemZ/Large/branch-range-07.py @@ -0,0 +1,68 @@ +# Test 32-bit BRANCH RELATIVE ON COUNT in cases where some branches are out +# of range. +# RUN: python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s + +# Construct: +# +# loopN: +# load of countN +# ... +# loop0: +# 0xffd8 bytes, from MVIY instructions +# conditional branch to main +# after0: +# ... +# decrement of countN +# conditional branch to loopN +# afterN: +# +# Each load occupies 4 bytes. Each decrement and branch occupies 4 +# bytes if BRCT can be used, otherwise it occupies 10 bytes (AHI + BRCL). +# This means that loop 6 contains 5 * 4 + 0xffd8 + 5 * 4 == 0x10000 bytes +# and is therefore (just) in range. Loop 7 is out of range. +# +# CHECK: brct {{%r[0-9]+}} +# CHECK: brct {{%r[0-9]+}} +# CHECK: brct {{%r[0-9]+}} +# CHECK: brct {{%r[0-9]+}} +# CHECK: brct {{%r[0-9]+}} +# CHECK: brct {{%r[0-9]+}} +# CHECK: ahi {{%r[0-9]+}}, -1 +# CHECK: jglh +# CHECK: ahi {{%r[0-9]+}}, -1 +# CHECK: jglh + +branch_blocks = 8 +main_size = 0xffd8 + +print 'define void @f1(i8 *%base, i32 *%counts) {' +print 'entry:' + +for i in xrange(branch_blocks - 1, -1, -1): + print ' %%countptr%d = getelementptr i32 *%%counts, i64 %d' % (i, i) + print ' %%initcount%d = load i32 *%%countptr%d' % (i, i) + print ' br label %%loop%d' % i + + print 'loop%d:' % i + block1 = 'entry' if i == branch_blocks - 1 else 'loop%d' % (i + 1) + block2 = 'loop0' if i == 0 else 'after%d' % (i - 1) + print (' %%count%d = phi i32 [ %%initcount%d, %%%s ],' + ' [ %%nextcount%d, %%%s ]' % (i, i, block1, i, block2)) + +a, b = 1, 1 +for i in xrange(0, main_size, 6): + a, b = b, a + b + offset = 4096 + b % 500000 + value = a % 256 + print ' %%ptr%d = getelementptr i8 *%%base, i64 %d' % (i, offset) + print ' store volatile i8 %d, i8 *%%ptr%d' % (value, i) + +for i in xrange(branch_blocks): + print ' %%nextcount%d = add i32 %%count%d, -1' % (i, i) + print ' %%test%d = icmp ne i32 %%nextcount%d, 0' % (i, i) + print ' br i1 %%test%d, label %%loop%d, label %%after%d' % (i, i, i) + print '' + print 'after%d:' % i + +print ' ret void' +print '}' diff --git a/test/CodeGen/SystemZ/Large/branch-range-08.py b/test/CodeGen/SystemZ/Large/branch-range-08.py new file mode 100644 index 0000000..ac1b137 --- /dev/null +++ b/test/CodeGen/SystemZ/Large/branch-range-08.py @@ -0,0 +1,69 @@ +# Test 64-bit BRANCH RELATIVE ON COUNT in cases where some branches are out +# of range. +# RUN: python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s + +# Construct: +# +# loopN: +# load of countN +# ... +# loop0: +# 0xffd8 bytes, from MVIY instructions +# conditional branch to main +# after0: +# ... +# decrement of countN +# conditional branch to loopN +# afterN: +# +# Each load occupies 6 bytes. Each decrement and branch occupies 4 +# bytes if BRCTG can be used, otherwise it occupies 10 bytes (AGHI + BRCL). +# This means that loop 5 contains 4 * 6 + 0xffd8 + 4 * 4 == 0x10000 bytes +# and is therefore (just) in range. Loop 6 is out of range. +# +# CHECK: brctg {{%r[0-9]+}} +# CHECK: brctg {{%r[0-9]+}} +# CHECK: brctg {{%r[0-9]+}} +# CHECK: brctg {{%r[0-9]+}} +# CHECK: brctg {{%r[0-9]+}} +# CHECK: aghi {{%r[0-9]+}}, -1 +# CHECK: jglh +# CHECK: aghi {{%r[0-9]+}}, -1 +# CHECK: jglh +# CHECK: aghi {{%r[0-9]+}}, -1 +# CHECK: jglh + +branch_blocks = 8 +main_size = 0xffd8 + +print 'define void @f1(i8 *%base, i64 *%counts) {' +print 'entry:' + +for i in xrange(branch_blocks - 1, -1, -1): + print ' %%countptr%d = getelementptr i64 *%%counts, i64 %d' % (i, i) + print ' %%initcount%d = load i64 *%%countptr%d' % (i, i) + print ' br label %%loop%d' % i + + print 'loop%d:' % i + block1 = 'entry' if i == branch_blocks - 1 else 'loop%d' % (i + 1) + block2 = 'loop0' if i == 0 else 'after%d' % (i - 1) + print (' %%count%d = phi i64 [ %%initcount%d, %%%s ],' + ' [ %%nextcount%d, %%%s ]' % (i, i, block1, i, block2)) + +a, b = 1, 1 +for i in xrange(0, main_size, 6): + a, b = b, a + b + offset = 4096 + b % 500000 + value = a % 256 + print ' %%ptr%d = getelementptr i8 *%%base, i64 %d' % (i, offset) + print ' store volatile i8 %d, i8 *%%ptr%d' % (value, i) + +for i in xrange(branch_blocks): + print ' %%nextcount%d = add i64 %%count%d, -1' % (i, i) + print ' %%test%d = icmp ne i64 %%nextcount%d, 0' % (i, i) + print ' br i1 %%test%d, label %%loop%d, label %%after%d' % (i, i, i) + print '' + print 'after%d:' % i + +print ' ret void' +print '}' diff --git a/test/CodeGen/SystemZ/Large/spill-01.py b/test/CodeGen/SystemZ/Large/spill-01.py new file mode 100644 index 0000000..3c1d0b6 --- /dev/null +++ b/test/CodeGen/SystemZ/Large/spill-01.py @@ -0,0 +1,40 @@ +# Test cases where MVC is used for spill slots that end up being out of range. +# RUN: python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s + +# There are 8 usable call-saved GPRs, two of which are needed for the base +# registers. The first 160 bytes of the frame are needed for the ABI +# call frame, and a further 8 bytes are needed for the emergency spill slot. +# That means we will have at least one out-of-range slot if: +# +# count == (4096 - 168) / 8 + 6 + 1 == 498 +# +# Add in some extra room and check both %r15+4096 (the first out-of-range slot) +# and %r15+4104. +# +# CHECK: f1: +# CHECK: lay [[REG:%r[0-5]]], 4096(%r15) +# CHECK: mvc 0(8,[[REG]]), {{[0-9]+}}({{%r[0-9]+}}) +# CHECK: brasl %r14, foo@PLT +# CHECK: lay [[REG:%r[0-5]]], 4096(%r15) +# CHECK: mvc {{[0-9]+}}(8,{{%r[0-9]+}}), 8([[REG]]) +# CHECK: br %r14 +count = 500 + +print 'declare void @foo()' +print '' +print 'define void @f1(i64 *%base0, i64 *%base1) {' + +for i in range(count): + print ' %%ptr%d = getelementptr i64 *%%base%d, i64 %d' % (i, i % 2, i / 2) + print ' %%val%d = load i64 *%%ptr%d' % (i, i) + print '' + +print ' call void @foo()' +print '' + +for i in range(count): + print ' store i64 %%val%d, i64 *%%ptr%d' % (i, i) + +print '' +print ' ret void' +print '}' diff --git a/test/CodeGen/SystemZ/Large/spill-02.py b/test/CodeGen/SystemZ/Large/spill-02.py new file mode 100644 index 0000000..0aa43d1 --- /dev/null +++ b/test/CodeGen/SystemZ/Large/spill-02.py @@ -0,0 +1,73 @@ +# Test cases where we spill from one frame index to another, both of which +# are out of range of MVC, and both of which need emergency spill slots. +# RUN: python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s + +# CHECK: f1: +# CHECK: %fallthru +# CHECK-DAG: stg [[REG1:%r[0-9]+]], 8168(%r15) +# CHECK-DAG: stg [[REG2:%r[0-9]+]], 8176(%r15) +# CHECK-DAG: lay [[REG3:%r[0-9]+]], 8192(%r15) +# CHECK-DAG: lay [[REG4:%r[0-9]+]], 4096(%r15) +# CHECK: mvc 0(8,[[REG3]]), 4088([[REG4]]) +# CHECK-DAG: lg [[REG1]], 8168(%r15) +# CHECK-DAG: lg [[REG2]], 8176(%r15) +# CHECK: %skip +# CHECK: br %r14 + +# Arrange for %foo's spill slot to be at 8184(%r15) and the alloca area to be at +# 8192(%r15). The two emergency spill slots live below that, so this requires +# the first 8168 bytes to be used for the call. 160 of these bytes are +# allocated for the ABI frame. There are also 5 argument registers, one of +# which is used as a base pointer. +args = (8168 - 160) / 8 + (5 - 1) + +print 'declare i64 *@foo(i64 *%s)' % (', i64' * args) +print 'declare void @bar(i64 *)' +print '' +print 'define i64 @f1(i64 %foo) {' +print 'entry:' + +# Make the allocation big, so that it goes at the top of the frame. +print ' %array = alloca [1000 x i64]' +print ' %area = getelementptr [1000 x i64] *%array, i64 0, i64 0' +print ' %%base = call i64 *@foo(i64 *%%area%s)' % (', i64 0' * args) +print '' + +# Make sure all GPRs are used. One is needed for the stack pointer and +# another for %base, so we need 14 live values. +count = 14 +for i in range(count): + print ' %%ptr%d = getelementptr i64 *%%base, i64 %d' % (i, i / 2) + print ' %%val%d = load volatile i64 *%%ptr%d' % (i, i) + print '' + +# Encourage the register allocator to give preference to these %vals +# by using them several times. +for j in range(4): + for i in range(count): + print ' store volatile i64 %%val%d, i64 *%%ptr%d' % (i, i) + print '' + +# Copy the incoming argument, which we expect to be spilled, to the frame +# index for the alloca area. Also throw in a volatile store, so that this +# block cannot be reordered with the surrounding code. +print ' %cond = icmp eq i64 %val0, %val1' +print ' br i1 %cond, label %skip, label %fallthru' +print '' +print 'fallthru:' +print ' store i64 %foo, i64 *%area' +print ' store volatile i64 %val0, i64 *%ptr0' +print ' br label %skip' +print '' +print 'skip:' + +# Use each %val a few more times to emphasise the point, and to make sure +# that they are live across the store of %foo. +for j in range(4): + for i in range(count): + print ' store volatile i64 %%val%d, i64 *%%ptr%d' % (i, i) + print '' + +print ' call void @bar(i64 *%area)' +print ' ret i64 0' +print '}' |