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-rw-r--r--test/CodeGen/Thumb2/2010-06-14-NEONCoalescer.ll4
-rw-r--r--test/CodeGen/Thumb2/lsr-deficiency.ll8
-rw-r--r--test/CodeGen/Thumb2/machine-licm.ll13
-rw-r--r--test/CodeGen/Thumb2/thumb2-add.ll49
-rw-r--r--test/CodeGen/Thumb2/thumb2-bcc.ll7
-rw-r--r--test/CodeGen/Thumb2/thumb2-branch.ll13
-rw-r--r--test/CodeGen/Thumb2/thumb2-clz.ll2
-rw-r--r--test/CodeGen/Thumb2/thumb2-ifcvt1.ll4
-rw-r--r--test/CodeGen/Thumb2/thumb2-rev.ll2
-rw-r--r--test/CodeGen/Thumb2/thumb2-teq.ll38
-rw-r--r--test/CodeGen/Thumb2/thumb2-teq2.ll16
-rw-r--r--test/CodeGen/Thumb2/thumb2-tst.ll45
-rw-r--r--test/CodeGen/Thumb2/thumb2-tst2.ll16
13 files changed, 78 insertions, 139 deletions
diff --git a/test/CodeGen/Thumb2/2010-06-14-NEONCoalescer.ll b/test/CodeGen/Thumb2/2010-06-14-NEONCoalescer.ll
index 9ed6a01..01fb0a5 100644
--- a/test/CodeGen/Thumb2/2010-06-14-NEONCoalescer.ll
+++ b/test/CodeGen/Thumb2/2010-06-14-NEONCoalescer.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -O3 -relocation-model=pic -mattr=+thumb2 -mcpu=cortex-a8 | FileCheck %s
+; RUN: llc < %s -O3 -relocation-model=pic -mattr=+thumb2 -mcpu=cortex-a8 -disable-branch-fold | FileCheck %s
target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32"
target triple = "thumbv7-apple-darwin10"
@@ -26,7 +26,7 @@ entry:
; CHECK: vldr.64 [[LDR:d.*]],
; CHECK: LPC0_0:
; CHECK: vadd.f64 [[ADD:d.*]], [[LDR]], [[LDR]]
-; CHECK: vmov.f64 [[LDR]]
+; CHECK-NOT: vmov.f64 [[ADD]]
%5 = fadd <2 x double> %3, %3 ; <<2 x double>> [#uses=2]
%6 = fadd <2 x double> %4, %4 ; <<2 x double>> [#uses=2]
%tmp7 = extractelement <2 x double> %5, i32 0 ; <double> [#uses=1]
diff --git a/test/CodeGen/Thumb2/lsr-deficiency.ll b/test/CodeGen/Thumb2/lsr-deficiency.ll
index ad957a1..9ff114e 100644
--- a/test/CodeGen/Thumb2/lsr-deficiency.ll
+++ b/test/CodeGen/Thumb2/lsr-deficiency.ll
@@ -13,16 +13,16 @@
define void @t() nounwind optsize {
; CHECK: t:
-; CHECK: mov.w r2, #1000
+; CHECK: mov{{.*}}, #1000
entry:
%.pre = load i32* @G, align 4 ; <i32> [#uses=1]
br label %bb
bb: ; preds = %bb, %entry
; CHECK: LBB0_1:
-; CHECK: cmp r2, #0
-; CHECK: sub{{(.w)?}} [[REGISTER:(r[0-9]+)|(lr)]], r2, #1
-; CHECK: mov r2, [[REGISTER]]
+; CHECK: cmp [[R2:r[0-9]+]], #0
+; CHECK: sub{{(.w)?}} [[REGISTER:(r[0-9]+)|(lr)]], [[R2]], #1
+; CHECK: mov [[R2]], [[REGISTER]]
%0 = phi i32 [ %.pre, %entry ], [ %3, %bb ] ; <i32> [#uses=1]
%indvar = phi i32 [ 0, %entry ], [ %indvar.next, %bb ] ; <i32> [#uses=2]
diff --git a/test/CodeGen/Thumb2/machine-licm.ll b/test/CodeGen/Thumb2/machine-licm.ll
index ee054a1..b199d69 100644
--- a/test/CodeGen/Thumb2/machine-licm.ll
+++ b/test/CodeGen/Thumb2/machine-licm.ll
@@ -8,26 +8,25 @@
define void @t1(i32* nocapture %vals, i32 %c) nounwind {
entry:
; CHECK: t1:
-; CHECK: cbz
+; CHECK: bxeq lr
+
%0 = icmp eq i32 %c, 0 ; <i1> [#uses=1]
br i1 %0, label %return, label %bb.nph
bb.nph: ; preds = %entry
-; CHECK: BB#1
; CHECK: movw r[[R2:[0-9]+]], :lower16:L_GV$non_lazy_ptr
; CHECK: movt r[[R2]], :upper16:L_GV$non_lazy_ptr
; CHECK: ldr{{(.w)?}} r[[R2b:[0-9]+]], [r[[R2]]
; CHECK: ldr{{.*}}, [r[[R2b]]
-; CHECK: LBB0_2
+; CHECK: LBB0_
; CHECK-NOT: LCPI0_0:
-; PIC: BB#1
; PIC: movw r[[R2:[0-9]+]], :lower16:(L_GV$non_lazy_ptr-(LPC0_0+4))
; PIC: movt r[[R2]], :upper16:(L_GV$non_lazy_ptr-(LPC0_0+4))
; PIC: add r[[R2]], pc
; PIC: ldr{{(.w)?}} r[[R2b:[0-9]+]], [r[[R2]]
; PIC: ldr{{.*}}, [r[[R2b]]
-; PIC: LBB0_2
+; PIC: LBB0_
; PIC-NOT: LCPI0_0:
; PIC: .section
%.pre = load i32* @GV, align 4 ; <i32> [#uses=1]
@@ -52,8 +51,8 @@ return: ; preds = %bb, %entry
define void @t2(i8* %ptr1, i8* %ptr2) nounwind {
entry:
; CHECK: t2:
-; CHECK: mov.w r3, #1065353216
-; CHECK: vdup.32 q{{.*}}, r3
+; CHECK: mov.w [[R3:r[0-9]+]], #1065353216
+; CHECK: vdup.32 q{{.*}}, [[R3]]
br i1 undef, label %bb1, label %bb2
bb1:
diff --git a/test/CodeGen/Thumb2/thumb2-add.ll b/test/CodeGen/Thumb2/thumb2-add.ll
index 5e25cf6..66fca13 100644
--- a/test/CodeGen/Thumb2/thumb2-add.ll
+++ b/test/CodeGen/Thumb2/thumb2-add.ll
@@ -1,48 +1,81 @@
-; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep add | grep #255
-; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep add | grep #256
-; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep add | grep #257
-; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep add | grep #4094
-; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep add | grep #4095
-; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep add | grep #4096
-; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep add
-; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep add | grep lsl | grep #8
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
define i32 @t2ADDrc_255(i32 %lhs) {
+; CHECK: t2ADDrc_255:
+; CHECK-NOT: bx lr
+; CHECK: add{{.*}} #255
+; CHECK: bx lr
+
%Rd = add i32 %lhs, 255
ret i32 %Rd
}
define i32 @t2ADDrc_256(i32 %lhs) {
+; CHECK: t2ADDrc_256:
+; CHECK-NOT: bx lr
+; CHECK: add{{.*}} #256
+; CHECK: bx lr
+
%Rd = add i32 %lhs, 256
ret i32 %Rd
}
define i32 @t2ADDrc_257(i32 %lhs) {
+; CHECK: t2ADDrc_257:
+; CHECK-NOT: bx lr
+; CHECK: add{{.*}} #257
+; CHECK: bx lr
+
%Rd = add i32 %lhs, 257
ret i32 %Rd
}
define i32 @t2ADDrc_4094(i32 %lhs) {
+; CHECK: t2ADDrc_4094:
+; CHECK-NOT: bx lr
+; CHECK: add{{.*}} #4094
+; CHECK: bx lr
+
%Rd = add i32 %lhs, 4094
ret i32 %Rd
}
define i32 @t2ADDrc_4095(i32 %lhs) {
+; CHECK: t2ADDrc_4095:
+; CHECK-NOT: bx lr
+; CHECK: add{{.*}} #4095
+; CHECK: bx lr
+
%Rd = add i32 %lhs, 4095
ret i32 %Rd
}
define i32 @t2ADDrc_4096(i32 %lhs) {
+; CHECK: t2ADDrc_4096:
+; CHECK-NOT: bx lr
+; CHECK: add{{.*}} #4096
+; CHECK: bx lr
+
%Rd = add i32 %lhs, 4096
ret i32 %Rd
}
define i32 @t2ADDrr(i32 %lhs, i32 %rhs) {
+; CHECK: t2ADDrr:
+; CHECK-NOT: bx lr
+; CHECK: add
+; CHECK: bx lr
+
%Rd = add i32 %lhs, %rhs
ret i32 %Rd
}
define i32 @t2ADDrs(i32 %lhs, i32 %rhs) {
+; CHECK: t2ADDrs:
+; CHECK-NOT: bx lr
+; CHECK: add{{.*}} lsl #8
+; CHECK: bx lr
+
%tmp = shl i32 %rhs, 8
%Rd = add i32 %lhs, %tmp
ret i32 %Rd
diff --git a/test/CodeGen/Thumb2/thumb2-bcc.ll b/test/CodeGen/Thumb2/thumb2-bcc.ll
index aae9f5c..70febc0 100644
--- a/test/CodeGen/Thumb2/thumb2-bcc.ll
+++ b/test/CodeGen/Thumb2/thumb2-bcc.ll
@@ -1,5 +1,8 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mattr=+thumb2 | not grep it
+; If-conversion defeats the purpose of this test, which is to check CBZ
+; generation, so use memory barrier instruction to make sure it doesn't
+; happen and we get actual branches.
define i32 @t1(i32 %a, i32 %b, i32 %c) {
; CHECK: t1:
@@ -8,12 +11,16 @@ define i32 @t1(i32 %a, i32 %b, i32 %c) {
br i1 %tmp2, label %cond_false, label %cond_true
cond_true:
+ call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 false)
%tmp5 = add i32 %b, 1
%tmp6 = and i32 %tmp5, %c
ret i32 %tmp6
cond_false:
+ call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 false)
%tmp7 = add i32 %b, -1
%tmp8 = xor i32 %tmp7, %c
ret i32 %tmp8
}
+
+declare void @llvm.memory.barrier(i1, i1, i1, i1, i1) nounwind
diff --git a/test/CodeGen/Thumb2/thumb2-branch.ll b/test/CodeGen/Thumb2/thumb2-branch.ll
index 1d2af7a..4d9eda0 100644
--- a/test/CodeGen/Thumb2/thumb2-branch.ll
+++ b/test/CodeGen/Thumb2/thumb2-branch.ll
@@ -1,4 +1,7 @@
; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mattr=+thumb2 | FileCheck %s
+; If-conversion defeats the purpose of this test, which is to check conditional
+; branch generation, so use memory barrier instruction to make sure it doesn't
+; happen and we get actual branches.
define i32 @f1(i32 %a, i32 %b, i32* %v) {
entry:
@@ -8,10 +11,12 @@ entry:
br i1 %tmp, label %cond_true, label %return
cond_true: ; preds = %entry
+ call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 false)
store i32 0, i32* %v
ret i32 0
return: ; preds = %entry
+ call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 false)
ret i32 1
}
@@ -23,10 +28,12 @@ entry:
br i1 %tmp, label %cond_true, label %return
cond_true: ; preds = %entry
+ call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 false)
store i32 0, i32* %v
ret i32 0
return: ; preds = %entry
+ call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 false)
ret i32 1
}
@@ -38,10 +45,12 @@ entry:
br i1 %tmp, label %cond_true, label %return
cond_true: ; preds = %entry
+ call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 false)
store i32 0, i32* %v
ret i32 0
return: ; preds = %entry
+ call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 false)
ret i32 1
}
@@ -53,9 +62,13 @@ entry:
br i1 %tmp, label %return, label %cond_true
cond_true: ; preds = %entry
+ call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 false)
store i32 0, i32* %v
ret i32 0
return: ; preds = %entry
+ call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 false)
ret i32 1
}
+
+declare void @llvm.memory.barrier(i1, i1, i1, i1, i1) nounwind
diff --git a/test/CodeGen/Thumb2/thumb2-clz.ll b/test/CodeGen/Thumb2/thumb2-clz.ll
index 74728bf..00a54a0 100644
--- a/test/CodeGen/Thumb2/thumb2-clz.ll
+++ b/test/CodeGen/Thumb2/thumb2-clz.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=thumb -mattr=+thumb2,+v7a | FileCheck %s
+; RUN: llc < %s -march=thumb -mattr=+thumb2,+v7 | FileCheck %s
define i32 @f1(i32 %a) {
; CHECK: f1:
diff --git a/test/CodeGen/Thumb2/thumb2-ifcvt1.ll b/test/CodeGen/Thumb2/thumb2-ifcvt1.ll
index 1533040..a4035bb 100644
--- a/test/CodeGen/Thumb2/thumb2-ifcvt1.ll
+++ b/test/CodeGen/Thumb2/thumb2-ifcvt1.ll
@@ -2,8 +2,10 @@
define i32 @t1(i32 %a, i32 %b, i32 %c, i32 %d) nounwind {
; CHECK: t1:
-; CHECK: it ne
+; CHECK: ittt ne
; CHECK: cmpne
+; CHECK: addne
+; CHECK: bxne lr
switch i32 %c, label %cond_next [
i32 1, label %cond_true
i32 7, label %cond_true
diff --git a/test/CodeGen/Thumb2/thumb2-rev.ll b/test/CodeGen/Thumb2/thumb2-rev.ll
index 2cee2e3..b469bbd 100644
--- a/test/CodeGen/Thumb2/thumb2-rev.ll
+++ b/test/CodeGen/Thumb2/thumb2-rev.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=thumb -mattr=+thumb2,+v7a,+t2xtpk | FileCheck %s
+; RUN: llc < %s -march=thumb -mattr=+thumb2,+v7,+t2xtpk | FileCheck %s
define i32 @f1(i32 %a) {
; CHECK: f1:
diff --git a/test/CodeGen/Thumb2/thumb2-teq.ll b/test/CodeGen/Thumb2/thumb2-teq.ll
index 566408a..00c928f 100644
--- a/test/CodeGen/Thumb2/thumb2-teq.ll
+++ b/test/CodeGen/Thumb2/thumb2-teq.ll
@@ -4,15 +4,6 @@
; test as 'mov.w r0, #0'. So far, that requires physreg joining.
; 0x000000bb = 187
-define i1 @f1(i32 %a) {
- %tmp = xor i32 %a, 187
- %tmp1 = icmp ne i32 %tmp, 0
- ret i1 %tmp1
-}
-; CHECK: f1:
-; CHECK: teq.w r0, #187
-
-; 0x000000bb = 187
define i1 @f2(i32 %a) {
%tmp = xor i32 %a, 187
%tmp1 = icmp eq i32 0, %tmp
@@ -30,24 +21,6 @@ define i1 @f3(i32 %a) {
; CHECK: f3:
; CHECK: teq.w r0, #11141290
-; 0x00aa00aa = 11141290
-define i1 @f4(i32 %a) {
- %tmp = xor i32 %a, 11141290
- %tmp1 = icmp ne i32 0, %tmp
- ret i1 %tmp1
-}
-; CHECK: f4:
-; CHECK: teq.w r0, #11141290
-
-; 0xcc00cc00 = 3422604288
-define i1 @f5(i32 %a) {
- %tmp = xor i32 %a, 3422604288
- %tmp1 = icmp ne i32 %tmp, 0
- ret i1 %tmp1
-}
-; CHECK: f5:
-; CHECK: teq.w r0, #-872363008
-
; 0xcc00cc00 = 3422604288
define i1 @f6(i32 %a) {
%tmp = xor i32 %a, 3422604288
@@ -72,17 +45,6 @@ define i1 @f8(i32 %a) {
%tmp1 = icmp ne i32 0, %tmp
ret i1 %tmp1
}
-; CHECK: f8:
-; CHECK: teq.w r0, #-572662307
-
-; 0x00110000 = 1114112
-define i1 @f9(i32 %a) {
- %tmp = xor i32 %a, 1114112
- %tmp1 = icmp ne i32 %tmp, 0
- ret i1 %tmp1
-}
-; CHECK: f9:
-; CHECK: teq.w r0, #1114112
; 0x00110000 = 1114112
define i1 @f10(i32 %a) {
diff --git a/test/CodeGen/Thumb2/thumb2-teq2.ll b/test/CodeGen/Thumb2/thumb2-teq2.ll
index cdd3489..8acae90 100644
--- a/test/CodeGen/Thumb2/thumb2-teq2.ll
+++ b/test/CodeGen/Thumb2/thumb2-teq2.ll
@@ -3,14 +3,6 @@
; These tests implicitly depend on 'movs r0, #0' being rematerialized below the
; tst as 'mov.w r0, #0'. So far, that requires physreg joining.
-define i1 @f1(i32 %a, i32 %b) {
-; CHECK: f1
-; CHECK: teq.w r0, r1
- %tmp = xor i32 %a, %b
- %tmp1 = icmp ne i32 %tmp, 0
- ret i1 %tmp1
-}
-
define i1 @f2(i32 %a, i32 %b) {
; CHECK: f2
; CHECK: teq.w r0, r1
@@ -19,14 +11,6 @@ define i1 @f2(i32 %a, i32 %b) {
ret i1 %tmp1
}
-define i1 @f3(i32 %a, i32 %b) {
-; CHECK: f3
-; CHECK: teq.w r0, r1
- %tmp = xor i32 %a, %b
- %tmp1 = icmp ne i32 0, %tmp
- ret i1 %tmp1
-}
-
define i1 @f4(i32 %a, i32 %b) {
; CHECK: f4
; CHECK: teq.w r0, r1
diff --git a/test/CodeGen/Thumb2/thumb2-tst.ll b/test/CodeGen/Thumb2/thumb2-tst.ll
index 47f553f..43e208c 100644
--- a/test/CodeGen/Thumb2/thumb2-tst.ll
+++ b/test/CodeGen/Thumb2/thumb2-tst.ll
@@ -4,15 +4,6 @@
; tst as 'mov.w r0, #0'. So far, that requires physreg joining.
; 0x000000bb = 187
-define i1 @f1(i32 %a) {
- %tmp = and i32 %a, 187
- %tmp1 = icmp ne i32 %tmp, 0
- ret i1 %tmp1
-}
-; CHECK: f1:
-; CHECK: tst.w r0, #187
-
-; 0x000000bb = 187
define i1 @f2(i32 %a) {
%tmp = and i32 %a, 187
%tmp1 = icmp eq i32 0, %tmp
@@ -30,24 +21,6 @@ define i1 @f3(i32 %a) {
; CHECK: f3:
; CHECK: tst.w r0, #11141290
-; 0x00aa00aa = 11141290
-define i1 @f4(i32 %a) {
- %tmp = and i32 %a, 11141290
- %tmp1 = icmp ne i32 0, %tmp
- ret i1 %tmp1
-}
-; CHECK: f4:
-; CHECK: tst.w r0, #11141290
-
-; 0xcc00cc00 = 3422604288
-define i1 @f5(i32 %a) {
- %tmp = and i32 %a, 3422604288
- %tmp1 = icmp ne i32 %tmp, 0
- ret i1 %tmp1
-}
-; CHECK: f5:
-; CHECK: tst.w r0, #-872363008
-
; 0xcc00cc00 = 3422604288
define i1 @f6(i32 %a) {
%tmp = and i32 %a, 3422604288
@@ -66,24 +39,6 @@ define i1 @f7(i32 %a) {
; CHECK: f7:
; CHECK: tst.w r0, #-572662307
-; 0xdddddddd = 3722304989
-define i1 @f8(i32 %a) {
- %tmp = and i32 %a, 3722304989
- %tmp1 = icmp ne i32 0, %tmp
- ret i1 %tmp1
-}
-; CHECK: f8:
-; CHECK: tst.w r0, #-572662307
-
-; 0x00110000 = 1114112
-define i1 @f9(i32 %a) {
- %tmp = and i32 %a, 1114112
- %tmp1 = icmp ne i32 %tmp, 0
- ret i1 %tmp1
-}
-; CHECK: f9:
-; CHECK: tst.w r0, #1114112
-
; 0x00110000 = 1114112
define i1 @f10(i32 %a) {
%tmp = and i32 %a, 1114112
diff --git a/test/CodeGen/Thumb2/thumb2-tst2.ll b/test/CodeGen/Thumb2/thumb2-tst2.ll
index 405b3bb..bfe016f 100644
--- a/test/CodeGen/Thumb2/thumb2-tst2.ll
+++ b/test/CodeGen/Thumb2/thumb2-tst2.ll
@@ -3,14 +3,6 @@
; These tests implicitly depend on 'movs r0, #0' being rematerialized below the
; tst as 'mov.w r0, #0'. So far, that requires physreg joining.
-define i1 @f1(i32 %a, i32 %b) {
-; CHECK: f1:
-; CHECK: tst r0, r1
- %tmp = and i32 %a, %b
- %tmp1 = icmp ne i32 %tmp, 0
- ret i1 %tmp1
-}
-
define i1 @f2(i32 %a, i32 %b) {
; CHECK: f2:
; CHECK: tst r0, r1
@@ -19,14 +11,6 @@ define i1 @f2(i32 %a, i32 %b) {
ret i1 %tmp1
}
-define i1 @f3(i32 %a, i32 %b) {
-; CHECK: f3:
-; CHECK: tst r0, r1
- %tmp = and i32 %a, %b
- %tmp1 = icmp ne i32 0, %tmp
- ret i1 %tmp1
-}
-
define i1 @f4(i32 %a, i32 %b) {
; CHECK: f4:
; CHECK: tst r0, r1
generated by cgit v1.1 at 2025-08-16 07:56:16 +0000