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-rw-r--r--test/CodeGen/Thumb/2007-03-06-AddR7.ll117
-rw-r--r--test/CodeGen/Thumb/2009-07-19-SPDecBug.ll33
-rw-r--r--test/CodeGen/Thumb/2009-08-20-ISelBug.ll2
-rw-r--r--test/CodeGen/Thumb/2010-01-15-local-alloc-spill-physical.ll20
-rw-r--r--test/CodeGen/Thumb/2010-07-15-debugOrdering.ll2
-rw-r--r--test/CodeGen/Thumb/2011-05-11-DAGLegalizer.ll60
-rw-r--r--test/CodeGen/Thumb/2011-06-16-NoGPRs.ll24
-rw-r--r--test/CodeGen/Thumb/rev.ll56
-rw-r--r--test/CodeGen/Thumb/select.ll41
9 files changed, 176 insertions, 179 deletions
diff --git a/test/CodeGen/Thumb/2007-03-06-AddR7.ll b/test/CodeGen/Thumb/2007-03-06-AddR7.ll
deleted file mode 100644
index 8d139e9..0000000
--- a/test/CodeGen/Thumb/2007-03-06-AddR7.ll
+++ /dev/null
@@ -1,117 +0,0 @@
-; RUN: llc < %s -march=thumb
-; RUN: llc < %s -mtriple=thumb-apple-darwin -relocation-model=pic \
-; RUN: -mattr=+v6,+vfp2 | not grep {add r., r7, #2 \\* 4}
-
- %struct.__fooAllocator = type opaque
- %struct.__fooY = type { %struct.fooXBase, %struct.__fooString*, %struct.__fooU*, %struct.__fooV*, i8** }
- %struct.__fooZ = type opaque
- %struct.__fooU = type opaque
- %struct.__fooString = type opaque
- %struct.__fooV = type opaque
- %struct.fooXBase = type { i32, [4 x i8] }
- %struct.fooXClass = type { i32, i8*, void (i8*)*, i8* (%struct.__fooAllocator*, i8*)*, void (i8*)*, i8 (i8*, i8*) zeroext *, i32 (i8*)*, %struct.__fooString* (i8*, %struct.__fooZ*)*, %struct.__fooString* (i8*)* }
- %struct.aa_cache = type { i32, i32, [1 x %struct.aa_method*] }
- %struct.aa_class = type { %struct.aa_class*, %struct.aa_class*, i8*, i32, i32, i32, %struct.aa_ivar_list*, %struct.aa_method_list**, %struct.aa_cache*, %struct.aa_protocol_list* }
- %struct.aa_ivar = type { i8*, i8*, i32 }
- %struct.aa_ivar_list = type { i32, [1 x %struct.aa_ivar] }
- %struct.aa_method = type { %struct.aa_ss*, i8*, %struct.aa_object* (%struct.aa_object*, %struct.aa_ss*, ...)* }
- %struct.aa_method_list = type { %struct.aa_method_list*, i32, [1 x %struct.aa_method] }
- %struct.aa_object = type { %struct.aa_class* }
- %struct.aa_protocol_list = type { %struct.aa_protocol_list*, i32, [1 x %struct.aa_object*] }
- %struct.aa_ss = type opaque
-@__kfooYTypeID = external global i32 ; <i32*> [#uses=3]
-@__fooYClass = external constant %struct.fooXClass ; <%struct.fooXClass*> [#uses=1]
-@__fooXClassTableSize = external global i32 ; <i32*> [#uses=1]
-@__fooXAaClassTable = external global i32* ; <i32**> [#uses=1]
-@s.10319 = external global %struct.aa_ss* ; <%struct.aa_ss**> [#uses=2]
-@str15 = external constant [24 x i8] ; <[24 x i8]*> [#uses=1]
-
-
-define i8 @test(%struct.__fooY* %calendar, double* %atp, i8* %componentDesc, ...) zeroext {
-entry:
- %args = alloca i8*, align 4 ; <i8**> [#uses=5]
- %args4 = bitcast i8** %args to i8* ; <i8*> [#uses=2]
- call void @llvm.va_start( i8* %args4 )
- %tmp6 = load i32* @__kfooYTypeID ; <i32> [#uses=1]
- icmp eq i32 %tmp6, 0 ; <i1>:0 [#uses=1]
- br i1 %0, label %cond_true, label %cond_next
-
-cond_true: ; preds = %entry
- %tmp7 = call i32 @_fooXRegisterClass( %struct.fooXClass* @__fooYClass ) ; <i32> [#uses=1]
- store i32 %tmp7, i32* @__kfooYTypeID
- br label %cond_next
-
-cond_next: ; preds = %cond_true, %entry
- %tmp8 = load i32* @__kfooYTypeID ; <i32> [#uses=2]
- %tmp15 = load i32* @__fooXClassTableSize ; <i32> [#uses=1]
- icmp ugt i32 %tmp15, %tmp8 ; <i1>:1 [#uses=1]
- br i1 %1, label %cond_next18, label %cond_true58
-
-cond_next18: ; preds = %cond_next
- %tmp21 = getelementptr %struct.__fooY* %calendar, i32 0, i32 0, i32 0 ; <i32*> [#uses=1]
- %tmp22 = load i32* %tmp21 ; <i32> [#uses=2]
- %tmp29 = load i32** @__fooXAaClassTable ; <i32*> [#uses=1]
- %tmp31 = getelementptr i32* %tmp29, i32 %tmp8 ; <i32*> [#uses=1]
- %tmp32 = load i32* %tmp31 ; <i32> [#uses=1]
- icmp eq i32 %tmp22, %tmp32 ; <i1>:2 [#uses=1]
- %.not = xor i1 %2, true ; <i1> [#uses=1]
- icmp ugt i32 %tmp22, 4095 ; <i1>:3 [#uses=1]
- %bothcond = and i1 %.not, %3 ; <i1> [#uses=1]
- br i1 %bothcond, label %cond_true58, label %bb48
-
-bb48: ; preds = %cond_next18
- %tmp78 = call i32 @strlen( i8* %componentDesc ) ; <i32> [#uses=4]
- %tmp92 = alloca i32, i32 %tmp78 ; <i32*> [#uses=2]
- icmp sgt i32 %tmp78, 0 ; <i1>:4 [#uses=1]
- br i1 %4, label %cond_true111, label %bb114
-
-cond_true58: ; preds = %cond_next18, %cond_next
- %tmp59 = load %struct.aa_ss** @s.10319 ; <%struct.aa_ss*> [#uses=2]
- icmp eq %struct.aa_ss* %tmp59, null ; <i1>:5 [#uses=1]
- %tmp6869 = bitcast %struct.__fooY* %calendar to i8* ; <i8*> [#uses=2]
- br i1 %5, label %cond_true60, label %cond_next64
-
-cond_true60: ; preds = %cond_true58
- %tmp63 = call %struct.aa_ss* @sel_registerName( i8* getelementptr ([24 x i8]* @str15, i32 0, i32 0) ) ; <%struct.aa_ss*> [#uses=2]
- store %struct.aa_ss* %tmp63, %struct.aa_ss** @s.10319
- %tmp66137 = volatile load i8** %args ; <i8*> [#uses=1]
- %tmp73138 = call i8 (i8*, %struct.aa_ss*, ...) zeroext * bitcast (%struct.aa_object* (%struct.aa_object*, %struct.aa_ss*, ...)* @aa_mm to i8 (i8*, %struct.aa_ss*, ...) zeroext *)( i8* %tmp6869, %struct.aa_ss* %tmp63, double* %atp, i8* %componentDesc, i8* %tmp66137) zeroext ; <i8> [#uses=1]
- ret i8 %tmp73138
-
-cond_next64: ; preds = %cond_true58
- %tmp66 = volatile load i8** %args ; <i8*> [#uses=1]
- %tmp73 = call i8 (i8*, %struct.aa_ss*, ...) zeroext * bitcast (%struct.aa_object* (%struct.aa_object*, %struct.aa_ss*, ...)* @aa_mm to i8 (i8*, %struct.aa_ss*, ...) zeroext *)( i8* %tmp6869, %struct.aa_ss* %tmp59, double* %atp, i8* %componentDesc, i8* %tmp66 ) zeroext ; <i8> [#uses=1]
- ret i8 %tmp73
-
-cond_true111: ; preds = %cond_true111, %bb48
- %idx.2132.0 = phi i32 [ 0, %bb48 ], [ %indvar.next, %cond_true111 ] ; <i32> [#uses=2]
- %tmp95 = volatile load i8** %args ; <i8*> [#uses=2]
- %tmp97 = getelementptr i8* %tmp95, i32 4 ; <i8*> [#uses=1]
- volatile store i8* %tmp97, i8** %args
- %tmp9899 = bitcast i8* %tmp95 to i32* ; <i32*> [#uses=1]
- %tmp100 = load i32* %tmp9899 ; <i32> [#uses=1]
- %tmp104 = getelementptr i32* %tmp92, i32 %idx.2132.0 ; <i32*> [#uses=1]
- store i32 %tmp100, i32* %tmp104
- %indvar.next = add i32 %idx.2132.0, 1 ; <i32> [#uses=2]
- icmp eq i32 %indvar.next, %tmp78 ; <i1>:6 [#uses=1]
- br i1 %6, label %bb114, label %cond_true111
-
-bb114: ; preds = %cond_true111, %bb48
- call void @llvm.va_end( i8* %args4 )
- %tmp122 = call i8 @_fooYCCV( %struct.__fooY* %calendar, double* %atp, i8* %componentDesc, i32* %tmp92, i32 %tmp78 ) zeroext ; <i8> [#uses=1]
- ret i8 %tmp122
-}
-
-declare i32 @_fooXRegisterClass(%struct.fooXClass*)
-
-declare i8 @_fooYCCV(%struct.__fooY*, double*, i8*, i32*, i32) zeroext
-
-declare %struct.aa_object* @aa_mm(%struct.aa_object*, %struct.aa_ss*, ...)
-
-declare %struct.aa_ss* @sel_registerName(i8*)
-
-declare void @llvm.va_start(i8*)
-
-declare i32 @strlen(i8*)
-
-declare void @llvm.va_end(i8*)
diff --git a/test/CodeGen/Thumb/2009-07-19-SPDecBug.ll b/test/CodeGen/Thumb/2009-07-19-SPDecBug.ll
deleted file mode 100644
index 9cdcd31..0000000
--- a/test/CodeGen/Thumb/2009-07-19-SPDecBug.ll
+++ /dev/null
@@ -1,33 +0,0 @@
-; RUN: llc < %s -mtriple=thumbv6-elf | not grep "subs sp"
-; PR4567
-
-define i8* @__gets_chk(i8* %s, i32 %slen) nounwind {
-entry:
- br i1 undef, label %bb, label %bb1
-
-bb: ; preds = %entry
- ret i8* undef
-
-bb1: ; preds = %entry
- br i1 undef, label %bb3, label %bb2
-
-bb2: ; preds = %bb1
- %0 = alloca i8, i32 undef, align 4 ; <i8*> [#uses=0]
- br label %bb4
-
-bb3: ; preds = %bb1
- %1 = malloc i8, i32 undef ; <i8*> [#uses=0]
- br label %bb4
-
-bb4: ; preds = %bb3, %bb2
- br i1 undef, label %bb5, label %bb6
-
-bb5: ; preds = %bb4
- %2 = call i8* @gets(i8* %s) nounwind ; <i8*> [#uses=1]
- ret i8* %2
-
-bb6: ; preds = %bb4
- unreachable
-}
-
-declare i8* @gets(i8*) nounwind
diff --git a/test/CodeGen/Thumb/2009-08-20-ISelBug.ll b/test/CodeGen/Thumb/2009-08-20-ISelBug.ll
index d6ca0d7..7876557 100644
--- a/test/CodeGen/Thumb/2009-08-20-ISelBug.ll
+++ b/test/CodeGen/Thumb/2009-08-20-ISelBug.ll
@@ -11,7 +11,7 @@
define i32 @t(%struct.asl_file_t* %s, i64 %off, i64* %out) nounwind optsize {
; CHECK: t:
-; CHECK: adds r0, #8
+; CHECK: adds {{r[0-7]}}, #8
entry:
%val = alloca i64, align 4 ; <i64*> [#uses=3]
%0 = icmp eq %struct.asl_file_t* %s, null ; <i1> [#uses=1]
diff --git a/test/CodeGen/Thumb/2010-01-15-local-alloc-spill-physical.ll b/test/CodeGen/Thumb/2010-01-15-local-alloc-spill-physical.ll
deleted file mode 100644
index fad2669..0000000
--- a/test/CodeGen/Thumb/2010-01-15-local-alloc-spill-physical.ll
+++ /dev/null
@@ -1,20 +0,0 @@
-; RUN: llc < %s -regalloc=fast -relocation-model=pic | FileCheck %s
-
-target triple = "thumbv6-apple-darwin10"
-
-@fred = internal global i32 0 ; <i32*> [#uses=1]
-
-define void @foo() nounwind {
-entry:
-; CHECK: str r0, [sp
- %0 = call i32 (...)* @bar() nounwind ; <i32> [#uses=1]
-; CHECK: blx _bar
-; CHECK: ldr r1, [sp
- store i32 %0, i32* @fred, align 4
- br label %return
-
-return: ; preds = %entry
- ret void
-}
-
-declare i32 @bar(...)
diff --git a/test/CodeGen/Thumb/2010-07-15-debugOrdering.ll b/test/CodeGen/Thumb/2010-07-15-debugOrdering.ll
index 06c0dfe..9f5a677 100644
--- a/test/CodeGen/Thumb/2010-07-15-debugOrdering.ll
+++ b/test/CodeGen/Thumb/2010-07-15-debugOrdering.ll
@@ -10,7 +10,7 @@
define void @_Z19getClosestDiagonal3ii(%0* noalias sret, i32, i32) nounwind {
; CHECK: blx ___muldf3
; CHECK: blx ___muldf3
-; CHECK: beq LBB0_7
+; CHECK: beq LBB0
; CHECK: blx ___muldf3
; <label>:3
switch i32 %1, label %4 [
diff --git a/test/CodeGen/Thumb/2011-05-11-DAGLegalizer.ll b/test/CodeGen/Thumb/2011-05-11-DAGLegalizer.ll
new file mode 100644
index 0000000..ed55bb5
--- /dev/null
+++ b/test/CodeGen/Thumb/2011-05-11-DAGLegalizer.ll
@@ -0,0 +1,60 @@
+; RUN: llc -mtriple=thumbv6-apple-darwin < %s
+; rdar://problem/9416774
+; ModuleID = 'reduced.ll'
+
+target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:64-v128:32:128-a0:0:32-n32"
+target triple = "thumbv7-apple-ios"
+
+%struct.MMMMMMMMMMMM = type { [4 x %struct.RRRRRRRR] }
+%struct.RRRRRRRR = type { [78 x i32] }
+
+@kkkkkk = external constant i8*
+@__PRETTY_FUNCTION__._ZN12CLGll = private unnamed_addr constant [62 x i8] c"static void tttttttttttt::lllllllllllll(const MMMMMMMMMMMM &)\00"
+@.str = private unnamed_addr constant [75 x i8] c"\09GGGGGGGGGGGGGGGGGGGGGGG:,BE:0x%08lx,ALM:0x%08lx,LTO:0x%08lx,CBEE:0x%08lx\0A\00"
+
+define void @_ZN12CLGll(%struct.MMMMMMMMMMMM* %aidData) ssp align 2 {
+entry:
+ %aidData.addr = alloca %struct.MMMMMMMMMMMM*, align 4
+ %agg.tmp = alloca %struct.RRRRRRRR, align 4
+ %agg.tmp4 = alloca %struct.RRRRRRRR, align 4
+ %agg.tmp10 = alloca %struct.RRRRRRRR, align 4
+ %agg.tmp16 = alloca %struct.RRRRRRRR, align 4
+ store %struct.MMMMMMMMMMMM* %aidData, %struct.MMMMMMMMMMMM** %aidData.addr, align 4
+ br label %do.body
+
+do.body: ; preds = %entry
+ %tmp = load i8** @kkkkkk, align 4
+ %tmp1 = load %struct.MMMMMMMMMMMM** %aidData.addr
+ %eph = getelementptr inbounds %struct.MMMMMMMMMMMM* %tmp1, i32 0, i32 0
+ %arrayidx = getelementptr inbounds [4 x %struct.RRRRRRRR]* %eph, i32 0, i32 0
+ %tmp2 = bitcast %struct.RRRRRRRR* %agg.tmp to i8*
+ %tmp3 = bitcast %struct.RRRRRRRR* %arrayidx to i8*
+ call void @llvm.memcpy.p0i8.p0i8.i32(i8* %tmp2, i8* %tmp3, i32 312, i32 4, i1 false)
+ %tmp5 = load %struct.MMMMMMMMMMMM** %aidData.addr
+ %eph6 = getelementptr inbounds %struct.MMMMMMMMMMMM* %tmp5, i32 0, i32 0
+ %arrayidx7 = getelementptr inbounds [4 x %struct.RRRRRRRR]* %eph6, i32 0, i32 1
+ %tmp8 = bitcast %struct.RRRRRRRR* %agg.tmp4 to i8*
+ %tmp9 = bitcast %struct.RRRRRRRR* %arrayidx7 to i8*
+ call void @llvm.memcpy.p0i8.p0i8.i32(i8* %tmp8, i8* %tmp9, i32 312, i32 4, i1 false)
+ %tmp11 = load %struct.MMMMMMMMMMMM** %aidData.addr
+ %eph12 = getelementptr inbounds %struct.MMMMMMMMMMMM* %tmp11, i32 0, i32 0
+ %arrayidx13 = getelementptr inbounds [4 x %struct.RRRRRRRR]* %eph12, i32 0, i32 2
+ %tmp14 = bitcast %struct.RRRRRRRR* %agg.tmp10 to i8*
+ %tmp15 = bitcast %struct.RRRRRRRR* %arrayidx13 to i8*
+ call void @llvm.memcpy.p0i8.p0i8.i32(i8* %tmp14, i8* %tmp15, i32 312, i32 4, i1 false)
+ %tmp17 = load %struct.MMMMMMMMMMMM** %aidData.addr
+ %eph18 = getelementptr inbounds %struct.MMMMMMMMMMMM* %tmp17, i32 0, i32 0
+ %arrayidx19 = getelementptr inbounds [4 x %struct.RRRRRRRR]* %eph18, i32 0, i32 3
+ %tmp20 = bitcast %struct.RRRRRRRR* %agg.tmp16 to i8*
+ %tmp21 = bitcast %struct.RRRRRRRR* %arrayidx19 to i8*
+ call void @llvm.memcpy.p0i8.p0i8.i32(i8* %tmp20, i8* %tmp21, i32 312, i32 4, i1 false)
+ call void (i8*, i32, i8*, i8*, ...)* @CLLoggingLog(i8* %tmp, i32 2, i8* getelementptr inbounds ([62 x i8]* @__PRETTY_FUNCTION__._ZN12CLGll, i32 0, i32 0), i8* getelementptr inbounds ([75 x i8]* @.str, i32 0, i32 0), %struct.RRRRRRRR* byval %agg.tmp, %struct.RRRRRRRR* byval %agg.tmp4, %struct.RRRRRRRR* byval %agg.tmp10, %struct.RRRRRRRR* byval %agg.tmp16)
+ br label %do.end
+
+do.end: ; preds = %do.body
+ ret void
+}
+
+declare void @CLLoggingLog(i8*, i32, i8*, i8*, ...)
+
+declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
diff --git a/test/CodeGen/Thumb/2011-06-16-NoGPRs.ll b/test/CodeGen/Thumb/2011-06-16-NoGPRs.ll
new file mode 100644
index 0000000..d39a760
--- /dev/null
+++ b/test/CodeGen/Thumb/2011-06-16-NoGPRs.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s
+;
+; This test would crash because isel creates a GPR register for the return
+; value from f1. The register is only used by tBLXr_r9 which accepts a full GPR
+; register, but we cannot have live GPRs in thumb mode because we don't know how
+; to spill them.
+;
+; <rdar://problem/9624323>
+target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:64-v128:32:128-a0:0:32-n32"
+target triple = "thumbv6-apple-darwin10"
+
+%0 = type opaque
+
+declare i8* (i8*, i8*, ...)* @f1(i8*, i8*) optsize
+declare i8* @f2(i8*, i8*, ...)
+
+define internal void @f(i8* %self, i8* %_cmd, %0* %inObjects, %0* %inIndexes) optsize ssp {
+entry:
+ %call14 = tail call i8* (i8*, i8*, ...)* (i8*, i8*)* @f1(i8* undef, i8* %_cmd) optsize
+ %0 = bitcast i8* (i8*, i8*, ...)* %call14 to void (i8*, i8*, %0*, %0*)*
+ tail call void %0(i8* %self, i8* %_cmd, %0* %inObjects, %0* %inIndexes) optsize
+ tail call void bitcast (i8* (i8*, i8*, ...)* @f2 to void (i8*, i8*, i32, %0*, %0*)*)(i8* %self, i8* undef, i32 2, %0* %inIndexes, %0* undef) optsize
+ ret void
+}
diff --git a/test/CodeGen/Thumb/rev.ll b/test/CodeGen/Thumb/rev.ll
new file mode 100644
index 0000000..5e163f8
--- /dev/null
+++ b/test/CodeGen/Thumb/rev.ll
@@ -0,0 +1,56 @@
+; RUN: llc < %s -march=thumb -mattr=+v6 | FileCheck %s
+
+define i32 @test1(i32 %X) nounwind {
+; CHECK: test1
+; CHECK: rev16 r0, r0
+ %tmp1 = lshr i32 %X, 8
+ %X15 = bitcast i32 %X to i32
+ %tmp4 = shl i32 %X15, 8
+ %tmp2 = and i32 %tmp1, 16711680
+ %tmp5 = and i32 %tmp4, -16777216
+ %tmp9 = and i32 %tmp1, 255
+ %tmp13 = and i32 %tmp4, 65280
+ %tmp6 = or i32 %tmp5, %tmp2
+ %tmp10 = or i32 %tmp6, %tmp13
+ %tmp14 = or i32 %tmp10, %tmp9
+ ret i32 %tmp14
+}
+
+define i32 @test2(i32 %X) nounwind {
+; CHECK: test2
+; CHECK: revsh r0, r0
+ %tmp1 = lshr i32 %X, 8
+ %tmp1.upgrd.1 = trunc i32 %tmp1 to i16
+ %tmp3 = trunc i32 %X to i16
+ %tmp2 = and i16 %tmp1.upgrd.1, 255
+ %tmp4 = shl i16 %tmp3, 8
+ %tmp5 = or i16 %tmp2, %tmp4
+ %tmp5.upgrd.2 = sext i16 %tmp5 to i32
+ ret i32 %tmp5.upgrd.2
+}
+
+; rdar://9147637
+define i32 @test3(i16 zeroext %a) nounwind {
+entry:
+; CHECK: test3:
+; CHECK: revsh r0, r0
+ %0 = tail call i16 @llvm.bswap.i16(i16 %a)
+ %1 = sext i16 %0 to i32
+ ret i32 %1
+}
+
+declare i16 @llvm.bswap.i16(i16) nounwind readnone
+
+define i32 @test4(i16 zeroext %a) nounwind {
+entry:
+; CHECK: test4:
+; CHECK: revsh r0, r0
+ %conv = zext i16 %a to i32
+ %shr9 = lshr i16 %a, 8
+ %conv2 = zext i16 %shr9 to i32
+ %shl = shl nuw nsw i32 %conv, 8
+ %or = or i32 %conv2, %shl
+ %sext = shl i32 %or, 16
+ %conv8 = ashr exact i32 %sext, 16
+ ret i32 %conv8
+}
diff --git a/test/CodeGen/Thumb/select.ll b/test/CodeGen/Thumb/select.ll
index 780e5fa..3f10b05 100644
--- a/test/CodeGen/Thumb/select.ll
+++ b/test/CodeGen/Thumb/select.ll
@@ -1,10 +1,5 @@
-; RUN: llc < %s -march=thumb | grep beq | count 1
-; RUN: llc < %s -march=thumb | grep bgt | count 1
-; RUN: llc < %s -march=thumb | grep blt | count 3
-; RUN: llc < %s -march=thumb | grep ble | count 1
-; RUN: llc < %s -march=thumb | grep bls | count 1
-; RUN: llc < %s -march=thumb | grep bhi | count 1
-; RUN: llc < %s -mtriple=thumb-apple-darwin | grep __ltdf2
+; RUN: llc < %s -mtriple=thumb-apple-darwin | FileCheck %s
+; RUN: llc < %s -mtriple=thumb-pc-linux-gnueabi | FileCheck -check-prefix=CHECK-EABI %s
define i32 @f1(i32 %a.s) {
entry:
@@ -12,6 +7,10 @@ entry:
%tmp1.s = select i1 %tmp, i32 2, i32 3
ret i32 %tmp1.s
}
+; CHECK: f1:
+; CHECK: beq
+; CHECK-EABI: f1:
+; CHECK-EABI: beq
define i32 @f2(i32 %a.s) {
entry:
@@ -19,6 +18,10 @@ entry:
%tmp1.s = select i1 %tmp, i32 2, i32 3
ret i32 %tmp1.s
}
+; CHECK: f2:
+; CHECK: bgt
+; CHECK-EABI: f2:
+; CHECK-EABI: bgt
define i32 @f3(i32 %a.s, i32 %b.s) {
entry:
@@ -26,6 +29,10 @@ entry:
%tmp1.s = select i1 %tmp, i32 2, i32 3
ret i32 %tmp1.s
}
+; CHECK: f3:
+; CHECK: blt
+; CHECK-EABI: f3:
+; CHECK-EABI: blt
define i32 @f4(i32 %a.s, i32 %b.s) {
entry:
@@ -33,6 +40,10 @@ entry:
%tmp1.s = select i1 %tmp, i32 2, i32 3
ret i32 %tmp1.s
}
+; CHECK: f4:
+; CHECK: ble
+; CHECK-EABI: f4:
+; CHECK-EABI: ble
define i32 @f5(i32 %a.u, i32 %b.u) {
entry:
@@ -40,6 +51,10 @@ entry:
%tmp1.s = select i1 %tmp, i32 2, i32 3
ret i32 %tmp1.s
}
+; CHECK: f5:
+; CHECK: bls
+; CHECK-EABI: f5:
+; CHECK-EABI: bls
define i32 @f6(i32 %a.u, i32 %b.u) {
entry:
@@ -47,9 +62,21 @@ entry:
%tmp1.s = select i1 %tmp, i32 2, i32 3
ret i32 %tmp1.s
}
+; CHECK: f6:
+; CHECK: bhi
+; CHECK-EABI: f6:
+; CHECK-EABI: bhi
define double @f7(double %a, double %b) {
%tmp = fcmp olt double %a, 1.234e+00
%tmp1 = select i1 %tmp, double -1.000e+00, double %b
ret double %tmp1
}
+; CHECK: f7:
+; CHECK: blt
+; CHECK: blt
+; CHECK: __ltdf2
+; CHECK-EABI: f7:
+; CHECK-EABI: __aeabi_dcmplt
+; CHECK-EABI: bne
+; CHECK-EABI: bne