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-rw-r--r--test/CodeGen/X86/sink-hoist.ll10
1 files changed, 5 insertions, 5 deletions
diff --git a/test/CodeGen/X86/sink-hoist.ll b/test/CodeGen/X86/sink-hoist.ll
index 2aca5b8..0741635 100644
--- a/test/CodeGen/X86/sink-hoist.ll
+++ b/test/CodeGen/X86/sink-hoist.ll
@@ -5,7 +5,7 @@
; evaluated, however with MachineSink we can sink the other side so
; that it's conditionally evaluated.
-; CHECK: foo:
+; CHECK-LABEL: foo:
; CHECK-NEXT: testb $1, %dil
; CHECK-NEXT: jne
; CHECK-NEXT: divsd
@@ -24,7 +24,7 @@ define double @foo(double %x, double %y, i1 %c) nounwind {
; the conditional branch.
; rdar://8454886
-; CHECK: split:
+; CHECK-LABEL: split:
; CHECK-NEXT: testb $1, %dil
; CHECK-NEXT: jne
; CHECK-NEXT: movaps
@@ -40,7 +40,7 @@ define double @split(double %x, double %y, i1 %c) nounwind {
; Hoist floating-point constant-pool loads out of loops.
-; CHECK: bar:
+; CHECK-LABEL: bar:
; CHECK: movsd
; CHECK: align
define void @bar(double* nocapture %p, i64 %n) nounwind {
@@ -87,7 +87,7 @@ return:
; Codegen should hoist and CSE these constants.
-; CHECK: vv:
+; CHECK-LABEL: vv:
; CHECK: LCPI3_0(%rip), %xmm0
; CHECK: LCPI3_1(%rip), %xmm1
; CHECK: LCPI3_2(%rip), %xmm2
@@ -151,7 +151,7 @@ declare <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32>) nounwind readnone
; CodeGen should use the correct register class when extracting
; a load from a zero-extending load for hoisting.
-; CHECK: default_get_pch_validity:
+; CHECK-LABEL: default_get_pch_validity:
; CHECK: movl cl_options_count(%rip), %ecx
@cl_options_count = external constant i32 ; <i32*> [#uses=2]