diff options
Diffstat (limited to 'test/CodeGen/X86')
226 files changed, 6557 insertions, 0 deletions
diff --git a/test/CodeGen/X86/2002-12-23-LocalRAProblem.llx b/test/CodeGen/X86/2002-12-23-LocalRAProblem.llx new file mode 100644 index 0000000..f79781c --- /dev/null +++ b/test/CodeGen/X86/2002-12-23-LocalRAProblem.llx @@ -0,0 +1,11 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -regalloc=simple + +int %main() { + %A = add int 0, 0 ; %A = 0 + %B = add int 0, 1 ; %B = 1 + br label %bb1 +bb1: + %X = mul int %A, %B ; %X = 0*1 = 0 + %R = sub int %B, 1 ; %r = 0 + ret int %R +} diff --git a/test/CodeGen/X86/2002-12-23-SubProblem.llx b/test/CodeGen/X86/2002-12-23-SubProblem.llx new file mode 100644 index 0000000..3d89378 --- /dev/null +++ b/test/CodeGen/X86/2002-12-23-SubProblem.llx @@ -0,0 +1,7 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -regalloc=simple + +int %main(int %B) { + ;%B = add int 0, 1 + %R = sub int %B, 1 ; %r = 0 + ret int %R +} diff --git a/test/CodeGen/X86/2003-08-03-CallArgLiveRanges.llx b/test/CodeGen/X86/2003-08-03-CallArgLiveRanges.llx new file mode 100644 index 0000000..9a4541b --- /dev/null +++ b/test/CodeGen/X86/2003-08-03-CallArgLiveRanges.llx @@ -0,0 +1,15 @@ +; The old instruction selector used to load all arguments to a call up in +; registers, then start pushing them all onto the stack. This is bad news as +; it makes a ton of annoying overlapping live ranges. This code should not +; cause spills! +; +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -stats |& not grep spilled + +target endian = little +target pointersize = 32 + +int %test(int, int, int, int, int, int, int, int, int, int) { ret int 0 } +int %main() { + %X = call int %test(int 1, int 2, int 3, int 4, int 5, int 6, int 7, int 8, int 9, int 10) + ret int %X +} diff --git a/test/CodeGen/X86/2003-08-23-DeadBlockTest.llx b/test/CodeGen/X86/2003-08-23-DeadBlockTest.llx new file mode 100644 index 0000000..48623b9 --- /dev/null +++ b/test/CodeGen/X86/2003-08-23-DeadBlockTest.llx @@ -0,0 +1,13 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 + +implementation + +int %test() { +entry: ret int 7 +Test: ; dead block! + %A = call int %test() + %B = call int %test() + %C = add int %A, %B + ret int %C +} + diff --git a/test/CodeGen/X86/2003-11-03-GlobalBool.llx b/test/CodeGen/X86/2003-11-03-GlobalBool.llx new file mode 100644 index 0000000..150d6a9 --- /dev/null +++ b/test/CodeGen/X86/2003-11-03-GlobalBool.llx @@ -0,0 +1,5 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | \ +; RUN: not grep {.byte\[\[:space:\]\]*true} + +%X = global bool true + diff --git a/test/CodeGen/X86/2004-02-12-Memcpy.llx b/test/CodeGen/X86/2004-02-12-Memcpy.llx new file mode 100644 index 0000000..8cd9a50 --- /dev/null +++ b/test/CodeGen/X86/2004-02-12-Memcpy.llx @@ -0,0 +1,24 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep movs +declare void %llvm.memcpy.i32(sbyte* %A, sbyte* %B, uint %amt, uint %align) + +%A = global [1000 x int] zeroinitializer +%B = global [1000 x int] zeroinitializer + + +void %main() { + ; dword copy + call void %llvm.memcpy.i32(sbyte* cast (int* getelementptr ([1000 x int]* %A, long 0, long 0) to sbyte*), + sbyte* cast (int* getelementptr ([1000 x int]* %B, long 0, long 0) to sbyte*), + uint 4000, uint 4) + + ; word copy + call void %llvm.memcpy.i32(sbyte* cast (int* getelementptr ([1000 x int]* %A, long 0, long 0) to sbyte*), + sbyte* cast (int* getelementptr ([1000 x int]* %B, long 0, long 0) to sbyte*), + uint 4000, uint 2) + + ; byte copy + call void %llvm.memcpy.i32(sbyte* cast (int* getelementptr ([1000 x int]* %A, long 0, long 0) to sbyte*), + sbyte* cast (int* getelementptr ([1000 x int]* %B, long 0, long 0) to sbyte*), + uint 4000, uint 1) + ret void +} diff --git a/test/CodeGen/X86/2004-02-13-FrameReturnAddress.llx b/test/CodeGen/X86/2004-02-13-FrameReturnAddress.llx new file mode 100644 index 0000000..366865a --- /dev/null +++ b/test/CodeGen/X86/2004-02-13-FrameReturnAddress.llx @@ -0,0 +1,14 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep {(%esp} + +declare sbyte* %llvm.returnaddress(uint) +declare sbyte* %llvm.frameaddress(uint) + +sbyte *%test1() { + %X = call sbyte* %llvm.returnaddress(uint 0) + ret sbyte* %X +} + +sbyte *%test2() { + %X = call sbyte* %llvm.frameaddress(uint 0) + ret sbyte* %X +} diff --git a/test/CodeGen/X86/2004-02-14-InefficientStackPointer.llx b/test/CodeGen/X86/2004-02-14-InefficientStackPointer.llx new file mode 100644 index 0000000..a0196aa --- /dev/null +++ b/test/CodeGen/X86/2004-02-14-InefficientStackPointer.llx @@ -0,0 +1,5 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep -i ESP | not grep sub + +int %test(int %X) { + ret int %X +} diff --git a/test/CodeGen/X86/2004-02-22-Casts.llx b/test/CodeGen/X86/2004-02-22-Casts.llx new file mode 100644 index 0000000..8f5f5f8 --- /dev/null +++ b/test/CodeGen/X86/2004-02-22-Casts.llx @@ -0,0 +1,11 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 + +bool %test1(double %X) { + %V = cast double %X to bool + ret bool %V +} + +double %test2(ulong %X) { + %V = cast ulong %X to double + ret double %V +} diff --git a/test/CodeGen/X86/2004-03-30-Select-Max.llx b/test/CodeGen/X86/2004-03-30-Select-Max.llx new file mode 100644 index 0000000..bd7ab47 --- /dev/null +++ b/test/CodeGen/X86/2004-03-30-Select-Max.llx @@ -0,0 +1,7 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | not grep {j\[lgbe\]} + +int %max(int %A, int %B) { + %gt = setgt int %A, %B + %R = select bool %gt, int %A, int %B + ret int %R +} diff --git a/test/CodeGen/X86/2004-04-09-SameValueCoalescing.llx b/test/CodeGen/X86/2004-04-09-SameValueCoalescing.llx new file mode 100644 index 0000000..52c5da4 --- /dev/null +++ b/test/CodeGen/X86/2004-04-09-SameValueCoalescing.llx @@ -0,0 +1,12 @@ +; Linear scan does not currently coalesce any two variables that have +; overlapping live intervals. When two overlapping intervals have the same +; value, they can be joined though. +; +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -regalloc=linearscan | \ +; RUN: not grep {mov %\[A-Z\]\\\{2,3\\\}, %\[A-Z\]\\\{2,3\\\}} + +long %test(long %x) { +entry: + %tmp.1 = mul long %x, 4294967297 ; <long> [#uses=1] + ret long %tmp.1 +} diff --git a/test/CodeGen/X86/2004-04-13-FPCMOV-Crash.llx b/test/CodeGen/X86/2004-04-13-FPCMOV-Crash.llx new file mode 100644 index 0000000..5896c14 --- /dev/null +++ b/test/CodeGen/X86/2004-04-13-FPCMOV-Crash.llx @@ -0,0 +1,8 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 + +implementation ; Functions: + +double %test(double %d) { + %X = select bool false, double %d, double %d ; <double> [#uses=0] + ret double %X +} diff --git a/test/CodeGen/X86/2004-06-10-StackifierCrash.llx b/test/CodeGen/X86/2004-06-10-StackifierCrash.llx new file mode 100644 index 0000000..3df962b --- /dev/null +++ b/test/CodeGen/X86/2004-06-10-StackifierCrash.llx @@ -0,0 +1,6 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 + +bool %T(double %X) { + %V = seteq double %X, %X + ret bool %V +} diff --git a/test/CodeGen/X86/2004-10-08-SelectSetCCFold.llx b/test/CodeGen/X86/2004-10-08-SelectSetCCFold.llx new file mode 100644 index 0000000..6757be2 --- /dev/null +++ b/test/CodeGen/X86/2004-10-08-SelectSetCCFold.llx @@ -0,0 +1,8 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 + +bool %test(bool %C, bool %D, int %X, int %Y) { + %E = setlt int %X, %Y + %F = select bool %C, bool %D, bool %E + ret bool %F +} + diff --git a/test/CodeGen/X86/2005-01-17-CycleInDAG.ll b/test/CodeGen/X86/2005-01-17-CycleInDAG.ll new file mode 100644 index 0000000..74233eb --- /dev/null +++ b/test/CodeGen/X86/2005-01-17-CycleInDAG.ll @@ -0,0 +1,16 @@ +; This testcase was distilled from 132.ijpeg. Bsaically we cannot fold the +; load into the sub instruction here as it induces a cycle in the dag, which +; is invalid code (there is no correct way to order the instruction). Check +; that we do not fold the load into the sub. + +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | not grep sub.*GLOBAL + +%GLOBAL = external global int + +int %test(int* %P1, int* %P2, int* %P3) { + %L = load int* %GLOBAL + store int 12, int* %P2 + %Y = load int* %P3 + %Z = sub int %Y, %L + ret int %Z +} diff --git a/test/CodeGen/X86/2005-02-14-IllegalAssembler.ll b/test/CodeGen/X86/2005-02-14-IllegalAssembler.ll new file mode 100644 index 0000000..4547bff --- /dev/null +++ b/test/CodeGen/X86/2005-02-14-IllegalAssembler.ll @@ -0,0 +1,5 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | not grep 18446744073709551612 + +%A = external global int + +%Y = global int* getelementptr (int* %A, int -1) diff --git a/test/CodeGen/X86/2005-05-08-FPStackifierPHI.ll b/test/CodeGen/X86/2005-05-08-FPStackifierPHI.ll new file mode 100644 index 0000000..5a304db --- /dev/null +++ b/test/CodeGen/X86/2005-05-08-FPStackifierPHI.ll @@ -0,0 +1,49 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mcpu=generic +; Make sure LLC doesn't crash in the stackifier due to FP PHI nodes. + +void %radfg_() { +entry: + br bool false, label %no_exit.16.preheader, label %loopentry.0 + +loopentry.0: ; preds = %entry + ret void + +no_exit.16.preheader: ; preds = %entry + br label %no_exit.16 + +no_exit.16: ; preds = %no_exit.16, %no_exit.16.preheader + br bool false, label %loopexit.16.loopexit, label %no_exit.16 + +loopexit.16.loopexit: ; preds = %no_exit.16 + br label %no_exit.18 + +no_exit.18: ; preds = %loopexit.20, %loopexit.16.loopexit + %tmp.882 = add float 0.000000e+00, 0.000000e+00 ; <float> [#uses=2] + br bool false, label %loopexit.19, label %no_exit.19.preheader + +no_exit.19.preheader: ; preds = %no_exit.18 + ret void + +loopexit.19: ; preds = %no_exit.18 + br bool false, label %loopexit.20, label %no_exit.20 + +no_exit.20: ; preds = %loopexit.21, %loopexit.19 + %ai2.1122.tmp.3 = phi float [ %tmp.958, %loopexit.21 ], [ %tmp.882, %loopexit.19 ] ; <float> [#uses=1] + %tmp.950 = mul float %tmp.882, %ai2.1122.tmp.3 ; <float> [#uses=1] + %tmp.951 = sub float 0.000000e+00, %tmp.950 ; <float> [#uses=1] + %tmp.958 = add float 0.000000e+00, 0.000000e+00 ; <float> [#uses=1] + br bool false, label %loopexit.21, label %no_exit.21.preheader + +no_exit.21.preheader: ; preds = %no_exit.20 + ret void + +loopexit.21: ; preds = %no_exit.20 + br bool false, label %loopexit.20, label %no_exit.20 + +loopexit.20: ; preds = %loopexit.21, %loopexit.19 + %ar2.1124.tmp.2 = phi float [ 0.000000e+00, %loopexit.19 ], [ %tmp.951, %loopexit.21 ] ; <float> [#uses=0] + br bool false, label %loopexit.18.loopexit, label %no_exit.18 + +loopexit.18.loopexit: ; preds = %loopexit.20 + ret void +} diff --git a/test/CodeGen/X86/2006-01-19-ISelFoldingBug.ll b/test/CodeGen/X86/2006-01-19-ISelFoldingBug.ll new file mode 100644 index 0000000..02180cb --- /dev/null +++ b/test/CodeGen/X86/2006-01-19-ISelFoldingBug.ll @@ -0,0 +1,16 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | \ +; RUN: grep shld | wc -l | grep 1 +; +; Check that the isel does not fold the shld, which already folds a load +; and has two uses, into a store. +%A = external global uint + +uint %test5(uint %B, ubyte %C) { + %tmp.1 = load uint *%A; + %tmp.2 = shl uint %tmp.1, ubyte %C + %tmp.3 = sub ubyte 32, %C + %tmp.4 = shr uint %B, ubyte %tmp.3 + %tmp.5 = or uint %tmp.4, %tmp.2 + store uint %tmp.5, uint* %A + ret uint %tmp.5 +} diff --git a/test/CodeGen/X86/2006-03-01-InstrSchedBug.ll b/test/CodeGen/X86/2006-03-01-InstrSchedBug.ll new file mode 100644 index 0000000..b7f08cf --- /dev/null +++ b/test/CodeGen/X86/2006-03-01-InstrSchedBug.ll @@ -0,0 +1,11 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | not grep {subl.*%esp} + +int %f(int %a, int %b) { + %tmp.2 = mul int %a, %a + %tmp.5 = shl int %a, ubyte 1 + %tmp.6 = mul int %tmp.5, %b + %tmp.10 = mul int %b, %b + %tmp.7 = add int %tmp.10, %tmp.2 + %tmp.11 = add int %tmp.7, %tmp.6 + ret int %tmp.11 +} diff --git a/test/CodeGen/X86/2006-03-02-InstrSchedBug.ll b/test/CodeGen/X86/2006-03-02-InstrSchedBug.ll new file mode 100644 index 0000000..da063df --- /dev/null +++ b/test/CodeGen/X86/2006-03-02-InstrSchedBug.ll @@ -0,0 +1,11 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -stats |& \ +; RUN: grep asm-printer | grep 7 + +int %g(int %a, int %b) { + %tmp.1 = shl int %b, ubyte 1 + %tmp.3 = add int %tmp.1, %a + %tmp.5 = mul int %tmp.3, %a + %tmp.8 = mul int %b, %b + %tmp.9 = add int %tmp.5, %tmp.8 + ret int %tmp.9 +} diff --git a/test/CodeGen/X86/2006-04-04-CrossBlockCrash.ll b/test/CodeGen/X86/2006-04-04-CrossBlockCrash.ll new file mode 100644 index 0000000..5d380b5 --- /dev/null +++ b/test/CodeGen/X86/2006-04-04-CrossBlockCrash.ll @@ -0,0 +1,55 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mcpu=yonah + +target endian = little +target pointersize = 32 +target triple = "i686-apple-darwin8.6.1" + %struct.GLTColor4 = type { float, float, float, float } + %struct.GLTCoord3 = type { float, float, float } + %struct.__GLIContextRec = type { { %struct.anon, { [24 x [16 x float]], [24 x [16 x float]] }, %struct.GLTColor4, { float, float, float, float, %struct.GLTCoord3, float } }, { float, float, float, float, float, float, float, float, [4 x uint], [4 x uint], [4 x uint] } } + %struct.__GLvertex = type { %struct.GLTColor4, %struct.GLTColor4, %struct.GLTColor4, %struct.GLTColor4, %struct.GLTColor4, %struct.GLTCoord3, float, %struct.GLTColor4, float, float, float, ubyte, ubyte, ubyte, ubyte, [4 x float], [2 x sbyte*], uint, uint, [16 x %struct.GLTColor4] } + %struct.anon = type { float, float, float, float, float, float, float, float } + +implementation ; Functions: + +declare <4 x float> %llvm.x86.sse.cmp.ps(<4 x float>, <4 x float>, sbyte) + +declare <4 x int> %llvm.x86.sse2.packssdw.128(<4 x int>, <4 x int>) + +declare int %llvm.x86.sse2.pmovmskb.128(<16 x sbyte>) + +void %gleLLVMVecInterpolateClip() { +entry: + br bool false, label %cond_false, label %cond_false183 + +cond_false: ; preds = %entry + br bool false, label %cond_false183, label %cond_true69 + +cond_true69: ; preds = %cond_false + ret void + +cond_false183: ; preds = %cond_false, %entry + %vuizmsk.0.1 = phi <4 x int> [ < int -1, int -1, int -1, int 0 >, %entry ], [ < int -1, int 0, int 0, int 0 >, %cond_false ] ; <<4 x int>> [#uses=2] + %tmp192 = extractelement <4 x int> %vuizmsk.0.1, uint 2 ; <int> [#uses=1] + %tmp193 = extractelement <4 x int> %vuizmsk.0.1, uint 3 ; <int> [#uses=2] + %tmp195 = insertelement <4 x int> zeroinitializer, int %tmp192, uint 1 ; <<4 x int>> [#uses=1] + %tmp196 = insertelement <4 x int> %tmp195, int %tmp193, uint 2 ; <<4 x int>> [#uses=1] + %tmp197 = insertelement <4 x int> %tmp196, int %tmp193, uint 3 ; <<4 x int>> [#uses=1] + %tmp336 = and <4 x int> zeroinitializer, %tmp197 ; <<4 x int>> [#uses=1] + %tmp337 = cast <4 x int> %tmp336 to <4 x float> ; <<4 x float>> [#uses=1] + %tmp378 = tail call <4 x float> %llvm.x86.sse.cmp.ps( <4 x float> %tmp337, <4 x float> zeroinitializer, sbyte 1 ) ; <<4 x float>> [#uses=1] + %tmp379 = cast <4 x float> %tmp378 to <4 x int> ; <<4 x int>> [#uses=1] + %tmp388 = tail call <4 x int> %llvm.x86.sse2.packssdw.128( <4 x int> zeroinitializer, <4 x int> %tmp379 ) ; <<4 x int>> [#uses=1] + %tmp392 = cast <4 x int> %tmp388 to <8 x short> ; <<8 x short>> [#uses=1] + %tmp399 = extractelement <8 x short> %tmp392, uint 7 ; <short> [#uses=1] + %tmp423 = insertelement <8 x short> zeroinitializer, short %tmp399, uint 7 ; <<8 x short>> [#uses=1] + %tmp427 = cast <8 x short> %tmp423 to <16 x sbyte> ; <<16 x sbyte>> [#uses=1] + %tmp428 = tail call int %llvm.x86.sse2.pmovmskb.128( <16 x sbyte> %tmp427 ) ; <int> [#uses=1] + %tmp432 = cast int %tmp428 to sbyte ; <sbyte> [#uses=1] + %tmp = and sbyte %tmp432, 42 ; <sbyte> [#uses=1] + %tmp436 = cast sbyte %tmp to ubyte ; <ubyte> [#uses=1] + %tmp446 = cast ubyte %tmp436 to uint ; <uint> [#uses=1] + %tmp447 = shl uint %tmp446, ubyte 24 ; <uint> [#uses=1] + %tmp449 = or uint 0, %tmp447 ; <uint> [#uses=1] + store uint %tmp449, uint* null + ret void +} diff --git a/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll b/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll new file mode 100644 index 0000000..db82d65 --- /dev/null +++ b/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll @@ -0,0 +1,36 @@ +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=x86 -mtriple=i686-apple-darwin8 -relocation-model=static | \ +; RUN: grep {movl _last} | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=x86 -mtriple=i686-apple-darwin8 -relocation-model=static | \ +; RUN: grep {cmpl.*_last} | wc -l | grep 1 + +%block = external global ubyte* ; <ubyte**> [#uses=1] +%last = external global int ; <int*> [#uses=3] + +implementation ; Functions: + +bool %loadAndRLEsource_no_exit_2E_1_label_2E_0(int %tmp.21.reload, int %tmp.8) { +newFuncRoot: + br label %label.0 + +label.0.no_exit.1_crit_edge.exitStub: ; preds = %label.0 + ret bool true + +codeRepl5.exitStub: ; preds = %label.0 + ret bool false + +label.0: ; preds = %newFuncRoot + %tmp.35 = load int* %last ; <int> [#uses=1] + %inc.1 = add int %tmp.35, 1 ; <int> [#uses=2] + store int %inc.1, int* %last + %tmp.36 = load ubyte** %block ; <ubyte*> [#uses=1] + %tmp.38 = getelementptr ubyte* %tmp.36, int %inc.1 ; <ubyte*> [#uses=1] + %tmp.40 = cast int %tmp.21.reload to ubyte ; <ubyte> [#uses=1] + store ubyte %tmp.40, ubyte* %tmp.38 + %tmp.910 = load int* %last ; <int> [#uses=1] + %tmp.1111 = setlt int %tmp.910, %tmp.8 ; <bool> [#uses=1] + %tmp.1412 = setne int %tmp.21.reload, 257 ; <bool> [#uses=1] + %tmp.1613 = and bool %tmp.1111, %tmp.1412 ; <bool> [#uses=1] + br bool %tmp.1613, label %label.0.no_exit.1_crit_edge.exitStub, label %codeRepl5.exitStub +} diff --git a/test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll b/test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll new file mode 100644 index 0000000..f89cfe0 --- /dev/null +++ b/test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll @@ -0,0 +1,74 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mcpu=yonah -stats |& \ +; RUN: not grep {Number of register spills} + +int %foo(<4 x float>* %a, <4 x float>* %b, <4 x float>* %c, <4 x float>* %d) { + %tmp44 = load <4 x float>* %a ; <<4 x float>> [#uses=9] + %tmp46 = load <4 x float>* %b ; <<4 x float>> [#uses=1] + %tmp48 = load <4 x float>* %c ; <<4 x float>> [#uses=1] + %tmp50 = load <4 x float>* %d ; <<4 x float>> [#uses=1] + %tmp51 = cast <4 x float> %tmp44 to <4 x int> ; <<4 x int>> [#uses=1] + %tmp = shufflevector <4 x int> %tmp51, <4 x int> undef, <4 x uint> < uint 3, uint 3, uint 3, uint 3 > ; <<4 x int>> [#uses=2] + %tmp52 = cast <4 x int> %tmp to <4 x float> ; <<4 x float>> [#uses=1] + %tmp60 = xor <4 x int> %tmp, < int -2147483648, int -2147483648, int -2147483648, int -2147483648 > ; <<4 x int>> [#uses=1] + %tmp61 = cast <4 x int> %tmp60 to <4 x float> ; <<4 x float>> [#uses=1] + %tmp74 = tail call <4 x float> %llvm.x86.sse.cmp.ps( <4 x float> %tmp52, <4 x float> %tmp44, sbyte 1 ) ; <<4 x float>> [#uses=1] + %tmp75 = cast <4 x float> %tmp74 to <4 x int> ; <<4 x int>> [#uses=1] + %tmp88 = tail call <4 x float> %llvm.x86.sse.cmp.ps( <4 x float> %tmp44, <4 x float> %tmp61, sbyte 1 ) ; <<4 x float>> [#uses=1] + %tmp89 = cast <4 x float> %tmp88 to <4 x int> ; <<4 x int>> [#uses=1] + %tmp98 = tail call <4 x int> %llvm.x86.sse2.packssdw.128( <4 x int> %tmp75, <4 x int> %tmp89 ) ; <<4 x int>> [#uses=1] + %tmp102 = cast <4 x int> %tmp98 to <8 x short> ; <<8 x short>> [#uses=1] + %tmp = shufflevector <8 x short> %tmp102, <8 x short> undef, <8 x uint> < uint 0, uint 1, uint 2, uint 3, uint 6, uint 5, uint 4, uint 7 > ; <<8 x short>> [#uses=1] + %tmp105 = shufflevector <8 x short> %tmp, <8 x short> undef, <8 x uint> < uint 2, uint 1, uint 0, uint 3, uint 4, uint 5, uint 6, uint 7 > ; <<8 x short>> [#uses=1] + %tmp105 = cast <8 x short> %tmp105 to <4 x float> ; <<4 x float>> [#uses=1] + store <4 x float> %tmp105, <4 x float>* %a + %tmp108 = cast <4 x float> %tmp46 to <4 x int> ; <<4 x int>> [#uses=1] + %tmp109 = shufflevector <4 x int> %tmp108, <4 x int> undef, <4 x uint> < uint 3, uint 3, uint 3, uint 3 > ; <<4 x int>> [#uses=2] + %tmp109 = cast <4 x int> %tmp109 to <4 x float> ; <<4 x float>> [#uses=1] + %tmp119 = xor <4 x int> %tmp109, < int -2147483648, int -2147483648, int -2147483648, int -2147483648 > ; <<4 x int>> [#uses=1] + %tmp120 = cast <4 x int> %tmp119 to <4 x float> ; <<4 x float>> [#uses=1] + %tmp133 = tail call <4 x float> %llvm.x86.sse.cmp.ps( <4 x float> %tmp109, <4 x float> %tmp44, sbyte 1 ) ; <<4 x float>> [#uses=1] + %tmp134 = cast <4 x float> %tmp133 to <4 x int> ; <<4 x int>> [#uses=1] + %tmp147 = tail call <4 x float> %llvm.x86.sse.cmp.ps( <4 x float> %tmp44, <4 x float> %tmp120, sbyte 1 ) ; <<4 x float>> [#uses=1] + %tmp148 = cast <4 x float> %tmp147 to <4 x int> ; <<4 x int>> [#uses=1] + %tmp159 = tail call <4 x int> %llvm.x86.sse2.packssdw.128( <4 x int> %tmp134, <4 x int> %tmp148 ) ; <<4 x int>> [#uses=1] + %tmp163 = cast <4 x int> %tmp159 to <8 x short> ; <<8 x short>> [#uses=1] + %tmp164 = shufflevector <8 x short> %tmp163, <8 x short> undef, <8 x uint> < uint 0, uint 1, uint 2, uint 3, uint 6, uint 5, uint 4, uint 7 > ; <<8 x short>> [#uses=1] + %tmp166 = shufflevector <8 x short> %tmp164, <8 x short> undef, <8 x uint> < uint 2, uint 1, uint 0, uint 3, uint 4, uint 5, uint 6, uint 7 > ; <<8 x short>> [#uses=1] + %tmp166 = cast <8 x short> %tmp166 to <4 x float> ; <<4 x float>> [#uses=1] + store <4 x float> %tmp166, <4 x float>* %b + %tmp169 = cast <4 x float> %tmp48 to <4 x int> ; <<4 x int>> [#uses=1] + %tmp170 = shufflevector <4 x int> %tmp169, <4 x int> undef, <4 x uint> < uint 3, uint 3, uint 3, uint 3 > ; <<4 x int>> [#uses=2] + %tmp170 = cast <4 x int> %tmp170 to <4 x float> ; <<4 x float>> [#uses=1] + %tmp180 = xor <4 x int> %tmp170, < int -2147483648, int -2147483648, int -2147483648, int -2147483648 > ; <<4 x int>> [#uses=1] + %tmp181 = cast <4 x int> %tmp180 to <4 x float> ; <<4 x float>> [#uses=1] + %tmp194 = tail call <4 x float> %llvm.x86.sse.cmp.ps( <4 x float> %tmp170, <4 x float> %tmp44, sbyte 1 ) ; <<4 x float>> [#uses=1] + %tmp195 = cast <4 x float> %tmp194 to <4 x int> ; <<4 x int>> [#uses=1] + %tmp208 = tail call <4 x float> %llvm.x86.sse.cmp.ps( <4 x float> %tmp44, <4 x float> %tmp181, sbyte 1 ) ; <<4 x float>> [#uses=1] + %tmp209 = cast <4 x float> %tmp208 to <4 x int> ; <<4 x int>> [#uses=1] + %tmp220 = tail call <4 x int> %llvm.x86.sse2.packssdw.128( <4 x int> %tmp195, <4 x int> %tmp209 ) ; <<4 x int>> [#uses=1] + %tmp224 = cast <4 x int> %tmp220 to <8 x short> ; <<8 x short>> [#uses=1] + %tmp225 = shufflevector <8 x short> %tmp224, <8 x short> undef, <8 x uint> < uint 0, uint 1, uint 2, uint 3, uint 6, uint 5, uint 4, uint 7 > ; <<8 x short>> [#uses=1] + %tmp227 = shufflevector <8 x short> %tmp225, <8 x short> undef, <8 x uint> < uint 2, uint 1, uint 0, uint 3, uint 4, uint 5, uint 6, uint 7 > ; <<8 x short>> [#uses=1] + %tmp227 = cast <8 x short> %tmp227 to <4 x float> ; <<4 x float>> [#uses=1] + store <4 x float> %tmp227, <4 x float>* %c + %tmp230 = cast <4 x float> %tmp50 to <4 x int> ; <<4 x int>> [#uses=1] + %tmp231 = shufflevector <4 x int> %tmp230, <4 x int> undef, <4 x uint> < uint 3, uint 3, uint 3, uint 3 > ; <<4 x int>> [#uses=2] + %tmp231 = cast <4 x int> %tmp231 to <4 x float> ; <<4 x float>> [#uses=1] + %tmp241 = xor <4 x int> %tmp231, < int -2147483648, int -2147483648, int -2147483648, int -2147483648 > ; <<4 x int>> [#uses=1] + %tmp242 = cast <4 x int> %tmp241 to <4 x float> ; <<4 x float>> [#uses=1] + %tmp255 = tail call <4 x float> %llvm.x86.sse.cmp.ps( <4 x float> %tmp231, <4 x float> %tmp44, sbyte 1 ) ; <<4 x float>> [#uses=1] + %tmp256 = cast <4 x float> %tmp255 to <4 x int> ; <<4 x int>> [#uses=1] + %tmp269 = tail call <4 x float> %llvm.x86.sse.cmp.ps( <4 x float> %tmp44, <4 x float> %tmp242, sbyte 1 ) ; <<4 x float>> [#uses=1] + %tmp270 = cast <4 x float> %tmp269 to <4 x int> ; <<4 x int>> [#uses=1] + %tmp281 = tail call <4 x int> %llvm.x86.sse2.packssdw.128( <4 x int> %tmp256, <4 x int> %tmp270 ) ; <<4 x int>> [#uses=1] + %tmp285 = cast <4 x int> %tmp281 to <8 x short> ; <<8 x short>> [#uses=1] + %tmp286 = shufflevector <8 x short> %tmp285, <8 x short> undef, <8 x uint> < uint 0, uint 1, uint 2, uint 3, uint 6, uint 5, uint 4, uint 7 > ; <<8 x short>> [#uses=1] + %tmp288 = shufflevector <8 x short> %tmp286, <8 x short> undef, <8 x uint> < uint 2, uint 1, uint 0, uint 3, uint 4, uint 5, uint 6, uint 7 > ; <<8 x short>> [#uses=1] + %tmp288 = cast <8 x short> %tmp288 to <4 x float> ; <<4 x float>> [#uses=1] + store <4 x float> %tmp288, <4 x float>* %d + ret int 0 +} + +declare <4 x float> %llvm.x86.sse.cmp.ps(<4 x float>, <4 x float>, sbyte) + +declare <4 x int> %llvm.x86.sse2.packssdw.128(<4 x int>, <4 x int>) diff --git a/test/CodeGen/X86/2006-05-02-InstrSched1.ll b/test/CodeGen/X86/2006-05-02-InstrSched1.ll new file mode 100644 index 0000000..59a15f4 --- /dev/null +++ b/test/CodeGen/X86/2006-05-02-InstrSched1.ll @@ -0,0 +1,23 @@ +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=x86 -relocation-model=static -stats |& \ +; RUN: grep asm-printer | grep 14 +; +%size20 = external global uint ; <uint*> [#uses=1] +%in5 = external global ubyte* ; <ubyte**> [#uses=1] + +int %compare(sbyte* %a, sbyte* %b) { + %tmp = cast sbyte* %a to uint* ; <uint*> [#uses=1] + %tmp1 = cast sbyte* %b to uint* ; <uint*> [#uses=1] + %tmp = load uint* %size20 ; <uint> [#uses=1] + %tmp = load ubyte** %in5 ; <ubyte*> [#uses=2] + %tmp3 = load uint* %tmp1 ; <uint> [#uses=1] + %tmp4 = getelementptr ubyte* %tmp, uint %tmp3 ; <ubyte*> [#uses=1] + %tmp7 = load uint* %tmp ; <uint> [#uses=1] + %tmp8 = getelementptr ubyte* %tmp, uint %tmp7 ; <ubyte*> [#uses=1] + %tmp8 = cast ubyte* %tmp8 to sbyte* ; <sbyte*> [#uses=1] + %tmp4 = cast ubyte* %tmp4 to sbyte* ; <sbyte*> [#uses=1] + %tmp = tail call int %memcmp( sbyte* %tmp8, sbyte* %tmp4, uint %tmp ) ; <int> [#uses=1] + ret int %tmp +} + +declare int %memcmp(sbyte*, sbyte*, uint) diff --git a/test/CodeGen/X86/2006-05-02-InstrSched2.ll b/test/CodeGen/X86/2006-05-02-InstrSched2.ll new file mode 100644 index 0000000..ac37fb1 --- /dev/null +++ b/test/CodeGen/X86/2006-05-02-InstrSched2.ll @@ -0,0 +1,25 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -stats |& \ +; RUN: grep asm-printer | grep 16 + +void %_ZN9__gnu_cxx9hashtableISt4pairIKPKciES3_NS_4hashIS3_EESt10_Select1stIS5_E5eqstrSaIiEE14find_or_insertERKS5__cond_true456.i(sbyte* %tmp435.i, uint* %tmp449.i.out) { +newFuncRoot: + br label %cond_true456.i + +bb459.i.exitStub: ; preds = %cond_true456.i + store uint %tmp449.i, uint* %tmp449.i.out + ret void + +cond_true456.i: ; preds = %cond_true456.i, %newFuncRoot + %__s441.2.4.i = phi sbyte* [ %tmp451.i, %cond_true456.i ], [ %tmp435.i, %newFuncRoot ] ; <sbyte*> [#uses=2] + %__h.2.4.i = phi uint [ %tmp449.i, %cond_true456.i ], [ 0, %newFuncRoot ] ; <uint> [#uses=1] + %tmp446.i = mul uint %__h.2.4.i, 5 ; <uint> [#uses=1] + %tmp.i = load sbyte* %__s441.2.4.i ; <sbyte> [#uses=1] + %tmp448.i = cast sbyte %tmp.i to uint ; <uint> [#uses=1] + %tmp449.i = add uint %tmp448.i, %tmp446.i ; <uint> [#uses=2] + %tmp450.i = cast sbyte* %__s441.2.4.i to uint ; <uint> [#uses=1] + %tmp451.i = add uint %tmp450.i, 1 ; <uint> [#uses=1] + %tmp451.i = cast uint %tmp451.i to sbyte* ; <sbyte*> [#uses=2] + %tmp45435.i = load sbyte* %tmp451.i ; <sbyte> [#uses=1] + %tmp45536.i = seteq sbyte %tmp45435.i, 0 ; <bool> [#uses=1] + br bool %tmp45536.i, label %bb459.i.exitStub, label %cond_true456.i +} diff --git a/test/CodeGen/X86/2006-05-08-CoalesceSubRegClass.ll b/test/CodeGen/X86/2006-05-08-CoalesceSubRegClass.ll new file mode 100644 index 0000000..2669159 --- /dev/null +++ b/test/CodeGen/X86/2006-05-08-CoalesceSubRegClass.ll @@ -0,0 +1,23 @@ +; Coalescing from R32 to a subset R32_. Once another register coalescer bug is +; fixed, the movb should go away as well. + +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -relocation-model=static | \ +; RUN: grep movl | wc -l + +%B = external global uint +%C = external global ushort* + +void %test(uint %A) { + %A = cast uint %A to ubyte + %tmp2 = load uint* %B + %tmp3 = and ubyte %A, 16 + %tmp4 = shl uint %tmp2, ubyte %tmp3 + store uint %tmp4, uint* %B + %tmp6 = shr uint %A, ubyte 3 + %tmp = load ushort** %C + %tmp8 = cast ushort* %tmp to uint + %tmp9 = add uint %tmp8, %tmp6 + %tmp9 = cast uint %tmp9 to ushort* + store ushort* %tmp9, ushort** %C + ret void +} diff --git a/test/CodeGen/X86/2006-05-08-InstrSched.ll b/test/CodeGen/X86/2006-05-08-InstrSched.ll new file mode 100644 index 0000000..fd35f9f --- /dev/null +++ b/test/CodeGen/X86/2006-05-08-InstrSched.ll @@ -0,0 +1,23 @@ +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=x86 -relocation-model=static | not grep {subl.*%esp} + +%A = external global ushort* +%B = external global uint +%C = external global uint + +void %test() { + %tmp = load ushort** %A + %tmp1 = getelementptr ushort* %tmp, int 1 + %tmp = load ushort* %tmp1 + %tmp3 = cast ushort %tmp to uint + %tmp = load uint* %B + %tmp4 = and uint %tmp, 16 + %tmp5 = load uint* %C + %tmp6 = cast uint %tmp4 to ubyte + %tmp7 = shl uint %tmp5, ubyte %tmp6 + %tmp9 = xor ubyte %tmp6, 16 + %tmp11 = shr uint %tmp3, ubyte %tmp9 + %tmp12 = or uint %tmp11, %tmp7 + store uint %tmp12, uint* %C + ret void +} diff --git a/test/CodeGen/X86/2006-05-11-InstrSched.ll b/test/CodeGen/X86/2006-05-11-InstrSched.ll new file mode 100644 index 0000000..b0bde7d --- /dev/null +++ b/test/CodeGen/X86/2006-05-11-InstrSched.ll @@ -0,0 +1,55 @@ +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -stats |&\ +; RUN: grep {asm-printer} | grep 33 + +target datalayout = "e-p:32:32" +define void @foo(i32* %mc, i32* %bp, i32* %ms, i32* %xmb, i32* %mpp, i32* %tpmm, i32* %ip, i32* %tpim, i32* %dpp, i32* %tpdm, i32* %bpi, i32 %M) { +entry: + %tmp9 = icmp slt i32 %M, 5 ; <i1> [#uses=1] + br i1 %tmp9, label %return, label %cond_true + +cond_true: ; preds = %cond_true, %entry + %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %cond_true ] ; <i32> [#uses=2] + %tmp. = shl i32 %indvar, 2 ; <i32> [#uses=1] + %tmp.10 = add i32 %tmp., 1 ; <i32> [#uses=2] + %k.0.0 = bitcast i32 %tmp.10 to i32 ; <i32> [#uses=2] + %tmp31 = add i32 %k.0.0, -1 ; <i32> [#uses=4] + %tmp32 = getelementptr i32* %mpp, i32 %tmp31 ; <i32*> [#uses=1] + %tmp34 = bitcast i32* %tmp32 to i8* ; <i8*> [#uses=1] + %tmp = tail call <16 x i8> @llvm.x86.sse2.loadu.dq( i8* %tmp34 ) ; <<16 x i8>> [#uses=1] + %tmp42 = getelementptr i32* %tpmm, i32 %tmp31 ; <i32*> [#uses=1] + %tmp42.upgrd.1 = bitcast i32* %tmp42 to <4 x i32>* ; <<4 x i32>*> [#uses=1] + %tmp46 = load <4 x i32>* %tmp42.upgrd.1 ; <<4 x i32>> [#uses=1] + %tmp54 = bitcast <16 x i8> %tmp to <4 x i32> ; <<4 x i32>> [#uses=1] + %tmp55 = add <4 x i32> %tmp54, %tmp46 ; <<4 x i32>> [#uses=2] + %tmp55.upgrd.2 = bitcast <4 x i32> %tmp55 to <2 x i64> ; <<2 x i64>> [#uses=1] + %tmp62 = getelementptr i32* %ip, i32 %tmp31 ; <i32*> [#uses=1] + %tmp65 = bitcast i32* %tmp62 to i8* ; <i8*> [#uses=1] + %tmp66 = tail call <16 x i8> @llvm.x86.sse2.loadu.dq( i8* %tmp65 ) ; <<16 x i8>> [#uses=1] + %tmp73 = getelementptr i32* %tpim, i32 %tmp31 ; <i32*> [#uses=1] + %tmp73.upgrd.3 = bitcast i32* %tmp73 to <4 x i32>* ; <<4 x i32>*> [#uses=1] + %tmp77 = load <4 x i32>* %tmp73.upgrd.3 ; <<4 x i32>> [#uses=1] + %tmp87 = bitcast <16 x i8> %tmp66 to <4 x i32> ; <<4 x i32>> [#uses=1] + %tmp88 = add <4 x i32> %tmp87, %tmp77 ; <<4 x i32>> [#uses=2] + %tmp88.upgrd.4 = bitcast <4 x i32> %tmp88 to <2 x i64> ; <<2 x i64>> [#uses=1] + %tmp99 = tail call <4 x i32> @llvm.x86.sse2.pcmpgt.d( <4 x i32> %tmp88, <4 x i32> %tmp55 ) ; <<4 x i32>> [#uses=1] + %tmp99.upgrd.5 = bitcast <4 x i32> %tmp99 to <2 x i64> ; <<2 x i64>> [#uses=2] + %tmp110 = xor <2 x i64> %tmp99.upgrd.5, < i64 -1, i64 -1 > ; <<2 x i64>> [#uses=1] + %tmp111 = and <2 x i64> %tmp110, %tmp55.upgrd.2 ; <<2 x i64>> [#uses=1] + %tmp121 = and <2 x i64> %tmp99.upgrd.5, %tmp88.upgrd.4 ; <<2 x i64>> [#uses=1] + %tmp131 = or <2 x i64> %tmp121, %tmp111 ; <<2 x i64>> [#uses=1] + %gep.upgrd.6 = zext i32 %tmp.10 to i64 ; <i64> [#uses=1] + %tmp137 = getelementptr i32* %mc, i64 %gep.upgrd.6 ; <i32*> [#uses=1] + %tmp137.upgrd.7 = bitcast i32* %tmp137 to <2 x i64>* ; <<2 x i64>*> [#uses=1] + store <2 x i64> %tmp131, <2 x i64>* %tmp137.upgrd.7 + %tmp147 = add i32 %k.0.0, 8 ; <i32> [#uses=1] + %tmp.upgrd.8 = icmp sgt i32 %tmp147, %M ; <i1> [#uses=1] + %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1] + br i1 %tmp.upgrd.8, label %return, label %cond_true + +return: ; preds = %cond_true, %entry + ret void +} + +declare <16 x i8> @llvm.x86.sse2.loadu.dq(i8*) + +declare <4 x i32> @llvm.x86.sse2.pcmpgt.d(<4 x i32>, <4 x i32>) diff --git a/test/CodeGen/X86/2006-05-17-VectorArg.ll b/test/CodeGen/X86/2006-05-17-VectorArg.ll new file mode 100644 index 0000000..1f2af14 --- /dev/null +++ b/test/CodeGen/X86/2006-05-17-VectorArg.ll @@ -0,0 +1,14 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 + +<4 x float> %opRSQ(<4 x float> %a) { +entry: + %tmp2 = extractelement <4 x float> %a, uint 3 + %abscond = setge float %tmp2, -0.000000e+00 + %abs = select bool %abscond, float %tmp2, float 0.000000e+00 + %tmp3 = tail call float %llvm.sqrt.f32( float %abs ) + %tmp4 = div float 1.000000e+00, %tmp3 + %tmp11 = insertelement <4 x float> zeroinitializer, float %tmp4, uint 3 + ret <4 x float> %tmp11 +} + +declare float %llvm.sqrt.f32(float) diff --git a/test/CodeGen/X86/2006-05-22-FPSetEQ.ll b/test/CodeGen/X86/2006-05-22-FPSetEQ.ll new file mode 100644 index 0000000..32281db --- /dev/null +++ b/test/CodeGen/X86/2006-05-22-FPSetEQ.ll @@ -0,0 +1,9 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep setnp +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -enable-unsafe-fp-math | \ +; RUN: not grep setnp + +uint %test(float %f) { + %tmp = seteq float %f, 0.000000e+00 + %tmp = cast bool %tmp to uint + ret uint %tmp +} diff --git a/test/CodeGen/X86/2006-05-25-CycleInDAG.ll b/test/CodeGen/X86/2006-05-25-CycleInDAG.ll new file mode 100644 index 0000000..8258f0b --- /dev/null +++ b/test/CodeGen/X86/2006-05-25-CycleInDAG.ll @@ -0,0 +1,21 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 + +int %test() { + br bool false, label %cond_next33, label %cond_true12 + +cond_true12: + ret int 0 + +cond_next33: + %tmp44.i = call double %foo( double 0.000000e+00, int 32 ) + %tmp61.i = load ubyte* null + %tmp61.i = cast ubyte %tmp61.i to int + %tmp58.i = or int 0, %tmp61.i + %tmp62.i = or int %tmp58.i, 0 + %tmp62.i = cast int %tmp62.i to double + %tmp64.i = add double %tmp62.i, %tmp44.i + %tmp68.i = call double %foo( double %tmp64.i, int 0 ) + ret int 0 +} + +declare double %foo(double, int) diff --git a/test/CodeGen/X86/2006-07-10-InlineAsmAConstraint.ll b/test/CodeGen/X86/2006-07-10-InlineAsmAConstraint.ll new file mode 100644 index 0000000..d044fd7 --- /dev/null +++ b/test/CodeGen/X86/2006-07-10-InlineAsmAConstraint.ll @@ -0,0 +1,7 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 +; PR825 + +long %test() { + %tmp.i5 = call long asm sideeffect "rdtsc", "=A,~{dirflag},~{fpsr},~{flags}"( ) ; <long> [#uses=0] + ret long %tmp.i5 +} diff --git a/test/CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll b/test/CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll new file mode 100644 index 0000000..1bacc16 --- /dev/null +++ b/test/CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll @@ -0,0 +1,18 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 +; PR828 + +target endian = little +target pointersize = 32 +target triple = "i686-pc-linux-gnu" + +implementation ; Functions: + +void %_ZN5() { + +cond_true9: ; preds = %entry + %tmp3.i.i = call int asm sideeffect "lock; cmpxchg $1,$2", +"={ax},q,m,0,~{dirflag},~{fpsr},~{flags},~{memory}"( int 0, int* null, int 0 ) + ; <int> [#uses=0] + ret void +} + diff --git a/test/CodeGen/X86/2006-07-19-ATTAsm.ll b/test/CodeGen/X86/2006-07-19-ATTAsm.ll new file mode 100644 index 0000000..adfe88c --- /dev/null +++ b/test/CodeGen/X86/2006-07-19-ATTAsm.ll @@ -0,0 +1,51 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=att +; PR834 + +target endian = little +target pointersize = 32 +target triple = "i386-unknown-freebsd6.1" + + %llvm.dbg.anchor.type = type { uint, uint } + %llvm.dbg.basictype.type = type { uint, { }*, sbyte*, { }*, uint, ulong, ulong, ulong, uint, uint } + %llvm.dbg.compile_unit.type = type { uint, { }*, uint, sbyte*, sbyte*, sbyte* } + %llvm.dbg.global_variable.type = type { uint, { }*, { }*, sbyte*, sbyte*, { }*, uint, { }*, bool, bool, { }* } +%x = global int 0 ; <int*> [#uses=1] +%llvm.dbg.global_variable = internal constant %llvm.dbg.global_variable.type { + uint 327732, + { }* cast (%llvm.dbg.anchor.type* %llvm.dbg.global_variables to { }*), + { }* cast (%llvm.dbg.compile_unit.type* %llvm.dbg.compile_unit to { }*), + sbyte* getelementptr ([2 x sbyte]* %str, int 0, int 0), + sbyte* null, + { }* cast (%llvm.dbg.compile_unit.type* %llvm.dbg.compile_unit to { }*), + uint 1, + { }* cast (%llvm.dbg.basictype.type* %llvm.dbg.basictype to { }*), + bool false, + bool true, + { }* cast (int* %x to { }*) }, section "llvm.metadata" ; <%llvm.dbg.global_variable.type*> [#uses=0] +%llvm.dbg.global_variables = linkonce constant %llvm.dbg.anchor.type { uint 327680, uint 52 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1] +%llvm.dbg.compile_unit = internal constant %llvm.dbg.compile_unit.type { + uint 327697, + { }* cast (%llvm.dbg.anchor.type* %llvm.dbg.compile_units to { }*), + uint 4, + sbyte* getelementptr ([10 x sbyte]* %str, int 0, int 0), + sbyte* getelementptr ([32 x sbyte]* %str, int 0, int 0), + sbyte* getelementptr ([45 x sbyte]* %str, int 0, int 0) }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1] +%llvm.dbg.compile_units = linkonce constant %llvm.dbg.anchor.type { uint 327680, uint 17 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1] +%str = internal constant [10 x sbyte] c"testb.cpp\00", section "llvm.metadata" ; <[10 x sbyte]*> [#uses=1] +%str = internal constant [32 x sbyte] c"/Sources/Projects/DwarfTesting/\00", section "llvm.metadata" ; <[32 x sbyte]*> [#uses=1] +%str = internal constant [45 x sbyte] c"4.0.1 LLVM (Apple Computer, Inc. build 5400)\00", section "llvm.metadata" ; <[45 x sbyte]*> [#uses=1] +%str = internal constant [2 x sbyte] c"x\00", section "llvm.metadata" ; <[2 x sbyte]*> [#uses=1] +%llvm.dbg.basictype = internal constant %llvm.dbg.basictype.type { + uint 327716, + { }* cast (%llvm.dbg.compile_unit.type* %llvm.dbg.compile_unit to { }*), + sbyte* getelementptr ([4 x sbyte]* %str, int 0, int 0), + { }* null, + uint 0, + ulong 32, + ulong 32, + ulong 0, + uint 0, + uint 5 }, section "llvm.metadata" ; <%llvm.dbg.basictype.type*> [#uses=1] +%str = internal constant [4 x sbyte] c"int\00", section "llvm.metadata" ; <[4 x sbyte]*> [#uses=1] + +implementation ; Functions: diff --git a/test/CodeGen/X86/2006-07-20-InlineAsm.ll b/test/CodeGen/X86/2006-07-20-InlineAsm.ll new file mode 100644 index 0000000..16ad579 --- /dev/null +++ b/test/CodeGen/X86/2006-07-20-InlineAsm.ll @@ -0,0 +1,24 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 +; PR833 + +%G = weak global int 0 ; <int*> [#uses=3] + +implementation ; Functions: + +int %foo(int %X) { +entry: + %X_addr = alloca int ; <int*> [#uses=3] + store int %X, int* %X_addr + call void asm sideeffect "xchg{l} {$0,$1|$1,$0}", "=*m,=*r,m,1,~{dirflag},~{fpsr},~{flags}"( int* %G, int* %X_addr, int* %G, int %X ) + %tmp1 = load int* %X_addr ; <int> [#uses=1] + ret int %tmp1 +} + +int %foo2(int %X) { +entry: + %X_addr = alloca int ; <int*> [#uses=3] + store int %X, int* %X_addr + call void asm sideeffect "xchg{l} {$0,$1|$1,$0}", "=*m,=*r,1,~{dirflag},~{fpsr},~{flags}"( int* %G, int* %X_addr, int %X ) + %tmp1 = load int* %X_addr ; <int> [#uses=1] + ret int %tmp1 +} diff --git a/test/CodeGen/X86/2006-07-28-AsmPrint-Long-As-Pointer.ll b/test/CodeGen/X86/2006-07-28-AsmPrint-Long-As-Pointer.ll new file mode 100644 index 0000000..26c71a3 --- /dev/null +++ b/test/CodeGen/X86/2006-07-28-AsmPrint-Long-As-Pointer.ll @@ -0,0 +1,5 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep -- 4294967240 +; PR853 + +%X = global int* cast (ulong 18446744073709551560 to int*) + diff --git a/test/CodeGen/X86/2006-07-31-SingleRegClass.ll b/test/CodeGen/X86/2006-07-31-SingleRegClass.ll new file mode 100644 index 0000000..aa02bf7 --- /dev/null +++ b/test/CodeGen/X86/2006-07-31-SingleRegClass.ll @@ -0,0 +1,11 @@ +; PR850 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=att | \ +; RUN: grep {movl 4(%eax),%ebp} +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=att | \ +; RUN: grep {movl 0(%eax), %ebx} + +int %foo(int %__s.i.i, int %tmp5.i.i, int %tmp6.i.i, int %tmp7.i.i, int %tmp8.i.i ) { + +%tmp9.i.i = call int asm sideeffect "push %ebp\0Apush %ebx\0Amovl 4($2),%ebp\0Amovl 0($2), %ebx\0Amovl $1,%eax\0Aint $$0x80\0Apop %ebx\0Apop %ebp", "={ax},i,0,{cx},{dx},{si},{di}"(int 192, int %__s.i.i, int %tmp5.i.i, int %tmp6.i.i, int %tmp7.i.i, int %tmp8.i.i ) + ret int %tmp9.i.i +} diff --git a/test/CodeGen/X86/2006-08-07-CycleInDAG.ll b/test/CodeGen/X86/2006-08-07-CycleInDAG.ll new file mode 100644 index 0000000..c66d553 --- /dev/null +++ b/test/CodeGen/X86/2006-08-07-CycleInDAG.ll @@ -0,0 +1,34 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 + +%struct.foo = type opaque + +implementation + +fastcc int %test(%struct.foo* %v, %struct.foo* %vi) { + br bool false, label %ilog2.exit, label %cond_true.i + +cond_true.i: ; preds = %entry + ret int 0 + +ilog2.exit: ; preds = %entry + %tmp24.i = load int* null ; <int> [#uses=1] + %tmp13.i12.i = tail call double %ldexp( double 0.000000e+00, int 0 ) ; <double> [#uses=1] + %tmp13.i13.i = cast double %tmp13.i12.i to float ; <float> [#uses=1] + %tmp11.s = load int* null ; <int> [#uses=1] + %tmp11.i = cast int %tmp11.s to uint ; <uint> [#uses=1] + %n.i = cast int %tmp24.i to uint ; <uint> [#uses=1] + %tmp13.i7 = mul uint %tmp11.i, %n.i ; <uint> [#uses=1] + %tmp.i8 = tail call sbyte* %calloc( uint %tmp13.i7, uint 4 ) ; <sbyte*> [#uses=0] + br bool false, label %bb224.preheader.i, label %bb.i + +bb.i: ; preds = %ilog2.exit + ret int 0 + +bb224.preheader.i: ; preds = %ilog2.exit + %tmp165.i = cast float %tmp13.i13.i to double ; <double> [#uses=0] + ret int 0 +} + +declare sbyte* %calloc(uint, uint) + +declare double %ldexp(double, int) diff --git a/test/CodeGen/X86/2006-08-16-CycleInDAG.ll b/test/CodeGen/X86/2006-08-16-CycleInDAG.ll new file mode 100644 index 0000000..c0668a9 --- /dev/null +++ b/test/CodeGen/X86/2006-08-16-CycleInDAG.ll @@ -0,0 +1,23 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 + + %struct.expr = type { %struct.rtx_def*, int, %struct.expr*, %struct.occr*, %struct.occr*, %struct.rtx_def* } + %struct.hash_table = type { %struct.expr**, uint, uint, int } + %struct.occr = type { %struct.occr*, %struct.rtx_def*, sbyte, sbyte } + %struct.rtx_def = type { ushort, ubyte, ubyte, %struct.u } + %struct.u = type { [1 x long] } + +void %test() { + %tmp = load uint* null ; <uint> [#uses=1] + %tmp8 = call uint %hash_rtx( ) ; <uint> [#uses=1] + %tmp11 = rem uint %tmp8, %tmp ; <uint> [#uses=1] + br bool false, label %cond_next, label %return + +cond_next: ; preds = %entry + %tmp17 = getelementptr %struct.expr** null, uint %tmp11 ; <%struct.expr**> [#uses=0] + ret void + +return: ; preds = %entry + ret void +} + +declare uint %hash_rtx() diff --git a/test/CodeGen/X86/2006-08-21-ExtraMovInst.ll b/test/CodeGen/X86/2006-08-21-ExtraMovInst.ll new file mode 100644 index 0000000..af30ea4 --- /dev/null +++ b/test/CodeGen/X86/2006-08-21-ExtraMovInst.ll @@ -0,0 +1,16 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mcpu=i386 | \ +; RUN: not grep {movl %eax, %edx} + +int %foo(int %t, int %C) { +entry: + br label %cond_true + +cond_true: ; preds = %cond_true, %entry + %t_addr.0.0 = phi int [ %t, %entry ], [ %tmp7, %cond_true ] ; <int> [#uses=2] + %tmp7 = add int %t_addr.0.0, 1 ; <int> [#uses=1] + %tmp = setgt int %C, 39 ; <bool> [#uses=1] + br bool %tmp, label %bb12, label %cond_true + +bb12: ; preds = %cond_true + ret int %t_addr.0.0 +} diff --git a/test/CodeGen/X86/2006-09-01-CycleInDAG.ll b/test/CodeGen/X86/2006-09-01-CycleInDAG.ll new file mode 100644 index 0000000..2e0a69a --- /dev/null +++ b/test/CodeGen/X86/2006-09-01-CycleInDAG.ll @@ -0,0 +1,135 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 + +target endian = little +target pointersize = 32 +target triple = "i686-apple-darwin8" + %struct.CUMULATIVE_ARGS = type { int, int, int, int, int, int, int, int, int, int, int, int } + %struct.FILE = type { ubyte*, int, int, short, short, %struct.__sbuf, int, sbyte*, int (sbyte*)*, int (sbyte*, sbyte*, int)*, long (sbyte*, long, int)*, int (sbyte*, sbyte*, int)*, %struct.__sbuf, %struct.__sFILEX*, int, [3 x ubyte], [1 x ubyte], %struct.__sbuf, int, long } + %struct.VEC_edge = type { uint, uint, [1 x %struct.edge_def*] } + %struct.VEC_tree = type { uint, uint, [1 x %struct.tree_node*] } + %struct.__sFILEX = type opaque + %struct.__sbuf = type { ubyte*, int } + %struct._obstack_chunk = type { sbyte*, %struct._obstack_chunk*, [4 x sbyte] } + %struct._var_map = type { %struct.partition_def*, int*, int*, %struct.tree_node**, uint, uint, int* } + %struct.basic_block_def = type { %struct.rtx_def*, %struct.rtx_def*, %struct.tree_node*, %struct.VEC_edge*, %struct.VEC_edge*, %struct.bitmap_head_def*, %struct.bitmap_head_def*, sbyte*, %struct.loop*, [2 x %struct.et_node*], %struct.basic_block_def*, %struct.basic_block_def*, %struct.reorder_block_def*, %struct.bb_ann_d*, long, int, int, int, int } + %struct.bb_ann_d = type { %struct.tree_node*, ubyte, %struct.edge_prediction* } + %struct.bitmap_element_def = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, uint, [4 x uint] } + %struct.bitmap_head_def = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, uint, %struct.bitmap_obstack* } + %struct.bitmap_iterator = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, uint, uint } + %struct.bitmap_obstack = type { %struct.bitmap_element_def*, %struct.bitmap_head_def*, %struct.obstack } + %struct.block_stmt_iterator = type { %struct.tree_stmt_iterator, %struct.basic_block_def* } + %struct.coalesce_list_d = type { %struct._var_map*, %struct.partition_pair_d**, bool } + %struct.conflict_graph_def = type opaque + %struct.dataflow_d = type { %struct.varray_head_tag*, [2 x %struct.tree_node*] } + %struct.def_operand_ptr = type { %struct.tree_node** } + %struct.def_optype_d = type { uint, [1 x %struct.def_operand_ptr] } + %struct.die_struct = type opaque + %struct.edge_def = type { %struct.basic_block_def*, %struct.basic_block_def*, %struct.edge_def_insns, sbyte*, %struct.location_t*, int, int, long, uint } + %struct.edge_def_insns = type { %struct.rtx_def* } + %struct.edge_iterator = type { uint, %struct.VEC_edge** } + %struct.edge_prediction = type { %struct.edge_prediction*, %struct.edge_def*, uint, int } + %struct.eh_status = type opaque + %struct.elt_list = type opaque + %struct.emit_status = type { int, int, %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack*, int, %struct.location_t, int, ubyte*, %struct.rtx_def** } + %struct.et_node = type opaque + %struct.expr_status = type { int, int, int, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def* } + %struct.function = type { %struct.eh_status*, %struct.expr_status*, %struct.emit_status*, %struct.varasm_status*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.function*, int, int, int, int, %struct.rtx_def*, %struct.CUMULATIVE_ARGS, %struct.rtx_def*, %struct.rtx_def*, %struct.initial_value_struct*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, ubyte, int, long, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, %struct.varray_head_tag*, %struct.temp_slot*, int, %struct.var_refs_queue*, int, int, %struct.rtvec_def*, %struct.tree_node*, int, int, int, %struct.machine_function*, uint, uint, bool, bool, %struct.language_function*, %struct.rtx_def*, uint, int, int, int, %struct.location_t, %struct.varray_head_tag*, %struct.tree_node*, ubyte, ubyte, ubyte } + %struct.ht_identifier = type { ubyte*, uint, uint } + %struct.initial_value_struct = type opaque + %struct.lang_decl = type opaque + %struct.lang_type = type opaque + %struct.language_function = type opaque + %struct.location_t = type { sbyte*, int } + %struct.loop = type opaque + %struct.machine_function = type { int, uint, sbyte*, int, int } + %struct.obstack = type { int, %struct._obstack_chunk*, sbyte*, sbyte*, sbyte*, int, int, %struct._obstack_chunk* (sbyte*, int)*, void (sbyte*, %struct._obstack_chunk*)*, sbyte*, ubyte } + %struct.partition_def = type { int, [1 x %struct.partition_elem] } + %struct.partition_elem = type { int, %struct.partition_elem*, uint } + %struct.partition_pair_d = type { int, int, int, %struct.partition_pair_d* } + %struct.phi_arg_d = type { %struct.tree_node*, bool } + %struct.pointer_set_t = type opaque + %struct.ptr_info_def = type { ubyte, %struct.bitmap_head_def*, %struct.tree_node* } + %struct.real_value = type opaque + %struct.reg_info_def = type opaque + %struct.reorder_block_def = type { %struct.rtx_def*, %struct.rtx_def*, %struct.basic_block_def*, %struct.basic_block_def*, %struct.basic_block_def*, int, int, int } + %struct.rtvec_def = type opaque + %struct.rtx_def = type opaque + %struct.sequence_stack = type { %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack* } + %struct.simple_bitmap_def = type { uint, uint, uint, [1 x ulong] } + %struct.ssa_op_iter = type { int, int, int, int, int, int, int, int, int, int, int, int, int, int, %struct.stmt_operands_d*, bool } + %struct.stmt_ann_d = type { %struct.tree_ann_common_d, ubyte, %struct.basic_block_def*, %struct.stmt_operands_d, %struct.dataflow_d*, %struct.bitmap_head_def*, uint } + %struct.stmt_operands_d = type { %struct.def_optype_d*, %struct.def_optype_d*, %struct.v_may_def_optype_d*, %struct.vuse_optype_d*, %struct.v_may_def_optype_d* } + %struct.temp_slot = type opaque + %struct.tree_ann_common_d = type { uint, sbyte*, %struct.tree_node* } + %struct.tree_ann_d = type { %struct.stmt_ann_d } + %struct.tree_binfo = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.VEC_tree*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.VEC_tree } + %struct.tree_block = type { %struct.tree_common, ubyte, [3 x ubyte], %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node* } + %struct.tree_common = type { %struct.tree_node*, %struct.tree_node*, %struct.tree_ann_d*, ubyte, ubyte, ubyte, ubyte, ubyte } + %struct.tree_complex = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node* } + %struct.tree_decl = type { %struct.tree_common, %struct.location_t, uint, %struct.tree_node*, ubyte, ubyte, ubyte, ubyte, ubyte, ubyte, ubyte, uint, %struct.tree_decl_u1, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, int, %struct.tree_decl_u2, %struct.tree_node*, %struct.tree_node*, long, %struct.lang_decl* } + %struct.tree_decl_u1 = type { long } + %struct.tree_decl_u1_a = type { uint } + %struct.tree_decl_u2 = type { %struct.function* } + %struct.tree_exp = type { %struct.tree_common, %struct.location_t*, int, %struct.tree_node*, [1 x %struct.tree_node*] } + %struct.tree_identifier = type { %struct.tree_common, %struct.ht_identifier } + %struct.tree_int_cst = type { %struct.tree_common, %struct.tree_int_cst_lowhi } + %struct.tree_int_cst_lowhi = type { ulong, long } + %struct.tree_list = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node* } + %struct.tree_live_info_d = type { %struct._var_map*, %struct.bitmap_head_def*, %struct.bitmap_head_def**, int, %struct.bitmap_head_def** } + %struct.tree_node = type { %struct.tree_decl } + %struct.tree_partition_associator_d = type { %struct.varray_head_tag*, %struct.varray_head_tag*, int*, int*, int, int, %struct._var_map* } + %struct.tree_phi_node = type { %struct.tree_common, %struct.tree_node*, int, int, int, %struct.basic_block_def*, %struct.dataflow_d*, [1 x %struct.phi_arg_d] } + %struct.tree_real_cst = type { %struct.tree_common, %struct.real_value* } + %struct.tree_ssa_name = type { %struct.tree_common, %struct.tree_node*, uint, %struct.ptr_info_def*, %struct.tree_node*, sbyte* } + %struct.tree_statement_list = type { %struct.tree_common, %struct.tree_statement_list_node*, %struct.tree_statement_list_node* } + %struct.tree_statement_list_node = type { %struct.tree_statement_list_node*, %struct.tree_statement_list_node*, %struct.tree_node* } + %struct.tree_stmt_iterator = type { %struct.tree_statement_list_node*, %struct.tree_node* } + %struct.tree_string = type { %struct.tree_common, int, [1 x sbyte] } + %struct.tree_type = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, uint, ushort, ubyte, ubyte, uint, %struct.tree_node*, %struct.tree_node*, %struct.tree_type_symtab, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, long, %struct.lang_type* } + %struct.tree_type_symtab = type { int } + %struct.tree_value_handle = type { %struct.tree_common, %struct.value_set*, uint } + %struct.tree_vec = type { %struct.tree_common, int, [1 x %struct.tree_node*] } + %struct.tree_vector = type { %struct.tree_common, %struct.tree_node* } + %struct.use_operand_ptr = type { %struct.tree_node** } + %struct.use_optype_d = type { uint, [1 x %struct.def_operand_ptr] } + %struct.v_def_use_operand_type_t = type { %struct.tree_node*, %struct.tree_node* } + %struct.v_may_def_optype_d = type { uint, [1 x %struct.v_def_use_operand_type_t] } + %struct.v_must_def_optype_d = type { uint, [1 x %struct.v_def_use_operand_type_t] } + %struct.value_set = type opaque + %struct.var_ann_d = type { %struct.tree_ann_common_d, ubyte, ubyte, %struct.tree_node*, %struct.varray_head_tag*, uint, uint, uint, %struct.tree_node*, %struct.tree_node* } + %struct.var_refs_queue = type { %struct.rtx_def*, uint, int, %struct.var_refs_queue* } + %struct.varasm_status = type opaque + %struct.varray_data = type { [1 x long] } + %struct.varray_head_tag = type { uint, uint, uint, sbyte*, %struct.varray_data } + %struct.vuse_optype_d = type { uint, [1 x %struct.tree_node*] } +%basic_block_info = external global %struct.varray_head_tag* ; <%struct.varray_head_tag**> [#uses=1] + +implementation ; Functions: + + +void %calculate_live_on_entry_cond_true3632(%struct.varray_head_tag* %stack3023.6, uint* %tmp3629, %struct.VEC_edge*** %tmp3397.out) { +newFuncRoot: + br label %cond_true3632 + +bb3502.exitStub: ; preds = %cond_true3632 + store %struct.VEC_edge** %tmp3397, %struct.VEC_edge*** %tmp3397.out + ret void + +cond_true3632: ; preds = %newFuncRoot + %tmp3378 = load uint* %tmp3629 ; <uint> [#uses=1] + %tmp3379 = add uint %tmp3378, 4294967295 ; <uint> [#uses=1] + %tmp3381 = getelementptr %struct.varray_head_tag* %stack3023.6, int 0, uint 4 ; <%struct.varray_data*> [#uses=1] + %tmp3382 = cast %struct.varray_data* %tmp3381 to [1 x int]* ; <[1 x int]*> [#uses=1] + %tmp3383 = getelementptr [1 x int]* %tmp3382, int 0, uint %tmp3379 ; <int*> [#uses=1] + %tmp3384 = load int* %tmp3383 ; <int> [#uses=1] + %tmp3387 = load uint* %tmp3629 ; <uint> [#uses=1] + %tmp3388 = add uint %tmp3387, 4294967295 ; <uint> [#uses=1] + store uint %tmp3388, uint* %tmp3629 + %tmp3391 = load %struct.varray_head_tag** %basic_block_info ; <%struct.varray_head_tag*> [#uses=1] + %tmp3393 = getelementptr %struct.varray_head_tag* %tmp3391, int 0, uint 4 ; <%struct.varray_data*> [#uses=1] + %tmp3394 = cast %struct.varray_data* %tmp3393 to [1 x %struct.basic_block_def*]* ; <[1 x %struct.basic_block_def*]*> [#uses=1] + %tmp3395 = getelementptr [1 x %struct.basic_block_def*]* %tmp3394, int 0, int %tmp3384 ; <%struct.basic_block_def**> [#uses=1] + %tmp3396 = load %struct.basic_block_def** %tmp3395 ; <%struct.basic_block_def*> [#uses=1] + %tmp3397 = getelementptr %struct.basic_block_def* %tmp3396, int 0, uint 3 ; <%struct.VEC_edge**> [#uses=1] + br label %bb3502.exitStub +} diff --git a/test/CodeGen/X86/2006-10-02-BoolRetCrash.ll b/test/CodeGen/X86/2006-10-02-BoolRetCrash.ll new file mode 100644 index 0000000..eb4d291 --- /dev/null +++ b/test/CodeGen/X86/2006-10-02-BoolRetCrash.ll @@ -0,0 +1,6 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc +; PR933 + +fastcc bool %test() { + ret bool true +} diff --git a/test/CodeGen/X86/2006-10-07-ScalarSSEMiscompile.ll b/test/CodeGen/X86/2006-10-07-ScalarSSEMiscompile.ll new file mode 100644 index 0000000..d8b2def --- /dev/null +++ b/test/CodeGen/X86/2006-10-07-ScalarSSEMiscompile.ll @@ -0,0 +1,17 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=sse | grep movaps +; Test that the load is NOT folded into the intrinsic, which would zero the top +; elts of the loaded vector. + +target endian = little +target pointersize = 32 +target triple = "i686-apple-darwin8.7.2" + +implementation ; Functions: + +<4 x float> %test(<4 x float> %A, <4 x float>* %B) { + %BV = load <4 x float>* %B + %tmp28 = tail call <4 x float> %llvm.x86.sse.sub.ss( <4 x float> %A, <4 x float> %BV) + ret <4 x float> %tmp28 +} + +declare <4 x float> %llvm.x86.sse.sub.ss(<4 x float>, <4 x float>) diff --git a/test/CodeGen/X86/2006-10-09-CycleInDAG.ll b/test/CodeGen/X86/2006-10-09-CycleInDAG.ll new file mode 100644 index 0000000..fbcc5cd --- /dev/null +++ b/test/CodeGen/X86/2006-10-09-CycleInDAG.ll @@ -0,0 +1,10 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 + +void %_ZN13QFSFileEngine4readEPcx() { + %tmp201 = load int* null + %tmp201 = cast int %tmp201 to long + %tmp202 = load long* null + %tmp203 = add long %tmp201, %tmp202 + store long %tmp203, long* null + ret void +} diff --git a/test/CodeGen/X86/2006-10-10-FindModifiedNodeSlotBug.ll b/test/CodeGen/X86/2006-10-10-FindModifiedNodeSlotBug.ll new file mode 100644 index 0000000..8baba81 --- /dev/null +++ b/test/CodeGen/X86/2006-10-10-FindModifiedNodeSlotBug.ll @@ -0,0 +1,31 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep shrl +; Bug in FindModifiedNodeSlot cause tmp14 load to become a zextload and shr 31 +; is then optimized away. + +%tree_code_type = external global [0 x uint] + +void %copy_if_shared_r() { + %tmp = load uint* null + %tmp56 = and uint %tmp, 255 + %tmp8 = getelementptr [0 x uint]* %tree_code_type, int 0, uint %tmp56 + %tmp9 = load uint* %tmp8 + %tmp10 = add uint %tmp9, 4294967295 + %tmp = setgt uint %tmp10, 2 + %tmp14 = load uint* null + %tmp15 = shr uint %tmp14, ubyte 31 + %tmp15 = cast uint %tmp15 to ubyte + %tmp16 = setne ubyte %tmp15, 0 + br bool %tmp, label %cond_false25, label %cond_true + +cond_true: + br bool %tmp16, label %cond_true17, label %cond_false + +cond_true17: + ret void + +cond_false: + ret void + +cond_false25: + ret void +} diff --git a/test/CodeGen/X86/2006-10-12-CycleInDAG.ll b/test/CodeGen/X86/2006-10-12-CycleInDAG.ll new file mode 100644 index 0000000..b96ec98 --- /dev/null +++ b/test/CodeGen/X86/2006-10-12-CycleInDAG.ll @@ -0,0 +1,41 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 + %struct.function = type opaque + %struct.lang_decl = type opaque + %struct.location_t = type { sbyte*, int } + %struct.rtx_def = type opaque + %struct.tree_common = type { %struct.tree_node*, %struct.tree_node*, %union.tree_ann_d*, ubyte, ubyte, ubyte, ubyte, ubyte } + %struct.tree_decl = type { %struct.tree_common, %struct.location_t, uint, %struct.tree_node*, ubyte, ubyte, ubyte, ubyte, ubyte, ubyte, ubyte, ubyte, uint, %struct.tree_decl_u1, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, int, %struct.tree_decl_u2, %struct.tree_node*, %struct.tree_node*, long, %struct.lang_decl* } + %struct.tree_decl_u1 = type { long } + %struct.tree_decl_u2 = type { %struct.function* } + %struct.tree_node = type { %struct.tree_decl } + %union.tree_ann_d = type opaque + +void %check_format_arg() { + br bool false, label %cond_next196, label %bb12.preheader + +bb12.preheader: + ret void + +cond_next196: + br bool false, label %cond_next330, label %cond_true304 + +cond_true304: + ret void + +cond_next330: + br bool false, label %cond_next472, label %bb441 + +bb441: + ret void + +cond_next472: + %tmp490 = load %struct.tree_node** null + %tmp492 = getelementptr %struct.tree_node* %tmp490, int 0, uint 0, uint 0, uint 3 + %tmp492 = cast ubyte* %tmp492 to uint* + %tmp493 = load uint* %tmp492 + %tmp495 = cast uint %tmp493 to ubyte + %tmp496 = seteq ubyte %tmp495, 11 + %tmp496 = cast bool %tmp496 to sbyte + store sbyte %tmp496, sbyte* null + ret void +} diff --git a/test/CodeGen/X86/2006-10-13-CycleInDAG.ll b/test/CodeGen/X86/2006-10-13-CycleInDAG.ll new file mode 100644 index 0000000..c2b43fb --- /dev/null +++ b/test/CodeGen/X86/2006-10-13-CycleInDAG.ll @@ -0,0 +1,20 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 + +%str = external global [18 x sbyte] + +void %test() { +bb.i: + %tmp.i660 = load <4 x float>* null + call void (int, ...)* %printf( int 0, sbyte* getelementptr ([18 x sbyte]* %str, int 0, uint 0), double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00 ) + %tmp152.i = load <4 x uint>* null + %tmp156.i = cast <4 x uint> %tmp152.i to <4 x int> + %tmp175.i = cast <4 x float> %tmp.i660 to <4 x int> + %tmp176.i = xor <4 x int> %tmp156.i, < int -1, int -1, int -1, int -1 > + %tmp177.i = and <4 x int> %tmp176.i, %tmp175.i + %tmp190.i = or <4 x int> %tmp177.i, zeroinitializer + %tmp191.i = cast <4 x int> %tmp190.i to <4 x float> + store <4 x float> %tmp191.i, <4 x float>* null + ret void +} + +declare void %printf(int, ...) diff --git a/test/CodeGen/X86/2006-10-19-SwitchUnnecessaryBranching.ll b/test/CodeGen/X86/2006-10-19-SwitchUnnecessaryBranching.ll new file mode 100644 index 0000000..f0be2bb --- /dev/null +++ b/test/CodeGen/X86/2006-10-19-SwitchUnnecessaryBranching.ll @@ -0,0 +1,28 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | %prcontext je 1 | \ +; RUN: grep BB1_1: + +%str = internal constant [14 x sbyte] c"Hello world!\0A\00" ; <[14 x sbyte]*> [#uses=1] +%str = internal constant [13 x sbyte] c"Blah world!\0A\00" ; <[13 x sbyte]*> [#uses=1] + +implementation ; Functions: + +int %main(int %argc, sbyte** %argv) { +entry: + switch int %argc, label %UnifiedReturnBlock [ + int 1, label %bb + int 2, label %bb2 + ] + +bb: ; preds = %entry + %tmp1 = tail call int (sbyte*, ...)* %printf( sbyte* getelementptr ([14 x sbyte]* %str, int 0, uint 0) ) ; <int> [#uses=0] + ret int 0 + +bb2: ; preds = %entry + %tmp4 = tail call int (sbyte*, ...)* %printf( sbyte* getelementptr ([13 x sbyte]* %str, int 0, uint 0) ) ; <int> [#uses=0] + ret int 0 + +UnifiedReturnBlock: ; preds = %entry + ret int 0 +} + +declare int %printf(sbyte*, ...) diff --git a/test/CodeGen/X86/2006-11-12-CSRetCC.ll b/test/CodeGen/X86/2006-11-12-CSRetCC.ll new file mode 100644 index 0000000..d65dc18 --- /dev/null +++ b/test/CodeGen/X86/2006-11-12-CSRetCC.ll @@ -0,0 +1,62 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep {subl \$4, %esp} + +target triple = "i686-pc-linux-gnu" + +%str = internal constant [9 x sbyte] c"%f+%f*i\0A\00" ; <[9 x sbyte]*> [#uses=1] + +implementation ; Functions: + +int %main() { +entry: + %retval = alloca int, align 4 ; <int*> [#uses=1] + %tmp = alloca { double, double }, align 16 ; <{ double, double }*> [#uses=4] + %tmp1 = alloca { double, double }, align 16 ; <{ double, double }*> [#uses=4] + %tmp2 = alloca { double, double }, align 16 ; <{ double, double }*> [#uses=3] + %pi = alloca double, align 8 ; <double*> [#uses=2] + %z = alloca { double, double }, align 16 ; <{ double, double }*> [#uses=4] + "alloca point" = cast int 0 to int ; <int> [#uses=0] + store double 0x400921FB54442D18, double* %pi + %tmp = load double* %pi ; <double> [#uses=1] + %real = getelementptr { double, double }* %tmp1, uint 0, uint 0 ; <double*> [#uses=1] + store double 0.000000e+00, double* %real + %real3 = getelementptr { double, double }* %tmp1, uint 0, uint 1 ; <double*> [#uses=1] + store double %tmp, double* %real3 + %tmp = getelementptr { double, double }* %tmp, uint 0, uint 0 ; <double*> [#uses=1] + %tmp4 = getelementptr { double, double }* %tmp1, uint 0, uint 0 ; <double*> [#uses=1] + %tmp5 = load double* %tmp4 ; <double> [#uses=1] + store double %tmp5, double* %tmp + %tmp6 = getelementptr { double, double }* %tmp, uint 0, uint 1 ; <double*> [#uses=1] + %tmp7 = getelementptr { double, double }* %tmp1, uint 0, uint 1 ; <double*> [#uses=1] + %tmp8 = load double* %tmp7 ; <double> [#uses=1] + store double %tmp8, double* %tmp6 + %tmp = cast { double, double }* %tmp to { long, long }* ; <{ long, long }*> [#uses=1] + %tmp = getelementptr { long, long }* %tmp, uint 0, uint 0 ; <long*> [#uses=1] + %tmp = load long* %tmp ; <long> [#uses=1] + %tmp9 = cast { double, double }* %tmp to { long, long }* ; <{ long, long }*> [#uses=1] + %tmp10 = getelementptr { long, long }* %tmp9, uint 0, uint 1 ; <long*> [#uses=1] + %tmp11 = load long* %tmp10 ; <long> [#uses=1] + call csretcc void %cexp( { double, double }* %tmp2, long %tmp, long %tmp11 ) + %tmp12 = getelementptr { double, double }* %z, uint 0, uint 0 ; <double*> [#uses=1] + %tmp13 = getelementptr { double, double }* %tmp2, uint 0, uint 0 ; <double*> [#uses=1] + %tmp14 = load double* %tmp13 ; <double> [#uses=1] + store double %tmp14, double* %tmp12 + %tmp15 = getelementptr { double, double }* %z, uint 0, uint 1 ; <double*> [#uses=1] + %tmp16 = getelementptr { double, double }* %tmp2, uint 0, uint 1 ; <double*> [#uses=1] + %tmp17 = load double* %tmp16 ; <double> [#uses=1] + store double %tmp17, double* %tmp15 + %tmp18 = getelementptr { double, double }* %z, uint 0, uint 1 ; <double*> [#uses=1] + %tmp19 = load double* %tmp18 ; <double> [#uses=1] + %tmp20 = getelementptr { double, double }* %z, uint 0, uint 0 ; <double*> [#uses=1] + %tmp21 = load double* %tmp20 ; <double> [#uses=1] + %tmp = getelementptr [9 x sbyte]* %str, int 0, uint 0 ; <sbyte*> [#uses=1] + %tmp = call int (sbyte*, ...)* %printf( sbyte* %tmp, double %tmp21, double %tmp19 ) ; <int> [#uses=0] + br label %return + +return: ; preds = %entry + %retval = load int* %retval ; <int> [#uses=1] + ret int %retval +} + +declare csretcc void %cexp({ double, double }*, long, long) + +declare int %printf(sbyte*, ...) diff --git a/test/CodeGen/X86/2006-11-17-IllegalMove.ll b/test/CodeGen/X86/2006-11-17-IllegalMove.ll new file mode 100644 index 0000000..141d32c --- /dev/null +++ b/test/CodeGen/X86/2006-11-17-IllegalMove.ll @@ -0,0 +1,42 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86-64 | \ +; RUN: not grep {movb %sil, %ah} +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86-64 | \ +; RUN: grep {movzbw %al, %ax} + +void %handle_vector_size_attribute() { +entry: + %tmp69 = load uint* null ; <uint> [#uses=1] + switch uint %tmp69, label %bb84 [ + uint 2, label %bb77 + uint 1, label %bb77 + ] + +bb77: ; preds = %entry, %entry + %tmp99 = udiv ulong 0, 0 ; <ulong> [#uses=1] + %tmp = load ubyte* null ; <ubyte> [#uses=1] + %tmp114 = seteq ulong 0, 0 ; <bool> [#uses=1] + br bool %tmp114, label %cond_true115, label %cond_next136 + +bb84: ; preds = %entry + ret void + +cond_true115: ; preds = %bb77 + %tmp118 = load ubyte* null ; <ubyte> [#uses=1] + br bool false, label %cond_next129, label %cond_true120 + +cond_true120: ; preds = %cond_true115 + %tmp127 = udiv ubyte %tmp, %tmp118 ; <ubyte> [#uses=1] + %tmp127 = cast ubyte %tmp127 to ulong ; <ulong> [#uses=1] + br label %cond_next129 + +cond_next129: ; preds = %cond_true120, %cond_true115 + %iftmp.30.0 = phi ulong [ %tmp127, %cond_true120 ], [ 0, %cond_true115 ] ; <ulong> [#uses=1] + %tmp132 = seteq ulong %iftmp.30.0, %tmp99 ; <bool> [#uses=1] + br bool %tmp132, label %cond_false148, label %cond_next136 + +cond_next136: ; preds = %cond_next129, %bb77 + ret void + +cond_false148: ; preds = %cond_next129 + ret void +} diff --git a/test/CodeGen/X86/2006-11-27-SelectLegalize.ll b/test/CodeGen/X86/2006-11-27-SelectLegalize.ll new file mode 100644 index 0000000..5cebff5 --- /dev/null +++ b/test/CodeGen/X86/2006-11-27-SelectLegalize.ll @@ -0,0 +1,8 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep test.*1 +; PR1016 + +int %test(int %A, int %B, int %C) { + %a = trunc int %A to bool + %D = select bool %a, int %B, int %C + ret int %D +} diff --git a/test/CodeGen/X86/2006-11-28-Memcpy.ll b/test/CodeGen/X86/2006-11-28-Memcpy.ll new file mode 100644 index 0000000..f5a2a8f --- /dev/null +++ b/test/CodeGen/X86/2006-11-28-Memcpy.ll @@ -0,0 +1,35 @@ +; PR1022, PR1023 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | \ +; RUN: grep 3721182122 | wc -l | grep 2 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | \ +; RUN: grep -E {movl _?bytes2} | wc -l | grep 1 + +%fmt = constant [4 x sbyte] c"%x\0A\00" +%bytes = constant [4 x sbyte] c"\AA\BB\CC\DD" +%bytes2 = global [4 x sbyte] c"\AA\BB\CC\DD" + + +int %test1() { + %y = alloca uint + %c = cast uint* %y to sbyte* + %z = getelementptr [4 x sbyte]* %bytes, int 0, int 0 + call void %llvm.memcpy.i32( sbyte* %c, sbyte* %z, uint 4, uint 1 ) + %r = load uint* %y + %t = cast [4 x sbyte]* %fmt to sbyte* + %tmp = call int (sbyte*, ...)* %printf( sbyte* %t, uint %r ) + ret int 0 +} + +void %test2() { + %y = alloca uint + %c = cast uint* %y to sbyte* + %z = getelementptr [4 x sbyte]* %bytes2, int 0, int 0 + call void %llvm.memcpy.i32( sbyte* %c, sbyte* %z, uint 4, uint 1 ) + %r = load uint* %y + %t = cast [4 x sbyte]* %fmt to sbyte* + %tmp = call int (sbyte*, ...)* %printf( sbyte* %t, uint %r ) + ret void +} + +declare void %llvm.memcpy.i32(sbyte*, sbyte*, uint, uint) +declare int %printf(sbyte*, ...) diff --git a/test/CodeGen/X86/2006-12-19-IntelSyntax.ll b/test/CodeGen/X86/2006-12-19-IntelSyntax.ll new file mode 100644 index 0000000..6985bd0 --- /dev/null +++ b/test/CodeGen/X86/2006-12-19-IntelSyntax.ll @@ -0,0 +1,91 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel +; PR1061 + +target datalayout = "e-p:32:32" +target endian = little +target pointersize = 32 +target triple = "i686-pc-linux-gnu" + +implementation ; Functions: + +void %bar(uint %n) { +entry: + switch uint %n, label %bb12 [ + uint 1, label %bb + uint 2, label %bb6 + uint 4, label %bb7 + uint 5, label %bb8 + uint 6, label %bb10 + uint 7, label %bb1 + uint 8, label %bb3 + uint 9, label %bb4 + uint 10, label %bb9 + uint 11, label %bb2 + uint 12, label %bb5 + uint 13, label %bb11 + ] + +bb: ; preds = %entry + call void (...)* %foo1( ) + ret void + +bb1: ; preds = %entry + call void (...)* %foo2( ) + ret void + +bb2: ; preds = %entry + call void (...)* %foo6( ) + ret void + +bb3: ; preds = %entry + call void (...)* %foo3( ) + ret void + +bb4: ; preds = %entry + call void (...)* %foo4( ) + ret void + +bb5: ; preds = %entry + call void (...)* %foo5( ) + ret void + +bb6: ; preds = %entry + call void (...)* %foo1( ) + ret void + +bb7: ; preds = %entry + call void (...)* %foo2( ) + ret void + +bb8: ; preds = %entry + call void (...)* %foo6( ) + ret void + +bb9: ; preds = %entry + call void (...)* %foo3( ) + ret void + +bb10: ; preds = %entry + call void (...)* %foo4( ) + ret void + +bb11: ; preds = %entry + call void (...)* %foo5( ) + ret void + +bb12: ; preds = %entry + call void (...)* %foo6( ) + ret void +} + +declare void %foo1(...) + +declare void %foo2(...) + +declare void %foo6(...) + +declare void %foo3(...) + +declare void %foo4(...) + +declare void %foo5(...) diff --git a/test/CodeGen/X86/2007-01-08-InstrSched.ll b/test/CodeGen/X86/2007-01-08-InstrSched.ll new file mode 100644 index 0000000..a0edd95 --- /dev/null +++ b/test/CodeGen/X86/2007-01-08-InstrSched.ll @@ -0,0 +1,14 @@ +; PR1075 +; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | \ +; RUN: %prcontext {mulss LCPI1_3} 1 | grep mulss | wc -l | grep 1 + +define float @foo(float %x) { + %tmp1 = mul float %x, 3.000000e+00 + %tmp3 = mul float %x, 5.000000e+00 + %tmp5 = mul float %x, 7.000000e+00 + %tmp7 = mul float %x, 1.100000e+01 + %tmp10 = add float %tmp1, %tmp3 + %tmp12 = add float %tmp10, %tmp5 + %tmp14 = add float %tmp12, %tmp7 + ret float %tmp14 +} diff --git a/test/CodeGen/X86/2007-01-13-StackPtrIndex.ll b/test/CodeGen/X86/2007-01-13-StackPtrIndex.ll new file mode 100644 index 0000000..7e77cce --- /dev/null +++ b/test/CodeGen/X86/2007-01-13-StackPtrIndex.ll @@ -0,0 +1,461 @@ +; RUN: llvm-as < %s | llc -march=x86-64 -pre-RA-sched=none | grep leaq +; RUN: llvm-as < %s | llc -march=x86-64 -pre-RA-sched=none | not grep {,%rsp)} +; PR1103 + +target datalayout = "e-p:64:64" +@i6000 = global [128 x i64] zeroinitializer, align 16 + + +define void @foo(i32* %a0, i32* %a1, i32* %a2, i32* %a3, i32* %a4, i32* %a5) { +b: + %r = load i32* %a0 + %r2 = load i32* %a1 + %r4 = load i32* %a2 + %r6 = load i32* %a3 + %r8 = load i32* %a4 + %r14 = load i32* %a5 + %rx = sext i32 %r2 to i64 + %r9 = sext i32 %r to i64 + %r11 = add i64 %rx, 0 + %ras = icmp slt i64 %r11, 0 + %r12 = select i1 %ras, i64 0, i64 %r11 + %r16 = sext i32 %r14 to i64 + %r17 = sext i32 %r8 to i64 + %r18 = sub i64 %r16, 0 + %r19 = add i64 %r18, 0 + %r20 = icmp slt i64 %r19, 0 + %r19h = add i64 %r18, 0 + %r22 = select i1 %r20, i64 1, i64 %r19h + %r23 = mul i64 %r22, 0 + %r23a = trunc i64 %r23 to i32 + %r24 = shl i32 %r23a, 0 + %r25 = add i32 %r24, 0 + %ras2 = alloca i8, i32 %r25, align 16 + %r28 = getelementptr i8* %ras2, i32 0 + %r38 = shl i64 %r12, 0 + %s2013 = add i64 %r38, 0 + %c22012 = getelementptr i8* %ras2, i64 %s2013 + %r42 = shl i64 %r12, 0 + %s2011 = add i64 %r42, 16 + %c22010 = getelementptr i8* %ras2, i64 %s2011 + %r50 = add i64 %r16, 0 + %r51 = icmp slt i64 %r50, 0 + %r50sh = shl i64 %r50, 0 + %r50j = add i64 %r50sh, 0 + %r54 = select i1 %r51, i64 0, i64 %r50j + %r56 = mul i64 %r54, %r12 + %r28s = add i64 %r56, 16 + %c2 = getelementptr i8* %ras2, i64 %r28s + %r60 = sub i32 %r2, %r + %r61 = icmp slt i32 %r60, 0 + br i1 %r61, label %a29b, label %b63 +a29b: + %r155 = sub i32 %r6, %r4 + %r156 = icmp slt i32 %r155, 0 + br i1 %r156, label %a109b, label %b158 +b63: + %r66 = sext i32 %r60 to i64 + %r67 = add i64 %r66, 0 + %r76 = mul i64 %r17, 0 + %r82 = add i64 %r76, 0 + %r84 = icmp slt i64 %r67, 0 + br i1 %r84, label %b85, label %a25b +b85: + %e641 = phi i64 [ 0, %b63 ], [ %r129, %a25b ] + %r137 = icmp slt i64 %e641, 0 + br i1 %r137, label %a25b140q, label %a29b +a25b140q: + br label %a25b140 +a25b: + %w1989 = phi i64 [ 0, %b63 ], [ %v1990, %a25b ] + %e642 = shl i64 %w1989, 0 + %r129 = add i64 %e642, 0 + %r132 = add i64 %e642, 0 + %r134 = icmp slt i64 %r132, 0 + %v1990 = add i64 %w1989, 0 + br i1 %r134, label %b85, label %a25b +a25b140: + %w1982 = phi i64 [ 0, %a25b140q ], [ %v1983, %a25b140 ] + %r145 = add i64 %r82, 0 + %v1983 = add i64 %w1982, 0 + %u1987 = icmp slt i64 %v1983, 0 + br i1 %u1987, label %a29b, label %a25b140 +b158: + %r161 = sext i32 %r to i64 + %r163 = sext i32 %r4 to i64 + br label %a29b173 +a29b173: + %w1964 = phi i64 [ 0, %b158 ], [ %v1973, %b1606 ] + %b1974 = mul i64 %r163, 0 + %b1975 = add i64 %r161, 0 + %b1976 = mul i64 %w1964, 0 + %b1977 = add i64 %b1976, 0 + %s761 = bitcast i64 %b1977 to i64 + %b1980 = mul i64 %w1964, 0 + %s661 = add i64 %b1980, 0 + br i1 %r61, label %a33b, label %b179 +a33b: + %r328 = icmp slt i32 %r14, 0 + %r335 = or i1 %r328, %r61 + br i1 %r335, label %a50b, label %b341 +b179: + %r182 = sext i32 %r60 to i64 + %r183 = add i64 %r182, 0 + %r187 = icmp slt i64 %r183, 0 + br i1 %r187, label %b188, label %a30b +b188: + %e653 = phi i64 [ 0, %b179 ], [ %r283, %a30b ] + %r291 = icmp slt i64 %e653, 0 + br i1 %r291, label %a30b294q, label %a33b +a30b294q: + br label %a30b294 +a30b: + %w = phi i64 [ 0, %b179 ], [ %v, %a30b ] + %b2 = shl i64 %w, 0 + %r283 = add i64 %b2, 0 + %r286 = add i64 %b2, 0 + %r288 = icmp slt i64 %r286, 0 + %v = add i64 %w, 0 + br i1 %r288, label %b188, label %a30b +a30b294: + %w1847 = phi i64 [ 0, %a30b294q ], [ %v1848, %a30b294 ] + %v1848 = add i64 %w1847, 0 + %u = icmp slt i64 %v1848, 0 + br i1 %u, label %a33b, label %a30b294 +a50b: + %r814 = add i32 %r14, 0 + %r815 = icmp slt i32 %r814, 0 + %r817 = or i1 %r61, %r815 + br i1 %r817, label %a57b, label %b820 +b341: + %w1874 = phi i64 [ 0, %a33b ], [ %v1880, %b463 ] + %d753 = bitcast i64 %w1874 to i64 + %r343 = add i64 %s661, 0 + %r346 = add i64 %r343, 0 + %r347 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r346 + %r348 = load float* %r347 + %r352 = add i64 %r343, 0 + %r353 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r352 + %r354 = load float* %r353 + %r362 = load float* bitcast ([128 x i64]* @i6000 to float*) + %r363 = add float 0.000000e+00, %r362 + %r370 = load float* bitcast ([128 x i64]* @i6000 to float*) + %r376 = icmp slt i64 %r16, 0 + br i1 %r376, label %b377, label %a35b +b377: + %d753p = phi i64 [ %d753, %b341 ], [ %r411, %a35b ] + %s761p = phi i64 [ %s761, %b341 ], [ 322, %a35b ] + %e784 = phi i64 [ 0, %b341 ], [ %r454, %a35b ] + %s794 = add i64 %d753p, 0 + %r462 = icmp slt i64 %e784, 0 + br i1 %r462, label %a35b465, label %b463 +a35b: + %w1865 = phi i64 [ 0, %b341 ], [ %v1866, %a35b ] + %e785 = shl i64 %w1865, 0 + %b1877 = mul i64 %w1865, 0 + %s795 = add i64 %b1877, 0 + %r399 = add float %r354, 0.000000e+00 + %r402 = add float %r370, 0.000000e+00 + %r403 = add float %r348, 0.000000e+00 + %r411 = add i64 %s795, 0 + %r431 = add float %r362, 0.000000e+00 + %r454 = add i64 %e785, 0 + %r457 = add i64 %e785, 0 + %r459 = icmp slt i64 %r457, 0 + %v1866 = add i64 %w1865, 0 + br i1 %r459, label %b377, label %a35b +b463: + %r506 = add i64 %d753, 0 + %r511 = sext i32 %r60 to i64 + %r512 = add i64 %r511, 0 + %r513 = icmp slt i64 %r506, 0 + %v1880 = add i64 %w1874, 0 + br i1 %r513, label %b341, label %b514 +a35b465: + %r469 = add i64 %s794, 0 + br label %b463 +b514: + %r525 = mul i64 %r17, 0 + %r533 = add i64 %r525, 0 + br label %b535 +b535: + %w1855 = phi i64 [ 0, %b514 ], [ %v1856, %b712 ] + %s923 = phi i64 [ 0, %b514 ], [ %r799, %b712 ] + %s933 = phi i64 [ %r533, %b514 ], [ %r795, %b712 ] + %r538 = add i64 %w1855, 0 + %r539 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r538 + %r540 = load float* %r539 + %r551 = load float* bitcast ([128 x i64]* @i6000 to float*) + %r562 = sub i64 %s933, 0 + %r564 = icmp slt i64 %r512, 0 + br i1 %r564, label %b565, label %a45b +b565: + %e944 = phi i64 [ 0, %b535 ], [ %r703, %a45b ] + %r711 = icmp slt i64 %e944, 0 + br i1 %r711, label %a45b714, label %b712 +a45b: + %w1852 = phi i64 [ 0, %b535 ], [ %v1853, %a45b ] + %e945 = shl i64 %w1852, 0 + %r609 = add i64 %r562, 0 + %r703 = add i64 %e945, 0 + %r706 = add i64 %e945, 0 + %r708 = icmp slt i64 %r706, 0 + %v1853 = add i64 %w1852, 0 + br i1 %r708, label %b565, label %a45b +b712: + %r795 = add i64 %rx, 0 + %r799 = add i64 %s923, 0 + %r802 = add i64 %w1855, 0 + %r807 = icmp slt i64 %r802, 0 + %v1856 = add i64 %w1855, 0 + br i1 %r807, label %b535, label %a50b +a45b714: + %r717 = add i64 %e944, 0 + %r720 = add i64 %r717, 0 + %r721 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r720 + %r722 = load float* %r721 + %r726 = add i64 %r717, 0 + %r727 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r726 + %r728 = load float* %r727 + %r732 = add i64 %r717, 0 + %r733 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r732 + %r734 = load float* %r733 + %r738 = add i64 %r717, 0 + %r739 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r738 + %r740 = load float* %r739 + %r744 = add i64 %r717, 0 + %r745 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r744 + %r746 = load float* %r745 + %r750 = add i64 %r717, 0 + %r751 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r750 + %r752 = load float* %r751 + %r753 = add float %r752, %r746 + %r754 = add float %r728, %r722 + %r755 = add float %r734, %r754 + %r756 = add float %r755, %r740 + %r757 = add float %r753, %r756 + %r759 = add float %r757, %r540 + %r770 = add i64 %r717, 0 + %r771 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r770 + %r772 = load float* %r771 + %r776 = add i64 %r717, 0 + %r777 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r776 + %r778 = load float* %r777 + %r781 = add float %r363, %r772 + %r782 = add float %r781, %r778 + %r783 = add float %r551, %r782 + br label %b712 +a57b: + br i1 %r335, label %a66b, label %b1086 +b820: + %r823 = sext i32 %r2 to i64 + %r834 = sext i32 %r8 to i64 + %r844 = add i64 %r16, 0 + %r846 = sext i32 %r60 to i64 + %r847 = add i64 %r846, 0 + %r851 = load float* bitcast ([128 x i64]* @i6000 to float*) + %r856 = sub i64 %rx, 0 + br label %b858 +b858: + %w1891 = phi i64 [ 0, %b820 ], [ %v1892, %b1016 ] + %s1193 = phi i64 [ 0, %b820 ], [ %r1068, %b1016 ] + %b1894 = mul i64 %r834, 0 + %b1896 = shl i64 %r823, 0 + %b1902 = mul i64 %w1891, 0 + %s1173 = add i64 %b1902, 0 + %r859 = add i64 %r856, 0 + %r862 = add i64 %w1891, 0 + %r863 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r862 + %r864 = load float* %r863 + %r868 = add i64 %w1891, 0 + %r869 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r868 + %r870 = load float* %r869 + %r873 = sub i64 %r859, 0 + %r876 = sub i64 %s1173, 0 + %r878 = icmp slt i64 %r847, 0 + br i1 %r878, label %b879, label %a53b +b879: + %e1204 = phi i64 [ 0, %b858 ], [ %r1007, %a53b ] + %r1015 = icmp slt i64 %e1204, 0 + br i1 %r1015, label %a53b1019q, label %b1016 +a53b1019q: + %b1888 = sub i64 %r846, 0 + %b1889 = add i64 %b1888, 0 + br label %a53b1019 +a53b: + %w1881 = phi i64 [ 0, %b858 ], [ %v1882, %a53b ] + %e1205 = shl i64 %w1881, 0 + %r1007 = add i64 %e1205, 0 + %r1010 = add i64 %e1205, 0 + %r1012 = icmp slt i64 %r1010, 0 + %v1882 = add i64 %w1881, 0 + br i1 %r1012, label %b879, label %a53b +b1016: + %r1068 = add i64 %s1193, 0 + %r1071 = add i64 %w1891, 0 + %r1073 = icmp slt i64 %r1071, %r844 + %v1892 = add i64 %w1891, 0 + br i1 %r1073, label %b858, label %a57b +a53b1019: + %w1885 = phi i64 [ 0, %a53b1019q ], [ %v1886, %a53b1019 ] + %r1022 = add i64 %r876, 0 + %r1024 = bitcast i8* %c2 to float* + %r1025 = add i64 %r1022, 0 + %r1026 = getelementptr float* %r1024, i64 %r1025 + %r1027 = load float* %r1026 + %r1032 = add i64 %r873, 0 + %r1033 = add i64 %r1032, 0 + %r1034 = getelementptr float* %r1024, i64 %r1033 + %r1035 = load float* %r1034 + %r1037 = bitcast i8* %c22010 to float* + %r1040 = getelementptr float* %r1037, i64 %r1025 + %r1044 = add float %r864, %r1035 + %r1046 = add float %r870, %r1027 + %r1047 = add float %r1044, %r1046 + %r1048 = add float %r851, %r1047 + %v1886 = add i64 %w1885, 0 + %u1890 = icmp slt i64 %v1886, %b1889 + br i1 %u1890, label %b1016, label %a53b1019 +a66b: + br i1 %r817, label %a93b, label %b1321 +b1086: + %r1089 = sext i32 %r2 to i64 + %r1090 = add i64 %rx, 0 + %r1096 = mul i64 %r9, 0 + %r1101 = sext i32 %r8 to i64 + %r1104 = add i64 %r1096, 0 + %r1108 = sub i64 %r1104, 0 + %r1110 = sext i32 %r60 to i64 + %r1111 = add i64 %r1110, 0 + %r1113 = sext i32 %r14 to i64 + %r1114 = add i64 %r16, 0 + br label %b1117 +b1117: + %w1915 = phi i64 [ 0, %b1086 ], [ %v1957, %b1263 ] + %d1353 = bitcast i64 %w1915 to i64 + %r1120 = add i64 %s661, 0 + %r1121 = add i64 %r1120, 0 + %r1122 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r1121 + %r1123 = load float* %r1122 + %r1132 = bitcast i8* %c22012 to float* + %r1134 = getelementptr float* %r1132, i64 %w1915 + %r1135 = load float* %r1134 + %r1136 = add float %r1123, %r1135 + %r1138 = icmp slt i64 %r1114, 0 + br i1 %r1138, label %b1139, label %a63b +b1139: + %e1364 = phi i64 [ 0, %b1117 ], [ %r1254, %a63b ] + %p1998 = phi i64 [ %s761, %b1117 ], [ %r1216, %a63b ] + %r1108p = phi i64 [ %r1108, %b1117 ], [ %r1219, %a63b ] + %p2004 = phi i64 [ %d1353, %b1117 ], [ %r1090, %a63b ] + %s1374 = phi i64 [ 0, %b1117 ], [ %r1251, %a63b ] + %s1384 = add i64 %r1108p, 0 + %s1394 = add i64 %p1998, 0 + %r1262 = icmp slt i64 %e1364, %r1114 + br i1 %r1262, label %a63b1266q, label %b1263 +a63b1266q: + %b1947 = sub i64 %r1113, 0 + %b1948 = add i64 %b1947, 0 + br label %a63b1266 +a63b: + %w1904 = phi i64 [ 0, %b1117 ], [ %v1905, %a63b ] + %s1375 = phi i64 [ 0, %b1117 ], [ %r1251, %a63b ] + %b1906 = add i64 %r1089, 0 + %b1907 = mul i64 %r1101, 0 + %b1929 = mul i64 %w1904, 0 + %s1395 = add i64 %b1929, 0 + %e1365 = shl i64 %w1904, 0 + %r1163 = add i64 %r1090, 0 + %r1167 = add i64 %s1375, 0 + %r1191 = add i64 %r1163, 0 + %r1195 = add i64 %r1167, 0 + %r1216 = add i64 %s1395, 0 + %r1219 = add i64 %r1191, 0 + %r1223 = add i64 %r1195, 0 + %r1251 = add i64 %r1223, 0 + %r1254 = add i64 %e1365, 0 + %r1257 = add i64 %e1365, 0 + %r1259 = icmp slt i64 %r1257, %r1114 + %v1905 = add i64 %w1904, 0 + br i1 %r1259, label %b1139, label %a63b +b1263: + %r1306 = add i64 %d1353, 0 + %r1308 = icmp slt i64 %r1306, %r1111 + %v1957 = add i64 %w1915, 0 + br i1 %r1308, label %b1117, label %a66b +a63b1266: + %w1944 = phi i64 [ 0, %a63b1266q ], [ %v1945, %a63b1266 ] + %s1377 = phi i64 [ %s1374, %a63b1266q ], [ %r1297, %a63b1266 ] + %r1282 = add float %r1136, 0.000000e+00 + %r1297 = add i64 %s1377, 0 + %v1945 = add i64 %w1944, 0 + %u1949 = icmp slt i64 %v1945, %b1948 + br i1 %u1949, label %b1263, label %a63b1266 +a93b: + br i1 %r61, label %b1606, label %a97b +b1321: + %r1331 = mul i64 %r17, 0 + %r1339 = add i64 %r1331, 0 + br label %b1342 +b1342: + %w1960 = phi i64 [ 0, %b1321 ], [ %v1961, %b1582 ] + %s1523 = phi i64 [ %r1339, %b1321 ], [ %r1587, %b1582 ] + %s1563 = phi i64 [ 0, %b1321 ], [ %r1591, %b1582 ] + %d1533 = bitcast i64 %w1960 to i64 + %b1968 = mul i64 %w1960, 0 + %s1543 = add i64 %b1968, 0 + %r1345 = add i64 %s1523, 0 + %r1348 = sub i64 %r1345, 0 + %r1352 = add i64 %s1523, 0 + %r1355 = sub i64 %r1352, 0 + %r1370 = add i64 %d1533, 0 + %r1371 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r1370 + %r1372 = load float* %r1371 + br label %a74b +a74b: + %w1958 = phi i64 [ 0, %b1342 ], [ %v1959, %a74b ] + %r1379 = add i64 %s1543, 0 + %r1403 = add i64 %r1355, 0 + %r1422 = add i64 %r1348, 0 + %r1526 = add float %r1372, 0.000000e+00 + %r1573 = add i64 %w1958, 0 + %r1581 = icmp slt i64 %r1573, 0 + %v1959 = add i64 %w1958, 0 + br i1 %r1581, label %a74b, label %b1582 +b1582: + %r1587 = add i64 %rx, 0 + %r1591 = add i64 %s1563, 0 + %r1596 = add i64 %d1533, 0 + %r1601 = icmp slt i64 %r1596, 0 + %v1961 = add i64 %w1960, 0 + br i1 %r1601, label %b1342, label %a93b +b1606: + %r1833 = add i64 %w1964, 0 + %r1840 = icmp slt i64 %r1833, 0 + %v1973 = add i64 %w1964, 0 + br i1 %r1840, label %a29b173, label %a109b +a97b: + %w1970 = phi i64 [ 0, %a93b ], [ %v1971, %a97b ] + %r1613 = add i64 %w1964, 0 + %r1614 = mul i64 %r1613, 0 + %r1622 = add i64 %r1614, 0 + %r1754 = bitcast i8* %r28 to float* + %r1756 = getelementptr float* %r1754, i64 %w1970 + %r1757 = load float* %r1756 + %r1761 = add i64 %r1622, 0 + %r1762 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r1761 + %r1763 = load float* %r1762 + %r1767 = add i64 %r1622, 0 + %r1768 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r1767 + %r1772 = add float %r1763, 0.000000e+00 + %r1773 = add float %r1772, 0.000000e+00 + %r1809 = add float %r1757, 0.000000e+00 + %r1810 = add float %r1773, %r1809 + store float %r1810, float* %r1768 + %r1818 = add i64 %w1970, 0 + %r1826 = icmp slt i64 %r1818, 0 + %v1971 = add i64 %w1970, 0 + br i1 %r1826, label %a97b, label %b1606 +a109b: + ret void +} diff --git a/test/CodeGen/X86/2007-01-29-InlineAsm-ir.ll b/test/CodeGen/X86/2007-01-29-InlineAsm-ir.ll new file mode 100644 index 0000000..b1c86f4 --- /dev/null +++ b/test/CodeGen/X86/2007-01-29-InlineAsm-ir.ll @@ -0,0 +1,7 @@ +; RUN: llvm-as < %s | llc -march=x86 +; Test 'ri' constraint. + +define void @run_init_process() { + %tmp = call i32 asm sideeffect "push %ebx ; movl $2,%ebx ; int $$0x80 ; pop %ebx", "={ax},0,ri,{cx},{dx},~{dirflag},~{fpsr},~{flags},~{memory}"( i32 11, i32 0, i32 0, i32 0 ) + unreachable + } diff --git a/test/CodeGen/X86/2007-02-04-OrAddrMode.ll b/test/CodeGen/X86/2007-02-04-OrAddrMode.ll new file mode 100644 index 0000000..cadba5b --- /dev/null +++ b/test/CodeGen/X86/2007-02-04-OrAddrMode.ll @@ -0,0 +1,21 @@ +; RUN: llvm-as < %s | llc -march=x86 | grep {orl \$1, %eax} +; RUN: llvm-as < %s | llc -march=x86 | grep {leal 3(,%eax,8)} + +;; This example can't fold the or into an LEA. +define i32 @test(float ** %tmp2, i32 %tmp12) { + %tmp3 = load float** %tmp2 + %tmp132 = shl i32 %tmp12, 2 ; <i32> [#uses=1] + %tmp4 = bitcast float* %tmp3 to i8* ; <i8*> [#uses=1] + %ctg2 = getelementptr i8* %tmp4, i32 %tmp132 ; <i8*> [#uses=1] + %tmp6 = ptrtoint i8* %ctg2 to i32 ; <i32> [#uses=1] + %tmp14 = or i32 %tmp6, 1 ; <i32> [#uses=1] + ret i32 %tmp14 +} + + +;; This can! +define i32 @test2(i32 %a, i32 %b) { + %c = shl i32 %a, 3 + %d = or i32 %c, 3 + ret i32 %d +} diff --git a/test/CodeGen/X86/2007-02-19-LiveIntervalAssert.ll b/test/CodeGen/X86/2007-02-19-LiveIntervalAssert.ll new file mode 100644 index 0000000..365768a --- /dev/null +++ b/test/CodeGen/X86/2007-02-19-LiveIntervalAssert.ll @@ -0,0 +1,21 @@ +; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-pc-linux-gnu -relocation-model=pic +; PR1027 + + %struct._IO_FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct._IO_FILE*, i32, i32, i32, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i8*, i8*, i32, i32, [40 x i8] } + %struct._IO_marker = type { %struct._IO_marker*, %struct._IO_FILE*, i32 } +@stderr = external global %struct._IO_FILE* + +define void @__eprintf(i8* %string, i8* %expression, i32 %line, i8* %filename) { + %tmp = load %struct._IO_FILE** @stderr + %tmp5 = tail call i32 (%struct._IO_FILE*, i8*, ...)* @fprintf( %struct._IO_FILE* %tmp, i8* %string, i8* %expression, i32 %line, i8* %filename ) + %tmp6 = load %struct._IO_FILE** @stderr + %tmp7 = tail call i32 @fflush( %struct._IO_FILE* %tmp6 ) + tail call void @abort( ) + unreachable +} + +declare i32 @fprintf(%struct._IO_FILE*, i8*, ...) + +declare i32 @fflush(%struct._IO_FILE*) + +declare void @abort() diff --git a/test/CodeGen/X86/2007-02-25-FastCCStack.ll b/test/CodeGen/X86/2007-02-25-FastCCStack.ll new file mode 100644 index 0000000..3b1eb1f --- /dev/null +++ b/test/CodeGen/X86/2007-02-25-FastCCStack.ll @@ -0,0 +1,5 @@ +; RUN: llvm-as < %s | llc -march=x86 -mcpu=pentium3 + +define internal fastcc double @ggc_rlimit_bound(double %limit) { + ret double %limit +} diff --git a/test/CodeGen/X86/2007-03-01-SpillerCrash.ll b/test/CodeGen/X86/2007-03-01-SpillerCrash.ll new file mode 100644 index 0000000..2d11bfb1 --- /dev/null +++ b/test/CodeGen/X86/2007-03-01-SpillerCrash.ll @@ -0,0 +1,85 @@ +; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin8 -mattr=+sse2 + +define void @test() { +test.exit: + mul <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:0 [#uses=4] + load <4 x float>* null ; <<4 x float>>:1 [#uses=1] + shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x float>>:2 [#uses=1] + mul <4 x float> %0, %2 ; <<4 x float>>:3 [#uses=1] + sub <4 x float> zeroinitializer, %3 ; <<4 x float>>:4 [#uses=1] + mul <4 x float> %4, zeroinitializer ; <<4 x float>>:5 [#uses=2] + bitcast <4 x float> zeroinitializer to <4 x i32> ; <<4 x i32>>:6 [#uses=1] + and <4 x i32> %6, < i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647 > ; <<4 x i32>>:7 [#uses=1] + bitcast <4 x i32> %7 to <4 x float> ; <<4 x float>>:8 [#uses=2] + extractelement <4 x float> %8, i32 0 ; <float>:9 [#uses=1] + extractelement <4 x float> %8, i32 1 ; <float>:10 [#uses=2] + br i1 false, label %11, label %19 + +; <label>:11 ; preds = %test.exit + br i1 false, label %17, label %12 + +; <label>:12 ; preds = %11 + br i1 false, label %19, label %13 + +; <label>:13 ; preds = %12 + sub float -0.000000e+00, 0.000000e+00 ; <float>:14 [#uses=1] + %tmp207 = extractelement <4 x float> zeroinitializer, i32 0 ; <float> [#uses=1] + %tmp208 = extractelement <4 x float> zeroinitializer, i32 2 ; <float> [#uses=1] + sub float -0.000000e+00, %tmp208 ; <float>:15 [#uses=1] + %tmp155 = extractelement <4 x float> zeroinitializer, i32 0 ; <float> [#uses=1] + %tmp156 = extractelement <4 x float> zeroinitializer, i32 2 ; <float> [#uses=1] + sub float -0.000000e+00, %tmp156 ; <float>:16 [#uses=1] + br label %19 + +; <label>:17 ; preds = %11 + br i1 false, label %19, label %18 + +; <label>:18 ; preds = %17 + br label %19 + +; <label>:19 ; preds = %18, %17, %13, %12, %test.exit + phi i32 [ 5, %18 ], [ 3, %13 ], [ 1, %test.exit ], [ 2, %12 ], [ 4, %17 ] ; <i32>:20 [#uses=0] + phi float [ 0.000000e+00, %18 ], [ %16, %13 ], [ 0.000000e+00, %test.exit ], [ 0.000000e+00, %12 ], [ 0.000000e+00, %17 ] ; <float>:21 [#uses=1] + phi float [ 0.000000e+00, %18 ], [ %tmp155, %13 ], [ 0.000000e+00, %test.exit ], [ 0.000000e+00, %12 ], [ 0.000000e+00, %17 ] ; <float>:22 [#uses=1] + phi float [ 0.000000e+00, %18 ], [ %15, %13 ], [ 0.000000e+00, %test.exit ], [ 0.000000e+00, %12 ], [ 0.000000e+00, %17 ] ; <float>:23 [#uses=1] + phi float [ 0.000000e+00, %18 ], [ %tmp207, %13 ], [ 0.000000e+00, %test.exit ], [ 0.000000e+00, %12 ], [ 0.000000e+00, %17 ] ; <float>:24 [#uses=1] + phi float [ 0.000000e+00, %18 ], [ %10, %13 ], [ %9, %test.exit ], [ %10, %12 ], [ 0.000000e+00, %17 ] ; <float>:25 [#uses=2] + phi float [ 0.000000e+00, %18 ], [ %14, %13 ], [ 0.000000e+00, %test.exit ], [ 0.000000e+00, %12 ], [ 0.000000e+00, %17 ] ; <float>:26 [#uses=1] + phi float [ 0.000000e+00, %18 ], [ 0.000000e+00, %13 ], [ 0.000000e+00, %test.exit ], [ 0.000000e+00, %12 ], [ 0.000000e+00, %17 ] ; <float>:27 [#uses=1] + insertelement <4 x float> undef, float %27, i32 0 ; <<4 x float>>:28 [#uses=1] + insertelement <4 x float> %28, float %26, i32 1 ; <<4 x float>>:29 [#uses=0] + insertelement <4 x float> undef, float %24, i32 0 ; <<4 x float>>:30 [#uses=1] + insertelement <4 x float> %30, float %23, i32 1 ; <<4 x float>>:31 [#uses=1] + insertelement <4 x float> %31, float %25, i32 2 ; <<4 x float>>:32 [#uses=1] + insertelement <4 x float> %32, float %25, i32 3 ; <<4 x float>>:33 [#uses=1] + fdiv <4 x float> %33, zeroinitializer ; <<4 x float>>:34 [#uses=1] + mul <4 x float> %34, < float 5.000000e-01, float 5.000000e-01, float 5.000000e-01, float 5.000000e-01 > ; <<4 x float>>:35 [#uses=1] + insertelement <4 x float> undef, float %22, i32 0 ; <<4 x float>>:36 [#uses=1] + insertelement <4 x float> %36, float %21, i32 1 ; <<4 x float>>:37 [#uses=0] + br i1 false, label %foo.exit, label %38 + +; <label>:38 ; preds = %19 + extractelement <4 x float> %0, i32 0 ; <float>:39 [#uses=1] + fcmp ogt float %39, 0.000000e+00 ; <i1>:40 [#uses=1] + extractelement <4 x float> %0, i32 2 ; <float>:41 [#uses=1] + extractelement <4 x float> %0, i32 1 ; <float>:42 [#uses=1] + sub float -0.000000e+00, %42 ; <float>:43 [#uses=2] + %tmp189 = extractelement <4 x float> %5, i32 2 ; <float> [#uses=1] + br i1 %40, label %44, label %46 + +; <label>:44 ; preds = %38 + sub float -0.000000e+00, %tmp189 ; <float>:45 [#uses=0] + br label %foo.exit + +; <label>:46 ; preds = %38 + %tmp192 = extractelement <4 x float> %5, i32 1 ; <float> [#uses=1] + sub float -0.000000e+00, %tmp192 ; <float>:47 [#uses=1] + br label %foo.exit + +foo.exit: ; preds = %46, %44, %19 + phi float [ 0.000000e+00, %44 ], [ %47, %46 ], [ 0.000000e+00, %19 ] ; <float>:48 [#uses=0] + phi float [ %43, %44 ], [ %43, %46 ], [ 0.000000e+00, %19 ] ; <float>:49 [#uses=0] + phi float [ 0.000000e+00, %44 ], [ %41, %46 ], [ 0.000000e+00, %19 ] ; <float>:50 [#uses=0] + shufflevector <4 x float> %35, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 4, i32 1, i32 5 > ; <<4 x float>>:51 [#uses=0] + unreachable +} diff --git a/test/CodeGen/X86/2007-03-15-GEP-Idx-Sink.ll b/test/CodeGen/X86/2007-03-15-GEP-Idx-Sink.ll new file mode 100644 index 0000000..4083a24 --- /dev/null +++ b/test/CodeGen/X86/2007-03-15-GEP-Idx-Sink.ll @@ -0,0 +1,73 @@ +; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-darwin | \ +; RUN: grep push | wc -l | grep 3 + +define void @foo(i8** %buf, i32 %size, i32 %col, i8* %p) { +entry: + icmp sgt i32 %size, 0 ; <i1>:0 [#uses=1] + br i1 %0, label %bb.preheader, label %return + +bb.preheader: ; preds = %entry + %tmp5.sum72 = add i32 %col, 7 ; <i32> [#uses=1] + %tmp5.sum71 = add i32 %col, 5 ; <i32> [#uses=1] + %tmp5.sum70 = add i32 %col, 3 ; <i32> [#uses=1] + %tmp5.sum69 = add i32 %col, 2 ; <i32> [#uses=1] + %tmp5.sum68 = add i32 %col, 1 ; <i32> [#uses=1] + %tmp5.sum66 = add i32 %col, 4 ; <i32> [#uses=1] + %tmp5.sum = add i32 %col, 6 ; <i32> [#uses=1] + br label %bb + +bb: ; preds = %bb, %bb.preheader + %i.073.0 = phi i32 [ 0, %bb.preheader ], [ %indvar.next, %bb ] ; <i32> [#uses=3] + %p_addr.076.0.rec = mul i32 %i.073.0, 9 ; <i32> [#uses=9] + %p_addr.076.0 = getelementptr i8* %p, i32 %p_addr.076.0.rec ; <i8*> [#uses=1] + %tmp2 = getelementptr i8** %buf, i32 %i.073.0 ; <i8**> [#uses=1] + %tmp3 = load i8** %tmp2 ; <i8*> [#uses=8] + %tmp5 = getelementptr i8* %tmp3, i32 %col ; <i8*> [#uses=1] + %tmp7 = load i8* %p_addr.076.0 ; <i8> [#uses=1] + store i8 %tmp7, i8* %tmp5 + %p_addr.076.0.sum93 = add i32 %p_addr.076.0.rec, 1 ; <i32> [#uses=1] + %tmp11 = getelementptr i8* %p, i32 %p_addr.076.0.sum93 ; <i8*> [#uses=1] + %tmp13 = load i8* %tmp11 ; <i8> [#uses=1] + %tmp15 = getelementptr i8* %tmp3, i32 %tmp5.sum72 ; <i8*> [#uses=1] + store i8 %tmp13, i8* %tmp15 + %p_addr.076.0.sum92 = add i32 %p_addr.076.0.rec, 2 ; <i32> [#uses=1] + %tmp17 = getelementptr i8* %p, i32 %p_addr.076.0.sum92 ; <i8*> [#uses=1] + %tmp19 = load i8* %tmp17 ; <i8> [#uses=1] + %tmp21 = getelementptr i8* %tmp3, i32 %tmp5.sum71 ; <i8*> [#uses=1] + store i8 %tmp19, i8* %tmp21 + %p_addr.076.0.sum91 = add i32 %p_addr.076.0.rec, 3 ; <i32> [#uses=1] + %tmp23 = getelementptr i8* %p, i32 %p_addr.076.0.sum91 ; <i8*> [#uses=1] + %tmp25 = load i8* %tmp23 ; <i8> [#uses=1] + %tmp27 = getelementptr i8* %tmp3, i32 %tmp5.sum70 ; <i8*> [#uses=1] + store i8 %tmp25, i8* %tmp27 + %p_addr.076.0.sum90 = add i32 %p_addr.076.0.rec, 4 ; <i32> [#uses=1] + %tmp29 = getelementptr i8* %p, i32 %p_addr.076.0.sum90 ; <i8*> [#uses=1] + %tmp31 = load i8* %tmp29 ; <i8> [#uses=1] + %tmp33 = getelementptr i8* %tmp3, i32 %tmp5.sum69 ; <i8*> [#uses=2] + store i8 %tmp31, i8* %tmp33 + %p_addr.076.0.sum89 = add i32 %p_addr.076.0.rec, 5 ; <i32> [#uses=1] + %tmp35 = getelementptr i8* %p, i32 %p_addr.076.0.sum89 ; <i8*> [#uses=1] + %tmp37 = load i8* %tmp35 ; <i8> [#uses=1] + %tmp39 = getelementptr i8* %tmp3, i32 %tmp5.sum68 ; <i8*> [#uses=1] + store i8 %tmp37, i8* %tmp39 + %p_addr.076.0.sum88 = add i32 %p_addr.076.0.rec, 6 ; <i32> [#uses=1] + %tmp41 = getelementptr i8* %p, i32 %p_addr.076.0.sum88 ; <i8*> [#uses=1] + %tmp43 = load i8* %tmp41 ; <i8> [#uses=1] + store i8 %tmp43, i8* %tmp33 + %p_addr.076.0.sum87 = add i32 %p_addr.076.0.rec, 7 ; <i32> [#uses=1] + %tmp47 = getelementptr i8* %p, i32 %p_addr.076.0.sum87 ; <i8*> [#uses=1] + %tmp49 = load i8* %tmp47 ; <i8> [#uses=1] + %tmp51 = getelementptr i8* %tmp3, i32 %tmp5.sum66 ; <i8*> [#uses=1] + store i8 %tmp49, i8* %tmp51 + %p_addr.076.0.sum = add i32 %p_addr.076.0.rec, 8 ; <i32> [#uses=1] + %tmp53 = getelementptr i8* %p, i32 %p_addr.076.0.sum ; <i8*> [#uses=1] + %tmp55 = load i8* %tmp53 ; <i8> [#uses=1] + %tmp57 = getelementptr i8* %tmp3, i32 %tmp5.sum ; <i8*> [#uses=1] + store i8 %tmp55, i8* %tmp57 + %indvar.next = add i32 %i.073.0, 1 ; <i32> [#uses=2] + icmp eq i32 %indvar.next, %size ; <i1>:1 [#uses=1] + br i1 %1, label %return, label %bb + +return: ; preds = %bb, %entry + ret void +} diff --git a/test/CodeGen/X86/2007-03-16-InlineAsm.ll b/test/CodeGen/X86/2007-03-16-InlineAsm.ll new file mode 100644 index 0000000..c98c89a --- /dev/null +++ b/test/CodeGen/X86/2007-03-16-InlineAsm.ll @@ -0,0 +1,27 @@ +; RUN: llvm-as < %s | llc -march=x86 + +; ModuleID = 'a.bc' + +define i32 @foo(i32 %A, i32 %B) { +entry: + %A_addr = alloca i32 ; <i32*> [#uses=2] + %B_addr = alloca i32 ; <i32*> [#uses=1] + %retval = alloca i32, align 4 ; <i32*> [#uses=2] + %tmp = alloca i32, align 4 ; <i32*> [#uses=2] + %ret = alloca i32, align 4 ; <i32*> [#uses=2] + "alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] + store i32 %A, i32* %A_addr + store i32 %B, i32* %B_addr + %tmp1 = load i32* %A_addr ; <i32> [#uses=1] + %tmp2 = call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"( i32 7, i32 %tmp1 ) ; <i32> [#uses=1] + store i32 %tmp2, i32* %ret + %tmp3 = load i32* %ret ; <i32> [#uses=1] + store i32 %tmp3, i32* %tmp + %tmp4 = load i32* %tmp ; <i32> [#uses=1] + store i32 %tmp4, i32* %retval + br label %return + +return: ; preds = %entry + %retval5 = load i32* %retval ; <i32> [#uses=1] + ret i32 %retval5 +} diff --git a/test/CodeGen/X86/2007-03-18-LiveIntervalAssert.ll b/test/CodeGen/X86/2007-03-18-LiveIntervalAssert.ll new file mode 100644 index 0000000..6965849 --- /dev/null +++ b/test/CodeGen/X86/2007-03-18-LiveIntervalAssert.ll @@ -0,0 +1,7 @@ +; RUN: llvm-as < %s | llc -march=x86 +; PR1259 + +define void @test() { + %tmp2 = call i32 asm "...", "=r,~{dirflag},~{fpsr},~{flags},~{dx},~{cx},~{ax}"( ) + unreachable +} diff --git a/test/CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.ll b/test/CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.ll new file mode 100644 index 0000000..babcf6a --- /dev/null +++ b/test/CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.ll @@ -0,0 +1,11 @@ +; RUN: llvm-as < %s | llc -march=x86 + +define i32 @test(i16 %tmp40414244) { + %tmp48 = call i32 asm sideeffect "inl ${1:w}, $0", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"( i16 %tmp40414244 ) + ret i32 %tmp48 +} + +define i32 @test2(i16 %tmp40414244) { + %tmp48 = call i32 asm sideeffect "inl ${1:w}, $0", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"( i16 14 ) + ret i32 %tmp48 +} diff --git a/test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll b/test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll new file mode 100644 index 0000000..9bdb249 --- /dev/null +++ b/test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll @@ -0,0 +1,10 @@ +; RUN: llvm-as < %s | llc -march=x86 | grep {mov %gs:72, %eax} +target datalayout = "e-p:32:32" +target triple = "i686-apple-darwin9" + +define void @test() { + %tmp1 = tail call i32* asm sideeffect "mov %gs:${1:P}, $0", "=r,i,~{dirflag},~{fpsr},~{flags}"( i32 72 ) ; <%struct._pthread*> [#uses=1] + ret void +} + + diff --git a/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll b/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll new file mode 100644 index 0000000..6e1adf8 --- /dev/null +++ b/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll @@ -0,0 +1,11 @@ +; RUN: llvm-as < %s | llc -mcpu=yonah -march=x86 | \ +; RUN: grep {cmpltsd %xmm0, %xmm0} +target datalayout = "e-p:32:32" +target triple = "i686-apple-darwin9" + + +define void @acoshf() { + %tmp19 = tail call <2 x double> asm sideeffect "pcmpeqd $0, $0 \0A\09 cmpltsd $0, $0", "=x,0,~{dirflag},~{fpsr},~{flags}"( <2 x double> zeroinitializer ) ; <<2 x double>> [#uses=0] + ret void +} + diff --git a/test/CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll b/test/CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll new file mode 100644 index 0000000..e440cdb --- /dev/null +++ b/test/CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll @@ -0,0 +1,9 @@ +; RUN: llvm-as < %s | llc -march=x86 | grep {psrlw \$8, %xmm0} +target datalayout = "e-p:32:32" +target triple = "i686-apple-darwin9" + +define void @test() { + tail call void asm sideeffect "psrlw $0, %xmm0", "X,~{dirflag},~{fpsr},~{flags}"( i32 8 ) + ret void +} + diff --git a/test/CodeGen/X86/2007-04-08-InlineAsmCrash.ll b/test/CodeGen/X86/2007-04-08-InlineAsmCrash.ll new file mode 100644 index 0000000..840fc7d --- /dev/null +++ b/test/CodeGen/X86/2007-04-08-InlineAsmCrash.ll @@ -0,0 +1,18 @@ +; RUN: llvm-as < %s | llc +; PR1314 + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" +target triple = "x86_64-unknown-linux-gnu" + %struct.CycleCount = type { i64, i64 } + %struct.bc_struct = type { i32, i32, i32, i32, %struct.bc_struct*, i8*, i8* } +@_programStartTime = external global %struct.CycleCount ; <%struct.CycleCount*> [#uses=1] + +define fastcc i32 @bc_divide(%struct.bc_struct* %n1, %struct.bc_struct* %n2, %struct.bc_struct** %quot, i32 %scale) { +entry: + %tmp7.i46 = tail call i64 asm sideeffect ".byte 0x0f,0x31", "={dx},=*{ax},~{dirflag},~{fpsr},~{flags}"( i64* getelementptr (%struct.CycleCount* @_programStartTime, i32 0, i32 1) ) ; <i64> [#uses=0] + %tmp221 = sdiv i32 10, 0 ; <i32> [#uses=1] + tail call fastcc void @_one_mult( i8* null, i32 0, i32 %tmp221, i8* null ) + ret i32 0 +} + +declare fastcc void @_one_mult(i8*, i32, i32, i8*) diff --git a/test/CodeGen/X86/2007-04-11-InlineAsmVectorResult.ll b/test/CodeGen/X86/2007-04-11-InlineAsmVectorResult.ll new file mode 100644 index 0000000..ed5a194 --- /dev/null +++ b/test/CodeGen/X86/2007-04-11-InlineAsmVectorResult.ll @@ -0,0 +1,21 @@ +; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" +target triple = "i686-apple-darwin8" + +define void @test(<4 x float> %tmp42i) { + %tmp42 = call <4 x float> asm "movss $1, $0", "=x,m,~{dirflag},~{fpsr},~{flags}"( float* null ) ; <<4 x float>> [#uses=1] + %tmp49 = shufflevector <4 x float> %tmp42, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>> [#uses=1] + br label %bb + +bb: ; preds = %bb, %cond_true10 + %tmp52 = bitcast <4 x float> %tmp49 to <4 x i32> ; <<4 x i32>> [#uses=1] + %tmp53 = call <4 x i32> @llvm.x86.sse2.psll.d( <4 x i32> %tmp52, <4 x i32> < i32 8, i32 undef, i32 undef, i32 undef > ) ; <<4 x i32>> [#uses=1] + %tmp105 = bitcast <4 x i32> %tmp53 to <4 x float> ; <<4 x float>> [#uses=1] + %tmp108 = sub <4 x float> zeroinitializer, %tmp105 ; <<4 x float>> [#uses=0] + br label %bb + +return: ; preds = %entry + ret void +} + +declare <4 x i32> @llvm.x86.sse2.psll.d(<4 x i32>, <4 x i32>) diff --git a/test/CodeGen/X86/2007-04-17-LiveIntervalAssert.ll b/test/CodeGen/X86/2007-04-17-LiveIntervalAssert.ll new file mode 100644 index 0000000..f9671a4 --- /dev/null +++ b/test/CodeGen/X86/2007-04-17-LiveIntervalAssert.ll @@ -0,0 +1,42 @@ +; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin -relocation-model=pic --disable-fp-elim + + %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 } + %struct.__sFILEX = type opaque + %struct.__sbuf = type { i8*, i32 } + %struct.partition_def = type { i32, [1 x %struct.partition_elem] } + %struct.partition_elem = type { i32, %struct.partition_elem*, i32 } + +define void @partition_print(%struct.partition_def* %part) { +entry: + br i1 false, label %bb.preheader, label %bb99 + +bb.preheader: ; preds = %entry + br i1 false, label %cond_true, label %cond_next90 + +cond_true: ; preds = %bb.preheader + br i1 false, label %bb32, label %bb87.critedge + +bb32: ; preds = %bb32, %cond_true + %i.2115.0 = phi i32 [ 0, %cond_true ], [ %indvar.next127, %bb32 ] ; <i32> [#uses=1] + %c.2112.0 = phi i32 [ 0, %cond_true ], [ %tmp49, %bb32 ] ; <i32> [#uses=1] + %tmp43 = getelementptr %struct.partition_def* %part, i32 0, i32 1, i32 %c.2112.0, i32 1 ; <%struct.partition_elem**> [#uses=1] + %tmp44 = load %struct.partition_elem** %tmp43 ; <%struct.partition_elem*> [#uses=1] + %tmp4445 = ptrtoint %struct.partition_elem* %tmp44 to i32 ; <i32> [#uses=1] + %tmp48 = sub i32 %tmp4445, 0 ; <i32> [#uses=1] + %tmp49 = sdiv i32 %tmp48, 12 ; <i32> [#uses=1] + %indvar.next127 = add i32 %i.2115.0, 1 ; <i32> [#uses=2] + %exitcond128 = icmp eq i32 %indvar.next127, 0 ; <i1> [#uses=1] + br i1 %exitcond128, label %bb58, label %bb32 + +bb58: ; preds = %bb32 + ret void + +bb87.critedge: ; preds = %cond_true + ret void + +cond_next90: ; preds = %bb.preheader + ret void + +bb99: ; preds = %entry + ret void +} diff --git a/test/CodeGen/X86/2007-04-24-Huge-Stack.ll b/test/CodeGen/X86/2007-04-24-Huge-Stack.ll new file mode 100644 index 0000000..74e6e72 --- /dev/null +++ b/test/CodeGen/X86/2007-04-24-Huge-Stack.ll @@ -0,0 +1,19 @@ +; RUN: llvm-as < %s | llc -march=x86-64 | not grep 4294967112 +; PR1348 + + %struct.md5_ctx = type { i32, i32, i32, i32, [2 x i32], i32, [128 x i8], [4294967288 x i8] } + +define i8* @md5_buffer(i8* %buffer, i64 %len, i8* %resblock) { +entry: + %ctx = alloca %struct.md5_ctx, align 16 ; <%struct.md5_ctx*> [#uses=3] + call void @md5_init_ctx( %struct.md5_ctx* %ctx ) + call void @md5_process_bytes( i8* %buffer, i64 %len, %struct.md5_ctx* %ctx ) + %tmp4 = call i8* @md5_finish_ctx( %struct.md5_ctx* %ctx, i8* %resblock ) ; <i8*> [#uses=1] + ret i8* %tmp4 +} + +declare void @md5_init_ctx(%struct.md5_ctx*) + +declare i8* @md5_finish_ctx(%struct.md5_ctx*, i8*) + +declare void @md5_process_bytes(i8*, i64, %struct.md5_ctx*) diff --git a/test/CodeGen/X86/2007-04-24-VectorCrash.ll b/test/CodeGen/X86/2007-04-24-VectorCrash.ll new file mode 100644 index 0000000..ce23da0 --- /dev/null +++ b/test/CodeGen/X86/2007-04-24-VectorCrash.ll @@ -0,0 +1,63 @@ +; RUN: llvm-as < %s | llc -mcpu=yonah +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" +target triple = "i686-apple-darwin8" + +declare <4 x float> @llvm.x86.sse.add.ss(<4 x float>, <4 x float>) + +define void @test(float* %P) { +entry: + or <4 x i32> zeroinitializer, and (<4 x i32> bitcast (<4 x float> shufflevector (<4 x float> undef, <4 x float> undef, <4 x i32> zeroinitializer) to <4 x i32>), <4 x i32> < i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648 >) ; <<4 x i32>>:0 [#uses=1] + bitcast <4 x i32> %0 to <4 x float> ; <<4 x float>>:1 [#uses=1] + sub <4 x float> %1, zeroinitializer ; <<4 x float>>:2 [#uses=1] + sub <4 x float> shufflevector (<4 x float> undef, <4 x float> undef, <4 x i32> zeroinitializer), %2 ; <<4 x float>>:3 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %3, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:4 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %4, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:5 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %5, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:6 [#uses=1] + shufflevector <4 x float> %6, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:7 [#uses=1] + shufflevector <4 x float> %7, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:8 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %8, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:9 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %9, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:10 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %10, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:11 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %11, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:12 [#uses=1] + shufflevector <4 x float> %12, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:13 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %13, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:14 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %14, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:15 [#uses=1] + shufflevector <4 x float> %15, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:16 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %16, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:17 [#uses=1] + shufflevector <4 x float> %17, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:18 [#uses=1] + shufflevector <4 x float> %18, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:19 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %19, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:20 [#uses=1] + shufflevector <4 x float> %20, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:21 [#uses=1] + shufflevector <4 x float> %21, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:22 [#uses=1] + mul <4 x float> %22, zeroinitializer ; <<4 x float>>:23 [#uses=1] + shufflevector <4 x float> %23, <4 x float> undef, <4 x i32> < i32 2, i32 2, i32 2, i32 2 > ; <<4 x float>>:24 [#uses=1] + call <4 x float> @llvm.x86.sse.add.ss( <4 x float> zeroinitializer, <4 x float> %24 ) ; <<4 x float>>:25 [#uses=1] + shufflevector <4 x float> %25, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:26 [#uses=1] + shufflevector <4 x float> %26, <4 x float> zeroinitializer, <4 x i32> zeroinitializer ; <<4 x float>>:27 [#uses=1] + shufflevector <4 x float> %27, <4 x float> zeroinitializer, <4 x i32> < i32 4, i32 1, i32 6, i32 7 > ; <<4 x float>>:28 [#uses=1] + mul <4 x float> zeroinitializer, %28 ; <<4 x float>>:29 [#uses=1] + add <4 x float> %29, zeroinitializer ; <<4 x float>>:30 [#uses=1] + mul <4 x float> zeroinitializer, %30 ; <<4 x float>>:31 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %31, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:32 [#uses=1] + mul <4 x float> zeroinitializer, %32 ; <<4 x float>>:33 [#uses=1] + shufflevector <4 x float> %33, <4 x float> zeroinitializer, <4 x i32> zeroinitializer ; <<4 x float>>:34 [#uses=1] + mul <4 x float> zeroinitializer, %34 ; <<4 x float>>:35 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %35, <4 x i32> < i32 0, i32 1, i32 6, i32 7 > ; <<4 x float>>:36 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %36, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:37 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %37, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:38 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %38, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:39 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %39, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:40 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %40, <4 x i32> < i32 4, i32 1, i32 6, i32 7 > ; <<4 x float>>:41 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %41, <4 x i32> < i32 4, i32 1, i32 6, i32 7 > ; <<4 x float>>:42 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %42, <4 x i32> < i32 4, i32 1, i32 6, i32 7 > ; <<4 x float>>:43 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %43, <4 x i32> < i32 4, i32 1, i32 6, i32 7 > ; <<4 x float>>:44 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %44, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:45 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %45, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:46 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %46, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:47 [#uses=1] + shufflevector <4 x float> zeroinitializer, <4 x float> %47, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:48 [#uses=1] + shufflevector <4 x float> %48, <4 x float> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 > ; <<4 x float>>:49 [#uses=1] + add <4 x float> %49, zeroinitializer ; <<4 x float>>:50 [#uses=1] + %tmp5845 = extractelement <4 x float> %50, i32 2 ; <float> [#uses=1] + store float %tmp5845, float* %P + ret void +} diff --git a/test/CodeGen/X86/2007-04-25-MMX-PADDQ.ll b/test/CodeGen/X86/2007-04-25-MMX-PADDQ.ll new file mode 100644 index 0000000..0d20824 --- /dev/null +++ b/test/CodeGen/X86/2007-04-25-MMX-PADDQ.ll @@ -0,0 +1,25 @@ +; RUN: llvm-as < %s | llc -o - -march=x86 -mattr=+mmx | grep paddq | wc -l | grep 2 +; RUN: llvm-as < %s | llc -o - -march=x86 -mattr=+mmx | grep movq | wc -l | grep 3 + +define <1 x i64> @unsigned_add3(<1 x i64>* %a, <1 x i64>* %b, i32 %count) { +entry: + %tmp2942 = icmp eq i32 %count, 0 ; <i1> [#uses=1] + br i1 %tmp2942, label %bb31, label %bb26 + +bb26: ; preds = %bb26, %entry + %i.037.0 = phi i32 [ 0, %entry ], [ %tmp25, %bb26 ] ; <i32> [#uses=3] + %sum.035.0 = phi <1 x i64> [ zeroinitializer, %entry ], [ %tmp22, %bb26 ] ; <<1 x i64>> [#uses=1] + %tmp13 = getelementptr <1 x i64>* %b, i32 %i.037.0 ; <<1 x i64>*> [#uses=1] + %tmp14 = load <1 x i64>* %tmp13 ; <<1 x i64>> [#uses=1] + %tmp18 = getelementptr <1 x i64>* %a, i32 %i.037.0 ; <<1 x i64>*> [#uses=1] + %tmp19 = load <1 x i64>* %tmp18 ; <<1 x i64>> [#uses=1] + %tmp21 = add <1 x i64> %tmp19, %tmp14 ; <<1 x i64>> [#uses=1] + %tmp22 = add <1 x i64> %tmp21, %sum.035.0 ; <<1 x i64>> [#uses=2] + %tmp25 = add i32 %i.037.0, 1 ; <i32> [#uses=2] + %tmp29 = icmp ult i32 %tmp25, %count ; <i1> [#uses=1] + br i1 %tmp29, label %bb26, label %bb31 + +bb31: ; preds = %bb26, %entry + %sum.035.1 = phi <1 x i64> [ zeroinitializer, %entry ], [ %tmp22, %bb26 ] ; <<1 x i64>> [#uses=1] + ret <1 x i64> %sum.035.1 +} diff --git a/test/CodeGen/X86/2007-04-27-InlineAsm-IntMemInput.ll b/test/CodeGen/X86/2007-04-27-InlineAsm-IntMemInput.ll new file mode 100644 index 0000000..cbd6a73 --- /dev/null +++ b/test/CodeGen/X86/2007-04-27-InlineAsm-IntMemInput.ll @@ -0,0 +1,12 @@ +; RUN: llvm-as < %s | llc | not grep {bsrl.*10} +; PR1356 + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" +target triple = "i686-apple-darwin8" + +define i32 @main() { +entry: + %tmp4 = tail call i32 asm "bsrl $1, $0", "=r,ro,~{dirflag},~{fpsr},~{flags},~{cc}"( i32 10 ) ; <i32> [#uses=1] + ret i32 %tmp4 +} + diff --git a/test/CodeGen/X86/2007-05-05-VecCastExpand.ll b/test/CodeGen/X86/2007-05-05-VecCastExpand.ll new file mode 100644 index 0000000..6173d44 --- /dev/null +++ b/test/CodeGen/X86/2007-05-05-VecCastExpand.ll @@ -0,0 +1,21 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mcpu=i386 -mattr=+sse +; PR1371 + +%str = external global [18 x sbyte] + +void %test() { +bb.i: + %tmp.i660 = load <4 x float>* null + call void (int, ...)* %printf( int 0, sbyte* getelementptr ([18 x sbyte]* %str, int 0, uint 0), double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00 ) + %tmp152.i = load <4 x uint>* null + %tmp156.i = cast <4 x uint> %tmp152.i to <4 x int> + %tmp175.i = cast <4 x float> %tmp.i660 to <4 x int> + %tmp176.i = xor <4 x int> %tmp156.i, < int -1, int -1, int -1, int -1 > + %tmp177.i = and <4 x int> %tmp176.i, %tmp175.i + %tmp190.i = or <4 x int> %tmp177.i, zeroinitializer + %tmp191.i = cast <4 x int> %tmp190.i to <4 x float> + store <4 x float> %tmp191.i, <4 x float>* null + ret void +} + +declare void %printf(int, ...) diff --git a/test/CodeGen/X86/2007-05-07-InvokeSRet.ll b/test/CodeGen/X86/2007-05-07-InvokeSRet.ll new file mode 100644 index 0000000..b1b015d --- /dev/null +++ b/test/CodeGen/X86/2007-05-07-InvokeSRet.ll @@ -0,0 +1,15 @@ +; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu -enable-eh -disable-fp-elim | not grep {addl .8, %esp} +; PR1398 + + %struct.S = type { i32, i32 } + +declare void @invokee(%struct.S* sret ) + +define void @invoker(%struct.S* %name.0.0) { +entry: + invoke void @invokee( %struct.S* %name.0.0 sret ) + to label %return unwind label %return + +return: ; preds = %entry, %entry + ret void +} diff --git a/test/CodeGen/X86/2007-05-14-LiveIntervalAssert.ll b/test/CodeGen/X86/2007-05-14-LiveIntervalAssert.ll new file mode 100644 index 0000000..f89ef71 --- /dev/null +++ b/test/CodeGen/X86/2007-05-14-LiveIntervalAssert.ll @@ -0,0 +1,27 @@ +; RUN: llvm-as < %s | llc -march=x86-64 + + %struct.XDesc = type <{ i32, %struct.OpaqueXDataStorageType** }> + %struct.OpaqueXDataStorageType = type opaque + +declare i16 @GetParamDesc(%struct.XDesc*, i32, i32, %struct.XDesc*) sext + +declare void @r_raise(i64, i8*, ...) + +define i64 @app_send_event(i64 %self, i64 %event_class, i64 %event_id, i64 %params, i64 %need_retval) { +entry: + br i1 false, label %cond_true109, label %bb83.preheader + +bb83.preheader: ; preds = %entry + ret i64 0 + +cond_true109: ; preds = %entry + br i1 false, label %cond_next164, label %cond_true239 + +cond_next164: ; preds = %cond_true109 + %tmp176 = call i16 @GetParamDesc( %struct.XDesc* null, i32 1701999219, i32 1413830740, %struct.XDesc* null ) sext ; <i16> [#uses=0] + call void (i64, i8*, ...)* @r_raise( i64 0, i8* null ) + unreachable + +cond_true239: ; preds = %cond_true109 + ret i64 0 +} diff --git a/test/CodeGen/X86/2007-05-15-maskmovq.ll b/test/CodeGen/X86/2007-05-15-maskmovq.ll new file mode 100644 index 0000000..d9836e4 --- /dev/null +++ b/test/CodeGen/X86/2007-05-15-maskmovq.ll @@ -0,0 +1,14 @@ +; RUN: llvm-as < %s | llc -mcpu=yonah + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" +target triple = "i686-apple-darwin8" + +define void @test(<1 x i64> %c64, <1 x i64> %mask1, i8* %P) { +entry: + %tmp4 = bitcast <1 x i64> %mask1 to <8 x i8> ; <<8 x i8>> [#uses=1] + %tmp6 = bitcast <1 x i64> %c64 to <8 x i8> ; <<8 x i8>> [#uses=1] + tail call void @llvm.x86.mmx.maskmovq( <8 x i8> %tmp6, <8 x i8> %tmp4, i8* %P ) + ret void +} + +declare void @llvm.x86.mmx.maskmovq(<8 x i8>, <8 x i8>, i8*) diff --git a/test/CodeGen/X86/2007-05-17-ShuffleISelBug.ll b/test/CodeGen/X86/2007-05-17-ShuffleISelBug.ll new file mode 100644 index 0000000..33ff755 --- /dev/null +++ b/test/CodeGen/X86/2007-05-17-ShuffleISelBug.ll @@ -0,0 +1,23 @@ +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep punpckhwd + +declare <8 x i16> @llvm.x86.sse2.packuswb.128(<8 x i16>, <8 x i16>) + +declare <8 x i16> @llvm.x86.sse2.psrl.w(<8 x i16>, <4 x i32>) + +define fastcc void @test(i32* %src, i32 %sbpr, i32* %dst, i32 %dbpr, i32 %w, i32 %h, i32 %dstalpha, i32 %mask) { + %tmp633 = shufflevector <8 x i16> zeroinitializer, <8 x i16> undef, <8 x i32> < i32 4, i32 4, i32 5, i32 5, i32 6, i32 6, i32 7, i32 7 > + %tmp715 = mul <8 x i16> zeroinitializer, %tmp633 + %tmp776 = bitcast <8 x i16> %tmp715 to <4 x i32> + %tmp777 = add <4 x i32> %tmp776, shufflevector (<4 x i32> < i32 65537, i32 0, i32 0, i32 0 >, <4 x i32> < i32 65537, i32 0, i32 0, i32 0 >, <4 x i32> zeroinitializer) + %tmp805 = add <4 x i32> %tmp777, zeroinitializer + %tmp832 = bitcast <4 x i32> %tmp805 to <8 x i16> + %tmp838 = tail call <8 x i16> @llvm.x86.sse2.psrl.w( <8 x i16> %tmp832, <4 x i32> < i32 8, i32 undef, i32 undef, i32 undef > ) + %tmp1020 = tail call <8 x i16> @llvm.x86.sse2.packuswb.128( <8 x i16> zeroinitializer, <8 x i16> %tmp838 ) + %tmp1030 = bitcast <8 x i16> %tmp1020 to <4 x i32> + %tmp1033 = add <4 x i32> zeroinitializer, %tmp1030 + %tmp1048 = bitcast <4 x i32> %tmp1033 to <2 x i64> + %tmp1049 = or <2 x i64> %tmp1048, zeroinitializer + store <2 x i64> %tmp1049, <2 x i64>* null + ret void +} diff --git a/test/CodeGen/X86/2007-06-04-X86-64-CtorAsmBugs.ll b/test/CodeGen/X86/2007-06-04-X86-64-CtorAsmBugs.ll new file mode 100644 index 0000000..5d09075 --- /dev/null +++ b/test/CodeGen/X86/2007-06-04-X86-64-CtorAsmBugs.ll @@ -0,0 +1,28 @@ +; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | not grep GOTPCREL +; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | grep ".align.*3" + + %struct.A = type { [1024 x i8] } +@_ZN1A1aE = global %struct.A zeroinitializer, align 32 ; <%struct.A*> [#uses=1] +@llvm.global_ctors = appending global [1 x { i32, void ()* }] [ { i32, void ()* } { i32 65535, void ()* @_GLOBAL__I__ZN1A1aE } ] ; <[1 x { i32, void ()* }]*> [#uses=0] + +define internal void @_GLOBAL__I__ZN1A1aE() section "__TEXT,__StaticInit,regular,pure_instructions" { +entry: + br label %bb.i + +bb.i: ; preds = %bb.i, %entry + %i.1.i1.0 = phi i32 [ 0, %entry ], [ %indvar.next, %bb.i ] ; <i32> [#uses=2] + %tmp1012.i = sext i32 %i.1.i1.0 to i64 ; <i64> [#uses=1] + %tmp13.i = getelementptr %struct.A* @_ZN1A1aE, i32 0, i32 0, i64 %tmp1012.i ; <i8*> [#uses=1] + store i8 0, i8* %tmp13.i + %indvar.next = add i32 %i.1.i1.0, 1 ; <i32> [#uses=2] + %exitcond = icmp eq i32 %indvar.next, 1024 ; <i1> [#uses=1] + br i1 %exitcond, label %_Z41__static_initialization_and_destruction_0ii.exit, label %bb.i + +_Z41__static_initialization_and_destruction_0ii.exit: ; preds = %bb.i + ret void +} + +define i32 @main(i32 %argc, i8** %argv) { +entry: + ret i32 0 +} diff --git a/test/CodeGen/X86/2007-06-04-tailmerge4.ll b/test/CodeGen/X86/2007-06-04-tailmerge4.ll new file mode 100644 index 0000000..a052ad8 --- /dev/null +++ b/test/CodeGen/X86/2007-06-04-tailmerge4.ll @@ -0,0 +1,454 @@ +; RUN: llvm-as < %s | llc -enable-eh | grep invcont131 +; PR 1496: tail merge was incorrectly removing this block + +; ModuleID = 'report.1.bc' +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" +target triple = "i686-pc-linux-gnu" + %struct.ALLOC = type { %struct.string___XUB, [2 x i8] } + %struct.RETURN = type { i32, i32, i32, i64 } + %struct.ada__streams__root_stream_type = type { %struct.ada__tags__dispatch_table* } + %struct.ada__tags__dispatch_table = type { [1 x i8*] } + %struct.ada__text_io__text_afcb = type { %struct.system__file_control_block__afcb, i32, i32, i32, i32, i32, %struct.ada__text_io__text_afcb*, i8, i8 } + %struct.string___XUB = type { i32, i32 } + %struct.string___XUP = type { i8*, %struct.string___XUB* } + %struct.system__file_control_block__afcb = type { %struct.ada__streams__root_stream_type, i32, %struct.string___XUP, i32, %struct.string___XUP, i8, i8, i8, i8, i8, i8, i8, %struct.system__file_control_block__afcb*, %struct.system__file_control_block__afcb* } + %struct.system__secondary_stack__mark_id = type { i8*, i32 } + %struct.wide_string___XUP = type { i16*, %struct.string___XUB* } +@report_E = global i8 0 ; <i8*> [#uses=0] +@report__test_status = internal global i8 1 ; <i8*> [#uses=8] +@report__test_name = internal global [15 x i8] zeroinitializer ; <[15 x i8]*> [#uses=10] +@report__test_name_len = internal global i32 0 ; <i32*> [#uses=15] +@.str = internal constant [12 x i8] c"report.adb\00\00" ; <[12 x i8]*> [#uses=1] +@C.26.599 = internal constant %struct.string___XUB { i32 1, i32 1 } ; <%struct.string___XUB*> [#uses=1] +@.str1 = internal constant [1 x i8] c":" ; <[1 x i8]*> [#uses=1] +@.str2 = internal constant [1 x i8] c" " ; <[1 x i8]*> [#uses=1] +@.str3 = internal constant [1 x i8] c"-" ; <[1 x i8]*> [#uses=1] +@.str5 = internal constant [10 x i8] c"0123456789" ; <[10 x i8]*> [#uses=12] +@C.59.855 = internal constant %struct.string___XUB { i32 1, i32 0 } ; <%struct.string___XUB*> [#uses=1] +@C.69.876 = internal constant %struct.string___XUB { i32 1, i32 3 } ; <%struct.string___XUB*> [#uses=1] +@C.70.879 = internal constant %struct.string___XUB { i32 1, i32 6 } ; <%struct.string___XUB*> [#uses=1] +@C.81.900 = internal constant %struct.string___XUB { i32 1, i32 5 } ; <%struct.string___XUB*> [#uses=1] +@.str6 = internal constant [0 x i8] zeroinitializer ; <[0 x i8]*> [#uses=1] +@.str7 = internal constant [3 x i8] c"2.5" ; <[3 x i8]*> [#uses=1] +@.str8 = internal constant [6 x i8] c"ACATS " ; <[6 x i8]*> [#uses=1] +@.str9 = internal constant [5 x i8] c",.,. " ; <[5 x i8]*> [#uses=1] +@.str10 = internal constant [1 x i8] c"." ; <[1 x i8]*> [#uses=1] +@.str11 = internal constant [5 x i8] c"---- " ; <[5 x i8]*> [#uses=1] +@.str12 = internal constant [5 x i8] c" - " ; <[5 x i8]*> [#uses=1] +@.str13 = internal constant [5 x i8] c" * " ; <[5 x i8]*> [#uses=1] +@.str14 = internal constant [5 x i8] c" + " ; <[5 x i8]*> [#uses=1] +@.str15 = internal constant [5 x i8] c" ! " ; <[5 x i8]*> [#uses=1] +@C.209.1380 = internal constant %struct.string___XUB { i32 1, i32 37 } ; <%struct.string___XUB*> [#uses=1] +@.str16 = internal constant [37 x i8] c" PASSED ============================." ; <[37 x i8]*> [#uses=1] +@.str17 = internal constant [5 x i8] c"==== " ; <[5 x i8]*> [#uses=1] +@.str18 = internal constant [37 x i8] c" NOT-APPLICABLE ++++++++++++++++++++." ; <[37 x i8]*> [#uses=1] +@.str19 = internal constant [5 x i8] c"++++ " ; <[5 x i8]*> [#uses=1] +@.str20 = internal constant [37 x i8] c" TENTATIVELY PASSED !!!!!!!!!!!!!!!!." ; <[37 x i8]*> [#uses=1] +@.str21 = internal constant [5 x i8] c"!!!! " ; <[5 x i8]*> [#uses=1] +@.str22 = internal constant [37 x i8] c" SEE '!' COMMENTS FOR SPECIAL NOTES!!" ; <[37 x i8]*> [#uses=1] +@.str23 = internal constant [37 x i8] c" FAILED ****************************." ; <[37 x i8]*> [#uses=1] +@.str24 = internal constant [5 x i8] c"**** " ; <[5 x i8]*> [#uses=1] +@__gnat_others_value = external constant i32 ; <i32*> [#uses=2] +@system__soft_links__abort_undefer = external global void ()* ; <void ()**> [#uses=1] +@C.320.1854 = internal constant %struct.string___XUB { i32 2, i32 6 } ; <%struct.string___XUB*> [#uses=1] + +declare void @report__put_msg(i64 %msg.0.0) + +declare void @__gnat_rcheck_05(i8*, i32) + +declare void @__gnat_rcheck_12(i8*, i32) + +declare %struct.ada__text_io__text_afcb* @ada__text_io__standard_output() + +declare void @ada__text_io__set_col(%struct.ada__text_io__text_afcb*, i32) + +declare void @ada__text_io__put_line(%struct.ada__text_io__text_afcb*, i64) + +declare void @report__time_stamp(%struct.string___XUP* sret %agg.result) + +declare i64 @ada__calendar__clock() + +declare void @ada__calendar__split(%struct.RETURN* sret , i64) + +declare void @system__string_ops_concat_5__str_concat_5(%struct.string___XUP* sret , i64, i64, i64, i64, i64) + +declare void @system__string_ops_concat_3__str_concat_3(%struct.string___XUP* sret , i64, i64, i64) + +declare i8* @system__secondary_stack__ss_allocate(i32) + +declare void @report__test(i64 %name.0.0, i64 %descr.0.0) + +declare void @system__secondary_stack__ss_mark(%struct.system__secondary_stack__mark_id* sret ) + +declare i8* @llvm.eh.exception() + +declare i32 @llvm.eh.selector(i8*, i8*, ...) + +declare i32 @llvm.eh.typeid.for(i8*) + +declare i32 @__gnat_eh_personality(...) + +declare i32 @_Unwind_Resume(...) + +declare void @__gnat_rcheck_07(i8*, i32) + +declare void @system__secondary_stack__ss_release(i64) + +declare void @report__comment(i64 %descr.0.0) + +declare void @report__failed(i64 %descr.0.0) + +declare void @report__not_applicable(i64 %descr.0.0) + +declare void @report__special_action(i64 %descr.0.0) + +define void @report__result() { +entry: + %tmp = alloca %struct.system__secondary_stack__mark_id, align 8 ; <%struct.system__secondary_stack__mark_id*> [#uses=3] + %A.210 = alloca %struct.string___XUB, align 8 ; <%struct.string___XUB*> [#uses=3] + %tmp5 = alloca %struct.string___XUP, align 8 ; <%struct.string___XUP*> [#uses=3] + %A.229 = alloca %struct.string___XUB, align 8 ; <%struct.string___XUB*> [#uses=3] + %tmp10 = alloca %struct.string___XUP, align 8 ; <%struct.string___XUP*> [#uses=3] + %A.248 = alloca %struct.string___XUB, align 8 ; <%struct.string___XUB*> [#uses=3] + %tmp15 = alloca %struct.string___XUP, align 8 ; <%struct.string___XUP*> [#uses=3] + %A.270 = alloca %struct.string___XUB, align 8 ; <%struct.string___XUB*> [#uses=3] + %tmp20 = alloca %struct.string___XUP, align 8 ; <%struct.string___XUP*> [#uses=3] + %A.284 = alloca %struct.string___XUB, align 8 ; <%struct.string___XUB*> [#uses=3] + %tmp25 = alloca %struct.string___XUP, align 8 ; <%struct.string___XUP*> [#uses=3] + call void @system__secondary_stack__ss_mark( %struct.system__secondary_stack__mark_id* %tmp sret ) + %tmp28 = getelementptr %struct.system__secondary_stack__mark_id* %tmp, i32 0, i32 0 ; <i8**> [#uses=1] + %tmp29 = load i8** %tmp28 ; <i8*> [#uses=2] + %tmp31 = getelementptr %struct.system__secondary_stack__mark_id* %tmp, i32 0, i32 1 ; <i32*> [#uses=1] + %tmp32 = load i32* %tmp31 ; <i32> [#uses=2] + %tmp33 = load i8* @report__test_status ; <i8> [#uses=1] + switch i8 %tmp33, label %bb483 [ + i8 0, label %bb + i8 2, label %bb143 + i8 3, label %bb261 + ] + +bb: ; preds = %entry + %tmp34 = load i32* @report__test_name_len ; <i32> [#uses=4] + %tmp35 = icmp sgt i32 %tmp34, 0 ; <i1> [#uses=2] + %tmp40 = icmp sgt i32 %tmp34, 15 ; <i1> [#uses=1] + %bothcond139 = and i1 %tmp35, %tmp40 ; <i1> [#uses=1] + br i1 %bothcond139, label %cond_true43, label %cond_next44 + +cond_true43: ; preds = %bb + invoke void @__gnat_rcheck_12( i8* getelementptr ([12 x i8]* @.str, i32 0, i32 0), i32 212 ) + to label %UnifiedUnreachableBlock unwind label %unwind + +unwind: ; preds = %invcont589, %cond_next567, %bb555, %cond_true497, %invcont249, %cond_next227, %bb215, %cond_true157, %invcont131, %cond_next109, %bb97, %cond_true43 + %eh_ptr = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=1] + br label %cleanup717 + +cond_next44: ; preds = %bb + %tmp72 = getelementptr %struct.string___XUB* %A.210, i32 0, i32 0 ; <i32*> [#uses=1] + store i32 1, i32* %tmp72 + %tmp73 = getelementptr %struct.string___XUB* %A.210, i32 0, i32 1 ; <i32*> [#uses=1] + store i32 %tmp34, i32* %tmp73 + br i1 %tmp35, label %cond_true80, label %cond_next109 + +cond_true80: ; preds = %cond_next44 + %tmp45.off = add i32 %tmp34, -1 ; <i32> [#uses=1] + %bothcond = icmp ugt i32 %tmp45.off, 14 ; <i1> [#uses=1] + br i1 %bothcond, label %bb97, label %cond_next109 + +bb97: ; preds = %cond_true80 + invoke void @__gnat_rcheck_05( i8* getelementptr ([12 x i8]* @.str, i32 0, i32 0), i32 212 ) + to label %UnifiedUnreachableBlock unwind label %unwind + +cond_next109: ; preds = %cond_true80, %cond_next44 + %A.210128 = ptrtoint %struct.string___XUB* %A.210 to i32 ; <i32> [#uses=1] + %A.210128129 = zext i32 %A.210128 to i64 ; <i64> [#uses=1] + %A.210128129130 = shl i64 %A.210128129, 32 ; <i64> [#uses=1] + %A.210128129130.ins = or i64 %A.210128129130, zext (i32 ptrtoint ([15 x i8]* @report__test_name to i32) to i64) ; <i64> [#uses=1] + invoke void @system__string_ops_concat_3__str_concat_3( %struct.string___XUP* %tmp5 sret , i64 or (i64 zext (i32 ptrtoint ([5 x i8]* @.str17 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.81.900 to i32) to i64), i64 32)), i64 %A.210128129130.ins, i64 or (i64 zext (i32 ptrtoint ([37 x i8]* @.str16 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.209.1380 to i32) to i64), i64 32)) ) + to label %invcont131 unwind label %unwind + +invcont131: ; preds = %cond_next109 + %tmp133 = getelementptr %struct.string___XUP* %tmp5, i32 0, i32 0 ; <i8**> [#uses=1] + %tmp134 = load i8** %tmp133 ; <i8*> [#uses=1] + %tmp134120 = ptrtoint i8* %tmp134 to i32 ; <i32> [#uses=1] + %tmp134120121 = zext i32 %tmp134120 to i64 ; <i64> [#uses=1] + %tmp136 = getelementptr %struct.string___XUP* %tmp5, i32 0, i32 1 ; <%struct.string___XUB**> [#uses=1] + %tmp137 = load %struct.string___XUB** %tmp136 ; <%struct.string___XUB*> [#uses=1] + %tmp137116 = ptrtoint %struct.string___XUB* %tmp137 to i32 ; <i32> [#uses=1] + %tmp137116117 = zext i32 %tmp137116 to i64 ; <i64> [#uses=1] + %tmp137116117118 = shl i64 %tmp137116117, 32 ; <i64> [#uses=1] + %tmp137116117118.ins = or i64 %tmp137116117118, %tmp134120121 ; <i64> [#uses=1] + invoke fastcc void @report__put_msg( i64 %tmp137116117118.ins ) + to label %cond_next618 unwind label %unwind + +bb143: ; preds = %entry + %tmp144 = load i32* @report__test_name_len ; <i32> [#uses=4] + %tmp147 = icmp sgt i32 %tmp144, 0 ; <i1> [#uses=2] + %tmp154 = icmp sgt i32 %tmp144, 15 ; <i1> [#uses=1] + %bothcond140 = and i1 %tmp147, %tmp154 ; <i1> [#uses=1] + br i1 %bothcond140, label %cond_true157, label %cond_next160 + +cond_true157: ; preds = %bb143 + invoke void @__gnat_rcheck_12( i8* getelementptr ([12 x i8]* @.str, i32 0, i32 0), i32 215 ) + to label %UnifiedUnreachableBlock unwind label %unwind + +cond_next160: ; preds = %bb143 + %tmp189 = getelementptr %struct.string___XUB* %A.229, i32 0, i32 0 ; <i32*> [#uses=1] + store i32 1, i32* %tmp189 + %tmp190 = getelementptr %struct.string___XUB* %A.229, i32 0, i32 1 ; <i32*> [#uses=1] + store i32 %tmp144, i32* %tmp190 + br i1 %tmp147, label %cond_true197, label %cond_next227 + +cond_true197: ; preds = %cond_next160 + %tmp161.off = add i32 %tmp144, -1 ; <i32> [#uses=1] + %bothcond1 = icmp ugt i32 %tmp161.off, 14 ; <i1> [#uses=1] + br i1 %bothcond1, label %bb215, label %cond_next227 + +bb215: ; preds = %cond_true197 + invoke void @__gnat_rcheck_05( i8* getelementptr ([12 x i8]* @.str, i32 0, i32 0), i32 215 ) + to label %UnifiedUnreachableBlock unwind label %unwind + +cond_next227: ; preds = %cond_true197, %cond_next160 + %A.229105 = ptrtoint %struct.string___XUB* %A.229 to i32 ; <i32> [#uses=1] + %A.229105106 = zext i32 %A.229105 to i64 ; <i64> [#uses=1] + %A.229105106107 = shl i64 %A.229105106, 32 ; <i64> [#uses=1] + %A.229105106107.ins = or i64 %A.229105106107, zext (i32 ptrtoint ([15 x i8]* @report__test_name to i32) to i64) ; <i64> [#uses=1] + invoke void @system__string_ops_concat_3__str_concat_3( %struct.string___XUP* %tmp10 sret , i64 or (i64 zext (i32 ptrtoint ([5 x i8]* @.str19 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.81.900 to i32) to i64), i64 32)), i64 %A.229105106107.ins, i64 or (i64 zext (i32 ptrtoint ([37 x i8]* @.str18 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.209.1380 to i32) to i64), i64 32)) ) + to label %invcont249 unwind label %unwind + +invcont249: ; preds = %cond_next227 + %tmp251 = getelementptr %struct.string___XUP* %tmp10, i32 0, i32 0 ; <i8**> [#uses=1] + %tmp252 = load i8** %tmp251 ; <i8*> [#uses=1] + %tmp25297 = ptrtoint i8* %tmp252 to i32 ; <i32> [#uses=1] + %tmp2529798 = zext i32 %tmp25297 to i64 ; <i64> [#uses=1] + %tmp254 = getelementptr %struct.string___XUP* %tmp10, i32 0, i32 1 ; <%struct.string___XUB**> [#uses=1] + %tmp255 = load %struct.string___XUB** %tmp254 ; <%struct.string___XUB*> [#uses=1] + %tmp25593 = ptrtoint %struct.string___XUB* %tmp255 to i32 ; <i32> [#uses=1] + %tmp2559394 = zext i32 %tmp25593 to i64 ; <i64> [#uses=1] + %tmp255939495 = shl i64 %tmp2559394, 32 ; <i64> [#uses=1] + %tmp255939495.ins = or i64 %tmp255939495, %tmp2529798 ; <i64> [#uses=1] + invoke fastcc void @report__put_msg( i64 %tmp255939495.ins ) + to label %cond_next618 unwind label %unwind + +bb261: ; preds = %entry + %tmp262 = call i8* @llvm.stacksave( ) ; <i8*> [#uses=2] + %tmp263 = load i32* @report__test_name_len ; <i32> [#uses=4] + %tmp266 = icmp sgt i32 %tmp263, 0 ; <i1> [#uses=2] + %tmp273 = icmp sgt i32 %tmp263, 15 ; <i1> [#uses=1] + %bothcond141 = and i1 %tmp266, %tmp273 ; <i1> [#uses=1] + br i1 %bothcond141, label %cond_true276, label %cond_next281 + +cond_true276: ; preds = %bb261 + invoke void @__gnat_rcheck_12( i8* getelementptr ([12 x i8]* @.str, i32 0, i32 0), i32 218 ) + to label %UnifiedUnreachableBlock unwind label %unwind277 + +unwind277: ; preds = %invcont467, %cond_next442, %invcont370, %cond_next348, %bb336, %cond_true276 + %eh_ptr278 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=1] + call void @llvm.stackrestore( i8* %tmp262 ) + br label %cleanup717 + +cond_next281: ; preds = %bb261 + %tmp310 = getelementptr %struct.string___XUB* %A.248, i32 0, i32 0 ; <i32*> [#uses=1] + store i32 1, i32* %tmp310 + %tmp311 = getelementptr %struct.string___XUB* %A.248, i32 0, i32 1 ; <i32*> [#uses=1] + store i32 %tmp263, i32* %tmp311 + br i1 %tmp266, label %cond_true318, label %cond_next348 + +cond_true318: ; preds = %cond_next281 + %tmp282.off = add i32 %tmp263, -1 ; <i32> [#uses=1] + %bothcond2 = icmp ugt i32 %tmp282.off, 14 ; <i1> [#uses=1] + br i1 %bothcond2, label %bb336, label %cond_next348 + +bb336: ; preds = %cond_true318 + invoke void @__gnat_rcheck_05( i8* getelementptr ([12 x i8]* @.str, i32 0, i32 0), i32 218 ) + to label %UnifiedUnreachableBlock unwind label %unwind277 + +cond_next348: ; preds = %cond_true318, %cond_next281 + %A.24882 = ptrtoint %struct.string___XUB* %A.248 to i32 ; <i32> [#uses=1] + %A.2488283 = zext i32 %A.24882 to i64 ; <i64> [#uses=1] + %A.248828384 = shl i64 %A.2488283, 32 ; <i64> [#uses=1] + %A.248828384.ins = or i64 %A.248828384, zext (i32 ptrtoint ([15 x i8]* @report__test_name to i32) to i64) ; <i64> [#uses=1] + invoke void @system__string_ops_concat_3__str_concat_3( %struct.string___XUP* %tmp15 sret , i64 or (i64 zext (i32 ptrtoint ([5 x i8]* @.str21 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.81.900 to i32) to i64), i64 32)), i64 %A.248828384.ins, i64 or (i64 zext (i32 ptrtoint ([37 x i8]* @.str20 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.209.1380 to i32) to i64), i64 32)) ) + to label %invcont370 unwind label %unwind277 + +invcont370: ; preds = %cond_next348 + %tmp372 = getelementptr %struct.string___XUP* %tmp15, i32 0, i32 0 ; <i8**> [#uses=1] + %tmp373 = load i8** %tmp372 ; <i8*> [#uses=1] + %tmp37374 = ptrtoint i8* %tmp373 to i32 ; <i32> [#uses=1] + %tmp3737475 = zext i32 %tmp37374 to i64 ; <i64> [#uses=1] + %tmp375 = getelementptr %struct.string___XUP* %tmp15, i32 0, i32 1 ; <%struct.string___XUB**> [#uses=1] + %tmp376 = load %struct.string___XUB** %tmp375 ; <%struct.string___XUB*> [#uses=1] + %tmp37670 = ptrtoint %struct.string___XUB* %tmp376 to i32 ; <i32> [#uses=1] + %tmp3767071 = zext i32 %tmp37670 to i64 ; <i64> [#uses=1] + %tmp376707172 = shl i64 %tmp3767071, 32 ; <i64> [#uses=1] + %tmp376707172.ins = or i64 %tmp376707172, %tmp3737475 ; <i64> [#uses=1] + invoke fastcc void @report__put_msg( i64 %tmp376707172.ins ) + to label %invcont381 unwind label %unwind277 + +invcont381: ; preds = %invcont370 + %tmp382 = load i32* @report__test_name_len ; <i32> [#uses=6] + %tmp415 = icmp sgt i32 %tmp382, -1 ; <i1> [#uses=1] + %max416 = select i1 %tmp415, i32 %tmp382, i32 0 ; <i32> [#uses=1] + %tmp417 = alloca i8, i32 %max416 ; <i8*> [#uses=3] + %tmp423 = icmp sgt i32 %tmp382, 0 ; <i1> [#uses=1] + br i1 %tmp423, label %bb427, label %cond_next442 + +bb427: ; preds = %invcont381 + store i8 32, i8* %tmp417 + %tmp434 = icmp eq i32 %tmp382, 1 ; <i1> [#uses=1] + br i1 %tmp434, label %cond_next442, label %cond_next438.preheader + +cond_next438.preheader: ; preds = %bb427 + %tmp. = add i32 %tmp382, -1 ; <i32> [#uses=1] + br label %cond_next438 + +cond_next438: ; preds = %cond_next438, %cond_next438.preheader + %indvar = phi i32 [ 0, %cond_next438.preheader ], [ %J130b.513.5, %cond_next438 ] ; <i32> [#uses=1] + %J130b.513.5 = add i32 %indvar, 1 ; <i32> [#uses=3] + %tmp43118 = getelementptr i8* %tmp417, i32 %J130b.513.5 ; <i8*> [#uses=1] + store i8 32, i8* %tmp43118 + %exitcond = icmp eq i32 %J130b.513.5, %tmp. ; <i1> [#uses=1] + br i1 %exitcond, label %cond_next442, label %cond_next438 + +cond_next442: ; preds = %cond_next438, %bb427, %invcont381 + %tmp448 = getelementptr %struct.string___XUB* %A.270, i32 0, i32 0 ; <i32*> [#uses=1] + store i32 1, i32* %tmp448 + %tmp449 = getelementptr %struct.string___XUB* %A.270, i32 0, i32 1 ; <i32*> [#uses=1] + store i32 %tmp382, i32* %tmp449 + %tmp41762 = ptrtoint i8* %tmp417 to i32 ; <i32> [#uses=1] + %tmp4176263 = zext i32 %tmp41762 to i64 ; <i64> [#uses=1] + %A.27058 = ptrtoint %struct.string___XUB* %A.270 to i32 ; <i32> [#uses=1] + %A.2705859 = zext i32 %A.27058 to i64 ; <i64> [#uses=1] + %A.270585960 = shl i64 %A.2705859, 32 ; <i64> [#uses=1] + %A.270585960.ins = or i64 %tmp4176263, %A.270585960 ; <i64> [#uses=1] + invoke void @system__string_ops_concat_3__str_concat_3( %struct.string___XUP* %tmp20 sret , i64 or (i64 zext (i32 ptrtoint ([5 x i8]* @.str21 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.81.900 to i32) to i64), i64 32)), i64 %A.270585960.ins, i64 or (i64 zext (i32 ptrtoint ([37 x i8]* @.str22 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.209.1380 to i32) to i64), i64 32)) ) + to label %invcont467 unwind label %unwind277 + +invcont467: ; preds = %cond_next442 + %tmp469 = getelementptr %struct.string___XUP* %tmp20, i32 0, i32 0 ; <i8**> [#uses=1] + %tmp470 = load i8** %tmp469 ; <i8*> [#uses=1] + %tmp47050 = ptrtoint i8* %tmp470 to i32 ; <i32> [#uses=1] + %tmp4705051 = zext i32 %tmp47050 to i64 ; <i64> [#uses=1] + %tmp472 = getelementptr %struct.string___XUP* %tmp20, i32 0, i32 1 ; <%struct.string___XUB**> [#uses=1] + %tmp473 = load %struct.string___XUB** %tmp472 ; <%struct.string___XUB*> [#uses=1] + %tmp47346 = ptrtoint %struct.string___XUB* %tmp473 to i32 ; <i32> [#uses=1] + %tmp4734647 = zext i32 %tmp47346 to i64 ; <i64> [#uses=1] + %tmp473464748 = shl i64 %tmp4734647, 32 ; <i64> [#uses=1] + %tmp473464748.ins = or i64 %tmp473464748, %tmp4705051 ; <i64> [#uses=1] + invoke fastcc void @report__put_msg( i64 %tmp473464748.ins ) + to label %cleanup unwind label %unwind277 + +cleanup: ; preds = %invcont467 + call void @llvm.stackrestore( i8* %tmp262 ) + br label %cond_next618 + +bb483: ; preds = %entry + %tmp484 = load i32* @report__test_name_len ; <i32> [#uses=4] + %tmp487 = icmp sgt i32 %tmp484, 0 ; <i1> [#uses=2] + %tmp494 = icmp sgt i32 %tmp484, 15 ; <i1> [#uses=1] + %bothcond142 = and i1 %tmp487, %tmp494 ; <i1> [#uses=1] + br i1 %bothcond142, label %cond_true497, label %cond_next500 + +cond_true497: ; preds = %bb483 + invoke void @__gnat_rcheck_12( i8* getelementptr ([12 x i8]* @.str, i32 0, i32 0), i32 223 ) + to label %UnifiedUnreachableBlock unwind label %unwind + +cond_next500: ; preds = %bb483 + %tmp529 = getelementptr %struct.string___XUB* %A.284, i32 0, i32 0 ; <i32*> [#uses=1] + store i32 1, i32* %tmp529 + %tmp530 = getelementptr %struct.string___XUB* %A.284, i32 0, i32 1 ; <i32*> [#uses=1] + store i32 %tmp484, i32* %tmp530 + br i1 %tmp487, label %cond_true537, label %cond_next567 + +cond_true537: ; preds = %cond_next500 + %tmp501.off = add i32 %tmp484, -1 ; <i32> [#uses=1] + %bothcond3 = icmp ugt i32 %tmp501.off, 14 ; <i1> [#uses=1] + br i1 %bothcond3, label %bb555, label %cond_next567 + +bb555: ; preds = %cond_true537 + invoke void @__gnat_rcheck_05( i8* getelementptr ([12 x i8]* @.str, i32 0, i32 0), i32 223 ) + to label %UnifiedUnreachableBlock unwind label %unwind + +cond_next567: ; preds = %cond_true537, %cond_next500 + %A.28435 = ptrtoint %struct.string___XUB* %A.284 to i32 ; <i32> [#uses=1] + %A.2843536 = zext i32 %A.28435 to i64 ; <i64> [#uses=1] + %A.284353637 = shl i64 %A.2843536, 32 ; <i64> [#uses=1] + %A.284353637.ins = or i64 %A.284353637, zext (i32 ptrtoint ([15 x i8]* @report__test_name to i32) to i64) ; <i64> [#uses=1] + invoke void @system__string_ops_concat_3__str_concat_3( %struct.string___XUP* %tmp25 sret , i64 or (i64 zext (i32 ptrtoint ([5 x i8]* @.str24 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.81.900 to i32) to i64), i64 32)), i64 %A.284353637.ins, i64 or (i64 zext (i32 ptrtoint ([37 x i8]* @.str23 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.209.1380 to i32) to i64), i64 32)) ) + to label %invcont589 unwind label %unwind + +invcont589: ; preds = %cond_next567 + %tmp591 = getelementptr %struct.string___XUP* %tmp25, i32 0, i32 0 ; <i8**> [#uses=1] + %tmp592 = load i8** %tmp591 ; <i8*> [#uses=1] + %tmp59228 = ptrtoint i8* %tmp592 to i32 ; <i32> [#uses=1] + %tmp5922829 = zext i32 %tmp59228 to i64 ; <i64> [#uses=1] + %tmp594 = getelementptr %struct.string___XUP* %tmp25, i32 0, i32 1 ; <%struct.string___XUB**> [#uses=1] + %tmp595 = load %struct.string___XUB** %tmp594 ; <%struct.string___XUB*> [#uses=1] + %tmp59524 = ptrtoint %struct.string___XUB* %tmp595 to i32 ; <i32> [#uses=1] + %tmp5952425 = zext i32 %tmp59524 to i64 ; <i64> [#uses=1] + %tmp595242526 = shl i64 %tmp5952425, 32 ; <i64> [#uses=1] + %tmp595242526.ins = or i64 %tmp595242526, %tmp5922829 ; <i64> [#uses=1] + invoke fastcc void @report__put_msg( i64 %tmp595242526.ins ) + to label %cond_next618 unwind label %unwind + +cond_next618: ; preds = %invcont589, %cleanup, %invcont249, %invcont131 + store i8 1, i8* @report__test_status + store i32 7, i32* @report__test_name_len + store i8 78, i8* getelementptr ([15 x i8]* @report__test_name, i32 0, i32 0) + store i8 79, i8* getelementptr ([15 x i8]* @report__test_name, i32 0, i32 1) + store i8 95, i8* getelementptr ([15 x i8]* @report__test_name, i32 0, i32 2) + store i8 78, i8* getelementptr ([15 x i8]* @report__test_name, i32 0, i32 3) + store i8 65, i8* getelementptr ([15 x i8]* @report__test_name, i32 0, i32 4) + store i8 77, i8* getelementptr ([15 x i8]* @report__test_name, i32 0, i32 5) + store i8 69, i8* getelementptr ([15 x i8]* @report__test_name, i32 0, i32 6) + %CHAIN.310.0.0.0.val5.i = ptrtoint i8* %tmp29 to i32 ; <i32> [#uses=1] + %CHAIN.310.0.0.0.val56.i = zext i32 %CHAIN.310.0.0.0.val5.i to i64 ; <i64> [#uses=1] + %CHAIN.310.0.0.1.val2.i = zext i32 %tmp32 to i64 ; <i64> [#uses=1] + %CHAIN.310.0.0.1.val23.i = shl i64 %CHAIN.310.0.0.1.val2.i, 32 ; <i64> [#uses=1] + %CHAIN.310.0.0.1.val23.ins.i = or i64 %CHAIN.310.0.0.1.val23.i, %CHAIN.310.0.0.0.val56.i ; <i64> [#uses=1] + call void @system__secondary_stack__ss_release( i64 %CHAIN.310.0.0.1.val23.ins.i ) + ret void + +cleanup717: ; preds = %unwind277, %unwind + %eh_exception.0 = phi i8* [ %eh_ptr278, %unwind277 ], [ %eh_ptr, %unwind ] ; <i8*> [#uses=1] + %CHAIN.310.0.0.0.val5.i8 = ptrtoint i8* %tmp29 to i32 ; <i32> [#uses=1] + %CHAIN.310.0.0.0.val56.i9 = zext i32 %CHAIN.310.0.0.0.val5.i8 to i64 ; <i64> [#uses=1] + %CHAIN.310.0.0.1.val2.i10 = zext i32 %tmp32 to i64 ; <i64> [#uses=1] + %CHAIN.310.0.0.1.val23.i11 = shl i64 %CHAIN.310.0.0.1.val2.i10, 32 ; <i64> [#uses=1] + %CHAIN.310.0.0.1.val23.ins.i12 = or i64 %CHAIN.310.0.0.1.val23.i11, %CHAIN.310.0.0.0.val56.i9 ; <i64> [#uses=1] + call void @system__secondary_stack__ss_release( i64 %CHAIN.310.0.0.1.val23.ins.i12 ) + call i32 (...)* @_Unwind_Resume( i8* %eh_exception.0 ) ; <i32>:0 [#uses=0] + unreachable + +UnifiedUnreachableBlock: ; preds = %bb555, %cond_true497, %bb336, %cond_true276, %bb215, %cond_true157, %bb97, %cond_true43 + unreachable +} + +declare i8* @llvm.stacksave() + +declare void @llvm.stackrestore(i8*) + +declare i32 @report__ident_int(i32 %x) + +declare i8 @report__equal(i32 %x, i32 %y) + +declare i8 @report__ident_char(i8 zext %x) + +declare i16 @report__ident_wide_char(i16 zext %x) + +declare i8 @report__ident_bool(i8 %x) + +declare void @report__ident_str(%struct.string___XUP* sret %agg.result, i64 %x.0.0) + +declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) + +declare void @report__ident_wide_str(%struct.wide_string___XUP* sret %agg.result, i64 %x.0.0) + +declare void @__gnat_begin_handler(i8*) + +declare void @__gnat_end_handler(i8*) + +declare void @report__legal_file_name(%struct.string___XUP* sret %agg.result, i32 %x, i64 %nam.0.0) + +declare void @__gnat_rcheck_06(i8*, i32) + +declare void @system__string_ops__str_concat_cs(%struct.string___XUP* sret , i8 zext , i64) diff --git a/test/CodeGen/X86/2007-06-05-LSR-Dominator.ll b/test/CodeGen/X86/2007-06-05-LSR-Dominator.ll new file mode 100644 index 0000000..3e7776a --- /dev/null +++ b/test/CodeGen/X86/2007-06-05-LSR-Dominator.ll @@ -0,0 +1,129 @@ +; PR1495 +; RUN: llvm-as < %s | llc -march=x86 + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" +target triple = "i686-pc-linux-gnu" + %struct.AVRational = type { i32, i32 } + %struct.FFTComplex = type { float, float } + %struct.FFTContext = type { i32, i32, i16*, %struct.FFTComplex*, %struct.FFTComplex*, void (%struct.FFTContext*, %struct.FFTComplex*)*, void (%struct.MDCTContext*, float*, float*, float*)* } + %struct.MDCTContext = type { i32, i32, float*, float*, %struct.FFTContext } + %struct.Minima = type { i32, i32, i32, i32 } + %struct.codebook_t = type { i32, i8*, i32*, i32, float, float, i32, i32, i32*, float*, float* } + %struct.floor_class_t = type { i32, i32, i32, i32* } + %struct.floor_t = type { i32, i32*, i32, %struct.floor_class_t*, i32, i32, i32, %struct.Minima* } + %struct.mapping_t = type { i32, i32*, i32*, i32*, i32, i32*, i32* } + %struct.residue_t = type { i32, i32, i32, i32, i32, i32, [8 x i8]*, [2 x float]* } + %struct.venc_context_t = type { i32, i32, [2 x i32], [2 x %struct.MDCTContext], [2 x float*], i32, float*, float*, float*, float*, float, i32, %struct.codebook_t*, i32, %struct.floor_t*, i32, %struct.residue_t*, i32, %struct.mapping_t*, i32, %struct.AVRational* } + +define fastcc i32 @put_main_header(%struct.venc_context_t* %venc, i8** %out) { +entry: + br i1 false, label %bb1820, label %bb288.bb148_crit_edge + +bb288.bb148_crit_edge: ; preds = %entry + ret i32 0 + +cond_next1712: ; preds = %bb1820.bb1680_crit_edge + ret i32 0 + +bb1817: ; preds = %bb1820.bb1680_crit_edge + br label %bb1820 + +bb1820: ; preds = %bb1817, %entry + %pb.1.50 = phi i32 [ %tmp1693, %bb1817 ], [ 8, %entry ] ; <i32> [#uses=3] + br i1 false, label %bb2093, label %bb1820.bb1680_crit_edge + +bb1820.bb1680_crit_edge: ; preds = %bb1820 + %tmp1693 = add i32 %pb.1.50, 8 ; <i32> [#uses=2] + %tmp1702 = icmp slt i32 %tmp1693, 0 ; <i1> [#uses=1] + br i1 %tmp1702, label %cond_next1712, label %bb1817 + +bb2093: ; preds = %bb1820 + %tmp2102 = add i32 %pb.1.50, 65 ; <i32> [#uses=0] + %tmp2236 = add i32 %pb.1.50, 72 ; <i32> [#uses=1] + %tmp2237 = sdiv i32 %tmp2236, 8 ; <i32> [#uses=2] + br i1 false, label %bb2543, label %bb2536.bb2396_crit_edge + +bb2536.bb2396_crit_edge: ; preds = %bb2093 + ret i32 0 + +bb2543: ; preds = %bb2093 + br i1 false, label %cond_next2576, label %bb2690 + +cond_next2576: ; preds = %bb2543 + ret i32 0 + +bb2682: ; preds = %bb2690 + ret i32 0 + +bb2690: ; preds = %bb2543 + br i1 false, label %bb2682, label %bb2698 + +bb2698: ; preds = %bb2690 + br i1 false, label %cond_next2726, label %bb2831 + +cond_next2726: ; preds = %bb2698 + ret i32 0 + +bb2831: ; preds = %bb2698 + br i1 false, label %cond_next2859, label %bb2964 + +cond_next2859: ; preds = %bb2831 + br i1 false, label %bb2943, label %cond_true2866 + +cond_true2866: ; preds = %cond_next2859 + br i1 false, label %cond_true2874, label %cond_false2897 + +cond_true2874: ; preds = %cond_true2866 + ret i32 0 + +cond_false2897: ; preds = %cond_true2866 + ret i32 0 + +bb2943: ; preds = %cond_next2859 + ret i32 0 + +bb2964: ; preds = %bb2831 + br i1 false, label %cond_next2997, label %bb4589 + +cond_next2997: ; preds = %bb2964 + ret i32 0 + +bb3103: ; preds = %bb4589 + ret i32 0 + +bb4589: ; preds = %bb2964 + br i1 false, label %bb3103, label %bb4597 + +bb4597: ; preds = %bb4589 + br i1 false, label %cond_next4630, label %bb4744 + +cond_next4630: ; preds = %bb4597 + br i1 false, label %bb4744, label %cond_true4724 + +cond_true4724: ; preds = %cond_next4630 + br i1 false, label %bb4736, label %bb7531 + +bb4736: ; preds = %cond_true4724 + ret i32 0 + +bb4744: ; preds = %cond_next4630, %bb4597 + ret i32 0 + +bb7531: ; preds = %cond_true4724 + %v_addr.023.0.i6 = add i32 %tmp2237, -255 ; <i32> [#uses=1] + br label %bb.i14 + +bb.i14: ; preds = %bb.i14, %bb7531 + %n.021.0.i8 = phi i32 [ 0, %bb7531 ], [ %indvar.next, %bb.i14 ] ; <i32> [#uses=2] + %tmp..i9 = mul i32 %n.021.0.i8, -255 ; <i32> [#uses=1] + %tmp5.i11 = add i32 %v_addr.023.0.i6, %tmp..i9 ; <i32> [#uses=1] + %tmp10.i12 = icmp ugt i32 %tmp5.i11, 254 ; <i1> [#uses=1] + %indvar.next = add i32 %n.021.0.i8, 1 ; <i32> [#uses=1] + br i1 %tmp10.i12, label %bb.i14, label %bb12.loopexit.i18 + +bb12.loopexit.i18: ; preds = %bb.i14 + call void @llvm.memcpy.i32( i8* null, i8* null, i32 %tmp2237, i32 1 ) + ret i32 0 +} + +declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) diff --git a/test/CodeGen/X86/2007-06-14-branchfold.ll b/test/CodeGen/X86/2007-06-14-branchfold.ll new file mode 100644 index 0000000..a7194a0 --- /dev/null +++ b/test/CodeGen/X86/2007-06-14-branchfold.ll @@ -0,0 +1,137 @@ +; RUN: llvm-as < %s | llc -mcpu=i686 | grep jmp | wc -l | grep 1 +; check that branch folding understands FP_REG_KILL is not a branch +; the remaining jmp can be removed if we take advantage of knowing +; abort does not return + +; ModuleID = 'g.bc' +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" +target triple = "i686-pc-linux-gnu" + %struct.FRAME.c34003a = type { float, float } +@report_E = global i8 0 ; <i8*> [#uses=0] + +define void @main() { +entry: + %FRAME.31 = alloca %struct.FRAME.c34003a, align 8 ; <%struct.FRAME.c34003a*> [#uses=4] + %tmp20 = call i32 @report__ident_int( i32 -50 ) ; <i32> [#uses=1] + %tmp2021 = sitofp i32 %tmp20 to float ; <float> [#uses=5] + %tmp23 = fcmp ult float %tmp2021, 0xC7EFFFFFE0000000 ; <i1> [#uses=1] + %tmp26 = fcmp ugt float %tmp2021, 0x47EFFFFFE0000000 ; <i1> [#uses=1] + %bothcond = or i1 %tmp23, %tmp26 ; <i1> [#uses=1] + br i1 %bothcond, label %bb, label %bb30 + +bb: ; preds = %entry + unwind + +bb30: ; preds = %entry + %tmp35 = call i32 @report__ident_int( i32 50 ) ; <i32> [#uses=1] + %tmp3536 = sitofp i32 %tmp35 to float ; <float> [#uses=4] + %tmp38 = fcmp ult float %tmp3536, 0xC7EFFFFFE0000000 ; <i1> [#uses=1] + %tmp44 = fcmp ugt float %tmp3536, 0x47EFFFFFE0000000 ; <i1> [#uses=1] + %bothcond226 = or i1 %tmp38, %tmp44 ; <i1> [#uses=1] + br i1 %bothcond226, label %bb47, label %bb49 + +bb47: ; preds = %bb30 + unwind + +bb49: ; preds = %bb30 + %tmp60 = fcmp ult float %tmp3536, %tmp2021 ; <i1> [#uses=1] + %tmp60.not = xor i1 %tmp60, true ; <i1> [#uses=1] + %tmp65 = fcmp olt float %tmp2021, 0xC7EFFFFFE0000000 ; <i1> [#uses=1] + %bothcond227 = and i1 %tmp65, %tmp60.not ; <i1> [#uses=1] + br i1 %bothcond227, label %cond_true68, label %cond_next70 + +cond_true68: ; preds = %bb49 + unwind + +cond_next70: ; preds = %bb49 + %tmp71 = call i32 @report__ident_int( i32 -30 ) ; <i32> [#uses=1] + %tmp7172 = sitofp i32 %tmp71 to float ; <float> [#uses=3] + %tmp74 = fcmp ult float %tmp7172, 0xC7EFFFFFE0000000 ; <i1> [#uses=1] + %tmp80 = fcmp ugt float %tmp7172, 0x47EFFFFFE0000000 ; <i1> [#uses=1] + %bothcond228 = or i1 %tmp74, %tmp80 ; <i1> [#uses=1] + br i1 %bothcond228, label %bb83, label %bb85 + +bb83: ; preds = %cond_next70 + unwind + +bb85: ; preds = %cond_next70 + %tmp90 = getelementptr %struct.FRAME.c34003a* %FRAME.31, i32 0, i32 1 ; <float*> [#uses=3] + store float %tmp7172, float* %tmp90 + %tmp92 = call i32 @report__ident_int( i32 30 ) ; <i32> [#uses=1] + %tmp9293 = sitofp i32 %tmp92 to float ; <float> [#uses=7] + %tmp95 = fcmp ult float %tmp9293, 0xC7EFFFFFE0000000 ; <i1> [#uses=1] + %tmp101 = fcmp ugt float %tmp9293, 0x47EFFFFFE0000000 ; <i1> [#uses=1] + %bothcond229 = or i1 %tmp95, %tmp101 ; <i1> [#uses=1] + br i1 %bothcond229, label %bb104, label %bb106 + +bb104: ; preds = %bb85 + unwind + +bb106: ; preds = %bb85 + %tmp111 = getelementptr %struct.FRAME.c34003a* %FRAME.31, i32 0, i32 0 ; <float*> [#uses=2] + store float %tmp9293, float* %tmp111 + %tmp123 = load float* %tmp90 ; <float> [#uses=4] + %tmp125 = fcmp ult float %tmp9293, %tmp123 ; <i1> [#uses=1] + br i1 %tmp125, label %cond_next147, label %cond_true128 + +cond_true128: ; preds = %bb106 + %tmp133 = fcmp olt float %tmp123, %tmp2021 ; <i1> [#uses=1] + %tmp142 = fcmp ogt float %tmp9293, %tmp3536 ; <i1> [#uses=1] + %bothcond230 = or i1 %tmp133, %tmp142 ; <i1> [#uses=1] + br i1 %bothcond230, label %bb145, label %cond_next147 + +bb145: ; preds = %cond_true128 + unwind + +cond_next147: ; preds = %cond_true128, %bb106 + %tmp157 = fcmp ugt float %tmp123, -3.000000e+01 ; <i1> [#uses=1] + %tmp165 = fcmp ult float %tmp9293, -3.000000e+01 ; <i1> [#uses=1] + %bothcond231 = or i1 %tmp157, %tmp165 ; <i1> [#uses=1] + br i1 %bothcond231, label %bb168, label %bb169 + +bb168: ; preds = %cond_next147 + unwind + +bb169: ; preds = %cond_next147 + %tmp176 = fcmp ugt float %tmp123, 3.000000e+01 ; <i1> [#uses=1] + %tmp184 = fcmp ult float %tmp9293, 3.000000e+01 ; <i1> [#uses=1] + %bothcond232 = or i1 %tmp176, %tmp184 ; <i1> [#uses=1] + br i1 %bothcond232, label %bb187, label %bb188 + +bb187: ; preds = %bb169 + unwind + +bb188: ; preds = %bb169 + %tmp192 = call fastcc float @c34003a__ident.154( %struct.FRAME.c34003a* %FRAME.31, float 3.000000e+01 ) ; <float> [#uses=2] + %tmp194 = load float* %tmp90 ; <float> [#uses=1] + %tmp196 = fcmp ugt float %tmp194, 0.000000e+00 ; <i1> [#uses=1] + br i1 %tmp196, label %bb207, label %cond_next200 + +cond_next200: ; preds = %bb188 + %tmp202 = load float* %tmp111 ; <float> [#uses=1] + %tmp204 = fcmp ult float %tmp202, 0.000000e+00 ; <i1> [#uses=1] + br i1 %tmp204, label %bb207, label %bb208 + +bb207: ; preds = %cond_next200, %bb188 + unwind + +bb208: ; preds = %cond_next200 + %tmp212 = call fastcc float @c34003a__ident.154( %struct.FRAME.c34003a* %FRAME.31, float 0.000000e+00 ) ; <float> [#uses=1] + %tmp214 = fcmp oge float %tmp212, %tmp192 ; <i1> [#uses=1] + %tmp217 = fcmp oge float %tmp192, 1.000000e+02 ; <i1> [#uses=1] + %tmp221 = or i1 %tmp214, %tmp217 ; <i1> [#uses=1] + br i1 %tmp221, label %cond_true224, label %UnifiedReturnBlock + +cond_true224: ; preds = %bb208 + call void @abort( ) noreturn + ret void + +UnifiedReturnBlock: ; preds = %bb208 + ret void +} + +declare fastcc float @c34003a__ident.154(%struct.FRAME.c34003a* %CHAIN.32, float %x) + +declare i32 @report__ident_int(i32 %x) + +declare void @abort() noreturn diff --git a/test/CodeGen/X86/2007-06-15-IntToMMX.ll b/test/CodeGen/X86/2007-06-15-IntToMMX.ll new file mode 100644 index 0000000..e608ac3 --- /dev/null +++ b/test/CodeGen/X86/2007-06-15-IntToMMX.ll @@ -0,0 +1,17 @@ +; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx | grep paddusw +@R = external global <1 x i64> ; <<1 x i64>*> [#uses=1] + +define void @foo(<1 x i64> %A, <1 x i64> %B) { +entry: + %tmp4 = bitcast <1 x i64> %B to <4 x i16> ; <<4 x i16>> [#uses=1] + %tmp6 = bitcast <1 x i64> %A to <4 x i16> ; <<4 x i16>> [#uses=1] + %tmp7 = tail call <4 x i16> @llvm.x86.mmx.paddus.w( <4 x i16> %tmp6, <4 x i16> %tmp4 ) ; <<4 x i16>> [#uses=1] + %tmp8 = bitcast <4 x i16> %tmp7 to <1 x i64> ; <<1 x i64>> [#uses=1] + store <1 x i64> %tmp8, <1 x i64>* @R + tail call void @llvm.x86.mmx.emms( ) + ret void +} + +declare <4 x i16> @llvm.x86.mmx.paddus.w(<4 x i16>, <4 x i16>) + +declare void @llvm.x86.mmx.emms() diff --git a/test/CodeGen/X86/2007-06-28-X86-64-isel.ll b/test/CodeGen/X86/2007-06-28-X86-64-isel.ll new file mode 100644 index 0000000..5c22f14 --- /dev/null +++ b/test/CodeGen/X86/2007-06-28-X86-64-isel.ll @@ -0,0 +1,16 @@ +; RUN: llvm-as < %s | | llc -march=x86-64 -mattr=+sse2 + +define void @test() { + %tmp1 = call <8 x i16> @llvm.x86.sse2.pmins.w( <8 x i16> zeroinitializer, <8 x i16> bitcast (<4 x i32> < i32 7, i32 7, i32 7, i32 7 > to <8 x i16>) ) + %tmp2 = bitcast <8 x i16> %tmp1 to <4 x i32> + br i1 false, label %bb1, label %bb2 + +bb2: + %tmp38007.i = extractelement <4 x i32> %tmp2, i32 3 + ret void + +bb1: + ret void +} + +declare <8 x i16> @llvm.x86.sse2.pmins.w(<8 x i16>, <8 x i16>) diff --git a/test/CodeGen/X86/2007-06-29-DAGCombinerBug.ll b/test/CodeGen/X86/2007-06-29-DAGCombinerBug.ll new file mode 100644 index 0000000..eaedb52 --- /dev/null +++ b/test/CodeGen/X86/2007-06-29-DAGCombinerBug.ll @@ -0,0 +1,50 @@ +; RUN: llvm-as < %s | | llc -march=x86 -mattr=+sse2 + +define void @test() { +entry: + br i1 false, label %bb13944.preheader, label %cond_true418 + +cond_true418: ; preds = %entry + ret void + +bb13944.preheader: ; preds = %entry + br i1 false, label %bb3517, label %bb13968.preheader + +bb3517: ; preds = %bb13944.preheader + br i1 false, label %cond_false7408, label %cond_next11422 + +cond_false7408: ; preds = %bb3517 + switch i32 0, label %cond_false10578 [ + i32 7, label %cond_next11422 + i32 6, label %cond_true7828 + i32 1, label %cond_true10095 + i32 3, label %cond_true10095 + i32 5, label %cond_true10176 + i32 24, label %cond_true10176 + ] + +cond_true7828: ; preds = %cond_false7408 + br i1 false, label %cond_next8191, label %cond_true8045 + +cond_true8045: ; preds = %cond_true7828 + ret void + +cond_next8191: ; preds = %cond_true7828 + %tmp8234 = sub <4 x i32> < i32 939524096, i32 939524096, i32 939524096, i32 939524096 >, zeroinitializer ; <<4 x i32>> [#uses=0] + ret void + +cond_true10095: ; preds = %cond_false7408, %cond_false7408 + ret void + +cond_true10176: ; preds = %cond_false7408, %cond_false7408 + ret void + +cond_false10578: ; preds = %cond_false7408 + ret void + +cond_next11422: ; preds = %cond_false7408, %bb3517 + ret void + +bb13968.preheader: ; preds = %bb13944.preheader + ret void +} diff --git a/test/CodeGen/X86/2007-06-29-VecFPConstantCSEBug.ll b/test/CodeGen/X86/2007-06-29-VecFPConstantCSEBug.ll new file mode 100644 index 0000000..73ecf69 --- /dev/null +++ b/test/CodeGen/X86/2007-06-29-VecFPConstantCSEBug.ll @@ -0,0 +1,11 @@ +; RUN: llvm-as < %s | | llc -march=x86 -mattr=+sse2 + +define void @test(<4 x float>* %arg) { + %tmp89 = getelementptr <4 x float>* %arg, i64 3 + %tmp1144 = sub <4 x float> < float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00 >, zeroinitializer + store <4 x float> %tmp1144, <4 x float>* null + %tmp1149 = load <4 x float>* %tmp89 + %tmp1150 = sub <4 x float> < float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00 >, %tmp1149 + store <4 x float> %tmp1150, <4 x float>* %tmp89 + ret void +} diff --git a/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll b/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll new file mode 100644 index 0000000..b2b1a94 --- /dev/null +++ b/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll @@ -0,0 +1,20 @@ +; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx | grep {movd %rsi, %mm0} && +; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx | grep {movd %rdi, %mm1} && +; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx | grep {paddusw %mm0, %mm1} + +@R = external global <1 x i64> ; <<1 x i64>*> [#uses=1] + +define void @foo(<1 x i64> %A, <1 x i64> %B) { +entry: + %tmp4 = bitcast <1 x i64> %B to <4 x i16> ; <<4 x i16>> [#uses=1] + %tmp6 = bitcast <1 x i64> %A to <4 x i16> ; <<4 x i16>> [#uses=1] + %tmp7 = tail call <4 x i16> @llvm.x86.mmx.paddus.w( <4 x i16> %tmp6, <4 x i16> %tmp4 ) ; <<4 x i16>> [#uses=1] + %tmp8 = bitcast <4 x i16> %tmp7 to <1 x i64> ; <<1 x i64>> [#uses=1] + store <1 x i64> %tmp8, <1 x i64>* @R + tail call void @llvm.x86.mmx.emms( ) + ret void +} + +declare <4 x i16> @llvm.x86.mmx.paddus.w(<4 x i16>, <4 x i16>) + +declare void @llvm.x86.mmx.emms() diff --git a/test/CodeGen/X86/2007-07-10-StackerAssert.ll b/test/CodeGen/X86/2007-07-10-StackerAssert.ll new file mode 100644 index 0000000..120284f --- /dev/null +++ b/test/CodeGen/X86/2007-07-10-StackerAssert.ll @@ -0,0 +1,41 @@ +; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu -mcpu=athlon -relocation-model=pic +; PR1545 + +@.str97 = external constant [56 x i8] ; <[56 x i8]*> [#uses=1] + +declare void @PR_LogPrint(i8*, ...) + +define i32 @_ZN13nsPrintEngine19SetupToPrintContentEP16nsIDeviceContextP12nsIDOMWindow() { +entry: + br i1 false, label %cond_true122, label %cond_next453 + +cond_true122: ; preds = %entry + br i1 false, label %bb164, label %cond_true136 + +cond_true136: ; preds = %cond_true122 + ret i32 0 + +bb164: ; preds = %cond_true122 + br i1 false, label %bb383, label %cond_true354 + +cond_true354: ; preds = %bb164 + ret i32 0 + +bb383: ; preds = %bb164 + %tmp408 = load float* null ; <float> [#uses=2] + br i1 false, label %cond_true425, label %cond_next443 + +cond_true425: ; preds = %bb383 + %tmp430 = load float* null ; <float> [#uses=1] + %tmp432 = sub float %tmp430, %tmp408 ; <float> [#uses=1] + %tmp432433 = fpext float %tmp432 to double ; <double> [#uses=1] + %tmp434435 = fpext float %tmp408 to double ; <double> [#uses=1] + call void (i8*, ...)* @PR_LogPrint( i8* getelementptr ([56 x i8]* @.str97, i32 0, i32 0), double 0.000000e+00, double %tmp434435, double %tmp432433 ) + ret i32 0 + +cond_next443: ; preds = %bb383 + ret i32 0 + +cond_next453: ; preds = %entry + ret i32 0 +} diff --git a/test/CodeGen/X86/aliases.ll b/test/CodeGen/X86/aliases.ll new file mode 100644 index 0000000..9bd6140 --- /dev/null +++ b/test/CodeGen/X86/aliases.ll @@ -0,0 +1,32 @@ +; RUN: llvm-as < %s | \ +; RUN: llc -mtriple=i686-pc-linux-gnu -o %t -f +; RUN: grep -c set %t | grep 5 +; RUN: grep -c globl %t | grep 4 +; RUN: grep -c weak %t | grep 1 + +@bar = external global i32 +@foo1 = alias i32* @bar +@foo2 = alias i32* @bar + +%FunTy = type i32() + +declare i32 @foo_f() +@bar_f = alias weak %FunTy* @foo_f + +@bar_i = alias internal i32* @bar + +@A = alias bitcast (i32* @bar to i64*) + +define i32 @test() { +entry: + %tmp = load i32* @foo1 + %tmp1 = load i32* @foo2 + %tmp0 = load i32* @bar_i + %tmp2 = call i32 @foo_f() + %tmp3 = add i32 %tmp, %tmp2 + %tmp4 = call %FunTy* @bar_f() + %tmp5 = add i32 %tmp3, %tmp4 + %tmp6 = add i32 %tmp1, %tmp5 + %tmp7 = add i32 %tmp6, %tmp0 + ret i32 %tmp7 +} diff --git a/test/CodeGen/X86/alloca-align-rounding.ll b/test/CodeGen/X86/alloca-align-rounding.ll new file mode 100644 index 0000000..899dbff --- /dev/null +++ b/test/CodeGen/X86/alloca-align-rounding.ll @@ -0,0 +1,9 @@ +; RUN: llvm-as < %s | llc -march=x86-64 | not grep and + +declare void @bar(<2 x i64>* %n) + +define void @foo(i32 %h) { + %p = alloca <2 x i64>, i32 %h + call void @bar(<2 x i64>* %p) + ret void +} diff --git a/test/CodeGen/X86/and-or-fold.ll b/test/CodeGen/X86/and-or-fold.ll new file mode 100644 index 0000000..3240bdf --- /dev/null +++ b/test/CodeGen/X86/and-or-fold.ll @@ -0,0 +1,13 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep and | wc -l | grep 1 + +; The dag combiner should fold together (x&127)|(y&16711680) -> (x|y)&c1 +; in this case. +uint %test6(uint %x, ushort %y) { + %tmp1 = cast ushort %y to uint + %tmp2 = and uint %tmp1, 127 ; <uint> [#uses=1] + %tmp4 = shl uint %x, ubyte 16 ; <uint> [#uses=1] + %tmp5 = and uint %tmp4, 16711680 ; <uint> [#uses=1] + %tmp6 = or uint %tmp2, %tmp5 ; <uint> [#uses=1] + ret uint %tmp6 +} + diff --git a/test/CodeGen/X86/asm-global-imm.ll b/test/CodeGen/X86/asm-global-imm.ll new file mode 100644 index 0000000..4ca4c58 --- /dev/null +++ b/test/CodeGen/X86/asm-global-imm.ll @@ -0,0 +1,31 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -relocation-model=static | \ +; RUN: grep {test1 \$_GV} +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -relocation-model=static | \ +; RUN: grep {test2 _GV} +; PR882 + +target datalayout = "e-p:32:32" +target endian = little +target pointersize = 32 +target triple = "i686-apple-darwin9.0.0d2" +%GV = weak global int 0 ; <int*> [#uses=2] +%str = external global [12 x sbyte] ; <[12 x sbyte]*> [#uses=1] + +implementation ; Functions: + +void %foo() { +entry: + tail call void asm sideeffect "test1 $0", "i,~{dirflag},~{fpsr},~{flags}"( int* %GV ) + tail call void asm sideeffect "test2 ${0:c}", "i,~{dirflag},~{fpsr},~{flags}"( int* %GV ) + ret void +} + + +void %unknown_bootoption() { +entry: + call void asm sideeffect "ud2\0A\09.word ${0:c}\0A\09.long ${1:c}\0A", +"i,i,~{dirflag},~{fpsr},~{flags}"( int 235, sbyte* getelementptr ([12 x sbyte]* +%str, int 0, uint 0) ) + ret void +} + diff --git a/test/CodeGen/X86/bitcast.ll b/test/CodeGen/X86/bitcast.ll new file mode 100644 index 0000000..d8bc069 --- /dev/null +++ b/test/CodeGen/X86/bitcast.ll @@ -0,0 +1,23 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86-64 +; PR1033 + +long %test1(double %t) { + %u = bitcast double %t to long + ret long %u +} + +double %test2(long %t) { + %u = bitcast long %t to double + ret double %u +} + +int %test3(float %t) { + %u = bitcast float %t to int + ret int %u +} + +float %test4(int %t) { + %u = bitcast int %t to float + ret float %u +} diff --git a/test/CodeGen/X86/bitcast2.ll b/test/CodeGen/X86/bitcast2.ll new file mode 100644 index 0000000..edf8523 --- /dev/null +++ b/test/CodeGen/X86/bitcast2.ll @@ -0,0 +1,13 @@ +; RUN: llvm-as < %s | llc -march=x86-64 | grep movd | wc -l | grep 2 +; RUN: llvm-as < %s | llc -march=x86-64 | not grep rsp + +define i64 @test1(double %A) { + %B = bitcast double %A to i64 + ret i64 %B +} + +define double @test2(i64 %A) { + %B = bitcast i64 %A to double + ret double %B +} + diff --git a/test/CodeGen/X86/bswap.ll b/test/CodeGen/X86/bswap.ll new file mode 100644 index 0000000..4749ea8 --- /dev/null +++ b/test/CodeGen/X86/bswap.ll @@ -0,0 +1,24 @@ +; bswap should be constant folded when it is passed a constant argument + +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | \ +; RUN: grep bswapl | wc -l | grep 3 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep rolw | wc -l | grep 1 + +declare ushort %llvm.bswap.i16(ushort) +declare uint %llvm.bswap.i32(uint) +declare ulong %llvm.bswap.i64(ulong) + +ushort %W(ushort %A) { + %Z = call ushort %llvm.bswap.i16(ushort %A) + ret ushort %Z +} + +uint %X(uint %A) { + %Z = call uint %llvm.bswap.i32(uint %A) + ret uint %Z +} + +ulong %Y(ulong %A) { + %Z = call ulong %llvm.bswap.i64(ulong %A) + ret ulong %Z +} diff --git a/test/CodeGen/X86/cmp-test.ll b/test/CodeGen/X86/cmp-test.ll new file mode 100644 index 0000000..78d8d8f --- /dev/null +++ b/test/CodeGen/X86/cmp-test.ll @@ -0,0 +1,27 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep cmp | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep test | wc -l | grep 1 + +int %f1(int %X, int* %y) { + %tmp = load int* %y + %tmp = seteq int %tmp, 0 + br bool %tmp, label %ReturnBlock, label %cond_true + +cond_true: + ret int 1 + +ReturnBlock: + ret int 0 +} + +int %f2(int %X, int* %y) { + %tmp = load int* %y + %tmp1 = shl int %tmp, ubyte 3 + %tmp1 = seteq int %tmp1, 0 + br bool %tmp1, label %ReturnBlock, label %cond_true + +cond_true: + ret int 1 + +ReturnBlock: + ret int 0 +} diff --git a/test/CodeGen/X86/commute-two-addr.ll b/test/CodeGen/X86/commute-two-addr.ll new file mode 100644 index 0000000..462b31e --- /dev/null +++ b/test/CodeGen/X86/commute-two-addr.ll @@ -0,0 +1,25 @@ +; The register allocator can commute two-address instructions to avoid +; insertion of register-register copies. + +; Make sure there are only 3 mov's for each testcase +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel | \ +; RUN: grep {mov } | wc -l | grep 6 + + +target triple = "i686-pc-linux-gnu" + +%G = external global int + +declare void %ext(int) + +int %add_test(int %X, int %Y) { + %Z = add int %X, %Y ;; Last use of Y, but not of X. + store int %Z, int* %G + ret int %X +} + +int %xor_test(int %X, int %Y) { + %Z = xor int %X, %Y ;; Last use of Y, but not of X. + store int %Z, int* %G + ret int %X +} diff --git a/test/CodeGen/X86/compare-add.ll b/test/CodeGen/X86/compare-add.ll new file mode 100644 index 0000000..d3d7668 --- /dev/null +++ b/test/CodeGen/X86/compare-add.ll @@ -0,0 +1,7 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | not grep add +bool %X(int %X) { + %Y = add int %X, 14 + %Z = setne int %Y, 12345 + ret bool %Z +} + diff --git a/test/CodeGen/X86/compare_folding.llx b/test/CodeGen/X86/compare_folding.llx new file mode 100644 index 0000000..631bc92 --- /dev/null +++ b/test/CodeGen/X86/compare_folding.llx @@ -0,0 +1,10 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mcpu=yonah | \ +; RUN: grep movsd | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mcpu=yonah | \ +; RUN: grep ucomisd +declare bool %llvm.isunordered.f64(double,double) + +bool %test1(double %X, double %Y) { ;; Returns isunordered(X,Y) + %COM = call bool %llvm.isunordered.f64(double %X, double %Y) + ret bool %COM +} diff --git a/test/CodeGen/X86/darwin-no-dead-strip.ll b/test/CodeGen/X86/darwin-no-dead-strip.ll new file mode 100644 index 0000000..8e671ff --- /dev/null +++ b/test/CodeGen/X86/darwin-no-dead-strip.ll @@ -0,0 +1,7 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc | grep no_dead_strip + +target endian = little +target pointersize = 32 +target triple = "i686-apple-darwin8.7.2" +%x = weak global int 0 ; <int*> [#uses=1] +%llvm.used = appending global [1 x sbyte*] [ sbyte* cast (int* %x to sbyte*) ] diff --git a/test/CodeGen/X86/dg.exp b/test/CodeGen/X86/dg.exp new file mode 100644 index 0000000..161fccc --- /dev/null +++ b/test/CodeGen/X86/dg.exp @@ -0,0 +1,5 @@ +load_lib llvm.exp + +if { [llvm_supports_target X86] } { + RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,llx,c,cpp,tr}]] +} diff --git a/test/CodeGen/X86/div_const.ll b/test/CodeGen/X86/div_const.ll new file mode 100644 index 0000000..326fd77 --- /dev/null +++ b/test/CodeGen/X86/div_const.ll @@ -0,0 +1,7 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep 365384439 + +uint %f9188_mul365384439_shift27(uint %A) { + %tmp1 = div uint %A, 1577682821 ; <uint> [#uses=1] + ret uint %tmp1 +} + diff --git a/test/CodeGen/X86/dollar-name.ll b/test/CodeGen/X86/dollar-name.ll new file mode 100644 index 0000000..87c7315 --- /dev/null +++ b/test/CodeGen/X86/dollar-name.ll @@ -0,0 +1,17 @@ +; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=att | grep (\$bar) | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=att | grep (\$qux) | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=att | grep (\$hen) | wc -l | grep 1 +; PR1339 + +@"$bar" = global i32 zeroinitializer +@"$qux" = external global i32 + +define i32 @"$foo"() { + %m = load i32* @"$bar" + %n = load i32* @"$qux" + %t = add i32 %m, %n + %u = call i32 @"$hen"(i32 %t) + ret i32 %u +} + +declare i32 @"$hen"(i32 %a) diff --git a/test/CodeGen/X86/extend.ll b/test/CodeGen/X86/extend.ll new file mode 100644 index 0000000..fdad790 --- /dev/null +++ b/test/CodeGen/X86/extend.ll @@ -0,0 +1,19 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel | grep movzx | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel | grep movsx | wc -l | grep 1 + +%G1 = internal global ubyte 0 ; <ubyte*> [#uses=1] +%G2 = internal global sbyte 0 ; <sbyte*> [#uses=1] + +implementation ; Functions: + +short %test1() { ;; one zext + %tmp.0 = load ubyte* %G1 ; <ubyte> [#uses=1] + %tmp.3 = cast ubyte %tmp.0 to short ; <short> [#uses=1] + ret short %tmp.3 +} + +short %test2() { ;; one sext + %tmp.0 = load sbyte* %G2 ; <sbyte> [#uses=1] + %tmp.3 = cast sbyte %tmp.0 to short ; <short> [#uses=1] + ret short %tmp.3 +} diff --git a/test/CodeGen/X86/extern_weak.ll b/test/CodeGen/X86/extern_weak.ll new file mode 100644 index 0000000..853a713 --- /dev/null +++ b/test/CodeGen/X86/extern_weak.ll @@ -0,0 +1,11 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=i686-apple-darwin | grep weak_reference | wc -l | grep 2 + +%Y = global int (sbyte*)* %X +declare extern_weak int %X(sbyte*) + +void %bar() { + tail call void (...)* %foo( ) + ret void +} + +declare extern_weak void %foo(...) diff --git a/test/CodeGen/X86/fabs.ll b/test/CodeGen/X86/fabs.ll new file mode 100644 index 0000000..dd94613 --- /dev/null +++ b/test/CodeGen/X86/fabs.ll @@ -0,0 +1,24 @@ +; Make sure this testcase codegens to the fabs instruction, not a call to fabsf +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=-sse2,-sse3 | \ +; RUN: grep fabs\$ | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=x86 -mattr=-sse2,-sse3 -enable-unsafe-fp-math | \ +; RUN: grep fabs\$ | wc -l | grep 2 + +target endian = little +target pointersize = 32 + +declare float %fabsf(float) + +float %test1(float %X) { + %Y = call float %fabsf(float %X) + ret float %Y +} + +double %test2(double %X) { + %Y = setge double %X, -0.0 + %Z = sub double -0.0, %X + %Q = select bool %Y, double %X, double %Z + ret double %Q +} + diff --git a/test/CodeGen/X86/fast-cc-callee-pops.ll b/test/CodeGen/X86/fast-cc-callee-pops.ll new file mode 100644 index 0000000..ed15dd2 --- /dev/null +++ b/test/CodeGen/X86/fast-cc-callee-pops.ll @@ -0,0 +1,8 @@ +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=x86 -x86-asm-syntax=intel -mcpu=yonah | grep {ret 20} + +; Check that a fastcc function pops its stack variables before returning. + +x86_fastcallcc void %func(long %X, long %Y, float %G, double %Z) { + ret void +} diff --git a/test/CodeGen/X86/fast-cc-merge-stack-adj.ll b/test/CodeGen/X86/fast-cc-merge-stack-adj.ll new file mode 100644 index 0000000..252981f --- /dev/null +++ b/test/CodeGen/X86/fast-cc-merge-stack-adj.ll @@ -0,0 +1,12 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel | \ +; RUN: grep {add ESP, 8} + +target triple = "i686-pc-linux-gnu" + +declare x86_fastcallcc void %func(int *%X, long %Y) + +x86_fastcallcc void %caller(int, long) { + %X = alloca int + call x86_fastcallcc void %func(int* %X, long 0) ;; not a tail call + ret void +} diff --git a/test/CodeGen/X86/fast-cc-pass-in-regs.ll b/test/CodeGen/X86/fast-cc-pass-in-regs.ll new file mode 100644 index 0000000..dc88015 --- /dev/null +++ b/test/CodeGen/X86/fast-cc-pass-in-regs.ll @@ -0,0 +1,15 @@ +; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | \ +; RUN: grep {mov EDX, 1} +; check that fastcc is passing stuff in regs. + +declare x86_fastcallcc i64 @callee(i64) + +define i64 @caller() { + %X = callx86_fastcallcc i64 @callee( i64 4294967299 ) ; <i64> [#uses=1] + ret i64 %X +} + +define x86_fastcallcc i64 @caller2(i64 %X) { + ret i64 %X +} + diff --git a/test/CodeGen/X86/fastcall-correct-mangling.ll b/test/CodeGen/X86/fastcall-correct-mangling.ll new file mode 100644 index 0000000..c513666 --- /dev/null +++ b/test/CodeGen/X86/fastcall-correct-mangling.ll @@ -0,0 +1,8 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mtriple=mingw32 | \ +; RUN: grep {@12} + +; Check that a fastcall function gets correct mangling + +x86_fastcallcc void %func(long %X, ubyte %Y, ubyte %G, ushort %Z) { + ret void +} diff --git a/test/CodeGen/X86/fildll.ll b/test/CodeGen/X86/fildll.ll new file mode 100644 index 0000000..711eede --- /dev/null +++ b/test/CodeGen/X86/fildll.ll @@ -0,0 +1,11 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=att -mattr=-sse2 | grep fildll | wc -l | grep 2 + +fastcc double %sint64_to_fp(long %X) { + %R = cast long %X to double + ret double %R +} + +fastcc double %uint64_to_fp(ulong %X) { + %R = cast ulong %X to double + ret double %R +} diff --git a/test/CodeGen/X86/fp-immediate-shorten.ll b/test/CodeGen/X86/fp-immediate-shorten.ll new file mode 100644 index 0000000..73c184b --- /dev/null +++ b/test/CodeGen/X86/fp-immediate-shorten.ll @@ -0,0 +1,6 @@ +;; Test that this FP immediate is stored in the constant pool as a float. + +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=-sse2,-sse3 | \ +; RUN: grep {.long.1123418112} + +double %D() { ret double 123.0 } diff --git a/test/CodeGen/X86/fp-stack-compare.ll b/test/CodeGen/X86/fp-stack-compare.ll new file mode 100644 index 0000000..2592052 --- /dev/null +++ b/test/CodeGen/X86/fp-stack-compare.ll @@ -0,0 +1,12 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mcpu=i386 | \ +; RUN: grep {fucomi.*st.\[12\]} +; PR1012 + +float %foo(float *%col.2.0) { + %tmp = load float* %col.2.0 ; <float> [#uses=3] + %tmp16 = setlt float %tmp, 0.000000e+00 ; <bool> [#uses=1] + %tmp20 = sub float -0.000000e+00, %tmp ; <float> [#uses=1] + %iftmp.2.0 = select bool %tmp16, float %tmp20, float %tmp + ret float %iftmp.2.0 +} + diff --git a/test/CodeGen/X86/fp-stack-ret.ll b/test/CodeGen/X86/fp-stack-ret.ll new file mode 100644 index 0000000..69c5fc5 --- /dev/null +++ b/test/CodeGen/X86/fp-stack-ret.ll @@ -0,0 +1,26 @@ +; RUN: llvm-as < %s | \ +; RUN: llc -mtriple=i686-apple-darwin8 -mcpu=yonah -march=x86 > %t +; RUN: grep fldl %t | wc -l | grep 1 +; RUN: not grep xmm %t +; RUN: grep {sub.*esp} %t | wc -l | grep 1 + +; These testcases shouldn't require loading into an XMM register then storing +; to memory, then reloading into an FPStack reg. + +define double @test1(double *%P) { + %A = load double* %P + ret double %A +} + +; fastcc should return a value +define fastcc double @test2(<2 x double> %A) { + %B = extractelement <2 x double> %A, i32 0 + ret double %B +} + +define fastcc double @test3(<4 x float> %A) { + %B = bitcast <4 x float> %A to <2 x double> + %C = call fastcc double @test2(<2 x double> %B) + ret double %C +} + diff --git a/test/CodeGen/X86/fp_constant_op.llx b/test/CodeGen/X86/fp_constant_op.llx new file mode 100644 index 0000000..30e06c0 --- /dev/null +++ b/test/CodeGen/X86/fp_constant_op.llx @@ -0,0 +1,35 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel -mcpu=i486 | \ +; RUN: grep -i ST | not grep {fadd\\|fsub\\|fdiv\\|fmul} + +; Test that the load of the constant is folded into the operation. + +double %test_add(double %P) { + %tmp.1 = add double %P, 0x405EC00000000000 + ret double %tmp.1 +} + +double %test_mul(double %P) { + %tmp.1 = mul double %P, 0x405EC00000000000 + ret double %tmp.1 +} + +double %test_sub(double %P) { + %tmp.1 = sub double %P, 0x405EC00000000000 + ret double %tmp.1 +} + +double %test_subr(double %P) { + %tmp.1 = sub double 0x405EC00000000000, %P + ret double %tmp.1 +} + +double %test_div(double %P) { + %tmp.1 = div double %P, 0x405EC00000000000 + ret double %tmp.1 +} + +double %test_divr(double %P) { + %tmp.1 = div double 0x405EC00000000000, %P + ret double %tmp.1 +} + diff --git a/test/CodeGen/X86/fp_load_cast_fold.llx b/test/CodeGen/X86/fp_load_cast_fold.llx new file mode 100644 index 0000000..b134695 --- /dev/null +++ b/test/CodeGen/X86/fp_load_cast_fold.llx @@ -0,0 +1,17 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep fild | not grep ESP +double %short(short* %P) { + %V = load short* %P + %V2 = cast short %V to double + ret double %V2 +} +double %int(int* %P) { + %V = load int* %P + %V2 = cast int %V to double + ret double %V2 +} +double %long(long* %P) { + %V = load long* %P + %V2 = cast long %V to double + ret double %V2 +} + diff --git a/test/CodeGen/X86/fp_load_fold.llx b/test/CodeGen/X86/fp_load_fold.llx new file mode 100644 index 0000000..91f41f6 --- /dev/null +++ b/test/CodeGen/X86/fp_load_fold.llx @@ -0,0 +1,41 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel | \ +; RUN: grep -i ST | not grep {fadd\\|fsub\\|fdiv\\|fmul} + +; Test that the load of the memory location is folded into the operation. + + +double %test_add(double %X, double *%P) { + %Y = load double* %P + %R = add double %X, %Y + ret double %R +} + +double %test_mul(double %X, double *%P) { + %Y = load double* %P + %R = mul double %X, %Y + ret double %R +} + +double %test_sub(double %X, double *%P) { + %Y = load double* %P + %R = sub double %X, %Y + ret double %R +} + +double %test_subr(double %X, double *%P) { + %Y = load double* %P + %R = sub double %Y, %X + ret double %R +} + +double %test_div(double %X, double *%P) { + %Y = load double* %P + %R = div double %X, %Y + ret double %R +} + +double %test_divr(double %X, double *%P) { + %Y = load double* %P + %R = div double %Y, %X + ret double %R +} diff --git a/test/CodeGen/X86/i128-mul.ll b/test/CodeGen/X86/i128-mul.ll new file mode 100644 index 0000000..f8c732e --- /dev/null +++ b/test/CodeGen/X86/i128-mul.ll @@ -0,0 +1,12 @@ +; RUN: llvm-as < %s | llc -march=x86-64 +; PR1198 + +define i64 @foo(i64 %x, i64 %y) { + %tmp0 = zext i64 %x to i128 + %tmp1 = zext i64 %y to i128 + %tmp2 = mul i128 %tmp0, %tmp1 + %tmp7 = zext i32 64 to i128 + %tmp3 = lshr i128 %tmp2, %tmp7 + %tmp4 = trunc i128 %tmp3 to i64 + ret i64 %tmp4 +} diff --git a/test/CodeGen/X86/i128-ret.ll b/test/CodeGen/X86/i128-ret.ll new file mode 100644 index 0000000..d9bddc9 --- /dev/null +++ b/test/CodeGen/X86/i128-ret.ll @@ -0,0 +1,8 @@ +; RUN: llvm-as < %s | llc -march=x86-64 | grep {movq 8(%rdi), %rdx} +; RUN: llvm-as < %s | llc -march=x86-64 | grep {movq (%rdi), %rax} + +define i128 @test(i128 *%P) { + %A = load i128* %P + ret i128 %A +} + diff --git a/test/CodeGen/X86/iabs.ll b/test/CodeGen/X86/iabs.ll new file mode 100644 index 0000000..7c23645 --- /dev/null +++ b/test/CodeGen/X86/iabs.ll @@ -0,0 +1,17 @@ +; RUN: llvm-as < %s | llc -march=x86-64 -stats |& \ +; RUN: grep {6 .*Number of machine instrs printed} + +;; Integer absolute value, should produce something at least as good as: +;; movl %edi, %eax +;; sarl $31, %eax +;; addl %eax, %edi +;; xorl %eax, %edi +;; movl %edi, %eax +;; ret +define i32 @test(i32 %a) { + %tmp1neg = sub i32 0, %a + %b = icmp sgt i32 %a, -1 + %abs = select i1 %b, i32 %a, i32 %tmp1neg + ret i32 %abs +} + diff --git a/test/CodeGen/X86/illegal-vector-args-return.ll b/test/CodeGen/X86/illegal-vector-args-return.ll new file mode 100644 index 0000000..d15c2cb --- /dev/null +++ b/test/CodeGen/X86/illegal-vector-args-return.ll @@ -0,0 +1,14 @@ +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep {mulpd %xmm3, %xmm1} +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep {mulpd %xmm2, %xmm0} +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep {addps %xmm3, %xmm1} +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep {addps %xmm2, %xmm0} + +define <4 x double> @foo(<4 x double> %x, <4 x double> %z) { + %y = mul <4 x double> %x, %z + ret <4 x double> %y +} + +define <8 x float> @bar(<8 x float> %x, <8 x float> %z) { + %y = add <8 x float> %x, %z + ret <8 x float> %y +} diff --git a/test/CodeGen/X86/imul-lea.ll b/test/CodeGen/X86/imul-lea.ll new file mode 100644 index 0000000..9d6fd98 --- /dev/null +++ b/test/CodeGen/X86/imul-lea.ll @@ -0,0 +1,8 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep lea + +declare int %foo() +int %test() { + %tmp.0 = tail call int %foo( ) ; <int> [#uses=1] + %tmp.1 = mul int %tmp.0, 9 ; <int> [#uses=1] + ret int %tmp.1 +} diff --git a/test/CodeGen/X86/inline-asm-x-scalar.ll b/test/CodeGen/X86/inline-asm-x-scalar.ll new file mode 100644 index 0000000..d1bac0c --- /dev/null +++ b/test/CodeGen/X86/inline-asm-x-scalar.ll @@ -0,0 +1,24 @@ +; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah + +define void @test1() { + tail call void asm sideeffect "ucomiss $0", "x"( float 0x41E0000000000000) + ret void +} + +define void @test2() { + %tmp53 = tail call i32 asm "ucomiss $1, $3\0Acmovae $2, $0 ", "=r,mx,mr,x,0,~{dirflag},~{fpsr},~{flags},~{cc}"( float 0x41E0000000000000, i32 2147483647, float 0.000000e+00, i32 0 ) ; <i32> [#uses + unreachable +} + +define void @test3() { + tail call void asm sideeffect "ucomiss $0, $1", "mx,x,~{dirflag},~{fpsr},~{flags},~{cc}"( float 0x41E0000000000000, i32 65536 ) + ret void +} + +define void @test4() { + %tmp1 = tail call float asm "", "=x,0,~{dirflag},~{fpsr},~{flags}"( float 0x47EFFFFFE0000000 ); <float> [#uses=1] + %tmp4 = sub float %tmp1, 0x3810000000000000 ; <float> [#uses=1] + tail call void asm sideeffect "", "x,~{dirflag},~{fpsr},~{flags}"( float %tmp4 ) + ret void +} + diff --git a/test/CodeGen/X86/inline-asm.ll b/test/CodeGen/X86/inline-asm.ll new file mode 100644 index 0000000..54dfe76 --- /dev/null +++ b/test/CodeGen/X86/inline-asm.ll @@ -0,0 +1,21 @@ +; RUN: llvm-as < %s | llc -march=x86 + +define i32 @test1() { + ; Dest is AX, dest type = i32. + %tmp4 = call i32 asm sideeffect "FROB $0", "={ax}"() + ret i32 %tmp4 +} + +define void @test2(i32 %V) { + ; input is AX, in type = i32. + call void asm sideeffect "FROB $0", "{ax}"(i32 %V) + ret void +} + +define void @test3() { + ; FP constant as a memory operand. + tail call void asm sideeffect "frob $0", "m"( float 0x41E0000000000000) + ret void +} + + diff --git a/test/CodeGen/X86/isel-sink.ll b/test/CodeGen/X86/isel-sink.ll new file mode 100644 index 0000000..7a480b2 --- /dev/null +++ b/test/CodeGen/X86/isel-sink.ll @@ -0,0 +1,18 @@ +; RUN: llvm-as < %s | llc -march=x86 | not grep lea +; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-apple-darwin8 | \ +; RUN: grep {movl \$4, (.*,.*,4)} + +define i32 @test(i32* %X, i32 %B) { + ; This gep should be sunk out of this block into the load/store users. + %P = getelementptr i32* %X, i32 %B + %G = icmp ult i32 %B, 1234 + br i1 %G, label %T, label %F +T: + store i32 4, i32* %P + ret i32 141 +F: + %V = load i32* %P + ret i32 %V +} + + diff --git a/test/CodeGen/X86/isnan.llx b/test/CodeGen/X86/isnan.llx new file mode 100644 index 0000000..0665e55 --- /dev/null +++ b/test/CodeGen/X86/isnan.llx @@ -0,0 +1,7 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | not grep call +declare bool %llvm.isunordered.f64(double) + +bool %test_isnan(double %X) { + %R = call bool %llvm.isunordered.f64(double %X, double %X) + ret bool %R +} diff --git a/test/CodeGen/X86/ispositive.ll b/test/CodeGen/X86/ispositive.ll new file mode 100644 index 0000000..3799b9c --- /dev/null +++ b/test/CodeGen/X86/ispositive.ll @@ -0,0 +1,9 @@ +; RUN: llvm-as < %s | llc -march=x86 | grep {shrl.*31} + +define i32 @test1(i32 %X) { +entry: + icmp slt i32 %X, 0 ; <i1>:0 [#uses=1] + zext i1 %0 to i32 ; <i32>:1 [#uses=1] + ret i32 %1 +} + diff --git a/test/CodeGen/X86/jump_sign.ll b/test/CodeGen/X86/jump_sign.ll new file mode 100644 index 0000000..16bd7bc --- /dev/null +++ b/test/CodeGen/X86/jump_sign.ll @@ -0,0 +1,20 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep jns +int %f(int %X) { +entry: + %tmp1 = add int %X, 1 ; <int> [#uses=1] + %tmp = setlt int %tmp1, 0 ; <bool> [#uses=1] + br bool %tmp, label %cond_true, label %cond_next + +cond_true: ; preds = %entry + %tmp2 = tail call int (...)* %bar( ) ; <int> [#uses=0] + br label %cond_next + +cond_next: ; preds = %entry, %cond_true + %tmp3 = tail call int (...)* %baz( ) ; <int> [#uses=0] + ret int undef +} + +declare int %bar(...) + +declare int %baz(...) + diff --git a/test/CodeGen/X86/lea-2.ll b/test/CodeGen/X86/lea-2.ll new file mode 100644 index 0000000..823bdb5 --- /dev/null +++ b/test/CodeGen/X86/lea-2.ll @@ -0,0 +1,12 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel | \ +; RUN: grep {lea EAX, DWORD PTR \\\[... + 4\\*... - 5\\\]} +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel | \ +; RUN: not grep add + +int %test1(int %A, int %B) { + %tmp1 = shl int %A, ubyte 2 ; <int> [#uses=1] + %tmp3 = add int %B, -5 ; <int> [#uses=1] + %tmp4 = add int %tmp3, %tmp1 ; <int> [#uses=1] + ret int %tmp4 +} + diff --git a/test/CodeGen/X86/lea-3.ll b/test/CodeGen/X86/lea-3.ll new file mode 100644 index 0000000..89991fd --- /dev/null +++ b/test/CodeGen/X86/lea-3.ll @@ -0,0 +1,20 @@ + +; RUN: llvm-as < %s | llc -march=x86-64 | grep {leal (%rdi,%rdi,2), %eax} +define i32 @test(i32 %a) { + %tmp2 = mul i32 %a, 3 ; <i32> [#uses=1] + ret i32 %tmp2 +} + +; RUN: llvm-as < %s | llc -march=x86-64 | grep {leaq (,%rdi,4), %rax} +define i64 @test2(i64 %a) { + %tmp2 = shl i64 %a, 2 + %tmp3 = or i64 %tmp2, %a + ret i64 %tmp3 +} + +;; TODO! LEA instead of shift + copy. +define i64 @test3(i64 %a) { + %tmp2 = shl i64 %a, 3 + ret i64 %tmp2 +} + diff --git a/test/CodeGen/X86/lea.ll b/test/CodeGen/X86/lea.ll new file mode 100644 index 0000000..675376b --- /dev/null +++ b/test/CodeGen/X86/lea.ll @@ -0,0 +1,7 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | not grep orl +int %test(int %x) { + %tmp1 = shl int %x, ubyte 3 + %tmp2 = add int %tmp1, 7 + ret int %tmp2 +} diff --git a/test/CodeGen/X86/long-setcc.ll b/test/CodeGen/X86/long-setcc.ll new file mode 100644 index 0000000..6097d96 --- /dev/null +++ b/test/CodeGen/X86/long-setcc.ll @@ -0,0 +1,18 @@ +; RUN: llvm-as < %s | llc -march=x86 | grep cmp | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=x86 | grep shr | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=x86 | grep xor | wc -l | grep 1 + +define i1 @t1(i64 %x) { + %B = icmp slt i64 %x, 0 + ret i1 %B +} + +define i1 @t2(i64 %x) { + %tmp = icmp ult i64 %x, 4294967296 + ret i1 %tmp +} + +define i1 @t3(i32 %x) { + %tmp = icmp ugt i32 %x, -1 + ret i1 %tmp +} diff --git a/test/CodeGen/X86/loop-hoist.ll b/test/CodeGen/X86/loop-hoist.ll new file mode 100644 index 0000000..2c37b4d --- /dev/null +++ b/test/CodeGen/X86/loop-hoist.ll @@ -0,0 +1,29 @@ +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -relocation-model=dynamic-no-pic -mtriple=i686-apple-darwin8.7.2 |\ +; RUN: grep L_Arr.non_lazy_ptr +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -relocation-model=dynamic-no-pic -mtriple=i686-apple-darwin8.7.2 |\ +; RUN: %prcontext L_Arr.non_lazy_ptr 1 | grep {4(%esp)} + +%Arr = external global [0 x int] ; <[0 x int]*> [#uses=2] + +implementation ; Functions: + +void %foo(int %N.in) { +entry: + %N = cast int %N.in to uint ; <uint> [#uses=1] + br label %cond_true + +cond_true: ; preds = %cond_true, %entry + %indvar = phi uint [ 0, %entry ], [ %indvar.next, %cond_true ] ; <uint> [#uses=3] + %i.0.0 = cast uint %indvar to int ; <int> [#uses=1] + %tmp = getelementptr [0 x int]* %Arr, int 0, int %i.0.0 + store int %i.0.0, int* %tmp + %indvar.next = add uint %indvar, 1 ; <uint> [#uses=2] + %exitcond = seteq uint %indvar.next, %N ; <bool> [#uses=1] + br bool %exitcond, label %return, label %cond_true + +return: ; preds = %cond_true, %entry + ret void +} + diff --git a/test/CodeGen/X86/loop-strength-reduce.ll b/test/CodeGen/X86/loop-strength-reduce.ll new file mode 100644 index 0000000..eb1eee8 --- /dev/null +++ b/test/CodeGen/X86/loop-strength-reduce.ll @@ -0,0 +1,29 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | \ +; RUN: grep {A(} | wc -l | grep 1 +; +; Make sure the common loop invariant _A(reg) is hoisted up to preheader. + +%A = internal global [16 x [16 x int]] zeroinitializer, align 32 + +void %test(int %row, int %N.in) { +entry: + %N = cast int %N.in to uint + %tmp5 = setgt int %N.in, 0 + br bool %tmp5, label %cond_true, label %return + +cond_true: + %indvar = phi uint [ 0, %entry ], [ %indvar.next, %cond_true ] + %i.0.0 = cast uint %indvar to int + %tmp2 = add int %i.0.0, 1 + %tmp = getelementptr [16 x [16 x int]]* %A, int 0, int %row, int %tmp2 + store int 4, int* %tmp + %tmp5 = add int %i.0.0, 2 + %tmp7 = getelementptr [16 x [16 x int]]* %A, int 0, int %row, int %tmp5 + store int 5, int* %tmp7 + %indvar.next = add uint %indvar, 1 + %exitcond = seteq uint %indvar.next, %N + br bool %exitcond, label %return, label %cond_true + +return: + ret void +} diff --git a/test/CodeGen/X86/loop-strength-reduce2.ll b/test/CodeGen/X86/loop-strength-reduce2.ll new file mode 100644 index 0000000..7ed3944 --- /dev/null +++ b/test/CodeGen/X86/loop-strength-reduce2.ll @@ -0,0 +1,29 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=i686-apple-darwin -relocation-model=pic | not grep lea +; +; Make sure the PIC label flags2-"L1$pb" is not moved up to the preheader. + +%flags2 = internal global [8193 x sbyte] zeroinitializer, align 32 + +void %test(int %k, int %i) { +entry: + %i = bitcast int %i to uint + %k_addr.012 = shl int %i, ubyte 1 + %tmp14 = setgt int %k_addr.012, 8192 + br bool %tmp14, label %return, label %bb + +bb: + %indvar = phi uint [ 0, %entry ], [ %indvar.next, %bb ] + %tmp. = shl uint %i, ubyte 1 + %tmp.15 = mul uint %indvar, %i + %tmp.16 = add uint %tmp.15, %tmp. + %k_addr.0.0 = bitcast uint %tmp.16 to int + %tmp = getelementptr [8193 x sbyte]* %flags2, int 0, uint %tmp.16 + store sbyte 0, sbyte* %tmp + %k_addr.0 = add int %k_addr.0.0, %i + %tmp = setgt int %k_addr.0, 8192 + %indvar.next = add uint %indvar, 1 + br bool %tmp, label %return, label %bb + +return: + ret void +} diff --git a/test/CodeGen/X86/lsr-negative-stride.ll b/test/CodeGen/X86/lsr-negative-stride.ll new file mode 100644 index 0000000..7e906fc --- /dev/null +++ b/test/CodeGen/X86/lsr-negative-stride.ll @@ -0,0 +1,49 @@ +; RUN: llvm-as < %s | llc -march=x86 | not grep neg +; RUN: llvm-as < %s | llc -march=x86 | not grep sub.*esp +; RUN: llvm-as < %s | llc -march=x86 | not grep esi + +; This corresponds to: +;int t(int a, int b) { +; while (a != b) { +; if (a > b) +; a -= b; +; else +; b -= a; +; } +; return a; +;} + + +define i32 @t(i32 %a, i32 %b) { +entry: + %tmp1434 = icmp eq i32 %a, %b ; <i1> [#uses=1] + br i1 %tmp1434, label %bb17, label %bb.outer + +bb.outer: ; preds = %cond_false, %entry + %b_addr.021.0.ph = phi i32 [ %b, %entry ], [ %tmp10, %cond_false ] ; <i32> [#uses=5] + %a_addr.026.0.ph = phi i32 [ %a, %entry ], [ %a_addr.026.0, %cond_false ] ; <i32> [#uses=1] + br label %bb + +bb: ; preds = %cond_true, %bb.outer + %indvar = phi i32 [ 0, %bb.outer ], [ %indvar.next, %cond_true ] ; <i32> [#uses=2] + %tmp. = sub i32 0, %b_addr.021.0.ph ; <i32> [#uses=1] + %tmp.40 = mul i32 %indvar, %tmp. ; <i32> [#uses=1] + %a_addr.026.0 = add i32 %tmp.40, %a_addr.026.0.ph ; <i32> [#uses=6] + %tmp3 = icmp sgt i32 %a_addr.026.0, %b_addr.021.0.ph ; <i1> [#uses=1] + br i1 %tmp3, label %cond_true, label %cond_false + +cond_true: ; preds = %bb + %tmp7 = sub i32 %a_addr.026.0, %b_addr.021.0.ph ; <i32> [#uses=2] + %tmp1437 = icmp eq i32 %tmp7, %b_addr.021.0.ph ; <i1> [#uses=1] + %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1] + br i1 %tmp1437, label %bb17, label %bb + +cond_false: ; preds = %bb + %tmp10 = sub i32 %b_addr.021.0.ph, %a_addr.026.0 ; <i32> [#uses=2] + %tmp14 = icmp eq i32 %a_addr.026.0, %tmp10 ; <i1> [#uses=1] + br i1 %tmp14, label %bb17, label %bb.outer + +bb17: ; preds = %cond_false, %cond_true, %entry + %a_addr.026.1 = phi i32 [ %a, %entry ], [ %tmp7, %cond_true ], [ %a_addr.026.0, %cond_false ] ; <i32> [#uses=1] + ret i32 %a_addr.026.1 +} diff --git a/test/CodeGen/X86/mingw-alloca.ll b/test/CodeGen/X86/mingw-alloca.ll new file mode 100644 index 0000000..dd45883 --- /dev/null +++ b/test/CodeGen/X86/mingw-alloca.ll @@ -0,0 +1,27 @@ +; RUN: llvm-as < %s | llc -o %t -f +; RUN: grep __alloca %t | wc -l | grep 2 +; RUN: grep 8028 %t +; RUN: grep {pushl %eax} %t +; RUN: grep 8024 %t | wc -l | grep 2 + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" +target triple = "i386-mingw32" + +define void @foo1(i32 %N) { +entry: + %tmp14 = alloca i32, i32 %N ; <i32*> [#uses=1] + call void @bar1( i32* %tmp14 ) + ret void +} + +declare void @bar1(i32*) + +define void @foo2(i32 inreg %N) { +entry: + %A2 = alloca [2000 x i32], align 16 ; <[2000 x i32]*> [#uses=1] + %A2.sub = getelementptr [2000 x i32]* %A2, i32 0, i32 0 ; <i32*> [#uses=1] + call void @bar2( i32* %A2.sub, i32 %N ) + ret void +} + +declare void @bar2(i32*, i32) diff --git a/test/CodeGen/X86/mmx-arith.ll b/test/CodeGen/X86/mmx-arith.ll new file mode 100644 index 0000000..501786e --- /dev/null +++ b/test/CodeGen/X86/mmx-arith.ll @@ -0,0 +1,131 @@ +; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx + +;; A basic sanity check to make sure that MMX arithmetic actually compiles. + +define void @foo(<8 x i8>* %A, <8 x i8>* %B) { +entry: + %tmp1 = load <8 x i8>* %A ; <<8 x i8>> [#uses=1] + %tmp3 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1] + %tmp4 = add <8 x i8> %tmp1, %tmp3 ; <<8 x i8>> [#uses=2] + store <8 x i8> %tmp4, <8 x i8>* %A + %tmp7 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1] + %tmp12 = tail call <8 x i8> @llvm.x86.mmx.padds.b( <8 x i8> %tmp4, <8 x i8> %tmp7 ) ; <<8 x i8>> [#uses=2] + store <8 x i8> %tmp12, <8 x i8>* %A + %tmp16 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1] + %tmp21 = tail call <8 x i8> @llvm.x86.mmx.paddus.b( <8 x i8> %tmp12, <8 x i8> %tmp16 ) ; <<8 x i8>> [#uses=2] + store <8 x i8> %tmp21, <8 x i8>* %A + %tmp27 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1] + %tmp28 = sub <8 x i8> %tmp21, %tmp27 ; <<8 x i8>> [#uses=2] + store <8 x i8> %tmp28, <8 x i8>* %A + %tmp31 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1] + %tmp36 = tail call <8 x i8> @llvm.x86.mmx.psubs.b( <8 x i8> %tmp28, <8 x i8> %tmp31 ) ; <<8 x i8>> [#uses=2] + store <8 x i8> %tmp36, <8 x i8>* %A + %tmp40 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1] + %tmp45 = tail call <8 x i8> @llvm.x86.mmx.psubus.b( <8 x i8> %tmp36, <8 x i8> %tmp40 ) ; <<8 x i8>> [#uses=2] + store <8 x i8> %tmp45, <8 x i8>* %A + %tmp51 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1] + %tmp52 = mul <8 x i8> %tmp45, %tmp51 ; <<8 x i8>> [#uses=2] + store <8 x i8> %tmp52, <8 x i8>* %A + %tmp57 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1] + %tmp58 = and <8 x i8> %tmp52, %tmp57 ; <<8 x i8>> [#uses=2] + store <8 x i8> %tmp58, <8 x i8>* %A + %tmp63 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1] + %tmp64 = or <8 x i8> %tmp58, %tmp63 ; <<8 x i8>> [#uses=2] + store <8 x i8> %tmp64, <8 x i8>* %A + %tmp69 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1] + %tmp70 = xor <8 x i8> %tmp64, %tmp69 ; <<8 x i8>> [#uses=1] + store <8 x i8> %tmp70, <8 x i8>* %A + tail call void @llvm.x86.mmx.emms( ) + ret void +} + +define void @baz(<2 x i32>* %A, <2 x i32>* %B) { +entry: + %tmp1 = load <2 x i32>* %A ; <<2 x i32>> [#uses=1] + %tmp3 = load <2 x i32>* %B ; <<2 x i32>> [#uses=1] + %tmp4 = add <2 x i32> %tmp1, %tmp3 ; <<2 x i32>> [#uses=2] + store <2 x i32> %tmp4, <2 x i32>* %A + %tmp9 = load <2 x i32>* %B ; <<2 x i32>> [#uses=1] + %tmp10 = sub <2 x i32> %tmp4, %tmp9 ; <<2 x i32>> [#uses=2] + store <2 x i32> %tmp10, <2 x i32>* %A + %tmp15 = load <2 x i32>* %B ; <<2 x i32>> [#uses=1] + %tmp16 = mul <2 x i32> %tmp10, %tmp15 ; <<2 x i32>> [#uses=2] + store <2 x i32> %tmp16, <2 x i32>* %A + %tmp21 = load <2 x i32>* %B ; <<2 x i32>> [#uses=1] + %tmp22 = and <2 x i32> %tmp16, %tmp21 ; <<2 x i32>> [#uses=2] + store <2 x i32> %tmp22, <2 x i32>* %A + %tmp27 = load <2 x i32>* %B ; <<2 x i32>> [#uses=1] + %tmp28 = or <2 x i32> %tmp22, %tmp27 ; <<2 x i32>> [#uses=2] + store <2 x i32> %tmp28, <2 x i32>* %A + %tmp33 = load <2 x i32>* %B ; <<2 x i32>> [#uses=1] + %tmp34 = xor <2 x i32> %tmp28, %tmp33 ; <<2 x i32>> [#uses=1] + store <2 x i32> %tmp34, <2 x i32>* %A + tail call void @llvm.x86.mmx.emms( ) + ret void +} + +define void @bar(<4 x i16>* %A, <4 x i16>* %B) { +entry: + %tmp1 = load <4 x i16>* %A ; <<4 x i16>> [#uses=1] + %tmp3 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1] + %tmp4 = add <4 x i16> %tmp1, %tmp3 ; <<4 x i16>> [#uses=2] + store <4 x i16> %tmp4, <4 x i16>* %A + %tmp7 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1] + %tmp12 = tail call <4 x i16> @llvm.x86.mmx.padds.w( <4 x i16> %tmp4, <4 x i16> %tmp7 ) ; <<4 x i16>> [#uses=2] + store <4 x i16> %tmp12, <4 x i16>* %A + %tmp16 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1] + %tmp21 = tail call <4 x i16> @llvm.x86.mmx.paddus.w( <4 x i16> %tmp12, <4 x i16> %tmp16 ) ; <<4 x i16>> [#uses=2] + store <4 x i16> %tmp21, <4 x i16>* %A + %tmp27 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1] + %tmp28 = sub <4 x i16> %tmp21, %tmp27 ; <<4 x i16>> [#uses=2] + store <4 x i16> %tmp28, <4 x i16>* %A + %tmp31 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1] + %tmp36 = tail call <4 x i16> @llvm.x86.mmx.psubs.w( <4 x i16> %tmp28, <4 x i16> %tmp31 ) ; <<4 x i16>> [#uses=2] + store <4 x i16> %tmp36, <4 x i16>* %A + %tmp40 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1] + %tmp45 = tail call <4 x i16> @llvm.x86.mmx.psubus.w( <4 x i16> %tmp36, <4 x i16> %tmp40 ) ; <<4 x i16>> [#uses=2] + store <4 x i16> %tmp45, <4 x i16>* %A + %tmp51 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1] + %tmp52 = mul <4 x i16> %tmp45, %tmp51 ; <<4 x i16>> [#uses=2] + store <4 x i16> %tmp52, <4 x i16>* %A + %tmp55 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1] + %tmp60 = tail call <4 x i16> @llvm.x86.mmx.pmulh.w( <4 x i16> %tmp52, <4 x i16> %tmp55 ) ; <<4 x i16>> [#uses=2] + store <4 x i16> %tmp60, <4 x i16>* %A + %tmp64 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1] + %tmp69 = tail call <2 x i32> @llvm.x86.mmx.pmadd.wd( <4 x i16> %tmp60, <4 x i16> %tmp64 ) ; <<2 x i32>> [#uses=1] + %tmp70 = bitcast <2 x i32> %tmp69 to <4 x i16> ; <<4 x i16>> [#uses=2] + store <4 x i16> %tmp70, <4 x i16>* %A + %tmp75 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1] + %tmp76 = and <4 x i16> %tmp70, %tmp75 ; <<4 x i16>> [#uses=2] + store <4 x i16> %tmp76, <4 x i16>* %A + %tmp81 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1] + %tmp82 = or <4 x i16> %tmp76, %tmp81 ; <<4 x i16>> [#uses=2] + store <4 x i16> %tmp82, <4 x i16>* %A + %tmp87 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1] + %tmp88 = xor <4 x i16> %tmp82, %tmp87 ; <<4 x i16>> [#uses=1] + store <4 x i16> %tmp88, <4 x i16>* %A + tail call void @llvm.x86.mmx.emms( ) + ret void +} + +declare <8 x i8> @llvm.x86.mmx.padds.b(<8 x i8>, <8 x i8>) + +declare <8 x i8> @llvm.x86.mmx.paddus.b(<8 x i8>, <8 x i8>) + +declare <8 x i8> @llvm.x86.mmx.psubs.b(<8 x i8>, <8 x i8>) + +declare <8 x i8> @llvm.x86.mmx.psubus.b(<8 x i8>, <8 x i8>) + +declare <4 x i16> @llvm.x86.mmx.padds.w(<4 x i16>, <4 x i16>) + +declare <4 x i16> @llvm.x86.mmx.paddus.w(<4 x i16>, <4 x i16>) + +declare <4 x i16> @llvm.x86.mmx.psubs.w(<4 x i16>, <4 x i16>) + +declare <4 x i16> @llvm.x86.mmx.psubus.w(<4 x i16>, <4 x i16>) + +declare <4 x i16> @llvm.x86.mmx.pmulh.w(<4 x i16>, <4 x i16>) + +declare <2 x i32> @llvm.x86.mmx.pmadd.wd(<4 x i16>, <4 x i16>) + +declare void @llvm.x86.mmx.emms() diff --git a/test/CodeGen/X86/mmx-emms.ll b/test/CodeGen/X86/mmx-emms.ll new file mode 100644 index 0000000..60ba84d --- /dev/null +++ b/test/CodeGen/X86/mmx-emms.ll @@ -0,0 +1,11 @@ +; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx | grep emms +define void @foo() { +entry: + call void @llvm.x86.mmx.emms( ) + br label %return + +return: ; preds = %entry + ret void +} + +declare void @llvm.x86.mmx.emms() diff --git a/test/CodeGen/X86/mmx-insert-element.ll b/test/CodeGen/X86/mmx-insert-element.ll new file mode 100644 index 0000000..3f2e402 --- /dev/null +++ b/test/CodeGen/X86/mmx-insert-element.ll @@ -0,0 +1,23 @@ +; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx | grep movq | wc -l | grep 3 + +; FIXME: This code outputs: +; +; subl $28, %esp +; movl 32(%esp), %eax +; movd %eax, %mm0 +; movq %mm0, (%esp) +; movl (%esp), %eax +; movl %eax, 20(%esp) +; movq %mm0, 8(%esp) +; movl 12(%esp), %eax +; movl %eax, 16(%esp) +; movq 16(%esp), %mm0 +; addl $28, %esp +; +; Which is ugly. We need to fix this. + +define <2 x i32> @qux(i32 %A) { +entry: + %tmp3 = insertelement <2 x i32> < i32 0, i32 undef >, i32 %A, i32 1 ; <<2 x i32>> [#uses=1] + ret <2 x i32> %tmp3 +} diff --git a/test/CodeGen/X86/mmx-punpckhdq.ll b/test/CodeGen/X86/mmx-punpckhdq.ll new file mode 100644 index 0000000..57c73c7 --- /dev/null +++ b/test/CodeGen/X86/mmx-punpckhdq.ll @@ -0,0 +1,14 @@ +; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx | grep punpckhdq | wc -l | grep 1 + +define void @bork(<1 x i64>* %x) { +entry: + %tmp2 = load <1 x i64>* %x ; <<1 x i64>> [#uses=1] + %tmp6 = bitcast <1 x i64> %tmp2 to <2 x i32> ; <<2 x i32>> [#uses=1] + %tmp9 = shufflevector <2 x i32> %tmp6, <2 x i32> undef, <2 x i32> < i32 1, i32 1 > ; <<2 x i32>> [#uses=1] + %tmp10 = bitcast <2 x i32> %tmp9 to <1 x i64> ; <<1 x i64>> [#uses=1] + store <1 x i64> %tmp10, <1 x i64>* %x + tail call void @llvm.x86.mmx.emms( ) + ret void +} + +declare void @llvm.x86.mmx.emms() diff --git a/test/CodeGen/X86/mmx-shuffle.ll b/test/CodeGen/X86/mmx-shuffle.ll new file mode 100644 index 0000000..4b91cb9 --- /dev/null +++ b/test/CodeGen/X86/mmx-shuffle.ll @@ -0,0 +1,29 @@ +; RUN: llvm-as < %s | llc -mcpu=yonah +; PR1427 + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" +target triple = "i686-pc-linux-gnu" + %struct.DrawHelper = type { void (i32, %struct.QT_FT_Span*, i8*)*, void (i32, %struct.QT_FT_Span*, i8*)*, void (%struct.QRasterBuffer*, i32, i32, i32, i8*, i32, i32, i32)*, void (%struct.QRasterBuffer*, i32, i32, i32, i8*, i32, i32, i32)*, void (%struct.QRasterBuffer*, i32, i32, i32, i32, i32)* } + %struct.QBasicAtomic = type { i32 } + %struct.QClipData = type { i32, "struct.QClipData::ClipLine"*, i32, i32, %struct.QT_FT_Span*, i32, i32, i32, i32 } + "struct.QClipData::ClipLine" = type { i32, %struct.QT_FT_Span* } + %struct.QRasterBuffer = type { %struct.QRect, %struct.QRegion, %struct.QClipData*, %struct.QClipData*, i8, i32, i32, %struct.DrawHelper*, i32, i32, i32, i8* } + %struct.QRect = type { i32, i32, i32, i32 } + %struct.QRegion = type { "struct.QRegion::QRegionData"* } + "struct.QRegion::QRegionData" = type { %struct.QBasicAtomic, %struct._XRegion*, i8*, %struct.QRegionPrivate* } + %struct.QRegionPrivate = type opaque + %struct.QT_FT_Span = type { i16, i16, i16, i8 } + %struct._XRegion = type opaque + +define void @_Z19qt_bitmapblit16_sseP13QRasterBufferiijPKhiii(%struct.QRasterBuffer* %rasterBuffer, i32 %x, i32 %y, i32 %color, i8* %src, i32 %width, i32 %height, i32 %stride) { +entry: + %tmp528 = bitcast <8 x i8> zeroinitializer to <2 x i32> ; <<2 x i32>> [#uses=1] + %tmp529 = and <2 x i32> %tmp528, bitcast (<4 x i16> < i16 -32640, i16 16448, i16 8224, i16 4112 > to <2 x i32>) ; <<2 x i32>> [#uses=1] + %tmp542 = bitcast <2 x i32> %tmp529 to <4 x i16> ; <<4 x i16>> [#uses=1] + %tmp543 = add <4 x i16> %tmp542, < i16 0, i16 16448, i16 24672, i16 28784 > ; <<4 x i16>> [#uses=1] + %tmp555 = bitcast <4 x i16> %tmp543 to <8 x i8> ; <<8 x i8>> [#uses=1] + tail call void @llvm.x86.mmx.maskmovq( <8 x i8> zeroinitializer, <8 x i8> %tmp555, i8* null ) + ret void +} + +declare void @llvm.x86.mmx.maskmovq(<8 x i8>, <8 x i8>, i8*) diff --git a/test/CodeGen/X86/mul-shift-reassoc.ll b/test/CodeGen/X86/mul-shift-reassoc.ll new file mode 100644 index 0000000..52d188d --- /dev/null +++ b/test/CodeGen/X86/mul-shift-reassoc.ll @@ -0,0 +1,12 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep lea +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | not grep add + +int %test(int %X, int %Y) { + ; Push the shl through the mul to allow an LEA to be formed, instead + ; of using a shift and add separately. + %tmp.2 = shl int %X, ubyte 1 + %tmp.3 = mul int %tmp.2, %Y + %tmp.5 = add int %tmp.3, %Y + ret int %tmp.5 +} + diff --git a/test/CodeGen/X86/negative-sin.ll b/test/CodeGen/X86/negative-sin.ll new file mode 100644 index 0000000..39c6297 --- /dev/null +++ b/test/CodeGen/X86/negative-sin.ll @@ -0,0 +1,12 @@ +; RUN: llvm-as < %s | llc -enable-unsafe-fp-math -march=x86-64 | \ +; RUN: not egrep {addsd|subsd|xor} + +declare double @sin(double %f) + +define double @foo(double %e) +{ + %f = sub double 0.0, %e + %g = call double @sin(double %f) + %h = sub double 0.0, %g + ret double %h +} diff --git a/test/CodeGen/X86/negative_zero.ll b/test/CodeGen/X86/negative_zero.ll new file mode 100644 index 0000000..3328a6a --- /dev/null +++ b/test/CodeGen/X86/negative_zero.ll @@ -0,0 +1,6 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=-sse2,-sse3 | grep fchs + + +double %T() { + ret double -1.0 ;; codegen as fld1/fchs, not as a load from cst pool +} diff --git a/test/CodeGen/X86/or-branch.ll b/test/CodeGen/X86/or-branch.ll new file mode 100644 index 0000000..62f7455 --- /dev/null +++ b/test/CodeGen/X86/or-branch.ll @@ -0,0 +1,19 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | not grep set + +void %foo(int %X, int %Y, int %Z) { +entry: + %tmp = tail call int (...)* %bar( ) ; <int> [#uses=0] + %tmp = seteq int %X, 0 ; <bool> [#uses=1] + %tmp3 = setlt int %Y, 5 ; <bool> [#uses=1] + %tmp4 = or bool %tmp3, %tmp ; <bool> [#uses=1] + br bool %tmp4, label %cond_true, label %UnifiedReturnBlock + +cond_true: ; preds = %entry + %tmp5 = tail call int (...)* %bar( ) ; <int> [#uses=0] + ret void + +UnifiedReturnBlock: ; preds = %entry + ret void +} + +declare int %bar(...) diff --git a/test/CodeGen/X86/overlap-shift.ll b/test/CodeGen/X86/overlap-shift.ll new file mode 100644 index 0000000..11673cf --- /dev/null +++ b/test/CodeGen/X86/overlap-shift.ll @@ -0,0 +1,18 @@ +;; X's live range extends beyond the shift, so the register allocator +;; cannot coalesce it with Y. Because of this, a copy needs to be +;; emitted before the shift to save the register value before it is +;; clobbered. However, this copy is not needed if the register +;; allocator turns the shift into an LEA. This also occurs for ADD. + +; Check that the shift gets turned into an LEA. + +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel | \ +; RUN: not grep {mov E.X, E.X} + +%G = external global int + +int %test1(int %X) { + %Z = shl int %X, ubyte 2 + volatile store int %Z, int* %G + ret int %X +} diff --git a/test/CodeGen/X86/packed_struct.ll b/test/CodeGen/X86/packed_struct.ll new file mode 100644 index 0000000..d06f916 --- /dev/null +++ b/test/CodeGen/X86/packed_struct.ll @@ -0,0 +1,38 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep foos+5 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep foos+1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep foos+9 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep bara+19 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep bara+4 + +; make sure we compute the correct offset for a packed structure + +;Note: codegen for this could change rendering the above checks wrong + +; ModuleID = 'foo.c' +target datalayout = "e-p:32:32" +target endian = little +target pointersize = 32 +target triple = "i686-pc-linux-gnu" + %struct.anon = type <{ sbyte, int, int, int }> +%foos = external global %struct.anon +%bara = weak global [4 x <{ int, sbyte }>] zeroinitializer + +implementation ; Functions: + +int %foo() { +entry: + %tmp = load int* getelementptr (%struct.anon* %foos, int 0, uint 1) + %tmp3 = load int* getelementptr (%struct.anon* %foos, int 0, uint 2) + %tmp6 = load int* getelementptr (%struct.anon* %foos, int 0, uint 3) + %tmp4 = add int %tmp3, %tmp + %tmp7 = add int %tmp4, %tmp6 + ret int %tmp7 +} + +sbyte %bar() { +entry: + %tmp = load sbyte* getelementptr([4 x <{ int, sbyte }>]* %bara, int 0, int 0, uint 1 ) + %tmp4 = load sbyte* getelementptr ([4 x <{ int, sbyte }>]* %bara, int 0, int 3, uint 1) + %tmp5 = add sbyte %tmp4, %tmp + ret sbyte %tmp5 +} diff --git a/test/CodeGen/X86/peep-vector-extract-concat.ll b/test/CodeGen/X86/peep-vector-extract-concat.ll new file mode 100644 index 0000000..6880fc3 --- /dev/null +++ b/test/CodeGen/X86/peep-vector-extract-concat.ll @@ -0,0 +1,6 @@ +; RUN: llvm-as < %s | llc -march=x86-64 | grep {shufps \$3, %xmm0, %xmm0} + +define float @foo(<8 x float> %a) { + %c = extractelement <8 x float> %a, i32 3 + ret float %c +} diff --git a/test/CodeGen/X86/peep-vector-extract-insert.ll b/test/CodeGen/X86/peep-vector-extract-insert.ll new file mode 100644 index 0000000..9aeb4f1 --- /dev/null +++ b/test/CodeGen/X86/peep-vector-extract-insert.ll @@ -0,0 +1,12 @@ +; RUN: llvm-as < %s | llc -march=x86-64 | grep {pxor %xmm0, %xmm0} | wc -l | grep 2 + +define float @foo(<4 x float> %a) { + %b = insertelement <4 x float> %a, float 0.0, i32 3 + %c = extractelement <4 x float> %b, i32 3 + ret float %c +} +define float @bar(float %a) { + %b = insertelement <4 x float> <float 3.4, float 4.5, float 0.0, float 9.2>, float %a, i32 3 + %c = extractelement <4 x float> %b, i32 2 + ret float %c +} diff --git a/test/CodeGen/X86/pic_jumptable.ll b/test/CodeGen/X86/pic_jumptable.ll new file mode 100644 index 0000000..4c38fb8 --- /dev/null +++ b/test/CodeGen/X86/pic_jumptable.ll @@ -0,0 +1,79 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -relocation-model=pic -march=x86 | not grep -F .text +target endian = little +target pointersize = 32 +target triple = "i386-linux-gnu" + +implementation ; Functions: + +declare void %_Z3bari( int ) + +linkonce void %_Z3fooILi1EEvi(int %Y) { +entry: + %Y_addr = alloca int ; <int*> [#uses=2] + "alloca point" = cast int 0 to int ; <int> [#uses=0] + store int %Y, int* %Y_addr + %tmp = load int* %Y_addr ; <int> [#uses=1] + switch int %tmp, label %bb10 [ + int 0, label %bb3 + int 1, label %bb + int 2, label %bb + int 3, label %bb + int 4, label %bb + int 5, label %bb + int 6, label %bb + int 7, label %bb + int 8, label %bb + int 9, label %bb + int 10, label %bb + int 12, label %bb1 + int 13, label %bb5 + int 14, label %bb6 + int 16, label %bb2 + int 17, label %bb4 + int 23, label %bb8 + int 27, label %bb7 + int 34, label %bb9 + ] + +bb: ; preds = %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry + br label %bb1 + +bb1: ; preds = %bb, %entry + br label %bb2 + +bb2: ; preds = %bb1, %entry + call void %_Z3bari( int 1 ) + br label %bb11 + +bb3: ; preds = %entry + br label %bb4 + +bb4: ; preds = %bb3, %entry + br label %bb5 + +bb5: ; preds = %bb4, %entry + br label %bb6 + +bb6: ; preds = %bb5, %entry + call void %_Z3bari( int 2 ) + br label %bb11 + +bb7: ; preds = %entry + br label %bb8 + +bb8: ; preds = %bb7, %entry + br label %bb9 + +bb9: ; preds = %bb8, %entry + call void %_Z3bari( int 3 ) + br label %bb11 + +bb10: ; preds = %entry + br label %bb11 + +bb11: ; preds = %bb10, %bb9, %bb6, %bb2 + br label %return + +return: ; preds = %bb11 + ret void +} diff --git a/test/CodeGen/X86/pr1489.ll b/test/CodeGen/X86/pr1489.ll new file mode 100644 index 0000000..61e68df --- /dev/null +++ b/test/CodeGen/X86/pr1489.ll @@ -0,0 +1,55 @@ +; RUN: llvm-as < %s | llc -disable-fp-elim -fast -mcpu=i486 | grep 1082126238 | wc -l | grep 3 +; RUN: llvm-as < %s | llc -disable-fp-elim -fast -mcpu=i486 | grep 3058016715 | wc -l | grep 1 +;; magic constants are 3.999f and half of 3.999 +; ModuleID = '1489.c' +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" +target triple = "i686-apple-darwin8" +@.str = internal constant [13 x i8] c"%d %d %d %d\0A\00" ; <[13 x i8]*> [#uses=1] + +define i32 @quux() { +entry: + %tmp1 = tail call i32 @lrintf( float 0x400FFDF3C0000000 ) ; <i32> [#uses=1] + %tmp2 = icmp slt i32 %tmp1, 1 ; <i1> [#uses=1] + %tmp23 = zext i1 %tmp2 to i32 ; <i32> [#uses=1] + ret i32 %tmp23 +} + +declare i32 @lrintf(float) + +define i32 @foo() { +entry: + %tmp1 = tail call i32 @lrint( double 3.999000e+00 ) ; <i32> [#uses=1] + %tmp2 = icmp slt i32 %tmp1, 1 ; <i1> [#uses=1] + %tmp23 = zext i1 %tmp2 to i32 ; <i32> [#uses=1] + ret i32 %tmp23 +} + +declare i32 @lrint(double) + +define i32 @bar() { +entry: + %tmp1 = tail call i32 @lrintf( float 0x400FFDF3C0000000 ) ; <i32> [#uses=1] + %tmp2 = icmp slt i32 %tmp1, 1 ; <i1> [#uses=1] + %tmp23 = zext i1 %tmp2 to i32 ; <i32> [#uses=1] + ret i32 %tmp23 +} + +define i32 @baz() { +entry: + %tmp1 = tail call i32 @lrintf( float 0x400FFDF3C0000000 ) ; <i32> [#uses=1] + %tmp2 = icmp slt i32 %tmp1, 1 ; <i1> [#uses=1] + %tmp23 = zext i1 %tmp2 to i32 ; <i32> [#uses=1] + ret i32 %tmp23 +} + +define i32 @main() { +entry: + %tmp = tail call i32 @baz( ) ; <i32> [#uses=1] + %tmp1 = tail call i32 @bar( ) ; <i32> [#uses=1] + %tmp2 = tail call i32 @foo( ) ; <i32> [#uses=1] + %tmp3 = tail call i32 @quux( ) ; <i32> [#uses=1] + %tmp5 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 %tmp3, i32 %tmp2, i32 %tmp1, i32 %tmp ) ; <i32> [#uses=0] + ret i32 undef +} + +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/X86/pr1505.ll b/test/CodeGen/X86/pr1505.ll new file mode 100644 index 0000000..a80d25c --- /dev/null +++ b/test/CodeGen/X86/pr1505.ll @@ -0,0 +1,12 @@ +; RUN: llvm-as < %s | llc -mcpu=i486 | not grep fldl + +; ModuleID = '<stdin>' +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" +target triple = "i686-apple-darwin8" +@G = weak global float 0.000000e+00 ; <float*> [#uses=1] + +define void @t1(float %F) { +entry: + store float %F, float* @G + ret void +} diff --git a/test/CodeGen/X86/pr1505b.ll b/test/CodeGen/X86/pr1505b.ll new file mode 100644 index 0000000..1e6b793 --- /dev/null +++ b/test/CodeGen/X86/pr1505b.ll @@ -0,0 +1,73 @@ +; RUN: llvm-as < %s | llc -mcpu=i486 | grep fstpl | wc -l | grep 4 +; RUN: llvm-as < %s | llc -mcpu=i486 | grep fstps | wc -l | grep 3 + +; ModuleID = '<stdin>' +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" +target triple = "i686-apple-darwin8" + %"struct.std::basic_ios<char,std::char_traits<char> >" = type { %"struct.std::ios_base", %"struct.std::basic_ostream<char,std::char_traits<char> >"*, i8, i8, %"struct.std::basic_streambuf<char,std::char_traits<char> >"*, %"struct.std::ctype<char>"*, %"struct.std::num_get<char,std::istreambuf_iterator<char, std::char_traits<char> > >"*, %"struct.std::num_get<char,std::istreambuf_iterator<char, std::char_traits<char> > >"* } + %"struct.std::basic_ostream<char,std::char_traits<char> >" = type { i32 (...)**, %"struct.std::basic_ios<char,std::char_traits<char> >" } + %"struct.std::basic_streambuf<char,std::char_traits<char> >" = type { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, %"struct.std::locale" } + %"struct.std::ctype<char>" = type { %"struct.std::locale::facet", i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 } + %"struct.std::ctype_base" = type <{ i8 }> + %"struct.std::ios_base" = type { i32 (...)**, i32, i32, i32, i32, i32, %"struct.std::ios_base::_Callback_list"*, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, %"struct.std::ios_base::_Words"*, %"struct.std::locale" } + %"struct.std::ios_base::_Callback_list" = type { %"struct.std::ios_base::_Callback_list"*, void (i32, %"struct.std::ios_base"*, i32)*, i32, i32 } + %"struct.std::ios_base::_Words" = type { i8*, i32 } + %"struct.std::locale" = type { %"struct.std::locale::_Impl"* } + %"struct.std::locale::_Impl" = type { i32, %"struct.std::locale::facet"**, i32, %"struct.std::locale::facet"**, i8** } + %"struct.std::locale::facet" = type { i32 (...)**, i32 } + %"struct.std::num_get<char,std::istreambuf_iterator<char, std::char_traits<char> > >" = type { %"struct.std::locale::facet" } +@a = global float 0x3FD3333340000000 ; <float*> [#uses=1] +@b = global double 6.000000e-01, align 8 ; <double*> [#uses=1] +@_ZSt8__ioinit = internal global %"struct.std::ctype_base" zeroinitializer ; <%"struct.std::ctype_base"*> [#uses=2] +@__dso_handle = external global i8* ; <i8**> [#uses=1] +@_ZSt4cout = external global %"struct.std::basic_ostream<char,std::char_traits<char> >" ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=2] +@.str = internal constant [12 x i8] c"tan float: \00" ; <[12 x i8]*> [#uses=1] +@.str1 = internal constant [13 x i8] c"tan double: \00" ; <[13 x i8]*> [#uses=1] +@llvm.global_ctors = appending global [1 x { i32, void ()* }] [ { i32, void ()* } { i32 65535, void ()* @_GLOBAL__I_a } ] ; <[1 x { i32, void ()* }]*> [#uses=0] + +define internal void @_GLOBAL__I_a() section "__TEXT,__StaticInit,regular,pure_instructions" { +entry: + tail call void @_ZNSt8ios_base4InitC1Ev( %"struct.std::ctype_base"* @_ZSt8__ioinit ) + %tmp10.i = tail call i32 @__cxa_atexit( void (i8*)* @__tcf_0, i8* null, i8* bitcast (i8** @__dso_handle to i8*) ) ; <i32> [#uses=0] + ret void +} + +define internal void @__tcf_0(i8* %unnamed_arg) { +entry: + tail call void @_ZNSt8ios_base4InitD1Ev( %"struct.std::ctype_base"* @_ZSt8__ioinit ) + ret void +} + +declare void @_ZNSt8ios_base4InitD1Ev(%"struct.std::ctype_base"*) + +declare void @_ZNSt8ios_base4InitC1Ev(%"struct.std::ctype_base"*) + +declare i32 @__cxa_atexit(void (i8*)*, i8*, i8*) + +define i32 @main() { +entry: + %tmp6 = volatile load float* @a ; <float> [#uses=1] + %tmp9 = tail call float @tanf( float %tmp6 ) ; <float> [#uses=1] + %tmp12 = volatile load double* @b ; <double> [#uses=1] + %tmp13 = tail call double @tan( double %tmp12 ) ; <double> [#uses=1] + %tmp1314 = fptrunc double %tmp13 to float ; <float> [#uses=1] + %tmp16 = tail call %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc( %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZSt4cout, i8* getelementptr ([12 x i8]* @.str, i32 0, i32 0) ) ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=1] + %tmp1920 = fpext float %tmp9 to double ; <double> [#uses=1] + %tmp22 = tail call %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZNSolsEd( %"struct.std::basic_ostream<char,std::char_traits<char> >"* %tmp16, double %tmp1920 ) ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=1] + %tmp30 = tail call %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_( %"struct.std::basic_ostream<char,std::char_traits<char> >"* %tmp22 ) ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=0] + %tmp34 = tail call %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc( %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZSt4cout, i8* getelementptr ([13 x i8]* @.str1, i32 0, i32 0) ) ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=1] + %tmp3940 = fpext float %tmp1314 to double ; <double> [#uses=1] + %tmp42 = tail call %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZNSolsEd( %"struct.std::basic_ostream<char,std::char_traits<char> >"* %tmp34, double %tmp3940 ) ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=1] + %tmp51 = tail call %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_( %"struct.std::basic_ostream<char,std::char_traits<char> >"* %tmp42 ) ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=0] + ret i32 0 +} + +declare float @tanf(float) + +declare double @tan(double) + +declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(%"struct.std::basic_ostream<char,std::char_traits<char> >"*, i8*) + +declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZNSolsEd(%"struct.std::basic_ostream<char,std::char_traits<char> >"*, double) + +declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_(%"struct.std::basic_ostream<char,std::char_traits<char> >"*) diff --git a/test/CodeGen/X86/rdtsc.ll b/test/CodeGen/X86/rdtsc.ll new file mode 100644 index 0000000..f6c6c93 --- /dev/null +++ b/test/CodeGen/X86/rdtsc.ll @@ -0,0 +1,10 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep rdtsc +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86-64 | grep rdtsc + +declare ulong %llvm.readcyclecounter() + +ulong %foo() { +%tmp.1 = call ulong %llvm.readcyclecounter () +ret ulong %tmp.1 +} + diff --git a/test/CodeGen/X86/regpressure.ll b/test/CodeGen/X86/regpressure.ll new file mode 100644 index 0000000..0567564 --- /dev/null +++ b/test/CodeGen/X86/regpressure.ll @@ -0,0 +1,118 @@ +;; Both functions in this testcase should codegen to the same function, and +;; neither of them should require spilling anything to the stack. + +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -stats |& \ +; RUN: not grep {Number of register spills} + +;; This can be compiled to use three registers if the loads are not +;; folded into the multiplies, 2 registers otherwise. +int %regpressure1(int* %P) { + %A = load int* %P + %Bp = getelementptr int* %P, int 1 + %B = load int* %Bp + %s1 = mul int %A, %B + %Cp = getelementptr int* %P, int 2 + %C = load int* %Cp + %s2 = mul int %s1, %C + %Dp = getelementptr int* %P, int 3 + %D = load int* %Dp + %s3 = mul int %s2, %D + %Ep = getelementptr int* %P, int 4 + %E = load int* %Ep + %s4 = mul int %s3, %E + %Fp = getelementptr int* %P, int 5 + %F = load int* %Fp + %s5 = mul int %s4, %F + %Gp = getelementptr int* %P, int 6 + %G = load int* %Gp + %s6 = mul int %s5, %G + %Hp = getelementptr int* %P, int 7 + %H = load int* %Hp + %s7 = mul int %s6, %H + %Ip = getelementptr int* %P, int 8 + %I = load int* %Ip + %s8 = mul int %s7, %I + %Jp = getelementptr int* %P, int 9 + %J = load int* %Jp + %s9 = mul int %s8, %J + ret int %s9 +} + +;; This testcase should produce identical code to the test above. +int %regpressure2(int* %P) { + %A = load int* %P + %Bp = getelementptr int* %P, int 1 + %B = load int* %Bp + %Cp = getelementptr int* %P, int 2 + %C = load int* %Cp + %Dp = getelementptr int* %P, int 3 + %D = load int* %Dp + %Ep = getelementptr int* %P, int 4 + %E = load int* %Ep + %Fp = getelementptr int* %P, int 5 + %F = load int* %Fp + %Gp = getelementptr int* %P, int 6 + %G = load int* %Gp + %Hp = getelementptr int* %P, int 7 + %H = load int* %Hp + %Ip = getelementptr int* %P, int 8 + %I = load int* %Ip + %Jp = getelementptr int* %P, int 9 + %J = load int* %Jp + %s1 = mul int %A, %B + %s2 = mul int %s1, %C + %s3 = mul int %s2, %D + %s4 = mul int %s3, %E + %s5 = mul int %s4, %F + %s6 = mul int %s5, %G + %s7 = mul int %s6, %H + %s8 = mul int %s7, %I + %s9 = mul int %s8, %J + ret int %s9 +} + +;; adds should be the same as muls. +int %regpressure3(short* %P, bool %Cond, int* %Other) { + %A = load short* %P + %Bp = getelementptr short* %P, int 1 + %B = load short* %Bp + %Cp = getelementptr short* %P, int 2 + %C = load short* %Cp + %Dp = getelementptr short* %P, int 3 + %D = load short* %Dp + %Ep = getelementptr short* %P, int 4 + %E = load short* %Ep + %Fp = getelementptr short* %P, int 5 + %F = load short* %Fp + %Gp = getelementptr short* %P, int 6 + %G = load short* %Gp + %Hp = getelementptr short* %P, int 7 + %H = load short* %Hp + %Ip = getelementptr short* %P, int 8 + %I = load short* %Ip + %Jp = getelementptr short* %P, int 9 + %J = load short* %Jp + + ;; These casts prevent folding the loads into the adds. + %A = cast short %A to int + %B = cast short %B to int + %D = cast short %D to int + %C = cast short %C to int + %E = cast short %E to int + %F = cast short %F to int + %G = cast short %G to int + %H = cast short %H to int + %I = cast short %I to int + %J = cast short %J to int + %s1 = add int %A, %B + %s2 = add int %C, %s1 + %s3 = add int %D, %s2 + %s4 = add int %E, %s3 + %s5 = add int %F, %s4 + %s6 = add int %G, %s5 + %s7 = add int %H, %s6 + %s8 = add int %I, %s7 + %s9 = add int %J, %s8 + ret int %s9 +} + diff --git a/test/CodeGen/X86/rem.ll b/test/CodeGen/X86/rem.ll new file mode 100644 index 0000000..1471283 --- /dev/null +++ b/test/CodeGen/X86/rem.ll @@ -0,0 +1,22 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | not grep div + +int %test1(int %X) { + %tmp1 = rem int %X, 255 + ret int %tmp1 +} + +int %test2(int %X) { + %tmp1 = rem int %X, 256 + ret int %tmp1 +} + +uint %test3(uint %X) { + %tmp1 = rem uint %X, 255 + ret uint %tmp1 +} + +uint %test4(uint %X) { + %tmp1 = rem uint %X, 256 ; just an and + ret uint %tmp1 +} + diff --git a/test/CodeGen/X86/rotate.ll b/test/CodeGen/X86/rotate.ll new file mode 100644 index 0000000..fb04be9 --- /dev/null +++ b/test/CodeGen/X86/rotate.ll @@ -0,0 +1,92 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel | \ +; RUN: grep {ro\[rl\]} | wc -l | grep 12 + +uint %rotl32(uint %A, ubyte %Amt) { + %B = shl uint %A, ubyte %Amt + %Amt2 = sub ubyte 32, %Amt + %C = shr uint %A, ubyte %Amt2 + %D = or uint %B, %C + ret uint %D +} + +uint %rotr32(uint %A, ubyte %Amt) { + %B = shr uint %A, ubyte %Amt + %Amt2 = sub ubyte 32, %Amt + %C = shl uint %A, ubyte %Amt2 + %D = or uint %B, %C + ret uint %D +} + +uint %rotli32(uint %A) { + %B = shl uint %A, ubyte 5 + %C = shr uint %A, ubyte 27 + %D = or uint %B, %C + ret uint %D +} + +uint %rotri32(uint %A) { + %B = shr uint %A, ubyte 5 + %C = shl uint %A, ubyte 27 + %D = or uint %B, %C + ret uint %D +} + +ushort %rotl16(ushort %A, ubyte %Amt) { + %B = shl ushort %A, ubyte %Amt + %Amt2 = sub ubyte 16, %Amt + %C = shr ushort %A, ubyte %Amt2 + %D = or ushort %B, %C + ret ushort %D +} + +ushort %rotr16(ushort %A, ubyte %Amt) { + %B = shr ushort %A, ubyte %Amt + %Amt2 = sub ubyte 16, %Amt + %C = shl ushort %A, ubyte %Amt2 + %D = or ushort %B, %C + ret ushort %D +} + +ushort %rotli16(ushort %A) { + %B = shl ushort %A, ubyte 5 + %C = shr ushort %A, ubyte 11 + %D = or ushort %B, %C + ret ushort %D +} + +ushort %rotri16(ushort %A) { + %B = shr ushort %A, ubyte 5 + %C = shl ushort %A, ubyte 11 + %D = or ushort %B, %C + ret ushort %D +} + +ubyte %rotl8(ubyte %A, ubyte %Amt) { + %B = shl ubyte %A, ubyte %Amt + %Amt2 = sub ubyte 8, %Amt + %C = shr ubyte %A, ubyte %Amt2 + %D = or ubyte %B, %C + ret ubyte %D +} + +ubyte %rotr8(ubyte %A, ubyte %Amt) { + %B = shr ubyte %A, ubyte %Amt + %Amt2 = sub ubyte 8, %Amt + %C = shl ubyte %A, ubyte %Amt2 + %D = or ubyte %B, %C + ret ubyte %D +} + +ubyte %rotli8(ubyte %A) { + %B = shl ubyte %A, ubyte 5 + %C = shr ubyte %A, ubyte 3 + %D = or ubyte %B, %C + ret ubyte %D +} + +ubyte %rotri8(ubyte %A) { + %B = shr ubyte %A, ubyte 5 + %C = shl ubyte %A, ubyte 3 + %D = or ubyte %B, %C + ret ubyte %D +} diff --git a/test/CodeGen/X86/scalar-min-max-fill-operand.ll b/test/CodeGen/X86/scalar-min-max-fill-operand.ll new file mode 100644 index 0000000..9d6fc4f --- /dev/null +++ b/test/CodeGen/X86/scalar-min-max-fill-operand.ll @@ -0,0 +1,20 @@ +; RUN: llvm-as < %s | llc -march=x86-64 | grep min | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=x86-64 | grep max | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=x86-64 | grep mov | wc -l | grep 2 + +declare float @bar() + +define float @foo(float %a) +{ + %s = call float @bar() + %t = fcmp olt float %s, %a + %u = select i1 %t, float %s, float %a + ret float %u +} +define float @hem(float %a) +{ + %s = call float @bar() + %t = fcmp uge float %s, %a + %u = select i1 %t, float %s, float %a + ret float %u +} diff --git a/test/CodeGen/X86/scalar_sse_minmax.ll b/test/CodeGen/X86/scalar_sse_minmax.ll new file mode 100644 index 0000000..61894a4 --- /dev/null +++ b/test/CodeGen/X86/scalar_sse_minmax.ll @@ -0,0 +1,44 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse1,+sse2 | \ +; RUN: grep mins | wc -l | grep 3 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse1,+sse2 | \ +; RUN: grep maxs | wc -l | grep 2 + +declare bool %llvm.isunordered.f64( double %x, double %y ) +declare bool %llvm.isunordered.f32( float %x, float %y ) + +implementation + +float %min1(float %x, float %y) { + %tmp = setlt float %x, %y ; <bool> [#uses=1] + %retval = select bool %tmp, float %x, float %y ; <float> [#uses=1] + ret float %retval +} +double %min2(double %x, double %y) { + %tmp = setlt double %x, %y + %retval = select bool %tmp, double %x, double %y + ret double %retval +} + +float %max1(float %x, float %y) { + %tmp = setge float %x, %y ; <bool> [#uses=1] + %tmp2 = tail call bool %llvm.isunordered.f32( float %x, float %y ) + %tmp3 = or bool %tmp2, %tmp ; <bool> [#uses=1] + %retval = select bool %tmp3, float %x, float %y + ret float %retval +} + +double %max2(double %x, double %y) { + %tmp = setge double %x, %y ; <bool> [#uses=1] + %tmp2 = tail call bool %llvm.isunordered.f64( double %x, double %y ) + %tmp3 = or bool %tmp2, %tmp ; <bool> [#uses=1] + %retval = select bool %tmp3, double %x, double %y + ret double %retval +} + +<4 x float> %min3(float %tmp37) { + %tmp375 = insertelement <4 x float> undef, float %tmp37, uint 0 + %tmp48 = tail call <4 x float> %llvm.x86.sse.min.ss( <4 x float> %tmp375, <4 x float> < float 6.553500e+04, float undef, float undef, float undef > ) + ret <4 x float> %tmp48 +} + +declare <4 x float> %llvm.x86.sse.min.ss(<4 x float>, <4 x float>) diff --git a/test/CodeGen/X86/select.ll b/test/CodeGen/X86/select.ll new file mode 100644 index 0000000..799d45c --- /dev/null +++ b/test/CodeGen/X86/select.ll @@ -0,0 +1,64 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mcpu=yonah +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mcpu=pentium + +bool %boolSel(bool %A, bool %B, bool %C) { + %X = select bool %A, bool %B, bool %C + ret bool %X +} + +sbyte %byteSel(bool %A, sbyte %B, sbyte %C) { + %X = select bool %A, sbyte %B, sbyte %C + ret sbyte %X +} + +short %shortSel(bool %A, short %B, short %C) { + %X = select bool %A, short %B, short %C + ret short %X +} + +int %intSel(bool %A, int %B, int %C) { + %X = select bool %A, int %B, int %C + ret int %X +} + +long %longSel(bool %A, long %B, long %C) { + %X = select bool %A, long %B, long %C + ret long %X +} + +double %doubleSel(bool %A, double %B, double %C) { + %X = select bool %A, double %B, double %C + ret double %X +} + +sbyte %foldSel(bool %A, sbyte %B, sbyte %C) { + %Cond = setlt sbyte %B, %C + %X = select bool %Cond, sbyte %B, sbyte %C + ret sbyte %X +} + +int %foldSel2(bool %A, int %B, int %C) { + %Cond = seteq int %B, %C + %X = select bool %Cond, int %B, int %C + ret int %X +} + +int %foldSel2a(bool %A, int %B, int %C, double %X, double %Y) { + %Cond = setlt double %X, %Y + %X = select bool %Cond, int %B, int %C + ret int %X +} + +float %foldSel3(bool %A, float %B, float %C, uint %X, uint %Y) { + %Cond = setlt uint %X, %Y + %X = select bool %Cond, float %B, float %C + ret float %X +} + +float %nofoldSel4(bool %A, float %B, float %C, int %X, int %Y) { + ; X86 doesn't have a cmov that reads the right flags for this! + %Cond = setlt int %X, %Y + %X = select bool %Cond, float %B, float %C + ret float %X +} + diff --git a/test/CodeGen/X86/setuge.ll b/test/CodeGen/X86/setuge.ll new file mode 100644 index 0000000..2960c6b --- /dev/null +++ b/test/CodeGen/X86/setuge.ll @@ -0,0 +1,12 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | not grep set + +declare bool %llvm.isunordered.f32(float, float) + +float %cmp(float %A, float %B, float %C, float %D) { +entry: + %tmp.1 = call bool %llvm.isunordered.f32(float %A, float %B) + %tmp.2 = setge float %A, %B + %tmp.3 = or bool %tmp.1, %tmp.2 + %tmp.4 = select bool %tmp.3, float %C, float %D + ret float %tmp.4 +} diff --git a/test/CodeGen/X86/shift-coalesce.ll b/test/CodeGen/X86/shift-coalesce.ll new file mode 100644 index 0000000..a071c11 --- /dev/null +++ b/test/CodeGen/X86/shift-coalesce.ll @@ -0,0 +1,13 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel | \ +; RUN: grep {shld.*CL} +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel | \ +; RUN: not grep {mov CL, BL} + +; PR687 + +ulong %foo(ulong %x, long* %X) { + %tmp.1 = load long* %X ; <long> [#uses=1] + %tmp.3 = cast long %tmp.1 to ubyte ; <ubyte> [#uses=1] + %tmp.4 = shl ulong %x, ubyte %tmp.3 ; <ulong> [#uses=1] + ret ulong %tmp.4 +} diff --git a/test/CodeGen/X86/shift-codegen.ll b/test/CodeGen/X86/shift-codegen.ll new file mode 100644 index 0000000..83235c0 --- /dev/null +++ b/test/CodeGen/X86/shift-codegen.ll @@ -0,0 +1,27 @@ +; RUN: llvm-as < %s | llc -relocation-model=static -march=x86 | \ +; RUN: grep {shll \$3} | wc -l | grep 2 + +; This should produce two shll instructions, not any lea's. + +target triple = "i686-apple-darwin8" +@Y = weak global i32 0 ; <i32*> [#uses=1] +@X = weak global i32 0 ; <i32*> [#uses=2] + + +define void @fn1() { +entry: + %tmp = load i32* @Y ; <i32> [#uses=1] + %tmp1 = shl i32 %tmp, 3 ; <i32> [#uses=1] + %tmp2 = load i32* @X ; <i32> [#uses=1] + %tmp3 = or i32 %tmp1, %tmp2 ; <i32> [#uses=1] + store i32 %tmp3, i32* @X + ret void +} + +define i32 @fn2(i32 %X, i32 %Y) { +entry: + %tmp2 = shl i32 %Y, 3 ; <i32> [#uses=1] + %tmp4 = or i32 %tmp2, %X ; <i32> [#uses=1] + ret i32 %tmp4 +} + diff --git a/test/CodeGen/X86/shift-double.llx b/test/CodeGen/X86/shift-double.llx new file mode 100644 index 0000000..760e490 --- /dev/null +++ b/test/CodeGen/X86/shift-double.llx @@ -0,0 +1,31 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel | \ +; RUN: grep {sh\[lr\]d} | wc -l | grep 5 + +long %test1(long %X, ubyte %C) { + %Y = shl long %X, ubyte %C + ret long %Y +} +long %test2(long %X, ubyte %C) { + %Y = shr long %X, ubyte %C + ret long %Y +} +ulong %test3(ulong %X, ubyte %C) { + %Y = shr ulong %X, ubyte %C + ret ulong %Y +} + +uint %test4(uint %A, uint %B, ubyte %C) { + %X = shl uint %A, ubyte %C + %Cv = sub ubyte 32, %C + %Y = shr uint %B, ubyte %Cv + %Z = or uint %Y, %X + ret uint %Z +} + +ushort %test5(ushort %A, ushort %B, ubyte %C) { + %X = shl ushort %A, ubyte %C + %Cv = sub ubyte 16, %C + %Y = shr ushort %B, ubyte %Cv + %Z = or ushort %Y, %X + ret ushort %Z +} diff --git a/test/CodeGen/X86/shift-folding.ll b/test/CodeGen/X86/shift-folding.ll new file mode 100644 index 0000000..671476a --- /dev/null +++ b/test/CodeGen/X86/shift-folding.ll @@ -0,0 +1,20 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | \ +; RUN: grep {s\[ah\]\[rl\]l} | wc -l | grep 1 + +int* %test1(int *%P, uint %X) { + %Y = shr uint %X, ubyte 2 + %P2 = getelementptr int* %P, uint %Y + ret int* %P2 +} + +int* %test2(int *%P, uint %X) { + %Y = shl uint %X, ubyte 2 + %P2 = getelementptr int* %P, uint %Y + ret int* %P2 +} + +int* %test3(int *%P, int %X) { + %Y = shr int %X, ubyte 2 + %P2 = getelementptr int* %P, int %Y + ret int* %P2 +} diff --git a/test/CodeGen/X86/shift-one.ll b/test/CodeGen/X86/shift-one.ll new file mode 100644 index 0000000..3108fba --- /dev/null +++ b/test/CodeGen/X86/shift-one.ll @@ -0,0 +1,9 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | not grep leal + +%x = external global int + +int %test() { + %tmp.0 = load int* %x + %tmp.1 = shl int %tmp.0, ubyte 1 + ret int %tmp.1 +} diff --git a/test/CodeGen/X86/shl_elim.ll b/test/CodeGen/X86/shl_elim.ll new file mode 100644 index 0000000..2e48e52 --- /dev/null +++ b/test/CodeGen/X86/shl_elim.ll @@ -0,0 +1,13 @@ +; RUN: llvm-as < %s | llc -march=x86 | grep {movl 8(.esp), %eax} +; RUN: llvm-as < %s | llc -march=x86 | grep {shll .15, .eax} +; RUN: llvm-as < %s | llc -march=x86 | grep {sarl .16, .eax} + +define i32 @test1(i64 %a) { + %tmp29 = lshr i64 %a, 24 ; <i64> [#uses=1] + %tmp23 = trunc i64 %tmp29 to i32 ; <i32> [#uses=1] + %tmp410 = lshr i32 %tmp23, 9 ; <i32> [#uses=1] + %tmp45 = trunc i32 %tmp410 to i16 ; <i16> [#uses=1] + %tmp456 = sext i16 %tmp45 to i32 ; <i32> [#uses=1] + ret i32 %tmp456 +} + diff --git a/test/CodeGen/X86/sse-fcopysign.ll b/test/CodeGen/X86/sse-fcopysign.ll new file mode 100644 index 0000000..cff1f7f --- /dev/null +++ b/test/CodeGen/X86/sse-fcopysign.ll @@ -0,0 +1,16 @@ +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep test + +define float @tst1(float %a, float %b) { + %tmp = tail call float @copysignf( float %b, float %a ) + ret float %tmp +} + +define double @tst2(double %a, float %b, float %c) { + %tmp1 = add float %b, %c + %tmp2 = fpext float %tmp1 to double + %tmp = tail call double @copysign( double %a, double %tmp2 ) + ret double %tmp +} + +declare float @copysignf(float, float) +declare double @copysign(double, double) diff --git a/test/CodeGen/X86/sse-load-ret.ll b/test/CodeGen/X86/sse-load-ret.ll new file mode 100644 index 0000000..c82f4fc --- /dev/null +++ b/test/CodeGen/X86/sse-load-ret.ll @@ -0,0 +1,20 @@ +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=x86 -mcpu=yonah | not grep movss +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=x86 -mcpu=yonah | not grep xmm + +double %test1(double *%P) { + %X = load double* %P + ret double %X +} + +double %test2() { + ret double 1234.56 +} + +; FIXME: Todo +;double %test3(bool %B) { +; %C = select bool %B, double 123.412, double 523.01123123 +; ret double %C +;} + diff --git a/test/CodeGen/X86/store-fp-constant.ll b/test/CodeGen/X86/store-fp-constant.ll new file mode 100644 index 0000000..3a80080 --- /dev/null +++ b/test/CodeGen/X86/store-fp-constant.ll @@ -0,0 +1,20 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | not grep rodata +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | not grep literal +; +; Check that no FP constants in this testcase ends up in the +; constant pool. +%G = external global float + + +declare void %extfloat(float %F) +declare void %extdouble(double) + +implementation + +void %testfloatstore() { + call void %extfloat(float 1234.4) + call void %extdouble(double 1234.4123) + store float 13.0123, float* %G + ret void +} + diff --git a/test/CodeGen/X86/store-global-address.ll b/test/CodeGen/X86/store-global-address.ll new file mode 100644 index 0000000..77e344d --- /dev/null +++ b/test/CodeGen/X86/store-global-address.ll @@ -0,0 +1,9 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep movl | wc -l | grep 1 + +%dst = global int 0 +%ptr = global int* null + +void %test() { + store int* %dst, int** %ptr + ret void +} diff --git a/test/CodeGen/X86/store_op_load_fold.ll b/test/CodeGen/X86/store_op_load_fold.ll new file mode 100644 index 0000000..9c1c7b8 --- /dev/null +++ b/test/CodeGen/X86/store_op_load_fold.ll @@ -0,0 +1,12 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | not grep mov +; +; Test the add and load are folded into the store instruction. + +%X = internal global short 0 + +void %foo() { + %tmp.0 = load short* %X + %tmp.3 = add short %tmp.0, 329 + store short %tmp.3, short* %X + ret void +} diff --git a/test/CodeGen/X86/store_op_load_fold2.ll b/test/CodeGen/X86/store_op_load_fold2.ll new file mode 100644 index 0000000..46996d7 --- /dev/null +++ b/test/CodeGen/X86/store_op_load_fold2.ll @@ -0,0 +1,43 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel | \ +; RUN: grep {and DWORD PTR} | wc -l | grep 2 + +target endian = little +target pointersize = 32 + + %struct.Macroblock = type { int, int, int, int, int, [8 x int], %struct.Macroblock*, %struct.Macroblock*, int, [2 x [4 x [4 x [2 x int]]]], [16 x sbyte], [16 x sbyte], int, long, [4 x int], [4 x int], long, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, short, double, int, int, int, int, int, int, int, int, int } + +implementation ; Functions: + +internal fastcc int %dct_chroma(int %uv, int %cr_cbp) { +entry: + br bool true, label %cond_true2732.preheader, label %cond_true129 + +cond_true129: ; preds = %entry + ret int 0 + +cond_true2732.preheader: ; preds = %bb2611 + %tmp2666 = getelementptr %struct.Macroblock* null, int 0, uint 13 ; <long*> [#uses=2] + %tmp2674 = cast int 0 to ubyte ; <ubyte> [#uses=1] + br bool true, label %cond_true2732.preheader.split.us, label %cond_true2732.preheader.split + +cond_true2732.preheader.split.us: ; preds = %cond_true2732.preheader + br bool true, label %cond_true2732.outer.us.us, label %cond_true2732.outer.us + +cond_true2732.outer.us.us: ; preds = %cond_true2732.preheader.split.us + %tmp2667.us.us = load long* %tmp2666 ; <long> [#uses=1] + %tmp2670.us.us = load long* null ; <long> [#uses=1] + %tmp2675.us.us = shl long %tmp2670.us.us, ubyte %tmp2674 ; <long> [#uses=1] + %tmp2675not.us.us = xor long %tmp2675.us.us, -1 ; <long> [#uses=1] + %tmp2676.us.us = and long %tmp2667.us.us, %tmp2675not.us.us ; <long> [#uses=1] + store long %tmp2676.us.us, long* %tmp2666 + ret int 0 + +cond_true2732.outer.us: ; preds = %cond_true2732.preheader.split.us + ret int 0 + +cond_true2732.preheader.split: ; preds = %cond_true2732.preheader + ret int 0 + +cond_next2752: ; preds = %bb2611 + ret int 0 +} diff --git a/test/CodeGen/X86/test-hidden.ll b/test/CodeGen/X86/test-hidden.ll new file mode 100644 index 0000000..e95ca6a --- /dev/null +++ b/test/CodeGen/X86/test-hidden.ll @@ -0,0 +1,20 @@ +; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu | \ +; RUN: grep .hidden | wc -l | grep 2 +; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin8.8.0 | \ +; RUN: grep .private_extern | wc -l | grep 2 + +%struct.Person = type { i32 } +@a = hidden global i32 0 +@b = external global i32 + + +define weak hidden void @_ZN6Person13privateMethodEv(%struct.Person* %this) { + ret void +} + +declare void @function(i32) + +define weak void @_ZN6PersonC1Ei(%struct.Person* %this, i32 %_c) { + ret void +} + diff --git a/test/CodeGen/X86/test-load-fold.ll b/test/CodeGen/X86/test-load-fold.ll new file mode 100644 index 0000000..847d91e --- /dev/null +++ b/test/CodeGen/X86/test-load-fold.ll @@ -0,0 +1,29 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + %struct._obstack_chunk = type { sbyte*, %struct._obstack_chunk*, [4 x sbyte] } + %struct.obstack = type { int, %struct._obstack_chunk*, sbyte*, sbyte*, sbyte*, int, int, %struct._obstack_chunk* (...)*, void (...)*, sbyte*, ubyte } +%stmt_obstack = external global %struct.obstack ; <%struct.obstack*> [#uses=1] + +implementation ; Functions: + +void %expand_start_bindings() { +entry: + br bool false, label %cond_true, label %cond_next + +cond_true: ; preds = %entry + %new_size.0.i = select bool false, int 0, int 0 ; <int> [#uses=1] + %tmp.i = load uint* cast (ubyte* getelementptr (%struct.obstack* %stmt_obstack, int 0, uint 10) to uint*) ; <uint> [#uses=1] + %tmp.i = cast uint %tmp.i to ubyte ; <ubyte> [#uses=1] + %tmp21.i = and ubyte %tmp.i, 1 ; <ubyte> [#uses=1] + %tmp22.i = seteq ubyte %tmp21.i, 0 ; <bool> [#uses=1] + br bool %tmp22.i, label %cond_false30.i, label %cond_true23.i + +cond_true23.i: ; preds = %cond_true + ret void + +cond_false30.i: ; preds = %cond_true + %tmp35.i = tail call %struct._obstack_chunk* null( int %new_size.0.i ) ; <%struct._obstack_chunk*> [#uses=0] + ret void + +cond_next: ; preds = %entry + ret void +} diff --git a/test/CodeGen/X86/test-pic-1.ll b/test/CodeGen/X86/test-pic-1.ll new file mode 100644 index 0000000..4d9703e --- /dev/null +++ b/test/CodeGen/X86/test-pic-1.ll @@ -0,0 +1,19 @@ +; RUN: llvm-as < %s | \ +; RUN: llc -mtriple=i686-pc-linux-gnu -relocation-model=pic -o %t -f +; RUN: grep _GLOBAL_OFFSET_TABLE_ %t +; RUN: grep piclabel %t | wc -l | grep 3 +; RUN: grep GOT %t | wc -l | grep 3 +; RUN: not grep GOTOFF %t | wc -l + +@ptr = external global i32* +@dst = external global i32 +@src = external global i32 + +define void @foo() { +entry: + store i32* @dst, i32** @ptr + %tmp.s = load i32* @src + store i32 %tmp.s, i32* @dst + ret void +} + diff --git a/test/CodeGen/X86/test-pic-2.ll b/test/CodeGen/X86/test-pic-2.ll new file mode 100644 index 0000000..1d875fa --- /dev/null +++ b/test/CodeGen/X86/test-pic-2.ll @@ -0,0 +1,18 @@ +; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu -relocation-model=pic \ +; RUN: -o %t -f +; RUN: grep _GLOBAL_OFFSET_TABLE_ %t +; RUN: grep piclabel %t | wc -l | grep 3 +; RUN: grep GOTOFF %t | wc -l | grep 4 + +@ptr = internal global i32* null +@dst = internal global i32 0 +@src = internal global i32 0 + +define void @foo() { +entry: + store i32* @dst, i32** @ptr + %tmp.s = load i32* @src + store i32 %tmp.s, i32* @dst + ret void +} + diff --git a/test/CodeGen/X86/test-pic-3.ll b/test/CodeGen/X86/test-pic-3.ll new file mode 100644 index 0000000..91b4761 --- /dev/null +++ b/test/CodeGen/X86/test-pic-3.ll @@ -0,0 +1,15 @@ +; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu -relocation-model=pic \ +; RUN: -o %t -f +; RUN: grep _GLOBAL_OFFSET_TABLE_ %t +; RUN: grep piclabel %t | wc -l | grep 3 +; RUN: grep PLT %t | wc -l | grep 1 + +define void @bar() { +entry: + call void(...)* @foo() + br label %return +return: + ret void +} + +declare void @foo(...) diff --git a/test/CodeGen/X86/test-pic-4.ll b/test/CodeGen/X86/test-pic-4.ll new file mode 100644 index 0000000..7637d35 --- /dev/null +++ b/test/CodeGen/X86/test-pic-4.ll @@ -0,0 +1,22 @@ +; RUN: llvm-as < %s | \ +; RUN: llc -mtriple=i686-pc-linux-gnu -relocation-model=pic -o %t -f +; RUN: grep _GLOBAL_OFFSET_TABLE_ %t +; RUN: grep piclabel %t | wc -l | grep 3 +; RUN: grep PLT %t | wc -l | grep 1 +; RUN: grep GOT %t | wc -l | grep 1 +; RUN: not grep GOTOFF %t + +@pfoo = external global void(...)* + +define void @bar() { +entry: + %tmp = call void(...)*(...)* @afoo() + store void(...)* %tmp, void(...)** @pfoo + %tmp1 = load void(...)** @pfoo + call void(...)* %tmp1() + br label %return +return: + ret void +} + +declare void(...)* @afoo(...) diff --git a/test/CodeGen/X86/test-pic-5.ll b/test/CodeGen/X86/test-pic-5.ll new file mode 100644 index 0000000..0ed38b9 --- /dev/null +++ b/test/CodeGen/X86/test-pic-5.ll @@ -0,0 +1,14 @@ +; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu -relocation-model=pic \ +; RUN: -o %t -f +; RUN: grep _GLOBAL_OFFSET_TABLE_ %t +; RUN: grep piclabel %t | wc -l | grep 3 +; RUN: grep PLT %t | wc -l | grep 1 + +@ptr = external global i32* + +define void @foo() { +entry: + %ptr = malloc i32, i32 10 + ret void +} + diff --git a/test/CodeGen/X86/test-pic-6.ll b/test/CodeGen/X86/test-pic-6.ll new file mode 100644 index 0000000..43485c3 --- /dev/null +++ b/test/CodeGen/X86/test-pic-6.ll @@ -0,0 +1,18 @@ +; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu -relocation-model=pic \ +; RUN: -o %t -f +; RUN: grep _GLOBAL_OFFSET_TABLE_ %t +; RUN: grep piclabel %t | wc -l | grep 3 +; RUN: grep GOT %t | wc -l | grep 3 + +@ptr = global i32* null +@dst = global i32 0 +@src = global i32 0 + +define void @foo() { +entry: + store i32* @dst, i32** @ptr + %tmp.s = load i32* @src + store i32 %tmp.s, i32* @dst + ret void +} + diff --git a/test/CodeGen/X86/test-pic-cpool.ll b/test/CodeGen/X86/test-pic-cpool.ll new file mode 100644 index 0000000..79f5607 --- /dev/null +++ b/test/CodeGen/X86/test-pic-cpool.ll @@ -0,0 +1,14 @@ +; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu -relocation-model=pic \ +; RUN: -o %t -f +; RUN: grep _GLOBAL_OFFSET_TABLE_ %t +; RUN: grep piclabel %t | wc -l | grep 3 +; RUN: grep GOTOFF %t | wc -l | grep 2 +; RUN: grep CPI %t | wc -l | grep 4 + +define double @foo(i32 %a.u) { +entry: + %tmp = icmp eq i32 %a.u,0 + %retval = select i1 %tmp, double 4.561230e+02, double 1.234560e+02 + ret double %retval +} + diff --git a/test/CodeGen/X86/test-pic-jtbl.ll b/test/CodeGen/X86/test-pic-jtbl.ll new file mode 100644 index 0000000..1afa4ca --- /dev/null +++ b/test/CodeGen/X86/test-pic-jtbl.ll @@ -0,0 +1,58 @@ +; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu -relocation-model=pic \ +; RUN: -o %t -f +; RUN: grep _GLOBAL_OFFSET_TABLE_ %t +; RUN: grep piclabel %t | wc -l | grep 3 +; RUN: grep PLT %t | wc -l | grep 6 +; RUN: grep GOTOFF %t | wc -l | grep 1 +; RUN: grep JTI %t | wc -l | grep 8 + +define void @bar(i32 %n.u) { +entry: + switch i32 %n.u, label %bb12 [i32 1, label %bb i32 2, label %bb6 i32 4, label %bb7 i32 5, label %bb8 i32 6, label %bb10 i32 7, label %bb1 i32 8, label %bb3 i32 9, label %bb4 i32 10, label %bb9 i32 11, label %bb2 i32 12, label %bb5 i32 13, label %bb11 ] +bb: + tail call void(...)* @foo1() + ret void +bb1: + tail call void(...)* @foo2() + ret void +bb2: + tail call void(...)* @foo6() + ret void +bb3: + tail call void(...)* @foo3() + ret void +bb4: + tail call void(...)* @foo4() + ret void +bb5: + tail call void(...)* @foo5() + ret void +bb6: + tail call void(...)* @foo1() + ret void +bb7: + tail call void(...)* @foo2() + ret void +bb8: + tail call void(...)* @foo6() + ret void +bb9: + tail call void(...)* @foo3() + ret void +bb10: + tail call void(...)* @foo4() + ret void +bb11: + tail call void(...)* @foo5() + ret void +bb12: + tail call void(...)* @foo6() + ret void +} + +declare void @foo1(...) +declare void @foo2(...) +declare void @foo6(...) +declare void @foo3(...) +declare void @foo4(...) +declare void @foo5(...) diff --git a/test/CodeGen/X86/tls1.ll b/test/CodeGen/X86/tls1.ll new file mode 100644 index 0000000..ae90c94 --- /dev/null +++ b/test/CodeGen/X86/tls1.ll @@ -0,0 +1,19 @@ +; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu | \ +; RUN: grep {movl %gs:i@NTPOFF, %eax} +; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu | \ +; RUN: grep {leal i@NTPOFF(%eax), %eax} +; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu -relocation-model=pic | \ +; RUN: grep {leal i@TLSGD(,%ebx,1), %eax} + +@i = thread_local global i32 15 ; <i32*> [#uses=2] + +define i32 @f() { +entry: + %tmp1 = load i32* @i ; <i32> [#uses=1] + ret i32 %tmp1 +} + +define i32* @g() { +entry: + ret i32* @i +} diff --git a/test/CodeGen/X86/tls2.ll b/test/CodeGen/X86/tls2.ll new file mode 100644 index 0000000..50e2ba6 --- /dev/null +++ b/test/CodeGen/X86/tls2.ll @@ -0,0 +1,19 @@ +; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu | \ +; RUN: grep {movl %gs:(%eax), %eax} +; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu | \ +; RUN: grep {addl i@INDNTPOFF, %eax} +; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu -relocation-model=pic | \ +; RUN: grep {leal i@TLSGD(,%ebx,1), %eax} + +@i = external thread_local global i32 ; <i32*> [#uses=2] + +define i32 @f() { +entry: + %tmp1 = load i32* @i ; <i32> [#uses=1] + ret i32 %tmp1 +} + +define i32* @g() { +entry: + ret i32* @i +} diff --git a/test/CodeGen/X86/trunc-to-bool.ll b/test/CodeGen/X86/trunc-to-bool.ll new file mode 100644 index 0000000..bf53825 --- /dev/null +++ b/test/CodeGen/X86/trunc-to-bool.ll @@ -0,0 +1,60 @@ +; An integer truncation to i1 should be done with an and instruction to make +; sure only the LSBit survives. Test that this is the case both for a returned +; value and as the operand of a branch. +; RUN: llvm-as < %s | llc -march=x86 | grep {\\(and\\)\\|\\(test.*\\\$1\\)} | \ +; RUN: wc -l | grep 6 + +define i1 @test1(i32 %X) zext { + %Y = trunc i32 %X to i1 + ret i1 %Y +} + +define i1 @test2(i32 %val, i32 %mask) { +entry: + %shifted = ashr i32 %val, %mask + %anded = and i32 %shifted, 1 + %trunced = trunc i32 %anded to i1 + br i1 %trunced, label %ret_true, label %ret_false +ret_true: + ret i1 true +ret_false: + ret i1 false +} + +define i32 @test3(i8* %ptr) { + %val = load i8* %ptr + %tmp = trunc i8 %val to i1 + br i1 %tmp, label %cond_true, label %cond_false +cond_true: + ret i32 21 +cond_false: + ret i32 42 +} + +define i32 @test4(i8* %ptr) { + %tmp = ptrtoint i8* %ptr to i1 + br i1 %tmp, label %cond_true, label %cond_false +cond_true: + ret i32 21 +cond_false: + ret i32 42 +} + +define i32 @test5(float %f) { + %tmp = fptoui float %f to i1 + br i1 %tmp, label %cond_true, label %cond_false +cond_true: + ret i32 21 +cond_false: + ret i32 42 +} + +define i32 @test6(double %d) { + %tmp = fptosi double %d to i1 + br i1 %tmp, label %cond_true, label %cond_false +cond_true: + ret i32 21 +cond_false: + ret i32 42 +} + diff --git a/test/CodeGen/X86/vec_add.ll b/test/CodeGen/X86/vec_add.ll new file mode 100644 index 0000000..b4154f6 --- /dev/null +++ b/test/CodeGen/X86/vec_add.ll @@ -0,0 +1,7 @@ +; RUN: llvm-as < %s | | llc -march=x86 -mattr=+sse2 + +define <2 x i64> @test(<2 x i64> %a, <2 x i64> %b) { +entry: + %tmp9 = add <2 x i64> %b, %a ; <<2 x i64>> [#uses=1] + ret <2 x i64> %tmp9 +} diff --git a/test/CodeGen/X86/vec_call.ll b/test/CodeGen/X86/vec_call.ll new file mode 100644 index 0000000..990f20f --- /dev/null +++ b/test/CodeGen/X86/vec_call.ll @@ -0,0 +1,11 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin8 | \ +; RUN: grep {subl.*60} +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin8 | \ +; RUN: grep {movdqa.*32} + +void %test() { + tail call void %xx( int 1, int 2, int 3, int 4, int 5, int 6, int 7, <2 x long> cast (<4 x int> < int 4, int 3, int 2, int 1 > to <2 x long>), <2 x long> cast (<4 x int> < int 8, int 7, int 6, int 5 > to <2 x long>), <2 x long> cast (<4 x int> < int 6, int 4, int 2, int 0 > to <2 x long>), <2 x long> cast (<4 x int> < int 8, int 4, int 2, int 1 > to <2 x long>), <2 x long> cast (<4 x int> < int 0, int 1, int 3, int 9 > to <2 x long>) ) + ret void +} + +declare void %xx(int, int, int, int, int, int, int, <2 x long>, <2 x long>, <2 x long>, <2 x long>, <2 x long>) diff --git a/test/CodeGen/X86/vec_clear.ll b/test/CodeGen/X86/vec_clear.ll new file mode 100644 index 0000000..8289b6b --- /dev/null +++ b/test/CodeGen/X86/vec_clear.ll @@ -0,0 +1,8 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | not grep and +<4 x float> %test(<4 x float>* %v1) { + %tmp = load <4 x float>* %v1 + %tmp15 = cast <4 x float> %tmp to <2 x long> + %tmp24 = and <2 x long> %tmp15, cast (<4 x int> < int 0, int 0, int -1, int -1 > to <2 x long>) + %tmp31 = cast <2 x long> %tmp24 to <4 x float> + ret <4 x float> %tmp31 +} diff --git a/test/CodeGen/X86/vec_extract.ll b/test/CodeGen/X86/vec_extract.ll new file mode 100644 index 0000000..2d3e87e --- /dev/null +++ b/test/CodeGen/X86/vec_extract.ll @@ -0,0 +1,36 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 -o %t -f +; RUN: grep movss %t | wc -l | grep 3 +; RUN: grep movhlps %t | wc -l | grep 1 +; RUN: grep pshufd %t | wc -l | grep 1 +; RUN: grep unpckhpd %t | wc -l | grep 1 + +void %test1(<4 x float>* %F, float* %f) { + %tmp = load <4 x float>* %F + %tmp7 = add <4 x float> %tmp, %tmp + %tmp2 = extractelement <4 x float> %tmp7, uint 0 + store float %tmp2, float* %f + ret void +} + +float %test2(<4 x float>* %F, float* %f) { + %tmp = load <4 x float>* %F + %tmp7 = add <4 x float> %tmp, %tmp + %tmp2 = extractelement <4 x float> %tmp7, uint 2 + ret float %tmp2 +} + +void %test3(float* %R, <4 x float>* %P1) { + %X = load <4 x float>* %P1 + %tmp = extractelement <4 x float> %X, uint 3 + store float %tmp, float* %R + ret void +} + +double %test4(double %A) { + %tmp1 = call <2 x double> %foo() + %tmp2 = extractelement <2 x double> %tmp1, uint 1 + %tmp3 = add double %tmp2, %A + ret double %tmp3 +} + +declare <2 x double> %foo() diff --git a/test/CodeGen/X86/vec_fneg.ll b/test/CodeGen/X86/vec_fneg.ll new file mode 100644 index 0000000..0a057a4 --- /dev/null +++ b/test/CodeGen/X86/vec_fneg.ll @@ -0,0 +1,11 @@ +; RUN: llvm-as < %s | | llc -march=x86 -mattr=+sse2 + +define <4 x float> @t1(<4 x float> %Q) { + %tmp15 = sub <4 x float> < float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00 >, %Q + ret <4 x float> %tmp15 +} + +define <4 x float> @t2(<4 x float> %Q) { + %tmp15 = sub <4 x float> zeroinitializer, %Q + ret <4 x float> %tmp15 +} diff --git a/test/CodeGen/X86/vec_ins_extract.ll b/test/CodeGen/X86/vec_ins_extract.ll new file mode 100644 index 0000000..9f44afe --- /dev/null +++ b/test/CodeGen/X86/vec_ins_extract.ll @@ -0,0 +1,51 @@ +; RUN: llvm-upgrade < %s | llvm-as | opt -scalarrepl -instcombine | \ +; RUN: llc -march=x86 -mcpu=yonah | not grep sub.*esp + +; This checks that various insert/extract idiom work without going to the +; stack. + +void %test(<4 x float>* %F, float %f) { +entry: + %tmp = load <4 x float>* %F ; <<4 x float>> [#uses=2] + %tmp3 = add <4 x float> %tmp, %tmp ; <<4 x float>> [#uses=1] + %tmp10 = insertelement <4 x float> %tmp3, float %f, uint 0 ; <<4 x float>> [#uses=2] + %tmp6 = add <4 x float> %tmp10, %tmp10 ; <<4 x float>> [#uses=1] + store <4 x float> %tmp6, <4 x float>* %F + ret void +} + +void %test2(<4 x float>* %F, float %f) { +entry: + %G = alloca <4 x float>, align 16 ; <<4 x float>*> [#uses=3] + %tmp = load <4 x float>* %F ; <<4 x float>> [#uses=2] + %tmp3 = add <4 x float> %tmp, %tmp ; <<4 x float>> [#uses=1] + store <4 x float> %tmp3, <4 x float>* %G + %tmp = getelementptr <4 x float>* %G, int 0, int 2 ; <float*> [#uses=1] + store float %f, float* %tmp + %tmp4 = load <4 x float>* %G ; <<4 x float>> [#uses=2] + %tmp6 = add <4 x float> %tmp4, %tmp4 ; <<4 x float>> [#uses=1] + store <4 x float> %tmp6, <4 x float>* %F + ret void +} + +void %test3(<4 x float>* %F, float* %f) { +entry: + %G = alloca <4 x float>, align 16 ; <<4 x float>*> [#uses=2] + %tmp = load <4 x float>* %F ; <<4 x float>> [#uses=2] + %tmp3 = add <4 x float> %tmp, %tmp ; <<4 x float>> [#uses=1] + store <4 x float> %tmp3, <4 x float>* %G + %tmp = getelementptr <4 x float>* %G, int 0, int 2 ; <float*> [#uses=1] + %tmp = load float* %tmp ; <float> [#uses=1] + store float %tmp, float* %f + ret void +} + +void %test4(<4 x float>* %F, float* %f) { +entry: + %tmp = load <4 x float>* %F ; <<4 x float>> [#uses=2] + %tmp5.lhs = extractelement <4 x float> %tmp, uint 0 ; <float> [#uses=1] + %tmp5.rhs = extractelement <4 x float> %tmp, uint 0 ; <float> [#uses=1] + %tmp5 = add float %tmp5.lhs, %tmp5.rhs ; <float> [#uses=1] + store float %tmp5, float* %f + ret void +} diff --git a/test/CodeGen/X86/vec_insert.ll b/test/CodeGen/X86/vec_insert.ll new file mode 100644 index 0000000..021685e --- /dev/null +++ b/test/CodeGen/X86/vec_insert.ll @@ -0,0 +1,20 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 -o %t -f +; RUN: grep movss %t | wc -l | grep 1 +; RUN: grep pinsrw %t | wc -l | grep 2 + +void %test(<4 x float>* %F, int %I) { + %tmp = load <4 x float>* %F + %f = cast int %I to float + %tmp1 = insertelement <4 x float> %tmp, float %f, uint 0 + %tmp18 = add <4 x float> %tmp1, %tmp1 + store <4 x float> %tmp18, <4 x float>* %F + ret void +} + +void %test2(<4 x float>* %F, int %I, float %g) { + %tmp = load <4 x float>* %F + %f = cast int %I to float + %tmp1 = insertelement <4 x float> %tmp, float %f, uint 2 + store <4 x float> %tmp1, <4 x float>* %F + ret void +} diff --git a/test/CodeGen/X86/vec_return.ll b/test/CodeGen/X86/vec_return.ll new file mode 100644 index 0000000..2b2d954 --- /dev/null +++ b/test/CodeGen/X86/vec_return.ll @@ -0,0 +1,5 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mcpu=yonah + +<2 x double> %test() { + ret <2 x double> <double 0.0, double 0.0> +} diff --git a/test/CodeGen/X86/vec_select.ll b/test/CodeGen/X86/vec_select.ll new file mode 100644 index 0000000..05f2a8c --- /dev/null +++ b/test/CodeGen/X86/vec_select.ll @@ -0,0 +1,11 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse + +void %test(int %C, <4 x float>* %A, <4 x float>* %B) { + %tmp = load <4 x float>* %A + %tmp3 = load <4 x float>* %B + %tmp9 = mul <4 x float> %tmp3, %tmp3 + %tmp = seteq int %C, 0 + %iftmp.38.0 = select bool %tmp, <4 x float> %tmp9, <4 x float> %tmp + store <4 x float> %iftmp.38.0, <4 x float>* %A + ret void +} diff --git a/test/CodeGen/X86/vec_set-2.ll b/test/CodeGen/X86/vec_set-2.ll new file mode 100644 index 0000000..1d1449d --- /dev/null +++ b/test/CodeGen/X86/vec_set-2.ll @@ -0,0 +1,23 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | grep movss | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | grep movd | wc -l | grep 1 + +<4 x float> %test1(float %a) { + %tmp = insertelement <4 x float> zeroinitializer, float %a, uint 0 + %tmp5 = insertelement <4 x float> %tmp, float 0.000000e+00, uint 1 + %tmp6 = insertelement <4 x float> %tmp5, float 0.000000e+00, uint 2 + %tmp7 = insertelement <4 x float> %tmp6, float 0.000000e+00, uint 3 + ret <4 x float> %tmp7 +} + +<2 x long> %test(short %a) { + %tmp = insertelement <8 x short> zeroinitializer, short %a, uint 0 + %tmp6 = insertelement <8 x short> %tmp, short 0, uint 1 + %tmp8 = insertelement <8 x short> %tmp6, short 0, uint 2 + %tmp10 = insertelement <8 x short> %tmp8, short 0, uint 3 + %tmp12 = insertelement <8 x short> %tmp10, short 0, uint 4 + %tmp14 = insertelement <8 x short> %tmp12, short 0, uint 5 + %tmp16 = insertelement <8 x short> %tmp14, short 0, uint 6 + %tmp18 = insertelement <8 x short> %tmp16, short 0, uint 7 + %tmp19 = cast <8 x short> %tmp18 to <2 x long> + ret <2 x long> %tmp19 +} diff --git a/test/CodeGen/X86/vec_set-3.ll b/test/CodeGen/X86/vec_set-3.ll new file mode 100644 index 0000000..1edaa58 --- /dev/null +++ b/test/CodeGen/X86/vec_set-3.ll @@ -0,0 +1,17 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 -o %t -f +; RUN: grep shufps %t | wc -l | grep 1 +; RUN: grep pshufd %t | wc -l | grep 1 + +<4 x float> %test(float %a) { + %tmp = insertelement <4 x float> zeroinitializer, float %a, uint 1 + %tmp5 = insertelement <4 x float> %tmp, float 0.000000e+00, uint 2 + %tmp6 = insertelement <4 x float> %tmp5, float 0.000000e+00, uint 3 + ret <4 x float> %tmp6 +} + +<2 x long> %test2(int %a) { + %tmp7 = insertelement <4 x int> zeroinitializer, int %a, uint 2 + %tmp9 = insertelement <4 x int> %tmp7, int 0, uint 3 + %tmp10 = cast <4 x int> %tmp9 to <2 x long> + ret <2 x long> %tmp10 +} diff --git a/test/CodeGen/X86/vec_set-4.ll b/test/CodeGen/X86/vec_set-4.ll new file mode 100644 index 0000000..c656a58 --- /dev/null +++ b/test/CodeGen/X86/vec_set-4.ll @@ -0,0 +1,24 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | grep pinsrw | wc -l | grep 2 + +<2 x long> %test(short %a) { +entry: + %tmp10 = insertelement <8 x short> zeroinitializer, short %a, uint 3 ; <<8 x short>> [#uses=1] + %tmp12 = insertelement <8 x short> %tmp10, short 0, uint 4 ; <<8 x short>> [#uses=1] + %tmp14 = insertelement <8 x short> %tmp12, short 0, uint 5 ; <<8 x short>> [#uses=1] + %tmp16 = insertelement <8 x short> %tmp14, short 0, uint 6 ; <<8 x short>> [#uses=1] + %tmp18 = insertelement <8 x short> %tmp16, short 0, uint 7 ; <<8 x short>> [#uses=1] + %tmp19 = cast <8 x short> %tmp18 to <2 x long> ; <<2 x long>> [#uses=1] + ret <2 x long> %tmp19 +} + +<2 x long> %test2(sbyte %a) { +entry: + %tmp24 = insertelement <16 x sbyte> zeroinitializer, sbyte %a, uint 10 + %tmp26 = insertelement <16 x sbyte> %tmp24, sbyte 0, uint 11 + %tmp28 = insertelement <16 x sbyte> %tmp26, sbyte 0, uint 12 + %tmp30 = insertelement <16 x sbyte> %tmp28, sbyte 0, uint 13 + %tmp32 = insertelement <16 x sbyte> %tmp30, sbyte 0, uint 14 + %tmp34 = insertelement <16 x sbyte> %tmp32, sbyte 0, uint 15 + %tmp35 = cast <16 x sbyte> %tmp34 to <2 x long> + ret <2 x long> %tmp35 +} diff --git a/test/CodeGen/X86/vec_set-5.ll b/test/CodeGen/X86/vec_set-5.ll new file mode 100644 index 0000000..218f041 --- /dev/null +++ b/test/CodeGen/X86/vec_set-5.ll @@ -0,0 +1,29 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 -o %t -f +; RUN: grep movlhps %t | wc -l | grep 2 +; RUN: grep unpcklps %t | wc -l | grep 1 +; RUN: grep punpckldq %t | wc -l | grep 1 + +<4 x float> %test1(float %a, float %b) { + %tmp = insertelement <4 x float> zeroinitializer, float %a, uint 0 + %tmp6 = insertelement <4 x float> %tmp, float 0.000000e+00, uint 1 + %tmp8 = insertelement <4 x float> %tmp6, float %b, uint 2 + %tmp9 = insertelement <4 x float> %tmp8, float 0.000000e+00, uint 3 + ret <4 x float> %tmp9 +} + +<4 x float> %test2(float %a, float %b) { + %tmp = insertelement <4 x float> zeroinitializer, float %a, uint 0 + %tmp7 = insertelement <4 x float> %tmp, float %b, uint 1 + %tmp8 = insertelement <4 x float> %tmp7, float 0.000000e+00, uint 2 + %tmp9 = insertelement <4 x float> %tmp8, float 0.000000e+00, uint 3 + ret <4 x float> %tmp9 +} + +<2 x long> %test3(int %a, int %b) { + %tmp = insertelement <4 x int> zeroinitializer, int %a, uint 0 + %tmp6 = insertelement <4 x int> %tmp, int %b, uint 1 + %tmp8 = insertelement <4 x int> %tmp6, int 0, uint 2 + %tmp10 = insertelement <4 x int> %tmp8, int 0, uint 3 + %tmp11 = cast <4 x int> %tmp10 to <2 x long> + ret <2 x long> %tmp11 +} diff --git a/test/CodeGen/X86/vec_set-6.ll b/test/CodeGen/X86/vec_set-6.ll new file mode 100644 index 0000000..ea6be74 --- /dev/null +++ b/test/CodeGen/X86/vec_set-6.ll @@ -0,0 +1,10 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 -o %t -f +; RUN: grep unpcklps %t | wc -l | grep 1 +; RUN: grep shufps %t | wc -l | grep 1 + +<4 x float> %test(float %a, float %b, float %c) { + %tmp = insertelement <4 x float> zeroinitializer, float %a, uint 1 + %tmp8 = insertelement <4 x float> %tmp, float %b, uint 2 + %tmp10 = insertelement <4 x float> %tmp8, float %c, uint 3 + ret <4 x float> %tmp10 +} diff --git a/test/CodeGen/X86/vec_set-7.ll b/test/CodeGen/X86/vec_set-7.ll new file mode 100644 index 0000000..ab342df --- /dev/null +++ b/test/CodeGen/X86/vec_set-7.ll @@ -0,0 +1,10 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | grep movq | wc -l | grep 1 + +<2 x long> %test(<2 x long>* %p) { + %tmp = cast <2 x long>* %p to double* + %tmp = load double* %tmp + %tmp = insertelement <2 x double> undef, double %tmp, uint 0 + %tmp5 = insertelement <2 x double> %tmp, double 0.000000e+00, uint 1 + %tmp = cast <2 x double> %tmp5 to <2 x long> + ret <2 x long> %tmp +} diff --git a/test/CodeGen/X86/vec_set.ll b/test/CodeGen/X86/vec_set.ll new file mode 100644 index 0000000..c190e41 --- /dev/null +++ b/test/CodeGen/X86/vec_set.ll @@ -0,0 +1,14 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | grep punpckl | wc -l | grep 7 + +void %test(<8 x short>* %b, short %a0, short %a1, short %a2, short %a3, short %a4, short %a5, short %a6, short %a7) { + %tmp = insertelement <8 x short> zeroinitializer, short %a0, uint 0 + %tmp2 = insertelement <8 x short> %tmp, short %a1, uint 1 + %tmp4 = insertelement <8 x short> %tmp2, short %a2, uint 2 + %tmp6 = insertelement <8 x short> %tmp4, short %a3, uint 3 + %tmp8 = insertelement <8 x short> %tmp6, short %a4, uint 4 + %tmp10 = insertelement <8 x short> %tmp8, short %a5, uint 5 + %tmp12 = insertelement <8 x short> %tmp10, short %a6, uint 6 + %tmp14 = insertelement <8 x short> %tmp12, short %a7, uint 7 + store <8 x short> %tmp14, <8 x short>* %b + ret void +} diff --git a/test/CodeGen/X86/vec_shuffle-10.ll b/test/CodeGen/X86/vec_shuffle-10.ll new file mode 100644 index 0000000..34a97c4 --- /dev/null +++ b/test/CodeGen/X86/vec_shuffle-10.ll @@ -0,0 +1,27 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | \ +; RUN: grep unpcklps | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | \ +; RUN: grep unpckhps | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | \ +; RUN: not grep {sub.*esp} + +void %test(<4 x float>* %res, <4 x float>* %A, <4 x float>* %B) { + %tmp = load <4 x float>* %B ; <<4 x float>> [#uses=2] + %tmp3 = load <4 x float>* %A ; <<4 x float>> [#uses=2] + %tmp = extractelement <4 x float> %tmp3, uint 0 ; <float> [#uses=1] + %tmp7 = extractelement <4 x float> %tmp, uint 0 ; <float> [#uses=1] + %tmp8 = extractelement <4 x float> %tmp3, uint 1 ; <float> [#uses=1] + %tmp9 = extractelement <4 x float> %tmp, uint 1 ; <float> [#uses=1] + %tmp10 = insertelement <4 x float> undef, float %tmp, uint 0 ; <<4 x float>> [#uses=1] + %tmp11 = insertelement <4 x float> %tmp10, float %tmp7, uint 1 ; <<4 x float>> [#uses=1] + %tmp12 = insertelement <4 x float> %tmp11, float %tmp8, uint 2 ; <<4 x float>> [#uses=1] + %tmp13 = insertelement <4 x float> %tmp12, float %tmp9, uint 3 ; <<4 x float>> [#uses=1] + store <4 x float> %tmp13, <4 x float>* %res + ret void +} + +void %test2(<4 x float> %X, <4 x float>* %res) { + %tmp5 = shufflevector <4 x float> %X, <4 x float> undef, <4 x uint> < uint 2, uint 6, uint 3, uint 7 > + store <4 x float> %tmp5, <4 x float>* %res + ret void +} diff --git a/test/CodeGen/X86/vec_shuffle-11.ll b/test/CodeGen/X86/vec_shuffle-11.ll new file mode 100644 index 0000000..553088f --- /dev/null +++ b/test/CodeGen/X86/vec_shuffle-11.ll @@ -0,0 +1,11 @@ +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep mov + +define <4 x i32> @test() { + %tmp131 = call <2 x i64> @llvm.x86.sse2.psrl.dq( <2 x i64> < i64 -1, i64 -1 >, i32 96 ) ; <<2 x i64>> [#uses=1] + %tmp137 = bitcast <2 x i64> %tmp131 to <4 x i32> ; <<4 x i32>> [#uses=1] + %tmp138 = and <4 x i32> %tmp137, bitcast (<2 x i64> < i64 -1, i64 -1 > to <4 x i32>) ; <<4 x i32>> [#uses=1] + ret <4 x i32> %tmp138 +} + +declare <2 x i64> @llvm.x86.sse2.psrl.dq(<2 x i64>, i32) diff --git a/test/CodeGen/X86/vec_shuffle-2.ll b/test/CodeGen/X86/vec_shuffle-2.ll new file mode 100644 index 0000000..df78323 --- /dev/null +++ b/test/CodeGen/X86/vec_shuffle-2.ll @@ -0,0 +1,47 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 -o %t -f +; RUN: grep pshufhw %t | wc -l | grep 1 +; RUN: grep pshuflw %t | wc -l | grep 1 +; RUN: grep movhps %t | wc -l | grep 1 + +void %test1(<2 x long>* %res, <2 x long>* %A) { + %tmp = load <2 x long>* %A + %tmp = cast <2 x long> %tmp to <8 x short> + %tmp0 = extractelement <8 x short> %tmp, uint 0 + %tmp1 = extractelement <8 x short> %tmp, uint 1 + %tmp2 = extractelement <8 x short> %tmp, uint 2 + %tmp3 = extractelement <8 x short> %tmp, uint 3 + %tmp4 = extractelement <8 x short> %tmp, uint 4 + %tmp5 = extractelement <8 x short> %tmp, uint 5 + %tmp6 = extractelement <8 x short> %tmp, uint 6 + %tmp7 = extractelement <8 x short> %tmp, uint 7 + %tmp8 = insertelement <8 x short> undef, short %tmp2, uint 0 + %tmp9 = insertelement <8 x short> %tmp8, short %tmp1, uint 1 + %tmp10 = insertelement <8 x short> %tmp9, short %tmp0, uint 2 + %tmp11 = insertelement <8 x short> %tmp10, short %tmp3, uint 3 + %tmp12 = insertelement <8 x short> %tmp11, short %tmp6, uint 4 + %tmp13 = insertelement <8 x short> %tmp12, short %tmp5, uint 5 + %tmp14 = insertelement <8 x short> %tmp13, short %tmp4, uint 6 + %tmp15 = insertelement <8 x short> %tmp14, short %tmp7, uint 7 + %tmp15 = cast <8 x short> %tmp15 to <2 x long> + store <2 x long> %tmp15, <2 x long>* %res + ret void +} + +void %test2(<4 x float>* %r, <2 x int>* %A) { + %tmp = load <4 x float>* %r + %tmp = cast <2 x int>* %A to double* + %tmp = load double* %tmp + %tmp = insertelement <2 x double> undef, double %tmp, uint 0 + %tmp5 = insertelement <2 x double> %tmp, double undef, uint 1 + %tmp6 = cast <2 x double> %tmp5 to <4 x float> + %tmp = extractelement <4 x float> %tmp, uint 0 + %tmp7 = extractelement <4 x float> %tmp, uint 1 + %tmp8 = extractelement <4 x float> %tmp6, uint 0 + %tmp9 = extractelement <4 x float> %tmp6, uint 1 + %tmp10 = insertelement <4 x float> undef, float %tmp, uint 0 + %tmp11 = insertelement <4 x float> %tmp10, float %tmp7, uint 1 + %tmp12 = insertelement <4 x float> %tmp11, float %tmp8, uint 2 + %tmp13 = insertelement <4 x float> %tmp12, float %tmp9, uint 3 + store <4 x float> %tmp13, <4 x float>* %r + ret void +} diff --git a/test/CodeGen/X86/vec_shuffle-3.ll b/test/CodeGen/X86/vec_shuffle-3.ll new file mode 100644 index 0000000..a0ce0f0 --- /dev/null +++ b/test/CodeGen/X86/vec_shuffle-3.ll @@ -0,0 +1,20 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 -o %t -f +; RUN: grep movlhps %t | wc -l | grep 1 +; RUN: grep movhlps %t | wc -l | grep 1 + +<4 x float> %test1(<4 x float>* %x, <4 x float>* %y) { + %tmp = load <4 x float>* %y + %tmp5 = load <4 x float>* %x + %tmp9 = add <4 x float> %tmp5, %tmp + %tmp21 = sub <4 x float> %tmp5, %tmp + %tmp27 = shufflevector <4 x float> %tmp9, <4 x float> %tmp21, <4 x uint> < uint 0, uint 1, uint 4, uint 5 > + ret <4 x float> %tmp27 +} + +<4 x float> %movhl(<4 x float>* %x, <4 x float>* %y) { +entry: + %tmp = load <4 x float>* %y + %tmp3 = load <4 x float>* %x + %tmp4 = shufflevector <4 x float> %tmp3, <4 x float> %tmp, <4 x uint> < uint 2, uint 3, uint 6, uint 7 > + ret <4 x float> %tmp4 +} diff --git a/test/CodeGen/X86/vec_shuffle-4.ll b/test/CodeGen/X86/vec_shuffle-4.ll new file mode 100644 index 0000000..5bb30bf --- /dev/null +++ b/test/CodeGen/X86/vec_shuffle-4.ll @@ -0,0 +1,10 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 > %t +; RUN: grep shuf %t | wc -l | grep 2 +; RUN: not grep unpck %t +void %test(<4 x float>* %res, <4 x float>* %A, <4 x float>* %B, <4 x float>* %C) { + %tmp3 = load <4 x float>* %B + %tmp5 = load <4 x float>* %C + %tmp11 = shufflevector <4 x float> %tmp3, <4 x float> %tmp5, <4 x uint> < uint 1, uint 4, uint 1, uint 5 > + store <4 x float> %tmp11, <4 x float>* %res + ret void +} diff --git a/test/CodeGen/X86/vec_shuffle-5.ll b/test/CodeGen/X86/vec_shuffle-5.ll new file mode 100644 index 0000000..e980a12 --- /dev/null +++ b/test/CodeGen/X86/vec_shuffle-5.ll @@ -0,0 +1,13 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 -o %t -f +; RUN: grep movhlps %t | wc -l | grep 1 +; RUN: grep shufps %t | wc -l | grep 1 + +void %test() { + %tmp1 = load <4 x float>* null + %tmp2 = shufflevector <4 x float> %tmp1, <4 x float> < float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00 >, <4 x uint> < uint 0, uint 1, uint 6, uint 7 > + %tmp3 = shufflevector <4 x float> %tmp1, <4 x float> zeroinitializer, <4 x uint> < uint 2, uint 3, uint 6, uint 7 > + %tmp4 = add <4 x float> %tmp2, %tmp3 + store <4 x float> %tmp4, <4 x float>* null + ret void +} + diff --git a/test/CodeGen/X86/vec_shuffle-6.ll b/test/CodeGen/X86/vec_shuffle-6.ll new file mode 100644 index 0000000..661fe09 --- /dev/null +++ b/test/CodeGen/X86/vec_shuffle-6.ll @@ -0,0 +1,43 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 -o %t -f +; RUN: grep movapd %t | wc -l | grep 1 +; RUN: grep movaps %t | wc -l | grep 1 +; RUN: grep movups %t | wc -l | grep 2 + +target triple = "i686-apple-darwin" + +%x = global [4 x int] [ int 1, int 2, int 3, int 4 ] + +<2 x long> %test1() { + %tmp = load int* getelementptr ([4 x int]* %x, int 0, int 0) + %tmp3 = load int* getelementptr ([4 x int]* %x, int 0, int 1) + %tmp5 = load int* getelementptr ([4 x int]* %x, int 0, int 2) + %tmp7 = load int* getelementptr ([4 x int]* %x, int 0, int 3) + %tmp = insertelement <4 x int> undef, int %tmp, uint 0 + %tmp13 = insertelement <4 x int> %tmp, int %tmp3, uint 1 + %tmp14 = insertelement <4 x int> %tmp13, int %tmp5, uint 2 + %tmp15 = insertelement <4 x int> %tmp14, int %tmp7, uint 3 + %tmp16 = cast <4 x int> %tmp15 to <2 x long> + ret <2 x long> %tmp16 +} + +<4 x float> %test2(int %dummy, float %a, float %b, float %c, float %d) { + %tmp = insertelement <4 x float> undef, float %a, uint 0 + %tmp11 = insertelement <4 x float> %tmp, float %b, uint 1 + %tmp12 = insertelement <4 x float> %tmp11, float %c, uint 2 + %tmp13 = insertelement <4 x float> %tmp12, float %d, uint 3 + ret <4 x float> %tmp13 +} + +<4 x float> %test3(float %a, float %b, float %c, float %d) { + %tmp = insertelement <4 x float> undef, float %a, uint 0 + %tmp11 = insertelement <4 x float> %tmp, float %b, uint 1 + %tmp12 = insertelement <4 x float> %tmp11, float %c, uint 2 + %tmp13 = insertelement <4 x float> %tmp12, float %d, uint 3 + ret <4 x float> %tmp13 +} + +<2 x double> %test4(double %a, double %b) { + %tmp = insertelement <2 x double> undef, double %a, uint 0 + %tmp7 = insertelement <2 x double> %tmp, double %b, uint 1 + ret <2 x double> %tmp7 +} diff --git a/test/CodeGen/X86/vec_shuffle-7.ll b/test/CodeGen/X86/vec_shuffle-7.ll new file mode 100644 index 0000000..ae64c28 --- /dev/null +++ b/test/CodeGen/X86/vec_shuffle-7.ll @@ -0,0 +1,10 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 -o %t -f +; RUN: grep xorps %t | wc -l | grep 1 +; RUN: not grep shufps %t + +void %test() { + cast <4 x int> zeroinitializer to <4 x float> + shufflevector <4 x float> %0, <4 x float> zeroinitializer, <4 x uint> zeroinitializer + store <4 x float> %1, <4 x float>* null + unreachable +} diff --git a/test/CodeGen/X86/vec_shuffle-8.ll b/test/CodeGen/X86/vec_shuffle-8.ll new file mode 100644 index 0000000..4daf73e --- /dev/null +++ b/test/CodeGen/X86/vec_shuffle-8.ll @@ -0,0 +1,9 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | \ +; RUN: not grep shufps + +void %test(<4 x float>* %res, <4 x float>* %A) { + %tmp1 = load <4 x float>* %A + %tmp2 = shufflevector <4 x float> %tmp1, <4 x float> undef, <4 x uint> < uint 0, uint 5, uint 6, uint 7 > + store <4 x float> %tmp2, <4 x float>* %res + ret void +} diff --git a/test/CodeGen/X86/vec_shuffle-9.ll b/test/CodeGen/X86/vec_shuffle-9.ll new file mode 100644 index 0000000..e83e298 --- /dev/null +++ b/test/CodeGen/X86/vec_shuffle-9.ll @@ -0,0 +1,20 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 -o %t -f +; RUN: grep punpck %t | wc -l | grep 2 +; RUN: not grep pextrw %t + +<4 x int> %test(sbyte** %ptr) { +entry: + %tmp = load sbyte** %ptr + %tmp = cast sbyte* %tmp to float* + %tmp = load float* %tmp + %tmp = insertelement <4 x float> undef, float %tmp, uint 0 + %tmp9 = insertelement <4 x float> %tmp, float 0.000000e+00, uint 1 + %tmp10 = insertelement <4 x float> %tmp9, float 0.000000e+00, uint 2 + %tmp11 = insertelement <4 x float> %tmp10, float 0.000000e+00, uint 3 + %tmp21 = cast <4 x float> %tmp11 to <16 x sbyte> + %tmp22 = shufflevector <16 x sbyte> %tmp21, <16 x sbyte> zeroinitializer, <16 x uint> < uint 0, uint 16, uint 1, uint 17, uint 2, uint 18, uint 3, uint 19, uint 4, uint 20, uint 5, uint 21, uint 6, uint 22, uint 7, uint 23 > + %tmp31 = cast <16 x sbyte> %tmp22 to <8 x short> + %tmp = shufflevector <8 x short> zeroinitializer, <8 x short> %tmp31, <8 x uint> < uint 0, uint 8, uint 1, uint 9, uint 2, uint 10, uint 3, uint 11 > + %tmp36 = cast <8 x short> %tmp to <4 x int> + ret <4 x int> %tmp36 +} diff --git a/test/CodeGen/X86/vec_shuffle.ll b/test/CodeGen/X86/vec_shuffle.ll new file mode 100644 index 0000000..d06efa5 --- /dev/null +++ b/test/CodeGen/X86/vec_shuffle.ll @@ -0,0 +1,44 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 -o %t -f +; RUN: grep shufp %t | wc -l | grep 1 +; RUN: grep movups %t | wc -l | grep 1 +; RUN: grep pshufhw %t | wc -l | grep 1 + +void %test_v4sf(<4 x float>* %P, float %X, float %Y) { + %tmp = insertelement <4 x float> zeroinitializer, float %X, uint 0 + %tmp2 = insertelement <4 x float> %tmp, float %X, uint 1 + %tmp4 = insertelement <4 x float> %tmp2, float %Y, uint 2 + %tmp6 = insertelement <4 x float> %tmp4, float %Y, uint 3 + store <4 x float> %tmp6, <4 x float>* %P + ret void +} + +void %test_v2sd(<2 x double>* %P, double %X, double %Y) { + %tmp = insertelement <2 x double> zeroinitializer, double %X, uint 0 + %tmp2 = insertelement <2 x double> %tmp, double %Y, uint 1 + store <2 x double> %tmp2, <2 x double>* %P + ret void +} + +void %test_v8i16(<2 x long>* %res, <2 x long>* %A) { + %tmp = load <2 x long>* %A + %tmp = cast <2 x long> %tmp to <8 x short> + %tmp = extractelement <8 x short> %tmp, uint 0 + %tmp1 = extractelement <8 x short> %tmp, uint 1 + %tmp2 = extractelement <8 x short> %tmp, uint 2 + %tmp3 = extractelement <8 x short> %tmp, uint 3 + %tmp4 = extractelement <8 x short> %tmp, uint 6 + %tmp5 = extractelement <8 x short> %tmp, uint 5 + %tmp6 = extractelement <8 x short> %tmp, uint 4 + %tmp7 = extractelement <8 x short> %tmp, uint 7 + %tmp8 = insertelement <8 x short> undef, short %tmp, uint 0 + %tmp9 = insertelement <8 x short> %tmp8, short %tmp1, uint 1 + %tmp10 = insertelement <8 x short> %tmp9, short %tmp2, uint 2 + %tmp11 = insertelement <8 x short> %tmp10, short %tmp3, uint 3 + %tmp12 = insertelement <8 x short> %tmp11, short %tmp4, uint 4 + %tmp13 = insertelement <8 x short> %tmp12, short %tmp5, uint 5 + %tmp14 = insertelement <8 x short> %tmp13, short %tmp6, uint 6 + %tmp15 = insertelement <8 x short> %tmp14, short %tmp7, uint 7 + %tmp15 = cast <8 x short> %tmp15 to <2 x long> + store <2 x long> %tmp15, <2 x long>* %res + ret void +} diff --git a/test/CodeGen/X86/vec_splat-2.ll b/test/CodeGen/X86/vec_splat-2.ll new file mode 100644 index 0000000..a874500 --- /dev/null +++ b/test/CodeGen/X86/vec_splat-2.ll @@ -0,0 +1,26 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | grep pshufd | wc -l | grep 1 + +void %test(<2 x long>* %P, sbyte %x) { + %tmp = insertelement <16 x sbyte> zeroinitializer, sbyte %x, uint 0 ; <<16 x sbyte>> [#uses=1] + %tmp36 = insertelement <16 x sbyte> %tmp, sbyte %x, uint 1 + %tmp38 = insertelement <16 x sbyte> %tmp36, sbyte %x, uint 2 + %tmp40 = insertelement <16 x sbyte> %tmp38, sbyte %x, uint 3 + %tmp42 = insertelement <16 x sbyte> %tmp40, sbyte %x, uint 4 + %tmp44 = insertelement <16 x sbyte> %tmp42, sbyte %x, uint 5 + %tmp46 = insertelement <16 x sbyte> %tmp44, sbyte %x, uint 6 + %tmp48 = insertelement <16 x sbyte> %tmp46, sbyte %x, uint 7 + %tmp50 = insertelement <16 x sbyte> %tmp48, sbyte %x, uint 8 + %tmp52 = insertelement <16 x sbyte> %tmp50, sbyte %x, uint 9 + %tmp54 = insertelement <16 x sbyte> %tmp52, sbyte %x, uint 10 + %tmp56 = insertelement <16 x sbyte> %tmp54, sbyte %x, uint 11 + %tmp58 = insertelement <16 x sbyte> %tmp56, sbyte %x, uint 12 + %tmp60 = insertelement <16 x sbyte> %tmp58, sbyte %x, uint 13 + %tmp62 = insertelement <16 x sbyte> %tmp60, sbyte %x, uint 14 + %tmp64 = insertelement <16 x sbyte> %tmp62, sbyte %x, uint 15 + %tmp68 = load <2 x long>* %P + %tmp71 = cast <2 x long> %tmp68 to <16 x sbyte> + %tmp73 = add <16 x sbyte> %tmp71, %tmp64 + %tmp73 = cast <16 x sbyte> %tmp73 to <2 x long> + store <2 x long> %tmp73, <2 x long>* %P + ret void +} diff --git a/test/CodeGen/X86/vec_splat.ll b/test/CodeGen/X86/vec_splat.ll new file mode 100644 index 0000000..3d73a87 --- /dev/null +++ b/test/CodeGen/X86/vec_splat.ll @@ -0,0 +1,22 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | grep shufps +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse3 | grep movddup + +void %test_v4sf(<4 x float>* %P, <4 x float>* %Q, float %X) { + %tmp = insertelement <4 x float> zeroinitializer, float %X, uint 0 + %tmp2 = insertelement <4 x float> %tmp, float %X, uint 1 + %tmp4 = insertelement <4 x float> %tmp2, float %X, uint 2 + %tmp6 = insertelement <4 x float> %tmp4, float %X, uint 3 + %tmp8 = load <4 x float>* %Q + %tmp10 = mul <4 x float> %tmp8, %tmp6 + store <4 x float> %tmp10, <4 x float>* %P + ret void +} + +void %test_v2sd(<2 x double>* %P, <2 x double>* %Q, double %X) { + %tmp = insertelement <2 x double> zeroinitializer, double %X, uint 0 + %tmp2 = insertelement <2 x double> %tmp, double %X, uint 1 + %tmp4 = load <2 x double>* %Q + %tmp6 = mul <2 x double> %tmp4, %tmp2 + store <2 x double> %tmp6, <2 x double>* %P + ret void +} diff --git a/test/CodeGen/X86/vec_ss_load_fold.ll b/test/CodeGen/X86/vec_ss_load_fold.ll new file mode 100644 index 0000000..1c9f6f1 --- /dev/null +++ b/test/CodeGen/X86/vec_ss_load_fold.ll @@ -0,0 +1,47 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse,+sse2 -o %t -f +; RUN: grep minss %t | grep CPI | wc -l | grep 2 +; RUN: grep CPI %t | not grep movss + +target endian = little +target pointersize = 32 +target triple = "i686-apple-darwin8.7.2" + +implementation ; Functions: + +ushort %test1(float %f) { + %tmp = insertelement <4 x float> undef, float %f, uint 0 ; <<4 x float>> [#uses=1] + %tmp10 = insertelement <4 x float> %tmp, float 0.000000e+00, uint 1 ; <<4 x float>> [#uses=1] + %tmp11 = insertelement <4 x float> %tmp10, float 0.000000e+00, uint 2 ; <<4 x float>> [#uses=1] + %tmp12 = insertelement <4 x float> %tmp11, float 0.000000e+00, uint 3 ; <<4 x float>> [#uses=1] + %tmp28 = tail call <4 x float> %llvm.x86.sse.sub.ss( <4 x float> %tmp12, <4 x float> < float 1.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 > ) ; <<4 x float>> [#uses=1] + %tmp37 = tail call <4 x float> %llvm.x86.sse.mul.ss( <4 x float> %tmp28, <4 x float> < float 5.000000e-01, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 > ) ; <<4 x float>> [#uses=1] + %tmp48 = tail call <4 x float> %llvm.x86.sse.min.ss( <4 x float> %tmp37, <4 x float> < float 6.553500e+04, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 > ) ; <<4 x float>> [#uses=1] + %tmp59 = tail call <4 x float> %llvm.x86.sse.max.ss( <4 x float> %tmp48, <4 x float> zeroinitializer ) ; <<4 x float>> [#uses=1] + %tmp = tail call int %llvm.x86.sse.cvttss2si( <4 x float> %tmp59 ) ; <int> [#uses=1] + %tmp69 = cast int %tmp to ushort ; <ushort> [#uses=1] + ret ushort %tmp69 +} + +ushort %test2(float %f) { + %tmp28 = sub float %f, 1.000000e+00 ; <float> [#uses=1] + %tmp37 = mul float %tmp28, 5.000000e-01 ; <float> [#uses=1] + %tmp375 = insertelement <4 x float> undef, float %tmp37, uint 0 ; <<4 x float>> [#uses=1] + %tmp48 = tail call <4 x float> %llvm.x86.sse.min.ss( <4 x float> %tmp375, <4 x float> < float 6.553500e+04, float undef, float undef, float undef > ) ; <<4 x float>> [#uses=1] + %tmp59 = tail call <4 x float> %llvm.x86.sse.max.ss( <4 x float> %tmp48, <4 x float> < float 0.000000e+00, float undef, float undef, float undef > ) ; <<4 x float>> [#uses=1] + %tmp = tail call int %llvm.x86.sse.cvttss2si( <4 x float> %tmp59 ) ; <int> [#uses=1] + %tmp69 = cast int %tmp to ushort ; <ushort> [#uses=1] + ret ushort %tmp69 +} + + +declare <4 x float> %llvm.x86.sse.sub.ss(<4 x float>, <4 x float>) + +declare <4 x float> %llvm.x86.sse.mul.ss(<4 x float>, <4 x float>) + +declare <4 x float> %llvm.x86.sse.min.ss(<4 x float>, <4 x float>) + +declare <4 x float> %llvm.x86.sse.max.ss(<4 x float>, <4 x float>) + +declare int %llvm.x86.sse.cvttss2si(<4 x float>) + + diff --git a/test/CodeGen/X86/vec_zero.ll b/test/CodeGen/X86/vec_zero.ll new file mode 100644 index 0000000..f976fc1 --- /dev/null +++ b/test/CodeGen/X86/vec_zero.ll @@ -0,0 +1,15 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | grep xorps | wc -l | grep 2 + +void %foo(<4 x float> *%P) { + %T = load <4 x float> * %P + %S = add <4 x float> zeroinitializer, %T + store <4 x float> %S, <4 x float>* %P + ret void +} + +void %bar(<4 x int> *%P) { + %T = load <4 x int> * %P + %S = add <4 x int> zeroinitializer, %T + store <4 x int> %S, <4 x int>* %P + ret void +} diff --git a/test/CodeGen/X86/vector.ll b/test/CodeGen/X86/vector.ll new file mode 100644 index 0000000..348d4d6 --- /dev/null +++ b/test/CodeGen/X86/vector.ll @@ -0,0 +1,157 @@ +; Test that vectors are scalarized/lowered correctly. +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mcpu=i386 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mcpu=yonah + +%f1 = type <1 x float> +%f2 = type <2 x float> +%f4 = type <4 x float> +%i4 = type <4 x int> +%f8 = type <8 x float> +%d8 = type <8 x double> + +implementation + +;;; TEST HANDLING OF VARIOUS VECTOR SIZES + +void %test_f1(%f1 *%P, %f1* %Q, %f1 *%S) { + %p = load %f1 *%P + %q = load %f1* %Q + %R = add %f1 %p, %q + store %f1 %R, %f1 *%S + ret void +} + +void %test_f2(%f2 *%P, %f2* %Q, %f2 *%S) { + %p = load %f2* %P + %q = load %f2* %Q + %R = add %f2 %p, %q + store %f2 %R, %f2 *%S + ret void +} + +void %test_f4(%f4 *%P, %f4* %Q, %f4 *%S) { + %p = load %f4* %P + %q = load %f4* %Q + %R = add %f4 %p, %q + store %f4 %R, %f4 *%S + ret void +} + +void %test_f8(%f8 *%P, %f8* %Q, %f8 *%S) { + %p = load %f8* %P + %q = load %f8* %Q + %R = add %f8 %p, %q + store %f8 %R, %f8 *%S + ret void +} + +void %test_fmul(%f8 *%P, %f8* %Q, %f8 *%S) { + %p = load %f8* %P + %q = load %f8* %Q + %R = mul %f8 %p, %q + store %f8 %R, %f8 *%S + ret void +} + +void %test_div(%f8 *%P, %f8* %Q, %f8 *%S) { + %p = load %f8* %P + %q = load %f8* %Q + %R = div %f8 %p, %q + store %f8 %R, %f8 *%S + ret void +} + +;;; TEST VECTOR CONSTRUCTS + +void %test_cst(%f4 *%P, %f4 *%S) { + %p = load %f4* %P + %R = add %f4 %p, <float 0.1, float 1.0, float 2.0, float 4.5> + store %f4 %R, %f4 *%S + ret void +} + +void %test_zero(%f4 *%P, %f4 *%S) { + %p = load %f4* %P + %R = add %f4 %p, zeroinitializer + store %f4 %R, %f4 *%S + ret void +} + +void %test_undef(%f4 *%P, %f4 *%S) { + %p = load %f4* %P + %R = add %f4 %p, undef + store %f4 %R, %f4 *%S + ret void +} + +void %test_constant_insert(%f4 *%S) { + %R = insertelement %f4 zeroinitializer, float 10.0, uint 0 + store %f4 %R, %f4 *%S + ret void +} + +void %test_variable_buildvector(float %F, %f4 *%S) { + %R = insertelement %f4 zeroinitializer, float %F, uint 0 + store %f4 %R, %f4 *%S + ret void +} + +void %test_scalar_to_vector(float %F, %f4 *%S) { + %R = insertelement %f4 undef, float %F, uint 0 ;; R = scalar_to_vector F + store %f4 %R, %f4 *%S + ret void +} + +float %test_extract_elt(%f8 *%P) { + %p = load %f8* %P + %R = extractelement %f8 %p, uint 3 + ret float %R +} + +double %test_extract_elt2(%d8 *%P) { + %p = load %d8* %P + %R = extractelement %d8 %p, uint 3 + ret double %R +} + +void %test_cast_1(<4 x float>* %b, <4 x int>* %a) { + %tmp = load <4 x float>* %b + %tmp2 = add <4 x float> %tmp, <float 1.0, float 2.0, float 3.0, float 4.0> + %tmp3 = cast <4 x float> %tmp2 to <4 x int> + %tmp4 = add <4 x int> %tmp3, <int 1, int 2, int 3, int 4> + store <4 x int> %tmp4, <4 x int>* %a + ret void +} + +void %test_cast_2(<8 x float>* %a, <8 x int>* %b) { + %T = load <8 x float>* %a + %T2 = cast <8 x float> %T to <8 x int> + store <8 x int> %T2, <8 x int>* %b + ret void +} + + +;;; TEST IMPORTANT IDIOMS + +void %splat(%f4* %P, %f4* %Q, float %X) { + %tmp = insertelement %f4 undef, float %X, uint 0 + %tmp2 = insertelement %f4 %tmp, float %X, uint 1 + %tmp4 = insertelement %f4 %tmp2, float %X, uint 2 + %tmp6 = insertelement %f4 %tmp4, float %X, uint 3 + %q = load %f4* %Q + %R = add %f4 %q, %tmp6 + store %f4 %R, %f4* %P + ret void +} + +void %splat_i4(%i4* %P, %i4* %Q, int %X) { + %tmp = insertelement %i4 undef, int %X, uint 0 + %tmp2 = insertelement %i4 %tmp, int %X, uint 1 + %tmp4 = insertelement %i4 %tmp2, int %X, uint 2 + %tmp6 = insertelement %i4 %tmp4, int %X, uint 3 + %q = load %i4* %Q + %R = add %i4 %q, %tmp6 + store %i4 %R, %i4* %P + ret void +} + diff --git a/test/CodeGen/X86/weak.ll b/test/CodeGen/X86/weak.ll new file mode 100644 index 0000000..1397b19 --- /dev/null +++ b/test/CodeGen/X86/weak.ll @@ -0,0 +1,3 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 +%a = extern_weak global int +%b = global int* %a diff --git a/test/CodeGen/X86/x86-64-arg.ll b/test/CodeGen/X86/x86-64-arg.ll new file mode 100644 index 0000000..f4fe2f4 --- /dev/null +++ b/test/CodeGen/X86/x86-64-arg.ll @@ -0,0 +1,15 @@ +; RUN: llvm-as < %s | llc | grep {movl %edi, %eax} +; The input value is already sign extended, don't re-extend it. +; This testcase corresponds to: +; int test(short X) { return (int)X; } + +target datalayout = "e-p:64:64" +target triple = "x86_64-apple-darwin8" + + +define i32 @test(i16 sext %X) { +entry: + %tmp12 = sext i16 %X to i32 ; <i32> [#uses=1] + ret i32 %tmp12 +} + diff --git a/test/CodeGen/X86/x86-64-asm.ll b/test/CodeGen/X86/x86-64-asm.ll new file mode 100644 index 0000000..0814684 --- /dev/null +++ b/test/CodeGen/X86/x86-64-asm.ll @@ -0,0 +1,15 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc +; PR1029 + +target datalayout = "e-p:64:64" +target endian = little +target pointersize = 64 +target triple = "x86_64-unknown-linux-gnu" + +implementation ; Functions: + +void %frame_dummy() { +entry: + %tmp1 = tail call void (sbyte*)* (void (sbyte*)*)* asm "", "=r,0,~{dirflag},~{fpsr},~{flags}"( void (sbyte*)* null ) ; <void (sbyte*)*> [#uses=0] + ret void +} diff --git a/test/CodeGen/X86/x86-64-mem.ll b/test/CodeGen/X86/x86-64-mem.ll new file mode 100644 index 0000000..8e11976 --- /dev/null +++ b/test/CodeGen/X86/x86-64-mem.ll @@ -0,0 +1,38 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=x86_64-apple-darwin -o %t1 -f +; RUN: grep GOTPCREL %t1 | wc -l | grep 4 +; RUN: grep rip %t1 | wc -l | grep 6 +; RUN: grep movq %t1 | wc -l | grep 6 +; RUN: grep leaq %t1 | wc -l | grep 1 +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -mtriple=x86_64-apple-darwin -relocation-model=static -o %t2 -f +; RUN: grep rip %t2 | wc -l | grep 4 +; RUN: grep movl %t2 | wc -l | grep 2 +; RUN: grep movq %t2 | wc -l | grep 2 + +%ptr = external global int* +%src = external global [0 x int] +%dst = external global [0 x int] +%lptr = internal global int* null +%ldst = internal global [500 x int] zeroinitializer, align 32 +%lsrc = internal global [500 x int] zeroinitializer, align 32 +%bsrc = internal global [500000 x int] zeroinitializer, align 32 +%bdst = internal global [500000 x int] zeroinitializer, align 32 + +void %test1() { + %tmp = load int* getelementptr ([0 x int]* %src, int 0, int 0) + store int %tmp, int* getelementptr ([0 x int]* %dst, int 0, int 0) + ret void +} + +void %test2() { + store int* getelementptr ([0 x int]* %dst, int 0, int 0), int** %ptr + ret void +} + +void %test3() { + store int* getelementptr ([500 x int]* %ldst, int 0, int 0), int** %lptr + br label %return + +return: + ret void +} diff --git a/test/CodeGen/X86/x86-64-shortint.ll b/test/CodeGen/X86/x86-64-shortint.ll new file mode 100644 index 0000000..d136450 --- /dev/null +++ b/test/CodeGen/X86/x86-64-shortint.ll @@ -0,0 +1,12 @@ +; RUN: llvm-as < %s | llc | grep movswl + +target datalayout = "e-p:64:64" +target triple = "x86_64-apple-darwin8" + + +define void @bar(i16 zext %A) { + tail call void @foo( i16 %A sext ) + ret void +} +declare void @foo(i16 sext ) + diff --git a/test/CodeGen/X86/xmm-r64.ll b/test/CodeGen/X86/xmm-r64.ll new file mode 100644 index 0000000..596e5c9 --- /dev/null +++ b/test/CodeGen/X86/xmm-r64.ll @@ -0,0 +1,11 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86-64 + +<4 x int> %test() { + %tmp1039 = call <4 x int> %llvm.x86.sse2.psll.d( <4 x int> zeroinitializer, <4 x int> zeroinitializer ) ; <<4 x int>> [#uses=1] + %tmp1040 = cast <4 x int> %tmp1039 to <2 x long> ; <<2 x long>> [#uses=1] + %tmp1048 = add <2 x long> %tmp1040, zeroinitializer ; <<2 x long>> [#uses=1] + %tmp1048 = cast <2 x long> %tmp1048 to <4 x int> ; <<4 x int>> [#uses=1] + ret <4 x int> %tmp1048 +} + +declare <4 x int> %llvm.x86.sse2.psll.d(<4 x int>, <4 x int>) |