diff options
Diffstat (limited to 'test/MC')
77 files changed, 2004 insertions, 523 deletions
diff --git a/test/MC/ARM/arm-aliases.s b/test/MC/ARM/arm-aliases.s new file mode 100644 index 0000000..d4ea0df --- /dev/null +++ b/test/MC/ARM/arm-aliases.s @@ -0,0 +1,17 @@ +@ RUN: llvm-mc -triple=armv7-apple-darwin -show-encoding < %s | FileCheck %s + .syntax unified + +@ Shift-by-zero should canonicalize to no shift at all (lsl #0 encoding) + add r1, r2, r3, lsl #0 + sub r1, r2, r3, ror #0 + eor r1, r2, r3, lsr #0 + orr r1, r2, r3, asr #0 + and r1, r2, r3, ror #0 + bic r1, r2, r3, lsl #0 + +@ CHECK: add r1, r2, r3 @ encoding: [0x03,0x10,0x82,0xe0] +@ CHECK: sub r1, r2, r3 @ encoding: [0x03,0x10,0x42,0xe0] +@ CHECK: eor r1, r2, r3 @ encoding: [0x03,0x10,0x22,0xe0] +@ CHECK: orr r1, r2, r3 @ encoding: [0x03,0x10,0x82,0xe1] +@ CHECK: and r1, r2, r3 @ encoding: [0x03,0x10,0x02,0xe0] +@ CHECK: bic r1, r2, r3 @ encoding: [0x03,0x10,0xc2,0xe1] diff --git a/test/MC/ARM/arm-it-block.s b/test/MC/ARM/arm-it-block.s new file mode 100644 index 0000000..e5e5491 --- /dev/null +++ b/test/MC/ARM/arm-it-block.s @@ -0,0 +1,11 @@ +@ RUN: llvm-mc -triple=armv7-apple-darwin -show-encoding < %s | FileCheck %s + .syntax unified + .globl _func + +_func: +@ CHECK: _func: + it eq + moveq r2, r3 +@ 'it' is parsed but not encoded. +@ CHECK-NOT: it +@ CHECK: moveq r2, r3 @ encoding: [0x03,0x20,0xa0,0x01] diff --git a/test/MC/ARM/arm-memory-instructions.s b/test/MC/ARM/arm-memory-instructions.s index 783ac28..d8d9130 100644 --- a/test/MC/ARM/arm-memory-instructions.s +++ b/test/MC/ARM/arm-memory-instructions.s @@ -130,8 +130,13 @@ _func: @------------------------------------------------------------------------------ -@ FIXME: LDRD (label) +@ LDRD (label) @------------------------------------------------------------------------------ + ldrd r2, r3, Lbaz +Lbaz: .quad 0 + +@ CHECK: ldrd r2, r3, Lbaz @ encoding: [0xd0'A',0x20'A',0x4f'A',0xe1'A'] + @------------------------------------------------------------------------------ @ LDRD (register) diff --git a/test/MC/ARM/arm_fixups.s b/test/MC/ARM/arm_fixups.s index aba0cd8..2f34748 100644 --- a/test/MC/ARM/arm_fixups.s +++ b/test/MC/ARM/arm_fixups.s @@ -3,7 +3,7 @@ bl _printf @ CHECK: bl _printf @ encoding: [A,A,A,0xeb] -@ CHECK: @ fixup A - offset: 0, value: _printf, kind: fixup_arm_uncondbranch +@ CHECK: @ fixup A - offset: 0, value: _printf, kind: fixup_arm_bl mov r9, :lower16:(_foo) movw r9, :lower16:(_foo) diff --git a/test/MC/ARM/basic-arm-instructions.s b/test/MC/ARM/basic-arm-instructions.s index 080bc6f..4ae1ac7 100644 --- a/test/MC/ARM/basic-arm-instructions.s +++ b/test/MC/ARM/basic-arm-instructions.s @@ -388,9 +388,9 @@ Lforward: blx #16212288 @ CHECK: bl _bar @ encoding: [A,A,A,0xeb] -@ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_uncondbranch +@ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_bl @ CHECK: blx _bar @ encoding: [A,A,A,0xfa] - @ fixup A - offset: 0, value: _bar, kind: fixup_arm_uncondbranch + @ fixup A - offset: 0, value: _bar, kind: fixup_arm_blx @ CHECK: blls #28634268 @ encoding: [0x27,0x3b,0x6d,0x9b] @ CHECK: blx #32424576 @ encoding: [0xa0,0xb0,0x7b,0xfa] @ CHECK: blx #16212288 @ encoding: [0x50,0xd8,0x3d,0xfa] @@ -904,11 +904,28 @@ Lforward: movs r2, r3 moveq r2, r3 movseq r2, r3 + mov r12, r8, lsl #(2 - 2) + lsl r2, r3, #(2 - 2) + mov r12, r8, lsr #(2 - 2) + lsr r2, r3, #(2 - 2) + mov r12, r8, asr #(2 - 2) + asr r2, r3, #(2 - 2) + mov r12, r8, ror #(2 - 2) + ror r2, r3, #(2 - 2) @ CHECK: mov r2, r3 @ encoding: [0x03,0x20,0xa0,0xe1] @ CHECK: movs r2, r3 @ encoding: [0x03,0x20,0xb0,0xe1] @ CHECK: moveq r2, r3 @ encoding: [0x03,0x20,0xa0,0x01] @ CHECK: movseq r2, r3 @ encoding: [0x03,0x20,0xb0,0x01] +@ CHECK: mov r12, r8 @ encoding: [0x08,0xc0,0xa0,0xe1] +@ CHECK: mov r2, r3 @ encoding: [0x03,0x20,0xa0,0xe1] +@ CHECK: mov r12, r8 @ encoding: [0x08,0xc0,0xa0,0xe1] +@ CHECK: mov r2, r3 @ encoding: [0x03,0x20,0xa0,0xe1] +@ CHECK: mov r12, r8 @ encoding: [0x08,0xc0,0xa0,0xe1] +@ CHECK: mov r2, r3 @ encoding: [0x03,0x20,0xa0,0xe1] +@ CHECK: mov r12, r8 @ encoding: [0x08,0xc0,0xa0,0xe1] +@ CHECK: mov r2, r3 @ encoding: [0x03,0x20,0xa0,0xe1] + @------------------------------------------------------------------------------ @ MOVT diff --git a/test/MC/ARM/basic-thumb2-instructions.s b/test/MC/ARM/basic-thumb2-instructions.s index be640f0..78311af 100644 --- a/test/MC/ARM/basic-thumb2-instructions.s +++ b/test/MC/ARM/basic-thumb2-instructions.s @@ -1155,11 +1155,37 @@ _func: mov r6, r2, lsr #16 movs r6, r2, asr #32 movs r6, r2, ror #5 + movs r4, r4, lsl r5 + movs r4, r4, lsr r5 + movs r4, r4, asr r5 + movs r4, r4, ror r5 + mov r4, r4, lsl r5 + movs r4, r4, ror r8 + movs r4, r5, lsr r6 + itttt eq + moveq r4, r4, lsl r5 + moveq r4, r4, lsr r5 + moveq r4, r4, asr r5 + moveq r4, r4, ror r5 + mov r4, r4, rrx @ CHECK: lsl.w r6, r2, #16 @ encoding: [0x4f,0xea,0x02,0x46] @ CHECK: lsr.w r6, r2, #16 @ encoding: [0x4f,0xea,0x12,0x46] @ CHECK: asrs r6, r2, #32 @ encoding: [0x16,0x10] @ CHECK: rors.w r6, r2, #5 @ encoding: [0x5f,0xea,0x72,0x16] +@ CHECK: lsls r4, r5 @ encoding: [0xac,0x40] +@ CHECK: lsrs r4, r5 @ encoding: [0xec,0x40] +@ CHECK: asrs r4, r5 @ encoding: [0x2c,0x41] +@ CHECK: rors r4, r5 @ encoding: [0xec,0x41] +@ CHECK: lsl.w r4, r4, r5 @ encoding: [0x04,0xfa,0x05,0xf4] +@ CHECK: rors.w r4, r4, r8 @ encoding: [0x74,0xfa,0x08,0xf4] +@ CHECK: lsrs.w r4, r5, r6 @ encoding: [0x35,0xfa,0x06,0xf4] +@ CHECK: itttt eq @ encoding: [0x01,0xbf] +@ CHECK: lsleq r4, r5 @ encoding: [0xac,0x40] +@ CHECK: lsreq r4, r5 @ encoding: [0xec,0x40] +@ CHECK: asreq r4, r5 @ encoding: [0x2c,0x41] +@ CHECK: roreq r4, r5 @ encoding: [0xec,0x41] +@ CHECK: rrx r4, r4 @ encoding: [0x4f,0xea,0x34,0x04] @------------------------------------------------------------------------------ @@ -3297,3 +3323,30 @@ _func: @ CHECK: wfelt @ encoding: [0x20,0xbf] @ CHECK: wfige @ encoding: [0x30,0xbf] @ CHECK: yieldlt @ encoding: [0x10,0xbf] + + +@------------------------------------------------------------------------------ +@ Alternate syntax for LDR*(literal) encodings +@------------------------------------------------------------------------------ + ldr r11, [pc, #-22] + ldrb r11, [pc, #-22] + ldrh r11, [pc, #-22] + ldrsb r11, [pc, #-22] + ldrsh r11, [pc, #-22] + + ldr.w r11, [pc, #-22] + ldrb.w r11, [pc, #-22] + ldrh.w r11, [pc, #-22] + ldrsb.w r11, [pc, #-22] + ldrsh.w r11, [pc, #-22] + +@ CHECK: ldr.w r11, [pc, #-22] @ encoding: [0x5f,0xf8,0x16,0xb0] +@ CHECK: ldrb.w r11, [pc, #-22] @ encoding: [0x1f,0xf8,0x16,0xb0] +@ CHECK: ldrh.w r11, [pc, #-22] @ encoding: [0x3f,0xf8,0x16,0xb0] +@ CHECK: ldrsb.w r11, [pc, #-22] @ encoding: [0x1f,0xf9,0x16,0xb0] +@ CHECK: ldrsh.w r11, [pc, #-22] @ encoding: [0x3f,0xf9,0x16,0xb0] +@ CHECK: ldr.w r11, [pc, #-22] @ encoding: [0x5f,0xf8,0x16,0xb0] +@ CHECK: ldrb.w r11, [pc, #-22] @ encoding: [0x1f,0xf8,0x16,0xb0] +@ CHECK: ldrh.w r11, [pc, #-22] @ encoding: [0x3f,0xf8,0x16,0xb0] +@ CHECK: ldrsb.w r11, [pc, #-22] @ encoding: [0x1f,0xf9,0x16,0xb0] +@ CHECK: ldrsh.w r11, [pc, #-22] @ encoding: [0x3f,0xf9,0x16,0xb0] diff --git a/test/MC/ARM/cxx-global-constructor.ll b/test/MC/ARM/cxx-global-constructor.ll new file mode 100644 index 0000000..e06d2c7 --- /dev/null +++ b/test/MC/ARM/cxx-global-constructor.ll @@ -0,0 +1,12 @@ +; RUN: llc %s -mtriple=armv7-linux-gnueabi -relocation-model=pic \ +; RUN: -filetype=obj -o - | elf-dump --dump-section-data | FileCheck %s + + +@llvm.global_ctors = appending global [1 x { i32, void ()* }] [{ i32, void ()* } { i32 65535, void ()* @f }] + +define void @f() { + ret void +} + +; Check for a relocation of type R_ARM_TARGET1. +; CHECK: ('r_type', 0x26) diff --git a/test/MC/ARM/dg.exp b/test/MC/ARM/dg.exp deleted file mode 100644 index 055fa25..0000000 --- a/test/MC/ARM/dg.exp +++ /dev/null @@ -1,5 +0,0 @@ -load_lib llvm.exp - -if { [llvm_supports_target ARM] } { - RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp,s}]] -} diff --git a/test/MC/ARM/elf-thumbfunc-reloc.s b/test/MC/ARM/elf-thumbfunc-reloc.s new file mode 100644 index 0000000..4a311dd --- /dev/null +++ b/test/MC/ARM/elf-thumbfunc-reloc.s @@ -0,0 +1,23 @@ +@@ test st_value bit 0 of thumb function +@ RUN: llvm-mc %s -triple=arm-freebsd-eabi -filetype=obj -o - | \ +@ RUN: elf-dump | FileCheck %s + + + .syntax unified + .text + .globl f + .align 2 + .type f,%function + .code 16 + .thumb_func +f: + push {r7, lr} + mov r7, sp + bl g + pop {r7, pc} + +@@ make sure an R_ARM_THM_CALL relocation is generated for the call to g +@CHECK: ('_relocations', [ +@CHECK: (('r_offset', 0x00000004) +@CHECK-NEXT: ('r_sym', 0x{{[0-9a-fA-F]+}}) +@CHECK-NEXT: ('r_type', 0x0a) diff --git a/test/MC/ARM/lit.local.cfg b/test/MC/ARM/lit.local.cfg new file mode 100644 index 0000000..92d3ff3 --- /dev/null +++ b/test/MC/ARM/lit.local.cfg @@ -0,0 +1,13 @@ +config.suffixes = ['.ll', '.c', '.cpp', '.s'] + +def getRoot(config): + if not config.parent: + return config + return getRoot(config.parent) + +root = getRoot(config) + +targets = set(root.targets_to_build.split()) +if not 'ARM' in targets: + config.unsupported = True + diff --git a/test/MC/ARM/neon-minmax-encoding.s b/test/MC/ARM/neon-minmax-encoding.s index 2d0d8c9..b1eb258 100644 --- a/test/MC/ARM/neon-minmax-encoding.s +++ b/test/MC/ARM/neon-minmax-encoding.s @@ -1,58 +1,124 @@ @ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s -@ CHECK: vmin.s8 d16, d16, d17 @ encoding: [0xb1,0x06,0x40,0xf2] - vmin.s8 d16, d16, d17 -@ CHECK: vmin.s16 d16, d16, d17 @ encoding: [0xb1,0x06,0x50,0xf2] - vmin.s16 d16, d16, d17 -@ CHECK: vmin.s32 d16, d16, d17 @ encoding: [0xb1,0x06,0x60,0xf2] - vmin.s32 d16, d16, d17 -@ CHECK: vmin.u8 d16, d16, d17 @ encoding: [0xb1,0x06,0x40,0xf3] - vmin.u8 d16, d16, d17 -@ CHECK: vmin.u16 d16, d16, d17 @ encoding: [0xb1,0x06,0x50,0xf3] - vmin.u16 d16, d16, d17 -@ CHECK: vmin.u32 d16, d16, d17 @ encoding: [0xb1,0x06,0x60,0xf3] - vmin.u32 d16, d16, d17 -@ CHECK: vmin.f32 d16, d16, d17 @ encoding: [0xa1,0x0f,0x60,0xf2] - vmin.f32 d16, d16, d17 -@ CHECK: vmin.s8 q8, q8, q9 @ encoding: [0xf2,0x06,0x40,0xf2] - vmin.s8 q8, q8, q9 -@ CHECK: vmin.s16 q8, q8, q9 @ encoding: [0xf2,0x06,0x50,0xf2] - vmin.s16 q8, q8, q9 -@ CHECK: vmin.s32 q8, q8, q9 @ encoding: [0xf2,0x06,0x60,0xf2] - vmin.s32 q8, q8, q9 -@ CHECK: vmin.u8 q8, q8, q9 @ encoding: [0xf2,0x06,0x40,0xf3] - vmin.u8 q8, q8, q9 -@ CHECK: vmin.u16 q8, q8, q9 @ encoding: [0xf2,0x06,0x50,0xf3] - vmin.u16 q8, q8, q9 -@ CHECK: vmin.u32 q8, q8, q9 @ encoding: [0xf2,0x06,0x60,0xf3] - vmin.u32 q8, q8, q9 -@ CHECK: vmin.f32 q8, q8, q9 @ encoding: [0xe2,0x0f,0x60,0xf2] - vmin.f32 q8, q8, q9 -@ CHECK: vmax.s8 d16, d16, d17 @ encoding: [0xa1,0x06,0x40,0xf2] - vmax.s8 d16, d16, d17 -@ CHECK: vmax.s16 d16, d16, d17 @ encoding: [0xa1,0x06,0x50,0xf2] - vmax.s16 d16, d16, d17 -@ CHECK: vmax.s32 d16, d16, d17 @ encoding: [0xa1,0x06,0x60,0xf2] - vmax.s32 d16, d16, d17 -@ CHECK: vmax.u8 d16, d16, d17 @ encoding: [0xa1,0x06,0x40,0xf3] - vmax.u8 d16, d16, d17 -@ CHECK: vmax.u16 d16, d16, d17 @ encoding: [0xa1,0x06,0x50,0xf3] - vmax.u16 d16, d16, d17 -@ CHECK: vmax.u32 d16, d16, d17 @ encoding: [0xa1,0x06,0x60,0xf3] - vmax.u32 d16, d16, d17 -@ CHECK: vmax.f32 d16, d16, d17 @ encoding: [0xa1,0x0f,0x40,0xf2] - vmax.f32 d16, d16, d17 -@ CHECK: vmax.s8 q8, q8, q9 @ encoding: [0xe2,0x06,0x40,0xf2] - vmax.s8 q8, q8, q9 -@ CHECK: vmax.s16 q8, q8, q9 @ encoding: [0xe2,0x06,0x50,0xf2] - vmax.s16 q8, q8, q9 + vmax.s8 d1, d2, d3 + vmax.s16 d4, d5, d6 + vmax.s32 d7, d8, d9 + vmax.u8 d10, d11, d12 + vmax.u16 d13, d14, d15 + vmax.u32 d16, d17, d18 + vmax.f32 d19, d20, d21 + + vmax.s8 d2, d3 + vmax.s16 d5, d6 + vmax.s32 d8, d9 + vmax.u8 d11, d12 + vmax.u16 d14, d15 + vmax.u32 d17, d18 + vmax.f32 d20, d21 + + vmax.s8 q1, q2, q3 + vmax.s16 q4, q5, q6 + vmax.s32 q7, q8, q9 + vmax.u8 q10, q11, q12 + vmax.u16 q13, q14, q15 + vmax.u32 q6, q7, q8 + vmax.f32 q9, q5, q1 + + vmax.s8 q2, q3 + vmax.s16 q5, q6 + vmax.s32 q8, q9 + vmax.u8 q11, q2 + vmax.u16 q4, q5 + vmax.u32 q7, q8 + vmax.f32 q2, q1 + +@ CHECK: vmax.s8 d1, d2, d3 @ encoding: [0x03,0x16,0x02,0xf2] +@ CHECK: vmax.s16 d4, d5, d6 @ encoding: [0x06,0x46,0x15,0xf2] +@ CHECK: vmax.s32 d7, d8, d9 @ encoding: [0x09,0x76,0x28,0xf2] +@ CHECK: vmax.u8 d10, d11, d12 @ encoding: [0x0c,0xa6,0x0b,0xf3] +@ CHECK: vmax.u16 d13, d14, d15 @ encoding: [0x0f,0xd6,0x1e,0xf3] +@ CHECK: vmax.u32 d16, d17, d18 @ encoding: [0xa2,0x06,0x61,0xf3] +@ CHECK: vmax.f32 d19, d20, d21 @ encoding: [0xa5,0x3f,0x44,0xf2] +@ CHECK: vmax.s8 d2, d2, d3 @ encoding: [0x03,0x26,0x02,0xf2] +@ CHECK: vmax.s16 d5, d5, d6 @ encoding: [0x06,0x56,0x15,0xf2] +@ CHECK: vmax.s32 d8, d8, d9 @ encoding: [0x09,0x86,0x28,0xf2] +@ CHECK: vmax.u8 d11, d11, d12 @ encoding: [0x0c,0xb6,0x0b,0xf3] +@ CHECK: vmax.u16 d14, d14, d15 @ encoding: [0x0f,0xe6,0x1e,0xf3] +@ CHECK: vmax.u32 d17, d17, d18 @ encoding: [0xa2,0x16,0x61,0xf3] +@ CHECK: vmax.f32 d20, d20, d21 @ encoding: [0xa5,0x4f,0x44,0xf2] +@ CHECK: vmax.s8 q1, q2, q3 @ encoding: [0x46,0x26,0x04,0xf2] +@ CHECK: vmax.s16 q4, q5, q6 @ encoding: [0x4c,0x86,0x1a,0xf2] +@ CHECK: vmax.s32 q7, q8, q9 @ encoding: [0xe2,0xe6,0x20,0xf2] +@ CHECK: vmax.u8 q10, q11, q12 @ encoding: [0xe8,0x46,0x46,0xf3] +@ CHECK: vmax.u16 q13, q14, q15 @ encoding: [0xee,0xa6,0x5c,0xf3] +@ CHECK: vmax.u32 q6, q7, q8 @ encoding: [0x60,0xc6,0x2e,0xf3] +@ CHECK: vmax.f32 q9, q5, q1 @ encoding: [0x42,0x2f,0x4a,0xf2] +@ CHECK: vmax.s8 q2, q2, q3 @ encoding: [0x46,0x46,0x04,0xf2] +@ CHECK: vmax.s16 q5, q5, q6 @ encoding: [0x4c,0xa6,0x1a,0xf2] @ CHECK: vmax.s32 q8, q8, q9 @ encoding: [0xe2,0x06,0x60,0xf2] - vmax.s32 q8, q8, q9 -@ CHECK: vmax.u8 q8, q8, q9 @ encoding: [0xe2,0x06,0x40,0xf3] - vmax.u8 q8, q8, q9 -@ CHECK: vmax.u16 q8, q8, q9 @ encoding: [0xe2,0x06,0x50,0xf3] - vmax.u16 q8, q8, q9 -@ CHECK: vmax.u32 q8, q8, q9 @ encoding: [0xe2,0x06,0x60,0xf3] - vmax.u32 q8, q8, q9 -@ CHECK: vmax.f32 q8, q8, q9 @ encoding: [0xe2,0x0f,0x40,0xf2] - vmax.f32 q8, q8, q9 +@ CHECK: vmax.u8 q11, q11, q2 @ encoding: [0xc4,0x66,0x46,0xf3] +@ CHECK: vmax.u16 q4, q4, q5 @ encoding: [0x4a,0x86,0x18,0xf3] +@ CHECK: vmax.u32 q7, q7, q8 @ encoding: [0x60,0xe6,0x2e,0xf3] +@ CHECK: vmax.f32 q2, q2, q1 @ encoding: [0x42,0x4f,0x04,0xf2] + + + vmin.s8 d1, d2, d3 + vmin.s16 d4, d5, d6 + vmin.s32 d7, d8, d9 + vmin.u8 d10, d11, d12 + vmin.u16 d13, d14, d15 + vmin.u32 d16, d17, d18 + vmin.f32 d19, d20, d21 + + vmin.s8 d2, d3 + vmin.s16 d5, d6 + vmin.s32 d8, d9 + vmin.u8 d11, d12 + vmin.u16 d14, d15 + vmin.u32 d17, d18 + vmin.f32 d20, d21 + + vmin.s8 q1, q2, q3 + vmin.s16 q4, q5, q6 + vmin.s32 q7, q8, q9 + vmin.u8 q10, q11, q12 + vmin.u16 q13, q14, q15 + vmin.u32 q6, q7, q8 + vmin.f32 q9, q5, q1 + + vmin.s8 q2, q3 + vmin.s16 q5, q6 + vmin.s32 q8, q9 + vmin.u8 q11, q2 + vmin.u16 q4, q5 + vmin.u32 q7, q8 + vmin.f32 q2, q1 + +@ CHECK: vmin.s8 d1, d2, d3 @ encoding: [0x13,0x16,0x02,0xf2] +@ CHECK: vmin.s16 d4, d5, d6 @ encoding: [0x16,0x46,0x15,0xf2] +@ CHECK: vmin.s32 d7, d8, d9 @ encoding: [0x19,0x76,0x28,0xf2] +@ CHECK: vmin.u8 d10, d11, d12 @ encoding: [0x1c,0xa6,0x0b,0xf3] +@ CHECK: vmin.u16 d13, d14, d15 @ encoding: [0x1f,0xd6,0x1e,0xf3] +@ CHECK: vmin.u32 d16, d17, d18 @ encoding: [0xb2,0x06,0x61,0xf3] +@ CHECK: vmin.f32 d19, d20, d21 @ encoding: [0xa5,0x3f,0x64,0xf2] +@ CHECK: vmin.s8 d2, d2, d3 @ encoding: [0x13,0x26,0x02,0xf2] +@ CHECK: vmin.s16 d5, d5, d6 @ encoding: [0x16,0x56,0x15,0xf2] +@ CHECK: vmin.s32 d8, d8, d9 @ encoding: [0x19,0x86,0x28,0xf2] +@ CHECK: vmin.u8 d11, d11, d12 @ encoding: [0x1c,0xb6,0x0b,0xf3] +@ CHECK: vmin.u16 d14, d14, d15 @ encoding: [0x1f,0xe6,0x1e,0xf3] +@ CHECK: vmin.u32 d17, d17, d18 @ encoding: [0xb2,0x16,0x61,0xf3] +@ CHECK: vmin.f32 d20, d20, d21 @ encoding: [0xa5,0x4f,0x64,0xf2] +@ CHECK: vmin.s8 q1, q2, q3 @ encoding: [0x56,0x26,0x04,0xf2] +@ CHECK: vmin.s16 q4, q5, q6 @ encoding: [0x5c,0x86,0x1a,0xf2] +@ CHECK: vmin.s32 q7, q8, q9 @ encoding: [0xf2,0xe6,0x20,0xf2] +@ CHECK: vmin.u8 q10, q11, q12 @ encoding: [0xf8,0x46,0x46,0xf3] +@ CHECK: vmin.u16 q13, q14, q15 @ encoding: [0xfe,0xa6,0x5c,0xf3] +@ CHECK: vmin.u32 q6, q7, q8 @ encoding: [0x70,0xc6,0x2e,0xf3] +@ CHECK: vmin.f32 q9, q5, q1 @ encoding: [0x42,0x2f,0x6a,0xf2] +@ CHECK: vmin.s8 q2, q2, q3 @ encoding: [0x56,0x46,0x04,0xf2] +@ CHECK: vmin.s16 q5, q5, q6 @ encoding: [0x5c,0xa6,0x1a,0xf2] +@ CHECK: vmin.s32 q8, q8, q9 @ encoding: [0xf2,0x06,0x60,0xf2] +@ CHECK: vmin.u8 q11, q11, q2 @ encoding: [0xd4,0x66,0x46,0xf3] +@ CHECK: vmin.u16 q4, q4, q5 @ encoding: [0x5a,0x86,0x18,0xf3] +@ CHECK: vmin.u32 q7, q7, q8 @ encoding: [0x70,0xe6,0x2e,0xf3] +@ CHECK: vmin.f32 q2, q2, q1 @ encoding: [0x42,0x4f,0x24,0xf2] diff --git a/test/MC/ARM/neon-pairwise-encoding.s b/test/MC/ARM/neon-pairwise-encoding.s index 65c47bd..b1e86aa 100644 --- a/test/MC/ARM/neon-pairwise-encoding.s +++ b/test/MC/ARM/neon-pairwise-encoding.s @@ -8,6 +8,16 @@ vpadd.i32 d16, d17, d16 @ CHECK: vpadd.f32 d16, d16, d17 @ encoding: [0xa1,0x0d,0x40,0xf3] vpadd.f32 d16, d16, d17 + +@ CHECK: vpadd.i8 d17, d17, d16 @ encoding: [0xb0,0x1b,0x41,0xf2] + vpadd.i8 d17, d16 +@ CHECK: vpadd.i16 d17, d17, d16 @ encoding: [0xb0,0x1b,0x51,0xf2] + vpadd.i16 d17, d16 +@ CHECK: vpadd.i32 d17, d17, d16 @ encoding: [0xb0,0x1b,0x61,0xf2] + vpadd.i32 d17, d16 +@ CHECK: vpadd.f32 d16, d16, d17 @ encoding: [0xa1,0x0d,0x40,0xf3] + vpadd.f32 d16, d17 + @ CHECK: vpaddl.s8 d16, d16 @ encoding: [0x20,0x02,0xf0,0xf3] vpaddl.s8 d16, d16 @ CHECK: vpaddl.s16 d16, d16 @ encoding: [0x20,0x02,0xf4,0xf3] diff --git a/test/MC/ARM/neon-shift-encoding.s b/test/MC/ARM/neon-shift-encoding.s index 7e4b543..cd450a8 100644 --- a/test/MC/ARM/neon-shift-encoding.s +++ b/test/MC/ARM/neon-shift-encoding.s @@ -105,70 +105,151 @@ _foo: @ CHECK: vshr.s32 q8, q8, #31 @ encoding: [0x70,0x00,0xe1,0xf2] @ CHECK: vshr.s64 q8, q8, #63 @ encoding: [0xf0,0x00,0xc1,0xf2] -@ CHECK: vsra.u8 d16, d16, #7 @ encoding: [0x30,0x01,0xc9,0xf3] - vsra.u8 d16, d16, #7 -@ CHECK: vsra.u16 d16, d16, #15 @ encoding: [0x30,0x01,0xd1,0xf3] - vsra.u16 d16, d16, #15 -@ CHECK: vsra.u32 d16, d16, #31 @ encoding: [0x30,0x01,0xe1,0xf3] - vsra.u32 d16, d16, #31 -@ CHECK: vsra.u64 d16, d16, #63 @ encoding: [0xb0,0x01,0xc1,0xf3] - vsra.u64 d16, d16, #63 -@ CHECK: vsra.u8 q8, q8, #7 @ encoding: [0x70,0x01,0xc9,0xf3] - vsra.u8 q8, q8, #7 -@ CHECK: vsra.u16 q8, q8, #15 @ encoding: [0x70,0x01,0xd1,0xf3] - vsra.u16 q8, q8, #15 -@ CHECK: vsra.u32 q8, q8, #31 @ encoding: [0x70,0x01,0xe1,0xf3] - vsra.u32 q8, q8, #31 -@ CHECK: vsra.u64 q8, q8, #63 @ encoding: [0xf0,0x01,0xc1,0xf3] - vsra.u64 q8, q8, #63 -@ CHECK: vsra.s8 d16, d16, #7 @ encoding: [0x30,0x01,0xc9,0xf2] - vsra.s8 d16, d16, #7 -@ CHECK: vsra.s16 d16, d16, #15 @ encoding: [0x30,0x01,0xd1,0xf2] - vsra.s16 d16, d16, #15 -@ CHECK: vsra.s32 d16, d16, #31 @ encoding: [0x30,0x01,0xe1,0xf2] - vsra.s32 d16, d16, #31 -@ CHECK: vsra.s64 d16, d16, #63 @ encoding: [0xb0,0x01,0xc1,0xf2] - vsra.s64 d16, d16, #63 -@ CHECK: vsra.s8 q8, q8, #7 @ encoding: [0x70,0x01,0xc9,0xf2] - vsra.s8 q8, q8, #7 -@ CHECK: vsra.s16 q8, q8, #15 @ encoding: [0x70,0x01,0xd1,0xf2] - vsra.s16 q8, q8, #15 -@ CHECK: vsra.s32 q8, q8, #31 @ encoding: [0x70,0x01,0xe1,0xf2] - vsra.s32 q8, q8, #31 -@ CHECK: vsra.s64 q8, q8, #63 @ encoding: [0xf0,0x01,0xc1,0xf2] - vsra.s64 q8, q8, #63 -@ CHECK: vsri.8 d16, d16, #7 @ encoding: [0x30,0x04,0xc9,0xf3] - vsri.8 d16, d16, #7 -@ CHECK: vsri.16 d16, d16, #15 @ encoding: [0x30,0x04,0xd1,0xf3] - vsri.16 d16, d16, #15 -@ CHECK: vsri.32 d16, d16, #31 @ encoding: [0x30,0x04,0xe1,0xf3] - vsri.32 d16, d16, #31 -@ CHECK: vsri.64 d16, d16, #63 @ encoding: [0xb0,0x04,0xc1,0xf3] - vsri.64 d16, d16, #63 -@ CHECK: vsri.8 q8, q8, #7 @ encoding: [0x70,0x04,0xc9,0xf3] - vsri.8 q8, q8, #7 -@ CHECK: vsri.16 q8, q8, #15 @ encoding: [0x70,0x04,0xd1,0xf3] - vsri.16 q8, q8, #15 -@ CHECK: vsri.32 q8, q8, #31 @ encoding: [0x70,0x04,0xe1,0xf3] - vsri.32 q8, q8, #31 -@ CHECK: vsri.64 q8, q8, #63 @ encoding: [0xf0,0x04,0xc1,0xf3] - vsri.64 q8, q8, #63 -@ CHECK: vsli.8 d16, d16, #7 @ encoding: [0x30,0x05,0xcf,0xf3] - vsli.8 d16, d16, #7 -@ CHECK: vsli.16 d16, d16, #15 @ encoding: [0x30,0x05,0xdf,0xf3] - vsli.16 d16, d16, #15 -@ CHECK: vsli.32 d16, d16, #31 @ encoding: [0x30,0x05,0xff,0xf3] - vsli.32 d16, d16, #31 -@ CHECK: vsli.64 d16, d16, #63 @ encoding: [0xb0,0x05,0xff,0xf3] - vsli.64 d16, d16, #63 -@ CHECK: vsli.8 q8, q8, #7 @ encoding: [0x70,0x05,0xcf,0xf3] - vsli.8 q8, q8, #7 -@ CHECK: vsli.16 q8, q8, #15 @ encoding: [0x70,0x05,0xdf,0xf3] - vsli.16 q8, q8, #15 -@ CHECK: vsli.32 q8, q8, #31 @ encoding: [0x70,0x05,0xff,0xf3] - vsli.32 q8, q8, #31 -@ CHECK: vsli.64 q8, q8, #63 @ encoding: [0xf0,0x05,0xff,0xf3] - vsli.64 q8, q8, #63 + + vsra.s8 d16, d6, #7 + vsra.s16 d26, d18, #15 + vsra.s32 d11, d10, #31 + vsra.s64 d12, d19, #63 + vsra.s8 q1, q8, #7 + vsra.s16 q2, q7, #15 + vsra.s32 q3, q6, #31 + vsra.s64 q4, q5, #63 + + vsra.s8 d16, #7 + vsra.s16 d15, #15 + vsra.s32 d14, #31 + vsra.s64 d13, #63 + vsra.s8 q4, #7 + vsra.s16 q5, #15 + vsra.s32 q6, #31 + vsra.s64 q7, #63 + +@ CHECK: vsra.s8 d16, d6, #7 @ encoding: [0x16,0x01,0xc9,0xf2] +@ CHECK: vsra.s16 d26, d18, #15 @ encoding: [0x32,0xa1,0xd1,0xf2] +@ CHECK: vsra.s32 d11, d10, #31 @ encoding: [0x1a,0xb1,0xa1,0xf2] +@ CHECK: vsra.s64 d12, d19, #63 @ encoding: [0xb3,0xc1,0x81,0xf2] +@ CHECK: vsra.s8 q1, q8, #7 @ encoding: [0x70,0x21,0x89,0xf2] +@ CHECK: vsra.s16 q2, q7, #15 @ encoding: [0x5e,0x41,0x91,0xf2] +@ CHECK: vsra.s32 q3, q6, #31 @ encoding: [0x5c,0x61,0xa1,0xf2] +@ CHECK: vsra.s64 q4, q5, #63 @ encoding: [0xda,0x81,0x81,0xf2] +@ CHECK: vsra.s8 d16, d16, #7 @ encoding: [0x30,0x01,0xc9,0xf2] +@ CHECK: vsra.s16 d15, d15, #15 @ encoding: [0x1f,0xf1,0x91,0xf2] +@ CHECK: vsra.s32 d14, d14, #31 @ encoding: [0x1e,0xe1,0xa1,0xf2] +@ CHECK: vsra.s64 d13, d13, #63 @ encoding: [0x9d,0xd1,0x81,0xf2] +@ CHECK: vsra.s8 q4, q4, #7 @ encoding: [0x58,0x81,0x89,0xf2] +@ CHECK: vsra.s16 q5, q5, #15 @ encoding: [0x5a,0xa1,0x91,0xf2] +@ CHECK: vsra.s32 q6, q6, #31 @ encoding: [0x5c,0xc1,0xa1,0xf2] +@ CHECK: vsra.s64 q7, q7, #63 @ encoding: [0xde,0xe1,0x81,0xf2] + + + vsra.u8 d16, d6, #7 + vsra.u16 d26, d18, #15 + vsra.u32 d11, d10, #31 + vsra.u64 d12, d19, #63 + vsra.u8 q1, q8, #7 + vsra.u16 q2, q7, #15 + vsra.u32 q3, q6, #31 + vsra.u64 q4, q5, #63 + + vsra.u8 d16, #7 + vsra.u16 d15, #15 + vsra.u32 d14, #31 + vsra.u64 d13, #63 + vsra.u8 q4, #7 + vsra.u16 q5, #15 + vsra.u32 q6, #31 + vsra.u64 q7, #63 + +@ CHECK: vsra.u8 d16, d6, #7 @ encoding: [0x16,0x01,0xc9,0xf3] +@ CHECK: vsra.u16 d26, d18, #15 @ encoding: [0x32,0xa1,0xd1,0xf3] +@ CHECK: vsra.u32 d11, d10, #31 @ encoding: [0x1a,0xb1,0xa1,0xf3] +@ CHECK: vsra.u64 d12, d19, #63 @ encoding: [0xb3,0xc1,0x81,0xf3] +@ CHECK: vsra.u8 q1, q8, #7 @ encoding: [0x70,0x21,0x89,0xf3] +@ CHECK: vsra.u16 q2, q7, #15 @ encoding: [0x5e,0x41,0x91,0xf3] +@ CHECK: vsra.u32 q3, q6, #31 @ encoding: [0x5c,0x61,0xa1,0xf3] +@ CHECK: vsra.u64 q4, q5, #63 @ encoding: [0xda,0x81,0x81,0xf3] +@ CHECK: vsra.u8 d16, d16, #7 @ encoding: [0x30,0x01,0xc9,0xf3] +@ CHECK: vsra.u16 d15, d15, #15 @ encoding: [0x1f,0xf1,0x91,0xf3] +@ CHECK: vsra.u32 d14, d14, #31 @ encoding: [0x1e,0xe1,0xa1,0xf3] +@ CHECK: vsra.u64 d13, d13, #63 @ encoding: [0x9d,0xd1,0x81,0xf3] +@ CHECK: vsra.u8 q4, q4, #7 @ encoding: [0x58,0x81,0x89,0xf3] +@ CHECK: vsra.u16 q5, q5, #15 @ encoding: [0x5a,0xa1,0x91,0xf3] +@ CHECK: vsra.u32 q6, q6, #31 @ encoding: [0x5c,0xc1,0xa1,0xf3] +@ CHECK: vsra.u64 q7, q7, #63 @ encoding: [0xde,0xe1,0x81,0xf3] + + + vsri.8 d16, d6, #7 + vsri.16 d26, d18, #15 + vsri.32 d11, d10, #31 + vsri.64 d12, d19, #63 + vsri.8 q1, q8, #7 + vsri.16 q2, q7, #15 + vsri.32 q3, q6, #31 + vsri.64 q4, q5, #63 + + vsri.8 d16, #7 + vsri.16 d15, #15 + vsri.32 d14, #31 + vsri.64 d13, #63 + vsri.8 q4, #7 + vsri.16 q5, #15 + vsri.32 q6, #31 + vsri.64 q7, #63 + +@ CHECK: vsri.8 d16, d6, #7 @ encoding: [0x16,0x04,0xc9,0xf3] +@ CHECK: vsri.16 d26, d18, #15 @ encoding: [0x32,0xa4,0xd1,0xf3] +@ CHECK: vsri.32 d11, d10, #31 @ encoding: [0x1a,0xb4,0xa1,0xf3] +@ CHECK: vsri.64 d12, d19, #63 @ encoding: [0xb3,0xc4,0x81,0xf3] +@ CHECK: vsri.8 q1, q8, #7 @ encoding: [0x70,0x24,0x89,0xf3] +@ CHECK: vsri.16 q2, q7, #15 @ encoding: [0x5e,0x44,0x91,0xf3] +@ CHECK: vsri.32 q3, q6, #31 @ encoding: [0x5c,0x64,0xa1,0xf3] +@ CHECK: vsri.64 q4, q5, #63 @ encoding: [0xda,0x84,0x81,0xf3] +@ CHECK: vsri.8 d16, d16, #7 @ encoding: [0x30,0x04,0xc9,0xf3] +@ CHECK: vsri.16 d15, d15, #15 @ encoding: [0x1f,0xf4,0x91,0xf3] +@ CHECK: vsri.32 d14, d14, #31 @ encoding: [0x1e,0xe4,0xa1,0xf3] +@ CHECK: vsri.64 d13, d13, #63 @ encoding: [0x9d,0xd4,0x81,0xf3] +@ CHECK: vsri.8 q4, q4, #7 @ encoding: [0x58,0x84,0x89,0xf3] +@ CHECK: vsri.16 q5, q5, #15 @ encoding: [0x5a,0xa4,0x91,0xf3] +@ CHECK: vsri.32 q6, q6, #31 @ encoding: [0x5c,0xc4,0xa1,0xf3] +@ CHECK: vsri.64 q7, q7, #63 @ encoding: [0xde,0xe4,0x81,0xf3] + + + vsli.8 d16, d6, #7 + vsli.16 d26, d18, #15 + vsli.32 d11, d10, #31 + vsli.64 d12, d19, #63 + vsli.8 q1, q8, #7 + vsli.16 q2, q7, #15 + vsli.32 q3, q6, #31 + vsli.64 q4, q5, #63 + + vsli.8 d16, #7 + vsli.16 d15, #15 + vsli.32 d14, #31 + vsli.64 d13, #63 + vsli.8 q4, #7 + vsli.16 q5, #15 + vsli.32 q6, #31 + vsli.64 q7, #63 + +@ CHECK: vsli.8 d16, d6, #7 @ encoding: [0x16,0x05,0xcf,0xf3] +@ CHECK: vsli.16 d26, d18, #15 @ encoding: [0x32,0xa5,0xdf,0xf3] +@ CHECK: vsli.32 d11, d10, #31 @ encoding: [0x1a,0xb5,0xbf,0xf3] +@ CHECK: vsli.64 d12, d19, #63 @ encoding: [0xb3,0xc5,0xbf,0xf3] +@ CHECK: vsli.8 q1, q8, #7 @ encoding: [0x70,0x25,0x8f,0xf3] +@ CHECK: vsli.16 q2, q7, #15 @ encoding: [0x5e,0x45,0x9f,0xf3] +@ CHECK: vsli.32 q3, q6, #31 @ encoding: [0x5c,0x65,0xbf,0xf3] +@ CHECK: vsli.64 q4, q5, #63 @ encoding: [0xda,0x85,0xbf,0xf3] +@ CHECK: vsli.8 d16, d16, #7 @ encoding: [0x30,0x05,0xcf,0xf3] +@ CHECK: vsli.16 d15, d15, #15 @ encoding: [0x1f,0xf5,0x9f,0xf3] +@ CHECK: vsli.32 d14, d14, #31 @ encoding: [0x1e,0xe5,0xbf,0xf3] +@ CHECK: vsli.64 d13, d13, #63 @ encoding: [0x9d,0xd5,0xbf,0xf3] +@ CHECK: vsli.8 q4, q4, #7 @ encoding: [0x58,0x85,0x8f,0xf3] +@ CHECK: vsli.16 q5, q5, #15 @ encoding: [0x5a,0xa5,0x9f,0xf3] +@ CHECK: vsli.32 q6, q6, #31 @ encoding: [0x5c,0xc5,0xbf,0xf3] +@ CHECK: vsli.64 q7, q7, #63 @ encoding: [0xde,0xe5,0xbf,0xf3] + + @ CHECK: vshll.s8 q8, d16, #7 @ encoding: [0x30,0x0a,0xcf,0xf2] vshll.s8 q8, d16, #7 @ CHECK: vshll.s16 q8, d16, #15 @ encoding: [0x30,0x0a,0xdf,0xf2] diff --git a/test/MC/ARM/neon-shiftaccum-encoding.s b/test/MC/ARM/neon-shiftaccum-encoding.s deleted file mode 100644 index 0dc630d..0000000 --- a/test/MC/ARM/neon-shiftaccum-encoding.s +++ /dev/null @@ -1,98 +0,0 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s - -@ CHECK: vsra.s8 d17, d16, #8 @ encoding: [0x30,0x11,0xc8,0xf2] - vsra.s8 d17, d16, #8 -@ CHECK: vsra.s16 d17, d16, #16 @ encoding: [0x30,0x11,0xd0,0xf2] - vsra.s16 d17, d16, #16 -@ CHECK: vsra.s32 d17, d16, #32 @ encoding: [0x30,0x11,0xe0,0xf2] - vsra.s32 d17, d16, #32 -@ CHECK: vsra.s64 d17, d16, #64 @ encoding: [0xb0,0x11,0xc0,0xf2] - vsra.s64 d17, d16, #64 -@ CHECK: vsra.s8 q8, q9, #8 @ encoding: [0x72,0x01,0xc8,0xf2] - vsra.s8 q8, q9, #8 -@ CHECK: vsra.s16 q8, q9, #16 @ encoding: [0x72,0x01,0xd0,0xf2] - vsra.s16 q8, q9, #16 -@ CHECK: vsra.s32 q8, q9, #32 @ encoding: [0x72,0x01,0xe0,0xf2] - vsra.s32 q8, q9, #32 -@ CHECK: vsra.s64 q8, q9, #64 @ encoding: [0xf2,0x01,0xc0,0xf2] - vsra.s64 q8, q9, #64 -@ CHECK: vsra.u8 d17, d16, #8 @ encoding: [0x30,0x11,0xc8,0xf3] - vsra.u8 d17, d16, #8 -@ CHECK: vsra.u16 d17, d16, #16 @ encoding: [0x30,0x11,0xd0,0xf3] - vsra.u16 d17, d16, #16 -@ CHECK: vsra.u32 d17, d16, #32 @ encoding: [0x30,0x11,0xe0,0xf3] - vsra.u32 d17, d16, #32 -@ CHECK: vsra.u64 d17, d16, #64 @ encoding: [0xb0,0x11,0xc0,0xf3] - vsra.u64 d17, d16, #64 -@ CHECK: vsra.u8 q8, q9, #8 @ encoding: [0x72,0x01,0xc8,0xf3] - vsra.u8 q8, q9, #8 -@ CHECK: vsra.u16 q8, q9, #16 @ encoding: [0x72,0x01,0xd0,0xf3] - vsra.u16 q8, q9, #16 -@ CHECK: vsra.u32 q8, q9, #32 @ encoding: [0x72,0x01,0xe0,0xf3] - vsra.u32 q8, q9, #32 -@ CHECK: vsra.u64 q8, q9, #64 @ encoding: [0xf2,0x01,0xc0,0xf3] - vsra.u64 q8, q9, #64 -@ CHECK: vrsra.s8 d17, d16, #8 @ encoding: [0x30,0x13,0xc8,0xf2] - vrsra.s8 d17, d16, #8 -@ CHECK: vrsra.s16 d17, d16, #16 @ encoding: [0x30,0x13,0xd0,0xf2] - vrsra.s16 d17, d16, #16 -@ CHECK: vrsra.s32 d17, d16, #32 @ encoding: [0x30,0x13,0xe0,0xf2] - vrsra.s32 d17, d16, #32 -@ CHECK: vrsra.s64 d17, d16, #64 @ encoding: [0xb0,0x13,0xc0,0xf2] - vrsra.s64 d17, d16, #64 -@ CHECK: vrsra.u8 d17, d16, #8 @ encoding: [0x30,0x13,0xc8,0xf3] - vrsra.u8 d17, d16, #8 -@ CHECK: vrsra.u16 d17, d16, #16 @ encoding: [0x30,0x13,0xd0,0xf3] - vrsra.u16 d17, d16, #16 -@ CHECK: vrsra.u32 d17, d16, #32 @ encoding: [0x30,0x13,0xe0,0xf3] - vrsra.u32 d17, d16, #32 -@ CHECK: vrsra.u64 d17, d16, #64 @ encoding: [0xb0,0x13,0xc0,0xf3] - vrsra.u64 d17, d16, #64 -@ CHECK: vrsra.s8 q8, q9, #8 @ encoding: [0x72,0x03,0xc8,0xf2] - vrsra.s8 q8, q9, #8 -@ CHECK: vrsra.s16 q8, q9, #16 @ encoding: [0x72,0x03,0xd0,0xf2] - vrsra.s16 q8, q9, #16 -@ CHECK: vrsra.s32 q8, q9, #32 @ encoding: [0x72,0x03,0xe0,0xf2] - vrsra.s32 q8, q9, #32 -@ CHECK: vrsra.s64 q8, q9, #64 @ encoding: [0xf2,0x03,0xc0,0xf2] - vrsra.s64 q8, q9, #64 -@ CHECK: vrsra.u8 q8, q9, #8 @ encoding: [0x72,0x03,0xc8,0xf3] - vrsra.u8 q8, q9, #8 -@ CHECK: vrsra.u16 q8, q9, #16 @ encoding: [0x72,0x03,0xd0,0xf3] - vrsra.u16 q8, q9, #16 -@ CHECK: vrsra.u32 q8, q9, #32 @ encoding: [0x72,0x03,0xe0,0xf3] - vrsra.u32 q8, q9, #32 -@ CHECK: vrsra.u64 q8, q9, #64 @ encoding: [0xf2,0x03,0xc0,0xf3] - vrsra.u64 q8, q9, #64 -@ CHECK: vsli.8 d17, d16, #7 @ encoding: [0x30,0x15,0xcf,0xf3] - vsli.8 d17, d16, #7 -@ CHECK: vsli.16 d17, d16, #15 @ encoding: [0x30,0x15,0xdf,0xf3] - vsli.16 d17, d16, #15 -@ CHECK: vsli.32 d17, d16, #31 @ encoding: [0x30,0x15,0xff,0xf3] - vsli.32 d17, d16, #31 -@ CHECK: vsli.64 d17, d16, #63 @ encoding: [0xb0,0x15,0xff,0xf3] - vsli.64 d17, d16, #63 -@ CHECK: vsli.8 q9, q8, #7 @ encoding: [0x70,0x25,0xcf,0xf3] - vsli.8 q9, q8, #7 -@ CHECK: vsli.16 q9, q8, #15 @ encoding: [0x70,0x25,0xdf,0xf3] - vsli.16 q9, q8, #15 -@ CHECK: vsli.32 q9, q8, #31 @ encoding: [0x70,0x25,0xff,0xf3] - vsli.32 q9, q8, #31 -@ CHECK: vsli.64 q9, q8, #63 @ encoding: [0xf0,0x25,0xff,0xf3] - vsli.64 q9, q8, #63 -@ CHECK: vsri.8 d17, d16, #8 @ encoding: [0x30,0x14,0xc8,0xf3] - vsri.8 d17, d16, #8 -@ CHECK: vsri.16 d17, d16, #16 @ encoding: [0x30,0x14,0xd0,0xf3] - vsri.16 d17, d16, #16 -@ CHECK: vsri.32 d17, d16, #32 @ encoding: [0x30,0x14,0xe0,0xf3] - vsri.32 d17, d16, #32 -@ CHECK: vsri.64 d17, d16, #64 @ encoding: [0xb0,0x14,0xc0,0xf3] - vsri.64 d17, d16, #64 -@ CHECK: vsri.8 q9, q8, #8 @ encoding: [0x70,0x24,0xc8,0xf3] - vsri.8 q9, q8, #8 -@ CHECK: vsri.16 q9, q8, #16 @ encoding: [0x70,0x24,0xd0,0xf3] - vsri.16 q9, q8, #16 -@ CHECK: vsri.32 q9, q8, #32 @ encoding: [0x70,0x24,0xe0,0xf3] - vsri.32 q9, q8, #32 -@ CHECK: vsri.64 q9, q8, #64 @ encoding: [0xf0,0x24,0xc0,0xf3] - vsri.64 q9, q8, #64 diff --git a/test/MC/ARM/neon-vld-encoding.s b/test/MC/ARM/neon-vld-encoding.s index 736e953..3cc6bf1 100644 --- a/test/MC/ARM/neon-vld-encoding.s +++ b/test/MC/ARM/neon-vld-encoding.s @@ -154,46 +154,87 @@ @ CHECK: vld2.32 {d14, d15, d16, d17}, [r0, :256], r6 @ encoding: [0xb6,0xe3,0x20,0xf4] -@ vld3.8 {d16, d17, d18}, [r0, :64] -@ vld3.16 {d16, d17, d18}, [r0] -@ vld3.32 {d16, d17, d18}, [r0] -@ vld3.8 {d16, d18, d20}, [r0, :64]! -@ vld3.8 {d17, d19, d21}, [r0, :64]! -@ vld3.16 {d16, d18, d20}, [r0]! -@ vld3.16 {d17, d19, d21}, [r0]! -@ vld3.32 {d16, d18, d20}, [r0]! -@ vld3.32 {d17, d19, d21}, [r0]! - -@ FIXME: vld3.8 {d16, d17, d18}, [r0, :64] @ encoding: [0x1f,0x04,0x60,0xf4] -@ FIXME: vld3.16 {d16, d17, d18}, [r0] @ encoding: [0x4f,0x04,0x60,0xf4] -@ FIXME: vld3.32 {d16, d17, d18}, [r0] @ encoding: [0x8f,0x04,0x60,0xf4] -@ FIXME: vld3.8 {d16, d18, d20}, [r0, :64]! @ encoding: [0x1d,0x05,0x60,0xf4] -@ FIXME: vld3.8 {d17, d19, d21}, [r0, :64]! @ encoding: [0x1d,0x15,0x60,0xf4] -@ FIXME: vld3.16 {d16, d18, d20}, [r0]! @ encoding: [0x4d,0x05,0x60,0xf4] -@ FIXME: vld3.16 {d17, d19, d21}, [r0]! @ encoding: [0x4d,0x15,0x60,0xf4] -@ FIXME: vld3.32 {d16, d18, d20}, [r0]! @ encoding: [0x8d,0x05,0x60,0xf4] -@ FIXME: vld3.32 {d17, d19, d21}, [r0]! @ encoding: [0x8d,0x15,0x60,0xf4] - - -@ vld4.8 {d16, d17, d18, d19}, [r0, :64] -@ vld4.16 {d16, d17, d18, d19}, [r0, :128] -@ vld4.32 {d16, d17, d18, d19}, [r0, :256] -@ vld4.8 {d16, d18, d20, d22}, [r0, :256]! -@ vld4.8 {d17, d19, d21, d23}, [r0, :256]! -@ vld4.16 {d16, d18, d20, d22}, [r0]! -@ vld4.16 {d17, d19, d21, d23}, [r0]! -@ vld4.32 {d16, d18, d20, d22}, [r0]! -@ vld4.32 {d17, d19, d21, d23}, [r0]! - -@ FIXME: vld4.8 {d16, d17, d18, d19}, [r0, :64]@ encoding: [0x1f,0x00,0x60,0xf4] -@ FIXME: vld4.16 {d16, d17, d18, d19}, [r0,:128]@ encoding:[0x6f,0x00,0x60,0xf4] -@ FIXME: vld4.32 {d16, d17, d18, d19}, [r0,:256]@ encoding:[0xbf,0x00,0x60,0xf4] -@ FIXME: vld4.8 {d16, d18, d20, d22}, [r0,:256]!@ encoding:[0x3d,0x01,0x60,0xf4] -@ FIXME: vld4.8 {d17, d19, d21, d23}, [r0,:256]!@ encoding:[0x3d,0x11,0x60,0xf4] -@ FIXME: vld4.16 {d16, d18, d20, d22}, [r0]! @ encoding: [0x4d,0x01,0x60,0xf4] -@ FIXME: vld4.16 {d17, d19, d21, d23}, [r0]! @ encoding: [0x4d,0x11,0x60,0xf4] -@ FIXME: vld4.32 {d16, d18, d20, d22}, [r0]! @ encoding: [0x8d,0x01,0x60,0xf4] -@ FIXME: vld4.32 {d17, d19, d21, d23}, [r0]! @ encoding: [0x8d,0x11,0x60,0xf4] + vld3.8 {d16, d17, d18}, [r1] + vld3.16 {d6, d7, d8}, [r2] + vld3.32 {d1, d2, d3}, [r3] + vld3.8 {d16, d18, d20}, [r0, :64] + vld3.u16 {d27, d29, d31}, [r4] + vld3.i32 {d6, d8, d10}, [r5] + + vld3.i8 {d12, d13, d14}, [r6], r1 + vld3.i16 {d11, d12, d13}, [r7], r2 + vld3.u32 {d2, d3, d4}, [r8], r3 + vld3.8 {d4, d6, d8}, [r9], r4 + vld3.u16 {d14, d16, d18}, [r9], r4 + vld3.i32 {d16, d18, d20}, [r10], r5 + + vld3.p8 {d6, d7, d8}, [r8]! + vld3.16 {d9, d10, d11}, [r7]! + vld3.f32 {d1, d2, d3}, [r6]! + vld3.8 {d16, d18, d20}, [r0, :64]! + vld3.p16 {d20, d22, d24}, [r5]! + vld3.32 {d5, d7, d9}, [r4]! + + +@ CHECK: vld3.8 {d16, d17, d18}, [r1] @ encoding: [0x0f,0x04,0x61,0xf4] +@ CHECK: vld3.16 {d6, d7, d8}, [r2] @ encoding: [0x4f,0x64,0x22,0xf4] +@ CHECK: vld3.32 {d1, d2, d3}, [r3] @ encoding: [0x8f,0x14,0x23,0xf4] +@ CHECK: vld3.8 {d16, d18, d20}, [r0, :64] @ encoding: [0x1f,0x05,0x60,0xf4] +@ CHECK: vld3.16 {d27, d29, d31}, [r4] @ encoding: [0x4f,0xb5,0x64,0xf4] +@ CHECK: vld3.32 {d6, d8, d10}, [r5] @ encoding: [0x8f,0x65,0x25,0xf4] +@ CHECK: vld3.8 {d12, d13, d14}, [r6], r1 @ encoding: [0x01,0xc4,0x26,0xf4] +@ CHECK: vld3.16 {d11, d12, d13}, [r7], r2 @ encoding: [0x42,0xb4,0x27,0xf4] +@ CHECK: vld3.32 {d2, d3, d4}, [r8], r3 @ encoding: [0x83,0x24,0x28,0xf4] +@ CHECK: vld3.8 {d4, d6, d8}, [r9], r4 @ encoding: [0x04,0x45,0x29,0xf4] +@ CHECK: vld3.16 {d14, d16, d18}, [r9], r4 @ encoding: [0x44,0xe5,0x29,0xf4] +@ CHECK: vld3.32 {d16, d18, d20}, [r10], r5 @ encoding: [0x85,0x05,0x6a,0xf4] +@ CHECK: vld3.8 {d6, d7, d8}, [r8]! @ encoding: [0x0d,0x64,0x28,0xf4] +@ CHECK: vld3.16 {d9, d10, d11}, [r7]! @ encoding: [0x4d,0x94,0x27,0xf4] +@ CHECK: vld3.32 {d1, d2, d3}, [r6]! @ encoding: [0x8d,0x14,0x26,0xf4] +@ CHECK: vld3.8 {d16, d18, d20}, [r0, :64]! @ encoding: [0x1d,0x05,0x60,0xf4] +@ CHECK: vld3.16 {d20, d22, d24}, [r5]! @ encoding: [0x4d,0x45,0x65,0xf4] +@ CHECK: vld3.32 {d5, d7, d9}, [r4]! @ encoding: [0x8d,0x55,0x24,0xf4] + + + vld4.8 {d16, d17, d18, d19}, [r1, :64] + vld4.16 {d16, d17, d18, d19}, [r2, :128] + vld4.32 {d16, d17, d18, d19}, [r3, :256] + vld4.8 {d17, d19, d21, d23}, [r5, :256] + vld4.16 {d17, d19, d21, d23}, [r7] + vld4.32 {d16, d18, d20, d22}, [r8] + + vld4.s8 {d16, d17, d18, d19}, [r1, :64]! + vld4.s16 {d16, d17, d18, d19}, [r2, :128]! + vld4.s32 {d16, d17, d18, d19}, [r3, :256]! + vld4.u8 {d17, d19, d21, d23}, [r5, :256]! + vld4.u16 {d17, d19, d21, d23}, [r7]! + vld4.u32 {d16, d18, d20, d22}, [r8]! + + vld4.p8 {d16, d17, d18, d19}, [r1, :64], r8 + vld4.p16 {d16, d17, d18, d19}, [r2], r7 + vld4.f32 {d16, d17, d18, d19}, [r3, :64], r5 + vld4.i8 {d16, d18, d20, d22}, [r4, :256], r2 + vld4.i16 {d16, d18, d20, d22}, [r6], r3 + vld4.i32 {d17, d19, d21, d23}, [r9], r4 + +@ CHECK: vld4.8 {d16, d17, d18, d19}, [r1, :64] @ encoding: [0x1f,0x00,0x61,0xf4] +@ CHECK: vld4.16 {d16, d17, d18, d19}, [r2, :128] @ encoding: [0x6f,0x00,0x62,0xf4] +@ CHECK: vld4.32 {d16, d17, d18, d19}, [r3, :256] @ encoding: [0xbf,0x00,0x63,0xf4] +@ CHECK: vld4.8 {d17, d19, d21, d23}, [r5, :256] @ encoding: [0x3f,0x11,0x65,0xf4] +@ CHECK: vld4.16 {d17, d19, d21, d23}, [r7] @ encoding: [0x4f,0x11,0x67,0xf4] +@ CHECK: vld4.32 {d16, d18, d20, d22}, [r8] @ encoding: [0x8f,0x01,0x68,0xf4] +@ CHECK: vld4.8 {d16, d17, d18, d19}, [r1, :64]! @ encoding: [0x1d,0x00,0x61,0xf4] +@ CHECK: vld4.16 {d16, d17, d18, d19}, [r2, :128]! @ encoding: [0x6d,0x00,0x62,0xf4] +@ CHECK: vld4.32 {d16, d17, d18, d19}, [r3, :256]! @ encoding: [0xbd,0x00,0x63,0xf4] +@ CHECK: vld4.8 {d17, d19, d21, d23}, [r5, :256]! @ encoding: [0x3d,0x11,0x65,0xf4] +@ CHECK: vld4.16 {d17, d19, d21, d23}, [r7]! @ encoding: [0x4d,0x11,0x67,0xf4] +@ CHECK: vld4.32 {d16, d18, d20, d22}, [r8]! @ encoding: [0x8d,0x01,0x68,0xf4] +@ CHECK: vld4.8 {d16, d17, d18, d19}, [r1, :64], r8 @ encoding: [0x18,0x00,0x61,0xf4] +@ CHECK: vld4.16 {d16, d17, d18, d19}, [r2], r7 @ encoding: [0x47,0x00,0x62,0xf4] +@ CHECK: vld4.32 {d16, d17, d18, d19}, [r3, :64], r5 @ encoding: [0x95,0x00,0x63,0xf4] +@ CHECK: vld4.8 {d16, d18, d20, d22}, [r4, :256], r2 @ encoding: [0x32,0x01,0x64,0xf4] +@ CHECK: vld4.16 {d16, d18, d20, d22}, [r6], r3 @ encoding: [0x43,0x01,0x66,0xf4] +@ CHECK: vld4.32 {d17, d19, d21, d23}, [r9], r4 @ encoding: [0x84,0x11,0x69,0xf4] vld1.8 {d4[]}, [r1] @@ -211,67 +252,205 @@ @ CHECK: vld1.8 {d4[], d5[]}, [r1], r3 @ encoding: [0x23,0x4c,0xa1,0xf4] vld1.8 {d16[3]}, [r0] -@ vld1.16 {d16[2]}, [r0, :16] -@ vld1.32 {d16[1]}, [r0, :32] + vld1.16 {d16[2]}, [r0, :16] + vld1.32 {d16[1]}, [r0, :32] vld1.p8 d12[6], [r2]! vld1.i8 d12[6], [r2], r2 vld1.u16 d12[3], [r2]! vld1.16 d12[2], [r2], r2 @ CHECK: vld1.8 {d16[3]}, [r0] @ encoding: [0x6f,0x00,0xe0,0xf4] -@ FIXME: vld1.16 {d16[2]}, [r0, :16] @ encoding: [0x9f,0x04,0xe0,0xf4] -@ FIXME: vld1.32 {d16[1]}, [r0, :32] @ encoding: [0xbf,0x08,0xe0,0xf4] +@ CHECK: vld1.16 {d16[2]}, [r0, :16] @ encoding: [0x9f,0x04,0xe0,0xf4] +@ CHECK: vld1.32 {d16[1]}, [r0, :32] @ encoding: [0xbf,0x08,0xe0,0xf4] @ CHECK: vld1.8 {d12[6]}, [r2]! @ encoding: [0xcd,0xc0,0xa2,0xf4] @ CHECK: vld1.8 {d12[6]}, [r2], r2 @ encoding: [0xc2,0xc0,0xa2,0xf4] @ CHECK: vld1.16 {d12[3]}, [r2]! @ encoding: [0xcd,0xc4,0xa2,0xf4] @ CHECK: vld1.16 {d12[2]}, [r2], r2 @ encoding: [0x82,0xc4,0xa2,0xf4] -@ vld2.8 {d16[1], d17[1]}, [r0, :16] -@ vld2.16 {d16[1], d17[1]}, [r0, :32] + vld2.8 {d16[1], d17[1]}, [r0, :16] + vld2.16 {d16[1], d17[1]}, [r0, :32] vld2.32 {d16[1], d17[1]}, [r0] -@ vld2.16 {d17[1], d19[1]}, [r0] -@ vld2.32 {d17[0], d19[0]}, [r0, :64] + vld2.16 {d17[1], d19[1]}, [r0] + vld2.32 {d17[0], d19[0]}, [r0, :64] + vld2.32 {d17[0], d19[0]}, [r0, :64]! vld2.8 {d2[4], d3[4]}, [r2], r3 vld2.8 {d2[4], d3[4]}, [r2]! vld2.8 {d2[4], d3[4]}, [r2] - -@ FIXME: vld2.8 {d16[1], d17[1]}, [r0, :16] @ encoding: [0x3f,0x01,0xe0,0xf4] -@ FIXME: vld2.16 {d16[1], d17[1]}, [r0, :32] @ encoding: [0x5f,0x05,0xe0,0xf4] + vld2.32 {d22[], d23[]}, [r1] + vld2.32 {d22[], d24[]}, [r1] + vld2.32 {d10[ ],d11[ ]}, [r3]! + vld2.32 {d14[ ],d16[ ]}, [r4]! + vld2.32 {d22[ ],d23[ ]}, [r5], r4 + vld2.32 {d22[ ],d24[ ]}, [r6], r4 + +@ CHECK: vld2.8 {d16[1], d17[1]}, [r0, :16] @ encoding: [0x3f,0x01,0xe0,0xf4] +@ CHECK: vld2.16 {d16[1], d17[1]}, [r0, :32] @ encoding: [0x5f,0x05,0xe0,0xf4] @ CHECK: vld2.32 {d16[1], d17[1]}, [r0] @ encoding: [0x8f,0x09,0xe0,0xf4] -@ FIXME: vld2.16 {d17[1], d19[1]}, [r0] @ encoding: [0x6f,0x15,0xe0,0xf4] -@ FIXME: vld2.32 {d17[0], d19[0]}, [r0, :64] @ encoding: [0x5f,0x19,0xe0,0xf4] +@ CHECK: vld2.16 {d17[1], d19[1]}, [r0] @ encoding: [0x6f,0x15,0xe0,0xf4] +@ CHECK: vld2.32 {d17[0], d19[0]}, [r0, :64] @ encoding: [0x5f,0x19,0xe0,0xf4] +@ CHECK: vld2.32 {d17[0], d19[0]}, [r0, :64]! @ encoding: [0x5d,0x19,0xe0,0xf4] @ CHECK: vld2.8 {d2[4], d3[4]}, [r2], r3 @ encoding: [0x83,0x21,0xa2,0xf4] @ CHECK: vld2.8 {d2[4], d3[4]}, [r2]! @ encoding: [0x8d,0x21,0xa2,0xf4] @ CHECK: vld2.8 {d2[4], d3[4]}, [r2] @ encoding: [0x8f,0x21,0xa2,0xf4] - - - -@ vld3.8 {d16[1], d17[1], d18[1]}, [r0] -@ vld3.16 {d16[1], d17[1], d18[1]}, [r0] -@ vld3.32 {d16[1], d17[1], d18[1]}, [r0] -@ vld3.16 {d16[1], d18[1], d20[1]}, [r0] -@ vld3.32 {d17[1], d19[1], d21[1]}, [r0] - -@ FIXME: vld3.8 {d16[1], d17[1], d18[1]}, [r0] @ encoding: [0x2f,0x02,0xe0,0xf4] -@ FIXME: vld3.16 {d16[1], d17[1], d18[1]}, [r0]@ encoding: [0x4f,0x06,0xe0,0xf4] -@ FIXME: vld3.32 {d16[1], d17[1], d18[1]}, [r0]@ encoding: [0x8f,0x0a,0xe0,0xf4] -@ FIXME: vld3.16 {d16[1], d18[1], d20[1]}, [r0]@ encoding: [0x6f,0x06,0xe0,0xf4] -@ FIXME: vld3.32 {d17[1], d19[1], d21[1]}, [r0]@ encoding: [0xcf,0x1a,0xe0,0xf4] - - -@ vld4.8 {d16[1], d17[1], d18[1], d19[1]}, [r0, :32] -@ vld4.16 {d16[1], d17[1], d18[1], d19[1]}, [r0] -@ vld4.32 {d16[1], d17[1], d18[1], d19[1]}, [r0, :128] -@ vld4.16 {d16[1], d18[1], d20[1], d22[1]}, [r0, :64] -@ vld4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0] - -@ FIXME: vld4.8 {d16[1], d17[1], d18[1], d19[1]}, [r0, :32] @ encoding: [0x3f,0x03,0xe0,0xf4] -@ FIXME: vld4.16 {d16[1], d17[1], d18[1], d19[1]}, [r0] @ encoding: [0x4f,0x07,0xe0,0xf4] -@ FIXME: vld4.32 {d16[1], d17[1], d18[1], d19[1]}, [r0, :128] @ encoding: [0xaf,0x0b,0xe0,0xf4] -@ FIXME: vld4.16 {d16[1], d18[1], d20[1], d22[1]}, [r0, :64] @ encoding: [0x7f,0x07,0xe0,0xf4] -@ FIXME: vld4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0] @ encoding: [0x4f,0x1b,0xe0,0xf4] - +@ CHECK: vld2.32 {d22[], d23[]}, [r1] @ encoding: [0x8f,0x6d,0xe1,0xf4] +@ CHECK: vld2.32 {d22[], d24[]}, [r1] @ encoding: [0xaf,0x6d,0xe1,0xf4] +@ CHECK: vld2.32 {d10[], d11[]}, [r3]! @ encoding: [0x8d,0xad,0xa3,0xf4] +@ CHECK: vld2.32 {d14[], d16[]}, [r4]! @ encoding: [0xad,0xed,0xa4,0xf4] +@ CHECK: vld2.32 {d22[], d23[]}, [r5], r4 @ encoding: [0x84,0x6d,0xe5,0xf4] +@ CHECK: vld2.32 {d22[], d24[]}, [r6], r4 @ encoding: [0xa4,0x6d,0xe6,0xf4] + + + vld3.8 {d16[1], d17[1], d18[1]}, [r1] + vld3.16 {d6[1], d7[1], d8[1]}, [r2] + vld3.32 {d1[1], d2[1], d3[1]}, [r3] + vld3.u16 {d27[2], d29[2], d31[2]}, [r4] + vld3.i32 {d6[0], d8[0], d10[0]}, [r5] + + vld3.i8 {d12[3], d13[3], d14[3]}, [r6], r1 + vld3.i16 {d11[2], d12[2], d13[2]}, [r7], r2 + vld3.u32 {d2[1], d3[1], d4[1]}, [r8], r3 + vld3.u16 {d14[2], d16[2], d18[2]}, [r9], r4 + vld3.i32 {d16[0], d18[0], d20[0]}, [r10], r5 + + vld3.p8 {d6[6], d7[6], d8[6]}, [r8]! + vld3.16 {d9[2], d10[2], d11[2]}, [r7]! + vld3.f32 {d1[1], d2[1], d3[1]}, [r6]! + vld3.p16 {d20[2], d22[2], d24[2]}, [r5]! + vld3.32 {d5[0], d7[0], d9[0]}, [r4]! + +@ CHECK: vld3.8 {d16[1], d17[1], d18[1]}, [r1] @ encoding: [0x2f,0x02,0xe1,0xf4] +@ CHECK: vld3.16 {d6[1], d7[1], d8[1]}, [r2] @ encoding: [0x4f,0x66,0xa2,0xf4] +@ CHECK: vld3.32 {d1[1], d2[1], d3[1]}, [r3] @ encoding: [0x8f,0x1a,0xa3,0xf4] +@ CHECK: vld3.16 {d27[2], d29[2], d31[2]}, [r4] @ encoding: [0xaf,0xb6,0xe4,0xf4] +@ CHECK: vld3.32 {d6[0], d8[0], d10[0]}, [r5] @ encoding: [0x4f,0x6a,0xa5,0xf4] +@ CHECK: vld3.8 {d12[3], d13[3], d14[3]}, [r6], r1 @ encoding: [0x61,0xc2,0xa6,0xf4] +@ CHECK: vld3.16 {d11[2], d12[2], d13[2]}, [r7], r2 @ encoding: [0x82,0xb6,0xa7,0xf4] +@ CHECK: vld3.32 {d2[1], d3[1], d4[1]}, [r8], r3 @ encoding: [0x83,0x2a,0xa8,0xf4] +@ CHECK: vld3.16 {d14[2], d16[2], d18[2]}, [r9], r4 @ encoding: [0xa4,0xe6,0xa9,0xf4] +@ CHECK: vld3.32 {d16[0], d18[0], d20[0]}, [r10], r5 @ encoding: [0x45,0x0a,0xea,0xf4] +@ CHECK: vld3.8 {d6[6], d7[6], d8[6]}, [r8]! @ encoding: [0xcd,0x62,0xa8,0xf4] +@ CHECK: vld3.16 {d9[2], d10[2], d11[2]}, [r7]! @ encoding: [0x8d,0x96,0xa7,0xf4] +@ CHECK: vld3.32 {d1[1], d2[1], d3[1]}, [r6]! @ encoding: [0x8d,0x1a,0xa6,0xf4] +@ CHECK: vld3.16 {d20[2], d21[2], d22[2]}, [r5]! @ encoding: [0xad,0x46,0xe5,0xf4] +@ CHECK: vld3.32 {d5[0], d7[0], d9[0]}, [r4]! @ encoding: [0x4d,0x5a,0xa4,0xf4] + + + vld3.8 {d16[], d17[], d18[]}, [r1] + vld3.16 {d16[], d17[], d18[]}, [r2] + vld3.32 {d16[], d17[], d18[]}, [r3] + vld3.8 {d17[], d19[], d21[]}, [r7] + vld3.16 {d17[], d19[], d21[]}, [r7] + vld3.32 {d16[], d18[], d20[]}, [r8] + + vld3.s8 {d16[], d17[], d18[]}, [r1]! + vld3.s16 {d16[], d17[], d18[]}, [r2]! + vld3.s32 {d16[], d17[], d18[]}, [r3]! + vld3.u8 {d17[], d19[], d21[]}, [r7]! + vld3.u16 {d17[], d19[], d21[]}, [r7]! + vld3.u32 {d16[], d18[], d20[]}, [r8]! + + vld3.p8 {d16[], d17[], d18[]}, [r1], r8 + vld3.p16 {d16[], d17[], d18[]}, [r2], r7 + vld3.f32 {d16[], d17[], d18[]}, [r3], r5 + vld3.i8 {d16[], d18[], d20[]}, [r6], r3 + vld3.i16 {d16[], d18[], d20[]}, [r6], r3 + vld3.i32 {d17[], d19[], d21[]}, [r9], r4 + +@ CHECK: vld3.8 {d16[], d17[], d18[]}, [r1] @ encoding: [0x0f,0x0e,0xe1,0xf4] +@ CHECK: vld3.16 {d16[], d17[], d18[]}, [r2] @ encoding: [0x4f,0x0e,0xe2,0xf4] +@ CHECK: vld3.32 {d16[], d17[], d18[]}, [r3] @ encoding: [0x8f,0x0e,0xe3,0xf4] +@ CHECK: vld3.8 {d17[], d19[], d21[]}, [r7] @ encoding: [0x2f,0x1e,0xe7,0xf4] +@ CHECK: vld3.16 {d17[], d19[], d21[]}, [r7] @ encoding: [0x6f,0x1e,0xe7,0xf4] +@ CHECK: vld3.32 {d16[], d18[], d20[]}, [r8] @ encoding: [0xaf,0x0e,0xe8,0xf4] +@ CHECK: vld3.8 {d16[], d17[], d18[]}, [r1]! @ encoding: [0x0d,0x0e,0xe1,0xf4] +@ CHECK: vld3.16 {d16[], d17[], d18[]}, [r2]! @ encoding: [0x4d,0x0e,0xe2,0xf4] +@ CHECK: vld3.32 {d16[], d17[], d18[]}, [r3]! @ encoding: [0x8d,0x0e,0xe3,0xf4] +@ CHECK: vld3.8 {d17[], d18[], d19[]}, [r7]! @ encoding: [0x2d,0x1e,0xe7,0xf4] +@ CHECK: vld3.16 {d17[], d18[], d19[]}, [r7]! @ encoding: [0x6d,0x1e,0xe7,0xf4] +@ CHECK: vld3.32 {d16[], d18[], d20[]}, [r8]! @ encoding: [0xad,0x0e,0xe8,0xf4] +@ CHECK: vld3.8 {d16[], d17[], d18[]}, [r1], r8 @ encoding: [0x08,0x0e,0xe1,0xf4] +@ CHECK: vld3.16 {d16[], d17[], d18[]}, [r2], r7 @ encoding: [0x47,0x0e,0xe2,0xf4] +@ CHECK: vld3.32 {d16[], d17[], d18[]}, [r3], r5 @ encoding: [0x85,0x0e,0xe3,0xf4] +@ CHECK: vld3.8 {d16[], d18[], d20[]}, [r6], r3 @ encoding: [0x23,0x0e,0xe6,0xf4] +@ CHECK: vld3.16 {d16[], d18[], d20[]}, [r6], r3 @ encoding: [0x63,0x0e,0xe6,0xf4] +@ CHECK: vld3.32 {d17[], d19[], d21[]}, [r9], r4 @ encoding: [0xa4,0x1e,0xe9,0xf4] + + + vld4.8 {d16[1], d17[1], d18[1], d19[1]}, [r1] + vld4.16 {d16[1], d17[1], d18[1], d19[1]}, [r2] + vld4.32 {d16[1], d17[1], d18[1], d19[1]}, [r3] + vld4.16 {d17[1], d19[1], d21[1], d23[1]}, [r7] + vld4.32 {d16[1], d18[1], d20[1], d22[1]}, [r8] + + vld4.s8 {d16[1], d17[1], d18[1], d19[1]}, [r1, :32]! + vld4.s16 {d16[1], d17[1], d18[1], d19[1]}, [r2, :64]! + vld4.s32 {d16[1], d17[1], d18[1], d19[1]}, [r3, :128]! + vld4.u16 {d17[1], d19[1], d21[1], d23[1]}, [r7]! + vld4.u32 {d16[1], d18[1], d20[1], d22[1]}, [r8]! + + vld4.p8 {d16[1], d17[1], d18[1], d19[1]}, [r1, :32], r8 + vld4.p16 {d16[1], d17[1], d18[1], d19[1]}, [r2], r7 + vld4.f32 {d16[1], d17[1], d18[1], d19[1]}, [r3, :64], r5 + vld4.i16 {d16[1], d18[1], d20[1], d22[1]}, [r6], r3 + vld4.i32 {d17[1], d19[1], d21[1], d23[1]}, [r9], r4 + +@ CHECK: vld4.8 {d16[1], d17[1], d18[1], d19[1]}, [r1] @ encoding: [0x2f,0x03,0xe1,0xf4] +@ CHECK: vld4.16 {d16[1], d17[1], d18[1], d19[1]}, [r2] @ encoding: [0x4f,0x07,0xe2,0xf4] +@ CHECK: vld4.32 {d16[1], d17[1], d18[1], d19[1]}, [r3] @ encoding: [0x8f,0x0b,0xe3,0xf4] +@ CHECK: vld4.16 {d17[1], d19[1], d21[1], d23[1]}, [r7] @ encoding: [0x6f,0x17,0xe7,0xf4] +@ CHECK: vld4.32 {d16[1], d18[1], d20[1], d22[1]}, [r8] @ encoding: [0xcf,0x0b,0xe8,0xf4] +@ CHECK: vld4.8 {d16[1], d17[1], d18[1], d19[1]}, [r1, :32]! @ encoding: [0x3d,0x03,0xe1,0xf4] +@ CHECK: vld4.16 {d16[1], d17[1], d18[1], d19[1]}, [r2, :64]! @ encoding: [0x5d,0x07,0xe2,0xf4] +@ CHECK: vld4.32 {d16[1], d17[1], d18[1], d19[1]}, [r3, :128]! @ encoding: [0xad,0x0b,0xe3,0xf4] +@ CHECK: vld4.16 {d17[1], d18[1], d19[1], d20[1]}, [r7]! @ encoding: [0x6d,0x17,0xe7,0xf4] +@ CHECK: vld4.32 {d16[1], d18[1], d20[1], d22[1]}, [r8]! @ encoding: [0xcd,0x0b,0xe8,0xf4] +@ CHECK: vld4.8 {d16[1], d17[1], d18[1], d19[1]}, [r1, :32], r8 @ encoding: [0x38,0x03,0xe1,0xf4] +@ CHECK: vld4.16 {d16[1], d17[1], d18[1], d19[1]}, [r2], r7 @ encoding: [0x47,0x07,0xe2,0xf4] +@ CHECK: vld4.32 {d16[1], d17[1], d18[1], d19[1]}, [r3, :64], r5 @ encoding: [0x95,0x0b,0xe3,0xf4] +@ CHECK: vld4.16 {d16[1], d18[1], d20[1], d22[1]}, [r6], r3 @ encoding: [0x63,0x07,0xe6,0xf4] +@ CHECK: vld4.32 {d17[1], d19[1], d21[1], d23[1]}, [r9], r4 @ encoding: [0xc4,0x1b,0xe9,0xf4] + + + vld4.8 {d16[], d17[], d18[], d19[]}, [r1] + vld4.16 {d16[], d17[], d18[], d19[]}, [r2] + vld4.32 {d16[], d17[], d18[], d19[]}, [r3] + vld4.8 {d17[], d19[], d21[], d23[]}, [r7] + vld4.16 {d17[], d19[], d21[], d23[]}, [r7] + vld4.32 {d16[], d18[], d20[], d22[]}, [r8] + + vld4.s8 {d16[], d17[], d18[], d19[]}, [r1]! + vld4.s16 {d16[], d17[], d18[], d19[]}, [r2]! + vld4.s32 {d16[], d17[], d18[], d19[]}, [r3]! + vld4.u8 {d17[], d19[], d21[], d23[]}, [r7]! + vld4.u16 {d17[], d19[], d21[], d23[]}, [r7]! + vld4.u32 {d16[], d18[], d20[], d22[]}, [r8]! + + vld4.p8 {d16[], d17[], d18[], d19[]}, [r1], r8 + vld4.p16 {d16[], d17[], d18[], d19[]}, [r2], r7 + vld4.f32 {d16[], d17[], d18[], d19[]}, [r3], r5 + vld4.i8 {d16[], d18[], d20[], d22[]}, [r6], r3 + vld4.i16 {d16[], d18[], d20[], d22[]}, [r6], r3 + vld4.i32 {d17[], d19[], d21[], d23[]}, [r9], r4 + +@ CHECK: vld4.8 {d16[], d17[], d18[], d19[]}, [r1] @ encoding: [0x0f,0x0f,0xe1,0xf4] +@ CHECK: vld4.16 {d16[], d17[], d18[], d19[]}, [r2] @ encoding: [0x4f,0x0f,0xe2,0xf4] +@ CHECK: vld4.32 {d16[], d17[], d18[], d19[]}, [r3] @ encoding: [0x8f,0x0f,0xe3,0xf4] +@ CHECK: vld4.8 {d17[], d19[], d21[], d23[]}, [r7] @ encoding: [0x2f,0x1f,0xe7,0xf4] +@ CHECK: vld4.16 {d17[], d19[], d21[], d23[]}, [r7] @ encoding: [0x6f,0x1f,0xe7,0xf4] +@ CHECK: vld4.32 {d16[], d18[], d20[], d22[]}, [r8] @ encoding: [0xaf,0x0f,0xe8,0xf4] +@ CHECK: vld4.8 {d16[], d17[], d18[], d19[]}, [r1]! @ encoding: [0x0d,0x0f,0xe1,0xf4] +@ CHECK: vld4.16 {d16[], d17[], d18[], d19[]}, [r2]! @ encoding: [0x4d,0x0f,0xe2,0xf4] +@ CHECK: vld4.32 {d16[], d17[], d18[], d19[]}, [r3]! @ encoding: [0x8d,0x0f,0xe3,0xf4] +@ CHECK: vld4.8 {d17[], d18[], d19[], d20[]}, [r7]! @ encoding: [0x2d,0x1f,0xe7,0xf4] +@ CHECK: vld4.16 {d17[], d18[], d19[], d20[]}, [r7]! @ encoding: [0x6d,0x1f,0xe7,0xf4] +@ CHECK: vld4.32 {d16[], d18[], d20[], d22[]}, [r8]! @ encoding: [0xad,0x0f,0xe8,0xf4] +@ CHECK: vld4.8 {d16[], d17[], d18[], d19[]}, [r1], r8 @ encoding: [0x08,0x0f,0xe1,0xf4] +@ CHECK: vld4.16 {d16[], d17[], d18[], d19[]}, [r2], r7 @ encoding: [0x47,0x0f,0xe2,0xf4] +@ CHECK: vld4.32 {d16[], d17[], d18[], d19[]}, [r3], r5 @ encoding: [0x85,0x0f,0xe3,0xf4] +@ CHECK: vld4.8 {d16[], d18[], d20[], d22[]}, [r6], r3 @ encoding: [0x23,0x0f,0xe6,0xf4] +@ CHECK: vld4.16 {d16[], d18[], d20[], d22[]}, [r6], r3 @ encoding: [0x63,0x0f,0xe6,0xf4] +@ CHECK: vld4.32 {d17[], d19[], d21[], d23[]}, [r9], r4 @ encoding: [0xa4,0x1f,0xe9,0xf4] @ Handle 'Q' registers in register lists as if the sub-reg D regs were @ specified instead. diff --git a/test/MC/ARM/neon-vst-encoding.s b/test/MC/ARM/neon-vst-encoding.s index 3a4cb87..2b14d37 100644 --- a/test/MC/ARM/neon-vst-encoding.s +++ b/test/MC/ARM/neon-vst-encoding.s @@ -58,91 +58,191 @@ @ CHECK: vst2.32 {d8, d9, d10, d11}, [r0, :256]! @ encoding: [0xbd,0x83,0x00,0xf4] -@ vst3.8 {d16, d17, d18}, [r0, :64] -@ vst3.16 {d16, d17, d18}, [r0] -@ vst3.32 {d16, d17, d18}, [r0] -@ vst3.8 {d16, d18, d20}, [r0, :64]! -@ vst3.8 {d17, d19, d21}, [r0, :64]! -@ vst3.16 {d16, d18, d20}, [r0]! -@ vst3.16 {d17, d19, d21}, [r0]! -@ vst3.32 {d16, d18, d20}, [r0]! -@ vst3.32 {d17, d19, d21}, [r0]! - -@ FIXME: vst3.8 {d16, d17, d18}, [r0, :64] @ encoding: [0x1f,0x04,0x40,0xf4] -@ FIXME: vst3.16 {d16, d17, d18}, [r0] @ encoding: [0x4f,0x04,0x40,0xf4] -@ FIXME: vst3.32 {d16, d17, d18}, [r0] @ encoding: [0x8f,0x04,0x40,0xf4] -@ FIXME: vst3.8 {d16, d18, d20}, [r0, :64]! @ encoding: [0x1d,0x05,0x40,0xf4] -@ FIXME: vst3.8 {d17, d19, d21}, [r0, :64]! @ encoding: [0x1d,0x15,0x40,0xf4] -@ FIXME: vst3.16 {d16, d18, d20}, [r0]! @ encoding: [0x4d,0x05,0x40,0xf4] -@ FIXME: vst3.16 {d17, d19, d21}, [r0]! @ encoding: [0x4d,0x15,0x40,0xf4] -@ FIXME: vst3.32 {d16, d18, d20}, [r0]! @ encoding: [0x8d,0x05,0x40,0xf4] -@ FIXME: vst3.32 {d17, d19, d21}, [r0]! @ encoding: [0x8d,0x15,0x40,0xf4] - - -@ vst4.8 {d16, d17, d18, d19}, [r0, :64] -@ vst4.16 {d16, d17, d18, d19}, [r0, :128] -@ vst4.8 {d16, d18, d20, d22}, [r0, :256]! -@ vst4.8 {d17, d19, d21, d23}, [r0, :256]! -@ vst4.16 {d16, d18, d20, d22}, [r0]! -@ vst4.16 {d17, d19, d21, d23}, [r0]! -@ vst4.32 {d16, d18, d20, d22}, [r0]! -@ vst4.32 {d17, d19, d21, d23}, [r0]! - -@ FIXME: vst4.8 {d16, d17, d18, d19}, [r0, :64] @ encoding: [0x1f,0x00,0x40,0xf4] -@ FIXME: vst4.16 {d16, d17, d18, d19}, [r0, :128] @ encoding: [0x6f,0x00,0x40,0xf4] -@ FIXME: vst4.8 {d16, d18, d20, d22}, [r0, :256]! @ encoding: [0x3d,0x01,0x40,0xf4] -@ FIXME: vst4.8 {d17, d19, d21, d23}, [r0, :256]! @ encoding: [0x3d,0x11,0x40,0xf4] -@ FIXME: vst4.16 {d16, d18, d20, d22}, [r0]! @ encoding: [0x4d,0x01,0x40,0xf4] -@ FIXME: vst4.16 {d17, d19, d21, d23}, [r0]! @ encoding: [0x4d,0x11,0x40,0xf4] -@ FIXME: vst4.32 {d16, d18, d20, d22}, [r0]! @ encoding: [0x8d,0x01,0x40,0xf4] -@ FIXME: vst4.32 {d17, d19, d21, d23}, [r0]! @ encoding: [0x8d,0x11,0x40,0xf4] - - -@ vst2.8 {d16[1], d17[1]}, [r0, :16] -@ vst2.16 {d16[1], d17[1]}, [r0, :32] - vst2.32 {d16[1], d17[1]}, [r0] -@ vst2.16 {d17[1], d19[1]}, [r0] -@ vst2.32 {d17[0], d19[0]}, [r0, :64] + vst3.8 {d16, d17, d18}, [r1] + vst3.16 {d6, d7, d8}, [r2] + vst3.32 {d1, d2, d3}, [r3] + vst3.8 {d16, d18, d20}, [r0, :64] + vst3.u16 {d27, d29, d31}, [r4] + vst3.i32 {d6, d8, d10}, [r5] + + vst3.i8 {d12, d13, d14}, [r6], r1 + vst3.i16 {d11, d12, d13}, [r7], r2 + vst3.u32 {d2, d3, d4}, [r8], r3 + vst3.8 {d4, d6, d8}, [r9], r4 + vst3.u16 {d14, d16, d18}, [r9], r4 + vst3.i32 {d16, d18, d20}, [r10], r5 + + vst3.p8 {d6, d7, d8}, [r8]! + vst3.16 {d9, d10, d11}, [r7]! + vst3.f32 {d1, d2, d3}, [r6]! + vst3.8 {d16, d18, d20}, [r0, :64]! + vst3.p16 {d20, d22, d24}, [r5]! + vst3.32 {d5, d7, d9}, [r4]! + +@ CHECK: vst3.8 {d16, d17, d18}, [r1] @ encoding: [0x0f,0x04,0x41,0xf4] +@ CHECK: vst3.16 {d6, d7, d8}, [r2] @ encoding: [0x4f,0x64,0x02,0xf4] +@ CHECK: vst3.32 {d1, d2, d3}, [r3] @ encoding: [0x8f,0x14,0x03,0xf4] +@ CHECK: vst3.8 {d16, d18, d20}, [r0, :64] @ encoding: [0x1f,0x05,0x40,0xf4] +@ CHECK: vst3.16 {d27, d29, d31}, [r4] @ encoding: [0x4f,0xb5,0x44,0xf4] +@ CHECK: vst3.32 {d6, d8, d10}, [r5] @ encoding: [0x8f,0x65,0x05,0xf4] +@ CHECK: vst3.8 {d12, d13, d14}, [r6], r1 @ encoding: [0x01,0xc4,0x06,0xf4] +@ CHECK: vst3.16 {d11, d12, d13}, [r7], r2 @ encoding: [0x42,0xb4,0x07,0xf4] +@ CHECK: vst3.32 {d2, d3, d4}, [r8], r3 @ encoding: [0x83,0x24,0x08,0xf4] +@ CHECK: vst3.8 {d4, d6, d8}, [r9], r4 @ encoding: [0x04,0x45,0x09,0xf4] +@ CHECK: vst3.16 {d14, d16, d18}, [r9], r4 @ encoding: [0x44,0xe5,0x09,0xf4] +@ CHECK: vst3.32 {d16, d18, d20}, [r10], r5 @ encoding: [0x85,0x05,0x4a,0xf4] +@ CHECK: vst3.8 {d6, d7, d8}, [r8]! @ encoding: [0x0d,0x64,0x08,0xf4] +@ CHECK: vst3.16 {d9, d10, d11}, [r7]! @ encoding: [0x4d,0x94,0x07,0xf4] +@ CHECK: vst3.32 {d1, d2, d3}, [r6]! @ encoding: [0x8d,0x14,0x06,0xf4] +@ CHECK: vst3.8 {d16, d18, d20}, [r0, :64]! @ encoding: [0x1d,0x05,0x40,0xf4] +@ CHECK: vst3.16 {d20, d22, d24}, [r5]! @ encoding: [0x4d,0x45,0x45,0xf4] +@ CHECK: vst3.32 {d5, d7, d9}, [r4]! @ encoding: [0x8d,0x55,0x04,0xf4] + + + vst4.8 {d16, d17, d18, d19}, [r1, :64] + vst4.16 {d16, d17, d18, d19}, [r2, :128] + vst4.32 {d16, d17, d18, d19}, [r3, :256] + vst4.8 {d17, d19, d21, d23}, [r5, :256] + vst4.16 {d17, d19, d21, d23}, [r7] + vst4.32 {d16, d18, d20, d22}, [r8] + + vst4.s8 {d16, d17, d18, d19}, [r1, :64]! + vst4.s16 {d16, d17, d18, d19}, [r2, :128]! + vst4.s32 {d16, d17, d18, d19}, [r3, :256]! + vst4.u8 {d17, d19, d21, d23}, [r5, :256]! + vst4.u16 {d17, d19, d21, d23}, [r7]! + vst4.u32 {d16, d18, d20, d22}, [r8]! + + vst4.p8 {d16, d17, d18, d19}, [r1, :64], r8 + vst4.p16 {d16, d17, d18, d19}, [r2], r7 + vst4.f32 {d16, d17, d18, d19}, [r3, :64], r5 + vst4.i8 {d16, d18, d20, d22}, [r4, :256], r2 + vst4.i16 {d16, d18, d20, d22}, [r6], r3 + vst4.i32 {d17, d19, d21, d23}, [r9], r4 + +@ CHECK: vst4.8 {d16, d17, d18, d19}, [r1, :64] @ encoding: [0x1f,0x00,0x41,0xf4] +@ CHECK: vst4.16 {d16, d17, d18, d19}, [r2, :128] @ encoding: [0x6f,0x00,0x42,0xf4] +@ CHECK: vst4.32 {d16, d17, d18, d19}, [r3, :256] @ encoding: [0xbf,0x00,0x43,0xf4] +@ CHECK: vst4.8 {d17, d19, d21, d23}, [r5, :256] @ encoding: [0x3f,0x11,0x45,0xf4] +@ CHECK: vst4.16 {d17, d19, d21, d23}, [r7] @ encoding: [0x4f,0x11,0x47,0xf4] +@ CHECK: vst4.32 {d16, d18, d20, d22}, [r8] @ encoding: [0x8f,0x01,0x48,0xf4] +@ CHECK: vst4.8 {d16, d17, d18, d19}, [r1, :64]! @ encoding: [0x1d,0x00,0x41,0xf4] +@ CHECK: vst4.16 {d16, d17, d18, d19}, [r2, :128]! @ encoding: [0x6d,0x00,0x42,0xf4] +@ CHECK: vst4.32 {d16, d17, d18, d19}, [r3, :256]! @ encoding: [0xbd,0x00,0x43,0xf4] +@ CHECK: vst4.8 {d17, d19, d21, d23}, [r5, :256]! @ encoding: [0x3d,0x11,0x45,0xf4] +@ CHECK: vst4.16 {d17, d19, d21, d23}, [r7]! @ encoding: [0x4d,0x11,0x47,0xf4] +@ CHECK: vst4.32 {d16, d18, d20, d22}, [r8]! @ encoding: [0x8d,0x01,0x48,0xf4] +@ CHECK: vst4.8 {d16, d17, d18, d19}, [r1, :64], r8 @ encoding: [0x18,0x00,0x41,0xf4] +@ CHECK: vst4.16 {d16, d17, d18, d19}, [r2], r7 @ encoding: [0x47,0x00,0x42,0xf4] +@ CHECK: vst4.32 {d16, d17, d18, d19}, [r3, :64], r5 @ encoding: [0x95,0x00,0x43,0xf4] +@ CHECK: vst4.8 {d16, d18, d20, d22}, [r4, :256], r2 @ encoding: [0x32,0x01,0x44,0xf4] +@ CHECK: vst4.16 {d16, d18, d20, d22}, [r6], r3 @ encoding: [0x43,0x01,0x46,0xf4] +@ CHECK: vst4.32 {d17, d19, d21, d23}, [r9], r4 @ encoding: [0x84,0x11,0x49,0xf4] + + + vst2.8 {d16[1], d17[1]}, [r0, :16] + vst2.p16 {d16[1], d17[1]}, [r0, :32] + vst2.i32 {d16[1], d17[1]}, [r0] + vst2.u16 {d17[1], d19[1]}, [r0] + vst2.f32 {d17[0], d19[0]}, [r0, :64] vst2.8 {d2[4], d3[4]}, [r2], r3 - vst2.8 {d2[4], d3[4]}, [r2]! - vst2.8 {d2[4], d3[4]}, [r2] + vst2.u8 {d2[4], d3[4]}, [r2]! + vst2.p8 {d2[4], d3[4]}, [r2] -@ FIXME: vst2.8 {d16[1], d17[1]}, [r0, :16] @ encoding: [0x3f,0x01,0xc0,0xf4] -@ FIXME: vst2.16 {d16[1], d17[1]}, [r0, :32] @ encoding: [0x5f,0x05,0xc0,0xf4] + vst2.16 {d17[1], d19[1]}, [r0] + vst2.32 {d17[0], d19[0]}, [r0, :64] + vst2.i16 {d7[1], d9[1]}, [r1]! + vst2.32 {d6[0], d8[0]}, [r2, :64]! + vst2.16 {d2[1], d4[1]}, [r3], r5 + vst2.u32 {d5[0], d7[0]}, [r4, :64], r7 + +@ CHECK: vst2.8 {d16[1], d17[1]}, [r0, :16] @ encoding: [0x3f,0x01,0xc0,0xf4] +@ CHECK: vst2.16 {d16[1], d17[1]}, [r0, :32] @ encoding: [0x5f,0x05,0xc0,0xf4] @ CHECK: vst2.32 {d16[1], d17[1]}, [r0] @ encoding: [0x8f,0x09,0xc0,0xf4] -@ FIXME: vst2.16 {d17[1], d19[1]}, [r0] @ encoding: [0x6f,0x15,0xc0,0xf4] -@ FIXME: vst2.32 {d17[0], d19[0]}, [r0, :64] @ encoding: [0x5f,0x19,0xc0,0xf4] +@ CHECK: vst2.16 {d17[1], d19[1]}, [r0] @ encoding: [0x6f,0x15,0xc0,0xf4] +@ CHECK: vst2.32 {d17[0], d19[0]}, [r0, :64] @ encoding: [0x5f,0x19,0xc0,0xf4] @ CHECK: vst2.8 {d2[4], d3[4]}, [r2], r3 @ encoding: [0x83,0x21,0x82,0xf4] @ CHECK: vst2.8 {d2[4], d3[4]}, [r2]! @ encoding: [0x8d,0x21,0x82,0xf4] @ CHECK: vst2.8 {d2[4], d3[4]}, [r2] @ encoding: [0x8f,0x21,0x82,0xf4] +@ CHECK: vst2.16 {d17[1], d19[1]}, [r0] @ encoding: [0x6f,0x15,0xc0,0xf4] +@ CHECK: vst2.32 {d17[0], d19[0]}, [r0, :64] @ encoding: [0x5f,0x19,0xc0,0xf4] +@ CHECK: vst2.16 {d7[1], d9[1]}, [r1]! @ encoding: [0x6d,0x75,0x81,0xf4] +@ CHECK: vst2.32 {d6[0], d8[0]}, [r2, :64]! @ encoding: [0x5d,0x69,0x82,0xf4] +@ CHECK: vst2.16 {d2[1], d4[1]}, [r3], r5 @ encoding: [0x65,0x25,0x83,0xf4] +@ CHECK: vst2.32 {d5[0], d7[0]}, [r4, :64], r7 @ encoding: [0x57,0x59,0x84,0xf4] + + + vst3.8 {d16[1], d17[1], d18[1]}, [r1] + vst3.16 {d6[1], d7[1], d8[1]}, [r2] + vst3.32 {d1[1], d2[1], d3[1]}, [r3] + vst3.u16 {d27[1], d29[1], d31[1]}, [r4] + vst3.i32 {d6[1], d8[1], d10[1]}, [r5] + + vst3.i8 {d12[1], d13[1], d14[1]}, [r6], r1 + vst3.i16 {d11[1], d12[1], d13[1]}, [r7], r2 + vst3.u32 {d2[1], d3[1], d4[1]}, [r8], r3 + vst3.u16 {d14[1], d16[1], d18[1]}, [r9], r4 + vst3.i32 {d16[1], d18[1], d20[1]}, [r10], r5 + + vst3.p8 {d6[1], d7[1], d8[1]}, [r8]! + vst3.16 {d9[1], d10[1], d11[1]}, [r7]! + vst3.f32 {d1[1], d2[1], d3[1]}, [r6]! + vst3.p16 {d20[1], d22[1], d24[1]}, [r5]! + vst3.32 {d5[1], d7[1], d9[1]}, [r4]! + +@ CHECK: vst3.8 {d16[1], d17[1], d18[1]}, [r1] @ encoding: [0x2f,0x02,0xc1,0xf4] +@ CHECK: vst3.16 {d6[1], d7[1], d8[1]}, [r2] @ encoding: [0x4f,0x66,0x82,0xf4] +@ CHECK: vst3.32 {d1[1], d2[1], d3[1]}, [r3] @ encoding: [0x8f,0x1a,0x83,0xf4] +@ CHECK: vst3.16 {d27[1], d29[1], d31[1]}, [r4] @ encoding: [0x6f,0xb6,0xc4,0xf4] +@ CHECK: vst3.32 {d6[1], d8[1], d10[1]}, [r5] @ encoding: [0xcf,0x6a,0x85,0xf4] +@ CHECK: vst3.8 {d12[1], d13[1], d14[1]}, [r6], r1 @ encoding: [0x21,0xc2,0x86,0xf4] +@ CHECK: vst3.16 {d11[1], d12[1], d13[1]}, [r7], r2 @ encoding: [0x42,0xb6,0x87,0xf4] +@ CHECK: vst3.32 {d2[1], d3[1], d4[1]}, [r8], r3 @ encoding: [0x83,0x2a,0x88,0xf4] +@ CHECK: vst3.16 {d14[1], d16[1], d18[1]}, [r9], r4 @ encoding: [0x64,0xe6,0x89,0xf4] +@ CHECK: vst3.32 {d16[1], d18[1], d20[1]}, [r10], r5 @ encoding: [0xc5,0x0a,0xca,0xf4] +@ CHECK: vst3.8 {d6[1], d7[1], d8[1]}, [r8]! @ encoding: [0x2d,0x62,0x88,0xf4] +@ CHECK: vst3.16 {d9[1], d10[1], d11[1]}, [r7]! @ encoding: [0x4d,0x96,0x87,0xf4] +@ CHECK: vst3.32 {d1[1], d2[1], d3[1]}, [r6]! @ encoding: [0x8d,0x1a,0x86,0xf4] +@ CHECK: vst3.16 {d20[1], d21[1], d22[1]}, [r5]! @ encoding: [0x6d,0x46,0xc5,0xf4] +@ CHECK: vst3.32 {d5[1], d7[1], d9[1]}, [r4]! @ encoding: [0xcd,0x5a,0x84,0xf4] -@ vst3.8 {d16[1], d17[1], d18[1]}, [r0] -@ vst3.16 {d16[1], d17[1], d18[1]}, [r0] -@ vst3.32 {d16[1], d17[1], d18[1]}, [r0] -@ vst3.16 {d17[2], d19[2], d21[2]}, [r0] -@ vst3.32 {d16[0], d18[0], d20[0]}, [r0] -@ FIXME: vst3.8 {d16[1], d17[1], d18[1]}, [r0] @ encoding: [0x2f,0x02,0xc0,0xf4] -@ FIXME: vst3.16 {d16[1], d17[1], d18[1]}, [r0]@ encoding: [0x4f,0x06,0xc0,0xf4] -@ FIXME: vst3.32 {d16[1], d17[1], d18[1]}, [r0]@ encoding: [0x8f,0x0a,0xc0,0xf4] -@ FIXME: vst3.16 {d17[2], d19[2], d21[2]}, [r0]@ encoding: [0xaf,0x16,0xc0,0xf4] -@ FIXME: vst3.32 {d16[0], d18[0], d20[0]}, [r0]@ encoding: [0x4f,0x0a,0xc0,0xf4] + vst4.8 {d16[1], d17[1], d18[1], d19[1]}, [r1] + vst4.16 {d16[1], d17[1], d18[1], d19[1]}, [r2] + vst4.32 {d16[1], d17[1], d18[1], d19[1]}, [r3] + vst4.16 {d17[1], d19[1], d21[1], d23[1]}, [r7] + vst4.32 {d16[1], d18[1], d20[1], d22[1]}, [r8] + vst4.s8 {d16[1], d17[1], d18[1], d19[1]}, [r1, :32]! + vst4.s16 {d16[1], d17[1], d18[1], d19[1]}, [r2, :64]! + vst4.s32 {d16[1], d17[1], d18[1], d19[1]}, [r3, :128]! + vst4.u16 {d17[1], d19[1], d21[1], d23[1]}, [r7]! + vst4.u32 {d16[1], d18[1], d20[1], d22[1]}, [r8]! -@ vst4.8 {d16[1], d17[1], d18[1], d19[1]}, [r0, :32] -@ vst4.16 {d16[1], d17[1], d18[1], d19[1]}, [r0] -@ vst4.32 {d16[1], d17[1], d18[1], d19[1]}, [r0, :128] -@ vst4.16 {d17[3], d19[3], d21[3], d23[3]}, [r0, :64] -@ vst4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0] + vst4.p8 {d16[1], d17[1], d18[1], d19[1]}, [r1, :32], r8 + vst4.p16 {d16[1], d17[1], d18[1], d19[1]}, [r2], r7 + vst4.f32 {d16[1], d17[1], d18[1], d19[1]}, [r3, :64], r5 + vst4.i16 {d16[1], d18[1], d20[1], d22[1]}, [r6], r3 + vst4.i32 {d17[1], d19[1], d21[1], d23[1]}, [r9], r4 -@ FIXME: vst4.8 {d16[1], d17[1], d18[1], d19[1]}, [r0, :32] @ encoding: [0x3f,0x03,0xc0,0xf4] -@ FIXME: vst4.16 {d16[1], d17[1], d18[1], d19[1]}, [r0] @ encoding: [0x4f,0x07,0xc0,0xf4] -@ FIXME: vst4.32 {d16[1], d17[1], d18[1], d19[1]}, [r0, :128] @ encoding: [0xaf,0x0b,0xc0,0xf4] -@ FIXME: vst4.16 {d17[3], d19[3], d21[3], d23[3]}, [r0, :64] @ encoding: [0xff,0x17,0xc0,0xf4] -@ FIXME: vst4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0] @ encoding: [0x4f,0x1b,0xc0,0xf4] +@ CHECK: vst4.8 {d16[1], d17[1], d18[1], d19[1]}, [r1] @ encoding: [0x2f,0x03,0xc1,0xf4] +@ CHECK: vst4.16 {d16[1], d17[1], d18[1], d19[1]}, [r2] @ encoding: [0x4f,0x07,0xc2,0xf4] +@ CHECK: vst4.32 {d16[1], d17[1], d18[1], d19[1]}, [r3] @ encoding: [0x8f,0x0b,0xc3,0xf4] +@ CHECK: vst4.16 {d17[1], d19[1], d21[1], d23[1]}, [r7] @ encoding: [0x6f,0x17,0xc7,0xf4] +@ CHECK: vst4.32 {d16[1], d18[1], d20[1], d22[1]}, [r8] @ encoding: [0xcf,0x0b,0xc8,0xf4] +@ CHECK: vst4.8 {d16[1], d17[1], d18[1], d19[1]}, [r1, :32]! @ encoding: [0x3d,0x03,0xc1,0xf4] +@ CHECK: vst4.16 {d16[1], d17[1], d18[1], d19[1]}, [r2, :64]! @ encoding: [0x5d,0x07,0xc2,0xf4] +@ CHECK: vst4.32 {d16[1], d17[1], d18[1], d19[1]}, [r3, :128]! @ encoding: [0xad,0x0b,0xc3,0xf4] +@ CHECK: vst4.16 {d17[1], d18[1], d19[1], d20[1]}, [r7]! @ encoding: [0x6d,0x17,0xc7,0xf4] +@ CHECK: vst4.32 {d16[1], d18[1], d20[1], d22[1]}, [r8]! @ encoding: [0xcd,0x0b,0xc8,0xf4] +@ CHECK: vst4.8 {d16[1], d17[1], d18[1], d19[1]}, [r1, :32], r8 @ encoding: [0x38,0x03,0xc1,0xf4] +@ CHECK: vst4.16 {d16[1], d17[1], d18[1], d19[1]}, [r2], r7 @ encoding: [0x47,0x07,0xc2,0xf4] +@ CHECK: vst4.32 {d16[1], d17[1], d18[1], d19[1]}, [r3, :64], r5 @ encoding: [0x95,0x0b,0xc3,0xf4] +@ CHECK: vst4.16 {d16[1], d18[1], d20[1], d22[1]}, [r6], r3 @ encoding: [0x63,0x07,0xc6,0xf4] +@ CHECK: vst4.32 {d17[1], d19[1], d21[1], d23[1]}, [r9], r4 @ encoding: [0xc4,0x1b,0xc9,0xf4] @ Spot-check additional size-suffix aliases. diff --git a/test/MC/ARM/neont2-minmax-encoding.s b/test/MC/ARM/neont2-minmax-encoding.s index 7e86d45..9ecadce 100644 --- a/test/MC/ARM/neont2-minmax-encoding.s +++ b/test/MC/ARM/neont2-minmax-encoding.s @@ -2,59 +2,125 @@ .code 16 -@ CHECK: vmin.s8 d16, d16, d17 @ encoding: [0x40,0xef,0xb1,0x06] - vmin.s8 d16, d16, d17 -@ CHECK: vmin.s16 d16, d16, d17 @ encoding: [0x50,0xef,0xb1,0x06] - vmin.s16 d16, d16, d17 -@ CHECK: vmin.s32 d16, d16, d17 @ encoding: [0x60,0xef,0xb1,0x06] - vmin.s32 d16, d16, d17 -@ CHECK: vmin.u8 d16, d16, d17 @ encoding: [0x40,0xff,0xb1,0x06] - vmin.u8 d16, d16, d17 -@ CHECK: vmin.u16 d16, d16, d17 @ encoding: [0x50,0xff,0xb1,0x06] - vmin.u16 d16, d16, d17 -@ CHECK: vmin.u32 d16, d16, d17 @ encoding: [0x60,0xff,0xb1,0x06] - vmin.u32 d16, d16, d17 -@ CHECK: vmin.f32 d16, d16, d17 @ encoding: [0x60,0xef,0xa1,0x0f] - vmin.f32 d16, d16, d17 -@ CHECK: vmin.s8 q8, q8, q9 @ encoding: [0x40,0xef,0xf2,0x06] - vmin.s8 q8, q8, q9 -@ CHECK: vmin.s16 q8, q8, q9 @ encoding: [0x50,0xef,0xf2,0x06] - vmin.s16 q8, q8, q9 -@ CHECK: vmin.s32 q8, q8, q9 @ encoding: [0x60,0xef,0xf2,0x06] - vmin.s32 q8, q8, q9 -@ CHECK: vmin.u8 q8, q8, q9 @ encoding: [0x40,0xff,0xf2,0x06] - vmin.u8 q8, q8, q9 -@ CHECK: vmin.u16 q8, q8, q9 @ encoding: [0x50,0xff,0xf2,0x06] - vmin.u16 q8, q8, q9 -@ CHECK: vmin.u32 q8, q8, q9 @ encoding: [0x60,0xff,0xf2,0x06] - vmin.u32 q8, q8, q9 -@ CHECK: vmin.f32 q8, q8, q9 @ encoding: [0x60,0xef,0xe2,0x0f] - vmin.f32 q8, q8, q9 -@ CHECK: vmax.s8 d16, d16, d17 @ encoding: [0x40,0xef,0xa1,0x06] - vmax.s8 d16, d16, d17 -@ CHECK: vmax.s16 d16, d16, d17 @ encoding: [0x50,0xef,0xa1,0x06] - vmax.s16 d16, d16, d17 -@ CHECK: vmax.s32 d16, d16, d17 @ encoding: [0x60,0xef,0xa1,0x06] - vmax.s32 d16, d16, d17 -@ CHECK: vmax.u8 d16, d16, d17 @ encoding: [0x40,0xff,0xa1,0x06] - vmax.u8 d16, d16, d17 -@ CHECK: vmax.u16 d16, d16, d17 @ encoding: [0x50,0xff,0xa1,0x06] - vmax.u16 d16, d16, d17 -@ CHECK: vmax.u32 d16, d16, d17 @ encoding: [0x60,0xff,0xa1,0x06] - vmax.u32 d16, d16, d17 -@ CHECK: vmax.f32 d16, d16, d17 @ encoding: [0x40,0xef,0xa1,0x0f] - vmax.f32 d16, d16, d17 -@ CHECK: vmax.s8 q8, q8, q9 @ encoding: [0x40,0xef,0xe2,0x06] - vmax.s8 q8, q8, q9 -@ CHECK: vmax.s16 q8, q8, q9 @ encoding: [0x50,0xef,0xe2,0x06] - vmax.s16 q8, q8, q9 + vmax.s8 d1, d2, d3 + vmax.s16 d4, d5, d6 + vmax.s32 d7, d8, d9 + vmax.u8 d10, d11, d12 + vmax.u16 d13, d14, d15 + vmax.u32 d16, d17, d18 + vmax.f32 d19, d20, d21 + + vmax.s8 d2, d3 + vmax.s16 d5, d6 + vmax.s32 d8, d9 + vmax.u8 d11, d12 + vmax.u16 d14, d15 + vmax.u32 d17, d18 + vmax.f32 d20, d21 + + vmax.s8 q1, q2, q3 + vmax.s16 q4, q5, q6 + vmax.s32 q7, q8, q9 + vmax.u8 q10, q11, q12 + vmax.u16 q13, q14, q15 + vmax.u32 q6, q7, q8 + vmax.f32 q9, q5, q1 + + vmax.s8 q2, q3 + vmax.s16 q5, q6 + vmax.s32 q8, q9 + vmax.u8 q11, q2 + vmax.u16 q4, q5 + vmax.u32 q7, q8 + vmax.f32 q2, q1 + +@ CHECK: vmax.s8 d1, d2, d3 @ encoding: [0x02,0xef,0x03,0x16] +@ CHECK: vmax.s16 d4, d5, d6 @ encoding: [0x15,0xef,0x06,0x46] +@ CHECK: vmax.s32 d7, d8, d9 @ encoding: [0x28,0xef,0x09,0x76] +@ CHECK: vmax.u8 d10, d11, d12 @ encoding: [0x0b,0xff,0x0c,0xa6] +@ CHECK: vmax.u16 d13, d14, d15 @ encoding: [0x1e,0xff,0x0f,0xd6] +@ CHECK: vmax.u32 d16, d17, d18 @ encoding: [0x61,0xff,0xa2,0x06] +@ CHECK: vmax.f32 d19, d20, d21 @ encoding: [0x44,0xef,0xa5,0x3f] +@ CHECK: vmax.s8 d2, d2, d3 @ encoding: [0x02,0xef,0x03,0x26] +@ CHECK: vmax.s16 d5, d5, d6 @ encoding: [0x15,0xef,0x06,0x56] +@ CHECK: vmax.s32 d8, d8, d9 @ encoding: [0x28,0xef,0x09,0x86] +@ CHECK: vmax.u8 d11, d11, d12 @ encoding: [0x0b,0xff,0x0c,0xb6] +@ CHECK: vmax.u16 d14, d14, d15 @ encoding: [0x1e,0xff,0x0f,0xe6] +@ CHECK: vmax.u32 d17, d17, d18 @ encoding: [0x61,0xff,0xa2,0x16] +@ CHECK: vmax.f32 d20, d20, d21 @ encoding: [0x44,0xef,0xa5,0x4f] +@ CHECK: vmax.s8 q1, q2, q3 @ encoding: [0x04,0xef,0x46,0x26] +@ CHECK: vmax.s16 q4, q5, q6 @ encoding: [0x1a,0xef,0x4c,0x86] +@ CHECK: vmax.s32 q7, q8, q9 @ encoding: [0x20,0xef,0xe2,0xe6] +@ CHECK: vmax.u8 q10, q11, q12 @ encoding: [0x46,0xff,0xe8,0x46] +@ CHECK: vmax.u16 q13, q14, q15 @ encoding: [0x5c,0xff,0xee,0xa6] +@ CHECK: vmax.u32 q6, q7, q8 @ encoding: [0x2e,0xff,0x60,0xc6] +@ CHECK: vmax.f32 q9, q5, q1 @ encoding: [0x4a,0xef,0x42,0x2f] +@ CHECK: vmax.s8 q2, q2, q3 @ encoding: [0x04,0xef,0x46,0x46] +@ CHECK: vmax.s16 q5, q5, q6 @ encoding: [0x1a,0xef,0x4c,0xa6] @ CHECK: vmax.s32 q8, q8, q9 @ encoding: [0x60,0xef,0xe2,0x06] - vmax.s32 q8, q8, q9 -@ CHECK: vmax.u8 q8, q8, q9 @ encoding: [0x40,0xff,0xe2,0x06] - vmax.u8 q8, q8, q9 -@ CHECK: vmax.u16 q8, q8, q9 @ encoding: [0x50,0xff,0xe2,0x06] - vmax.u16 q8, q8, q9 -@ CHECK: vmax.u32 q8, q8, q9 @ encoding: [0x60,0xff,0xe2,0x06] - vmax.u32 q8, q8, q9 -@ CHECK: vmax.f32 q8, q8, q9 @ encoding: [0x40,0xef,0xe2,0x0f] - vmax.f32 q8, q8, q9 +@ CHECK: vmax.u8 q11, q11, q2 @ encoding: [0x46,0xff,0xc4,0x66] +@ CHECK: vmax.u16 q4, q4, q5 @ encoding: [0x18,0xff,0x4a,0x86] +@ CHECK: vmax.u32 q7, q7, q8 @ encoding: [0x2e,0xff,0x60,0xe6] +@ CHECK: vmax.f32 q2, q2, q1 @ encoding: [0x04,0xef,0x42,0x4f] + + + vmin.s8 d1, d2, d3 + vmin.s16 d4, d5, d6 + vmin.s32 d7, d8, d9 + vmin.u8 d10, d11, d12 + vmin.u16 d13, d14, d15 + vmin.u32 d16, d17, d18 + vmin.f32 d19, d20, d21 + + vmin.s8 d2, d3 + vmin.s16 d5, d6 + vmin.s32 d8, d9 + vmin.u8 d11, d12 + vmin.u16 d14, d15 + vmin.u32 d17, d18 + vmin.f32 d20, d21 + + vmin.s8 q1, q2, q3 + vmin.s16 q4, q5, q6 + vmin.s32 q7, q8, q9 + vmin.u8 q10, q11, q12 + vmin.u16 q13, q14, q15 + vmin.u32 q6, q7, q8 + vmin.f32 q9, q5, q1 + + vmin.s8 q2, q3 + vmin.s16 q5, q6 + vmin.s32 q8, q9 + vmin.u8 q11, q2 + vmin.u16 q4, q5 + vmin.u32 q7, q8 + vmin.f32 q2, q1 + +@ CHECK: vmin.s8 d1, d2, d3 @ encoding: [0x02,0xef,0x13,0x16] +@ CHECK: vmin.s16 d4, d5, d6 @ encoding: [0x15,0xef,0x16,0x46] +@ CHECK: vmin.s32 d7, d8, d9 @ encoding: [0x28,0xef,0x19,0x76] +@ CHECK: vmin.u8 d10, d11, d12 @ encoding: [0x0b,0xff,0x1c,0xa6] +@ CHECK: vmin.u16 d13, d14, d15 @ encoding: [0x1e,0xff,0x1f,0xd6] +@ CHECK: vmin.u32 d16, d17, d18 @ encoding: [0x61,0xff,0xb2,0x06] +@ CHECK: vmin.f32 d19, d20, d21 @ encoding: [0x64,0xef,0xa5,0x3f] +@ CHECK: vmin.s8 d2, d2, d3 @ encoding: [0x02,0xef,0x13,0x26] +@ CHECK: vmin.s16 d5, d5, d6 @ encoding: [0x15,0xef,0x16,0x56] +@ CHECK: vmin.s32 d8, d8, d9 @ encoding: [0x28,0xef,0x19,0x86] +@ CHECK: vmin.u8 d11, d11, d12 @ encoding: [0x0b,0xff,0x1c,0xb6] +@ CHECK: vmin.u16 d14, d14, d15 @ encoding: [0x1e,0xff,0x1f,0xe6] +@ CHECK: vmin.u32 d17, d17, d18 @ encoding: [0x61,0xff,0xb2,0x16] +@ CHECK: vmin.f32 d20, d20, d21 @ encoding: [0x64,0xef,0xa5,0x4f] +@ CHECK: vmin.s8 q1, q2, q3 @ encoding: [0x04,0xef,0x56,0x26] +@ CHECK: vmin.s16 q4, q5, q6 @ encoding: [0x1a,0xef,0x5c,0x86] +@ CHECK: vmin.s32 q7, q8, q9 @ encoding: [0x20,0xef,0xf2,0xe6] +@ CHECK: vmin.u8 q10, q11, q12 @ encoding: [0x46,0xff,0xf8,0x46] +@ CHECK: vmin.u16 q13, q14, q15 @ encoding: [0x5c,0xff,0xfe,0xa6] +@ CHECK: vmin.u32 q6, q7, q8 @ encoding: [0x2e,0xff,0x70,0xc6] +@ CHECK: vmin.f32 q9, q5, q1 @ encoding: [0x6a,0xef,0x42,0x2f] +@ CHECK: vmin.s8 q2, q2, q3 @ encoding: [0x04,0xef,0x56,0x46] +@ CHECK: vmin.s16 q5, q5, q6 @ encoding: [0x1a,0xef,0x5c,0xa6] +@ CHECK: vmin.s32 q8, q8, q9 @ encoding: [0x60,0xef,0xf2,0x06] +@ CHECK: vmin.u8 q11, q11, q2 @ encoding: [0x46,0xff,0xd4,0x66] +@ CHECK: vmin.u16 q4, q4, q5 @ encoding: [0x18,0xff,0x5a,0x86] +@ CHECK: vmin.u32 q7, q7, q8 @ encoding: [0x2e,0xff,0x70,0xe6] +@ CHECK: vmin.f32 q2, q2, q1 @ encoding: [0x24,0xef,0x42,0x4f] diff --git a/test/MC/ARM/neont2-mul-encoding.s b/test/MC/ARM/neont2-mul-encoding.s index a9de38e..dfbb667 100644 --- a/test/MC/ARM/neont2-mul-encoding.s +++ b/test/MC/ARM/neont2-mul-encoding.s @@ -70,9 +70,9 @@ vqdmull.s16 q8, d16, d17 vqdmull.s32 q8, d16, d17 -@ vqdmull.s16 q1, d7, d1[1] + vqdmull.s16 q1, d7, d1[1] @ CHECK: vqdmull.s16 q8, d16, d17 @ encoding: [0xd0,0xef,0xa1,0x0d] @ CHECK: vqdmull.s32 q8, d16, d17 @ encoding: [0xe0,0xef,0xa1,0x0d] -@ FIXME: vqdmull.s16 q1, d7, d1[1] @ encoding: [0x97,0xef,0x49,0x3b] +@ CHECK: vqdmull.s16 q1, d7, d1[1] @ encoding: [0x97,0xef,0x49,0x2b] diff --git a/test/MC/ARM/pr11877.s b/test/MC/ARM/pr11877.s new file mode 100644 index 0000000..da3f6ad --- /dev/null +++ b/test/MC/ARM/pr11877.s @@ -0,0 +1,6 @@ +// RUN: llvm-mc -triple arm-unknown-unknown %s + +i: + .long g +g = h +h = i diff --git a/test/MC/ARM/simple-fp-encoding.s b/test/MC/ARM/simple-fp-encoding.s index 58abe88..a40e02b 100644 --- a/test/MC/ARM/simple-fp-encoding.s +++ b/test/MC/ARM/simple-fp-encoding.s @@ -271,3 +271,51 @@ @ CHECK: vmovne s25, s26, r2, r5 vmovne s25, s26, r2, r5 @ encoding: [0x39,0x2a,0x45,0x1c] + +@ VMOV w/ optional data type suffix. + vmov.32 s1, r8 + vmov.s16 s2, r4 + vmov.16 s3, r6 + vmov.u32 s4, r1 + vmov.p8 s5, r2 + vmov.8 s6, r3 + + vmov.32 r1, s8 + vmov.s16 r2, s4 + vmov.16 r3, s6 + vmov.u32 r4, s1 + vmov.p8 r5, s2 + vmov.8 r6, s3 + +@ CHECK: vmov s1, r8 @ encoding: [0x90,0x8a,0x00,0xee] +@ CHECK: vmov s2, r4 @ encoding: [0x10,0x4a,0x01,0xee] +@ CHECK: vmov s3, r6 @ encoding: [0x90,0x6a,0x01,0xee] +@ CHECK: vmov s4, r1 @ encoding: [0x10,0x1a,0x02,0xee] +@ CHECK: vmov s5, r2 @ encoding: [0x90,0x2a,0x02,0xee] +@ CHECK: vmov s6, r3 @ encoding: [0x10,0x3a,0x03,0xee] +@ CHECK: vmov r1, s8 @ encoding: [0x10,0x1a,0x14,0xee] +@ CHECK: vmov r2, s4 @ encoding: [0x10,0x2a,0x12,0xee] +@ CHECK: vmov r3, s6 @ encoding: [0x10,0x3a,0x13,0xee] +@ CHECK: vmov r4, s1 @ encoding: [0x90,0x4a,0x10,0xee] +@ CHECK: vmov r5, s2 @ encoding: [0x10,0x5a,0x11,0xee] +@ CHECK: vmov r6, s3 @ encoding: [0x90,0x6a,0x11,0xee] + + +@ VCVT (between floating-point and fixed-point) + vcvt.f32.u32 s0, s0, #20 + vcvt.f64.s32 d0, d0, #32 + vcvt.f32.u16 s0, s0, #1 + vcvt.f64.s16 d0, d0, #16 + +@ CHECK: vcvt.f32.u32 s0, s0, #20 @ encoding: [0xc6,0x0a,0xbb,0xee] +@ CHECK: vcvt.f64.s32 d0, d0, #32 @ encoding: [0xc0,0x0b,0xba,0xee] +@ CHECK: vcvt.f32.u16 s0, s0, #1 @ encoding: [0x67,0x0a,0xbb,0xee] +@ CHECK: vcvt.f64.s16 d0, d0, #16 @ encoding: [0x40,0x0b,0xba,0xee] + + +@ Use NEON to load some f32 immediates that don't fit the f8 representation. + vmov.f32 d4, #0.0 + vmov.f32 d4, #32.0 + +@ CHECK: vmov.i32 d4, #0x0 @ encoding: [0x10,0x40,0x80,0xf2] +@ CHECK: vmov.i32 d4, #0x42000000 @ encoding: [0x12,0x46,0x84,0xf2] diff --git a/test/MC/AsmParser/cfi-unfinished-frame.s b/test/MC/AsmParser/cfi-unfinished-frame.s new file mode 100644 index 0000000..1182d52 --- /dev/null +++ b/test/MC/AsmParser/cfi-unfinished-frame.s @@ -0,0 +1,5 @@ +// RUN: not llvm-mc -filetype=asm -triple x86_64-pc-linux-gnu %s -o %t 2>%t.out +// RUN: FileCheck -input-file=%t.out %s + +.cfi_startproc +// CHECK: Unfinished frame diff --git a/test/MC/AsmParser/dg.exp b/test/MC/AsmParser/dg.exp deleted file mode 100644 index a6d81da..0000000 --- a/test/MC/AsmParser/dg.exp +++ /dev/null @@ -1,5 +0,0 @@ -load_lib llvm.exp - -if { [llvm_supports_target X86] } { - RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{s}]] -} diff --git a/test/MC/AsmParser/directive_file-errors.s b/test/MC/AsmParser/directive_file-errors.s new file mode 100644 index 0000000..5ae2bbe --- /dev/null +++ b/test/MC/AsmParser/directive_file-errors.s @@ -0,0 +1,9 @@ +// RUN: not llvm-mc -g -triple i386-unknown-unknown %s 2> %t.err | FileCheck %s +// RUN: FileCheck --check-prefix=CHECK-ERRORS %s < %t.err +// Test for Bug 11740 + + .file "hello" + .file 1 "world" + +// CHECK: .file "hello" +// CHECK-ERRORS:6:9: error: input can't have .file dwarf directives when -g is used to generate dwarf debug info for assembly code diff --git a/test/MC/AsmParser/lit.local.cfg b/test/MC/AsmParser/lit.local.cfg new file mode 100644 index 0000000..1f53769 --- /dev/null +++ b/test/MC/AsmParser/lit.local.cfg @@ -0,0 +1,13 @@ +config.suffixes = ['.s'] + +def getRoot(config): + if not config.parent: + return config + return getRoot(config.parent) + +root = getRoot(config) + +targets = set(root.targets_to_build.split()) +if not 'X86' in targets: + config.unsupported = True + diff --git a/test/MC/AsmParser/pr11865.s b/test/MC/AsmParser/pr11865.s new file mode 100644 index 0000000..1c03e11 --- /dev/null +++ b/test/MC/AsmParser/pr11865.s @@ -0,0 +1,6 @@ +// RUN: llvm-mc -triple i386-unknown-unknown %s + +i: + .long g +g = h +h = i diff --git a/test/MC/AsmParser/variables-invalid.s b/test/MC/AsmParser/variables-invalid.s index 9656889..21758d2 100644 --- a/test/MC/AsmParser/variables-invalid.s +++ b/test/MC/AsmParser/variables-invalid.s @@ -2,7 +2,7 @@ // RUN: FileCheck --input-file %t %s .data -// CHECK: invalid assignment to 't0_v0' +// CHECK: Recursive use of 't0_v0' t0_v0 = t0_v0 + 1 t1_v1 = 1 @@ -15,3 +15,13 @@ t2_s0: t3_s0 = t2_s0 + 1 // CHECK: invalid reassignment of non-absolute variable 't3_s0' t3_s0 = 1 + + +// CHECK: Recursive use of 't4_s2' + t4_s0 = t4_s1 + t4_s1 = t4_s2 + t4_s2 = t4_s0 + +// CHECK: Recursive use of 't5_s1' + t5_s0 = t5_s1 + 1 + t5_s1 = t5_s0 diff --git a/test/MC/COFF/dg.exp b/test/MC/COFF/dg.exp deleted file mode 100644 index d46d700..0000000 --- a/test/MC/COFF/dg.exp +++ /dev/null @@ -1,5 +0,0 @@ -load_lib llvm.exp - -if { [llvm_supports_target X86] } { - RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,s}]] -} diff --git a/test/MC/COFF/global_ctors.ll b/test/MC/COFF/global_ctors.ll new file mode 100644 index 0000000..4d6b1c7 --- /dev/null +++ b/test/MC/COFF/global_ctors.ll @@ -0,0 +1,28 @@ +; Test that global ctors are emitted into the proper COFF section for the +; target. Mingw uses .ctors, whereas MSVC uses .CRT$XC*. +; RUN: llc < %s -mtriple i686-pc-win32 | FileCheck %s --check-prefix WIN32 +; RUN: llc < %s -mtriple x86_64-pc-win32 | FileCheck %s --check-prefix WIN32 +; RUN: llc < %s -mtriple i686-pc-mingw32 | FileCheck %s --check-prefix MINGW32 +; RUN: llc < %s -mtriple x86_64-pc-mingw32 | FileCheck %s --check-prefix MINGW32 + +@.str = private unnamed_addr constant [13 x i8] c"constructing\00", align 1 +@.str2 = private unnamed_addr constant [5 x i8] c"main\00", align 1 + +@llvm.global_ctors = appending global [1 x { i32, void ()* }] [{ i32, void ()* } { i32 65535, void ()* @a_global_ctor }] + +declare i32 @puts(i8*) + +define void @a_global_ctor() nounwind { + %1 = call i32 @puts(i8* getelementptr inbounds ([13 x i8]* @.str, i32 0, i32 0)) + ret void +} + +define i32 @main() nounwind { + %1 = call i32 @puts(i8* getelementptr inbounds ([5 x i8]* @.str2, i32 0, i32 0)) + ret i32 0 +} + +; WIN32: .section .CRT$XCU,"r" +; WIN32: a_global_ctor +; MINGW32: .section .ctors,"w" +; MINGW32: a_global_ctor diff --git a/test/MC/COFF/lit.local.cfg b/test/MC/COFF/lit.local.cfg new file mode 100644 index 0000000..ec8d4d3 --- /dev/null +++ b/test/MC/COFF/lit.local.cfg @@ -0,0 +1,13 @@ +config.suffixes = ['.s', '.ll'] + +def getRoot(config): + if not config.parent: + return config + return getRoot(config.parent) + +root = getRoot(config) + +targets = set(root.targets_to_build.split()) +if not 'X86' in targets: + config.unsupported = True + diff --git a/test/MC/COFF/secrel32.s b/test/MC/COFF/secrel32.s new file mode 100644 index 0000000..ce148db --- /dev/null +++ b/test/MC/COFF/secrel32.s @@ -0,0 +1,14 @@ +// RUN: llvm-mc -filetype=obj -triple i686-pc-win32 %s | coff-dump.py | FileCheck %s + +// check that we produce the correct relocation for .secrel32 + +Lfoo: + .secrel32 Lfoo + +// CHECK: Relocations = [ +// CHECK-NEXT: 0 = { +// CHECK-NEXT: VirtualAddress = 0x0 +// CHECK-NEXT: SymbolTableIndex = 0 +// CHECK-NEXT: Type = IMAGE_REL_I386_SECREL (11) +// CHECK-NEXT: SymbolName = .text +// CHECK-NEXT: } diff --git a/test/MC/Disassembler/ARM/dg.exp b/test/MC/Disassembler/ARM/dg.exp deleted file mode 100644 index fc2f17a..0000000 --- a/test/MC/Disassembler/ARM/dg.exp +++ /dev/null @@ -1,6 +0,0 @@ -load_lib llvm.exp - -if { [llvm_supports_target ARM] } { - RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{txt}]] -} - diff --git a/test/MC/Disassembler/ARM/invalid-IT-CC15.txt b/test/MC/Disassembler/ARM/invalid-IT-CC15.txt new file mode 100644 index 0000000..17e25ea --- /dev/null +++ b/test/MC/Disassembler/ARM/invalid-IT-CC15.txt @@ -0,0 +1,18 @@ +# RUN: llvm-mc --disassemble %s -triple=thumbv7-unknown-unknown |& grep und +# rdar://10841671 + +0xe3 0xbf +0xdf 0xed 0x61 0x3b +0x71 0xee 0xe0 0x1b +0x72 0xee 0xa3 0x2b +0xdf 0xed 0x60 0x0b + +# This is test is dealing with a undefined condition code value of 15 in the +# above sequence of junk bytes and not allowing the disassembler to abort on +# printing the final instruction in this list. +# +# ittte al +# vldr d19, [pc, #388] +# vsub.f64 d17, d17, d16 +# vadd.f64 d18, d18, d19 +# vldr<und> d16, [pc, #384] diff --git a/test/MC/Disassembler/ARM/lit.local.cfg b/test/MC/Disassembler/ARM/lit.local.cfg new file mode 100644 index 0000000..c5dd3fb --- /dev/null +++ b/test/MC/Disassembler/ARM/lit.local.cfg @@ -0,0 +1,13 @@ +config.suffixes = ['.txt'] + +def getRoot(config): + if not config.parent: + return config + return getRoot(config.parent) + +root = getRoot(config) + +targets = set(root.targets_to_build.split()) +if not 'ARM' in targets: + config.unsupported = True + diff --git a/test/MC/Disassembler/ARM/unpredictables-thumb.txt b/test/MC/Disassembler/ARM/unpredictables-thumb.txt new file mode 100644 index 0000000..e7645f0 --- /dev/null +++ b/test/MC/Disassembler/ARM/unpredictables-thumb.txt @@ -0,0 +1,5 @@ +# RUN: llvm-mc --disassemble %s -triple=thumbv7 |& FileCheck %s + +0x01 0x47 +# CHECK: 3:1: warning: potentially undefined +# CHECK: bx r0 diff --git a/test/MC/Disassembler/MBlaze/dg.exp b/test/MC/Disassembler/MBlaze/dg.exp deleted file mode 100644 index 0be99a3..0000000 --- a/test/MC/Disassembler/MBlaze/dg.exp +++ /dev/null @@ -1,6 +0,0 @@ -load_lib llvm.exp - -if { [llvm_supports_target MBlaze] } { - RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{txt}]] -} - diff --git a/test/MC/Disassembler/MBlaze/lit.local.cfg b/test/MC/Disassembler/MBlaze/lit.local.cfg new file mode 100644 index 0000000..766b980 --- /dev/null +++ b/test/MC/Disassembler/MBlaze/lit.local.cfg @@ -0,0 +1,13 @@ +config.suffixes = ['.txt'] + +def getRoot(config): + if not config.parent: + return config + return getRoot(config.parent) + +root = getRoot(config) + +targets = set(root.targets_to_build.split()) +if not 'MBlaze' in targets: + config.unsupported = True + diff --git a/test/MC/Disassembler/X86/dg.exp b/test/MC/Disassembler/X86/dg.exp deleted file mode 100644 index a4d0e7c..0000000 --- a/test/MC/Disassembler/X86/dg.exp +++ /dev/null @@ -1,6 +0,0 @@ -load_lib llvm.exp - -if { [llvm_supports_target X86] } { - RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{txt}]] -} - diff --git a/test/MC/Disassembler/X86/lit.local.cfg b/test/MC/Disassembler/X86/lit.local.cfg new file mode 100644 index 0000000..5f3ae7d --- /dev/null +++ b/test/MC/Disassembler/X86/lit.local.cfg @@ -0,0 +1,13 @@ +config.suffixes = ['.txt'] + +def getRoot(config): + if not config.parent: + return config + return getRoot(config.parent) + +root = getRoot(config) + +targets = set(root.targets_to_build.split()) +if not 'X86' in targets: + config.unsupported = True + diff --git a/test/MC/Disassembler/X86/simple-tests.txt b/test/MC/Disassembler/X86/simple-tests.txt index 05a57d7..840d5fa 100644 --- a/test/MC/Disassembler/X86/simple-tests.txt +++ b/test/MC/Disassembler/X86/simple-tests.txt @@ -6,6 +6,11 @@ # CHECK: int $33 0xCD 0x21 +# CHECK: jrcxz -127 +0xe3 0x81 + +# CHECK: jecxz -127 +0x67 0xe3 0x81 # CHECK: addb %al, (%rax) 0 0 @@ -28,6 +33,9 @@ # CHECK: vmcall 0x0f 0x01 0xc1 +# CHECK: vmfunc +0x0f 0x01 0xd4 + # CHECK: vmlaunch 0x0f 0x01 0xc2 @@ -52,6 +60,30 @@ # CHECK: vmptrst 0x0f 0xc7 0x38 +# CHECK: vmrun +0x0f 0x01 0xd8 + +# CHECK: vmmcall +0x0f 0x01 0xd9 + +# CHECK: vmload +0x0f 0x01 0xda + +# CHECK: vmsave +0x0f 0x01 0xdb + +# CHECK: stgi +0x0f 0x01 0xdc + +# CHECK: clgi +0x0f 0x01 0xdd + +# CHECK: skinit +0x0f 0x01 0xde + +# CHECK: invlpga +0x0f 0x01 0xdf + # CHECK: movl $0, -4(%rbp) 0xc7 0x45 0xfc 0x00 0x00 0x00 0x00 @@ -647,3 +679,48 @@ # CHECK: shrxq %r12, %r11, %r10 0xc4 0x42 0x9b 0xf7 0xd3 + +# CHECK: vfmadd132ps %xmm11, %xmm12, %xmm10 +0xc4 0x42 0x19 0x98 0xd3 + +# CHECK: vfmadd132pd %xmm11, %xmm12, %xmm10 +0xc4 0x42 0x99 0x98 0xd3 + +# CHECK: vfmadd132ps %ymm11, %ymm12, %ymm10 +0xc4 0x42 0x1d 0x98 0xd3 + +# CHECK: vfmadd132pd %ymm11, %ymm12, %ymm10 +0xc4 0x42 0x9d 0x98 0xd3 + +# CHECK: vfmadd132ps (%rax), %xmm12, %xmm10 +0xc4 0x62 0x19 0x98 0x10 + +# CHECK: vfmadd132pd (%rax), %xmm12, %xmm10 +0xc4 0x62 0x99 0x98 0x10 + +# CHECK: vfmadd132ps (%rax), %ymm12, %ymm10 +0xc4 0x62 0x1d 0x98 0x10 + +# CHECK: vfmadd132pd (%rax), %ymm12, %ymm10 +0xc4 0x62 0x9d 0x98 0x10 + +# CHECK: vfmadd132ss %xmm11, %xmm12, %xmm10 +0xc4 0x42 0x19 0x99 0xd3 + +# CHECK: vfmadd132sd %xmm11, %xmm12, %xmm10 +0xc4 0x42 0x99 0x99 0xd3 + +# CHECK: vfmadd132ss (%rax), %xmm12, %xmm10 +0xc4 0x62 0x19 0x99 0x10 + +# CHECK: vfmadd132sd (%rax), %xmm12, %xmm10 +0xc4 0x62 0x99 0x99 0x10 + +# CHECK: vfmaddss (%rcx), %xmm1, %xmm0, %xmm0 +0xc4 0xe3 0xf9 0x6a 0x01 0x10 + +# CHECK: vfmaddss %xmm1, (%rcx), %xmm0, %xmm0 +0xc4 0xe3 0x79 0x6a 0x01 0x10 + +# CHECK: vpermil2ps $1, 4(%rax), %xmm2, %xmm3, %xmm0 +0xc4 0xe3 0xe1 0x48 0x40 0x04 0x21 diff --git a/test/MC/Disassembler/X86/x86-32.txt b/test/MC/Disassembler/X86/x86-32.txt index 5d5ee5d..5f2f608 100644 --- a/test/MC/Disassembler/X86/x86-32.txt +++ b/test/MC/Disassembler/X86/x86-32.txt @@ -11,6 +11,12 @@ # CHECK: calll 0xff 0xd0 +# CHECK: jecxz -127 +0xe3 0x81 + +# CHECK: jcxz -127 +0x67 0xe3 0x81 + # CHECK: incl 0x40 @@ -63,6 +69,9 @@ # CHECK: vmcall 0x0f 0x01 0xc1 +# CHECK: vmfunc +0x0f 0x01 0xd4 + # CHECK: vmlaunch 0x0f 0x01 0xc2 @@ -87,6 +96,30 @@ # CHECK: vmptrst 0x0f 0xc7 0x38 +# CHECK: vmrun +0x0f 0x01 0xd8 + +# CHECK: vmmcall +0x0f 0x01 0xd9 + +# CHECK: vmload +0x0f 0x01 0xda + +# CHECK: vmsave +0x0f 0x01 0xdb + +# CHECK: stgi +0x0f 0x01 0xdc + +# CHECK: clgi +0x0f 0x01 0xdd + +# CHECK: skinit +0x0f 0x01 0xde + +# CHECK: invlpga +0x0f 0x01 0xdf + # CHECK: movl $0, -4(%ebp) 0xc7 0x45 0xfc 0x00 0x00 0x00 0x00 diff --git a/test/MC/ELF/cfi-escape.s b/test/MC/ELF/cfi-escape.s new file mode 100644 index 0000000..3a5af00 --- /dev/null +++ b/test/MC/ELF/cfi-escape.s @@ -0,0 +1,42 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s + +f: + .cfi_startproc + nop + .cfi_escape 0x15, 7, 0x7f # DW_CFA_val_offset_sf, %esp, 8/-8 + nop + .cfi_endproc + +// CHECK: # Section 4 +// CHECK-NEXT: (('sh_name', 0x00000011) # '.eh_frame' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x0000000000000002) +// CHECK-NEXT: ('sh_addr', 0x0000000000000000) +// CHECK-NEXT: ('sh_offset', 0x0000000000000048) +// CHECK-NEXT: ('sh_size', 0x0000000000000030) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x0000000000000008) +// CHECK-NEXT: ('sh_entsize', 0x0000000000000000) +// CHECK-NEXT: ('_section_data', '14000000 00000000 017a5200 01781001 1b0c0708 90010000 14000000 1c000000 00000000 02000000 00411507 7f000000') +// CHECK-NEXT: ), +// CHECK-NEXT: # Section 5 +// CHECK-NEXT: (('sh_name', 0x0000000c) # '.rela.eh_frame' +// CHECK-NEXT: ('sh_type', 0x00000004) +// CHECK-NEXT: ('sh_flags', 0x0000000000000000) +// CHECK-NEXT: ('sh_addr', 0x0000000000000000) +// CHECK-NEXT: ('sh_offset', 0x0000000000000390) +// CHECK-NEXT: ('sh_size', 0x0000000000000018) +// CHECK-NEXT: ('sh_link', 0x00000007) +// CHECK-NEXT: ('sh_info', 0x00000004) +// CHECK-NEXT: ('sh_addralign', 0x0000000000000008) +// CHECK-NEXT: ('sh_entsize', 0x0000000000000018) +// CHECK-NEXT: ('_relocations', [ +// CHECK-NEXT: # Relocation 0 +// CHECK-NEXT: (('r_offset', 0x0000000000000020) +// CHECK-NEXT: ('r_sym', 0x00000002) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: ]) +// CHECK-NEXT: ), diff --git a/test/MC/ELF/cfi-restore.s b/test/MC/ELF/cfi-restore.s new file mode 100644 index 0000000..0fc3129 --- /dev/null +++ b/test/MC/ELF/cfi-restore.s @@ -0,0 +1,42 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s + +f: + .cfi_startproc + nop + .cfi_restore %rbp + nop + .cfi_endproc + +// CHECK: # Section 4 +// CHECK-NEXT: (('sh_name', 0x00000011) # '.eh_frame' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x0000000000000002) +// CHECK-NEXT: ('sh_addr', 0x0000000000000000) +// CHECK-NEXT: ('sh_offset', 0x0000000000000048) +// CHECK-NEXT: ('sh_size', 0x0000000000000030) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x0000000000000008) +// CHECK-NEXT: ('sh_entsize', 0x0000000000000000) +// CHECK-NEXT: ('_section_data', '14000000 00000000 017a5200 01781001 1b0c0708 90010000 14000000 1c000000 00000000 02000000 0041c600 00000000') +// CHECK-NEXT: ), +// CHECK-NEXT: # Section 5 +// CHECK-NEXT: (('sh_name', 0x0000000c) # '.rela.eh_frame' +// CHECK-NEXT: ('sh_type', 0x00000004) +// CHECK-NEXT: ('sh_flags', 0x0000000000000000) +// CHECK-NEXT: ('sh_addr', 0x0000000000000000) +// CHECK-NEXT: ('sh_offset', 0x0000000000000390) +// CHECK-NEXT: ('sh_size', 0x0000000000000018) +// CHECK-NEXT: ('sh_link', 0x00000007) +// CHECK-NEXT: ('sh_info', 0x00000004) +// CHECK-NEXT: ('sh_addralign', 0x0000000000000008) +// CHECK-NEXT: ('sh_entsize', 0x0000000000000018) +// CHECK-NEXT: ('_relocations', [ +// CHECK-NEXT: # Relocation 0 +// CHECK-NEXT: (('r_offset', 0x0000000000000020) +// CHECK-NEXT: ('r_sym', 0x00000002) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: ]) +// CHECK-NEXT: ), diff --git a/test/MC/ELF/cfi-signal-frame.s b/test/MC/ELF/cfi-signal-frame.s new file mode 100644 index 0000000..cf6d160 --- /dev/null +++ b/test/MC/ELF/cfi-signal-frame.s @@ -0,0 +1,23 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s + +f: + .cfi_startproc + .cfi_signal_frame + .cfi_endproc + +g: + .cfi_startproc + .cfi_endproc + +// CHECK: (('sh_name', 0x00000011) # '.eh_frame' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x0000000000000002) +// CHECK-NEXT: ('sh_addr', 0x0000000000000000) +// CHECK-NEXT: ('sh_offset', 0x0000000000000040) +// CHECK-NEXT: ('sh_size', 0x0000000000000058) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x0000000000000008) +// CHECK-NEXT: ('sh_entsize', 0x0000000000000000) +// CHECK-NEXT: ('_section_data', '14000000 00000000 017a5253 00017810 011b0c07 08900100 10000000 1c000000 00000000 00000000 00000000 14000000 00000000 017a5200 01781001 1b0c0708 90010000 10000000 1c000000 00000000 00000000 00000000') +// CHECK-NEXT: ), diff --git a/test/MC/ELF/dg.exp b/test/MC/ELF/dg.exp deleted file mode 100644 index d46d700..0000000 --- a/test/MC/ELF/dg.exp +++ /dev/null @@ -1,5 +0,0 @@ -load_lib llvm.exp - -if { [llvm_supports_target X86] } { - RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,s}]] -} diff --git a/test/MC/ELF/gen-dwarf.s b/test/MC/ELF/gen-dwarf.s new file mode 100644 index 0000000..b090e08 --- /dev/null +++ b/test/MC/ELF/gen-dwarf.s @@ -0,0 +1,70 @@ +// RUN: llvm-mc -g -triple i686-pc-linux-gnu %s -filetype=obj -o - | elf-dump | FileCheck %s + + +// Test that on ELF the debug info has a relocation to debug_abbrev and one to +// to debug_line. + + + .text + .globl foo + .type foo, @function + .align 4 +foo: + ret + .size foo, .-foo + +// Section 4 is .debug_line +// CHECK: # Section 4 +// CHECK-NEXT: # '.debug_line' + + + +// The two relocations, one to symbol 6 and one to 4 +// CHECK: # '.rel.debug_info' +// CHECK-NEXT: ('sh_type', +// CHECK-NEXT: ('sh_flags' +// CHECK-NEXT: ('sh_addr', +// CHECK-NEXT: ('sh_offset', +// CHECK-NEXT: ('sh_size', +// CHECK-NEXT: ('sh_link', +// CHECK-NEXT: ('sh_info', +// CHECK-NEXT: ('sh_addralign', +// CHECK-NEXT: ('sh_entsize', +// CHECK-NEXT: ('_relocations', [ +// CHECK-NEXT: # Relocation 0 +// CHECK-NEXT: (('r_offset', 0x00000006) +// CHECK-NEXT: ('r_sym', 0x000006) +// CHECK-NEXT: ('r_type', 0x01) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 1 +// CHECK-NEXT: (('r_offset', 0x0000000c) +// CHECK-NEXT: ('r_sym', 0x000004) +// CHECK-NEXT: ('r_type', 0x01) +// CHECK-NEXT: ), + + +// Section 8 is .debug_abbrev +// CHECK: # Section 8 +// CHECK-NEXT: (('sh_name', 0x00000001) # '.debug_abbrev' + +// Symbol 4 is section 4 (.debug_line) +// CHECK: # Symbol 4 +// CHECK-NEXT: (('st_name', 0x00000000) # '' +// CHECK-NEXT: ('st_value', 0x00000000) +// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_bind', 0x0) +// CHECK-NEXT: ('st_type', 0x3) +// CHECK-NEXT: ('st_other', 0x00) +// CHECK-NEXT: ('st_shndx', 0x0004) +// CHECK-NEXT: ), + +// Symbol 6 is section 8 (.debug_abbrev) +// CHECK: # Symbol 6 +// CHECK-NEXT: (('st_name', 0x00000000) # '' +// CHECK-NEXT: ('st_value', 0x00000000) +// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_bind', 0x0) +// CHECK-NEXT: ('st_type', 0x3) +// CHECK-NEXT: ('st_other', 0x00) +// CHECK-NEXT: ('st_shndx', 0x0008) +// CHECK-NEXT: ), diff --git a/test/MC/ELF/lit.local.cfg b/test/MC/ELF/lit.local.cfg new file mode 100644 index 0000000..461c6f4 --- /dev/null +++ b/test/MC/ELF/lit.local.cfg @@ -0,0 +1,13 @@ +config.suffixes = ['.ll', '.s'] + +def getRoot(config): + if not config.parent: + return config + return getRoot(config.parent) + +root = getRoot(config) + +targets = set(root.targets_to_build.split()) +if not 'X86' in targets: + config.unsupported = True + diff --git a/test/MC/ELF/many-section.s b/test/MC/ELF/many-section.s index e7e723a..b729e66 100644 --- a/test/MC/ELF/many-section.s +++ b/test/MC/ELF/many-section.s @@ -1,5 +1,5 @@ // RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o %t -// RUN: llvm-nm %t | FileCheck %s +// RUN: llvm-nm -a %t | FileCheck %s // CHECK: s000a // CHECK-NOT: U diff --git a/test/MC/ELF/tls-i386.s b/test/MC/ELF/tls-i386.s index 197418d..922d4c6 100644 --- a/test/MC/ELF/tls-i386.s +++ b/test/MC/ELF/tls-i386.s @@ -9,6 +9,13 @@ movl foo5@TPOFF(%eax), %eax movl foo6@DTPOFF(%eax), %eax movl foo7@INDNTPOFF, %eax + .long foo8@NTPOFF + .long foo9@GOTNTPOFF + .long fooA@TLSGD + .long fooB@TLSLDM + .long fooC@TPOFF + .long fooD@DTPOFF + .long fooE@INDNTPOFF // CHECK: (('st_name', 0x00000001) # 'foo1' // CHECK-NEXT: ('st_value', 0x00000000) @@ -72,3 +79,67 @@ // CHECK-NEXT: ('st_other', 0x00) // CHECK-NEXT: ('st_shndx', 0x0000) // CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 12 +// CHECK-NEXT: (('st_name', 0x00000024) # 'foo8' +// CHECK-NEXT: ('st_value', 0x00000000) +// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_bind', 0x1) +// CHECK-NEXT: ('st_type', 0x6) +// CHECK-NEXT: ('st_other', 0x00) +// CHECK-NEXT: ('st_shndx', 0x0000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 13 +// CHECK-NEXT: (('st_name', 0x00000029) # 'foo9' +// CHECK-NEXT: ('st_value', 0x00000000) +// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_bind', 0x1) +// CHECK-NEXT: ('st_type', 0x6) +// CHECK-NEXT: ('st_other', 0x00) +// CHECK-NEXT: ('st_shndx', 0x0000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 14 +// CHECK-NEXT: (('st_name', 0x0000002e) # 'fooA' +// CHECK-NEXT: ('st_value', 0x00000000) +// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_bind', 0x1) +// CHECK-NEXT: ('st_type', 0x6) +// CHECK-NEXT: ('st_other', 0x00) +// CHECK-NEXT: ('st_shndx', 0x0000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 15 +// CHECK-NEXT: (('st_name', 0x00000033) # 'fooB' +// CHECK-NEXT: ('st_value', 0x00000000) +// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_bind', 0x1) +// CHECK-NEXT: ('st_type', 0x6) +// CHECK-NEXT: ('st_other', 0x00) +// CHECK-NEXT: ('st_shndx', 0x0000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 16 +// CHECK-NEXT: (('st_name', 0x00000038) # 'fooC' +// CHECK-NEXT: ('st_value', 0x00000000) +// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_bind', 0x1) +// CHECK-NEXT: ('st_type', 0x6) +// CHECK-NEXT: ('st_other', 0x00) +// CHECK-NEXT: ('st_shndx', 0x0000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 17 +// CHECK-NEXT: (('st_name', 0x0000003d) # 'fooD' +// CHECK-NEXT: ('st_value', 0x00000000) +// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_bind', 0x1) +// CHECK-NEXT: ('st_type', 0x6) +// CHECK-NEXT: ('st_other', 0x00) +// CHECK-NEXT: ('st_shndx', 0x0000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 18 +// CHECK-NEXT: (('st_name', 0x00000042) # 'fooE' +// CHECK-NEXT: ('st_value', 0x00000000) +// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_bind', 0x1) +// CHECK-NEXT: ('st_type', 0x6) +// CHECK-NEXT: ('st_other', 0x00) +// CHECK-NEXT: ('st_shndx', 0x0000) +// CHECK-NEXT: ), + diff --git a/test/MC/ELF/tls.s b/test/MC/ELF/tls.s index d6d7de6..fe2bb4e 100644 --- a/test/MC/ELF/tls.s +++ b/test/MC/ELF/tls.s @@ -5,12 +5,14 @@ leaq foo1@TLSGD(%rip), %rdi leaq foo2@GOTTPOFF(%rip), %rdi leaq foo3@TLSLD(%rip), %rdi - + .long foo4@GOTTPOFF + .long foo5@TLSLD + .long foo6@TLSGD .section .zed,"awT",@progbits foobar: .long 43 -// CHECK: (('st_name', 0x00000010) # 'foobar' +// CHECK: (('st_name', 0x0000001f) # 'foobar' // CHECK-NEXT: ('st_bind', 0x0) // CHECK-NEXT: ('st_type', 0x6) // CHECK-NEXT: ('st_other', 0x00) @@ -46,3 +48,30 @@ foobar: // CHECK-NEXT: ('st_value', 0x0000000000000000) // CHECK-NEXT: ('st_size', 0x0000000000000000) // CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 10 +// CHECK-NEXT: (('st_name', 0x00000010) # 'foo4' +// CHECK-NEXT: ('st_bind', 0x1) +// CHECK-NEXT: ('st_type', 0x6) +// CHECK-NEXT: ('st_other', 0x00) +// CHECK-NEXT: ('st_shndx', 0x0000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 11 +// CHECK-NEXT: (('st_name', 0x00000015) # 'foo5' +// CHECK-NEXT: ('st_bind', 0x1) +// CHECK-NEXT: ('st_type', 0x6) +// CHECK-NEXT: ('st_other', 0x00) +// CHECK-NEXT: ('st_shndx', 0x0000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 12 +// CHECK-NEXT: (('st_name', 0x0000001a) # 'foo6' +// CHECK-NEXT: ('st_bind', 0x1) +// CHECK-NEXT: ('st_type', 0x6) +// CHECK-NEXT: ('st_other', 0x00) +// CHECK-NEXT: ('st_shndx', 0x0000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), diff --git a/test/MC/MBlaze/dg.exp b/test/MC/MBlaze/dg.exp deleted file mode 100644 index 0c4e78e..0000000 --- a/test/MC/MBlaze/dg.exp +++ /dev/null @@ -1,5 +0,0 @@ -load_lib llvm.exp - -if { [llvm_supports_target MBlaze] } { - RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp,s}]] -} diff --git a/test/MC/MBlaze/lit.local.cfg b/test/MC/MBlaze/lit.local.cfg new file mode 100644 index 0000000..6f92d87 --- /dev/null +++ b/test/MC/MBlaze/lit.local.cfg @@ -0,0 +1,13 @@ +config.suffixes = ['.ll', '.c', '.cpp', '.s'] + +def getRoot(config): + if not config.parent: + return config + return getRoot(config.parent) + +root = getRoot(config) + +targets = set(root.targets_to_build.split()) +if not 'MBlaze' in targets: + config.unsupported = True + diff --git a/test/MC/MachO/ARM/darwin-ARM-reloc.s b/test/MC/MachO/ARM/darwin-ARM-reloc.s index fe69a94..b98c80c 100644 --- a/test/MC/MachO/ARM/darwin-ARM-reloc.s +++ b/test/MC/MachO/ARM/darwin-ARM-reloc.s @@ -12,9 +12,9 @@ _f1: .data _d0: -Ld0_0: +Ld0_0: .long Lsc0_0 - Ld0_0 - + .section __TEXT,__cstring,cstring_literals Lsc0_0: .long 0 diff --git a/test/MC/MachO/ARM/dg.exp b/test/MC/MachO/ARM/dg.exp deleted file mode 100644 index 055fa25..0000000 --- a/test/MC/MachO/ARM/dg.exp +++ /dev/null @@ -1,5 +0,0 @@ -load_lib llvm.exp - -if { [llvm_supports_target ARM] } { - RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp,s}]] -} diff --git a/test/MC/MachO/ARM/empty-function-nop.ll b/test/MC/MachO/ARM/empty-function-nop.ll new file mode 100644 index 0000000..ef86ebc --- /dev/null +++ b/test/MC/MachO/ARM/empty-function-nop.ll @@ -0,0 +1,15 @@ +; RUN: llc < %s -filetype=obj -mtriple=thumbv6-apple-darwin -o - | macho-dump --dump-section-data | FileCheck -check-prefix=CHECK-T1 %s +; RUN: llc < %s -filetype=obj -mtriple=thumbv7-apple-darwin -o - | macho-dump --dump-section-data | FileCheck -check-prefix=CHECK-T2 %s +; RUN: llc < %s -filetype=obj -mtriple=armv6-apple-darwin -o - | macho-dump --dump-section-data | FileCheck -check-prefix=CHECK-ARM %s +; RUN: llc < %s -filetype=obj -mtriple=armv7-apple-darwin -o - | macho-dump --dump-section-data | FileCheck -check-prefix=CHECK-ARMV7 %s + +; Empty functions need a NOP in them for MachO to prevent DWARF FDEs from +; getting all mucked up. See lib/CodeGen/AsmPrinter/AsmPrinter.cpp for +; details. +define internal fastcc void @empty_function() { + unreachable +} +; CHECK-T1: ('_section_data', 'c046') +; CHECK-T2: ('_section_data', '00bf') +; CHECK-ARM: ('_section_data', '0000a0e1') +; CHECK-ARMV7: ('_section_data', '00f020e3') diff --git a/test/MC/MachO/ARM/lit.local.cfg b/test/MC/MachO/ARM/lit.local.cfg new file mode 100644 index 0000000..871e2b5 --- /dev/null +++ b/test/MC/MachO/ARM/lit.local.cfg @@ -0,0 +1,13 @@ +config.suffixes = ['.s'] + +def getRoot(config): + if not config.parent: + return config + return getRoot(config.parent) + +root = getRoot(config) + +targets = set(root.targets_to_build.split()) +if not 'ARM' in targets: + config.unsupported = True + diff --git a/test/MC/MachO/ARM/no-subsections-reloc.s b/test/MC/MachO/ARM/no-subsections-reloc.s new file mode 100644 index 0000000..7701c59 --- /dev/null +++ b/test/MC/MachO/ARM/no-subsections-reloc.s @@ -0,0 +1,18 @@ +@ RUN: llvm-mc -n -triple thumbv7-apple-darwin10 %s -filetype=obj -o %t.obj +@ RUN: macho-dump --dump-section-data < %t.obj > %t.dump +@ RUN: FileCheck < %t.dump %s + +@ When not using subsections-via-symbols, references to non-local symbols +@ in the same section can be resolved at assembly time w/o relocations. + + .syntax unified + .text + .thumb + .thumb_func _foo +_foo: + ldr r3, bar +bar: + .long 0 + +@ CHECK: 'num_reloc', 0 +@ CHECK: '_section_data', 'dff80030 00000000' diff --git a/test/MC/MachO/ARM/relax-thumb-ldr-literal.s b/test/MC/MachO/ARM/relax-thumb-ldr-literal.s new file mode 100644 index 0000000..8d26f6d --- /dev/null +++ b/test/MC/MachO/ARM/relax-thumb-ldr-literal.s @@ -0,0 +1,13 @@ +@ RUN: llvm-mc -n -triple thumbv7-apple-darwin10 %s -filetype=obj -o %t.obj +@ RUN: macho-dump --dump-section-data < %t.obj > %t.dump +@ RUN: FileCheck < %t.dump %s + + .syntax unified + .text + .thumb + .thumb_func _foo +_foo: + ldr r2, (_foo - 4) + +@ CHECK: ('num_reloc', 0) +@ CHECK: ('_section_data', '5ff80820') diff --git a/test/MC/MachO/ARM/thumb2-function-relative-load.s b/test/MC/MachO/ARM/thumb2-function-relative-load.s new file mode 100644 index 0000000..622007d --- /dev/null +++ b/test/MC/MachO/ARM/thumb2-function-relative-load.s @@ -0,0 +1,13 @@ +@ RUN: llvm-mc -n -triple thumbv7-apple-darwin10 %s -filetype=obj -o %t.obj +@ RUN: macho-dump --dump-section-data < %t.obj > %t.dump +@ RUN: FileCheck < %t.dump %s + .syntax unified + .text + .thumb + .thumb_func _foo +_foo: + ldr lr, (_foo - 4) + + .subsections_via_symbols + +@ CHECK: ('_section_data', '5ff808e0') diff --git a/test/MC/MachO/darwin-x86_64-diff-reloc-assign.s b/test/MC/MachO/darwin-x86_64-diff-reloc-assign.s new file mode 100644 index 0000000..49cfa41 --- /dev/null +++ b/test/MC/MachO/darwin-x86_64-diff-reloc-assign.s @@ -0,0 +1,27 @@ +// RUN: llvm-mc -triple x86_64-apple-darwin9 %s -filetype=obj -o - | macho-dump --dump-section-data | FileCheck %s + +// Test case for rdar://10743265 + +// This tests that this expression does not cause a crash and produces two +// relocation entries: +// Relocation information (__TEXT,__text) 2 entries +// address pcrel length extern type scattered symbolnum/value +// 00000000 False long True SUB False _base +// 00000000 False long True UNSIGND False _start_ap_2 + +_base = . + +.long (0x2000) + _start_ap_2 - _base +.word 0 + +_start_ap_2: + cli + +// CHECK: ('_relocations', [ +// CHECK: # Relocation 0 +// CHECK: (('word-0', 0x0), +// CHECK: ('word-1', 0x5c000000)), +// CHECK: # Relocation 1 +// CHECK: (('word-0', 0x0), +// CHECK: ('word-1', 0xc000001)), +// CHECK: ]) diff --git a/test/MC/MachO/dg.exp b/test/MC/MachO/dg.exp deleted file mode 100644 index ca6aefe..0000000 --- a/test/MC/MachO/dg.exp +++ /dev/null @@ -1,6 +0,0 @@ -load_lib llvm.exp - -if { [llvm_supports_target X86] } { - RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{s}]] -} - diff --git a/test/MC/MachO/gen-dwarf.s b/test/MC/MachO/gen-dwarf.s index a443d75..4fbc32d 100644 --- a/test/MC/MachO/gen-dwarf.s +++ b/test/MC/MachO/gen-dwarf.s @@ -7,6 +7,7 @@ _bar: L1: leave ret _foo: +_baz: nop .data _x: .long 1 @@ -24,12 +25,11 @@ _x: .long 1 // CHECK: DW_AT_producer DW_FORM_string // CHECK: DW_AT_language DW_FORM_data2 -// CHECK: [2] DW_TAG_subprogram DW_CHILDREN_yes +// CHECK: [2] DW_TAG_label DW_CHILDREN_yes // CHECK: DW_AT_name DW_FORM_string // CHECK: DW_AT_decl_file DW_FORM_data4 // CHECK: DW_AT_decl_line DW_FORM_data4 // CHECK: DW_AT_low_pc DW_FORM_addr -// CHECK: DW_AT_high_pc DW_FORM_addr // CHECK: DW_AT_prototyped DW_FORM_flag // CHECK: [3] DW_TAG_unspecified_parameters DW_CHILDREN_no @@ -48,24 +48,33 @@ _x: .long 1 // CHECK: DW_AT_producer [DW_FORM_string] ("llvm-mc (based on {{.*}})") // CHECK: DW_AT_language [DW_FORM_data2] (0x8001) -// CHECK: DW_TAG_subprogram [2] * +// CHECK: DW_TAG_label [2] * // CHECK: DW_AT_name [DW_FORM_string] ("bar") // CHECK: DW_AT_decl_file [DW_FORM_data4] (0x00000001) // CHECK: DW_AT_decl_line [DW_FORM_data4] (0x00000005) // CHECK: DW_AT_low_pc [DW_FORM_addr] (0x0000000000000000) -// CHECK: DW_AT_high_pc [DW_FORM_addr] (0x0000000000000007) // CHECK: DW_AT_prototyped [DW_FORM_flag] (0x00) // CHECK: DW_TAG_unspecified_parameters [3] // CHECK: NULL -// CHECK: DW_TAG_subprogram [2] * +// CHECK: DW_TAG_label [2] * // CHECK: DW_AT_name [DW_FORM_string] ("foo") // CHECK: DW_AT_decl_file [DW_FORM_data4] (0x00000001) // CHECK: DW_AT_decl_line [DW_FORM_data4] (0x00000009) // CHECK: DW_AT_low_pc [DW_FORM_addr] (0x0000000000000007) -// CHECK: DW_AT_high_pc [DW_FORM_addr] (0x0000000000000008) +// CHECK: DW_AT_prototyped [DW_FORM_flag] (0x00) + +// CHECK: DW_TAG_unspecified_parameters [3] + +// CHECK: NULL + +// CHECK: DW_TAG_label [2] * +// CHECK: DW_AT_name [DW_FORM_string] ("baz") +// CHECK: DW_AT_decl_file [DW_FORM_data4] (0x00000001) +// CHECK: DW_AT_decl_line [DW_FORM_data4] (0x0000000a) +// CHECK: DW_AT_low_pc [DW_FORM_addr] (0x0000000000000007) // CHECK: DW_AT_prototyped [DW_FORM_flag] (0x00) // CHECK: DW_TAG_unspecified_parameters [3] @@ -109,5 +118,5 @@ _x: .long 1 // CHECK: 0x0000000000000000 6 0 1 0 is_stmt // CHECK: 0x0000000000000005 7 0 1 0 is_stmt // CHECK: 0x0000000000000006 8 0 1 0 is_stmt -// CHECK: 0x0000000000000007 10 0 1 0 is_stmt -// CHECK: 0x0000000000000008 10 0 1 0 is_stmt end_sequence +// CHECK: 0x0000000000000007 11 0 1 0 is_stmt +// CHECK: 0x0000000000000008 11 0 1 0 is_stmt end_sequence diff --git a/test/MC/MachO/lit.local.cfg b/test/MC/MachO/lit.local.cfg new file mode 100644 index 0000000..1f53769 --- /dev/null +++ b/test/MC/MachO/lit.local.cfg @@ -0,0 +1,13 @@ +config.suffixes = ['.s'] + +def getRoot(config): + if not config.parent: + return config + return getRoot(config.parent) + +root = getRoot(config) + +targets = set(root.targets_to_build.split()) +if not 'X86' in targets: + config.unsupported = True + diff --git a/test/MC/MachO/reloc-pcrel-offset.s b/test/MC/MachO/reloc-pcrel-offset.s index bc611d7..e113e96 100644 --- a/test/MC/MachO/reloc-pcrel-offset.s +++ b/test/MC/MachO/reloc-pcrel-offset.s @@ -11,6 +11,7 @@ .text _a: +_b: call _a .subsections_via_symbols diff --git a/test/MC/MachO/reloc-pcrel.s b/test/MC/MachO/reloc-pcrel.s index 2684408..1133415 100644 --- a/test/MC/MachO/reloc-pcrel.s +++ b/test/MC/MachO/reloc-pcrel.s @@ -8,13 +8,13 @@ // CHECK: ('word-1', 0x6)), // CHECK: # Relocation 2 // CHECK: (('word-0', 0x40), -// CHECK: ('word-1', 0xd000002)), +// CHECK: ('word-1', 0xd000003)), // CHECK: # Relocation 3 // CHECK: (('word-0', 0x3b), -// CHECK: ('word-1', 0xd000002)), +// CHECK: ('word-1', 0xd000003)), // CHECK: # Relocation 4 // CHECK: (('word-0', 0x36), -// CHECK: ('word-1', 0xd000002)), +// CHECK: ('word-1', 0xd000003)), // CHECK: # Relocation 5 // CHECK: (('word-0', 0xe0000031), // CHECK: ('word-1', 0x4)), @@ -36,15 +36,16 @@ // CHECK-NEXT: ]) xorl %eax,%eax - + .globl _a _a: xorl %eax,%eax _b: +_d: xorl %eax,%eax L0: xorl %eax,%eax -L1: +L1: call L0 call L0 - 1 diff --git a/test/MC/Mips/dg.exp b/test/MC/Mips/dg.exp deleted file mode 100644 index e469402..0000000 --- a/test/MC/Mips/dg.exp +++ /dev/null @@ -1,5 +0,0 @@ -load_lib llvm.exp - -if { [llvm_supports_target Mips] } { - RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp,s}]] -} diff --git a/test/MC/Mips/elf-tls.ll b/test/MC/Mips/elf-tls.ll new file mode 100644 index 0000000..b4183b8 --- /dev/null +++ b/test/MC/Mips/elf-tls.ll @@ -0,0 +1,36 @@ +; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux %s -o - | elf-dump --dump-section-data | FileCheck %s + +; Check that the appropriate relocations were created. + +; CHECK: ('r_type', 0x2b) +; CHECK: ('r_type', 0x2c) +; CHECK: ('r_type', 0x2d) + +@t1 = thread_local global i32 0, align 4 + +define i32 @f1() nounwind { +entry: + %tmp = load i32* @t1, align 4 + ret i32 %tmp + +} + + +@t2 = external thread_local global i32 + +define i32 @f2() nounwind { +entry: + %tmp = load i32* @t2, align 4 + ret i32 %tmp + +} + +@f3.i = internal thread_local unnamed_addr global i32 1, align 4 + +define i32 @f3() nounwind { +entry: + %0 = load i32* @f3.i, align 4 + %inc = add nsw i32 %0, 1 + store i32 %inc, i32* @f3.i, align 4 + ret i32 %inc +} diff --git a/test/MC/Mips/elf_basic.s b/test/MC/Mips/elf_basic.s new file mode 100644 index 0000000..4621182 --- /dev/null +++ b/test/MC/Mips/elf_basic.s @@ -0,0 +1,7 @@ +; RUN: llc -filetype=obj -mtriple mips-unknown-linux %s -o - | elf-dump --dump-section-data | FileCheck -check-prefix=CHECK-BE %s +; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux %s -o - | elf-dump --dump-section-data | FileCheck -check-prefix=CHECK-LE %s + +; Check that we produce the correct endian. + +; CHECK-BE: ('e_indent[EI_DATA]', 0x02) +; CHECK-LE: ('e_indent[EI_DATA]', 0x01) diff --git a/test/MC/Mips/lit.local.cfg b/test/MC/Mips/lit.local.cfg new file mode 100644 index 0000000..ecc61ea --- /dev/null +++ b/test/MC/Mips/lit.local.cfg @@ -0,0 +1,13 @@ +config.suffixes = ['.ll', '.c', '.cpp', '.s'] + +def getRoot(config): + if not config.parent: + return config + return getRoot(config.parent) + +root = getRoot(config) + +targets = set(root.targets_to_build.split()) +if not 'Mips' in targets: + config.unsupported = True + diff --git a/test/MC/Mips/pr11877.s b/test/MC/Mips/pr11877.s new file mode 100644 index 0000000..d354ce4 --- /dev/null +++ b/test/MC/Mips/pr11877.s @@ -0,0 +1,6 @@ +// RUN: llvm-mc -triple mips-unknown-unknown %s + +i: + .long g +g = h +h = i diff --git a/test/MC/X86/dg.exp b/test/MC/X86/dg.exp deleted file mode 100644 index ec87b69..0000000 --- a/test/MC/X86/dg.exp +++ /dev/null @@ -1,5 +0,0 @@ -load_lib llvm.exp - -if { [llvm_supports_target X86] } { - RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp,s}]] -} diff --git a/test/MC/X86/intel-syntax-2.s b/test/MC/X86/intel-syntax-2.s new file mode 100644 index 0000000..ca4afc3 --- /dev/null +++ b/test/MC/X86/intel-syntax-2.s @@ -0,0 +1,7 @@ +// RUN: llvm-mc -triple x86_64-unknown-unknown %s | FileCheck %s + + .intel_syntax +_test: +// CHECK: movl $257, -4(%rsp) + mov DWORD PTR [RSP - 4], 257 + diff --git a/test/MC/X86/intel-syntax-encoding.s b/test/MC/X86/intel-syntax-encoding.s new file mode 100644 index 0000000..8891126 --- /dev/null +++ b/test/MC/X86/intel-syntax-encoding.s @@ -0,0 +1,44 @@ +// RUN: llvm-mc -x86-asm-syntax=intel -triple x86_64-unknown-unknown --show-encoding %s | FileCheck %s + +// CHECK: encoding: [0x66,0x83,0xf0,0x0c] + xor ax, 12 +// CHECK: encoding: [0x83,0xf0,0x0c] + xor eax, 12 +// CHECK: encoding: [0x48,0x83,0xf0,0x0c] + xor rax, 12 + +// CHECK: encoding: [0x66,0x83,0xc8,0x0c] + or ax, 12 +// CHECK: encoding: [0x83,0xc8,0x0c] + or eax, 12 +// CHECK: encoding: [0x48,0x83,0xc8,0x0c] + or rax, 12 + +// CHECK: encoding: [0x66,0x83,0xf8,0x0c] + cmp ax, 12 +// CHECK: encoding: [0x83,0xf8,0x0c] + cmp eax, 12 +// CHECK: encoding: [0x48,0x83,0xf8,0x0c] + cmp rax, 12 + +// CHECK: encoding: [0x48,0x89,0x44,0x24,0xf0] + mov QWORD PTR [RSP - 16], RAX + +// CHECK: encoding: [0x66,0x83,0xc0,0xf4] + add ax, -12 +// CHECK: encoding: [0x83,0xc0,0xf4] + add eax, -12 +// CHECK: encoding: [0x48,0x83,0xc0,0xf4] + add rax, -12 + +LBB0_3: +// CHECK: encoding: [0xeb,A] + jmp LBB0_3 +// CHECK: encoding: [0xf2,0x0f,0x10,0x2c,0x25,0xf8,0xff,0xff,0xff] + movsd XMM5, QWORD PTR [-8] + +// CHECK: encoding: [0xd1,0xe7] + shl EDI, 1 + +// CHECK: encoding: [0x0f,0xc2,0xd1,0x01] + cmpltps XMM2, XMM1 diff --git a/test/MC/X86/intel-syntax.s b/test/MC/X86/intel-syntax.s new file mode 100644 index 0000000..7cd5677 --- /dev/null +++ b/test/MC/X86/intel-syntax.s @@ -0,0 +1,66 @@ +// RUN: llvm-mc -triple x86_64-unknown-unknown -x86-asm-syntax=intel %s | FileCheck %s + +_test: + xor EAX, EAX + ret + +_main: +// CHECK: movl $257, -4(%rsp) + mov DWORD PTR [RSP - 4], 257 +// CHECK: movl $258, 4(%rsp) + mov DWORD PTR [RSP + 4], 258 +// CHECK: movq $123, -16(%rsp) + mov QWORD PTR [RSP - 16], 123 +// CHECK: movb $97, -17(%rsp) + mov BYTE PTR [RSP - 17], 97 +// CHECK: movl -4(%rsp), %eax + mov EAX, DWORD PTR [RSP - 4] +// CHECK: movq (%rsp), %rax + mov RAX, QWORD PTR [RSP] +// CHECK: movl $-4, -4(%rsp) + mov DWORD PTR [RSP - 4], -4 +// CHECK: movq 0, %rcx + mov RCX, QWORD PTR [0] +// CHECK: movl -24(%rsp,%rax,4), %eax + mov EAX, DWORD PTR [RSP + 4*RAX - 24] +// CHECK: movb %dil, (%rdx,%rcx) + mov BYTE PTR [RDX + RCX], DIL +// CHECK: movzwl 2(%rcx), %edi + movzx EDI, WORD PTR [RCX + 2] +// CHECK: callq _test + call _test +// CHECK: andw $12, %ax + and ax, 12 +// CHECK: andw $-12, %ax + and ax, -12 +// CHECK: andw $257, %ax + and ax, 257 +// CHECK: andw $-257, %ax + and ax, -257 +// CHECK: andl $12, %eax + and eax, 12 +// CHECK: andl $-12, %eax + and eax, -12 +// CHECK: andl $257, %eax + and eax, 257 +// CHECK: andl $-257, %eax + and eax, -257 +// CHECK: andq $12, %rax + and rax, 12 +// CHECK: andq $-12, %rax + and rax, -12 +// CHECK: andq $257, %rax + and rax, 257 +// CHECK: andq $-257, %rax + and rax, -257 +// CHECK: fld %st(0) + fld ST(0) +// CHECK: movl %fs:(%rdi), %eax + mov EAX, DWORD PTR FS:[RDI] +// CHECK: leal (,%rdi,4), %r8d + lea R8D, DWORD PTR [4*RDI] +// CHECK: movl _fnan(,%ecx,4), %ecx + mov ECX, DWORD PTR [4*ECX + _fnan] +// CHECK: movq %fs:320, %rax + mov RAX, QWORD PTR FS:[320] + ret diff --git a/test/MC/X86/lit.local.cfg b/test/MC/X86/lit.local.cfg new file mode 100644 index 0000000..149a9a3 --- /dev/null +++ b/test/MC/X86/lit.local.cfg @@ -0,0 +1 @@ +config.suffixes = ['.ll', '.c', '.cpp', '.s'] diff --git a/test/MC/X86/x86-32-coverage.s b/test/MC/X86/x86-32-coverage.s index 577ac40..6c27b85 100644 --- a/test/MC/X86/x86-32-coverage.s +++ b/test/MC/X86/x86-32-coverage.s @@ -18408,6 +18408,9 @@ // CHECK: vmcall vmcall +// CHECK: vmfunc + vmfunc + // CHECK: vmclear 3735928559(%ebx,%ecx,8) vmclear 0xdeadbeef(%ebx,%ecx,8) @@ -18465,6 +18468,30 @@ // CHECK: vmxon 305419896 vmxon 0x12345678 +// CHECK: vmrun %eax + vmrun %eax + +// CHECK: vmmcall + vmmcall + +// CHECK: vmload %eax + vmload %eax + +// CHECK: vmsave %eax + vmsave %eax + +// CHECK: stgi + stgi + +// CHECK: clgi + clgi + +// CHECK: skinit %eax + skinit %eax + +// CHECK: invlpga %ecx, %eax + invlpga %ecx, %eax + // CHECK: phaddw 3735928559(%ebx,%ecx,8), %mm3 phaddw 0xdeadbeef(%ebx,%ecx,8),%mm3 diff --git a/test/MC/X86/x86-32.s b/test/MC/X86/x86-32.s index 19f1445..8e11aec 100644 --- a/test/MC/X86/x86-32.s +++ b/test/MC/X86/x86-32.s @@ -28,6 +28,9 @@ vmcall // CHECK: vmcall // CHECK: encoding: [0x0f,0x01,0xc1] + vmfunc +// CHECK: vmfunc +// CHECK: encoding: [0x0f,0x01,0xd4] vmlaunch // CHECK: vmlaunch // CHECK: encoding: [0x0f,0x01,0xc2] @@ -41,7 +44,32 @@ // CHECK: swapgs // CHECK: encoding: [0x0f,0x01,0xf8] -rdtscp + vmrun %eax +// CHECK: vmrun %eax +// CHECK: encoding: [0x0f,0x01,0xd8] + vmmcall +// CHECK: vmmcall +// CHECK: encoding: [0x0f,0x01,0xd9] + vmload %eax +// CHECK: vmload %eax +// CHECK: encoding: [0x0f,0x01,0xda] + vmsave %eax +// CHECK: vmsave %eax +// CHECK: encoding: [0x0f,0x01,0xdb] + stgi +// CHECK: stgi +// CHECK: encoding: [0x0f,0x01,0xdc] + clgi +// CHECK: clgi +// CHECK: encoding: [0x0f,0x01,0xdd] + skinit %eax +// CHECK: skinit %eax +// CHECK: encoding: [0x0f,0x01,0xde] + invlpga %ecx, %eax +// CHECK: invlpga %ecx, %eax +// CHECK: encoding: [0x0f,0x01,0xdf] + + rdtscp // CHECK: rdtscp // CHECK: encoding: [0x0f,0x01,0xf9] @@ -69,9 +97,9 @@ rdtscp sal $1, %eax // moffset forms of moves, rdar://7947184 -movb 0, %al // CHECK: movb 0, %al # encoding: [0xa0,A,A,A,A] -movw 0, %ax // CHECK: movw 0, %ax # encoding: [0x66,0xa1,A,A,A,A] -movl 0, %eax // CHECK: movl 0, %eax # encoding: [0xa1,A,A,A,A] +movb 0, %al // CHECK: movb 0, %al # encoding: [0xa0,0x00,0x00,0x00,0x00] +movw 0, %ax // CHECK: movw 0, %ax # encoding: [0x66,0xa1,0x00,0x00,0x00,0x00] +movl 0, %eax // CHECK: movl 0, %eax # encoding: [0xa1,0x00,0x00,0x00,0x00] // rdar://7973775 into diff --git a/test/MC/X86/x86-64.s b/test/MC/X86/x86-64.s index 4ec579a..d5e1b9c 100644 --- a/test/MC/X86/x86-64.s +++ b/test/MC/X86/x86-64.s @@ -339,15 +339,20 @@ rclb $1, %bl // CHECK: rclb %bl # encoding: [0xd0,0xd3] rclb $2, %bl // CHECK: rclb $2, %bl # encoding: [0xc0,0xd3,0x02] // rdar://8418316 +// PR12173 +// CHECK: shldw %cl, %bx, %bx +// CHECK: shldw %cl, %bx, %bx // CHECK: shldw $1, %bx, %bx -// CHECK: shldw $1, %bx, %bx -// CHECK: shrdw $1, %bx, %bx +// CHECK: shrdw %cl, %bx, %bx +// CHECK: shrdw %cl, %bx, %bx // CHECK: shrdw $1, %bx, %bx -shld %bx,%bx -shld $1, %bx,%bx -shrd %bx,%bx -shrd $1, %bx,%bx +shld %bx, %bx +shld %cl, %bx, %bx +shld $1, %bx, %bx +shrd %bx, %bx +shrd %cl, %bx, %bx +shrd $1, %bx, %bx // CHECK: sldtl %ecx // CHECK: encoding: [0x0f,0x00,0xc1] |