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* Added SCEV::NoWrapFlags to manage unsigned, signed, and self wrapAndrew Trick2011-03-147-182/+307
| | | | | | | | | | properties. Added the self-wrap flag for SCEV::AddRecExpr. A slew of temporary FIXMEs indicate the intention of the no-self-wrap flag without changing behavior in this revision. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127590 91177308-0d34-0410-b5e6-96231b3b80d8
* whitespaceAndrew Trick2011-03-141-66/+66
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127589 91177308-0d34-0410-b5e6-96231b3b80d8
* PTX: Emit global arrays with proper sizesJustin Holewinski2011-03-143-45/+74
| | | | | | | - Emit all arrays as type .b8 and proper sizes in bytes to conform to the output of nvcc git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127584 91177308-0d34-0410-b5e6-96231b3b80d8
* PTX: Add support for sqrt/sin/cos intrinsicsJustin Holewinski2011-03-142-0/+89
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127578 91177308-0d34-0410-b5e6-96231b3b80d8
* ptx: add set.p instruction and related changes to predicate executionChe-Liang Chiou2011-03-145-17/+168
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127577 91177308-0d34-0410-b5e6-96231b3b80d8
* Emacs mode string.Mikhail Glushenkov2011-03-141-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127576 91177308-0d34-0410-b5e6-96231b3b80d8
* Correct small comment order typo.Francois Pichet2011-03-141-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127575 91177308-0d34-0410-b5e6-96231b3b80d8
* This case is solved by Scalar Replacement of Aggregates (DT) andJin-Gu Kang2011-03-141-25/+3
| | | | | | | Early CSE pass so this patch reverts it to original source code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127574 91177308-0d34-0410-b5e6-96231b3b80d8
* ptx: add basic support of predicate executionChe-Liang Chiou2011-03-134-59/+177
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127569 91177308-0d34-0410-b5e6-96231b3b80d8
* Add comment as following:Jin-Gu Kang2011-03-131-0/+12
| | | | | | | | | | | | | | | | | | load and store reference same memory location, the memory location is represented by getelementptr with two uses (load and store) and the getelementptr's base is alloca with single use. At this point, instructions from alloca to store can be removed. (this pattern is generated when bitfield is accessed.) For example, %u = alloca %struct.test, align 4 ; [#uses=1] %0 = getelementptr inbounds %struct.test* %u, i32 0, i32 0;[#uses=2] %1 = load i8* %0, align 4 ; [#uses=1] %2 = and i8 %1, -16 ; [#uses=1] %3 = or i8 %2, 5 ; [#uses=1] store i8 %3, i8* %0, align 4 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127565 91177308-0d34-0410-b5e6-96231b3b80d8
* LTO is not ready for Windows.Oscar Fuentes2011-03-131-1/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127562 91177308-0d34-0410-b5e6-96231b3b80d8
* Now that we are deleting unused live intervals during allocation, pointers ↵Jakob Stoklund Olesen2011-03-131-2/+4
| | | | | | | | may be reused. Use the virtual register number as a cache tag instead. They are not reused. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127561 91177308-0d34-0410-b5e6-96231b3b80d8
* Tell the register allocator about new unused virtual registers.Jakob Stoklund Olesen2011-03-134-1/+26
| | | | | | | This allows the allocator to free any resources used by the virtual register, including physical register assignments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127560 91177308-0d34-0410-b5e6-96231b3b80d8
* Build EnhancedDisassembly as a shared library too.Oscar Fuentes2011-03-121-5/+28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127555 91177308-0d34-0410-b5e6-96231b3b80d8
* Build CompilerDriver library.Oscar Fuentes2011-03-122-4/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127554 91177308-0d34-0410-b5e6-96231b3b80d8
* Build LTO as a static library too.Oscar Fuentes2011-03-121-4/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127553 91177308-0d34-0410-b5e6-96231b3b80d8
* Build LTO as a static library too.Oscar Fuentes2011-03-122-5/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127549 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach ComputeMaskedBits about sub nsw.Benjamin Kramer2011-03-122-8/+39
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127548 91177308-0d34-0410-b5e6-96231b3b80d8
* Whe we build a shared library, add its list of used libraries to theOscar Fuentes2011-03-122-2/+7
| | | | | | | | link command. Fixed a pair of IF expressions too. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127546 91177308-0d34-0410-b5e6-96231b3b80d8
* Update link components for llvm-dis and LTO.Oscar Fuentes2011-03-122-2/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127545 91177308-0d34-0410-b5e6-96231b3b80d8
* Speculatively revert commit 127478 (jsjodin) in an attempt to fix theDuncan Sands2011-03-123-0/+21
| | | | | | | | | | | llvm-gcc-i386-linux-selfhost and llvm-x86_64-linux-checks buildbots. The original log entry: Remove optimization emitting a reference insted of label difference, since it can create more relocations. Removed isBaseAddressKnownZero method, because it is no longer used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127540 91177308-0d34-0410-b5e6-96231b3b80d8
* This patch removes some of useless instructions generated by bitfield access.Jin-Gu Kang2011-03-121-3/+13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127539 91177308-0d34-0410-b5e6-96231b3b80d8
* Include snippets in the live stack interval.Jakob Stoklund Olesen2011-03-121-1/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127530 91177308-0d34-0410-b5e6-96231b3b80d8
* Spill multiple registers at once.Jakob Stoklund Olesen2011-03-122-48/+210
| | | | | | | | | | | Live range splitting can create a number of small live ranges containing only a single real use. Spill these small live ranges along with the large range they are connected to with copies. This enables memory operand folding and maximizes the spill to fill distance. Work in progress with known bugs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127529 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixed the comparison operator for the enhancedSean Callanan2011-03-121-7/+2
| | | | | | | disassembler's disassembler map. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127527 91177308-0d34-0410-b5e6-96231b3b80d8
* That's it, I am declaring this a failure of the C++03 STL.Jakob Stoklund Olesen2011-03-121-119/+15
| | | | | | | | | | | | | | There are too many compatibility problems with using mixed types in std::upper_bound, and I don't want to spend 110 lines of boilerplate setting up a call to a 10-line function. Binary search is not /that/ hard to implement correctly. I tried terminating the binary search with a linear search, but that actually made the algorithm slower against my expectation. Most live intervals have less than 4 segments. The early test against endIndex() does pay, and this version is 25% faster than plain std::upper_bound(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127522 91177308-0d34-0410-b5e6-96231b3b80d8
* Saving files before committing is overrated.Eric Christopher2011-03-121-1/+1
| | | | | | | Add a RUN line to this test. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127520 91177308-0d34-0410-b5e6-96231b3b80d8
* Sometimes isPredicable lies to us and tells us we don't need the operands.Eric Christopher2011-03-122-6/+85
| | | | | | | | | | Go ahead and add them on when we might want to use them and let later passes remove them. Fixes rdar://9118569 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127518 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove no-longer-correct special case for disasm of ARM BL instructions.Jim Grosbach2011-03-121-5/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127517 91177308-0d34-0410-b5e6-96231b3b80d8
* Add FIXME.Jim Grosbach2011-03-121-0/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127516 91177308-0d34-0410-b5e6-96231b3b80d8
* Pseudo-ize the ARM Darwin *r9 call instruction definitions. They're the sameJim Grosbach2011-03-122-27/+33
| | | | | | | | actual instruction as the non-Darwin defs, but have different call-clobber semantics and so need separate patterns. They don't need to duplicate the encoding information, however. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127515 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a FIXME.Jim Grosbach2011-03-111-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127511 91177308-0d34-0410-b5e6-96231b3b80d8
* Pseudo-ize the ARM 'B' instruction.Jim Grosbach2011-03-113-10/+14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127510 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove dead code. These ARM instruction definitions no longer exist.Jim Grosbach2011-03-112-9/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127509 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove dead code. These ARM instruction definitions no longer exist.Jim Grosbach2011-03-111-9/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127508 91177308-0d34-0410-b5e6-96231b3b80d8
* Pseudo-ize VMOVDcc and VMOVScc.Jim Grosbach2011-03-113-9/+19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127506 91177308-0d34-0410-b5e6-96231b3b80d8
* 80 columnsJim Grosbach2011-03-111-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127505 91177308-0d34-0410-b5e6-96231b3b80d8
* Properly pseudo-ize the ARM LDMIA_RET instruction. This has the nice side-Jim Grosbach2011-03-1113-28/+32
| | | | | | | | effect that we get proper instruction printing using the "pop" mnemonic for it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127502 91177308-0d34-0410-b5e6-96231b3b80d8
* Roll r127459 back in:Cameron Zwarich2011-03-1116-17/+31
| | | | | | | | | | | Optimize trivial branches in CodeGenPrepare, which often get created from the lowering of objectsize intrinsics. Unfortunately, a number of tests were relying on llc not optimizing trivial branches, so I had to add an option to allow them to continue to test what they originally tested. This fixes <rdar://problem/8785296> and <rdar://problem/9112893>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127498 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the GCC test suite issue exposed by r127477, which was caused by stackCameron Zwarich2011-03-112-3/+22
| | | | | | | protector insertion not working correctly with unreachable code. Since that revision was rolled out, this test doesn't actual fail before this fix. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127497 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach FastISel to support register-immediate-immediate instructions.Owen Anderson2011-03-112-9/+40
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127496 91177308-0d34-0410-b5e6-96231b3b80d8
* 80 columns.Jim Grosbach2011-03-111-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127495 91177308-0d34-0410-b5e6-96231b3b80d8
* Trailing whitespace.Jim Grosbach2011-03-111-13/+13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127493 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove dead code. These ARM instruction definitions don't exist.Jim Grosbach2011-03-111-14/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127491 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM VDUPfd and VDUPfq can just be patterns. The instruction is the sameJim Grosbach2011-03-112-14/+2
| | | | | | as for VDUP32d and VDUP32q, respectively. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127489 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove dead code. These ARM instruction definitions don't exist.Jim Grosbach2011-03-111-10/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127488 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM VDUPLNfq and VDUPLNfd definitions can just be Pat<>s for VDUPLN32qJim Grosbach2011-03-113-12/+10
| | | | | | and VDUPLN32d, respectively. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127486 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM VREV64df and VREV64qf can just be patterns. The instruction is the sameJim Grosbach2011-03-112-9/+2
| | | | | | as for VREV64d32 and VREV64q32, respectively. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127485 91177308-0d34-0410-b5e6-96231b3b80d8
* This FIXME has been fixed.Jim Grosbach2011-03-111-3/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127483 91177308-0d34-0410-b5e6-96231b3b80d8
* Properly pseudo-ize ARM MVNCCi.Jim Grosbach2011-03-112-12/+15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127482 91177308-0d34-0410-b5e6-96231b3b80d8
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