| Commit message (Expand) | Author | Age | Files | Lines |
* | decode and validate instruction alias result definitions. | Chris Lattner | 2010-11-06 | 1 | -0/+33 |
* | simplify | Chris Lattner | 2010-11-06 | 1 | -6/+8 |
* | fix another fixme, replacing a string with a semantic pointer. | Chris Lattner | 2010-11-06 | 1 | -10/+9 |
* | disolve a hack, having CodeGenInstAlias decode the alias in the .td | Chris Lattner | 2010-11-06 | 3 | -13/+31 |
* | Hook up the '.code {16|32}' directive to the streamer. | Jim Grosbach | 2010-11-05 | 1 | -2/+5 |
* | Add '.code 32' assembler directive to MC streamers. | Jim Grosbach | 2010-11-05 | 4 | -1/+5 |
* | Hook up the '.thumb_func' directive to the streamer. | Jim Grosbach | 2010-11-05 | 1 | -3/+5 |
* | Fix past-o. | Jim Grosbach | 2010-11-05 | 1 | -1/+1 |
* | MC'ize the '.code 16' and '.thumb_func' ARM directives. | Jim Grosbach | 2010-11-05 | 9 | -14/+44 |
* | Disallow the certain NEON modified-immediate forms when generating vorr or vbic. | Owen Anderson | 2010-11-05 | 2 | -7/+21 |
* | Trailing whitespace. | Jim Grosbach | 2010-11-05 | 1 | -1/+1 |
* | MC'ize simple ARMConstantValue entry emission (with a FIXME). | Jim Grosbach | 2010-11-05 | 1 | -28/+37 |
* | Put class into an anonymous namespace. | Benjamin Kramer | 2010-11-05 | 1 | -0/+2 |
* | Add codegen and encoding support for the immediate form of vbic. | Owen Anderson | 2010-11-05 | 5 | -6/+102 |
* | Enable MachO writing for ARM/Darwin. Lots of stuff still doesn't work | Jim Grosbach | 2010-11-05 | 1 | -1/+0 |
* | Allow targets to specify the MachO CPUType/CPUSubtype information. | Jim Grosbach | 2010-11-05 | 4 | -11/+24 |
* | syntaxunified directive is a no-op for MachO writing. | Jim Grosbach | 2010-11-05 | 1 | -0/+1 |
* | Add v5 and v7 ARM CPU subtype values. | Jim Grosbach | 2010-11-05 | 1 | -0/+2 |
* | Add FIXME. | Jim Grosbach | 2010-11-05 | 1 | -0/+1 |
* | When passing a parameter using the 'byval' mechanism, inline code needs to be... | Duncan Sands | 2010-11-05 | 1 | -0/+2 |
* | CrashRecoveryContext: Add RunSafelyOnThread helper function. | Daniel Dunbar | 2010-11-05 | 2 | -0/+31 |
* | When passing a huge parameter using the byval mechanism, a long | Duncan Sands | 2010-11-04 | 2 | -7/+28 |
* | Use arrays instead of constant-sized SmallVectors. | Benjamin Kramer | 2010-11-04 | 1 | -132/+143 |
* | Add 118023 back, but with proper spelling for .uleb128/.sleb128. | Rafael Espindola | 2010-11-04 | 2 | -9/+10 |
* | Revert previous patch. Some targets don't support uleb and say | Rafael Espindola | 2010-11-04 | 1 | -6/+7 |
* | MCize. | Rafael Espindola | 2010-11-04 | 1 | -7/+6 |
* | Introduce DIBuilder. It is intended to be a front-end friendly interface to e... | Devang Patel | 2010-11-04 | 3 | -0/+344 |
* | Add getFile() to get DIFile of a DIType. | Devang Patel | 2010-11-04 | 1 | -0/+1 |
* | In the calling convention logic, ValVT is always a legal type, | Duncan Sands | 2010-11-04 | 9 | -33/+33 |
* | Fix @llvm.prefetch isel. Selecting between pld / pldw using the first immedia... | Evan Cheng | 2010-11-04 | 4 | -54/+50 |
* | partition operand processing between aliases and instructions. | Chris Lattner | 2010-11-04 | 1 | -8/+65 |
* | pull name slicing out of BuildInstructionOperandReference so | Chris Lattner | 2010-11-04 | 1 | -16/+12 |
* | cleanups. | Chris Lattner | 2010-11-04 | 1 | -18/+22 |
* | replace SrcOpNum with SrcOpName, eliminating a numering dependency | Chris Lattner | 2010-11-04 | 1 | -26/+23 |
* | System: Add llvm_execute_on_thread, which does what it says. | Daniel Dunbar | 2010-11-04 | 2 | -0/+66 |
* | Add ARM fixup info for load/store label references. Probably will need a bit of | Jim Grosbach | 2010-11-04 | 2 | -30/+79 |
* | Add encoding for VSTR. | Bill Wendling | 2010-11-04 | 3 | -30/+44 |
* | strength reduce some code, resolving a fixme. | Chris Lattner | 2010-11-04 | 1 | -66/+59 |
* | take a big step to making aliases more general and less of a hack: | Chris Lattner | 2010-11-04 | 1 | -112/+197 |
* | Disable fancy splitting during spilling unless -extra-spiller-splits is given. | Jakob Stoklund Olesen | 2010-11-04 | 1 | -8/+18 |
* | Teach ARM Target to use the tblgen support for generating an MC'ized | Jim Grosbach | 2010-11-03 | 3 | -47/+64 |
* | Add rule to build MC'ized CodeEmitter. | Jim Grosbach | 2010-11-03 | 1 | -0/+5 |
* | Support generating an MC'ized CodeEmitter directly. Maintain a reference to the | Jim Grosbach | 2010-11-03 | 1 | -5/+18 |
* | Covert VORRIMM to be produced via early target-specific DAG combining, rather... | Owen Anderson | 2010-11-03 | 3 | -32/+29 |
* | Add support for code generation of the one register with immediate form of vorr. | Owen Anderson | 2010-11-03 | 5 | -1/+99 |
* | trailing whitespace | Jim Grosbach | 2010-11-03 | 1 | -2/+2 |
* | Just return undef for invalid masks or elts, and since we're doing that, | Eric Christopher | 2010-11-03 | 1 | -5/+6 |
* | Let RegAllocBasic require MachineDominators - they are already available and | Jakob Stoklund Olesen | 2010-11-03 | 1 | -0/+3 |
* | Tag debug output as regalloc | Jakob Stoklund Olesen | 2010-11-03 | 2 | -2/+2 |
* | Optimize generated code for integer materialization a bit. | Eric Christopher | 2010-11-03 | 1 | -1/+13 |